WO2022145320A1 - High frequency circuit - Google Patents

High frequency circuit Download PDF

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Publication number
WO2022145320A1
WO2022145320A1 PCT/JP2021/047684 JP2021047684W WO2022145320A1 WO 2022145320 A1 WO2022145320 A1 WO 2022145320A1 JP 2021047684 W JP2021047684 W JP 2021047684W WO 2022145320 A1 WO2022145320 A1 WO 2022145320A1
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WO
WIPO (PCT)
Prior art keywords
filter element
switch
filter
high frequency
input terminal
Prior art date
Application number
PCT/JP2021/047684
Other languages
French (fr)
Japanese (ja)
Inventor
圭亮 有馬
琢真 黒▲柳▼
広幸 可児
基嗣 津田
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2022145320A1 publication Critical patent/WO2022145320A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/25Constructional features of resonators using surface acoustic waves
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/64Filters using surface acoustic waves
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving

Definitions

  • This disclosure generally relates to high frequency circuits. More specifically, the present disclosure relates to a high frequency circuit including a plurality of power amplifiers and a plurality of filter elements.
  • Patent Document 1 discloses a high-frequency circuit unit for carrier aggregation that simultaneously uses radio waves of a plurality of bands having different frequencies.
  • the high frequency circuit unit of Patent Document 1 includes a transmission circuit for the first band and a transmission circuit for the second band.
  • Each of the transmission circuit for the first band and the transmission circuit for the second band includes a high frequency power amplifier, an antenna duplexer, and a switch.
  • the antenna duplexer is a filter composed of a low-pass filter that passes a transmission signal and a high-pass filter that passes a reception signal.
  • Patent Document 1 when both the high frequency power amplifier of the transmission circuit for the first band and the high frequency power amplifier of the transmission circuit for the second band are used at the same time, the antenna duplexer of the transmission circuit for the first band (High frequency signals may leak between the filter element) and the antenna duplexer (filter element) of the transmission circuit for the second band. That is, when different power amplifiers are used at the same time, high frequency signal leakage may occur between the filter elements connected to the different power amplifiers.
  • the present disclosure provides a high frequency circuit capable of improving isolation between filter elements connected to different power amplifiers.
  • One aspect of the present disclosure is a high frequency circuit, the first power amplifier and the second power amplifier that can be used simultaneously, and the first filter element and the second filter connected to the first power amplifier and the second power amplifier, respectively.
  • the element a module board having a first main surface and a second main surface facing each other and in which a first filter element, a second filter element, a first power amplifier, and a second power amplifier are arranged, is connected to the ground. It is provided with a metal member to be used.
  • the first filter element and the second filter element are arranged on the first main surface of the module substrate.
  • the metal member is located between the first filter element and the second filter element when the module substrate is viewed in a plan view.
  • aspects of the present disclosure can improve isolation between filter elements connected to different power amplifiers.
  • Circuit diagram of a configuration example of a communication device including a high frequency circuit according to the first embodiment Top view of the configuration example of the high frequency circuit of FIG. FIG. 2 is a sectional view taken along line AA.
  • Top view of the configuration example of the high frequency circuit according to the second embodiment BB line sectional view of FIG.
  • Circuit diagram of a configuration example of a communication device including a high frequency circuit according to the fifth embodiment Plan view of the configuration example of the high frequency circuit of FIG. FIG. 10 is a sectional view taken along line CC.
  • the positional relationship such as up, down, left, and right shall be based on the positional relationship shown in the drawing.
  • Each figure described in the following embodiment is a schematic view, and the ratio of the size and the thickness of each component in each figure does not necessarily reflect the actual dimensional ratio. do not have. Further, the dimensional ratio of each element is not limited to the ratio shown in the drawings.
  • a is placed between B and C” and "A is located between B and C” mean any point in B and any point in C. It means that at least one of the plurality of line segments connecting the points passes through A.
  • a and B are connected to C and D, respectively” and similar expressions mean “A is connected to C and B is connected to D", and “A and B are connected to D”. It does not mean that B is connected to C and A and B are connected to D.
  • a plurality of A's are connected to a plurality of C's respectively” and similar expressions mean that "A and C are connected in a one-to-one correspondence".
  • connection includes not only the case of being directly connected by a connection terminal and / or a wiring conductor, but also the case of being electrically connected via other circuit components. Further, “connected between A and B” means that both A and B are connected between A and B.
  • FIG. 1 is a circuit diagram of a configuration example of a communication device 1 including a high frequency circuit 10 according to the first embodiment.
  • the high frequency circuit 10 is used, for example, in a high frequency front-end circuit of a mobile communication device (for example, a mobile phone or the like) that supports multi-band and simultaneous use of two frequency bands (for example, carrier aggregation).
  • the high frequency circuit 10 can, for example, support carrier aggregation between a midband of a 2G (second generation mobile communication) standard and a low band of a 4G (fourth generation mobile communication) standard, but is not limited to this.
  • the high frequency circuit 10 may be capable of supporting dual connectivity between a 2G standard midband and a 5G (fifth generation mobile communication) standard lowband.
  • the 2G standard is, for example, a GSM (registered trademark) standard (GSM: Global System for Mobile Communications).
  • the 4G standard is, for example, a 3GPP LTE standard (LTE: LongTermEvolution).
  • the 5G standard is, for example, 5G NR (New Radio).
  • the communication device 1 can support carrier aggregation (uplink carrier aggregation) in which a plurality of frequency bands (two in the first embodiment) are used simultaneously in the uplink.
  • the communication device 1 may be capable of supporting the above-mentioned dual connectivity instead of carrier aggregation.
  • the communication device 1 shown in FIG. 1 includes a high frequency circuit 10, a signal processing circuit 11, and an antenna element 12.
  • the high frequency circuit 10 is connected between the signal processing circuit 11 and the antenna element 12.
  • the high frequency circuit 10 transmits the high frequency signal from the signal processing circuit 11 to the antenna element 12.
  • FIG. 2 is a plan view of a configuration example of the high frequency circuit 10
  • FIG. 3 is a sectional view taken along line AA of FIG.
  • the high-frequency circuit 10 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a module substrate 70, and a metal member 8. Be prepared.
  • the first power amplifier 21 and the second power amplifier 22 can be used at the same time.
  • the first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively.
  • the module substrate 70 has a first main surface 70a and a second main surface 70b facing each other.
  • the first filter element 31, the second filter element 32, the first power amplifier 21, and the second power amplifier 22 are arranged on the module board 70.
  • the metal member 8 is connected to the ground.
  • the first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
  • the high frequency circuit 10 includes the metal member 8 connected to the ground. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. Therefore, in the high frequency circuit 10 of the present embodiment, the isolation between the filters (first filter element 31 and second filter element 32) connected to different power amplifiers (first power amplifier 21 and second power amplifier 22), respectively. The ratio can be improved. In particular, when different power amplifiers (first power amplifier 21 and second power amplifier 22) are used at the same time, high frequency signal leakage may occur between the filters (first filter element 31 and second filter element 32). Can be reduced.
  • the communication device 1 includes a high frequency circuit 10, a signal processing circuit 11, and an antenna element 12.
  • the high frequency circuit 10 is connected between the signal processing circuit 11 and the antenna element 12.
  • the high frequency circuit 10 transmits the high frequency signal from the signal processing circuit 11 to the antenna element 12.
  • the high-frequency circuit 10 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a switch integrated circuit 4, and a first matching circuit.
  • a 51, a second matching circuit 52, and an antenna switch 6 are provided.
  • the high frequency circuit 10 includes a module substrate 70, a metal member 8, and a protective member 9.
  • the first power amplifier 21 and the second power amplifier 22 are connected to the signal processing circuit 11 in parallel.
  • the first power amplifier 21 and the second power amplifier 22 can be used at the same time.
  • a transmission path passing through a first power amplifier 21 and a first filter element 31 and a second power amplifier 22 and a second power amplifier 22 and a second power amplifier 22 are provided between the signal processing circuit 11 and the antenna element 12. It has two transmission paths, one is a transmission path through the filter element 32. Therefore, the fact that the first power amplifier 21 and the second power amplifier 22 can be used at the same time means that two high-frequency signals can be transmitted at the same time by using these two transmission paths at the same time. Thereby, the high frequency circuit 10 can support carrier aggregation or dual connectivity.
  • the first power amplifier 21 has an input terminal and an output terminal.
  • the first power amplifier 21 amplifies the first transmission signal in the first frequency band input from the input terminal, and outputs the amplified first transmission signal from the output terminal.
  • the input terminal of the first power amplifier 21 is connected to the signal processing circuit 11.
  • the first power amplifier 21 can amplify a high frequency signal (first transmission signal) in the first frequency band.
  • the first frequency band includes, for example, n77 / n78 of the NR band (NR operating band) in the 5G standard.
  • Each of the uplink frequency band (Uplink frequency range) and the downlink frequency band (Downlink frequency range) of n77 is 3300 MHz to 4200 MHz.
  • Each of the uplink frequency band and the downlink frequency band of n78 is 3300 MHz-3800 MHz.
  • the first frequency band includes a band 42 (B42) / band 43 (B43) of the 3GPP LTE (Long Term Evolution) standard.
  • the downlink frequency band of the band 42 is 3400 MHz to 3600 MHz.
  • the downlink frequency band of the band 43 is 3600 MHz to 3800 MHz.
  • the second power amplifier 22 has an input terminal and an output terminal.
  • the second power amplifier 22 amplifies the second transmission signal in the second frequency band input from the input terminal, and outputs the amplified second transmission signal from the output terminal.
  • the input terminal of the second power amplifier 22 is connected to the signal processing circuit 11.
  • the second power amplifier 22 can amplify a high frequency signal (second transmission signal) in the second frequency band.
  • the second frequency band is a frequency band different from the first frequency band. That is, the second power amplifier 22 amplifies the second transmission signal in the second frequency band different from the first frequency band.
  • the second frequency band is on the higher frequency side than the first frequency band.
  • the second frequency band includes, for example, n79 of the NR band in the 5G standard.
  • Each of the uplink frequency band and the downlink frequency band of n79 is 4400 MHz to 5000 MHz.
  • the first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively. More specifically, the first filter element 31 and the second filter element 32 are connected to the output terminals of the first power amplifier 21 and the second power amplifier 22, respectively.
  • the first filter element 31 is provided between the first power amplifier 21 and the antenna switch 6 in terms of an electric circuit.
  • the first filter element 31 passes a signal (first transmission signal) in the first pass band including the first frequency band.
  • the first filter element 31 is, for example, a bandpass filter.
  • the first filter element 31 passes a signal in the first pass band (first transmission signal) and attenuates signals other than the first pass band.
  • the second filter element 32 is provided between the second power amplifier 22 and the antenna switch 6 in terms of an electric circuit.
  • the second filter element 32 passes a signal (second transmission signal) in the second pass band including the second frequency band. That is, the second filter element 32 passes a signal in the second pass band including the second frequency band and different from the first pass band.
  • the second filter element 32 is, for example, a bandpass filter.
  • the second filter element 32 passes a signal in the second pass band (second transmission signal) and attenuates a signal other than the second pass band.
  • the first filter element 31 and the second filter element 32 are electronic components that can be mounted on the module board 70.
  • the first filter element 31 and the second filter element 32 are, for example, elastic wave filters.
  • Examples of the surface acoustic wave filter include a SAW (Surface Acoustic Wave) filter and a BAW (Bulk Acoustic Wave) filter.
  • the first filter element 31 and the second filter element 32 are SAW filters.
  • the first filter element 31 is composed of a first substrate 310.
  • the second filter element 32 is composed of a second substrate 320. That is, the first filter element 31 and the second filter element 32 are configured by using separate first substrate 310 and second substrate 320.
  • the first substrate 310 and the second substrate 320 are, for example, piezoelectric substrates including a piezoelectric layer.
  • the first substrate 310 and the second substrate 320 have a rectangular plate shape.
  • the first filter element 31 includes a first filter input terminal 311, a first filter output terminal 312, and two ground terminals 313.
  • the first filter input terminal 311 and the first filter output terminal 312 and the two ground terminals 313 are arranged at the four corners of one surface of the first substrate 310.
  • the set of the first filter input terminal 311 and the first filter output terminal 312 is on the shield portion 80 side, and the set of the two ground terminals 313 is on the opposite side of the shield portion 80.
  • the first filter element 31 includes a filter element 314.
  • the filter element 314 passes a signal (first transmission signal) in the first pass band including the first frequency band.
  • the first filter input terminal 311 is connected to the input side of the filter element 314.
  • the first filter output terminal 312 is connected to the output side of the filter element 314.
  • the filter element 314 includes, for example, an IDT (Interdigital Transducer) electrode.
  • the second filter element 32 includes a second filter input terminal 321, a second filter output terminal 322, and two ground terminals 323.
  • the second filter input terminal 321 and the second filter output terminal 322 and the two ground terminals 323 are arranged at the four corners of one surface of the second substrate 320.
  • the set of the second filter input terminal 321 and the second filter output terminal 322 is on the shield portion 80 side, and the set of the two ground terminals 323 is on the opposite side of the shield portion 80.
  • the second filter element 32 includes a filter element 324.
  • the filter element 324 passes a signal (second transmission signal) in the second pass band including the second frequency band.
  • the second filter input terminal 321 is connected to the input side of the filter element 324.
  • the second filter output terminal 322 is connected to the output side of the filter element 324.
  • the filter element 324 includes, for example, an IDT electrode.
  • the switch integrated circuit 4 is composed of a semiconductor substrate 40.
  • the switch integrated circuit 4 includes a first switch 41 and a second switch 42.
  • the first switch 41 and the second switch 42 are integrated on one chip.
  • the semiconductor substrate 40 is, for example, a silicon substrate.
  • the first switch 41 is provided between the first power amplifier 21 and the first filter element 31 in terms of an electric circuit.
  • the first switch 41 is inserted between the first filter input terminal 311 of the first filter element 31 and the first power amplifier 21.
  • the first switch 41 includes a first switch input terminal 411 and a first switch output terminal 412.
  • the first switch 41 opens and closes an electric circuit between the first switch input terminal 411 and the first switch output terminal 412.
  • the first switch input terminal 411 is connected to the output terminal of the first power amplifier 21.
  • the first switch output terminal 412 is connected to the first filter input terminal 311 of the first filter element 31.
  • the second switch 42 is provided between the second power amplifier 22 and the second filter element 32 in terms of an electric circuit.
  • the second switch 42 is inserted between the second filter input terminal 321 of the second filter element 32 and the second power amplifier 22.
  • the second switch 42 includes a second switch input terminal 421 and a second switch output terminal 422.
  • the second switch 42 opens and closes an electric circuit between the second switch input terminal 421 and the second switch output terminal 422.
  • the second switch input terminal 421 is connected to the output terminal of the second power amplifier 22.
  • the second switch output terminal 422 is connected to the second filter input terminal 321 of the second filter element 32.
  • the switch integrated circuit 4 may include a control circuit for controlling the first power amplifier 21 and the second power amplifier 22.
  • the first matching circuit 51 and the second matching circuit 52 are electrically provided between the first power amplifier 21 and the second power amplifier 22 and the first filter element 31 and the second filter element 32, respectively. More specifically, the first matching circuit 51 and the second matching circuit 52 are electrically provided between the first power amplifier 21 and the second power amplifier 22 and the first switch 41 and the second switch 42, respectively. Will be.
  • the first matching circuit 51 is provided for impedance matching between the first power amplifier 21 and the first filter element 31.
  • the second matching circuit 52 is provided for impedance matching between the second power amplifier 22 and the second filter element 32.
  • the first matching circuit 51 and the second matching circuit 52 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors.
  • the antenna switch 6 is provided to change the connection relationship between the first filter element 31 and the second filter element 32 and the antenna element 12.
  • the antenna switch 6 includes a first filter side terminal 611, a second filter side terminal 612, a first antenna side terminal 621, and a second antenna side terminal 622.
  • the first filter side terminal 611 is connected to the first switch output terminal 412 of the first switch 41.
  • the second filter side terminal 612 is connected to the second switch output terminal 422 of the second switch 42.
  • the first antenna side terminal 621 is connected to the first antenna 121 of the antenna element 12.
  • the second antenna side terminal 622 is connected to the second antenna 122 of the antenna element 12.
  • the antenna switch 6 may be provided with one or more low noise amplifiers, if necessary.
  • the module board 70 is used for mounting and electrical connection of electronic components (circuit components) constituting the high frequency circuit 10.
  • the module substrate 70 is, for example, a low temperature co-fired ceramics (LTCC) substrate having a laminated structure of a plurality of dielectric layers, a high temperature co-fired ceramics (HTCC) substrate, and parts.
  • LTCC low temperature co-fired ceramics
  • HTCC high temperature co-fired ceramics
  • RDL redistribution layer
  • the module substrate 70 has a rectangular plate shape.
  • the module substrate 70 has a first main surface 70a and a second main surface 70b facing each other.
  • the first main surface 70a and the second main surface 70b are surfaces on both sides of the module substrate 70 in the thickness direction.
  • the module board 70 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a switch integrated circuit 4, and a first matching.
  • the circuit 51, the second matching circuit 52, and the antenna switch 6 are arranged.
  • the first power amplifier 21 and the second power amplifier 22 are arranged on the first main surface 70a of the module board 70.
  • the first matching circuit 51 and the second matching circuit 52 are arranged on the first main surface 70a of the module board 70.
  • the first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70.
  • the switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70.
  • the antenna switch 6 is arranged on the second main surface 70b of the module board 70.
  • the first filter element 31 and the second filter element 32 are arranged side by side on the first main surface 70a of the module substrate 70.
  • the first filter input terminal 311 and the first filter output terminal 312 are located closer to the second filter element 32 than the ground terminal 313.
  • the second filter input terminal 321 and the second filter output terminal 322 are located closer to the first filter element 31 than the ground terminal 323.
  • the first filter input terminal 311 of the first filter element 31, the first filter output terminal 312, and the two ground terminals 313 each use the metal bump 74 as the first main of the module board 70. It is fixed to the surface 70a.
  • the second filter input terminal 321 of the second filter element 32, the second filter output terminal 322, and the two ground terminals 323 are each the first main of the module board 70 using the metal bump 74. It is fixed to the surface 70a.
  • the switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70 so as to overlap the first filter element 31 and the second filter element 32 in the plan view of the module board 70. .. More specifically, the switch integrated circuit 4 is arranged so that there is an overlapping region R1 in which the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. That is, the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view.
  • the first filter input terminal 311 is located in the overlapping region R1 where the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view.
  • the first filter input terminal 311 overlaps with the first switch 41 and the first filter element 31 when the module board 70 is viewed in a plan view.
  • the switch integrated circuit 4 is arranged so that there is an overlapping region R2 in which the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. That is, the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view.
  • the second filter input terminal 321 is located in the overlapping region R2 where the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view.
  • the second filter input terminal 321 overlaps with the second switch 42 and the second filter element 32 when the module board 70 is viewed in a plan view.
  • the first switch input terminal 411, the first switch output terminal 412, the second switch input terminal 421, and the second switch output terminal 422 of the switch integrated circuit 4 are modules using metal bumps 74, respectively. It is fixed to the second main surface 70b of the substrate 70.
  • the metal bump 74 is, for example, a solder bump, a gold bump, or the like.
  • the first switch output terminal 412 of the first switch 41 is connected to the first filter input terminal 311 of the first filter element 31 via the first connection wiring 731 provided inside the module board 70. , Will be connected.
  • the first filter input terminal 311 is located in the overlapping region R1 where the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced.
  • the second switch output terminal 422 of the second switch 42 is connected to the second filter input terminal 321 of the second filter element 32 via the second connection wiring 732 provided inside the module board 70. , Will be connected.
  • the second filter input terminal 321 is located in the overlapping region R2 where the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced.
  • the module board 70 includes a first circuit connection terminal 711 and a second circuit connection terminal 712.
  • the first circuit connection terminal 711 and the second circuit connection terminal 712 are used for electrical connection of the high frequency circuit 10 to the signal processing circuit 11. As shown in FIG. 2, the first circuit connection terminal 711 is connected to the input terminal of the first power amplifier 21.
  • the second circuit connection terminal 712 is connected to the input terminal of the second power amplifier 22.
  • the module board 70 includes a first antenna connection terminal 721 and a second antenna connection terminal 722.
  • the first antenna connection terminal 721 and the second antenna connection terminal 722 are used for electrical connection to the antenna element 12 of the high frequency circuit 10. As shown in FIG. 1, the first antenna connection terminal 721 is connected to the first antenna 121.
  • the second antenna connection terminal 722 is connected to the second antenna 122.
  • the module board 70 is provided with electronic components 53 and 54.
  • the electronic component 53 is connected between the first filter element 31 and the antenna switch 6.
  • the electronic component 53 is, for example, a matching circuit for impedance matching between the first filter element 31 and the antenna element 12.
  • the electronic component 54 is connected between the second filter element 32 and the antenna switch 6.
  • the electronic component 54 is, for example, a matching circuit for impedance matching between the second filter element 32 and the antenna element 12.
  • the electronic components 53, 54 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors.
  • the electronic components 53 and 54 are, for example, surface mount type electronic components.
  • the electronic components 53 and 54 may be formed of a conductor pattern or the like formed on the module substrate 70 instead of the surface mount type electronic components. In addition, in order to simplify the drawing, the electronic components 53 and 54 are not shown in FIG.
  • the first filter element 31 and the second filter element 32 are covered with the resin member 75.
  • the electronic components first power amplifier 21, second power amplifier 22, first filter element 31, second filter element 32, switch integrated circuit 4, first matching circuit 51
  • the second matching circuit 52, the antenna switch 6, the electronic components 53, 54 are covered with the resin member 75.
  • the resin member 75 covers at least a part of the electronic components mounted on the module substrate 70 and the first main surface 70a and the second main surface 70b of the module substrate 70.
  • the resin member 75 has a function of ensuring reliability such as mechanical strength and moisture resistance of circuit parts.
  • the metal member 8 is arranged on the module substrate 70.
  • arranged on the module substrate 70 it means that the module substrate 70 is directly or indirectly arranged on the first main surface 70a, the second main surface 70b, or the inside.
  • the metal member 8 is connected to the ground.
  • Connected to ground means “connected to ground” at least during the operation of the high frequency circuit 10.
  • the metal member 8 is connected to the ground pattern of the substrate on which the high frequency circuit 10 is mounted. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
  • the metal member 8 includes a through-hole wiring 81, a ground electrode 82, and a connecting member 83.
  • the through hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to the ground. That is, the through hole wiring 81, the ground electrode 82, and the connecting member 83 have a ground potential.
  • the through-hole wiring 81, the ground electrode 82, and the connecting member 83 constitute a shield portion 80.
  • the shield portion 80 is located between the first filter element 31 and the second filter element 32 in the metal member 8 without overlapping the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. It is a part. In the present embodiment, the entire metal member 8 is a shield portion 80.
  • the through hole wiring 81 is arranged inside the module board 70. As shown in FIG. 3, the through hole wiring 81 is formed between the first main surface 70a and the second main surface 70b of the module substrate 70. In the present embodiment, the through-hole wiring 81 completely penetrates the module board 70, and both ends are exposed on the first main surface 70a and the second main surface 70b of the module board 70, respectively.
  • the through hole wiring 81 is a through via that penetrates the module substrate 70 in the thickness direction.
  • the through hole wiring 81 is connected to the ground.
  • the through hole wiring 81 is a so-called ground via. As shown in FIG. 2, the through-hole wiring 81 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
  • the through-hole wiring 81 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. ..
  • the ground electrode 82 is formed in the switch integrated circuit 4 as shown in FIG. As a result, the ground electrode 82 is indirectly arranged on the second main surface 70b of the module substrate 70.
  • the ground electrode 82 is located between the first switch output terminal 412 and the second switch output terminal 422 in the switch integrated circuit 4.
  • the ground electrode 82 is positioned so as to overlap the through-hole wiring 81 when the module substrate 70 is viewed in a plan view.
  • the connecting member 83 is directly arranged on the second main surface 70b of the module board 70.
  • the connecting member 83 is connected to the ground electrode 82.
  • the connecting member 83 connects the through hole wiring 81 and the ground electrode 82.
  • the connecting member 83 is, for example, a metal bump such as a solder bump or a gold bump.
  • the connecting member 83 may have a ball shape, but in the present embodiment, it has a strip shape.
  • the connecting member 83 is in a position where it overlaps with the through-hole wiring 81 when the module substrate 70 is viewed in a plan view. As shown in FIG.
  • the connecting member 83 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view, similarly to the through-hole wiring 81. Therefore, the connecting member 83 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view.
  • the through hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to each other.
  • the through-hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to the ground as described above.
  • the shield portion 80 is located between the first filter element 31 and the second filter element 32 without overlapping the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. Connected to the ground. Therefore, the isolation between the first filter element 31 and the second filter element 32 can be improved. Therefore, as shown in FIG. 2, even if the first filter input terminal 311 and the first filter output terminal 312 of the first filter element 31 are arranged at the end of the first substrate 310 on the second filter element 32 side.
  • Sufficient isolation can be secured between the first filter element 31 and the second filter element 32.
  • the first filter element 31 and the second filter output terminal 322 of the second filter element 32 are arranged at the ends of the second substrate 320 on the first filter element 31 side, the first filter element 31 and the second filter output terminal 322 can be arranged.
  • Sufficient isolation can be secured between the second filter elements 32.
  • the length of the connection wiring between the first filter element 31 and the first switch 41 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced.
  • the length of the connection wiring between the second filter element 32 and the second switch 42 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced.
  • the protective member 9 is provided to protect the high frequency circuit 10. As shown in FIG. 3, the protective member 9 includes metal layers 91 and 92. The metal layers 91 and 92 are connected to the ground. For example, the metal layers 91 and 92 are connected to the ground pattern of the substrate on which the high frequency circuit 10 is mounted.
  • the metal layer 91 is arranged on the surface of the resin member 75 so as to be located on the side opposite to the first main surface 70a of the module substrate 70 with respect to the first filter element 31 and the second filter element 32.
  • the metal layer 91 constitutes a top surface portion of the protective member 9. In the present embodiment, the metal layer 91 has a size that covers the entire first main surface 70a of the module substrate 70.
  • the metal layer 92 is formed so as to surround the module substrate 70.
  • the metal layer 92 constitutes a side surface portion of the protective member 9.
  • the metal layers 91 and 92 are formed on the surface of the resin member 75 by, for example, a sputtering technique or a plating technique
  • the high frequency circuit 10 described above is connected between the signal processing circuit 11 and the antenna element 12.
  • the signal processing circuit 11 has a function of outputting a high frequency signal to the high frequency circuit 10.
  • the signal processing circuit 11 includes a baseband signal processing circuit 111 and a high frequency signal processing circuit 112.
  • the baseband signal processing circuit 111 is, for example, a BBIC (Baseband Integrated Circuit).
  • the baseband signal processing circuit 111 processes a signal using an intermediate frequency band having a lower frequency than the high frequency signal propagating in the high frequency circuit 10.
  • the baseband signal processing circuit 111 outputs transmission signals for various data transmissions, such as an image signal for displaying an image and an audio signal for a call, to the high frequency signal processing circuit 112.
  • the high frequency signal processing circuit 112 is, for example, an RFIC (Radio Frequency Integrated Circuit).
  • the high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and displays the signal-processed transmission signal (high-frequency signal) in the high-frequency circuit 10. Output to.
  • the high frequency signal processing circuit 112 has a control circuit that outputs a control signal for switching the connection state of the first switch 41 and the second switch 42 of the switch integrated circuit 4 based on the communication band used.
  • the control circuit may be provided outside the high frequency signal processing circuit 112, and may be provided, for example, in the high frequency circuit 10 or the baseband signal processing circuit 111.
  • the antenna element 12 radiates a high frequency signal from the high frequency circuit 10.
  • the antenna element 12 is connected to the high frequency circuit 10, receives a high frequency signal from the high frequency circuit 10, and radiates the received high frequency signal.
  • the antenna element 12 has a first antenna 121 and a second antenna 122.
  • the frequency band in which the first antenna 121 can transmit and receive is the same as the frequency band in which the second antenna 122 can transmit and receive.
  • the frequency band in which the first antenna 121 can transmit and receive may be different from the frequency band in which the second antenna 122 can transmit and receive.
  • MIMO Multiple Input Multiple Output
  • the baseband signal processing circuit 111 outputs, for example, a transmission signal for data transmission to the high frequency signal processing circuit 112.
  • the high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and transfers the signal-processed transmission signal (high-frequency signal) to the high-frequency circuit 10. 1 Output to the power amplifier 21 and the second power amplifier 22.
  • the electric circuit between the 1st switch input terminal 411 of the 1st switch 41 and the 1st switch output terminal 412 is closed, and the 2nd switch of the 2nd switch 42 is closed.
  • the electric circuit between the input terminal 421 and the second switch output terminal 422 is closed.
  • the first power amplifier 21 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112.
  • the transmission signal amplified by the first power amplifier 21 is transmitted to the antenna element 12 through the first matching circuit 51, the first switch 41, the first filter element 31, and the antenna switch 6, and is radiated from the antenna element 12.
  • the second power amplifier 22 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112.
  • the transmission signal amplified by the second power amplifier 22 is transmitted to the antenna element 12 through the second matching circuit 52, the second switch 42, the second filter element 32, and the antenna switch 6, and is radiated from the antenna element 12.
  • the high frequency circuit 10 includes a metal member 8.
  • the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view, and is connected to the ground. Therefore, the isolation between the first filter element 31 and the second filter element 32 can be improved. Therefore, even when the first power amplifier 21 and the second power amplifier 22 are used at the same time, the possibility of high frequency signal leakage between the first filter element 31 and the second filter element 32 can be reduced.
  • the high-frequency circuit 10 described above includes a first power amplifier 21 and a second power amplifier 22 that can be used simultaneously, a first filter element 31 and a second filter element 32, a module substrate 70, and a metal member 8.
  • the first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively.
  • the module substrate 70 has a first main surface 70a and a second main surface 70b that face each other.
  • the first filter element 31, the second filter element 32, the first power amplifier 21, and the second power amplifier 22 are arranged on the module board 70.
  • the metal member 8 is connected to the ground.
  • the first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70.
  • the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 connected to the first power amplifier 21 and the second power amplifier 22, respectively, can be improved.
  • the metal member 8 includes a through hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module substrate 70. According to this configuration, it is possible to improve the isolation between the first filter element 31 and the second filter element 32 connected to the first power amplifier 21 and the second power amplifier 22, respectively, with a simple configuration.
  • the first filter element 31 and the second filter element 32 are the first filter input terminal 311 and the second filter input terminal 321 connected to the first power amplifier 21 and the second power amplifier 22, respectively.
  • the metal member 8 is between the first filter input terminal 311 and the second filter input terminal 321 and the first filter output terminal 312 and the second filter output terminal 322. Located both in between. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
  • the high frequency circuit 10 further includes a switch integrated circuit 4 arranged on the module board 70.
  • the switch integrated circuit 4 is inserted between the first filter input terminal 311 and the second filter input terminal 321 of the first filter element 31 and the second filter element 32 and the first power amplifier 21 and the second power amplifier 22, respectively. It has a first switch 41 and a second switch 42. According to this configuration, the filter to be used can be switched, and various communication methods can be supported.
  • the switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70. According to this configuration, miniaturization can be achieved.
  • the metal member 8 includes a ground electrode 82 formed in the switch integrated circuit 4 and a connecting member 83 arranged on the second main surface 70b of the module substrate 70 and connected to the ground electrode 82. include. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
  • the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the first switch 41 and the first filter element 31 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced. ..
  • the first switch 41 is connected to the first switch input terminal 411 connected to the first power amplifier 21 and the first switch output connected to the first filter input terminal 311 of the first filter element 31. It has a terminal 412.
  • the first filter input terminal 311 overlaps with the first switch 41 and the first filter element 31 when the module board 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the first switch 41 and the first filter element 31 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced. ..
  • the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the second switch 42 and the second filter element 32 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced. ..
  • the second switch 42 has a second switch input terminal 421 connected to the second power amplifier 22 and a second switch output connected to the second filter input terminal 321 of the second filter element 32. It has a terminal 422 and.
  • the second filter input terminal 321 overlaps with the second switch 42 and the second filter element 32 when the module board 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the second switch 42 and the second filter element 32 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced. ..
  • the first power amplifier 21 amplifies the first transmission signal in the first frequency band.
  • the second power amplifier 22 amplifies the second transmission signal in the second frequency band different from the first frequency band.
  • the first filter element 31 passes a signal in the first pass band including the first frequency band.
  • the second filter element 32 passes a signal in a second pass band including the second frequency band and different from the first pass band. According to this configuration, it is possible to support carrier aggregation 2 uplink carrier aggregation in which two frequency bands are used simultaneously in the uplink.
  • FIG. 4 is a plan view of a configuration example of the high frequency circuit 10 according to the second embodiment
  • FIG. 5 is a sectional view taken along line BB of FIG.
  • the high frequency circuit 10 of the second embodiment is different from the high frequency circuit 10 of the first embodiment in the configuration of the metal member 8, particularly the configuration of the shield portion 80.
  • the shield portion 80 of the high frequency circuit 10 of FIG. 4 includes a through hole wiring 81, a ground electrode 82, a connection member 83, and a shield wall 84.
  • the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground.
  • the shield wall 84 is made of metal.
  • the shield wall 84 is formed of, for example, a metal plate.
  • the material of the shield wall 84 is, for example, copper. Copper has a relatively high heat capacity among metals, and can efficiently absorb heat from heat sources such as the first filter element 31 and the second filter element 32, and can improve heat dissipation.
  • the shield wall 84 is arranged on the first main surface 70a of the module substrate 70. In particular, the shield wall 84 overlaps with the through-hole wiring 81 when the module substrate 70 is viewed in a plan view.
  • the height of the shield wall 84 from the first main surface 70a is the height from the first main surface 70a of the first filter element 31 and the height from the first main surface 70a of the second filter element 32. Is above the height of.
  • the height of the shield wall 84 from the first main surface 70a is the portion of the shield wall 84 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (vertical direction in FIG. 5) (shield wall in FIG. 5). It is a dimension between the tip of 84) and the first main surface 70a.
  • the height of the first filter element 31 from the first main surface 70a is the portion of the first filter element 31 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (in FIG.
  • the first filter element 31 It is a dimension between the upper surface) and the first main surface 70a.
  • the height of the second filter element 32 from the first main surface 70a is the portion of the second filter element 32 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (in FIG. 5, the second filter element 32). It is a dimension between the upper surface) and the first main surface 70a.
  • the height of the first filter element 31 and the second filter element 32 from the first main surface 70a includes the height of the metal bump 74 in addition to the height of the first filter element 31 and the second filter element 32 itself. I'm out.
  • the shield wall 84 is electrically connected to the through hole wiring 81 and the metal layer 91.
  • electrically connected means “directly or indirectly contacted and electrically connected”.
  • the base end of the shield wall 84 is in direct contact with the through hole wiring 81.
  • the tip of the shield wall 84 is in direct contact with the metal layer 91. That is, the shield wall 84 is in direct contact with the through-hole wiring 81 and the metal layer 91 and is electrically connected. Since the shield wall 84 is connected to the ground at at least two places, the tip end and the base end, the electromagnetic field shielding function is enhanced.
  • the shield wall 84 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. This means that all of the plurality of line segments connecting an arbitrary point in the first filter element 31 and an arbitrary point in the second filter element 32 pass through the shield wall 84. Therefore, the shield wall 84 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. As shown in FIG. 5, in the shield portion 80, the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other. The through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground as described above.
  • the metal member 8 includes a shield wall 84 arranged on the first main surface 70a of the module substrate 70. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. Further, in the high frequency circuit 10, the height of the shield wall 84 from the first main surface 70a is the height from the first main surface 70a of the first filter element 31 and the height from the first main surface 70a of the second filter element 32. Is above the height of. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
  • a metal layer 91 which is arranged on the surface of the resin member 75 so as to be located on the opposite side to the ground and is connected to the ground is provided.
  • the shield wall 84 is electrically connected to the metal layer 91. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
  • FIG. 6 is a cross-sectional view of a configuration example of the high frequency circuit 10 according to the third embodiment.
  • the high frequency circuit 10 of the third embodiment is different from the high frequency circuit 10 of the second embodiment in the configuration of the metal member 8, particularly the configuration of the shield portion 80.
  • the shield portion 80 of the high frequency circuit 10 of FIG. 6 includes a through hole wiring 81, a ground electrode 82, a connection member 83, and a shield wall 84.
  • the ground electrode 82 is a through silicon via (Through-Silicon Via; TSV).
  • the through silicon via is an electrode that penetrates the silicon substrate of the switch integrated circuit 4.
  • the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other.
  • the through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground as described above.
  • a shield portion 80 serving as a ground potential is provided so as to penetrate the entire high frequency circuit 10. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. Further, the heat generated by the first filter element 31 and the second filter element 32 can be dissipated to the outside by the shield portion 80. As a result, heat dissipation can be improved. In addition, heat transfer between the first filter element 31 and the second filter element 32 can be suppressed.
  • the ground electrode 82 is a through silicon via of the switch integrated circuit 4. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
  • the shield portion 80 includes the through-hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module board 70, and the first main surface of the module board 70.
  • a shield wall 84 arranged on the surface 70a and electrically connected to the through-hole wiring 81 and electrically connected to the metal layer 91, a ground electrode 82 which is a silicon through electrode of the switch integrated circuit 4, and a module substrate.
  • It includes a connecting member 83 arranged on the second main surface 70b of the 70 and connecting the through-hole wiring 81 and the ground electrode 82. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved, and the heat dissipation can be further improved. In addition, heat transfer between the first filter element 31 and the second filter element 32 can be suppressed.
  • FIG. 7 is a cross-sectional view of a configuration example of the high frequency circuit 10 according to the fourth embodiment.
  • the high frequency circuit 10 of the fourth embodiment has a different configuration of the first filter element 31 from the high frequency circuit 10 of the third embodiment.
  • the first power amplifier 21 and the second power amplifier 22 correspond to different power classes.
  • the power class is a classification of the output power of the terminal defined by the maximum output power or the like, and the smaller the value, the higher the power output.
  • the first power amplifier 21 corresponds to the first power class.
  • the second power amplifier 22 corresponds to the second power class.
  • the maximum output power of the first power class is larger than the maximum output power of the second power class.
  • the first power class is a high power class
  • the second power class is a non-high power class.
  • the maximum output power of the high power class is larger than the maximum output power of the non-high power class.
  • the measurement of the maximum output power is performed by a method defined by, for example, 3GPP or the like.
  • the high power class is represented by a numerical value less than a predetermined value.
  • the non-high power class is represented by a numerical value equal to or higher than a predetermined value.
  • the predetermined value for example, 3 can be used.
  • the high power class includes power classes 1, 1.5 and 2, and the non-high power class includes power classes 3 and 4.
  • the first power amplifier 21 corresponds to the output of higher power than the second power amplifier 22. Therefore, the first filter element 31 corresponding to the first power amplifier 21 generates more heat during operation of the high frequency circuit 10 than the second filter element 32 corresponding to the second power amplifier 22. Therefore, as shown in FIG. 7, the first filter element 31 comes into contact with the metal layer 91. As a result, the first filter element 31 is thermally coupled to the metal layer 91. As a result, the heat generated by the first filter element 31 is transferred to the metal layer 91 and dissipated to the outside. In the present embodiment, the first filter element 31 is thermally coupled by being in direct contact with the metal layer 91.
  • the first power amplifier 21 corresponds to the first power class.
  • the second power amplifier 22 corresponds to the second power class.
  • the maximum output power of the first power class is larger than the maximum output power of the second power class.
  • the first filter element 31 comes into contact with the metal layer 91. According to this configuration, heat dissipation can be improved.
  • FIG. 8 is a cross-sectional view of another configuration example of the high frequency circuit 10 according to the fourth embodiment.
  • each of the first filter element 31 and the second filter element 32 comes into contact with the metal layer 91.
  • the heat generated by the first filter element 31 and the second filter element 32 is transferred to the metal layer 91 and dissipated to the outside.
  • the first filter element 31 and the second filter element 32 are thermally coupled by being in direct contact with the metal layer 91.
  • the resin member 75 that seals the first filter element 31 and the second filter element 32, and the first main module substrate 70 with respect to the first filter element 31 and the second filter element 32 As described above, in the high frequency circuit 10, the resin member 75 that seals the first filter element 31 and the second filter element 32, and the first main module substrate 70 with respect to the first filter element 31 and the second filter element 32.
  • a metal layer 91 which is arranged on the surface of the resin member 75 so as to be located on the side opposite to the surface 70a and is connected to the ground is provided.
  • Each of the first filter element 31 and the second filter element 32 comes into contact with the metal layer 91. According to this configuration, heat dissipation can be improved.
  • the first power amplifier 21 and the second power amplifier 22 do not have to correspond to different power classes, and may correspond to the same power class. Further, in FIG. 8, the metal member 8 does not necessarily have to include the shield wall 84.
  • FIG. 9 is a circuit diagram of a configuration example of the communication device 1A including the high frequency circuit 10A according to the fifth embodiment.
  • 10 is a plan view of a configuration example of the high frequency circuit 10A of FIG. 9, and
  • FIG. 11 is a sectional view taken along line CC of FIG.
  • the communication device 1A of FIG. 9 includes a high frequency circuit 10A, a signal processing circuit 11, and an antenna element 12.
  • the high frequency circuit 10A includes a first power amplifier 21, a second power amplifier 22, a first filter element 31A, a second filter element 32A, a switch integrated circuit 4A, and a first matching circuit.
  • a 51, a second matching circuit 52, and an antenna switch 6 are provided.
  • the high frequency circuit 10A includes a module substrate 70, a metal member 8, and a protective member 9.
  • the first filter element 31A and the second filter element 32A are connected to the first power amplifier 21 and the second power amplifier 22, respectively. More specifically, the first filter element 31A and the second filter element 32A are connected to the output terminals of the first power amplifier 21 and the second power amplifier 22, respectively.
  • the first filter element 31A and the second filter element 32A are, for example, elastic wave filters.
  • the first filter element 31A and the second filter element 32A are, for example, SAW filters.
  • the first filter element 31A is composed of a first substrate 310.
  • the second filter element 32A is composed of the second substrate 320. That is, the first filter element 31A and the second filter element 32A are configured by using separate first substrate 310 and second substrate 320.
  • the first substrate 310 and the second substrate 320 are, for example, piezoelectric substrates including a piezoelectric layer. In the present embodiment, the first substrate 310 and the second substrate 320 have a rectangular plate shape.
  • the first filter element 31A includes a plurality of filter elements 314 having different pass bands.
  • the first filter element 31A has a plurality of first filter input terminals 311 corresponding to the plurality of filter elements 314 and a plurality of first filter output terminals 312 corresponding to the plurality of filter elements 314, respectively. And have.
  • the first filter element 31A has two first filter input terminals 311- corresponding to two filter elements 314-1,314-2 and two filter elements 314-1,314-2, respectively. It has 1,311-2 and two first filter output terminals 312-1,312-2 corresponding to the two filter elements 314-1,314-2, respectively.
  • first filter input terminals 311-1 and 311-2 are connected to the input side of the filter elements 314-1,314-2.
  • the first filter output terminals 312-1, 312-2 are connected to the output side of the filter elements 314-1, 314-2.
  • Filter elements 314-1,314-2 include, for example, IDT electrodes.
  • the first filter element 31A includes a first filter input terminal 311-1, 311-2, a first filter output terminal 312-1, 312-2, and two ground terminals 313.
  • the first filter input terminals 311-1 and 311-2 and the first filter output terminals 312-1, 312-2 are arranged at the four corners of one surface of the first substrate 310.
  • the set of the first filter input terminal 311-1 and the first filter output terminal 312-1 is on the shield portion 80 side, and the set of the first filter input terminal 311-2 and the first filter output terminal 312-2 is the shield portion 80. Is on the opposite side.
  • the two ground terminals 313 are located between the first filter input terminal 311-1 and the first filter output terminal 312-1 and between the first filter input terminal 311-2 and the first filter output terminal 312-2, respectively. be.
  • the second filter element 32A includes a plurality of filter elements 324 having different pass bands.
  • the second filter element 32A has a plurality of second filter input terminals 321 corresponding to the plurality of filter elements 324 and a plurality of second filter output terminals 322 corresponding to the plurality of filter elements 324, respectively. And have.
  • the second filter element 32A has two second filter input terminals 321 to correspond to two filter elements 324-1,324-2 and two filter elements 324-1,324-2, respectively. It has 1,321-2 and two second filter output terminals 322-1,322-2 corresponding to the two filter elements 324-1,324-2, respectively.
  • the second filter input terminals 321-1 and 321-2 are connected to the input side of the filter elements 324-1,324-2.
  • the second filter output terminals 322-1, 322-2 are connected to the output side of the filter elements 324-1,324-2.
  • Filter elements 324-1,324-2 include, for example, IDT electrodes.
  • the second filter element 32A includes a second filter input terminal 321-1 and 321-2, a second filter output terminal 322-1,322-2, and two ground terminals 323.
  • the second filter input terminals 321-1, 321-2 and the second filter output terminals 322-1, 322-2 are arranged at the four corners of one surface of the second substrate 320.
  • the set of the second filter input terminal 321-1 and the second filter output terminal 322-1 is on the shield portion 80 side, and the set of the second filter input terminal 321-2 and the second filter output terminal 322-2 is the shield portion 80. Is on the opposite side.
  • the two ground terminals 323 are located between the second filter input terminal 321-1 and the second filter output terminal 322-1 and between the second filter input terminal 321-2 and the second filter output terminal 322-2, respectively. be.
  • the first filter element 31A and the second filter element 32A are arranged side by side on the first main surface 70a of the module substrate 70.
  • the first filter input terminal 311-1 and the first filter output terminal 312-1 are the second filter element 32A rather than the first filter input terminal 311-2 and the first filter output terminal 312-2.
  • the second filter input terminal 321-1 and the second filter output terminal 322-1 are the first filter element 31A rather than the second filter input terminal 321-2 and the second filter output terminal 322-2.
  • the first filter input terminal 311-1, 311-2, the first filter output terminal 312-1, 312-2, and the two ground terminals 313 of the first filter element 31A are modular boards using metal bumps 74, respectively. It is fixed to the first main surface 70a of 70 (see FIG. 11).
  • the second filter input terminal 321-1, 321-2, the second filter output terminal 322-1, 322-2, and the two ground terminals 323 of the second filter element 32A are modular boards using metal bumps 74, respectively. It is fixed to the first main surface 70a of 70 (see FIG. 11).
  • the module board 70 is provided with electronic components 53 to 56.
  • the electronic components 53 and 55 are connected between the filter elements 314-1,314-2 of the first filter element 31 and the antenna switch 6.
  • the electronic components 53 and 55 are, for example, matching circuits for matching the impedance between the filter elements 314-1,314-2 of the first filter element 31 and the antenna element 12.
  • the electronic components 54 and 56 are connected between the filter elements 324-1,324-2 of the second filter element 32 and the antenna switch 6.
  • the electronic components 54 and 56 are, for example, matching circuits for matching the impedance between the filter elements 324-1,324-2 of the second filter element 32 and the antenna element 12.
  • the electronic components 53 to 56 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors.
  • the electronic components 53 to 56 are, for example, surface mount type electronic components.
  • the electronic components 53 to 56 may be formed of a conductor pattern or the like formed on the module substrate 70 instead of the surface mount type electronic components.
  • the illustration of the electronic components 53 to 56 is omitted in FIG.
  • the switch integrated circuit 4A is composed of the semiconductor substrate 40.
  • the switch integrated circuit 4A includes a first switch 41A and a second switch 42A.
  • the first switch 41A and the second switch 42A are integrated on one chip.
  • the semiconductor substrate 40 is, for example, a silicon substrate.
  • the first switch 41A and the second switch 42A are switches (BSSW) for switching the frequency band.
  • the first switch 41A is used to switch the filter element 314 of the first filter element 31A inserted between the first power amplifier 21 and the antenna element 12.
  • the second switch 42A is used to switch the filter element 324 of the second filter element 32A inserted between the second power amplifier 22 and the antenna element 12.
  • the first switch 41A has a first switch input terminal 411 connected to the first power amplifier 21, and a plurality of first switch output terminals 412 connected to a plurality of first filter input terminals 311 of the first filter element 31A, respectively.
  • the first switch input terminal 411 is configured to be connected to any one of the plurality of first switch output terminals 412.
  • the first switch 41A has two first switch output terminals 421-1,421-2 connected to two first filter input terminals 311-1 and 311-2 of the first filter element 31A, respectively.
  • the first switch 41A is configured to connect the first switch input terminal 411 to any one of the two first switch output terminals 421-1, 412-2.
  • the second switch 42A has a second switch input terminal 421 connected to the second power amplifier 22 and a plurality of second switch output terminals 422 connected to a plurality of second filter input terminals 321 of the second filter element 32A, respectively.
  • the second switch input terminal 421 is configured to be connected to any one of the plurality of second switch output terminals 422.
  • the second switch 42A has two second switch output terminals 422-1,422-two connected to the two second filter input terminals 321-1 and 321-2 of the second filter element 32A, respectively.
  • the second switch 42A is configured to connect the second switch input terminal 421 to any one of the two second switch output terminals 422-1,422-2.
  • the switch integrated circuit 4A is arranged on the second main surface 70b of the module substrate 70 so as to overlap the first filter element 31A and the second filter element 32A in the plan view of the module substrate 70. .. More specifically, the switch integrated circuit 4A is arranged so that there is an overlapping region R1 in which the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. That is, the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. In the present embodiment, the first filter input terminal 311-1 and the first switch output terminal 412-2 overlap region R1 in which the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view.
  • the first filter input terminal 311-1 and the first switch output terminal 412-2 overlap with the first switch 41A and the first filter element 31A when the module substrate 70 is viewed in a plan view.
  • the switch integrated circuit 4A is arranged so that there is an overlapping region R2 in which the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. That is, the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view.
  • the second filter input terminal 321-1 and the second switch output terminal 422-2 overlap in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view.
  • the second filter input terminal 321-1 and the second switch output terminal 422-2 overlap with the second switch 42A and the second filter element 32A when the module substrate 70 is viewed in a plan view.
  • the first switch input terminal 411, the first switch output terminal 421-1,412-2, the second switch input terminal 421 and the second switch output terminal 422-1,422- of the switch integrated circuit 4A. 2 is fixed to the second main surface 70b of the module substrate 70, respectively, by using the metal bump 74.
  • the metal bump 74 is, for example, a solder bump, a gold bump, or the like.
  • the first switch output terminals 421-1, 412-2 of the first switch 41A are connected to the first filter input terminals 311-1 and 311-2 of the first filter element 31A of the module board 70. They are connected to each other via the first connection wirings 731-1, 731-2 provided inside.
  • the first filter input terminal 311-1 is located in the overlapping region R1 where the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731-1 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced.
  • the first switch output terminal 412-2 is located in the overlapping region R1 where the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731-2 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced.
  • the second switch output terminals 422-1,422-2 of the second switch 42A are connected to the second filter input terminals 321-1 and 321-2 of the second filter element 32A of the module board 70. They are connected via the second connection wiring 732-1, 732-2 provided inside.
  • the second filter input terminal 321-1 is located in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732-1 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced.
  • the second switch output terminal 422-2 is located in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732-2 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced.
  • the shield portion 80 in FIG. 11 includes a through hole wiring 81, a ground electrode 82, a connecting member 83, and a shield wall 84.
  • the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other.
  • the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground.
  • a shield portion 80 that serves as a ground potential is provided so as to penetrate the entire high frequency circuit 10. According to this configuration, the isolation between the filter elements 31A and 32A can be further improved. Further, the heat generated by the first filter element 31A and the second filter element 32A can be dissipated to the outside by the shield portion 80. As a result, heat dissipation can be improved. In addition, heat transfer between the first filter element 31A and the second filter element 32A can be suppressed.
  • the baseband signal processing circuit 111 outputs, for example, a transmission signal for data transmission to the high frequency signal processing circuit 112.
  • the high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and transfers the signal-processed transmission signal (high-frequency signal) to the high-frequency circuit 10. 1 Output to the power amplifier 21 and the second power amplifier 22.
  • the electric circuit between the first switch input terminal 411 and the first switch output terminal 412-1 of the first switch 41A is closed, and the second switch 42A
  • the electric circuit between the second switch input terminal 421 and the second switch output terminal 422-1 is closed.
  • the first power amplifier 21 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112.
  • the transmission signal amplified by the first power amplifier 21 is transmitted to the antenna element 12 through the first matching circuit 51, the first switch 41A, the filter element 314-1 of the first filter element 31A, and the antenna switch 6. It is radiated from the antenna element 12.
  • the second power amplifier 22 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112.
  • the transmission signal amplified by the second power amplifier 22 is transmitted to the antenna element 12 through the second matching circuit 52, the second switch 42A, the filter element 324-1 of the second filter element 32A, and the antenna switch 6. It is radiated from the antenna element 12.
  • the high frequency circuit 10A includes a metal member 8.
  • the metal member 8 is located between the first filter element 31A and the second filter element 32A when the module substrate 70 is viewed in a plan view, and is connected to the ground. Therefore, the isolation between the filter elements 31A and 32A can be improved. Therefore, even when the first power amplifier 21 and the second power amplifier 22 are used at the same time, it is possible to reduce the possibility that a high frequency signal leaks between the first filter element 31A and the second filter element 32A.
  • the first filter element 31A has a plurality of filter elements 314-1,314-2 having different pass bands and a plurality of first filter elements 314-1,314-2 corresponding to the plurality of filter elements, respectively. It has one filter input terminal 311-1 and 311-2.
  • the first switch 41A has a plurality of first switch input terminals 411 connected to the first power amplifier 21 and a plurality of first filter input terminals 311-1 and 311-2 connected to the first filter element 31A, respectively. It has first switch output terminals 421-1, 412-2, and is configured to connect the first switch input terminal 411 to any one of a plurality of first switch output terminals 421-1, 412-2. To.
  • the first filter input terminal 311-1 and the first switch output terminal 412-1 connected to each other the first filter input terminal 311-1 is located in the overlapping region R1.
  • the first switch output terminal 412-2 is located in the overlapping region R1. According to this configuration, the length of the connection wiring between the first switch 41A and the first filter element 31A can be shortened, and the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced. ..
  • the second filter element 32A has a plurality of filter elements 324-1,324-2 having different pass bands and a plurality of second filter inputs corresponding to the plurality of filter elements 324-1,324-2, respectively. It has terminals 321-1 and 321-2.
  • the second switch 42A has a plurality of second switch input terminals 421 connected to the second power amplifier 22 and a plurality of second filter input terminals 321-1 and 321-2 connected to the second filter element 32A, respectively. It has a second switch output terminal 422-1,422-2, and is configured to connect the second switch input terminal 421 to any one of a plurality of second switch output terminals 422-1,422-2.
  • the second filter input terminal 321-1 and the second switch output terminal 422-1 connected to each other the second filter input terminal 321-1 is located in the overlapping region R2.
  • the second switch output terminal 422-2 is located in the overlapping region R2. According to this configuration, the length of the connection wiring between the second switch 42A and the second filter element 32A can be shortened, and the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced. ..
  • the shield portion 80 includes the through-hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module board 70 and the first main surface 70a of the module board 70.
  • a shield wall 84 that is arranged in and electrically connected to the through-hole wiring 81 and also electrically connected to the metal layer 91, a ground electrode 82 that is a silicon through electrode of the switch integrated circuit 4, and a module substrate 70. It includes a connecting member 83 arranged on the second main surface 70b and connecting the through-hole wiring 81 and the ground electrode 82.
  • the high frequency circuit 10 may include 3 or more power amplifiers and 3 or more filter elements. In short, the number of power amplifiers and the number of filter elements are not particularly limited as long as they are 2 or more. In one modification, the high frequency circuit 10 does not have to include the switch integrated circuit 4. In one modification, the high frequency circuit 10 may not include the first matching circuit 51, the second matching circuit 52, and the electronic components 53, 54. This point is the same in the high frequency circuit 10A.
  • the structures of the first filter element 31 and the second filter element 32 are not limited to the configuration examples of the first to fourth embodiments.
  • the arrangement of the first filter input terminal 311, the first filter output terminal 312, and the ground terminal 313 of the first filter element 31 is not limited to the illustrated example. This also applies to the second filter element 32.
  • the structures of the first filter element 31A and the second filter element 32A are not limited to the configuration example of the fifth embodiment.
  • the first filter element 31 may indirectly contact the metal layer 91 instead of directly contacting the metal layer 91.
  • the reason why the first filter element 31 is brought into direct contact with the metal layer 91 is to dissipate heat from the first filter element 31, so that the first filter element 31 can dissipate heat.
  • the filter element 31 may be indirectly brought into contact with the metal layer 91.
  • the first filter element 31 may be in contact with the metal layer 91 via a heat transfer member such as a metal plate.
  • the first filter element 31 may be in direct or indirect contact with the metal layer 91 and thermally coupled.
  • the first filter element 31 may not be in direct or indirect contact with the metal layer 91, and may not be thermally coupled to the metal layer 91. This point is the same for the second filter element 32.
  • the structure of the switch integrated circuit 4 is not limited to the configuration examples of the first to fourth embodiments.
  • the arrangement of the first switch input terminal 411, the first switch output terminal 412, the second switch input terminal 421, and the second switch output terminal 422 is not limited to the illustrated example.
  • the structure of the switch integrated circuit 4A is not limited to the configuration example of the fifth embodiment.
  • the first filter input terminal 311 is located in the overlapping region R1.
  • the first switch output terminal 412 may be located in the overlapping region R1, or the first filter input terminal 311 and the first switch output terminal 412 may be located in the overlapping region R1. That is, at least one of the first filter input terminal 311 and the first switch output terminal 412 may overlap with the first switch 41 and the first filter element 31.
  • the switch integrated circuit 4 does not necessarily have to be arranged so that the overlapping region R1 exists.
  • the second filter input terminal 321 is located in the overlapping region R2.
  • the second switch output terminal 422 may be located in the overlapping region R2, or the second filter input terminal 321 and the second switch output terminal 422 may be located in the overlapping region R2. That is, at least one of the second filter input terminal 321 and the second switch output terminal 422 may overlap with the second switch 42 and the second filter element 32.
  • the switch integrated circuit 4 does not necessarily have to be arranged so that the overlapping region R2 exists.
  • the first filter input terminal 311-1 is located in the overlapping region R1.
  • the first switch output terminal 412-1 may be located in the overlapping region R1, and the first filter input terminal 311-1 and the first switch output terminal 412-1 may be located in the overlapping region R1. May be good.
  • the first switch output terminal 412-2 is located in the overlapping region R1.
  • the first filter input terminal 311-2 may be located in the overlapping region R1, and the first filter input terminal 311-2 and the first switch output terminal 412-2 may be located in the overlapping region R1. May be good.
  • the second filter input terminal 321-1 is located in the overlapping region R2.
  • the second switch output terminal 422-1 may be located in the overlapping region R2, or the second filter input terminal 321-1 and the second switch output terminal 422-1 may be located in the overlapping region R2. May be good.
  • the second switch output terminal 422-2 is located in the overlapping region R2.
  • the second filter input terminal 321-2 may be located in the overlapping region R2, or the second filter input terminal 321-2 and the second switch output terminal 422-2 may be located in the overlapping region R2. May be good.
  • At least one of the second switch output terminal 422 may overlap with the second switch 42A and the second filter element 32A when the module substrate 70 is viewed in a plan view.
  • the shield portion 80 does not have to be located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
  • each of the through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. It does not have to be.
  • the shield portion 80 is located at least one of the first filter input terminal 311 and the second filter input terminal 321 and the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. You just have to do it.
  • the shield portion 80 may be composed of a row of a plurality of components when the module substrate 70 is viewed in a plan view.
  • the through-hole wiring 81 may be configured by a row of a plurality of through-hole wiring elements.
  • the ground electrode 82 may be composed of a plurality of rows of ground electrode elements.
  • the connecting member 83 may be composed of a plurality of rows of connecting member elements.
  • the shield wall 84 may be composed of a plurality of rows of shield wall elements.
  • the shield wall 84 may be made of a metal block such as copper, a shield member, a wire shield, or the like.
  • the through-hole wiring 81 does not necessarily have to completely penetrate the module board 70 and is not exposed to at least one of the first main surface 70a and the second main surface 70b of the module board 70. May be good. That is, the through hole wiring 81 is not limited to the through via, and may be an interstitial via, a blind via, or a verid via.
  • the height of the shield wall 84 from the first main surface 70a may be less than the height of the first filter element 31 from the first main surface 70a, or the height of the second filter element 32 from the first main surface 70a. It may be less than the height from one main surface 70a.
  • the shield wall 84 may be indirectly contacted and connected to the metal layer 91.
  • the shield wall 84 may be contacted and connected to the metal layer 91 via a conductive member.
  • the shield wall 84 may be electrically connected to the metal layer 91, regardless of whether it is in direct contact with or indirectly in contact with the metal layer 91.
  • the shield wall 84 may not be in direct or indirect contact with the metal layer 91, and may not be connected to the metal layer 91.
  • the metal member 8 does not have to include all of the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84, and the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield. It may include at least one of the walls 84.
  • the metal member 8 is composed of only the shield portion 80, but the present invention is not limited to this, and a portion different from the shield portion 80 may be included.
  • the metal member 8 may include a portion extending from the shield wall 84 and connected to the ground pattern of the first filter element 31 and the second filter element 32.
  • the high frequency circuit 10 may be capable of supporting carrier aggregation (downlink carrier aggregation) in which a plurality of frequency bands are used simultaneously in the downlink.
  • the high frequency circuit may be connected between the signal processing circuit 11 and the antenna element 12 to transmit a high frequency signal from the antenna element 12 to the signal processing circuit 11.
  • the high frequency circuit may include a first low noise amplifier and a second low noise amplifier, a first filter element 31 and a second filter element 32, a module substrate 70, and a metal member 8.
  • the first low noise amplifier and the second low noise amplifier are connected to the signal processing circuit 11.
  • the first filter element 31 and the second filter element 32 are connected to the first low noise amplifier and the second low noise amplifier, respectively.
  • the module substrate 70 has a first main surface 70a and a second main surface 70b on opposite sides of each other.
  • the first filter element 31, the second filter element 32, the first low noise amplifier, and the second low noise amplifier are arranged on the module substrate 70.
  • the metal member 8 is connected to the ground.
  • the first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70.
  • the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
  • the first aspect is a high frequency circuit (10; 10A), wherein a first power amplifier (21) and a second power amplifier (22) that can be used simultaneously, and the first power amplifier (21) and the second power amplifier (21) are used.
  • the first filter element (31; 31A) and the second filter element (32; 32A) connected to the power amplifier (22), respectively, and the first main surface (70a) and the second main surface (70b) facing each other.
  • the module board (31; 31A), the second filter element (32; 32A), the first power amplifier (21), and the second power amplifier (22) are arranged. 70) and a metal member (8) connected to the ground.
  • the first filter element (31; 31A) and the second filter element (32; 32A) are arranged on the first main surface (70a) of the module substrate (70).
  • the metal member (8) is located between the first filter element (31; 31A) and the second filter element (32; 32A) when the module substrate (70) is viewed in a plan view. According to this aspect, the isolation between the filters (31, 32; 31A, 32A) electrically connected to different power amplifiers (21, 22) can be improved.
  • the second aspect is a high frequency circuit (10; 10A) based on the first aspect.
  • the metal member (8) has a through-hole wiring (81) formed between the first main surface (70a) and the second main surface (70b) of the module substrate (70). include.
  • the isolation between the filters (31, 32; 31A, 32A) electrically connected to different power amplifiers (21, 22) can be improved by a simple configuration.
  • the third aspect is a high frequency circuit (10; 10A) based on the first or second aspect.
  • the metal member (8) includes a shield wall (84) disposed on a first main surface (70a) of the module substrate (70). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
  • the fourth aspect is a high frequency circuit (10; 10A) based on the third aspect.
  • the height of the shield wall (84) from the first main surface (70a) is the height of the first filter element (31; 31A) from the first main surface (70a).
  • the fifth aspect is a high frequency circuit (10; 10A) based on the third or fourth aspect.
  • the high frequency circuit (10; 10A) includes a resin member (75) that seals the first filter element (31; 31A) and the second filter element (32; 32A), and the first filter element (32; 32A).
  • the resin member (75) is located on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the one filter element (31; 31A) and the second filter element (32; 32A).
  • a metal layer (91) arranged on the surface and connected to the ground.
  • the shield wall (84) is electrically connected to the metal layer (91). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
  • the sixth aspect is a high frequency circuit (10; 10A) based on the fifth aspect.
  • the first power amplifier (21) corresponds to the first power class.
  • the second power amplifier (22) corresponds to the second power class.
  • the maximum output power of the first power class is larger than the maximum output power of the second power class.
  • the first filter element (31; 31A) comes into contact with the metal layer (91). According to this aspect, heat dissipation can be improved.
  • the second filter element (32; 32A) may further come into contact with the metal layer (91). This makes it possible to further improve the heat dissipation.
  • the seventh aspect is a high frequency circuit (10; 10A) based on any one of the first to fourth aspects.
  • the high frequency circuit (10; 10A) includes a resin member (75) that seals the first filter element (31; 31A) and the second filter element (32; 32A), and the second filter element (32; 32A).
  • the resin member (75) is located on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the one filter element (31; 31A) and the second filter element (32; 32A).
  • Each of the first filter element (31; 31A) and the second filter element (32; 32A) comes into contact with the metal layer (91).
  • the eighth aspect is a high frequency circuit (10; 10A) based on any one of the first to seventh aspects.
  • the first filter element (31; 31A) and the second filter element (32; 32A) are connected to the first power amplifier (21) and the second power amplifier (22), respectively. It has a first filter input terminal (311) and a second filter input terminal (321), and a first filter output terminal (312) and a second filter output terminal (322) connected to the antenna element (12), respectively. ..
  • the isolation between the filters (31, 32; 31A, 32A) connected to different power amplifiers (21, 22) can be improved.
  • the ninth aspect is a high frequency circuit (10; 10A) based on the eighth aspect.
  • the metal member (8) is located between the first filter input terminal (311) and the second filter input terminal (321) and the second filter when the module substrate (70) is viewed in a plan view. It is located at least one of the 1 filter output terminal (312) and the 2nd filter output terminal (322). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
  • the tenth aspect is a high frequency circuit (10; 10A) based on the eighth or ninth aspect.
  • the high frequency circuit (10; 10A) further comprises a switch integrated circuit (4; 4A) arranged on the module substrate (70).
  • the switch integrated circuit (4; 4A) includes a first filter input terminal (311) and a second filter input terminal (321) of the first filter element (31; 31A) and the second filter element (32; 32A). It has a first switch (41; 41A) and a second switch (42; 42A) inserted between the first power amplifier (21) and the second power amplifier (22), respectively.
  • the filters (31, 32; 31A, 32A) to be used can be switched, and various communication methods can be supported.
  • the eleventh aspect is a high frequency circuit (10; 10A) based on the tenth aspect.
  • the switch integrated circuit (4; 4A) is arranged on the second main surface (70b) of the module substrate (70). According to this aspect, miniaturization can be achieved.
  • the twelfth aspect is a high frequency circuit (10; 10A) based on the eleventh aspect.
  • the metal member (8) is arranged on a ground electrode (82) formed in the switch integrated circuit (4; 4A) and a second main surface (70b) of the module substrate (70). It includes a connecting member (83) that is connected to the ground electrode (82). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
  • the thirteenth aspect is a high frequency circuit (10; 10A) based on the twelfth aspect.
  • the ground electrode (82) is a through silicon via of the switch integrated circuit (4; 4A). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
  • the fourteenth aspect is a high frequency circuit (10; 10A) based on any one of the tenth to thirteenth aspects.
  • the first switch (41; 41A) and the first filter element (31; 31A) overlap when the module substrate (70) is viewed in a plan view.
  • the length of the connection wiring between the first switch (41; 41A) and the first filter element (31; 31A) can be shortened, and the first switch (41; 41A) and the first filter element (1st filter element) can be shortened.
  • 31; 31A) can reduce the loss of high frequency signals.
  • the fifteenth aspect is a high frequency circuit (10) based on the fourteenth aspect.
  • the first switch (41) has a first switch input terminal (411) connected to the first power amplifier (21) and a first filter input of the first filter element (31). It has a first switch output terminal (412) connected to the terminal (311). At least one of the first filter input terminal (311) and the first switch output terminal (412) is the first switch (41) and the first filter element when the module substrate (70) is viewed in a plan view. It overlaps with (31). According to this aspect, the length of the connection wiring between the first switch (41) and the first filter element (31) can be shortened, and the length between the first switch (41) and the first filter element (31) can be shortened. High frequency signal loss can be reduced.
  • the sixteenth aspect is a high frequency circuit (10; 10A) based on any one of the tenth to fifteenth aspects.
  • the second switch (42; 42A) and the second filter element (32; 32A) overlap when the module substrate (70) is viewed in a plan view.
  • the length of the connection wiring between the second switch (42; 42A) and the second filter element (32; 32A) can be shortened, and the length of the connection wiring between the second switch (42; 42A) and the second filter element (32; 32A) can be shortened.
  • 32; 32A) can reduce the loss of high frequency signals.
  • the 17th aspect is a high frequency circuit (10) based on the 16th aspect.
  • the second switch (42) has a second switch input terminal (421) connected to the second power amplifier (22) and a second filter input of the second filter element (32). It has a second switch output terminal (422) connected to the terminal (321). At least one of the second filter input terminal (321) and the second switch output terminal (422) is the second switch (42) and the second filter element when the module substrate (70) is viewed in a plan view. It overlaps with (32). According to this aspect, the length of the connection wiring between the second switch (42) and the second filter element (32) can be shortened, and the length between the second switch (42) and the second filter element (32) can be shortened. High frequency signal loss can be reduced.
  • the eighteenth aspect is a high frequency circuit (10A) based on the fourteenth aspect.
  • the first filter element (31A) corresponds to a plurality of filter elements (314) having different pass bands and a plurality of filter elements (314) of the first filter element (31A). It has the first filter input terminal (311) of the above.
  • the first switch (41A) has a first switch input terminal (411) connected to the first power amplifier (21) and a plurality of first filter input terminals (311) of the first filter element (31A). It has a plurality of first switch output terminals (412) connected to each of the above, and the first switch input terminal (411) is connected to any one of the plurality of first switch output terminals (412). It is composed of.
  • the 19th aspect is a high frequency circuit (10A) based on the 14th or 18th aspect.
  • the second filter element (32A) corresponds to a plurality of filter elements (324) having different pass bands and a plurality of filter elements (324) of the second filter element (32A). It has the second filter input terminal (321) of the above.
  • the second switch (42A) includes a second switch input terminal (421) connected to the second power amplifier (22) and a plurality of second filter input terminals (321) of the second filter element (32A). It has a plurality of second switch output terminals (422) connected to each of the above, and the second switch input terminal (421) is connected to any one of the plurality of second switch output terminals (422). It is composed of.
  • the twentieth aspect is a high frequency circuit (10; 10A) based on the first aspect.
  • the high frequency circuit (10; 10A) comprises a resin member (75), a metal layer (91), and a switch integrated circuit (4; 4A).
  • the resin member (75) seals the first filter element (31; 31A) and the second filter element (32; 32A).
  • the metal layer (91) is on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the first filter element (31; 31A) and the second filter element (32; 32A). It is arranged on the resin member (75) so as to be located and connected to the ground.
  • the switch integrated circuit (4; 4A) includes a first filter input terminal (311) and a second filter input terminal (321) of the first filter element (31; 31A) and the second filter element (32; 32A). It has a first switch (41; 41A) and a second switch (42; 42A) inserted between the first power amplifier (21) and the second power amplifier (22), respectively.
  • the switch integrated circuit (4; 4A) is arranged on the second main surface (70b) of the module board (70).
  • the metal member (8) includes a through-hole wiring (81) formed between the first main surface (70a) and the second main surface (70b) of the module substrate (70) and the module substrate (70).
  • the ground electrode (82), which is a silicon through electrode of the integrated circuit (4; 4A), and the through hole wiring (81) and the ground electrode (81) arranged on the second main surface (70b) of the module substrate (70). Includes a connecting member (83) that connects to and to 82). According to this aspect, the isolation between the filters (31, 32) can be further improved.
  • the 21st aspect is a high frequency circuit (10; 10A) based on any one of the 1st to 20th aspects.
  • the first power amplifier (21) amplifies the first transmission signal in the first frequency band.
  • the second power amplifier (22) amplifies the second transmission signal in the second frequency band different from the first frequency band.
  • the first filter element (31; 31A) passes a signal in the first pass band including the first frequency band.
  • the second filter element (32; 32A) passes a signal in a second pass band including the second frequency band and different from the first pass band. According to this aspect, it is possible to support carrier aggregation (two uplink carrier aggregation) in which two frequency bands are used simultaneously in the uplink.
  • This disclosure is applicable to antenna devices. Specifically, the present disclosure is applicable to an antenna device having a core arranged inside a winding.

Abstract

A high frequency circuit (10) is provided with a first power amplifier (21), a second power amplifier (22), a first filter element (31), a second filter element (32), a module substrate (70), and a metal member (8). The first filter element (31) and the second filter element (32) are respectively connected to the first power amplifier (21) and the second power amplifier (22). The first filter element (31) and the second filter element (32) are disposed on a first main surface (70a) of the module substrate (70). The metal member (8) is connected to ground. The metal member (8) is positioned between the first filter element (31) and the second filter element (32) in a plan view of the module substrate (70).

Description

高周波回路High frequency circuit
 本開示は、一般に、高周波回路に関する。本開示は、より詳細には、複数の電力増幅器及び複数のフィルタ素子を備える高周波回路に関する。 This disclosure generally relates to high frequency circuits. More specifically, the present disclosure relates to a high frequency circuit including a plurality of power amplifiers and a plurality of filter elements.
 特許文献1は、周波数の異なる複数のバンドの電波を同時に使用するキャリアアグリゲーションのための高周波回路部を開示する。特許文献1の高周波回路部は、第1バンド用の送信回路と、第2バンド用の送信回路とを備える。第1バンド用の送信回路と第2バンド用の送信回路の各々は、高周波電力増幅器、アンテナ共用器及びスイッチを備える。アンテナ共用器は、送信信号を通過させるローパスフィルタと受信信号を通過させるハイパスフィルタとで構成されるフィルタである。 Patent Document 1 discloses a high-frequency circuit unit for carrier aggregation that simultaneously uses radio waves of a plurality of bands having different frequencies. The high frequency circuit unit of Patent Document 1 includes a transmission circuit for the first band and a transmission circuit for the second band. Each of the transmission circuit for the first band and the transmission circuit for the second band includes a high frequency power amplifier, an antenna duplexer, and a switch. The antenna duplexer is a filter composed of a low-pass filter that passes a transmission signal and a high-pass filter that passes a reception signal.
国際公開第2016/117482号International Publication No. 2016/11482
 特許文献1では、第1バンド用の送信回路の高周波電力増幅器と第2バンド用の送信回路の高周波電力増幅器との両方を同時に使用した場合に、第1バンド用の送信回路のアンテナ共用器(フィルタ素子)と第2バンド用の送信回路のアンテナ共用器(フィルタ素子)との間で高周波信号の漏れが生じる場合がある。つまり、異なる電力増幅器を同時に使用した場合に、異なる電力増幅器にそれぞれ接続されるフィルタ素子間で高周波信号の漏れが生じる場合がある。 In Patent Document 1, when both the high frequency power amplifier of the transmission circuit for the first band and the high frequency power amplifier of the transmission circuit for the second band are used at the same time, the antenna duplexer of the transmission circuit for the first band ( High frequency signals may leak between the filter element) and the antenna duplexer (filter element) of the transmission circuit for the second band. That is, when different power amplifiers are used at the same time, high frequency signal leakage may occur between the filter elements connected to the different power amplifiers.
 本開示は、異なる電力増幅器にそれぞれ接続されるフィルタ素子間のアイソレーションを向上できる高周波回路を提供する。 The present disclosure provides a high frequency circuit capable of improving isolation between filter elements connected to different power amplifiers.
 本開示の一態様は、高周波回路であって、同時に使用可能な第1電力増幅器及び第2電力増幅器と、第1電力増幅器及び第2電力増幅器にそれぞれ接続される第1フィルタ素子及び第2フィルタ素子と、互いに背向する第1主面及び第2主面を有し、第1フィルタ素子、第2フィルタ素子、第1電力増幅器及び第2電力増幅器が配置されるモジュール基板と、グランドに接続される金属部材とを備える。第1フィルタ素子及び第2フィルタ素子は、モジュール基板の第1主面に配置される。金属部材は、モジュール基板を平面視したときに第1フィルタ素子及び第2フィルタ素子間に位置する。 One aspect of the present disclosure is a high frequency circuit, the first power amplifier and the second power amplifier that can be used simultaneously, and the first filter element and the second filter connected to the first power amplifier and the second power amplifier, respectively. The element, a module board having a first main surface and a second main surface facing each other and in which a first filter element, a second filter element, a first power amplifier, and a second power amplifier are arranged, is connected to the ground. It is provided with a metal member to be used. The first filter element and the second filter element are arranged on the first main surface of the module substrate. The metal member is located between the first filter element and the second filter element when the module substrate is viewed in a plan view.
 本開示の態様は、異なる電力増幅器にそれぞれ接続されるフィルタ素子間のアイソレーションを向上できる。 Aspects of the present disclosure can improve isolation between filter elements connected to different power amplifiers.
実施の形態1にかかる高周波回路を含む通信装置の構成例の回路図Circuit diagram of a configuration example of a communication device including a high frequency circuit according to the first embodiment 図1の高周波回路の構成例の平面図Top view of the configuration example of the high frequency circuit of FIG. 図2のA-A線断面図FIG. 2 is a sectional view taken along line AA. 実施の形態2にかかる高周波回路の構成例の平面図Top view of the configuration example of the high frequency circuit according to the second embodiment 図4のB-B線断面図BB line sectional view of FIG. 実施の形態3にかかる高周波回路の構成例の断面図Sectional drawing of the structural example of the high frequency circuit which concerns on Embodiment 3. 実施の形態4にかかる高周波回路の構成例の断面図Sectional drawing of the structural example of the high frequency circuit which concerns on Embodiment 4. 実施の形態4にかかる高周波回路の別の構成例の断面図Cross-sectional view of another configuration example of the high frequency circuit according to the fourth embodiment. 実施の形態5にかかる高周波回路を含む通信装置の構成例の回路図Circuit diagram of a configuration example of a communication device including a high frequency circuit according to the fifth embodiment 図9の高周波回路の構成例の平面図Plan view of the configuration example of the high frequency circuit of FIG. 図10のC-C線断面図FIG. 10 is a sectional view taken along line CC.
 以下、適宜図面を参照しながら、実施の形態を詳細に説明する。但し、必要以上に詳細な説明は省略する場合がある。例えば、既によく知られた事項の詳細説明や実質的に同一の構成に対する重複説明を省略する場合がある。これは、以下の説明が不必要に冗長になるのを避け、当業者の理解を容易にするためである。なお、発明者(ら)は、当業者が本開示を十分に理解するために添付図面および以下の説明を提供するのであって、これらによって特許請求の範囲に記載の主題を限定することを意図するものではない。 Hereinafter, embodiments will be described in detail with reference to the drawings as appropriate. However, more detailed explanation than necessary may be omitted. For example, detailed explanations of already well-known matters and duplicate explanations for substantially the same configuration may be omitted. This is to avoid unnecessary redundancy of the following description and to facilitate the understanding of those skilled in the art. It should be noted that the inventor (or others) intends to limit the subject matter described in the claims by those skilled in the art by providing the accompanying drawings and the following description in order to fully understand the present disclosure. It's not something to do.
 上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。以下の実施の形態において説明する各図は、模式的な図であり、各図中の各構成要素の大きさ及び厚さそれぞれの比が、必ずしも実際の寸法比を反映しているとは限らない。また、各要素の寸法比率は図面に図示された比率に限られるものではない。 Unless otherwise specified, the positional relationship such as up, down, left, and right shall be based on the positional relationship shown in the drawing. Each figure described in the following embodiment is a schematic view, and the ratio of the size and the thickness of each component in each figure does not necessarily reflect the actual dimensional ratio. do not have. Further, the dimensional ratio of each element is not limited to the ratio shown in the drawings.
 以下の実施の形態において、「AがBとCとの間に配置される」、「AがBとCとの間に位置する」とは、B内の任意の点とC内の任意の点とを結ぶ複数の線分のうちの少なくとも1つがAを通ることを意味する。また、「A及びBが、C及びDにそれぞれ接続される」及びこれに類する表現は、「AがCに接続され、BがDに接続される」ことを意味しており、「A及びBがCに接続され、A及びBがDに接続される」ことを意味しているわけではない。また、「複数のAが、複数のCにそれぞれ接続される」及びこれに類する表現は、「AとCとが一対一対応で接続される」ことを意味している。 In the following embodiments, "A is placed between B and C" and "A is located between B and C" mean any point in B and any point in C. It means that at least one of the plurality of line segments connecting the points passes through A. Further, "A and B are connected to C and D, respectively" and similar expressions mean "A is connected to C and B is connected to D", and "A and B are connected to D". It does not mean that B is connected to C and A and B are connected to D. " Further, "a plurality of A's are connected to a plurality of C's respectively" and similar expressions mean that "A and C are connected in a one-to-one correspondence".
 本開示の回路構成において、「接続される」とは、接続端子及び/又は配線導体で直接接続される場合だけでなく、他の回路部品を介して電気的に接続される場合も含む。また、「A及びBの間に接続される」とは、A及びBの間でA及びBの両方に接続されることを意味する。 In the circuit configuration of the present disclosure, "connected" includes not only the case of being directly connected by a connection terminal and / or a wiring conductor, but also the case of being electrically connected via other circuit components. Further, "connected between A and B" means that both A and B are connected between A and B.
(実施の形態)
 [1.実施の形態1]
 [1-1.概要]
 図1は、実施の形態1にかかる高周波回路10を含む通信装置1の構成例の回路図である。
(Embodiment)
[1. Embodiment 1]
[1-1. Overview]
FIG. 1 is a circuit diagram of a configuration example of a communication device 1 including a high frequency circuit 10 according to the first embodiment.
 高周波回路10は、例えば、マルチバンド対応及び2つの周波数帯域の同時使用(例えば、キャリアアグリゲーション)対応の移動体通信機(例えば、携帯電話等)の高周波フロントエンド回路に利用される。高周波回路10は、例えば、2G(第2世代移動通信)規格のミッドバンドと4G(第4世代移動通信)規格のローバンドとのキャリアアグリゲーションに対応可能であるが、これに限らない。例えば、高周波回路10は、2G規格のミッドバンドと5G(第5世代移動通信)規格のローバンドとのデュアルコネクティビティに対応可能であってもよい。2G規格は、例えば、GSM(登録商標)規格(GSM:Global System for Mobile Communications)である。4G規格は、例えば、3GPP LTE規格(LTE:Long Term Evolution)である。5G規格は、例えば、5G NR(New Radio)である。 The high frequency circuit 10 is used, for example, in a high frequency front-end circuit of a mobile communication device (for example, a mobile phone or the like) that supports multi-band and simultaneous use of two frequency bands (for example, carrier aggregation). The high frequency circuit 10 can, for example, support carrier aggregation between a midband of a 2G (second generation mobile communication) standard and a low band of a 4G (fourth generation mobile communication) standard, but is not limited to this. For example, the high frequency circuit 10 may be capable of supporting dual connectivity between a 2G standard midband and a 5G (fifth generation mobile communication) standard lowband. The 2G standard is, for example, a GSM (registered trademark) standard (GSM: Global System for Mobile Communications). The 4G standard is, for example, a 3GPP LTE standard (LTE: LongTermEvolution). The 5G standard is, for example, 5G NR (New Radio).
 通信装置1は、アップリンク(Uplink)で複数(実施の形態1では2つ)の周波数帯域を同時に用いるキャリアアグリゲーション(アップリンク・キャリアアグリゲーション)に対応可能である。通信装置1は、キャリアアグリゲーションではなく、上述のデュアルコネクティビティに対応可能であってもよい。 The communication device 1 can support carrier aggregation (uplink carrier aggregation) in which a plurality of frequency bands (two in the first embodiment) are used simultaneously in the uplink. The communication device 1 may be capable of supporting the above-mentioned dual connectivity instead of carrier aggregation.
 図1に示す通信装置1は、高周波回路10と、信号処理回路11と、アンテナ素子12とを備える。 The communication device 1 shown in FIG. 1 includes a high frequency circuit 10, a signal processing circuit 11, and an antenna element 12.
 高周波回路10は、信号処理回路11とアンテナ素子12との間に接続される。高周波回路10は、信号処理回路11からの高周波信号をアンテナ素子12に伝達する。 The high frequency circuit 10 is connected between the signal processing circuit 11 and the antenna element 12. The high frequency circuit 10 transmits the high frequency signal from the signal processing circuit 11 to the antenna element 12.
 図2は高周波回路10の構成例の平面図であり、図3は図2のA-A線断面図である。図2に示すように、高周波回路10は、第1電力増幅器21と、第2電力増幅器22と、第1フィルタ素子31と、第2フィルタ素子32と、モジュール基板70と、金属部材8とを備える。第1電力増幅器21及び第2電力増幅器22は、同時に使用可能である。第1フィルタ素子31及び第2フィルタ素子32は、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される。図3に示すように、モジュール基板70は、互いに背向する第1主面70a及び第2主面70bを有する。第1フィルタ素子31、第2フィルタ素子32、第1電力増幅器21及び第2電力増幅器22は、モジュール基板70に配置される。金属部材8は、グランドに接続される。第1フィルタ素子31及び第2フィルタ素子32は、モジュール基板70の第1主面70aに配置される。金属部材8は、図2に示すように、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置する。 FIG. 2 is a plan view of a configuration example of the high frequency circuit 10, and FIG. 3 is a sectional view taken along line AA of FIG. As shown in FIG. 2, the high-frequency circuit 10 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a module substrate 70, and a metal member 8. Be prepared. The first power amplifier 21 and the second power amplifier 22 can be used at the same time. The first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively. As shown in FIG. 3, the module substrate 70 has a first main surface 70a and a second main surface 70b facing each other. The first filter element 31, the second filter element 32, the first power amplifier 21, and the second power amplifier 22 are arranged on the module board 70. The metal member 8 is connected to the ground. The first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
 このように、高周波回路10は、グランドに接続される金属部材8を備える。金属部材8は、図2に示すように、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置する。そのため、本実施の形態の高周波回路10は、異なる電力増幅器(第1電力増幅器21及び第2電力増幅器22)にそれぞれ接続されるフィルタ(第1フィルタ素子31及び第2フィルタ素子32)間のアイソレーションを向上できる。特に、異なる電力増幅器(第1電力増幅器21及び第2電力増幅器22)を同時に使用した場合に、フィルタ(第1フィルタ素子31及び第2フィルタ素子32)間での高周波信号の漏れが生じる可能性を低減できる。 As described above, the high frequency circuit 10 includes the metal member 8 connected to the ground. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. Therefore, in the high frequency circuit 10 of the present embodiment, the isolation between the filters (first filter element 31 and second filter element 32) connected to different power amplifiers (first power amplifier 21 and second power amplifier 22), respectively. The ratio can be improved. In particular, when different power amplifiers (first power amplifier 21 and second power amplifier 22) are used at the same time, high frequency signal leakage may occur between the filters (first filter element 31 and second filter element 32). Can be reduced.
 [1-2.詳細]
 以下、本実施の形態にかかる通信装置1について図1~図3を参照して説明する。図1の通信装置1は、高周波回路10と、信号処理回路11と、アンテナ素子12とを備える。
[1-2. detail]
Hereinafter, the communication device 1 according to the present embodiment will be described with reference to FIGS. 1 to 3. The communication device 1 of FIG. 1 includes a high frequency circuit 10, a signal processing circuit 11, and an antenna element 12.
 高周波回路10は、信号処理回路11とアンテナ素子12との間に接続される。高周波回路10は、信号処理回路11からの高周波信号をアンテナ素子12に伝達する。 The high frequency circuit 10 is connected between the signal processing circuit 11 and the antenna element 12. The high frequency circuit 10 transmits the high frequency signal from the signal processing circuit 11 to the antenna element 12.
 図1に示すように、高周波回路10は、第1電力増幅器21と、第2電力増幅器22と、第1フィルタ素子31と、第2フィルタ素子32と、スイッチ集積回路4と、第1整合回路51と、第2整合回路52と、アンテナスイッチ6とを備える。また、図2及び図3に示すように、高周波回路10は、モジュール基板70と、金属部材8と、保護部材9とを備える。 As shown in FIG. 1, the high-frequency circuit 10 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a switch integrated circuit 4, and a first matching circuit. A 51, a second matching circuit 52, and an antenna switch 6 are provided. Further, as shown in FIGS. 2 and 3, the high frequency circuit 10 includes a module substrate 70, a metal member 8, and a protective member 9.
 図1に示すように、第1電力増幅器21及び第2電力増幅器22は、並列的に信号処理回路11に接続される。第1電力増幅器21及び第2電力増幅器22は、同時に使用可能である。図1に示すように、高周波回路10では、信号処理回路11とアンテナ素子12との間に、第1電力増幅器21及び第1フィルタ素子31を通る送信経路と、第2電力増幅器22及び第2フィルタ素子32を通る送信経路との、2つの送信経路を有する。よって、第1電力増幅器21及び第2電力増幅器22が同時に使用可能であるとは、これら2つの送信経路を同時に使用して2つの高周波信号を同時に送信可能であることを意味する。これによって、高周波回路10は、キャリアアグリゲーション又はデュアルコネクティビティに対応可能である。 As shown in FIG. 1, the first power amplifier 21 and the second power amplifier 22 are connected to the signal processing circuit 11 in parallel. The first power amplifier 21 and the second power amplifier 22 can be used at the same time. As shown in FIG. 1, in the high frequency circuit 10, a transmission path passing through a first power amplifier 21 and a first filter element 31 and a second power amplifier 22 and a second power amplifier 22 and a second power amplifier 22 are provided between the signal processing circuit 11 and the antenna element 12. It has two transmission paths, one is a transmission path through the filter element 32. Therefore, the fact that the first power amplifier 21 and the second power amplifier 22 can be used at the same time means that two high-frequency signals can be transmitted at the same time by using these two transmission paths at the same time. Thereby, the high frequency circuit 10 can support carrier aggregation or dual connectivity.
 第1電力増幅器21は、入力端子及び出力端子を有する。第1電力増幅器21は、入力端子から入力された第1周波数帯域の第1送信信号を増幅し、増幅された第1送信信号を出力端子から出力する。第1電力増幅器21の入力端子は、信号処理回路11に接続される。第1電力増幅器21は、第1周波数帯域の高周波信号(第1送信信号)を増幅することができる。第1周波数帯域は、例えば、5G規格におけるNRバンド(NR operating band)のn77/n78を含む。n77のアップリンク周波数帯域(Uplink frequency range)及びダウンリンク周波数帯域(Downlink frequency range)の各々は、3300MHz~4200MHzである。n78のアップリンク周波数帯域及びダウンリンク周波数帯域の各々は、3300MHz-3800MHzである。また、第1周波数帯域は、3GPP LTE(Long Term Evolution)規格のバンド42(B42)/バンド43(B43)を含んでいる。バンド42のダウンリンク周波数帯域は、3400MHz~3600MHzである。バンド43のダウンリンク周波数帯域は、3600MHz~3800MHzである。 The first power amplifier 21 has an input terminal and an output terminal. The first power amplifier 21 amplifies the first transmission signal in the first frequency band input from the input terminal, and outputs the amplified first transmission signal from the output terminal. The input terminal of the first power amplifier 21 is connected to the signal processing circuit 11. The first power amplifier 21 can amplify a high frequency signal (first transmission signal) in the first frequency band. The first frequency band includes, for example, n77 / n78 of the NR band (NR operating band) in the 5G standard. Each of the uplink frequency band (Uplink frequency range) and the downlink frequency band (Downlink frequency range) of n77 is 3300 MHz to 4200 MHz. Each of the uplink frequency band and the downlink frequency band of n78 is 3300 MHz-3800 MHz. Further, the first frequency band includes a band 42 (B42) / band 43 (B43) of the 3GPP LTE (Long Term Evolution) standard. The downlink frequency band of the band 42 is 3400 MHz to 3600 MHz. The downlink frequency band of the band 43 is 3600 MHz to 3800 MHz.
 第2電力増幅器22は、入力端子及び出力端子を有する。第2電力増幅器22は、入力端子から入力された第2周波数帯域の第2送信信号を増幅し、増幅された第2送信信号を出力端子から出力する。第2電力増幅器22の入力端子は、信号処理回路11に接続される。第2電力増幅器22は、第2周波数帯域の高周波信号(第2送信信号)を増幅することができる。第2周波数帯域は、第1周波数帯域とは異なる周波数帯域である。つまり、第2電力増幅器22は、第1周波数帯域と異なる第2周波数帯域の第2送信信号を増幅する。例えば、第2周波数帯域は、第1周波数帯域よりも高周波数側にある。第2周波数帯域は、例えば、5G規格におけるNRバンドのn79を含む。n79のアップリンク周波数帯域及びダウンリンク周波数帯域の各々は、4400MHz~5000MHzである。 The second power amplifier 22 has an input terminal and an output terminal. The second power amplifier 22 amplifies the second transmission signal in the second frequency band input from the input terminal, and outputs the amplified second transmission signal from the output terminal. The input terminal of the second power amplifier 22 is connected to the signal processing circuit 11. The second power amplifier 22 can amplify a high frequency signal (second transmission signal) in the second frequency band. The second frequency band is a frequency band different from the first frequency band. That is, the second power amplifier 22 amplifies the second transmission signal in the second frequency band different from the first frequency band. For example, the second frequency band is on the higher frequency side than the first frequency band. The second frequency band includes, for example, n79 of the NR band in the 5G standard. Each of the uplink frequency band and the downlink frequency band of n79 is 4400 MHz to 5000 MHz.
 第1フィルタ素子31及び第2フィルタ素子32は、図1に示すように、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される。より詳細には、第1フィルタ素子31及び第2フィルタ素子32は、第1電力増幅器21及び第2電力増幅器22の出力端子にそれぞれ接続される。 As shown in FIG. 1, the first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively. More specifically, the first filter element 31 and the second filter element 32 are connected to the output terminals of the first power amplifier 21 and the second power amplifier 22, respectively.
 第1フィルタ素子31は、電気回路的に、第1電力増幅器21とアンテナスイッチ6との間に設けられている。第1フィルタ素子31は、第1周波数帯域を含む第1通過帯域の信号(第1送信信号)を通過させる。第1フィルタ素子31は、例えば、バンドパスフィルタである。第1フィルタ素子31は、第1通過帯域の信号(第1送信信号)を通過させ、第1通過帯域以外の信号を減衰させる。 The first filter element 31 is provided between the first power amplifier 21 and the antenna switch 6 in terms of an electric circuit. The first filter element 31 passes a signal (first transmission signal) in the first pass band including the first frequency band. The first filter element 31 is, for example, a bandpass filter. The first filter element 31 passes a signal in the first pass band (first transmission signal) and attenuates signals other than the first pass band.
 第2フィルタ素子32は、電気回路的に、第2電力増幅器22とアンテナスイッチ6との間に設けられている。第2フィルタ素子32は、第2周波数帯域を含む第2通過帯域の信号(第2送信信号)を通過させる。つまり、第2フィルタ素子32は、第2周波数帯域を含み第1通過帯域と異なる第2通過帯域の信号を通過させる。第2フィルタ素子32は、例えば、バンドパスフィルタである。第2フィルタ素子32は、第2通過帯域の信号(第2送信信号)を通過させ、第2通過帯域以外の信号を減衰させる。 The second filter element 32 is provided between the second power amplifier 22 and the antenna switch 6 in terms of an electric circuit. The second filter element 32 passes a signal (second transmission signal) in the second pass band including the second frequency band. That is, the second filter element 32 passes a signal in the second pass band including the second frequency band and different from the first pass band. The second filter element 32 is, for example, a bandpass filter. The second filter element 32 passes a signal in the second pass band (second transmission signal) and attenuates a signal other than the second pass band.
 第1フィルタ素子31及び第2フィルタ素子32は、モジュール基板70に実装可能な電子部品である。第1フィルタ素子31及び第2フィルタ素子32は、例えば、弾性波フィルタである。弾性波フィルタとしては、SAW(Surface Acoustic Wave)フィルタ及びBAW(Bulk Acoustic Wave)フィルタが挙げられる。本実施の形態において、第1フィルタ素子31及び第2フィルタ素子32は、SAWフィルタである。第1フィルタ素子31は、第1基板310により構成される。第2フィルタ素子32は、第2基板320により構成される。つまり、第1フィルタ素子31及び第2フィルタ素子32は、別々の第1基板310及び第2基板320を用いて構成される。第1基板310及び第2基板320は、例えば、圧電層を含む圧電体基板である。本実施の形態では、第1基板310及び第2基板320は、矩形の板状である。 The first filter element 31 and the second filter element 32 are electronic components that can be mounted on the module board 70. The first filter element 31 and the second filter element 32 are, for example, elastic wave filters. Examples of the surface acoustic wave filter include a SAW (Surface Acoustic Wave) filter and a BAW (Bulk Acoustic Wave) filter. In the present embodiment, the first filter element 31 and the second filter element 32 are SAW filters. The first filter element 31 is composed of a first substrate 310. The second filter element 32 is composed of a second substrate 320. That is, the first filter element 31 and the second filter element 32 are configured by using separate first substrate 310 and second substrate 320. The first substrate 310 and the second substrate 320 are, for example, piezoelectric substrates including a piezoelectric layer. In the present embodiment, the first substrate 310 and the second substrate 320 have a rectangular plate shape.
 第1フィルタ素子31は、図2に示すように、第1フィルタ入力端子311と、第1フィルタ出力端子312と、2つのグランド端子313とを備える。第1フィルタ入力端子311と、第1フィルタ出力端子312と、2つのグランド端子313とは、第1基板310の一面の四隅に配置される。第1フィルタ入力端子311及び第1フィルタ出力端子312の組がシールド部80側にあり、2つのグランド端子313の組がシールド部80とは反対側にある。第1フィルタ素子31は、図1に示すように、フィルタ要素314を備える。フィルタ要素314は、第1周波数帯域を含む第1通過帯域の信号(第1送信信号)を通過させる。第1フィルタ入力端子311は、フィルタ要素314の入力側に接続される。第1フィルタ出力端子312は、フィルタ要素314の出力側に接続される。フィルタ要素314は、例えば、IDT(Interdigital Transducer)電極を含む。 As shown in FIG. 2, the first filter element 31 includes a first filter input terminal 311, a first filter output terminal 312, and two ground terminals 313. The first filter input terminal 311 and the first filter output terminal 312 and the two ground terminals 313 are arranged at the four corners of one surface of the first substrate 310. The set of the first filter input terminal 311 and the first filter output terminal 312 is on the shield portion 80 side, and the set of the two ground terminals 313 is on the opposite side of the shield portion 80. As shown in FIG. 1, the first filter element 31 includes a filter element 314. The filter element 314 passes a signal (first transmission signal) in the first pass band including the first frequency band. The first filter input terminal 311 is connected to the input side of the filter element 314. The first filter output terminal 312 is connected to the output side of the filter element 314. The filter element 314 includes, for example, an IDT (Interdigital Transducer) electrode.
 第2フィルタ素子32は、図2に示すように、第2フィルタ入力端子321と、第2フィルタ出力端子322と、2つのグランド端子323とを備える。第2フィルタ入力端子321と、第2フィルタ出力端子322と、2つのグランド端子323とは、第2基板320の一面の四隅に配置される。第2フィルタ入力端子321及び第2フィルタ出力端子322の組がシールド部80側にあり、2つのグランド端子323の組がシールド部80とは反対側にある。第2フィルタ素子32は、図1に示すように、フィルタ要素324を備える。フィルタ要素324は、第2周波数帯域を含む第2通過帯域の信号(第2送信信号)を通過させる。第2フィルタ入力端子321は、フィルタ要素324の入力側に接続される。第2フィルタ出力端子322は、フィルタ要素324の出力側に接続される。フィルタ要素324は、例えば、IDT電極を含む。 As shown in FIG. 2, the second filter element 32 includes a second filter input terminal 321, a second filter output terminal 322, and two ground terminals 323. The second filter input terminal 321 and the second filter output terminal 322 and the two ground terminals 323 are arranged at the four corners of one surface of the second substrate 320. The set of the second filter input terminal 321 and the second filter output terminal 322 is on the shield portion 80 side, and the set of the two ground terminals 323 is on the opposite side of the shield portion 80. As shown in FIG. 1, the second filter element 32 includes a filter element 324. The filter element 324 passes a signal (second transmission signal) in the second pass band including the second frequency band. The second filter input terminal 321 is connected to the input side of the filter element 324. The second filter output terminal 322 is connected to the output side of the filter element 324. The filter element 324 includes, for example, an IDT electrode.
 スイッチ集積回路4は、半導体基板40により構成される。スイッチ集積回路4は、第1スイッチ41と第2スイッチ42とを含む。第1スイッチ41と第2スイッチ42とは、1チップに集積されている。半導体基板40は、例えばシリコン基板である。 The switch integrated circuit 4 is composed of a semiconductor substrate 40. The switch integrated circuit 4 includes a first switch 41 and a second switch 42. The first switch 41 and the second switch 42 are integrated on one chip. The semiconductor substrate 40 is, for example, a silicon substrate.
 第1スイッチ41は、電気回路的に、第1電力増幅器21と第1フィルタ素子31との間に設けられる。第1スイッチ41は、第1フィルタ素子31の第1フィルタ入力端子311と第1電力増幅器21との間に挿入される。第1スイッチ41は、第1スイッチ入力端子411と、第1スイッチ出力端子412とを備える。第1スイッチ41は、第1スイッチ入力端子411と第1スイッチ出力端子412との間の電路を開閉する。第1スイッチ入力端子411は、第1電力増幅器21の出力端子に接続される。第1スイッチ出力端子412は、第1フィルタ素子31の第1フィルタ入力端子311に接続される。 The first switch 41 is provided between the first power amplifier 21 and the first filter element 31 in terms of an electric circuit. The first switch 41 is inserted between the first filter input terminal 311 of the first filter element 31 and the first power amplifier 21. The first switch 41 includes a first switch input terminal 411 and a first switch output terminal 412. The first switch 41 opens and closes an electric circuit between the first switch input terminal 411 and the first switch output terminal 412. The first switch input terminal 411 is connected to the output terminal of the first power amplifier 21. The first switch output terminal 412 is connected to the first filter input terminal 311 of the first filter element 31.
 第2スイッチ42は、電気回路的に、第2電力増幅器22と第2フィルタ素子32との間に設けられる。第2スイッチ42は、第2フィルタ素子32の第2フィルタ入力端子321と第2電力増幅器22との間に挿入される。第2スイッチ42は、第2スイッチ入力端子421と、第2スイッチ出力端子422とを備える。第2スイッチ42は、第2スイッチ入力端子421と第2スイッチ出力端子422との間の電路を開閉する。第2スイッチ入力端子421は、第2電力増幅器22の出力端子に接続される。第2スイッチ出力端子422は、第2フィルタ素子32の第2フィルタ入力端子321に接続される。 The second switch 42 is provided between the second power amplifier 22 and the second filter element 32 in terms of an electric circuit. The second switch 42 is inserted between the second filter input terminal 321 of the second filter element 32 and the second power amplifier 22. The second switch 42 includes a second switch input terminal 421 and a second switch output terminal 422. The second switch 42 opens and closes an electric circuit between the second switch input terminal 421 and the second switch output terminal 422. The second switch input terminal 421 is connected to the output terminal of the second power amplifier 22. The second switch output terminal 422 is connected to the second filter input terminal 321 of the second filter element 32.
 また、スイッチ集積回路4は、第1電力増幅器21及び第2電力増幅器22を制御する制御回路を備えてよい。 Further, the switch integrated circuit 4 may include a control circuit for controlling the first power amplifier 21 and the second power amplifier 22.
 第1整合回路51及び第2整合回路52は、電気回路的に、第1電力増幅器21及び第2電力増幅器22と第1フィルタ素子31及び第2フィルタ素子32との間にそれぞれは設けられる。より詳細には、第1整合回路51及び第2整合回路52は、電気回路的に、第1電力増幅器21及び第2電力増幅器22と第1スイッチ41及び第2スイッチ42との間にそれぞれ設けられる。第1整合回路51は、第1電力増幅器21と第1フィルタ素子31との間のインピーダンス整合をとるために設けられる。第2整合回路52は、第2電力増幅器22と第2フィルタ素子32との間のインピーダンス整合をとるために設けられる。第1整合回路51及び第2整合回路52は、例えば、1以上のインダクタ(コイル、トランス等)と1以上のキャパシタとの少なくとも一方を含む。 The first matching circuit 51 and the second matching circuit 52 are electrically provided between the first power amplifier 21 and the second power amplifier 22 and the first filter element 31 and the second filter element 32, respectively. More specifically, the first matching circuit 51 and the second matching circuit 52 are electrically provided between the first power amplifier 21 and the second power amplifier 22 and the first switch 41 and the second switch 42, respectively. Will be. The first matching circuit 51 is provided for impedance matching between the first power amplifier 21 and the first filter element 31. The second matching circuit 52 is provided for impedance matching between the second power amplifier 22 and the second filter element 32. The first matching circuit 51 and the second matching circuit 52 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors.
 アンテナスイッチ6は、第1フィルタ素子31及び第2フィルタ素子32と、アンテナ素子12との接続関係を変更するために設けられる。図1に示すように、アンテナスイッチ6は、第1フィルタ側端子611と、第2フィルタ側端子612と、第1アンテナ側端子621と、第2アンテナ側端子622とを備える。第1フィルタ側端子611は、第1スイッチ41の第1スイッチ出力端子412に接続される。第2フィルタ側端子612は、第2スイッチ42の第2スイッチ出力端子422に接続される。第1アンテナ側端子621は、アンテナ素子12の第1アンテナ121に接続される。第2アンテナ側端子622は、アンテナ素子12の第2アンテナ122に接続される。なお、アンテナスイッチ6は、必要に応じて、1以上の低雑音増幅器を備えてよい。 The antenna switch 6 is provided to change the connection relationship between the first filter element 31 and the second filter element 32 and the antenna element 12. As shown in FIG. 1, the antenna switch 6 includes a first filter side terminal 611, a second filter side terminal 612, a first antenna side terminal 621, and a second antenna side terminal 622. The first filter side terminal 611 is connected to the first switch output terminal 412 of the first switch 41. The second filter side terminal 612 is connected to the second switch output terminal 422 of the second switch 42. The first antenna side terminal 621 is connected to the first antenna 121 of the antenna element 12. The second antenna side terminal 622 is connected to the second antenna 122 of the antenna element 12. The antenna switch 6 may be provided with one or more low noise amplifiers, if necessary.
 モジュール基板70は、高周波回路10を構成する電子部品(回路部品)の実装及び電気的接続のために用いられる。モジュール基板70は、例えば、複数の誘電体層の積層構造を有する低温同時焼成セラミックス(Low Temperature Co-fired Ceramics:LTCC)基板、高温同時焼成セラミックス(High Temperature Co-fired Ceramics:HTCC)基板、部品内蔵基板、再配線層(Redistribution Layer:RDL)を有する基板、又は、プリント基板等が用いられる。モジュール基板70は、図2に示すように、矩形板状である。図3に示すように、モジュール基板70は、互いに背向する第1主面70a及び第2主面70bを有する。本実施の形態において、第1主面70a及び第2主面70bは、モジュール基板70の厚み方向の両側の面である。図2に示すように、モジュール基板70には、第1電力増幅器21と、第2電力増幅器22と、第1フィルタ素子31と、第2フィルタ素子32と、スイッチ集積回路4と、第1整合回路51と、第2整合回路52と、アンテナスイッチ6とが配置される。本実施の形態では、第1電力増幅器21及び第2電力増幅器22は、モジュール基板70の第1主面70aに配置される。第1整合回路51及び第2整合回路52は、モジュール基板70の第1主面70aに配置される。第1フィルタ素子31及び第2フィルタ素子32は、モジュール基板70の第1主面70aに配置される。スイッチ集積回路4は、モジュール基板70の第2主面70bに配置される。アンテナスイッチ6は、モジュール基板70の第2主面70bに配置される。 The module board 70 is used for mounting and electrical connection of electronic components (circuit components) constituting the high frequency circuit 10. The module substrate 70 is, for example, a low temperature co-fired ceramics (LTCC) substrate having a laminated structure of a plurality of dielectric layers, a high temperature co-fired ceramics (HTCC) substrate, and parts. A built-in substrate, a substrate having a redistribution layer (RDL), a printed circuit board, or the like is used. As shown in FIG. 2, the module substrate 70 has a rectangular plate shape. As shown in FIG. 3, the module substrate 70 has a first main surface 70a and a second main surface 70b facing each other. In the present embodiment, the first main surface 70a and the second main surface 70b are surfaces on both sides of the module substrate 70 in the thickness direction. As shown in FIG. 2, the module board 70 includes a first power amplifier 21, a second power amplifier 22, a first filter element 31, a second filter element 32, a switch integrated circuit 4, and a first matching. The circuit 51, the second matching circuit 52, and the antenna switch 6 are arranged. In the present embodiment, the first power amplifier 21 and the second power amplifier 22 are arranged on the first main surface 70a of the module board 70. The first matching circuit 51 and the second matching circuit 52 are arranged on the first main surface 70a of the module board 70. The first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70. The switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70. The antenna switch 6 is arranged on the second main surface 70b of the module board 70.
 特に、図2に示すように、第1フィルタ素子31と第2フィルタ素子32とは、モジュール基板70の第1主面70aに並べて配置されている。第1フィルタ素子31では、第1フィルタ入力端子311及び第1フィルタ出力端子312が、グランド端子313よりも第2フィルタ素子32側に位置する。第2フィルタ素子32は、第2フィルタ入力端子321及び第2フィルタ出力端子322が、グランド端子323よりも第1フィルタ素子31側に位置する。図3に示すように、第1フィルタ素子31の第1フィルタ入力端子311、第1フィルタ出力端子312、及び2つのグランド端子313は、金属バンプ74を用いて、それぞれモジュール基板70の第1主面70aに固定される。図3に示すように、第2フィルタ素子32の第2フィルタ入力端子321、第2フィルタ出力端子322、及び2つのグランド端子323は、金属バンプ74を用いて、それぞれモジュール基板70の第1主面70aに固定される。 In particular, as shown in FIG. 2, the first filter element 31 and the second filter element 32 are arranged side by side on the first main surface 70a of the module substrate 70. In the first filter element 31, the first filter input terminal 311 and the first filter output terminal 312 are located closer to the second filter element 32 than the ground terminal 313. In the second filter element 32, the second filter input terminal 321 and the second filter output terminal 322 are located closer to the first filter element 31 than the ground terminal 323. As shown in FIG. 3, the first filter input terminal 311 of the first filter element 31, the first filter output terminal 312, and the two ground terminals 313 each use the metal bump 74 as the first main of the module board 70. It is fixed to the surface 70a. As shown in FIG. 3, the second filter input terminal 321 of the second filter element 32, the second filter output terminal 322, and the two ground terminals 323 are each the first main of the module board 70 using the metal bump 74. It is fixed to the surface 70a.
 図2に示すように、スイッチ集積回路4は、モジュール基板70の第2主面70bに、モジュール基板70の平面視において第1フィルタ素子31及び第2フィルタ素子32と重なるように配置されている。より詳細には、スイッチ集積回路4は、モジュール基板70を平面視したときに第1スイッチ41と第1フィルタ素子31とが重なる重複領域R1が存在するように、配置される。つまり、モジュール基板70を平面視したときに第1スイッチ41と第1フィルタ素子31とが重なる。本実施の形態では、第1フィルタ入力端子311が、モジュール基板70を平面視したときに第1スイッチ41と第1フィルタ素子31とが重なる重複領域R1に位置する。つまり、第1フィルタ入力端子311が、モジュール基板70を平面視したときに第1スイッチ41及び第1フィルタ素子31と重なる。スイッチ集積回路4は、モジュール基板70を平面視したときに第2スイッチ42と第2フィルタ素子32とが重なる重複領域R2が存在するように、配置される。つまり、モジュール基板70を平面視したときに第2スイッチ42と第2フィルタ素子32とが重なる。本実施の形態では、第2フィルタ入力端子321が、モジュール基板70を平面視したときに第2スイッチ42と第2フィルタ素子32とが重なる重複領域R2に位置する。つまり、第2フィルタ入力端子321が、モジュール基板70を平面視したときに第2スイッチ42及び第2フィルタ素子32と重なる。図3に示すように、スイッチ集積回路4の第1スイッチ入力端子411、第1スイッチ出力端子412、第2スイッチ入力端子421及び第2スイッチ出力端子422は、金属バンプ74を用いて、それぞれモジュール基板70の第2主面70bに固定される。金属バンプ74は、例えば、はんだバンプ、金バンプ等である。 As shown in FIG. 2, the switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70 so as to overlap the first filter element 31 and the second filter element 32 in the plan view of the module board 70. .. More specifically, the switch integrated circuit 4 is arranged so that there is an overlapping region R1 in which the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. That is, the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. In the present embodiment, the first filter input terminal 311 is located in the overlapping region R1 where the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. That is, the first filter input terminal 311 overlaps with the first switch 41 and the first filter element 31 when the module board 70 is viewed in a plan view. The switch integrated circuit 4 is arranged so that there is an overlapping region R2 in which the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. That is, the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. In the present embodiment, the second filter input terminal 321 is located in the overlapping region R2 where the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. That is, the second filter input terminal 321 overlaps with the second switch 42 and the second filter element 32 when the module board 70 is viewed in a plan view. As shown in FIG. 3, the first switch input terminal 411, the first switch output terminal 412, the second switch input terminal 421, and the second switch output terminal 422 of the switch integrated circuit 4 are modules using metal bumps 74, respectively. It is fixed to the second main surface 70b of the substrate 70. The metal bump 74 is, for example, a solder bump, a gold bump, or the like.
 図3に示すように、第1スイッチ41の第1スイッチ出力端子412は、第1フィルタ素子31の第1フィルタ入力端子311に、モジュール基板70の内部に設けられる第1接続配線731を介して、接続される。上述したように、第1フィルタ入力端子311は、モジュール基板70を平面視したときに第1スイッチ41と第1フィルタ素子31とが重なる重複領域R1に位置する。そのため、第1接続配線731の長さを短くできる。よって、第1スイッチ41と第1フィルタ素子31との間での高周波信号の損失を低減できる。 As shown in FIG. 3, the first switch output terminal 412 of the first switch 41 is connected to the first filter input terminal 311 of the first filter element 31 via the first connection wiring 731 provided inside the module board 70. , Will be connected. As described above, the first filter input terminal 311 is located in the overlapping region R1 where the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced.
 図3に示すように、第2スイッチ42の第2スイッチ出力端子422は、第2フィルタ素子32の第2フィルタ入力端子321に、モジュール基板70の内部に設けられる第2接続配線732を介して、接続される。上述したように、第2フィルタ入力端子321は、モジュール基板70を平面視したときに第2スイッチ42と第2フィルタ素子32とが重なる重複領域R2に位置する。そのため、第2接続配線732の長さを短くできる。よって、第2スイッチ42と第2フィルタ素子32との間での高周波信号の損失を低減できる。 As shown in FIG. 3, the second switch output terminal 422 of the second switch 42 is connected to the second filter input terminal 321 of the second filter element 32 via the second connection wiring 732 provided inside the module board 70. , Will be connected. As described above, the second filter input terminal 321 is located in the overlapping region R2 where the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced.
 モジュール基板70は、第1回路接続端子711と、第2回路接続端子712とを備える。第1回路接続端子711と第2回路接続端子712とは、高周波回路10の信号処理回路11への電気的接続に用いられる。図2に示すように、第1回路接続端子711は、第1電力増幅器21の入力端子に接続される。第2回路接続端子712は、第2電力増幅器22の入力端子に接続される。 The module board 70 includes a first circuit connection terminal 711 and a second circuit connection terminal 712. The first circuit connection terminal 711 and the second circuit connection terminal 712 are used for electrical connection of the high frequency circuit 10 to the signal processing circuit 11. As shown in FIG. 2, the first circuit connection terminal 711 is connected to the input terminal of the first power amplifier 21. The second circuit connection terminal 712 is connected to the input terminal of the second power amplifier 22.
 モジュール基板70は、第1アンテナ接続端子721と、第2アンテナ接続端子722とを備える。第1アンテナ接続端子721及び第2アンテナ接続端子722は、高周波回路10のアンテナ素子12への電気的接続に用いられる。図1に示すように、第1アンテナ接続端子721は、第1アンテナ121に接続される。第2アンテナ接続端子722は、第2アンテナ122に接続される。 The module board 70 includes a first antenna connection terminal 721 and a second antenna connection terminal 722. The first antenna connection terminal 721 and the second antenna connection terminal 722 are used for electrical connection to the antenna element 12 of the high frequency circuit 10. As shown in FIG. 1, the first antenna connection terminal 721 is connected to the first antenna 121. The second antenna connection terminal 722 is connected to the second antenna 122.
 また、モジュール基板70には、電子部品53,54が設けられる。電子部品53は、第1フィルタ素子31とアンテナスイッチ6との間に接続される。電子部品53は、例えば、第1フィルタ素子31とアンテナ素子12との間のインピーダンス整合をとるための整合回路である。電子部品54は、第2フィルタ素子32とアンテナスイッチ6との間に接続される。電子部品54は、例えば、第2フィルタ素子32とアンテナ素子12との間のインピーダンス整合をとるための整合回路である。電子部品53,54は、例えば、1以上のインダクタ(コイル、トランス等)と1以上のキャパシタとの少なくとも一方を含む。電子部品53,54は、例えば、表面実装型の電子部品である。なお、電子部品53,54は、表面実装型の電子部品ではなく、モジュール基板70に形成される導体パターン等で構成されてもよい。なお、図面を簡略化するために、図1では電子部品53,54の図示を省略している。 Further, the module board 70 is provided with electronic components 53 and 54. The electronic component 53 is connected between the first filter element 31 and the antenna switch 6. The electronic component 53 is, for example, a matching circuit for impedance matching between the first filter element 31 and the antenna element 12. The electronic component 54 is connected between the second filter element 32 and the antenna switch 6. The electronic component 54 is, for example, a matching circuit for impedance matching between the second filter element 32 and the antenna element 12. The electronic components 53, 54 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors. The electronic components 53 and 54 are, for example, surface mount type electronic components. The electronic components 53 and 54 may be formed of a conductor pattern or the like formed on the module substrate 70 instead of the surface mount type electronic components. In addition, in order to simplify the drawing, the electronic components 53 and 54 are not shown in FIG.
 図3に示すように、第1フィルタ素子31及び第2フィルタ素子32は、樹脂部材75により覆われる。本実施の形態では、モジュール基板70に実装される電子部品(第1電力増幅器21、第2電力増幅器22、第1フィルタ素子31、第2フィルタ素子32、スイッチ集積回路4、第1整合回路51、第2整合回路52、アンテナスイッチ6、電子部品53,54)は、樹脂部材75により覆われる。より詳細には、樹脂部材75は、モジュール基板70に実装される電子部品の少なくとも一部及びモジュール基板70の第1主面70a及び第2主面70bを覆っている。樹脂部材75は、回路部品の機械強度および耐湿性等の信頼性を確保する機能を有している。 As shown in FIG. 3, the first filter element 31 and the second filter element 32 are covered with the resin member 75. In the present embodiment, the electronic components (first power amplifier 21, second power amplifier 22, first filter element 31, second filter element 32, switch integrated circuit 4, first matching circuit 51) mounted on the module board 70 are mounted. , The second matching circuit 52, the antenna switch 6, the electronic components 53, 54) are covered with the resin member 75. More specifically, the resin member 75 covers at least a part of the electronic components mounted on the module substrate 70 and the first main surface 70a and the second main surface 70b of the module substrate 70. The resin member 75 has a function of ensuring reliability such as mechanical strength and moisture resistance of circuit parts.
 金属部材8は、モジュール基板70に配置される。「モジュール基板70に配置される」とは、モジュール基板70の第1主面70a、第2主面70b又は内部に、直接的又は間接的に配置されることを意味する。金属部材8は、グランドに接続される。「グランドに接続される」とは、少なくとも高周波回路10の動作時において、「グランドに接続される」ことを言う。例えば、金属部材8は、高周波回路10が実装される基板のグランドパターンに接続される。図2に示すように、金属部材8は、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置する。 The metal member 8 is arranged on the module substrate 70. By "arranged on the module substrate 70", it means that the module substrate 70 is directly or indirectly arranged on the first main surface 70a, the second main surface 70b, or the inside. The metal member 8 is connected to the ground. "Connected to ground" means "connected to ground" at least during the operation of the high frequency circuit 10. For example, the metal member 8 is connected to the ground pattern of the substrate on which the high frequency circuit 10 is mounted. As shown in FIG. 2, the metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
 図3に示すように、金属部材8は、貫通孔配線81と、グランド電極82と、接続部材83とを含む。貫通孔配線81、グランド電極82、及び接続部材83は、グランドに接続される。つまり、貫通孔配線81、グランド電極82、及び接続部材83は、グランド電位を有する。貫通孔配線81、グランド電極82、及び接続部材83は、シールド部80を構成する。シールド部80は、金属部材8において、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32に重ならずに第1フィルタ素子31及び第2フィルタ素子32間に位置する部位である。本実施の形態では、金属部材8全体がシールド部80である。 As shown in FIG. 3, the metal member 8 includes a through-hole wiring 81, a ground electrode 82, and a connecting member 83. The through hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to the ground. That is, the through hole wiring 81, the ground electrode 82, and the connecting member 83 have a ground potential. The through-hole wiring 81, the ground electrode 82, and the connecting member 83 constitute a shield portion 80. The shield portion 80 is located between the first filter element 31 and the second filter element 32 in the metal member 8 without overlapping the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. It is a part. In the present embodiment, the entire metal member 8 is a shield portion 80.
 貫通孔配線81は、モジュール基板70の内部に配置される。貫通孔配線81は、図3に示すように、モジュール基板70の第1主面70a及び第2主面70b間に形成される。本実施の形態では、貫通孔配線81は、モジュール基板70を完全に貫通しており、モジュール基板70の第1主面70a及び第2主面70bに両端がそれぞれ露出する。貫通孔配線81は、モジュール基板70を厚み方向に貫通する貫通ビアである。貫通孔配線81は、グランドに接続される。貫通孔配線81は、いわゆるグランドビアである。貫通孔配線81は、図2に示すように、モジュール基板70を平面視したときに、第1フィルタ素子31及び第2フィルタ素子32の間全体にわたって位置する。これは、第1フィルタ素子31内の任意の点と第2フィルタ素子32内の任意の点とを結ぶ複数の線分の全てが貫通孔配線81を通ることを意味する。したがって、貫通孔配線81は、モジュール基板70を平面視したときに、第1フィルタ入力端子311及び第2フィルタ入力端子321間と第1フィルタ出力端子312及び第2フィルタ出力端子322間に位置する。 The through hole wiring 81 is arranged inside the module board 70. As shown in FIG. 3, the through hole wiring 81 is formed between the first main surface 70a and the second main surface 70b of the module substrate 70. In the present embodiment, the through-hole wiring 81 completely penetrates the module board 70, and both ends are exposed on the first main surface 70a and the second main surface 70b of the module board 70, respectively. The through hole wiring 81 is a through via that penetrates the module substrate 70 in the thickness direction. The through hole wiring 81 is connected to the ground. The through hole wiring 81 is a so-called ground via. As shown in FIG. 2, the through-hole wiring 81 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. This means that all of the plurality of line segments connecting an arbitrary point in the first filter element 31 and an arbitrary point in the second filter element 32 pass through the through hole wiring 81. Therefore, the through-hole wiring 81 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. ..
 グランド電極82は、図3に示すように、スイッチ集積回路4に形成される。これにより、グランド電極82は、モジュール基板70の第2主面70bに間接的に配置される。グランド電極82は、スイッチ集積回路4において、第1スイッチ出力端子412と第2スイッチ出力端子422との間に位置する。本実施の形態において、グランド電極82は、モジュール基板70を平面視したときに、貫通孔配線81と重なる位置にある。 The ground electrode 82 is formed in the switch integrated circuit 4 as shown in FIG. As a result, the ground electrode 82 is indirectly arranged on the second main surface 70b of the module substrate 70. The ground electrode 82 is located between the first switch output terminal 412 and the second switch output terminal 422 in the switch integrated circuit 4. In the present embodiment, the ground electrode 82 is positioned so as to overlap the through-hole wiring 81 when the module substrate 70 is viewed in a plan view.
 接続部材83は、図3に示すように、モジュール基板70の第2主面70bに直接的に配置される。接続部材83は、グランド電極82に接続される。本実施の形態において、接続部材83は、貫通孔配線81とグランド電極82とを接続する。接続部材83は、例えば、はんだバンプ、金バンプ等の金属バンプである。接続部材83は、ボール状であってもよいが、本実施の形態においては、ストリップ状である。本実施の形態において、接続部材83は、モジュール基板70を平面視したときに、貫通孔配線81と重なる位置にある。図2に示すように、接続部材83は、貫通孔配線81と同様に、モジュール基板70を平面視したときに、第1フィルタ素子31及び第2フィルタ素子32の間全体にわたって位置する。したがって、接続部材83は、モジュール基板70を平面視したときに、第1フィルタ入力端子311及び第2フィルタ入力端子321間と第1フィルタ出力端子312及び第2フィルタ出力端子322間に位置する。 As shown in FIG. 3, the connecting member 83 is directly arranged on the second main surface 70b of the module board 70. The connecting member 83 is connected to the ground electrode 82. In the present embodiment, the connecting member 83 connects the through hole wiring 81 and the ground electrode 82. The connecting member 83 is, for example, a metal bump such as a solder bump or a gold bump. The connecting member 83 may have a ball shape, but in the present embodiment, it has a strip shape. In the present embodiment, the connecting member 83 is in a position where it overlaps with the through-hole wiring 81 when the module substrate 70 is viewed in a plan view. As shown in FIG. 2, the connecting member 83 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view, similarly to the through-hole wiring 81. Therefore, the connecting member 83 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view.
 シールド部80では、貫通孔配線81、グランド電極82及び接続部材83は、相互に接続される。貫通孔配線81、グランド電極82及び接続部材83は、上述したように、グランドに接続される。このように、シールド部80は、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32に重ならずに第1フィルタ素子31及び第2フィルタ素子32間に位置し、グランドに接続される。したがって、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを向上できる。そのため、図2に示すように、第1フィルタ素子31の第1フィルタ入力端子311及び第1フィルタ出力端子312を、第1基板310において第2フィルタ素子32側の端部に配置しても、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを十分に確保できる。同様に、第2フィルタ素子32の第2フィルタ入力端子321及び第2フィルタ出力端子322を、第2基板320において第1フィルタ素子31側の端部に配置しても、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを十分に確保できる。これによって、第1フィルタ素子31と第1スイッチ41との間の接続配線の長さを短くできて、第1スイッチ41と第1フィルタ素子31との間での高周波信号の損失を低減できる。第2フィルタ素子32と第2スイッチ42との間の接続配線の長さを短くできて、第2スイッチ42と第2フィルタ素子32との間での高周波信号の損失を低減できる。 In the shield portion 80, the through hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to each other. The through-hole wiring 81, the ground electrode 82, and the connecting member 83 are connected to the ground as described above. As described above, the shield portion 80 is located between the first filter element 31 and the second filter element 32 without overlapping the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. Connected to the ground. Therefore, the isolation between the first filter element 31 and the second filter element 32 can be improved. Therefore, as shown in FIG. 2, even if the first filter input terminal 311 and the first filter output terminal 312 of the first filter element 31 are arranged at the end of the first substrate 310 on the second filter element 32 side. Sufficient isolation can be secured between the first filter element 31 and the second filter element 32. Similarly, even if the second filter input terminal 321 and the second filter output terminal 322 of the second filter element 32 are arranged at the ends of the second substrate 320 on the first filter element 31 side, the first filter element 31 and the second filter output terminal 322 can be arranged. Sufficient isolation can be secured between the second filter elements 32. As a result, the length of the connection wiring between the first filter element 31 and the first switch 41 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced. The length of the connection wiring between the second filter element 32 and the second switch 42 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced.
 保護部材9は、高周波回路10を保護するために設けられる。図3に示すように、保護部材9は、金属層91,92を含む。金属層91,92は、グランドに接続される。例えば、金属層91,92は、高周波回路10が実装される基板のグランドパターンに接続される。金属層91は、第1フィルタ素子31及び第2フィルタ素子32に対してモジュール基板70の第1主面70aとは反対側に位置するように樹脂部材75の表面に配置される。金属層91は、保護部材9において天面部を構成する。本実施の形態では、金属層91は、モジュール基板70の第1主面70a全体を覆う大きさを有している。金属層92は、モジュール基板70の周囲を囲うように形成されている。金属層92は、保護部材9において側面部を構成する。金属層91,92は、例えば、スパッタリング技術又はメッキ技術により、樹脂部材75の表面に形成される。 The protective member 9 is provided to protect the high frequency circuit 10. As shown in FIG. 3, the protective member 9 includes metal layers 91 and 92. The metal layers 91 and 92 are connected to the ground. For example, the metal layers 91 and 92 are connected to the ground pattern of the substrate on which the high frequency circuit 10 is mounted. The metal layer 91 is arranged on the surface of the resin member 75 so as to be located on the side opposite to the first main surface 70a of the module substrate 70 with respect to the first filter element 31 and the second filter element 32. The metal layer 91 constitutes a top surface portion of the protective member 9. In the present embodiment, the metal layer 91 has a size that covers the entire first main surface 70a of the module substrate 70. The metal layer 92 is formed so as to surround the module substrate 70. The metal layer 92 constitutes a side surface portion of the protective member 9. The metal layers 91 and 92 are formed on the surface of the resin member 75 by, for example, a sputtering technique or a plating technique.
 以上述べた高周波回路10は、図1に示すように、信号処理回路11とアンテナ素子12との間に接続される。 As shown in FIG. 1, the high frequency circuit 10 described above is connected between the signal processing circuit 11 and the antenna element 12.
 信号処理回路11は、高周波回路10に高周波信号を出力する機能を有する。信号処理回路11は、ベースバンド信号処理回路111と、高周波信号処理回路112とを含む。 The signal processing circuit 11 has a function of outputting a high frequency signal to the high frequency circuit 10. The signal processing circuit 11 includes a baseband signal processing circuit 111 and a high frequency signal processing circuit 112.
 ベースバンド信号処理回路111は、例えば、BBIC(Baseband Integrated Circuit)である。ベースバンド信号処理回路111は、高周波回路10を伝搬する高周波信号よりも低周波の中間周波数帯域を用いて信号処理する。ベースバンド信号処理回路111は、例えば、画像表示のための画像信号や通話のための音声信号等の種々のデータ伝送のための送信信号を、高周波信号処理回路112に出力する。 The baseband signal processing circuit 111 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 111 processes a signal using an intermediate frequency band having a lower frequency than the high frequency signal propagating in the high frequency circuit 10. The baseband signal processing circuit 111 outputs transmission signals for various data transmissions, such as an image signal for displaying an image and an audio signal for a call, to the high frequency signal processing circuit 112.
 高周波信号処理回路112は、例えば、RFIC(Radio Frequency Integrated Circuit)である。高周波信号処理回路112は、例えば、ベースバンド信号処理回路111から出力された送信信号に対してアップコンバート等の信号処理を行い、信号処理が行われた送信信号(高周波信号)を、高周波回路10へ出力する。高周波信号処理回路112は、使用される通信バンドに基づいて、スイッチ集積回路4の第1スイッチ41及び第2スイッチ42の接続状態を切り替えるための制御信号を出力する制御回路を有している。なお、制御回路は、高周波信号処理回路112の外部に設けられていてもよく、例えば、高周波回路10又はベースバンド信号処理回路111に設けられていてもよい。 The high frequency signal processing circuit 112 is, for example, an RFIC (Radio Frequency Integrated Circuit). The high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and displays the signal-processed transmission signal (high-frequency signal) in the high-frequency circuit 10. Output to. The high frequency signal processing circuit 112 has a control circuit that outputs a control signal for switching the connection state of the first switch 41 and the second switch 42 of the switch integrated circuit 4 based on the communication band used. The control circuit may be provided outside the high frequency signal processing circuit 112, and may be provided, for example, in the high frequency circuit 10 or the baseband signal processing circuit 111.
 アンテナ素子12は、高周波回路10からの高周波信号を放射する。アンテナ素子12は、高周波回路10に接続され、高周波回路10から高周波信号を受け取り、受け取った高周波信号を放射する。アンテナ素子12は、第1アンテナ121と、第2アンテナ122とを有する。本実施の形態では、第1アンテナ121が送受信可能な周波数帯域は、第2アンテナ122が送受信可能な周波数帯域と同じである。ただし、第1アンテナ121が送受信可能な周波数帯域は、第2アンテナ122が送受信可能な周波数帯域と異なっていてもよい。このようなアンテナ素子12によれば、MIMO(Multiple Input Multiple Output)が実現可能である。 The antenna element 12 radiates a high frequency signal from the high frequency circuit 10. The antenna element 12 is connected to the high frequency circuit 10, receives a high frequency signal from the high frequency circuit 10, and radiates the received high frequency signal. The antenna element 12 has a first antenna 121 and a second antenna 122. In the present embodiment, the frequency band in which the first antenna 121 can transmit and receive is the same as the frequency band in which the second antenna 122 can transmit and receive. However, the frequency band in which the first antenna 121 can transmit and receive may be different from the frequency band in which the second antenna 122 can transmit and receive. With such an antenna element 12, MIMO (Multiple Input Multiple Output) can be realized.
 次に図1を参照して通信装置1における2つの周波数帯域を同時に用いるキャリアアグリゲーション(2アップリンク・キャリアアグリゲーション)の動作の一例を簡単に説明する。ベースバンド信号処理回路111は、例えば、データ伝送のための送信信号を、高周波信号処理回路112に出力する。高周波信号処理回路112は、ベースバンド信号処理回路111から出力された送信信号に対してアップコンバート等の信号処理を行い、信号処理が行われた送信信号(高周波信号)を、高周波回路10の第1電力増幅器21及び第2電力増幅器22へ出力する。2アップリンク・キャリアアグリゲーションの場合、スイッチ集積回路4において、第1スイッチ41の第1スイッチ入力端子411と第1スイッチ出力端子412との間の電路が閉じられ、第2スイッチ42の第2スイッチ入力端子421と第2スイッチ出力端子422との間の電路が閉じられる。第1電力増幅器21は、高周波信号処理回路112からの送信信号を増幅して出力する。第1電力増幅器21で増幅された送信信号は、第1整合回路51、第1スイッチ41、第1フィルタ素子31、及びアンテナスイッチ6を通して、アンテナ素子12に伝達されて、アンテナ素子12から放射される。第2電力増幅器22は、高周波信号処理回路112からの送信信号を増幅して出力する。第2電力増幅器22で増幅された送信信号は、第2整合回路52、第2スイッチ42、第2フィルタ素子32、及びアンテナスイッチ6を通して、アンテナ素子12に伝達されて、アンテナ素子12から放射される。 Next, with reference to FIG. 1, an example of the operation of carrier aggregation (2 uplink carrier aggregation) in which two frequency bands in the communication device 1 are used at the same time will be briefly described. The baseband signal processing circuit 111 outputs, for example, a transmission signal for data transmission to the high frequency signal processing circuit 112. The high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and transfers the signal-processed transmission signal (high-frequency signal) to the high-frequency circuit 10. 1 Output to the power amplifier 21 and the second power amplifier 22. In the case of 2 uplink carrier aggregation, in the switch integrated circuit 4, the electric circuit between the 1st switch input terminal 411 of the 1st switch 41 and the 1st switch output terminal 412 is closed, and the 2nd switch of the 2nd switch 42 is closed. The electric circuit between the input terminal 421 and the second switch output terminal 422 is closed. The first power amplifier 21 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112. The transmission signal amplified by the first power amplifier 21 is transmitted to the antenna element 12 through the first matching circuit 51, the first switch 41, the first filter element 31, and the antenna switch 6, and is radiated from the antenna element 12. To. The second power amplifier 22 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112. The transmission signal amplified by the second power amplifier 22 is transmitted to the antenna element 12 through the second matching circuit 52, the second switch 42, the second filter element 32, and the antenna switch 6, and is radiated from the antenna element 12. To.
 図2に示すように、高周波回路10は、金属部材8を備える。金属部材8は、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置し、グランドに接続される。そのため、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを向上できる。したがって、第1電力増幅器21及び第2電力増幅器22を同時に使用した場合であっても、第1フィルタ素子31と第2フィルタ素子32との間で高周波信号の漏れが生じる可能性を低減できる。 As shown in FIG. 2, the high frequency circuit 10 includes a metal member 8. The metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view, and is connected to the ground. Therefore, the isolation between the first filter element 31 and the second filter element 32 can be improved. Therefore, even when the first power amplifier 21 and the second power amplifier 22 are used at the same time, the possibility of high frequency signal leakage between the first filter element 31 and the second filter element 32 can be reduced.
 [1-3.効果等]
 以上述べた高周波回路10は、同時に使用可能な第1電力増幅器21及び第2電力増幅器22と、第1フィルタ素子31及び第2フィルタ素子32と、モジュール基板70と、金属部材8とを備える。第1フィルタ素子31及び第2フィルタ素子32は、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される。モジュール基板70は、互いに背向する第1主面70a及び第2主面70bを有する。第1フィルタ素子31及び第2フィルタ素子32及び第1電力増幅器21及び第2電力増幅器22は、モジュール基板70に配置される。金属部材8は、グランドに接続される。第1フィルタ素子31及び第2フィルタ素子32は、モジュール基板70の第1主面70aに配置される。金属部材8は、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置する。この構成によれば、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを向上できる。
[1-3. Effect, etc.]
The high-frequency circuit 10 described above includes a first power amplifier 21 and a second power amplifier 22 that can be used simultaneously, a first filter element 31 and a second filter element 32, a module substrate 70, and a metal member 8. The first filter element 31 and the second filter element 32 are connected to the first power amplifier 21 and the second power amplifier 22, respectively. The module substrate 70 has a first main surface 70a and a second main surface 70b that face each other. The first filter element 31, the second filter element 32, the first power amplifier 21, and the second power amplifier 22 are arranged on the module board 70. The metal member 8 is connected to the ground. The first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70. The metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 connected to the first power amplifier 21 and the second power amplifier 22, respectively, can be improved.
 また、高周波回路10において、金属部材8は、モジュール基板70の第1主面70aと第2主面70bとの間に形成される貫通孔配線81を含む。この構成によれば、簡易な構成で、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを向上できる。 Further, in the high frequency circuit 10, the metal member 8 includes a through hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module substrate 70. According to this configuration, it is possible to improve the isolation between the first filter element 31 and the second filter element 32 connected to the first power amplifier 21 and the second power amplifier 22, respectively, with a simple configuration.
 また、高周波回路10において、第1フィルタ素子31及び第2フィルタ素子32は、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される第1フィルタ入力端子311及び第2フィルタ入力端子321と、アンテナ素子12に接続される第1フィルタ出力端子312及び第2フィルタ出力端子322とをそれぞれ有する。この構成によれば、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを向上できる。 Further, in the high frequency circuit 10, the first filter element 31 and the second filter element 32 are the first filter input terminal 311 and the second filter input terminal 321 connected to the first power amplifier 21 and the second power amplifier 22, respectively. , A first filter output terminal 312 and a second filter output terminal 322 connected to the antenna element 12, respectively. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 connected to the first power amplifier 21 and the second power amplifier 22, respectively, can be improved.
 また、高周波回路10において、金属部材8は、モジュール基板70を平面視したときに、第1フィルタ入力端子311及び第2フィルタ入力端子321間と第1フィルタ出力端子312及び第2フィルタ出力端子322間との両方に位置する。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。 Further, in the high frequency circuit 10, when the module substrate 70 is viewed in a plan view, the metal member 8 is between the first filter input terminal 311 and the second filter input terminal 321 and the first filter output terminal 312 and the second filter output terminal 322. Located both in between. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
 また、高周波回路10において、高周波回路10は、モジュール基板70に配置されるスイッチ集積回路4をさらに備える。スイッチ集積回路4は、第1フィルタ素子31及び第2フィルタ素子32の第1フィルタ入力端子311及び第2フィルタ入力端子321と第1電力増幅器21及び第2電力増幅器22との間にそれぞれ挿入される第1スイッチ41及び第2スイッチ42を有する。この構成によれば、使用するフィルタの切り替えが可能になり、種々の通信方法に対応可能となる。 Further, in the high frequency circuit 10, the high frequency circuit 10 further includes a switch integrated circuit 4 arranged on the module board 70. The switch integrated circuit 4 is inserted between the first filter input terminal 311 and the second filter input terminal 321 of the first filter element 31 and the second filter element 32 and the first power amplifier 21 and the second power amplifier 22, respectively. It has a first switch 41 and a second switch 42. According to this configuration, the filter to be used can be switched, and various communication methods can be supported.
 また、高周波回路10において、スイッチ集積回路4は、モジュール基板70の第2主面70bに配置される。この構成によれば、小型化が図れる。 Further, in the high frequency circuit 10, the switch integrated circuit 4 is arranged on the second main surface 70b of the module board 70. According to this configuration, miniaturization can be achieved.
 また、高周波回路10において、金属部材8は、スイッチ集積回路4に形成されるグランド電極82と、モジュール基板70の第2主面70bに配置されてグランド電極82に接続される接続部材83とを含む。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。 Further, in the high frequency circuit 10, the metal member 8 includes a ground electrode 82 formed in the switch integrated circuit 4 and a connecting member 83 arranged on the second main surface 70b of the module substrate 70 and connected to the ground electrode 82. include. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
 また、高周波回路10において、モジュール基板70を平面視したときに第1スイッチ41と第1フィルタ素子31とが重なる。この構成によれば、第1スイッチ41と第1フィルタ素子31との接続配線の長さを短くできて、第1スイッチ41と第1フィルタ素子31との間での高周波信号の損失を低減できる。 Further, in the high frequency circuit 10, the first switch 41 and the first filter element 31 overlap when the module substrate 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the first switch 41 and the first filter element 31 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced. ..
 また、高周波回路10において、第1スイッチ41は、第1電力増幅器21に接続される第1スイッチ入力端子411と、第1フィルタ素子31の第1フィルタ入力端子311に接続される第1スイッチ出力端子412とを有する。第1フィルタ入力端子311は、モジュール基板70を平面視したときに第1スイッチ41及び第1フィルタ素子31と重なる。この構成によれば、第1スイッチ41と第1フィルタ素子31との接続配線の長さを短くできて、第1スイッチ41と第1フィルタ素子31との間での高周波信号の損失を低減できる。 Further, in the high frequency circuit 10, the first switch 41 is connected to the first switch input terminal 411 connected to the first power amplifier 21 and the first switch output connected to the first filter input terminal 311 of the first filter element 31. It has a terminal 412. The first filter input terminal 311 overlaps with the first switch 41 and the first filter element 31 when the module board 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the first switch 41 and the first filter element 31 can be shortened, and the loss of the high frequency signal between the first switch 41 and the first filter element 31 can be reduced. ..
 また、高周波回路10において、モジュール基板70を平面視したときに第2スイッチ42と第2フィルタ素子32とが重なる。この構成によれば、第2スイッチ42と第2フィルタ素子32との接続配線の長さを短くできて、第2スイッチ42と第2フィルタ素子32との間での高周波信号の損失を低減できる。 Further, in the high frequency circuit 10, the second switch 42 and the second filter element 32 overlap when the module substrate 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the second switch 42 and the second filter element 32 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced. ..
 また、高周波回路10において、第2スイッチ42は、第2電力増幅器22に接続される第2スイッチ入力端子421と、第2フィルタ素子32の第2フィルタ入力端子321に接続される第2スイッチ出力端子422とを有する。第2フィルタ入力端子321は、モジュール基板70を平面視したときに第2スイッチ42及び第2フィルタ素子32と重なる。この構成によれば、第2スイッチ42と第2フィルタ素子32との接続配線の長さを短くできて、第2スイッチ42と第2フィルタ素子32との間での高周波信号の損失を低減できる。 Further, in the high frequency circuit 10, the second switch 42 has a second switch input terminal 421 connected to the second power amplifier 22 and a second switch output connected to the second filter input terminal 321 of the second filter element 32. It has a terminal 422 and. The second filter input terminal 321 overlaps with the second switch 42 and the second filter element 32 when the module board 70 is viewed in a plan view. According to this configuration, the length of the connection wiring between the second switch 42 and the second filter element 32 can be shortened, and the loss of the high frequency signal between the second switch 42 and the second filter element 32 can be reduced. ..
 また、高周波回路10において、第1電力増幅器21は、第1周波数帯域の第1送信信号を増幅する。第2電力増幅器22は、第1周波数帯域と異なる第2周波数帯域の第2送信信号を増幅する。第1フィルタ素子31は、第1周波数帯域を含む第1通過帯域の信号を通過させる。第2フィルタ素子32は、第2周波数帯域を含み第1通過帯域と異なる第2通過帯域の信号を通過させる。この構成によれば、アップリンクで2つの周波数帯域を同時に用いるキャリアアグリゲーション2アップリンク・キャリアアグリゲーションに対応可能である。 Further, in the high frequency circuit 10, the first power amplifier 21 amplifies the first transmission signal in the first frequency band. The second power amplifier 22 amplifies the second transmission signal in the second frequency band different from the first frequency band. The first filter element 31 passes a signal in the first pass band including the first frequency band. The second filter element 32 passes a signal in a second pass band including the second frequency band and different from the first pass band. According to this configuration, it is possible to support carrier aggregation 2 uplink carrier aggregation in which two frequency bands are used simultaneously in the uplink.
 [2.実施の形態2]
 [2.1 構成]
 図4は、実施の形態2にかかる高周波回路10の構成例の平面図であり、図5は、図4のB-B線断面図である。実施の形態2の高周波回路10は、金属部材8の構成、特にシールド部80の構成が、実施の形態1の高周波回路10と異なる。図4の高周波回路10のシールド部80は、貫通孔配線81と、グランド電極82と、接続部材83と、シールド壁84とを含む。貫通孔配線81、グランド電極82、接続部材83及びシールド壁84は、グランドに接続される。
[2. Embodiment 2]
[2.1 Configuration]
FIG. 4 is a plan view of a configuration example of the high frequency circuit 10 according to the second embodiment, and FIG. 5 is a sectional view taken along line BB of FIG. The high frequency circuit 10 of the second embodiment is different from the high frequency circuit 10 of the first embodiment in the configuration of the metal member 8, particularly the configuration of the shield portion 80. The shield portion 80 of the high frequency circuit 10 of FIG. 4 includes a through hole wiring 81, a ground electrode 82, a connection member 83, and a shield wall 84. The through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground.
 シールド壁84は、金属製である。シールド壁84は、例えば、金属板により形成される。シールド壁84の材料は、例えば、銅である。銅は金属のなかでも比較的熱容量が高く、第1フィルタ素子31及び第2フィルタ素子32等の熱源から熱を効率的に吸収でき、放熱性を向上できる。シールド壁84は、図5に示すように、モジュール基板70の第1主面70aに配置される。特に、シールド壁84は、モジュール基板70を平面視したときに、貫通孔配線81と重なる。 The shield wall 84 is made of metal. The shield wall 84 is formed of, for example, a metal plate. The material of the shield wall 84 is, for example, copper. Copper has a relatively high heat capacity among metals, and can efficiently absorb heat from heat sources such as the first filter element 31 and the second filter element 32, and can improve heat dissipation. As shown in FIG. 5, the shield wall 84 is arranged on the first main surface 70a of the module substrate 70. In particular, the shield wall 84 overlaps with the through-hole wiring 81 when the module substrate 70 is viewed in a plan view.
 図5に示すように、シールド壁84の第1主面70aからの高さは、第1フィルタ素子31の第1主面70aからの高さ及び第2フィルタ素子32の第1主面70aからの高さ以上である。シールド壁84の第1主面70aからの高さは、モジュール基板70の厚み方向(図5の上下方向)における、シールド壁84において第1主面70aから最も遠い部分(図5では、シールド壁84の先端)と第1主面70aとの間の寸法である。第1フィルタ素子31の第1主面70aからの高さは、モジュール基板70の厚み方向における、第1フィルタ素子31において第1主面70aから最も遠い部分(図5では、第1フィルタ素子31の上面)と第1主面70aとの間の寸法である。第2フィルタ素子32の第1主面70aからの高さは、モジュール基板70の厚み方向における、第2フィルタ素子32において第1主面70aから最も遠い部分(図5では、第2フィルタ素子32の上面)と第1主面70aとの間の寸法である。第1フィルタ素子31及び第2フィルタ素子32の第1主面70aからの高さは、第1フィルタ素子31及び第2フィルタ素子32それ自体の高さに加えて、金属バンプ74の高さも含んでいる。 As shown in FIG. 5, the height of the shield wall 84 from the first main surface 70a is the height from the first main surface 70a of the first filter element 31 and the height from the first main surface 70a of the second filter element 32. Is above the height of. The height of the shield wall 84 from the first main surface 70a is the portion of the shield wall 84 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (vertical direction in FIG. 5) (shield wall in FIG. 5). It is a dimension between the tip of 84) and the first main surface 70a. The height of the first filter element 31 from the first main surface 70a is the portion of the first filter element 31 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (in FIG. 5, the first filter element 31). It is a dimension between the upper surface) and the first main surface 70a. The height of the second filter element 32 from the first main surface 70a is the portion of the second filter element 32 farthest from the first main surface 70a in the thickness direction of the module substrate 70 (in FIG. 5, the second filter element 32). It is a dimension between the upper surface) and the first main surface 70a. The height of the first filter element 31 and the second filter element 32 from the first main surface 70a includes the height of the metal bump 74 in addition to the height of the first filter element 31 and the second filter element 32 itself. I'm out.
 シールド壁84は、貫通孔配線81及び金属層91に電気的に接続される。ここで、「電気的に接続される」は、「直接的又は間接的に接触して電気的に接続される」ことを意味する。本実施の形態では、シールド壁84の基端が貫通孔配線81に直接的に接触している。シールド壁84の先端が金属層91に直接的に接触している。つまり、シールド壁84は、貫通孔配線81及び金属層91に直接的に接触して電気的に接続される。シールド壁84は、その先端及び基端の少なくとも2か所でグランドに接続されるので、電磁界遮蔽機能が強化される。 The shield wall 84 is electrically connected to the through hole wiring 81 and the metal layer 91. Here, "electrically connected" means "directly or indirectly contacted and electrically connected". In this embodiment, the base end of the shield wall 84 is in direct contact with the through hole wiring 81. The tip of the shield wall 84 is in direct contact with the metal layer 91. That is, the shield wall 84 is in direct contact with the through-hole wiring 81 and the metal layer 91 and is electrically connected. Since the shield wall 84 is connected to the ground at at least two places, the tip end and the base end, the electromagnetic field shielding function is enhanced.
 シールド壁84は、図4に示すように、モジュール基板70を平面視したときに、第1フィルタ素子31及び第2フィルタ素子32の間全体にわたって位置する。これは、第1フィルタ素子31内の任意の点と第2フィルタ素子32内の任意の点とを結ぶ複数の線分の全てがシールド壁84を通ることを意味する。したがって、シールド壁84は、モジュール基板70を平面視したときに、第1フィルタ入力端子311及び第2フィルタ入力端子321間と第1フィルタ出力端子312及び第2フィルタ出力端子322間に位置する。図5に示すように、シールド部80において、貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、相互に接続される。貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、上述したように、グランドに接続される。 As shown in FIG. 4, the shield wall 84 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. This means that all of the plurality of line segments connecting an arbitrary point in the first filter element 31 and an arbitrary point in the second filter element 32 pass through the shield wall 84. Therefore, the shield wall 84 is located between the first filter input terminal 311 and the second filter input terminal 321 and between the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. As shown in FIG. 5, in the shield portion 80, the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other. The through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground as described above.
 以上述べた高周波回路10では、金属部材8は、モジュール基板70の第1主面70aに配置されるシールド壁84を含む。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。また、高周波回路10において、シールド壁84の第1主面70aからの高さは、第1フィルタ素子31の第1主面70aからの高さ及び第2フィルタ素子32の第1主面70aからの高さ以上である。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。また、高周波回路10は、第1フィルタ素子31及び第2フィルタ素子32を封止する樹脂部材75と、第1フィルタ素子31及び第2フィルタ素子32に対してモジュール基板70の第1主面70aとは反対側に位置するように樹脂部材75の表面に配置され、グランドに接続される金属層91とを備える。シールド壁84は、金属層91に電気的に接続される。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。 In the high frequency circuit 10 described above, the metal member 8 includes a shield wall 84 arranged on the first main surface 70a of the module substrate 70. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. Further, in the high frequency circuit 10, the height of the shield wall 84 from the first main surface 70a is the height from the first main surface 70a of the first filter element 31 and the height from the first main surface 70a of the second filter element 32. Is above the height of. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. Further, in the high frequency circuit 10, the resin member 75 that seals the first filter element 31 and the second filter element 32, and the first main surface 70a of the module substrate 70 with respect to the first filter element 31 and the second filter element 32. A metal layer 91 which is arranged on the surface of the resin member 75 so as to be located on the opposite side to the ground and is connected to the ground is provided. The shield wall 84 is electrically connected to the metal layer 91. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved.
 [3.実施の形態3]
 図6は、実施の形態3にかかる高周波回路10の構成例の断面図である。実施の形態3の高周波回路10は、金属部材8の構成、特にシールド部80の構成が、実施の形態2の高周波回路10と異なる。図6の高周波回路10のシールド部80は、貫通孔配線81と、グランド電極82と、接続部材83と、シールド壁84とを含む。
[3. Embodiment 3]
FIG. 6 is a cross-sectional view of a configuration example of the high frequency circuit 10 according to the third embodiment. The high frequency circuit 10 of the third embodiment is different from the high frequency circuit 10 of the second embodiment in the configuration of the metal member 8, particularly the configuration of the shield portion 80. The shield portion 80 of the high frequency circuit 10 of FIG. 6 includes a through hole wiring 81, a ground electrode 82, a connection member 83, and a shield wall 84.
 グランド電極82は、シリコン貫通電極(Through-Silicon Via;TSV)である。シリコン貫通電極は、スイッチ集積回路4のシリコン基板を貫通する電極である。 The ground electrode 82 is a through silicon via (Through-Silicon Via; TSV). The through silicon via is an electrode that penetrates the silicon substrate of the switch integrated circuit 4.
 図6に示すように、シールド部80において、貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、相互に接続される。貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、上述したように、グランドに接続される。図6では、高周波回路10全体を貫通するように、グランド電位となるシールド部80が設けられる。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。また、第1フィルタ素子31及び第2フィルタ素子32で発生した熱を、シールド部80によって外部に放散させることができる。これによって、放熱性の向上が図れる。また、第1フィルタ素子31及び第2フィルタ素子32間の熱の伝達を抑制できる。 As shown in FIG. 6, in the shield portion 80, the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other. The through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground as described above. In FIG. 6, a shield portion 80 serving as a ground potential is provided so as to penetrate the entire high frequency circuit 10. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. Further, the heat generated by the first filter element 31 and the second filter element 32 can be dissipated to the outside by the shield portion 80. As a result, heat dissipation can be improved. In addition, heat transfer between the first filter element 31 and the second filter element 32 can be suppressed.
 以上述べた高周波回路10では、グランド電極82は、スイッチ集積回路4のシリコン貫通電極である。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上できる。このように、本実施の形態において、シールド部80は、モジュール基板70の第1主面70aと第2主面70bとの間に形成される貫通孔配線81と、モジュール基板70の第1主面70aに配置されて貫通孔配線81に電気的に接続されるとともに金属層91に電気的に接続されるシールド壁84と、スイッチ集積回路4のシリコン貫通電極であるグランド電極82と、モジュール基板70の第2主面70bに配置されて貫通孔配線81とグランド電極82とを接続する接続部材83とを含む。この構成によれば、第1フィルタ素子31及び第2フィルタ素子32間のアイソレーションを更に向上でき、更に、放熱性の向上が図れる。また、第1フィルタ素子31及び第2フィルタ素子32間の熱の伝達を抑制できる。 In the high frequency circuit 10 described above, the ground electrode 82 is a through silicon via of the switch integrated circuit 4. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved. As described above, in the present embodiment, the shield portion 80 includes the through-hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module board 70, and the first main surface of the module board 70. A shield wall 84 arranged on the surface 70a and electrically connected to the through-hole wiring 81 and electrically connected to the metal layer 91, a ground electrode 82 which is a silicon through electrode of the switch integrated circuit 4, and a module substrate. It includes a connecting member 83 arranged on the second main surface 70b of the 70 and connecting the through-hole wiring 81 and the ground electrode 82. According to this configuration, the isolation between the first filter element 31 and the second filter element 32 can be further improved, and the heat dissipation can be further improved. In addition, heat transfer between the first filter element 31 and the second filter element 32 can be suppressed.
 [4.実施の形態4]
 図7は、実施の形態4にかかる高周波回路10の構成例の断面図である。実施の形態4の高周波回路10は、第1フィルタ素子31の構成が、実施の形態3の高周波回路10と異なる。
[4. Embodiment 4]
FIG. 7 is a cross-sectional view of a configuration example of the high frequency circuit 10 according to the fourth embodiment. The high frequency circuit 10 of the fourth embodiment has a different configuration of the first filter element 31 from the high frequency circuit 10 of the third embodiment.
 本実施の形態において、第1電力増幅器21及び第2電力増幅器22は、それぞれ異なるパワークラスに対応する。パワークラスとは、最大出力パワー等で定義される端末の出力パワーの分類であり、値が小さいほど高いパワーの出力に対応することを示す。本実施の形態では、第1電力増幅器21は、第1パワークラスに対応する。第2電力増幅器22は、第2パワークラスに対応する。第1パワークラスの最大出力パワーは、第2パワークラスの最大出力パワーよりも大きい。例えば、第1パワークラスは、ハイパワークラスであり、第2パワークラスは、ノンハイパワークラスである。ハイパワークラスの最大出力パワーは、ノンハイパワークラスの最大出力パワーよりも大きい。最大出力パワーの測定は、例えば、3GPP等によって定義された方法で行われる。ハイパワークラスは、所定値未満の数値で表される。ノンハイパワークラスは、所定値以上の数値で表される。所定値としては、例えば、3を用いることができる。この場合、ハイパワークラスは、パワークラス1、1.5及び2を含み、ノンハイパワークラスは、パワークラス3及び4を含む。 In the present embodiment, the first power amplifier 21 and the second power amplifier 22 correspond to different power classes. The power class is a classification of the output power of the terminal defined by the maximum output power or the like, and the smaller the value, the higher the power output. In this embodiment, the first power amplifier 21 corresponds to the first power class. The second power amplifier 22 corresponds to the second power class. The maximum output power of the first power class is larger than the maximum output power of the second power class. For example, the first power class is a high power class, and the second power class is a non-high power class. The maximum output power of the high power class is larger than the maximum output power of the non-high power class. The measurement of the maximum output power is performed by a method defined by, for example, 3GPP or the like. The high power class is represented by a numerical value less than a predetermined value. The non-high power class is represented by a numerical value equal to or higher than a predetermined value. As the predetermined value, for example, 3 can be used. In this case, the high power class includes power classes 1, 1.5 and 2, and the non-high power class includes power classes 3 and 4.
 つまり、第1電力増幅器21は、第2電力増幅器22よりも高いパワーの出力に対応する。よって、第1電力増幅器21に対応する第1フィルタ素子31では、第2電力増幅器22に対応する第2フィルタ素子32よりも、高周波回路10の動作時の発熱が大きい。そこで、図7に示すように、第1フィルタ素子31は、金属層91に接触する。これによって、第1フィルタ素子31は、金属層91に熱的に結合される。これによって、第1フィルタ素子31で発生した熱が金属層91に伝達されて、外部に放散される。本実施の形態では、第1フィルタ素子31は、金属層91に直接的に接触することで、熱的に結合される。 That is, the first power amplifier 21 corresponds to the output of higher power than the second power amplifier 22. Therefore, the first filter element 31 corresponding to the first power amplifier 21 generates more heat during operation of the high frequency circuit 10 than the second filter element 32 corresponding to the second power amplifier 22. Therefore, as shown in FIG. 7, the first filter element 31 comes into contact with the metal layer 91. As a result, the first filter element 31 is thermally coupled to the metal layer 91. As a result, the heat generated by the first filter element 31 is transferred to the metal layer 91 and dissipated to the outside. In the present embodiment, the first filter element 31 is thermally coupled by being in direct contact with the metal layer 91.
 以上述べたように、第1電力増幅器21は、第1パワークラスに対応する。第2電力増幅器22は、第2パワークラスに対応する。第1パワークラスの最大出力パワーは、第2パワークラスの最大出力パワーよりも大きい。第1フィルタ素子31は、金属層91に接触する。この構成によれば、放熱性を向上できる。 As described above, the first power amplifier 21 corresponds to the first power class. The second power amplifier 22 corresponds to the second power class. The maximum output power of the first power class is larger than the maximum output power of the second power class. The first filter element 31 comes into contact with the metal layer 91. According to this configuration, heat dissipation can be improved.
 図8は、実施の形態4にかかる高周波回路10の別の構成例の断面図である。図8の高周波回路10では、第1フィルタ素子31及び第2フィルタ素子32の各々が、金属層91に接触する。これによって、第1フィルタ素子31及び第2フィルタ素子32で発生した熱が金属層91に伝達されて、外部に放散される。図8において、第1フィルタ素子31及び第2フィルタ素子32は、金属層91に直接的に接触することで、熱的に結合される。 FIG. 8 is a cross-sectional view of another configuration example of the high frequency circuit 10 according to the fourth embodiment. In the high frequency circuit 10 of FIG. 8, each of the first filter element 31 and the second filter element 32 comes into contact with the metal layer 91. As a result, the heat generated by the first filter element 31 and the second filter element 32 is transferred to the metal layer 91 and dissipated to the outside. In FIG. 8, the first filter element 31 and the second filter element 32 are thermally coupled by being in direct contact with the metal layer 91.
 このように、高周波回路10は、第1フィルタ素子31及び第2フィルタ素子32を封止する樹脂部材75と、第1フィルタ素子31及び第2フィルタ素子32に対してモジュール基板70の第1主面70aとは反対側に位置するように樹脂部材75の表面に配置され、グランドに接続される金属層91とを備える。第1フィルタ素子31及び第2フィルタ素子32の各々は、金属層91に接触する。この構成によれば、放熱性を向上できる。 As described above, in the high frequency circuit 10, the resin member 75 that seals the first filter element 31 and the second filter element 32, and the first main module substrate 70 with respect to the first filter element 31 and the second filter element 32. A metal layer 91 which is arranged on the surface of the resin member 75 so as to be located on the side opposite to the surface 70a and is connected to the ground is provided. Each of the first filter element 31 and the second filter element 32 comes into contact with the metal layer 91. According to this configuration, heat dissipation can be improved.
 なお、図8の場合、第1電力増幅器21及び第2電力増幅器22は、それぞれ異なるパワークラスに対応していなくてもよく、同じパワークラスに対応していてもよい。また、図8において、金属部材8は、必ずしもシールド壁84を備えていなくてもよい。 In the case of FIG. 8, the first power amplifier 21 and the second power amplifier 22 do not have to correspond to different power classes, and may correspond to the same power class. Further, in FIG. 8, the metal member 8 does not necessarily have to include the shield wall 84.
 [5.実施の形態5]
 図9は、実施の形態5にかかる高周波回路10Aを含む通信装置1Aの構成例の回路図である。図10は、図9の高周波回路10Aの構成例の平面図であり、図11は、図10のC-C線断面図である。
[5. Embodiment 5]
FIG. 9 is a circuit diagram of a configuration example of the communication device 1A including the high frequency circuit 10A according to the fifth embodiment. 10 is a plan view of a configuration example of the high frequency circuit 10A of FIG. 9, and FIG. 11 is a sectional view taken along line CC of FIG.
 図9の通信装置1Aは、高周波回路10Aと、信号処理回路11と、アンテナ素子12とを備える。 The communication device 1A of FIG. 9 includes a high frequency circuit 10A, a signal processing circuit 11, and an antenna element 12.
 図9に示すように、高周波回路10Aは、第1電力増幅器21と、第2電力増幅器22と、第1フィルタ素子31Aと、第2フィルタ素子32Aと、スイッチ集積回路4Aと、第1整合回路51と、第2整合回路52と、アンテナスイッチ6とを備える。また、図10及び図11に示すように、高周波回路10Aは、モジュール基板70と、金属部材8と、保護部材9とを備える。 As shown in FIG. 9, the high frequency circuit 10A includes a first power amplifier 21, a second power amplifier 22, a first filter element 31A, a second filter element 32A, a switch integrated circuit 4A, and a first matching circuit. A 51, a second matching circuit 52, and an antenna switch 6 are provided. Further, as shown in FIGS. 10 and 11, the high frequency circuit 10A includes a module substrate 70, a metal member 8, and a protective member 9.
 第1フィルタ素子31A及び第2フィルタ素子32Aは、図9に示すように、第1電力増幅器21及び第2電力増幅器22にそれぞれ接続される。より詳細には、第1フィルタ素子31A及び第2フィルタ素子32Aは、第1電力増幅器21及び第2電力増幅器22の出力端子にそれぞれ接続される。 As shown in FIG. 9, the first filter element 31A and the second filter element 32A are connected to the first power amplifier 21 and the second power amplifier 22, respectively. More specifically, the first filter element 31A and the second filter element 32A are connected to the output terminals of the first power amplifier 21 and the second power amplifier 22, respectively.
 第1フィルタ素子31A及び第2フィルタ素子32Aは、例えば、弾性波フィルタである。本実施の形態では、第1フィルタ素子31A及び第2フィルタ素子32Aは、例えば、SAWフィルタである。第1フィルタ素子31Aは、第1基板310により構成される。第2フィルタ素子32Aは、第2基板320により構成される。つまり、第1フィルタ素子31A及び第2フィルタ素子32Aは、別々の第1基板310及び第2基板320を用いて構成される。第1基板310及び第2基板320は、例えば、圧電層を含む圧電体基板である。本実施の形態では、第1基板310及び第2基板320は、矩形の板状である。 The first filter element 31A and the second filter element 32A are, for example, elastic wave filters. In the present embodiment, the first filter element 31A and the second filter element 32A are, for example, SAW filters. The first filter element 31A is composed of a first substrate 310. The second filter element 32A is composed of the second substrate 320. That is, the first filter element 31A and the second filter element 32A are configured by using separate first substrate 310 and second substrate 320. The first substrate 310 and the second substrate 320 are, for example, piezoelectric substrates including a piezoelectric layer. In the present embodiment, the first substrate 310 and the second substrate 320 have a rectangular plate shape.
 図9に示すように、第1フィルタ素子31Aは、通過帯域が異なる複数のフィルタ要素314を備える。図10に示すように、第1フィルタ素子31Aは、複数のフィルタ要素314にそれぞれ対応する複数の第1フィルタ入力端子311と、複数のフィルタ要素314にそれぞれ対応する複数の第1フィルタ出力端子312とを有する。本実施の形態において、第1フィルタ素子31Aは、2つのフィルタ要素314-1,314-2と、2つのフィルタ要素314-1,314-2にそれぞれ対応する2つの第1フィルタ入力端子311-1,311-2と、2つのフィルタ要素314-1,314-2にそれぞれ対応する2つの第1フィルタ出力端子312-1,312-2とを有する。より詳細には、第1フィルタ入力端子311-1,311-2は、フィルタ要素314-1,314-2の入力側に接続される。第1フィルタ出力端子312-1,312-2は、フィルタ要素314-1,314-2の出力側に接続される。フィルタ要素314-1,314-2は、例えば、IDT電極を含む。 As shown in FIG. 9, the first filter element 31A includes a plurality of filter elements 314 having different pass bands. As shown in FIG. 10, the first filter element 31A has a plurality of first filter input terminals 311 corresponding to the plurality of filter elements 314 and a plurality of first filter output terminals 312 corresponding to the plurality of filter elements 314, respectively. And have. In the present embodiment, the first filter element 31A has two first filter input terminals 311- corresponding to two filter elements 314-1,314-2 and two filter elements 314-1,314-2, respectively. It has 1,311-2 and two first filter output terminals 312-1,312-2 corresponding to the two filter elements 314-1,314-2, respectively. More specifically, the first filter input terminals 311-1 and 311-2 are connected to the input side of the filter elements 314-1,314-2. The first filter output terminals 312-1, 312-2 are connected to the output side of the filter elements 314-1, 314-2. Filter elements 314-1,314-2 include, for example, IDT electrodes.
 このように、第1フィルタ素子31Aは、第1フィルタ入力端子311-1,311-2と、第1フィルタ出力端子312-1,312-2と、2つのグランド端子313とを備える。第1フィルタ入力端子311-1,311-2と、第1フィルタ出力端子312-1,312-2とは、第1基板310の一面の四隅に配置される。第1フィルタ入力端子311-1及び第1フィルタ出力端子312-1の組がシールド部80側にあり、第1フィルタ入力端子311-2及び第1フィルタ出力端子312-2の組がシールド部80とは反対側にある。2つのグランド端子313は、第1フィルタ入力端子311-1及び第1フィルタ出力端子312-1の間、及び、第1フィルタ入力端子311-2及び第1フィルタ出力端子312-2の間にそれぞれある。 As described above, the first filter element 31A includes a first filter input terminal 311-1, 311-2, a first filter output terminal 312-1, 312-2, and two ground terminals 313. The first filter input terminals 311-1 and 311-2 and the first filter output terminals 312-1, 312-2 are arranged at the four corners of one surface of the first substrate 310. The set of the first filter input terminal 311-1 and the first filter output terminal 312-1 is on the shield portion 80 side, and the set of the first filter input terminal 311-2 and the first filter output terminal 312-2 is the shield portion 80. Is on the opposite side. The two ground terminals 313 are located between the first filter input terminal 311-1 and the first filter output terminal 312-1 and between the first filter input terminal 311-2 and the first filter output terminal 312-2, respectively. be.
 図9に示すように、第2フィルタ素子32Aは、通過帯域が異なる複数のフィルタ要素324を備える。図10に示すように、第2フィルタ素子32Aは、複数のフィルタ要素324にそれぞれ対応する複数の第2フィルタ入力端子321と、複数のフィルタ要素324にそれぞれ対応する複数の第2フィルタ出力端子322とを有する。本実施の形態において、第2フィルタ素子32Aは、2つのフィルタ要素324-1,324-2と、2つのフィルタ要素324-1,324-2にそれぞれ対応する2つの第2フィルタ入力端子321-1,321-2と、2つのフィルタ要素324-1,324-2にそれぞれ対応する2つの第2フィルタ出力端子322-1,322-2とを有する。より詳細には、第2フィルタ入力端子321-1,321-2は、フィルタ要素324-1,324-2の入力側に接続される。第2フィルタ出力端子322-1,322-2は、フィルタ要素324-1,324-2の出力側に接続される。フィルタ要素324-1,324-2は、例えば、IDT電極を含む。 As shown in FIG. 9, the second filter element 32A includes a plurality of filter elements 324 having different pass bands. As shown in FIG. 10, the second filter element 32A has a plurality of second filter input terminals 321 corresponding to the plurality of filter elements 324 and a plurality of second filter output terminals 322 corresponding to the plurality of filter elements 324, respectively. And have. In the present embodiment, the second filter element 32A has two second filter input terminals 321 to correspond to two filter elements 324-1,324-2 and two filter elements 324-1,324-2, respectively. It has 1,321-2 and two second filter output terminals 322-1,322-2 corresponding to the two filter elements 324-1,324-2, respectively. More specifically, the second filter input terminals 321-1 and 321-2 are connected to the input side of the filter elements 324-1,324-2. The second filter output terminals 322-1, 322-2 are connected to the output side of the filter elements 324-1,324-2. Filter elements 324-1,324-2 include, for example, IDT electrodes.
 このように、第2フィルタ素子32Aは、第2フィルタ入力端子321-1,321-2と、第2フィルタ出力端子322-1,322-2と、2つのグランド端子323とを備える。第2フィルタ入力端子321-1,321-2と、第2フィルタ出力端子322-1,322-2とは、第2基板320の一面の四隅に配置される。第2フィルタ入力端子321-1及び第2フィルタ出力端子322-1の組がシールド部80側にあり、第2フィルタ入力端子321-2及び第2フィルタ出力端子322-2の組がシールド部80とは反対側にある。2つのグランド端子323は、第2フィルタ入力端子321-1及び第2フィルタ出力端子322-1の間、及び、第2フィルタ入力端子321-2及び第2フィルタ出力端子322-2の間にそれぞれある。 As described above, the second filter element 32A includes a second filter input terminal 321-1 and 321-2, a second filter output terminal 322-1,322-2, and two ground terminals 323. The second filter input terminals 321-1, 321-2 and the second filter output terminals 322-1, 322-2 are arranged at the four corners of one surface of the second substrate 320. The set of the second filter input terminal 321-1 and the second filter output terminal 322-1 is on the shield portion 80 side, and the set of the second filter input terminal 321-2 and the second filter output terminal 322-2 is the shield portion 80. Is on the opposite side. The two ground terminals 323 are located between the second filter input terminal 321-1 and the second filter output terminal 322-1 and between the second filter input terminal 321-2 and the second filter output terminal 322-2, respectively. be.
 図11に示すように、第1フィルタ素子31Aと第2フィルタ素子32Aとは、モジュール基板70の第1主面70aに並べて配置されている。第1フィルタ素子31Aでは、第1フィルタ入力端子311-1及び第1フィルタ出力端子312-1が、第1フィルタ入力端子311-2及び第1フィルタ出力端子312-2よりも第2フィルタ素子32A側に位置する。第2フィルタ素子32Aは、第2フィルタ入力端子321-1及び第2フィルタ出力端子322-1が、第2フィルタ入力端子321-2及び第2フィルタ出力端子322-2よりも第1フィルタ素子31A側に位置する。第1フィルタ素子31Aの第1フィルタ入力端子311-1,311-2、第1フィルタ出力端子312-1,312-2、及び2つのグランド端子313は、金属バンプ74を用いて、それぞれモジュール基板70の第1主面70aに固定される(図11参照)。第2フィルタ素子32Aの第2フィルタ入力端子321-1,321-2、第2フィルタ出力端子322-1,322-2、及び2つのグランド端子323は、金属バンプ74を用いて、それぞれモジュール基板70の第1主面70aに固定される(図11参照)。 As shown in FIG. 11, the first filter element 31A and the second filter element 32A are arranged side by side on the first main surface 70a of the module substrate 70. In the first filter element 31A, the first filter input terminal 311-1 and the first filter output terminal 312-1 are the second filter element 32A rather than the first filter input terminal 311-2 and the first filter output terminal 312-2. Located on the side. In the second filter element 32A, the second filter input terminal 321-1 and the second filter output terminal 322-1 are the first filter element 31A rather than the second filter input terminal 321-2 and the second filter output terminal 322-2. Located on the side. The first filter input terminal 311-1, 311-2, the first filter output terminal 312-1, 312-2, and the two ground terminals 313 of the first filter element 31A are modular boards using metal bumps 74, respectively. It is fixed to the first main surface 70a of 70 (see FIG. 11). The second filter input terminal 321-1, 321-2, the second filter output terminal 322-1, 322-2, and the two ground terminals 323 of the second filter element 32A are modular boards using metal bumps 74, respectively. It is fixed to the first main surface 70a of 70 (see FIG. 11).
 図10に示すように、モジュール基板70には、電子部品53~56が設けられる。電子部品53,55は、第1フィルタ素子31のフィルタ要素314-1,314-2とアンテナスイッチ6との間に接続される。電子部品53,55は、例えば、第1フィルタ素子31のフィルタ要素314-1,314-2とアンテナ素子12との間のインピーダンス整合をとるための整合回路である。電子部品54,56は、第2フィルタ素子32のフィルタ要素324-1,324-2とアンテナスイッチ6との間に接続される。電子部品54,56は、例えば、第2フィルタ素子32のフィルタ要素324-1,324-2とアンテナ素子12との間のインピーダンス整合をとるための整合回路である。電子部品53~56は、例えば、1以上のインダクタ(コイル、トランス等)と1以上のキャパシタとの少なくとも一方を含む。電子部品53~56は、例えば、表面実装型の電子部品である。なお、電子部品53~56は、表面実装型の電子部品ではなく、モジュール基板70に形成される導体パターン等で構成されてもよい。なお、図面を簡略化するために、図9では電子部品53~56の図示を省略している。 As shown in FIG. 10, the module board 70 is provided with electronic components 53 to 56. The electronic components 53 and 55 are connected between the filter elements 314-1,314-2 of the first filter element 31 and the antenna switch 6. The electronic components 53 and 55 are, for example, matching circuits for matching the impedance between the filter elements 314-1,314-2 of the first filter element 31 and the antenna element 12. The electronic components 54 and 56 are connected between the filter elements 324-1,324-2 of the second filter element 32 and the antenna switch 6. The electronic components 54 and 56 are, for example, matching circuits for matching the impedance between the filter elements 324-1,324-2 of the second filter element 32 and the antenna element 12. The electronic components 53 to 56 include, for example, at least one of one or more inductors (coils, transformers, etc.) and one or more capacitors. The electronic components 53 to 56 are, for example, surface mount type electronic components. The electronic components 53 to 56 may be formed of a conductor pattern or the like formed on the module substrate 70 instead of the surface mount type electronic components. In addition, in order to simplify the drawing, the illustration of the electronic components 53 to 56 is omitted in FIG.
 スイッチ集積回路4Aは、半導体基板40により構成される。スイッチ集積回路4Aは、第1スイッチ41Aと第2スイッチ42Aとを含む。第1スイッチ41Aと第2スイッチ42Aとは、1チップに集積されている。半導体基板40は、例えばシリコン基板である。 The switch integrated circuit 4A is composed of the semiconductor substrate 40. The switch integrated circuit 4A includes a first switch 41A and a second switch 42A. The first switch 41A and the second switch 42A are integrated on one chip. The semiconductor substrate 40 is, for example, a silicon substrate.
 第1スイッチ41A及び第2スイッチ42Aは、周波数帯域を切り替えるためのスイッチ(BSSW)である。第1スイッチ41Aは、第1電力増幅器21とアンテナ素子12との間に挿入する第1フィルタ素子31Aのフィルタ要素314を切り替えるために用いられる。第2スイッチ42Aは、第2電力増幅器22とアンテナ素子12との間に挿入する第2フィルタ素子32Aのフィルタ要素324を切り替えるために用いられる。 The first switch 41A and the second switch 42A are switches (BSSW) for switching the frequency band. The first switch 41A is used to switch the filter element 314 of the first filter element 31A inserted between the first power amplifier 21 and the antenna element 12. The second switch 42A is used to switch the filter element 324 of the second filter element 32A inserted between the second power amplifier 22 and the antenna element 12.
 第1スイッチ41Aは、第1電力増幅器21に接続される第1スイッチ入力端子411と、第1フィルタ素子31Aの複数の第1フィルタ入力端子311にそれぞれ接続される複数の第1スイッチ出力端子412とを有し、第1スイッチ入力端子411を複数の第1スイッチ出力端子412のいずれか一つに接続するように構成される。本実施の形態において、第1スイッチ41Aは、第1フィルタ素子31Aの2つの第1フィルタ入力端子311-1,311-2にそれぞれ接続される2つの第1スイッチ出力端子412-1,412-2を有する。第1スイッチ41Aは、第1スイッチ入力端子411を2つの第1スイッチ出力端子412-1,412-2のいずれか一つに接続するように構成される。 The first switch 41A has a first switch input terminal 411 connected to the first power amplifier 21, and a plurality of first switch output terminals 412 connected to a plurality of first filter input terminals 311 of the first filter element 31A, respectively. The first switch input terminal 411 is configured to be connected to any one of the plurality of first switch output terminals 412. In the present embodiment, the first switch 41A has two first switch output terminals 421-1,421-2 connected to two first filter input terminals 311-1 and 311-2 of the first filter element 31A, respectively. Has 2. The first switch 41A is configured to connect the first switch input terminal 411 to any one of the two first switch output terminals 421-1, 412-2.
 第2スイッチ42Aは、第2電力増幅器22に接続される第2スイッチ入力端子421と、第2フィルタ素子32Aの複数の第2フィルタ入力端子321にそれぞれ接続される複数の第2スイッチ出力端子422とを有し、第2スイッチ入力端子421を複数の第2スイッチ出力端子422のいずれか一つに接続するように構成される。本実施の形態において、第2スイッチ42Aは、第2フィルタ素子32Aの2つの第2フィルタ入力端子321-1,321-2にそれぞれ接続される2つの第2スイッチ出力端子422-1,422-2を有する。第2スイッチ42Aは、第2スイッチ入力端子421を2つの第2スイッチ出力端子422-1,422-2のいずれか一つに接続するように構成される。 The second switch 42A has a second switch input terminal 421 connected to the second power amplifier 22 and a plurality of second switch output terminals 422 connected to a plurality of second filter input terminals 321 of the second filter element 32A, respectively. The second switch input terminal 421 is configured to be connected to any one of the plurality of second switch output terminals 422. In the present embodiment, the second switch 42A has two second switch output terminals 422-1,422-two connected to the two second filter input terminals 321-1 and 321-2 of the second filter element 32A, respectively. Has 2. The second switch 42A is configured to connect the second switch input terminal 421 to any one of the two second switch output terminals 422-1,422-2.
 図11に示すように、スイッチ集積回路4Aは、モジュール基板70の第2主面70bに、モジュール基板70の平面視において第1フィルタ素子31A及び第2フィルタ素子32Aと重なるように配置されている。より詳細には、スイッチ集積回路4Aは、モジュール基板70を平面視したときに第1スイッチ41Aと第1フィルタ素子31Aとが重なる重複領域R1が存在するように、配置される。つまり、モジュール基板70を平面視したときに第1スイッチ41Aと第1フィルタ素子31Aとが重なる。本実施の形態では、第1フィルタ入力端子311-1及び第1スイッチ出力端子412-2が、モジュール基板70を平面視したときに第1スイッチ41Aと第1フィルタ素子31Aとが重なる重複領域R1に位置する。つまり、第1フィルタ入力端子311-1及び第1スイッチ出力端子412-2が、モジュール基板70を平面視したときに第1スイッチ41A及び第1フィルタ素子31Aと重なる。スイッチ集積回路4Aは、モジュール基板70を平面視したときに第2スイッチ42Aと第2フィルタ素子32Aとが重なる重複領域R2が存在するように、配置される。つまり、モジュール基板70を平面視したときに第2スイッチ42Aと第2フィルタ素子32Aとが重なる。本実施の形態では、第2フィルタ入力端子321-1及び第2スイッチ出力端子422-2が、モジュール基板70を平面視したときに第2スイッチ42Aと第2フィルタ素子32Aとが重なる重複領域R2に位置する。つまり、第2フィルタ入力端子321-1及び第2スイッチ出力端子422-2が、モジュール基板70を平面視したときに第2スイッチ42A及び第2フィルタ素子32Aと重なる。図11に示すように、スイッチ集積回路4Aの第1スイッチ入力端子411、第1スイッチ出力端子412-1,412-2、第2スイッチ入力端子421及び第2スイッチ出力端子422-1,422-2は、金属バンプ74を用いて、それぞれモジュール基板70の第2主面70bに固定される。金属バンプ74は、例えば、はんだバンプ、金バンプ等である。 As shown in FIG. 11, the switch integrated circuit 4A is arranged on the second main surface 70b of the module substrate 70 so as to overlap the first filter element 31A and the second filter element 32A in the plan view of the module substrate 70. .. More specifically, the switch integrated circuit 4A is arranged so that there is an overlapping region R1 in which the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. That is, the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. In the present embodiment, the first filter input terminal 311-1 and the first switch output terminal 412-2 overlap region R1 in which the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. Located in. That is, the first filter input terminal 311-1 and the first switch output terminal 412-2 overlap with the first switch 41A and the first filter element 31A when the module substrate 70 is viewed in a plan view. The switch integrated circuit 4A is arranged so that there is an overlapping region R2 in which the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. That is, the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. In the present embodiment, the second filter input terminal 321-1 and the second switch output terminal 422-2 overlap in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. Located in. That is, the second filter input terminal 321-1 and the second switch output terminal 422-2 overlap with the second switch 42A and the second filter element 32A when the module substrate 70 is viewed in a plan view. As shown in FIG. 11, the first switch input terminal 411, the first switch output terminal 421-1,412-2, the second switch input terminal 421 and the second switch output terminal 422-1,422- of the switch integrated circuit 4A. 2 is fixed to the second main surface 70b of the module substrate 70, respectively, by using the metal bump 74. The metal bump 74 is, for example, a solder bump, a gold bump, or the like.
 図11に示すように、第1スイッチ41Aの第1スイッチ出力端子412-1,412-2は、第1フィルタ素子31Aの第1フィルタ入力端子311-1,311-2に、モジュール基板70の内部に設けられる第1接続配線731-1,731-2を介して、それぞれ接続される。上述したように、第1フィルタ入力端子311-1は、モジュール基板70を平面視したときに第1スイッチ41Aと第1フィルタ素子31Aとが重なる重複領域R1に位置する。そのため、第1接続配線731-1の長さを短くできる。よって、第1スイッチ41Aと第1フィルタ素子31Aとの間での高周波信号の損失を低減できる。上述したように、第1スイッチ出力端子412-2は、モジュール基板70を平面視したときに第1スイッチ41Aと第1フィルタ素子31Aとが重なる重複領域R1に位置する。そのため、第1接続配線731-2の長さを短くできる。よって、第1スイッチ41Aと第1フィルタ素子31Aとの間での高周波信号の損失を低減できる。 As shown in FIG. 11, the first switch output terminals 421-1, 412-2 of the first switch 41A are connected to the first filter input terminals 311-1 and 311-2 of the first filter element 31A of the module board 70. They are connected to each other via the first connection wirings 731-1, 731-2 provided inside. As described above, the first filter input terminal 311-1 is located in the overlapping region R1 where the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731-1 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced. As described above, the first switch output terminal 412-2 is located in the overlapping region R1 where the first switch 41A and the first filter element 31A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the first connection wiring 731-2 can be shortened. Therefore, the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced.
 図11に示すように、第2スイッチ42Aの第2スイッチ出力端子422-1,422-2は、第2フィルタ素子32Aの第2フィルタ入力端子321-1,321-2に、モジュール基板70の内部に設けられる第2接続配線732-1,732-2を介して、それぞれ接続される。上述したように、第2フィルタ入力端子321-1は、モジュール基板70を平面視したときに第2スイッチ42Aと第2フィルタ素子32Aとが重なる重複領域R2に位置する。そのため、第2接続配線732-1の長さを短くできる。よって、第2スイッチ42Aと第2フィルタ素子32Aとの間での高周波信号の損失を低減できる。上述したように、第2スイッチ出力端子422-2は、モジュール基板70を平面視したときに第2スイッチ42Aと第2フィルタ素子32Aとが重なる重複領域R2に位置する。そのため、第2接続配線732-2の長さを短くできる。よって、第2スイッチ42Aと第2フィルタ素子32Aとの間での高周波信号の損失を低減できる。 As shown in FIG. 11, the second switch output terminals 422-1,422-2 of the second switch 42A are connected to the second filter input terminals 321-1 and 321-2 of the second filter element 32A of the module board 70. They are connected via the second connection wiring 732-1, 732-2 provided inside. As described above, the second filter input terminal 321-1 is located in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732-1 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced. As described above, the second switch output terminal 422-2 is located in the overlapping region R2 where the second switch 42A and the second filter element 32A overlap when the module substrate 70 is viewed in a plan view. Therefore, the length of the second connection wiring 732-2 can be shortened. Therefore, the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced.
 図11のシールド部80は、貫通孔配線81と、グランド電極82と、接続部材83と、シールド壁84とを含む。貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、相互に接続される。貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84は、グランドに接続される。図11では、高周波回路10全体を貫通するように、グランド電位となるシールド部80が設けられる。この構成によれば、フィルタ素子31A,32A間のアイソレーションを更に向上できる。また、第1フィルタ素子31A及び第2フィルタ素子32Aで発生した熱を、シールド部80によって外部に放散させることができる。これによって、放熱性の向上が図れる。また、第1フィルタ素子31A及び第2フィルタ素子32A間の熱の伝達を抑制できる。 The shield portion 80 in FIG. 11 includes a through hole wiring 81, a ground electrode 82, a connecting member 83, and a shield wall 84. The through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to each other. The through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 are connected to the ground. In FIG. 11, a shield portion 80 that serves as a ground potential is provided so as to penetrate the entire high frequency circuit 10. According to this configuration, the isolation between the filter elements 31A and 32A can be further improved. Further, the heat generated by the first filter element 31A and the second filter element 32A can be dissipated to the outside by the shield portion 80. As a result, heat dissipation can be improved. In addition, heat transfer between the first filter element 31A and the second filter element 32A can be suppressed.
 次に図9を参照して通信装置1Aにおける2つの周波数帯域を同時に用いるキャリアアグリゲーション(2アップリンク・キャリアアグリゲーション)の動作の一例を簡単に説明する。ベースバンド信号処理回路111は、例えば、データ伝送のための送信信号を、高周波信号処理回路112に出力する。高周波信号処理回路112は、ベースバンド信号処理回路111から出力された送信信号に対してアップコンバート等の信号処理を行い、信号処理が行われた送信信号(高周波信号)を、高周波回路10の第1電力増幅器21及び第2電力増幅器22へ出力する。2アップリンク・キャリアアグリゲーションの場合、例えば、スイッチ集積回路4Aにおいて、第1スイッチ41Aの第1スイッチ入力端子411と第1スイッチ出力端子412-1との間の電路が閉じられ、第2スイッチ42Aの第2スイッチ入力端子421と第2スイッチ出力端子422-1との間の電路が閉じられる。第1電力増幅器21は、高周波信号処理回路112からの送信信号を増幅して出力する。第1電力増幅器21で増幅された送信信号は、第1整合回路51、第1スイッチ41A、第1フィルタ素子31Aのフィルタ要素314-1、及びアンテナスイッチ6を通して、アンテナ素子12に伝達されて、アンテナ素子12から放射される。第2電力増幅器22は、高周波信号処理回路112からの送信信号を増幅して出力する。第2電力増幅器22で増幅された送信信号は、第2整合回路52、第2スイッチ42A、第2フィルタ素子32Aのフィルタ要素324-1、及びアンテナスイッチ6を通して、アンテナ素子12に伝達されて、アンテナ素子12から放射される。 Next, with reference to FIG. 9, an example of the operation of carrier aggregation (2 uplink carrier aggregation) in which two frequency bands in the communication device 1A are used at the same time will be briefly described. The baseband signal processing circuit 111 outputs, for example, a transmission signal for data transmission to the high frequency signal processing circuit 112. The high-frequency signal processing circuit 112 performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 111, and transfers the signal-processed transmission signal (high-frequency signal) to the high-frequency circuit 10. 1 Output to the power amplifier 21 and the second power amplifier 22. In the case of two uplink carrier aggregation, for example, in the switch integrated circuit 4A, the electric circuit between the first switch input terminal 411 and the first switch output terminal 412-1 of the first switch 41A is closed, and the second switch 42A The electric circuit between the second switch input terminal 421 and the second switch output terminal 422-1 is closed. The first power amplifier 21 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112. The transmission signal amplified by the first power amplifier 21 is transmitted to the antenna element 12 through the first matching circuit 51, the first switch 41A, the filter element 314-1 of the first filter element 31A, and the antenna switch 6. It is radiated from the antenna element 12. The second power amplifier 22 amplifies and outputs the transmission signal from the high frequency signal processing circuit 112. The transmission signal amplified by the second power amplifier 22 is transmitted to the antenna element 12 through the second matching circuit 52, the second switch 42A, the filter element 324-1 of the second filter element 32A, and the antenna switch 6. It is radiated from the antenna element 12.
 図10に示すように、高周波回路10Aは、金属部材8を備える。金属部材8は、モジュール基板70を平面視したときに第1フィルタ素子31A及び第2フィルタ素子32A間に位置し、グランドに接続される。そのため、フィルタ素子31A,32A間のアイソレーションを向上できる。したがって、第1電力増幅器21及び第2電力増幅器22を同時に使用した場合であっても、第1フィルタ素子31Aと第2フィルタ素子32Aとの間で高周波信号の漏れが生じる可能性を低減できる。 As shown in FIG. 10, the high frequency circuit 10A includes a metal member 8. The metal member 8 is located between the first filter element 31A and the second filter element 32A when the module substrate 70 is viewed in a plan view, and is connected to the ground. Therefore, the isolation between the filter elements 31A and 32A can be improved. Therefore, even when the first power amplifier 21 and the second power amplifier 22 are used at the same time, it is possible to reduce the possibility that a high frequency signal leaks between the first filter element 31A and the second filter element 32A.
 以上述べた高周波回路10Aにおいて、第1フィルタ素子31Aは、通過帯域が異なる複数のフィルタ要素314-1,314-2と、複数のフィルタ要素314-1,314-2にそれぞれ対応する複数の第1フィルタ入力端子311-1,311-2とを有する。第1スイッチ41Aは、第1電力増幅器21に接続される第1スイッチ入力端子411と、第1フィルタ素子31Aの複数の第1フィルタ入力端子311-1,311-2にそれぞれ接続される複数の第1スイッチ出力端子412-1,412-2とを有し、第1スイッチ入力端子411を複数の第1スイッチ出力端子412-1,412-2のいずれか一つに接続するように構成される。互いに接続される第1フィルタ入力端子311-1と第1スイッチ出力端子412-1に関して、第1フィルタ入力端子311-1が重複領域R1に位置する。互いに接続される第1フィルタ入力端子311-2と第1スイッチ出力端子412-2に関して、第1スイッチ出力端子412-2が重複領域R1に位置する。この構成によれば、第1スイッチ41Aと第1フィルタ素子31Aとの接続配線の長さを短くできて、第1スイッチ41Aと第1フィルタ素子31Aとの間での高周波信号の損失を低減できる。 In the high frequency circuit 10A described above, the first filter element 31A has a plurality of filter elements 314-1,314-2 having different pass bands and a plurality of first filter elements 314-1,314-2 corresponding to the plurality of filter elements, respectively. It has one filter input terminal 311-1 and 311-2. The first switch 41A has a plurality of first switch input terminals 411 connected to the first power amplifier 21 and a plurality of first filter input terminals 311-1 and 311-2 connected to the first filter element 31A, respectively. It has first switch output terminals 421-1, 412-2, and is configured to connect the first switch input terminal 411 to any one of a plurality of first switch output terminals 421-1, 412-2. To. With respect to the first filter input terminal 311-1 and the first switch output terminal 412-1 connected to each other, the first filter input terminal 311-1 is located in the overlapping region R1. With respect to the first filter input terminal 311-2 and the first switch output terminal 412-2 connected to each other, the first switch output terminal 412-2 is located in the overlapping region R1. According to this configuration, the length of the connection wiring between the first switch 41A and the first filter element 31A can be shortened, and the loss of the high frequency signal between the first switch 41A and the first filter element 31A can be reduced. ..
 高周波回路10Aにおいて、第2フィルタ素子32Aは、通過帯域が異なる複数のフィルタ要素324-1,324-2と、複数のフィルタ要素324-1,324-2にそれぞれ対応する複数の第2フィルタ入力端子321-1,321-2とを有する。第2スイッチ42Aは、第2電力増幅器22に接続される第2スイッチ入力端子421と、第2フィルタ素子32Aの複数の第2フィルタ入力端子321-1,321-2にそれぞれ接続される複数の第2スイッチ出力端子422-1,422-2とを有し、第2スイッチ入力端子421を複数の第2スイッチ出力端子422-1,422-2のいずれか一つに接続するように構成される。互いに接続される第2フィルタ入力端子321-1と第2スイッチ出力端子422-1に関して、第2フィルタ入力端子321-1が重複領域R2に位置する。互いに接続される第2フィルタ入力端子321-2と第2スイッチ出力端子422-2に関して、第2スイッチ出力端子422-2が重複領域R2に位置する。この構成によれば、第2スイッチ42Aと第2フィルタ素子32Aとの接続配線の長さを短くできて、第2スイッチ42Aと第2フィルタ素子32Aとの間での高周波信号の損失を低減できる。 In the high frequency circuit 10A, the second filter element 32A has a plurality of filter elements 324-1,324-2 having different pass bands and a plurality of second filter inputs corresponding to the plurality of filter elements 324-1,324-2, respectively. It has terminals 321-1 and 321-2. The second switch 42A has a plurality of second switch input terminals 421 connected to the second power amplifier 22 and a plurality of second filter input terminals 321-1 and 321-2 connected to the second filter element 32A, respectively. It has a second switch output terminal 422-1,422-2, and is configured to connect the second switch input terminal 421 to any one of a plurality of second switch output terminals 422-1,422-2. To. With respect to the second filter input terminal 321-1 and the second switch output terminal 422-1 connected to each other, the second filter input terminal 321-1 is located in the overlapping region R2. With respect to the second filter input terminal 321-2 and the second switch output terminal 422-2 connected to each other, the second switch output terminal 422-2 is located in the overlapping region R2. According to this configuration, the length of the connection wiring between the second switch 42A and the second filter element 32A can be shortened, and the loss of the high frequency signal between the second switch 42A and the second filter element 32A can be reduced. ..
 以上述べた高周波回路10Aでは、シールド部80は、モジュール基板70の第1主面70aと第2主面70bとの間に形成される貫通孔配線81と、モジュール基板70の第1主面70aに配置されて貫通孔配線81に電気的に接続されるとともに金属層91に電気的に接続されるシールド壁84と、スイッチ集積回路4のシリコン貫通電極であるグランド電極82と、モジュール基板70の第2主面70bに配置されて貫通孔配線81とグランド電極82とを接続する接続部材83とを含む。この構成によれば、第1フィルタ素子31A及び第2フィルタ素子32A間のアイソレーションを更に向上でき、更に、放熱性の向上が図れる。また、第1フィルタ素子31A及び第2フィルタ素子32A間の熱の伝達を抑制できる。 In the high frequency circuit 10A described above, the shield portion 80 includes the through-hole wiring 81 formed between the first main surface 70a and the second main surface 70b of the module board 70 and the first main surface 70a of the module board 70. A shield wall 84 that is arranged in and electrically connected to the through-hole wiring 81 and also electrically connected to the metal layer 91, a ground electrode 82 that is a silicon through electrode of the switch integrated circuit 4, and a module substrate 70. It includes a connecting member 83 arranged on the second main surface 70b and connecting the through-hole wiring 81 and the ground electrode 82. According to this configuration, the isolation between the first filter element 31A and the second filter element 32A can be further improved, and the heat dissipation can be further improved. In addition, heat transfer between the first filter element 31A and the second filter element 32A can be suppressed.
(変形例)
 本開示の実施の形態は、上記実施の形態に限定されない。上記実施の形態は、本開示の課題を達成できれば、設計等に応じて種々の変更が可能である。以下に、上記実施の形態の変形例を列挙する。以下に説明する変形例は、適宜組み合わせて適用可能である。
(Modification example)
The embodiments of the present disclosure are not limited to the above embodiments. The above-described embodiment can be variously changed according to the design and the like as long as the subject of the present disclosure can be achieved. The following is a list of modified examples of the above embodiment. The modifications described below can be applied in combination as appropriate.
 一変形例では、高周波回路10は、3以上の電力増幅器及び3以上のフィルタ素子を備えていてもよい。要するに、電力増幅器の数及びフィルタ素子の数は、2以上であれば特に限定されない。一変形例では、高周波回路10は、スイッチ集積回路4を備えていなくてもよい。一変形例では、高周波回路10は、第1整合回路51、第2整合回路52、及び電子部品53,54を備えていなくてもよい。この点は、高周波回路10Aにおいても同様である。 In one modification, the high frequency circuit 10 may include 3 or more power amplifiers and 3 or more filter elements. In short, the number of power amplifiers and the number of filter elements are not particularly limited as long as they are 2 or more. In one modification, the high frequency circuit 10 does not have to include the switch integrated circuit 4. In one modification, the high frequency circuit 10 may not include the first matching circuit 51, the second matching circuit 52, and the electronic components 53, 54. This point is the same in the high frequency circuit 10A.
 第1フィルタ素子31及び第2フィルタ素子32の構造は実施の形態1~4の構成例に限定されない。例えば、第1フィルタ素子31の第1フィルタ入力端子311、第1フィルタ出力端子312、及びグランド端子313の配置は図示例に限定されない。これは、第2フィルタ素子32についても同様である。同様に、第1フィルタ素子31A及び第2フィルタ素子32Aの構造も実施の形態5の構成例に限定されない。 The structures of the first filter element 31 and the second filter element 32 are not limited to the configuration examples of the first to fourth embodiments. For example, the arrangement of the first filter input terminal 311, the first filter output terminal 312, and the ground terminal 313 of the first filter element 31 is not limited to the illustrated example. This also applies to the second filter element 32. Similarly, the structures of the first filter element 31A and the second filter element 32A are not limited to the configuration example of the fifth embodiment.
 一変形例では、第1フィルタ素子31は、金属層91に直接的に接触する代わりに間接的に接触してよい。上述したように、第1フィルタ素子31を金属層91に直接的に接触させるのは第1フィルタ素子31の放熱のためであるから、第1フィルタ素子31の放熱が可能な範囲で、第1フィルタ素子31を金属層91に間接的に接触させてよい。例えば、第1フィルタ素子31は、金属層91に金属板等の伝熱部材を介して接触してよい。要するに、第1フィルタ素子31は、金属層91に直接又は間接的に接触して熱的に結合されてよい。ただし、第1フィルタ素子31は、金属層91に直接又は間接的に接触していなくてもよく、金属層91に熱的に結合されていなくてもよい。この点は、第2フィルタ素子32においても同様である。 In one modification, the first filter element 31 may indirectly contact the metal layer 91 instead of directly contacting the metal layer 91. As described above, the reason why the first filter element 31 is brought into direct contact with the metal layer 91 is to dissipate heat from the first filter element 31, so that the first filter element 31 can dissipate heat. The filter element 31 may be indirectly brought into contact with the metal layer 91. For example, the first filter element 31 may be in contact with the metal layer 91 via a heat transfer member such as a metal plate. In short, the first filter element 31 may be in direct or indirect contact with the metal layer 91 and thermally coupled. However, the first filter element 31 may not be in direct or indirect contact with the metal layer 91, and may not be thermally coupled to the metal layer 91. This point is the same for the second filter element 32.
 スイッチ集積回路4の構造は実施の形態1~4の構成例に限定されない。例えば、第1スイッチ入力端子411、第1スイッチ出力端子412、第2スイッチ入力端子421及び第2スイッチ出力端子422の配置は図示例に限定されない。同様に、スイッチ集積回路4Aの構造も実施の形態5の構成例に限定されない。 The structure of the switch integrated circuit 4 is not limited to the configuration examples of the first to fourth embodiments. For example, the arrangement of the first switch input terminal 411, the first switch output terminal 412, the second switch input terminal 421, and the second switch output terminal 422 is not limited to the illustrated example. Similarly, the structure of the switch integrated circuit 4A is not limited to the configuration example of the fifth embodiment.
 実施の形態1では、第1フィルタ入力端子311が、重複領域R1に位置する。一変形例では、第1スイッチ出力端子412が重複領域R1に位置してもよいし、第1フィルタ入力端子311及び第1スイッチ出力端子412が重複領域R1に位置してもよい。つまり、第1フィルタ入力端子311と第1スイッチ出力端子412との少なくとも一方が第1スイッチ41及び第1フィルタ素子31と重なってよい。ただし、スイッチ集積回路4は、必ずしも、重複領域R1が存在するように配置されなくてもよい。実施の形態1では、第2フィルタ入力端子321が、重複領域R2に位置する。一変形例では、第2スイッチ出力端子422が重複領域R2に位置してもよいし、第2フィルタ入力端子321及び第2スイッチ出力端子422が重複領域R2に位置してもよい。つまり、第2フィルタ入力端子321と第2スイッチ出力端子422との少なくとも一方が第2スイッチ42及び第2フィルタ素子32と重なってよい。ただし、スイッチ集積回路4は、必ずしも、重複領域R2が存在するように配置されなくてもよい。 In the first embodiment, the first filter input terminal 311 is located in the overlapping region R1. In one modification, the first switch output terminal 412 may be located in the overlapping region R1, or the first filter input terminal 311 and the first switch output terminal 412 may be located in the overlapping region R1. That is, at least one of the first filter input terminal 311 and the first switch output terminal 412 may overlap with the first switch 41 and the first filter element 31. However, the switch integrated circuit 4 does not necessarily have to be arranged so that the overlapping region R1 exists. In the first embodiment, the second filter input terminal 321 is located in the overlapping region R2. In one modification, the second switch output terminal 422 may be located in the overlapping region R2, or the second filter input terminal 321 and the second switch output terminal 422 may be located in the overlapping region R2. That is, at least one of the second filter input terminal 321 and the second switch output terminal 422 may overlap with the second switch 42 and the second filter element 32. However, the switch integrated circuit 4 does not necessarily have to be arranged so that the overlapping region R2 exists.
 実施の形態5では、第1フィルタ入力端子311-1が、重複領域R1に位置する。一変形例では、第1スイッチ出力端子412-1が重複領域R1に位置してもよいし、第1フィルタ入力端子311-1及び第1スイッチ出力端子412-1が重複領域R1に位置してもよい。実施の形態5では、第1スイッチ出力端子412-2が、重複領域R1に位置する。一変形例では、第1フィルタ入力端子311-2が重複領域R1に位置してもよいし、第1フィルタ入力端子311-2及び第1スイッチ出力端子412-2が重複領域R1に位置してもよい。要するに、複数の第1フィルタ入力端子311のうちの少なくとも一つの第1フィルタ入力端子311と複数の第1スイッチ出力端子412のうちの少なくとも一つの第1フィルタ入力端子311に接続される少なくとも一つの第1スイッチ出力端子412との少なくとも一方は、モジュール基板70を平面視したときに第1スイッチ41A及び第1フィルタ素子31Aと重なってよい。 In the fifth embodiment, the first filter input terminal 311-1 is located in the overlapping region R1. In one modification, the first switch output terminal 412-1 may be located in the overlapping region R1, and the first filter input terminal 311-1 and the first switch output terminal 412-1 may be located in the overlapping region R1. May be good. In the fifth embodiment, the first switch output terminal 412-2 is located in the overlapping region R1. In one modification, the first filter input terminal 311-2 may be located in the overlapping region R1, and the first filter input terminal 311-2 and the first switch output terminal 412-2 may be located in the overlapping region R1. May be good. In short, at least one connected to at least one of the first filter input terminals 311 of the plurality of first filter input terminals 311 and at least one of the first filter input terminals 311 of the plurality of first switch output terminals 412. At least one of the first switch output terminal 412 may overlap with the first switch 41A and the first filter element 31A when the module substrate 70 is viewed in a plan view.
 実施の形態5では、第2フィルタ入力端子321-1が、重複領域R2に位置する。一変形例では、第2スイッチ出力端子422-1が重複領域R2に位置してもよいし、第2フィルタ入力端子321-1及び第2スイッチ出力端子422-1が重複領域R2に位置してもよい。実施の形態5では、第2スイッチ出力端子422-2が、重複領域R2に位置する。一変形例では、第2フィルタ入力端子321-2が重複領域R2に位置してもよいし、第2フィルタ入力端子321-2及び第2スイッチ出力端子422-2が重複領域R2に位置してもよい。要するに、複数の第2フィルタ入力端子321のうちの少なくとも一つの第2フィルタ入力端子321と複数の第2スイッチ出力端子422のうちの少なくとも一つの第2フィルタ入力端子321に接続される少なくとも一つの第2スイッチ出力端子422との少なくとも一方は、モジュール基板70を平面視したときに第2スイッチ42A及び第2フィルタ素子32Aと重なってよい。 In the fifth embodiment, the second filter input terminal 321-1 is located in the overlapping region R2. In one modification, the second switch output terminal 422-1 may be located in the overlapping region R2, or the second filter input terminal 321-1 and the second switch output terminal 422-1 may be located in the overlapping region R2. May be good. In the fifth embodiment, the second switch output terminal 422-2 is located in the overlapping region R2. In one modification, the second filter input terminal 321-2 may be located in the overlapping region R2, or the second filter input terminal 321-2 and the second switch output terminal 422-2 may be located in the overlapping region R2. May be good. In short, at least one connected to at least one second filter input terminal 321 of the plurality of second filter input terminals 321 and at least one second filter input terminal 321 of the plurality of second switch output terminals 422. At least one of the second switch output terminal 422 may overlap with the second switch 42A and the second filter element 32A when the module substrate 70 is viewed in a plan view.
 一変形例では、シールド部80は、モジュール基板70を平面視したときに、第1フィルタ素子31及び第2フィルタ素子32の間全体にわたって位置していなくてもよい。例えば、貫通孔配線81、グランド電極82、接続部材83及びシールド壁84の各々は、モジュール基板70を平面視したときに、第1フィルタ素子31及び第2フィルタ素子32の間全体にわたって位置していなくてもよい。シールド部80は、モジュール基板70を平面視したときに、第1フィルタ入力端子311及び第2フィルタ入力端子321間と第1フィルタ出力端子312及び第2フィルタ出力端子322間との少なくとも一方に位置していればよい。 In one modification, the shield portion 80 does not have to be located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. For example, each of the through-hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84 is located over the entire space between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view. It does not have to be. The shield portion 80 is located at least one of the first filter input terminal 311 and the second filter input terminal 321 and the first filter output terminal 312 and the second filter output terminal 322 when the module board 70 is viewed in a plan view. You just have to do it.
 一変形例では、シールド部80は、モジュール基板70を平面視したときに、複数の構成要素の列により構成されていてもてよい。一変形例では、貫通孔配線81は、複数の貫通孔配線要素の列により構成されてもよい。一変形例では、グランド電極82は、複数のグランド電極要素の列により構成されてもよい。一変形例では、接続部材83は、複数の接続部材要素の列により構成されてもよい。一変形例では、シールド壁84は、複数のシールド壁要素の列により構成されてもよい。一変形例では、シールド壁84は、銅等の金属ブロック、シールド部材、ワイヤシールド等により構成されてもよい。 In one modification, the shield portion 80 may be composed of a row of a plurality of components when the module substrate 70 is viewed in a plan view. In one modification, the through-hole wiring 81 may be configured by a row of a plurality of through-hole wiring elements. In one modification, the ground electrode 82 may be composed of a plurality of rows of ground electrode elements. In one modification, the connecting member 83 may be composed of a plurality of rows of connecting member elements. In one modification, the shield wall 84 may be composed of a plurality of rows of shield wall elements. In one modification, the shield wall 84 may be made of a metal block such as copper, a shield member, a wire shield, or the like.
 一変形例では、貫通孔配線81は、必ずしもモジュール基板70を完全に貫通している必要はなく、モジュール基板70の第1主面70a及び第2主面70bの少なくとも一方に露出していなくてもよい。つまり、貫通孔配線81は、貫通ビアに限らず、インターステイシャルビア、ブラインドビア、ベリッドビアであってもよい。 In one modification, the through-hole wiring 81 does not necessarily have to completely penetrate the module board 70 and is not exposed to at least one of the first main surface 70a and the second main surface 70b of the module board 70. May be good. That is, the through hole wiring 81 is not limited to the through via, and may be an interstitial via, a blind via, or a verid via.
 一変形例では、シールド壁84の第1主面70aからの高さは、第1フィルタ素子31の第1主面70aからの高さ未満であってもよいし、第2フィルタ素子32の第1主面70aからの高さ未満であってもよい。 In one modification, the height of the shield wall 84 from the first main surface 70a may be less than the height of the first filter element 31 from the first main surface 70a, or the height of the second filter element 32 from the first main surface 70a. It may be less than the height from one main surface 70a.
 一変形例では、シールド壁84は、金属層91に間接的に接触して接続されてもよい。例えば、シールド壁84は、金属層91に導電部材を介して接触して接続されてもよい。要するに、シールド壁84は、金属層91に電気的に接続されていればよく、金属層91に直接的に接触しているか間接的に接触しているかは問わない。ただし、シールド壁84は、金属層91に直接又は間接的に接触していなくてもよく、金属層91に接続されていなくてもよい。 In one modification, the shield wall 84 may be indirectly contacted and connected to the metal layer 91. For example, the shield wall 84 may be contacted and connected to the metal layer 91 via a conductive member. In short, the shield wall 84 may be electrically connected to the metal layer 91, regardless of whether it is in direct contact with or indirectly in contact with the metal layer 91. However, the shield wall 84 may not be in direct or indirect contact with the metal layer 91, and may not be connected to the metal layer 91.
 一変形例では、金属部材8は、貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84の全てを含む必要はなく、貫通孔配線81、グランド電極82、接続部材83、及びシールド壁84の少なくとも一つを含んでいてもよい。 In one modification, the metal member 8 does not have to include all of the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield wall 84, and the through hole wiring 81, the ground electrode 82, the connecting member 83, and the shield. It may include at least one of the walls 84.
 実施の形態1~5では、金属部材8がシールド部80のみで構成されているが、これに限定されず、シールド部80とは異なる部位を含んでもよい。例えば、金属部材8は、シールド壁84から延びて第1フィルタ素子31及び第2フィルタ素子32のグランドパターンに接続される部位を備えてもよい。 In the first to fifth embodiments, the metal member 8 is composed of only the shield portion 80, but the present invention is not limited to this, and a portion different from the shield portion 80 may be included. For example, the metal member 8 may include a portion extending from the shield wall 84 and connected to the ground pattern of the first filter element 31 and the second filter element 32.
 一変形例では、高周波回路10は、ダウンリンク(Downlink)で複数の周波数帯域を同時に用いるキャリアアグリゲーション(ダウンリンク・キャリアアグリゲーション)に対応可能であってもよい。例えば、高周波回路は、信号処理回路11とアンテナ素子12との間に接続されて、アンテナ素子12から信号処理回路11に高周波信号を伝達してよい。高周波回路は、第1低雑音増幅器及び第2低雑音増幅器と、第1フィルタ素子31及び第2フィルタ素子32と、モジュール基板70と、金属部材8とを備えてよい。第1低雑音増幅器及び第2低雑音増幅器は、信号処理回路11に接続される。第1フィルタ素子31及び第2フィルタ素子32は、第1低雑音増幅器及び第2低雑音増幅器にそれぞれ接続される。モジュール基板70は、互いに反対側にある第1主面70a及び第2主面70bを有する。第1フィルタ素子31及び第2フィルタ素子32及び第1低雑音増幅器及び第2低雑音増幅器は、モジュール基板70に配置される。金属部材8は、グランドに接続される。第1フィルタ素子31及び第2フィルタ素子32は、モジュール基板70の第1主面70aに配置される。金属部材8は、モジュール基板70を平面視したときに第1フィルタ素子31及び第2フィルタ素子32間に位置する。 In one modification, the high frequency circuit 10 may be capable of supporting carrier aggregation (downlink carrier aggregation) in which a plurality of frequency bands are used simultaneously in the downlink. For example, the high frequency circuit may be connected between the signal processing circuit 11 and the antenna element 12 to transmit a high frequency signal from the antenna element 12 to the signal processing circuit 11. The high frequency circuit may include a first low noise amplifier and a second low noise amplifier, a first filter element 31 and a second filter element 32, a module substrate 70, and a metal member 8. The first low noise amplifier and the second low noise amplifier are connected to the signal processing circuit 11. The first filter element 31 and the second filter element 32 are connected to the first low noise amplifier and the second low noise amplifier, respectively. The module substrate 70 has a first main surface 70a and a second main surface 70b on opposite sides of each other. The first filter element 31, the second filter element 32, the first low noise amplifier, and the second low noise amplifier are arranged on the module substrate 70. The metal member 8 is connected to the ground. The first filter element 31 and the second filter element 32 are arranged on the first main surface 70a of the module substrate 70. The metal member 8 is located between the first filter element 31 and the second filter element 32 when the module substrate 70 is viewed in a plan view.
(態様)
 上記実施の形態及び変形例から明らかなように、本開示は、下記の態様を含む。以下では、実施の形態との対応関係を明示するためだけに、符号を括弧付きで付している。
(Aspect)
As will be apparent from the embodiments and modifications described above, the present disclosure includes the following aspects. In the following, reference numerals are given in parentheses only to clearly indicate the correspondence with the embodiments.
 第1の態様は、高周波回路(10;10A)であって、同時に使用可能な第1電力増幅器(21)及び第2電力増幅器(22)と、前記第1電力増幅器(21)及び前記第2電力増幅器(22)にそれぞれ接続される第1フィルタ素子(31;31A)及び第2フィルタ素子(32;32A)と、互いに背向する第1主面(70a)及び第2主面(70b)を有し、前記第1フィルタ素子(31;31A)、前記第2フィルタ素子(32;32A)、前記第1電力増幅器(21)及び前記第2電力増幅器(22)が配置されるモジュール基板(70)と、グランドに接続される金属部材(8)とを備える。前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)は、前記モジュール基板(70)の第1主面(70a)に配置される。前記金属部材(8)は、前記モジュール基板(70)を平面視したときに前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)間に位置する。この態様によれば、異なる電力増幅器(21,22)にそれぞれ電気的に接続されるフィルタ(31,32;31A,32A)間のアイソレーションを向上できる。 The first aspect is a high frequency circuit (10; 10A), wherein a first power amplifier (21) and a second power amplifier (22) that can be used simultaneously, and the first power amplifier (21) and the second power amplifier (21) are used. The first filter element (31; 31A) and the second filter element (32; 32A) connected to the power amplifier (22), respectively, and the first main surface (70a) and the second main surface (70b) facing each other. The module board (31; 31A), the second filter element (32; 32A), the first power amplifier (21), and the second power amplifier (22) are arranged. 70) and a metal member (8) connected to the ground. The first filter element (31; 31A) and the second filter element (32; 32A) are arranged on the first main surface (70a) of the module substrate (70). The metal member (8) is located between the first filter element (31; 31A) and the second filter element (32; 32A) when the module substrate (70) is viewed in a plan view. According to this aspect, the isolation between the filters (31, 32; 31A, 32A) electrically connected to different power amplifiers (21, 22) can be improved.
 第2の態様は、第1の態様に基づく高周波回路(10;10A)である。第2の態様において、前記金属部材(8)は、前記モジュール基板(70)の第1主面(70a)と第2主面(70b)との間に形成される貫通孔配線(81)を含む。この態様によれば、簡易な構成で、異なる電力増幅器(21,22)にそれぞれ電気的に接続されるフィルタ(31,32;31A,32A)間のアイソレーションを向上できる。 The second aspect is a high frequency circuit (10; 10A) based on the first aspect. In the second aspect, the metal member (8) has a through-hole wiring (81) formed between the first main surface (70a) and the second main surface (70b) of the module substrate (70). include. According to this aspect, the isolation between the filters (31, 32; 31A, 32A) electrically connected to different power amplifiers (21, 22) can be improved by a simple configuration.
 第3の態様は、第1又は第2の態様に基づく高周波回路(10;10A)である。第3の態様において、前記金属部材(8)は、前記モジュール基板(70)の第1主面(70a)に配置されるシールド壁(84)を含む。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The third aspect is a high frequency circuit (10; 10A) based on the first or second aspect. In a third aspect, the metal member (8) includes a shield wall (84) disposed on a first main surface (70a) of the module substrate (70). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第4の態様は、第3の態様に基づく高周波回路(10;10A)である。第4の態様において、前記シールド壁(84)の前記第1主面(70a)からの高さは、前記第1フィルタ素子(31;31A)の前記第1主面(70a)からの高さ及び前記第2フィルタ素子(32;32A)の前記第1主面(70a)からの高さ以上である。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The fourth aspect is a high frequency circuit (10; 10A) based on the third aspect. In the fourth aspect, the height of the shield wall (84) from the first main surface (70a) is the height of the first filter element (31; 31A) from the first main surface (70a). And the height of the second filter element (32; 32A) from the first main surface (70a) or more. According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第5の態様は、第3又は第4の態様に基づく高周波回路(10;10A)である。第5の態様において、前記高周波回路(10;10A)は、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)を封止する樹脂部材(75)と、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)に対して前記モジュール基板(70)の第1主面(70a)とは反対側に位置するように前記樹脂部材(75)の表面に配置され、グランドに接続される金属層(91)とを備える。前記シールド壁(84)は、前記金属層(91)に電気的に接続される。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The fifth aspect is a high frequency circuit (10; 10A) based on the third or fourth aspect. In a fifth aspect, the high frequency circuit (10; 10A) includes a resin member (75) that seals the first filter element (31; 31A) and the second filter element (32; 32A), and the first filter element (32; 32A). The resin member (75) is located on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the one filter element (31; 31A) and the second filter element (32; 32A). ), With a metal layer (91) arranged on the surface and connected to the ground. The shield wall (84) is electrically connected to the metal layer (91). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第6の態様は、第5の態様に基づく高周波回路(10;10A)である。第6の態様において、前記第1電力増幅器(21)は、第1パワークラスに対応する。前記第2電力増幅器(22)は、第2パワークラスに対応する。前記第1パワークラスの最大出力パワーは、前記第2パワークラスの最大出力パワーよりも大きい。前記第1フィルタ素子(31;31A)は、前記金属層(91)に接触する。この態様によれば、放熱性を向上できる。第6の態様において、更に、前記第2フィルタ素子(32;32A)は、前記金属層(91)に接触してよい。これにより放熱性の更なる向上が図れる。 The sixth aspect is a high frequency circuit (10; 10A) based on the fifth aspect. In the sixth aspect, the first power amplifier (21) corresponds to the first power class. The second power amplifier (22) corresponds to the second power class. The maximum output power of the first power class is larger than the maximum output power of the second power class. The first filter element (31; 31A) comes into contact with the metal layer (91). According to this aspect, heat dissipation can be improved. In the sixth aspect, the second filter element (32; 32A) may further come into contact with the metal layer (91). This makes it possible to further improve the heat dissipation.
 第7の態様は、第1~第4の態様のいずれか一つに基づく高周波回路(10;10A)である。第7の態様において、前記高周波回路(10;10A)は、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)を封止する樹脂部材(75)と、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)に対して前記モジュール基板(70)の第1主面(70a)とは反対側に位置するように前記樹脂部材(75)の表面に配置され、グランドに接続される金属層(91)とを備える。前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)の各々は、前記金属層(91)に接触する。 The seventh aspect is a high frequency circuit (10; 10A) based on any one of the first to fourth aspects. In a seventh aspect, the high frequency circuit (10; 10A) includes a resin member (75) that seals the first filter element (31; 31A) and the second filter element (32; 32A), and the second filter element (32; 32A). The resin member (75) is located on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the one filter element (31; 31A) and the second filter element (32; 32A). ), With a metal layer (91) arranged on the surface and connected to the ground. Each of the first filter element (31; 31A) and the second filter element (32; 32A) comes into contact with the metal layer (91).
 第8の態様は、第1~第7の態様のいずれか一つに基づく高周波回路(10;10A)である。第8の態様において、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)は、前記第1電力増幅器(21)及び第2電力増幅器(22)にそれぞれ接続される第1フィルタ入力端子(311)及び第2フィルタ入力端子(321)と、前記アンテナ素子(12)に接続される第1フィルタ出力端子(312)及び第2フィルタ出力端子(322)とをそれぞれ有する。この態様によれば、異なる電力増幅器(21,22)にそれぞれ接続されるフィルタ(31,32;31A,32A)間のアイソレーションを向上できる。 The eighth aspect is a high frequency circuit (10; 10A) based on any one of the first to seventh aspects. In the eighth aspect, the first filter element (31; 31A) and the second filter element (32; 32A) are connected to the first power amplifier (21) and the second power amplifier (22), respectively. It has a first filter input terminal (311) and a second filter input terminal (321), and a first filter output terminal (312) and a second filter output terminal (322) connected to the antenna element (12), respectively. .. According to this aspect, the isolation between the filters (31, 32; 31A, 32A) connected to different power amplifiers (21, 22) can be improved.
 第9の態様は、第8の態様に基づく高周波回路(10;10A)である。第9の態様において、前記金属部材(8)は、前記モジュール基板(70)を平面視したときに、前記第1フィルタ入力端子(311)及び前記第2フィルタ入力端子(321)間と前記第1フィルタ出力端子(312)及び前記第2フィルタ出力端子(322)間との少なくとも一方に位置する。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The ninth aspect is a high frequency circuit (10; 10A) based on the eighth aspect. In the ninth aspect, the metal member (8) is located between the first filter input terminal (311) and the second filter input terminal (321) and the second filter when the module substrate (70) is viewed in a plan view. It is located at least one of the 1 filter output terminal (312) and the 2nd filter output terminal (322). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第10の態様は、第8又は第9の態様に基づく高周波回路(10;10A)である。第10の態様において、前記高周波回路(10;10A)は、前記モジュール基板(70)に配置されるスイッチ集積回路(4;4A)をさらに備える。前記スイッチ集積回路(4;4A)は、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)の第1フィルタ入力端子(311)及び第2フィルタ入力端子(321)と前記第1電力増幅器(21)及び前記第2電力増幅器(22)との間にそれぞれ挿入される第1スイッチ(41;41A)及び第2スイッチ(42;42A)を有する。この態様によれば、使用するフィルタ(31,32;31A,32A)の切り替えが可能になり、種々の通信方法に対応可能となる。 The tenth aspect is a high frequency circuit (10; 10A) based on the eighth or ninth aspect. In a tenth aspect, the high frequency circuit (10; 10A) further comprises a switch integrated circuit (4; 4A) arranged on the module substrate (70). The switch integrated circuit (4; 4A) includes a first filter input terminal (311) and a second filter input terminal (321) of the first filter element (31; 31A) and the second filter element (32; 32A). It has a first switch (41; 41A) and a second switch (42; 42A) inserted between the first power amplifier (21) and the second power amplifier (22), respectively. According to this aspect, the filters (31, 32; 31A, 32A) to be used can be switched, and various communication methods can be supported.
 第11の態様は、第10の態様に基づく高周波回路(10;10A)である。第11の態様において、前記スイッチ集積回路(4;4A)は、前記モジュール基板(70)の第2主面(70b)に配置される。この態様によれば、小型化が図れる。 The eleventh aspect is a high frequency circuit (10; 10A) based on the tenth aspect. In the eleventh aspect, the switch integrated circuit (4; 4A) is arranged on the second main surface (70b) of the module substrate (70). According to this aspect, miniaturization can be achieved.
 第12の態様は、第11の態様に基づく高周波回路(10;10A)である。第12の態様において、前記金属部材(8)は、前記スイッチ集積回路(4;4A)に形成されるグランド電極(82)と、前記モジュール基板(70)の第2主面(70b)に配置されて前記グランド電極(82)に接続される接続部材(83)とを含む。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The twelfth aspect is a high frequency circuit (10; 10A) based on the eleventh aspect. In a twelfth aspect, the metal member (8) is arranged on a ground electrode (82) formed in the switch integrated circuit (4; 4A) and a second main surface (70b) of the module substrate (70). It includes a connecting member (83) that is connected to the ground electrode (82). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第13の態様は、第12の態様に基づく高周波回路(10;10A)である。第13の態様において、前記グランド電極(82)は、前記スイッチ集積回路(4;4A)のシリコン貫通電極である。この態様によれば、フィルタ(31,32;31A,32A)間のアイソレーションを更に向上できる。 The thirteenth aspect is a high frequency circuit (10; 10A) based on the twelfth aspect. In a thirteenth aspect, the ground electrode (82) is a through silicon via of the switch integrated circuit (4; 4A). According to this aspect, the isolation between the filters (31, 32; 31A, 32A) can be further improved.
 第14の態様は、第10~第13の態様のいずれか一つに基づく高周波回路(10;10A)である。第14の態様において、前記モジュール基板(70)を平面視したときに前記第1スイッチ(41;41A)と前記第1フィルタ素子(31;31A)とが重なる。この態様によれば、第1スイッチ(41;41A)と第1フィルタ素子(31;31A)との接続配線の長さを短くできて、第1スイッチ(41;41A)と第1フィルタ素子(31;31A)との間での高周波信号の損失を低減できる。 The fourteenth aspect is a high frequency circuit (10; 10A) based on any one of the tenth to thirteenth aspects. In the fourteenth aspect, the first switch (41; 41A) and the first filter element (31; 31A) overlap when the module substrate (70) is viewed in a plan view. According to this aspect, the length of the connection wiring between the first switch (41; 41A) and the first filter element (31; 31A) can be shortened, and the first switch (41; 41A) and the first filter element (1st filter element) can be shortened. 31; 31A) can reduce the loss of high frequency signals.
 第15の態様は、第14の態様に基づく高周波回路(10)である。第15の態様において、前記第1スイッチ(41)は、前記第1電力増幅器(21)に接続される第1スイッチ入力端子(411)と、前記第1フィルタ素子(31)の第1フィルタ入力端子(311)に接続される第1スイッチ出力端子(412)とを有する。前記第1フィルタ入力端子(311)と前記第1スイッチ出力端子(412)との少なくとも一方は、前記モジュール基板(70)を平面視したときに前記第1スイッチ(41)及び前記第1フィルタ素子(31)と重なる。この態様によれば、第1スイッチ(41)と第1フィルタ素子(31)との接続配線の長さを短くできて、第1スイッチ(41)と第1フィルタ素子(31)との間での高周波信号の損失を低減できる。 The fifteenth aspect is a high frequency circuit (10) based on the fourteenth aspect. In a fifteenth aspect, the first switch (41) has a first switch input terminal (411) connected to the first power amplifier (21) and a first filter input of the first filter element (31). It has a first switch output terminal (412) connected to the terminal (311). At least one of the first filter input terminal (311) and the first switch output terminal (412) is the first switch (41) and the first filter element when the module substrate (70) is viewed in a plan view. It overlaps with (31). According to this aspect, the length of the connection wiring between the first switch (41) and the first filter element (31) can be shortened, and the length between the first switch (41) and the first filter element (31) can be shortened. High frequency signal loss can be reduced.
 第16の態様は、第10~第15の態様のいずれか一つに基づく高周波回路(10;10A)である。第16の態様において、前記モジュール基板(70)を平面視したときに前記第2スイッチ(42;42A)と前記第2フィルタ素子(32;32A)とが重なる。この態様によれば、第2スイッチ(42;42A)と第2フィルタ素子(32;32A)との接続配線の長さを短くできて、第2スイッチ(42;42A)と第2フィルタ素子(32;32A)との間での高周波信号の損失を低減できる。 The sixteenth aspect is a high frequency circuit (10; 10A) based on any one of the tenth to fifteenth aspects. In the sixteenth aspect, the second switch (42; 42A) and the second filter element (32; 32A) overlap when the module substrate (70) is viewed in a plan view. According to this aspect, the length of the connection wiring between the second switch (42; 42A) and the second filter element (32; 32A) can be shortened, and the length of the connection wiring between the second switch (42; 42A) and the second filter element (32; 32A) can be shortened. 32; 32A) can reduce the loss of high frequency signals.
 第17の態様は、第16の態様に基づく高周波回路(10)である。第17の態様において、前記第2スイッチ(42)は、前記第2電力増幅器(22)に接続される第2スイッチ入力端子(421)と、前記第2フィルタ素子(32)の第2フィルタ入力端子(321)に接続される第2スイッチ出力端子(422)とを有する。前記第2フィルタ入力端子(321)と前記第2スイッチ出力端子(422)との少なくとも一方は、前記モジュール基板(70)を平面視したときに前記第2スイッチ(42)及び前記第2フィルタ素子(32)と重なる。この態様によれば、第2スイッチ(42)と第2フィルタ素子(32)との接続配線の長さを短くできて、第2スイッチ(42)と第2フィルタ素子(32)との間での高周波信号の損失を低減できる。 The 17th aspect is a high frequency circuit (10) based on the 16th aspect. In the seventeenth aspect, the second switch (42) has a second switch input terminal (421) connected to the second power amplifier (22) and a second filter input of the second filter element (32). It has a second switch output terminal (422) connected to the terminal (321). At least one of the second filter input terminal (321) and the second switch output terminal (422) is the second switch (42) and the second filter element when the module substrate (70) is viewed in a plan view. It overlaps with (32). According to this aspect, the length of the connection wiring between the second switch (42) and the second filter element (32) can be shortened, and the length between the second switch (42) and the second filter element (32) can be shortened. High frequency signal loss can be reduced.
 第18の態様は、第14の態様に基づく高周波回路(10A)である。第18の態様において、前記第1フィルタ素子(31A)は、通過帯域が異なる複数のフィルタ要素(314)と、前記第1フィルタ素子(31A)の複数のフィルタ要素(314)にそれぞれ対応する複数の前記第1フィルタ入力端子(311)とを有する。前記第1スイッチ(41A)は、前記第1電力増幅器(21)に接続される第1スイッチ入力端子(411)と、前記第1フィルタ素子(31A)の複数の第1フィルタ入力端子(311)にそれぞれ接続される複数の第1スイッチ出力端子(412)とを有し、前記第1スイッチ入力端子(411)を前記複数の第1スイッチ出力端子(412)のいずれか一つに接続するように構成される。前記複数の第1フィルタ入力端子(311)のうちの少なくとも一つの第1フィルタ入力端子(311)と前記複数の第1スイッチ出力端子(412)のうちの前記少なくとも一つの第1フィルタ入力端子(311)に接続される少なくとも一つの第1スイッチ出力端子(412)との少なくとも一方は、前記モジュール基板(70)を平面視したときに前記第1スイッチ(41A)及び前記第1フィルタ素子(31A)と重なる。この態様によれば、第1スイッチ(41A)と第1フィルタ素子(31A)との接続配線の長さを短くできて、第1スイッチ(41A)と第1フィルタ素子(31A)との間での高周波信号の損失を低減できる。 The eighteenth aspect is a high frequency circuit (10A) based on the fourteenth aspect. In the eighteenth aspect, the first filter element (31A) corresponds to a plurality of filter elements (314) having different pass bands and a plurality of filter elements (314) of the first filter element (31A). It has the first filter input terminal (311) of the above. The first switch (41A) has a first switch input terminal (411) connected to the first power amplifier (21) and a plurality of first filter input terminals (311) of the first filter element (31A). It has a plurality of first switch output terminals (412) connected to each of the above, and the first switch input terminal (411) is connected to any one of the plurality of first switch output terminals (412). It is composed of. The at least one first filter input terminal (311) of the plurality of first filter input terminals (311) and the at least one first filter input terminal (412) of the plurality of first switch output terminals (412). At least one of the at least one of the first switch output terminals (412) connected to 311) is the first switch (41A) and the first filter element (31A) when the module substrate (70) is viewed in a plan view. ). According to this aspect, the length of the connection wiring between the first switch (41A) and the first filter element (31A) can be shortened, and the length between the first switch (41A) and the first filter element (31A) can be shortened. High frequency signal loss can be reduced.
 第19の態様は、第14又は第18の態様に基づく高周波回路(10A)である。第19の態様において、前記第2フィルタ素子(32A)は、通過帯域が異なる複数のフィルタ要素(324)と、前記第2フィルタ素子(32A)の複数のフィルタ要素(324)にそれぞれ対応する複数の前記第2フィルタ入力端子(321)とを有する。前記第2スイッチ(42A)は、前記第2電力増幅器(22)に接続される第2スイッチ入力端子(421)と、前記第2フィルタ素子(32A)の複数の第2フィルタ入力端子(321)にそれぞれ接続される複数の第2スイッチ出力端子(422)とを有し、前記第2スイッチ入力端子(421)を前記複数の第2スイッチ出力端子(422)のいずれか一つに接続するように構成される。前記複数の第2フィルタ入力端子(321)のうちの少なくとも一つの第2フィルタ入力端子(321)と前記複数の第2スイッチ出力端子(422)のうちの前記少なくとも一つの第2フィルタ入力端子(321)に接続される少なくとも一つの第2スイッチ出力端子(422)との少なくとも一方は、前記モジュール基板(70)を平面視したときに前記第2スイッチ(42A)及び前記第2フィルタ素子(32A)と重なる。この態様によれば、第2スイッチ(42A)と第2フィルタ素子(32A)との接続配線の長さを短くできて、第2スイッチ(42A)と第2フィルタ素子(32A)との間での高周波信号の損失を低減できる。 The 19th aspect is a high frequency circuit (10A) based on the 14th or 18th aspect. In the nineteenth aspect, the second filter element (32A) corresponds to a plurality of filter elements (324) having different pass bands and a plurality of filter elements (324) of the second filter element (32A). It has the second filter input terminal (321) of the above. The second switch (42A) includes a second switch input terminal (421) connected to the second power amplifier (22) and a plurality of second filter input terminals (321) of the second filter element (32A). It has a plurality of second switch output terminals (422) connected to each of the above, and the second switch input terminal (421) is connected to any one of the plurality of second switch output terminals (422). It is composed of. The at least one second filter input terminal (321) of the plurality of second filter input terminals (321) and the at least one second filter input terminal (422) of the plurality of second switch output terminals (422). At least one of the at least one of the second switch output terminals (422) connected to the 321) is the second switch (42A) and the second filter element (32A) when the module substrate (70) is viewed in a plan view. ). According to this aspect, the length of the connection wiring between the second switch (42A) and the second filter element (32A) can be shortened, and the length between the second switch (42A) and the second filter element (32A) can be shortened. High frequency signal loss can be reduced.
 第20の態様は、第1の態様に基づく高周波回路(10;10A)である。第20の態様において、前記高周波回路(10;10A)は、樹脂部材(75)と、金属層(91)と、スイッチ集積回路(4;4A)とを備える。前記樹脂部材(75)は、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)を封止する。前記金属層(91)は、前記第1フィルタ素子(31;31A)及び第2フィルタ素子(32;32A)に対して前記モジュール基板(70)の第1主面(70a)とは反対側に位置するように前記樹脂部材(75)に配置され、グランドに接続される。前記スイッチ集積回路(4;4A)は、前記第1フィルタ素子(31;31A)及び前記第2フィルタ素子(32;32A)の第1フィルタ入力端子(311)及び第2フィルタ入力端子(321)と前記第1電力増幅器(21)及び前記第2電力増幅器(22)との間にそれぞれ挿入される第1スイッチ(41;41A)及び第2スイッチ(42;42A)を有する。前記スイッチ集積回路(4;4A)は、前記モジュール基板(70)の第2主面(70b)に配置される。前記金属部材(8)は、前記モジュール基板(70)の第1主面(70a)と第2主面(70b)との間に形成される貫通孔配線(81)と、前記モジュール基板(70)の第1主面(70a)に配置されて前記貫通孔配線(81)に電気的に接続されるとともに前記金属層(91)に電気的に接続されるシールド壁(84)と、前記スイッチ集積回路(4;4A)のシリコン貫通電極であるグランド電極(82)と、前記モジュール基板(70)の第2主面(70b)に配置されて前記貫通孔配線(81)と前記グランド電極(82)とを接続する接続部材(83)とを含む。この態様によれば、フィルタ(31,32)間のアイソレーションを更に向上できる。 The twentieth aspect is a high frequency circuit (10; 10A) based on the first aspect. In a twentieth aspect, the high frequency circuit (10; 10A) comprises a resin member (75), a metal layer (91), and a switch integrated circuit (4; 4A). The resin member (75) seals the first filter element (31; 31A) and the second filter element (32; 32A). The metal layer (91) is on the side opposite to the first main surface (70a) of the module substrate (70) with respect to the first filter element (31; 31A) and the second filter element (32; 32A). It is arranged on the resin member (75) so as to be located and connected to the ground. The switch integrated circuit (4; 4A) includes a first filter input terminal (311) and a second filter input terminal (321) of the first filter element (31; 31A) and the second filter element (32; 32A). It has a first switch (41; 41A) and a second switch (42; 42A) inserted between the first power amplifier (21) and the second power amplifier (22), respectively. The switch integrated circuit (4; 4A) is arranged on the second main surface (70b) of the module board (70). The metal member (8) includes a through-hole wiring (81) formed between the first main surface (70a) and the second main surface (70b) of the module substrate (70) and the module substrate (70). ), A shield wall (84) arranged on the first main surface (70a) and electrically connected to the through-hole wiring (81) and electrically connected to the metal layer (91), and the switch. The ground electrode (82), which is a silicon through electrode of the integrated circuit (4; 4A), and the through hole wiring (81) and the ground electrode (81) arranged on the second main surface (70b) of the module substrate (70). Includes a connecting member (83) that connects to and to 82). According to this aspect, the isolation between the filters (31, 32) can be further improved.
 第21の態様は、第1~第20の態様のいずれか一つに基づく高周波回路(10;10A)である。第21の態様において、前記第1電力増幅器(21)は、第1周波数帯域の第1送信信号を増幅する。前記第2電力増幅器(22)は、前記第1周波数帯域と異なる第2周波数帯域の第2送信信号を増幅する。前記第1フィルタ素子(31;31A)は、前記第1周波数帯域を含む第1通過帯域の信号を通過させる。前記第2フィルタ素子(32;32A)は、前記第2周波数帯域を含み前記第1通過帯域と異なる第2通過帯域の信号を通過させる。この態様によれば、アップリンクで2つの周波数帯域を同時に用いるキャリアアグリゲーション(2アップリンク・キャリアアグリゲーション)に対応可能である。 The 21st aspect is a high frequency circuit (10; 10A) based on any one of the 1st to 20th aspects. In the 21st aspect, the first power amplifier (21) amplifies the first transmission signal in the first frequency band. The second power amplifier (22) amplifies the second transmission signal in the second frequency band different from the first frequency band. The first filter element (31; 31A) passes a signal in the first pass band including the first frequency band. The second filter element (32; 32A) passes a signal in a second pass band including the second frequency band and different from the first pass band. According to this aspect, it is possible to support carrier aggregation (two uplink carrier aggregation) in which two frequency bands are used simultaneously in the uplink.
 以上のように、本開示における技術の例示として、実施の形態を説明した。そのために、添付図面および詳細な説明を提供した。したがって、添付図面および詳細な説明に記載された構成要素の中には、課題解決のために必須な構成要素だけでなく、上記技術を例示するために、課題解決のためには必須でない構成要素も含まれ得る。そのため、それらの必須ではない構成要素が添付図面や詳細な説明に記載されていることをもって、直ちに、それらの必須ではない構成要素が必須であるとの認定をするべきではない。また、上述の実施の形態は、本開示における技術を例示するためのものであるから、特許請求の範囲またはその均等の範囲において種々の変更、置き換え、付加、省略などを行うことができる。 As described above, an embodiment has been described as an example of the technique in the present disclosure. To that end, the accompanying drawings and detailed description are provided. Therefore, among the components described in the attached drawings and the detailed description, not only the components essential for problem solving but also the components not essential for problem solving in order to illustrate the above technique. Can also be included. Therefore, the fact that those non-essential components are described in the accompanying drawings or detailed description should not immediately determine that those non-essential components are essential. Further, since the above-described embodiment is for exemplifying the technique in the present disclosure, various changes, replacements, additions, omissions, etc. can be made within the scope of claims or the equivalent thereof.
 本開示は、アンテナ装置に適用可能である。具体的には、巻線の内側に配置されるコアを備えるアンテナ装置に、本開示は適用可能である。 This disclosure is applicable to antenna devices. Specifically, the present disclosure is applicable to an antenna device having a core arranged inside a winding.
 10,10A 高周波回路
 11 信号処理回路
 12 アンテナ素子
 21 第1電力増幅器
 22 第2電力増幅器
 31,31A 第1フィルタ素子
 310 第1基板
 311 第1フィルタ入力端子
 312 第1フィルタ出力端子
 314 フィルタ要素
 32,32A 第2フィルタ素子
 320 第2基板
 321 第2フィルタ入力端子
 322 第2フィルタ出力端子
 324 フィルタ要素
 4,4A スイッチ集積回路
 41,41A 第1スイッチ
 411 第1スイッチ入力端子
 412 第1スイッチ出力端子
 42,42A 第2スイッチ
 421 第2スイッチ入力端子
 422 第2スイッチ出力端子
 70 モジュール基板
 70a 第1主面
 70b 第2主面
 75 樹脂部材
 8 金属部材
 81 貫通孔配線
 82 グランド電極
 83 接続部材
 84 シールド壁
 91 金属層
 R1,R2 重複領域
10, 10A high frequency circuit 11 signal processing circuit 12 antenna element 21 1st power amplifier 22 2nd power amplifier 31, 31A 1st filter element 310 1st board 311 1st filter input terminal 312 1st filter output terminal 314 filter element 32, 32A 2nd filter element 320 2nd board 321 2nd filter input terminal 322 2nd filter output terminal 324 Filter element 4,4A Switch integrated circuit 41, 41A 1st switch 411 1st switch input terminal 412 1st switch output terminal 42, 42A 2nd switch 421 2nd switch input terminal 422 2nd switch output terminal 70 Module board 70a 1st main surface 70b 2nd main surface 75 Resin member 8 Metal member 81 Through hole wiring 82 Ground electrode 83 Connection member 84 Shield wall 91 Metal Layers R1, R2 Overlapping regions

Claims (20)

  1.  同時に使用可能な第1電力増幅器及び第2電力増幅器と、
     前記第1電力増幅器及び前記第2電力増幅器にそれぞれ接続される第1フィルタ素子及び第2フィルタ素子と、
     互いに背向する第1主面及び第2主面を有し、前記第1フィルタ素子、前記第2フィルタ素子、前記第1電力増幅器及び前記第2電力増幅器が配置されるモジュール基板と、
     グランドに接続される金属部材と、
     を備え、
     前記第1フィルタ素子及び前記第2フィルタ素子は、前記モジュール基板の第1主面に配置され、
     前記金属部材は、前記モジュール基板を平面視したときに前記第1フィルタ素子及び前記第2フィルタ素子間に位置する、
     高周波回路。
    A first power amplifier and a second power amplifier that can be used at the same time,
    The first filter element and the second filter element connected to the first power amplifier and the second power amplifier, respectively,
    A module board having a first main surface and a second main surface facing each other and in which the first filter element, the second filter element, the first power amplifier, and the second power amplifier are arranged.
    Metal members connected to the ground and
    Equipped with
    The first filter element and the second filter element are arranged on the first main surface of the module substrate.
    The metal member is located between the first filter element and the second filter element when the module substrate is viewed in a plan view.
    High frequency circuit.
  2.  前記金属部材は、前記モジュール基板の第1主面と第2主面との間に形成される貫通孔配線を含む、
     請求項1に記載の高周波回路。
    The metal member includes through-hole wiring formed between the first main surface and the second main surface of the module substrate.
    The high frequency circuit according to claim 1.
  3.  前記金属部材は、前記モジュール基板の第1主面に配置されるシールド壁を含む、
     請求項1又は2に記載の高周波回路。
    The metal member includes a shield wall arranged on a first main surface of the module substrate.
    The high frequency circuit according to claim 1 or 2.
  4.  前記金属部材の前記第1主面からの高さは、前記第1フィルタ素子の前記第1主面からの高さ及び前記第2フィルタ素子の前記第1主面からの高さ以上である、
     請求項3に記載の高周波回路。
    The height of the metal member from the first main surface is equal to or greater than the height of the first filter element from the first main surface and the height of the second filter element from the first main surface.
    The high frequency circuit according to claim 3.
  5.  前記第1フィルタ素子及び前記第2フィルタ素子を封止する樹脂部材と、
     前記第1フィルタ素子及び前記第2フィルタ素子に対して前記モジュール基板の第1主面とは反対側に位置するように前記樹脂部材の表面に配置され、グランドに接続される金属層と、
     を備え、
     前記シールド壁は、前記金属層に電気的に接続される、
     請求項3又は4に記載の高周波回路。
    A resin member that seals the first filter element and the second filter element, and
    A metal layer arranged on the surface of the resin member so as to be located on the side opposite to the first main surface of the module substrate with respect to the first filter element and the second filter element, and connected to the ground.
    Equipped with
    The shield wall is electrically connected to the metal layer.
    The high frequency circuit according to claim 3 or 4.
  6.  前記第1電力増幅器は、第1パワークラスに対応し、
     前記第2電力増幅器は、第2パワークラスに対応し、
     前記第1パワークラスの最大出力パワーは、前記第2パワークラスの最大出力パワーよりも大きく、
     前記第1フィルタ素子は、前記金属層に接触する、
     請求項5に記載の高周波回路。
    The first power amplifier corresponds to the first power class.
    The second power amplifier corresponds to the second power class and is compatible with the second power class.
    The maximum output power of the first power class is larger than the maximum output power of the second power class.
    The first filter element comes into contact with the metal layer.
    The high frequency circuit according to claim 5.
  7.  前記第1フィルタ素子及び前記第2フィルタ素子を封止する樹脂部材と、
     前記第1フィルタ素子及び前記第2フィルタ素子に対して前記モジュール基板の第1主面とは反対側に位置するように前記樹脂部材の表面に配置され、グランドに接続される金属層と、
     を備え、
     前記第1フィルタ素子及び前記第2フィルタ素子の各々は、前記金属層に接触する、
     請求項1~4のいずれか一つに記載の高周波回路。
    A resin member that seals the first filter element and the second filter element, and
    A metal layer arranged on the surface of the resin member so as to be located on the side opposite to the first main surface of the module substrate with respect to the first filter element and the second filter element, and connected to the ground.
    Equipped with
    Each of the first filter element and the second filter element comes into contact with the metal layer.
    The high frequency circuit according to any one of claims 1 to 4.
  8.  前記第1フィルタ素子及び前記第2フィルタ素子は、前記第1電力増幅器及び前記第2電力増幅器にそれぞれ接続される第1フィルタ入力端子及び第2フィルタ入力端子と、アンテナ素子に接続される第1フィルタ出力端子及び第2フィルタ出力端子とをそれぞれ有する、
     請求項1~7のいずれか一つに記載の高周波回路。
    The first filter element and the second filter element are connected to a first filter input terminal and a second filter input terminal connected to the first power amplifier and the second power amplifier, respectively, and a first connected to an antenna element. It has a filter output terminal and a second filter output terminal, respectively.
    The high frequency circuit according to any one of claims 1 to 7.
  9.  前記金属部材は、前記モジュール基板を平面視したときに、前記第1フィルタ入力端子及び前記第2フィルタ入力端子間と前記第1フィルタ出力端子及び前記第2フィルタ出力端子間との少なくとも一方に位置する、
     請求項8に記載の高周波回路。
    The metal member is located at least one of the first filter input terminal and the second filter input terminal and the first filter output terminal and the second filter output terminal when the module substrate is viewed in a plan view. do,
    The high frequency circuit according to claim 8.
  10.  前記モジュール基板に配置されるスイッチ集積回路をさらに備え、
     前記スイッチ集積回路は、前記第1フィルタ素子及び前記第2フィルタ素子の第1フィルタ入力端子及び第2フィルタ入力端子と前記第1電力増幅器及び前記第2電力増幅器との間にそれぞれ挿入される第1スイッチ及び第2スイッチを有する、
     請求項8又は9に記載の高周波回路。
    Further equipped with a switch integrated circuit arranged on the module board,
    The switch integrated circuit is inserted between the first filter input terminal and the second filter input terminal of the first filter element and the second filter element, and the first power amplifier and the second power amplifier, respectively. Has one switch and a second switch,
    The high frequency circuit according to claim 8 or 9.
  11.  前記スイッチ集積回路は、前記モジュール基板の第2主面に配置される、
     請求項10に記載の高周波回路。
    The switch integrated circuit is arranged on the second main surface of the module board.
    The high frequency circuit according to claim 10.
  12.  前記金属部材は、
      前記スイッチ集積回路に形成されるグランド電極と、
      前記モジュール基板の第2主面に配置されて前記グランド電極に接続される接続部材と、
     を含む、
     請求項11に記載の高周波回路。
    The metal member is
    The ground electrode formed in the switch integrated circuit and
    A connecting member arranged on the second main surface of the module substrate and connected to the ground electrode, and
    including,
    The high frequency circuit according to claim 11.
  13.  前記グランド電極は、前記スイッチ集積回路のシリコン貫通電極である、
     請求項12に記載の高周波回路。
    The ground electrode is a through silicon via of the switch integrated circuit.
    The high frequency circuit according to claim 12.
  14.  前記モジュール基板を平面視したときに前記第1スイッチと前記第1フィルタ素子とが重なる、
     請求項10~13のいずれか一つに記載の高周波回路。
    When the module substrate is viewed in a plan view, the first switch and the first filter element overlap each other.
    The high frequency circuit according to any one of claims 10 to 13.
  15.  前記第1スイッチは、前記第1電力増幅器に接続される第1スイッチ入力端子と、前記第1フィルタ素子の第1フィルタ入力端子に接続される第1スイッチ出力端子とを有し、
     前記第1フィルタ素子の第1フィルタ入力端子と前記第1スイッチ出力端子との少なくとも一方は、前記モジュール基板を平面視したときに前記第1スイッチ及び前記第1フィルタ素子と重なる、
     請求項14に記載の高周波回路。
    The first switch has a first switch input terminal connected to the first power amplifier and a first switch output terminal connected to the first filter input terminal of the first filter element.
    At least one of the first filter input terminal and the first switch output terminal of the first filter element overlaps with the first switch and the first filter element when the module substrate is viewed in a plan view.
    The high frequency circuit according to claim 14.
  16.  前記モジュール基板を平面視したときに前記第2スイッチと前記第2フィルタ素子とが重なる、
     請求項10~15のいずれか一つに記載の高周波回路。
    When the module substrate is viewed in a plan view, the second switch and the second filter element overlap each other.
    The high frequency circuit according to any one of claims 10 to 15.
  17.  前記第2スイッチは、前記第2電力増幅器に接続される第2スイッチ入力端子と、前記第2フィルタ素子の第2フィルタ入力端子に接続される第2スイッチ出力端子とを有し、
     前記第2フィルタ素子の第2フィルタ入力端子と前記第2スイッチ出力端子との少なくとも一方は、前記モジュール基板を平面視したときに前記第2スイッチ及び前記第2フィルタ素子と重なる、
     請求項16に記載の高周波回路。
    The second switch has a second switch input terminal connected to the second power amplifier and a second switch output terminal connected to the second filter input terminal of the second filter element.
    At least one of the second filter input terminal and the second switch output terminal of the second filter element overlaps with the second switch and the second filter element when the module substrate is viewed in a plan view.
    The high frequency circuit according to claim 16.
  18.  前記第1フィルタ素子は、通過帯域が異なる複数のフィルタ要素と、前記第1フィルタ素子の複数のフィルタ要素にそれぞれ対応する複数の前記第1フィルタ入力端子とを有し、
     前記第1スイッチは、前記第1電力増幅器に接続される第1スイッチ入力端子と、前記第1フィルタ素子の複数の第1フィルタ入力端子にそれぞれ接続される複数の第1スイッチ出力端子とを有し、前記第1スイッチ入力端子を前記複数の第1スイッチ出力端子のいずれか一つに接続するように構成され、
     前記複数の第1フィルタ入力端子のうちの少なくとも一つの第1フィルタ入力端子と前記複数の第1スイッチ出力端子のうちの前記少なくとも一つの第1フィルタ入力端子に接続される少なくとも一つの第1スイッチ出力端子との少なくとも一方は、前記モジュール基板を平面視したときに前記第1スイッチ及び前記第1フィルタ素子と重なる、
     請求項14に記載の高周波回路。
    The first filter element has a plurality of filter elements having different pass bands, and a plurality of the first filter input terminals corresponding to the plurality of filter elements of the first filter element.
    The first switch has a first switch input terminal connected to the first power amplifier and a plurality of first switch output terminals connected to a plurality of first filter input terminals of the first filter element. The first switch input terminal is configured to be connected to any one of the plurality of first switch output terminals.
    At least one first switch connected to at least one first filter input terminal among the plurality of first filter input terminals and at least one first filter input terminal among the plurality of first switch output terminals. At least one of the output terminals overlaps with the first switch and the first filter element when the module substrate is viewed in a plan view.
    The high frequency circuit according to claim 14.
  19.  前記第2フィルタ素子は、通過帯域が異なる複数のフィルタ要素と、前記第2フィルタ素子の複数のフィルタ要素にそれぞれ対応する複数の前記第2フィルタ入力端子とを有し、
     前記第2スイッチは、前記第2電力増幅器に接続される第2スイッチ入力端子と、前記第2フィルタ素子の複数の第2フィルタ入力端子にそれぞれ接続される複数の第2スイッチ出力端子とを有し、前記第2スイッチ入力端子を前記複数の第2スイッチ出力端子のいずれか一つに接続するように構成され、
     前記複数の第2フィルタ入力端子のうちの少なくとも一つの第2フィルタ入力端子と前記複数の第2スイッチ出力端子のうちの前記少なくとも一つの第2フィルタ入力端子に接続される少なくとも一つの第2スイッチ出力端子との少なくとも一方は、前記モジュール基板を平面視したときに前記第2スイッチ及び前記第2フィルタ素子と重なる、
     請求項14又は18に記載の高周波回路。
    The second filter element has a plurality of filter elements having different pass bands, and a plurality of the second filter input terminals corresponding to the plurality of filter elements of the second filter element.
    The second switch has a second switch input terminal connected to the second power amplifier and a plurality of second switch output terminals connected to a plurality of second filter input terminals of the second filter element. The second switch input terminal is configured to be connected to any one of the plurality of second switch output terminals.
    At least one second switch connected to at least one second filter input terminal of the plurality of second filter input terminals and the at least one second filter input terminal of the plurality of second switch output terminals. At least one of the output terminals overlaps with the second switch and the second filter element when the module board is viewed in a plan view.
    The high frequency circuit according to claim 14 or 18.
  20.  前記第1フィルタ素子及び前記第2フィルタ素子を封止する樹脂部材と、
     前記第1フィルタ素子及び前記第2フィルタ素子に対して前記モジュール基板の第1主面とは反対側に位置するように前記樹脂部材の表面に配置され、グランドに接続される金属層と、
     前記第1フィルタ素子及び前記第2フィルタ素子の第1フィルタ入力端子及び第2フィルタ入力端子と前記第1電力増幅器及び前記第2電力増幅器との間にそれぞれ挿入される第1スイッチ及び第2スイッチを有し、前記モジュール基板の第2主面に配置されるスイッチ集積回路と、
     を備え、
     前記金属部材は、
      前記モジュール基板の第1主面と第2主面との間に形成される貫通孔配線と、
      前記モジュール基板の第1主面に配置されて前記貫通孔配線に電気的に接続されるとともに前記金属層に電気的に接続されるシールド壁と、
      前記スイッチ集積回路のシリコン貫通電極であるグランド電極と、
      前記モジュール基板の第2主面に配置されて前記貫通孔配線と前記グランド電極とを接続する接続部材と、
     を含む、
     請求項1に記載の高周波回路。
    A resin member that seals the first filter element and the second filter element, and
    A metal layer arranged on the surface of the resin member so as to be located on the side opposite to the first main surface of the module substrate with respect to the first filter element and the second filter element, and connected to the ground.
    The first switch and the second switch inserted between the first filter input terminal and the second filter input terminal of the first filter element and the second filter element and the first power amplifier and the second power amplifier, respectively. And a switch integrated circuit arranged on the second main surface of the module board,
    Equipped with
    The metal member is
    Through-hole wiring formed between the first main surface and the second main surface of the module board, and
    A shield wall arranged on the first main surface of the module substrate and electrically connected to the through-hole wiring and electrically connected to the metal layer.
    The ground electrode, which is a through silicon via of the switch integrated circuit,
    A connecting member arranged on the second main surface of the module substrate and connecting the through-hole wiring and the ground electrode, and
    including,
    The high frequency circuit according to claim 1.
PCT/JP2021/047684 2020-12-28 2021-12-22 High frequency circuit WO2022145320A1 (en)

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JP2003008469A (en) * 2001-06-21 2003-01-10 Kyocera Corp High frequency module
JP2005244336A (en) * 2004-02-24 2005-09-08 Kyocera Corp Electronic circuit module
JP2018503262A (en) * 2015-01-15 2018-02-01 クアルコム,インコーポレイテッド 3D integrated circuit
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WO2019065419A1 (en) * 2017-09-29 2019-04-04 株式会社村田製作所 High-frequency module and communication device
WO2019240095A1 (en) * 2018-06-11 2019-12-19 株式会社村田製作所 High-frequency module and communication device
JP2020102693A (en) * 2018-12-20 2020-07-02 株式会社村田製作所 High frequency module and communication device
US20200313645A1 (en) * 2019-03-25 2020-10-01 Skyworks Solutions, Inc. Acoustic wave filters with isolation

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JP2003008469A (en) * 2001-06-21 2003-01-10 Kyocera Corp High frequency module
JP2005244336A (en) * 2004-02-24 2005-09-08 Kyocera Corp Electronic circuit module
JP2018503262A (en) * 2015-01-15 2018-02-01 クアルコム,インコーポレイテッド 3D integrated circuit
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