WO2022143542A1 - 模数转换器、电量检测电路以及电池管理系统 - Google Patents

模数转换器、电量检测电路以及电池管理系统 Download PDF

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WO2022143542A1
WO2022143542A1 PCT/CN2021/141707 CN2021141707W WO2022143542A1 WO 2022143542 A1 WO2022143542 A1 WO 2022143542A1 CN 2021141707 W CN2021141707 W CN 2021141707W WO 2022143542 A1 WO2022143542 A1 WO 2022143542A1
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signal
digital
circuit
input signal
analog
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PCT/CN2021/141707
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English (en)
French (fr)
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陈敏
陈培腾
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芯海科技（深圳）股份有限公司
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

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  • the present application relates to the technical field of analog-to-digital conversion, and in particular, to an analog-to-digital converter, a power detection circuit and a battery management system.
  • ⁇ - ⁇ ADC Sigma-Delta Analog-to-Digital Converter, ⁇ - ⁇ analog-to-digital converter
  • a sigma-delta ADC processes an input signal through a digital filter, but different digital filters have different processing characteristics for different input signals, thereby affecting the detection accuracy of the sigma-delta ADC.
  • embodiments of the present application provide an analog-to-digital converter, a power detection circuit, and a battery management system to solve the above technical problems.
  • An analog-to-digital converter includes a modulator, a digital filtering module, a signal detector and a selection circuit; the modulator is used for quantizing an input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used for quantizing the quantized signal filter; wherein the digital filter module includes at least two digital filters; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the digital filter module according to the signal parameters level of .
  • An embodiment of the present application further provides a power detection circuit, including the above-mentioned analog-to-digital converter, and the power detection circuit further includes a sampling circuit; one end of the sampling circuit is used for sampling the input voltage, and the other end is connected to the analog-to-digital converter.
  • An embodiment of the present application further provides a battery management system, including the above-mentioned electric quantity detection circuit.
  • FIG. 1 shows a module block diagram of an analog-to-digital converter provided by an embodiment of the present application.
  • FIG. 2 shows an example diagram of an implementation manner of an analog-to-digital converter provided by an embodiment of the present application.
  • FIG. 3 shows a block diagram of the frequency detection module in FIG. 2 .
  • FIG. 4 shows a schematic diagram of the circuit structure of the frequency detection module in FIG. 2 .
  • FIG. 5 shows an example diagram of another implementation manner of the analog-to-digital converter provided by the embodiment of the present application.
  • FIG. 6 shows a block diagram of the amplitude detection module in FIG. 5 .
  • FIG. 7 is a diagram illustrating another implementation example of the analog-to-digital converter provided by the embodiment of the present application.
  • FIG. 8 shows a block diagram of a digital filtering module and a selection circuit provided by an embodiment of the present application.
  • FIG. 9 shows a module block diagram of another analog-to-digital converter provided by an embodiment of the present application.
  • FIG. 10 shows a schematic diagram of a simulation result of measuring an input signal by analog-to-digital conversion provided by an embodiment of the present application.
  • FIG. 11 shows a schematic circuit structure diagram of a power detection circuit provided by an embodiment of the present application.
  • the fuel gauge obtains the charge (current*time) information by sampling the current of the battery with high precision within a specified time window, and by measuring the open-circuit voltage and combining the two information, it realizes the dynamic refresh of key parameters such as the battery charge and impedance meter.
  • the traditional sigma-delta ADC (Sigma-Delta Analog-to-Digital Converter, sigma-delta analog-to-digital converter) does not have precise automatic gain control, no measures to eliminate Offset (offset), and uses complex digital decimation filtering Therefore, it cannot meet the requirements of ADCs used in instrumentation and sensing measurement fields.
  • the dual-slope ADC has good low Offset and accurate gain, it requires 2N+1 quantization cycles to achieve the quantization accuracy of N Bit, and requires the analog circuit to have good matching accuracy. Due to the limitation of the number of quantization cycles and the matching accuracy of the analog device, the dual-slope ADC cannot meet the high-precision ADC requirements. Incremental ⁇ - ⁇ ADC can well meet the application conditions in the field of instrumentation and sensing measurement. Therefore, incremental sigma-delta ADCs are widely used in battery power monitoring systems because they can achieve accurate acquisition of battery voltage/current signals.
  • Incremental sigma-delta ADCs can be considered as traditional sigma-delta ADCs working in transient mode. After each quantization is completed, the modulator and digital filter need to be reset to eliminate the information of the last quantization state and ensure that each quantization The initial state is the same. Compared with traditional sigma-delta ADCs, incremental sigma-delta ADCs have the following advantages:
  • the number of quantization cycles of the first-order incremental ⁇ - ⁇ ADC is in the same order of magnitude, and 2N quantization cycles are required to achieve the quantization accuracy of N Bit.
  • the incremental ⁇ - ⁇ ADC has the characteristics of the traditional ⁇ - ⁇ ADC, that is, high-order expansion can be performed. Therefore, incremental sigma-delta ADCs can achieve high accuracy with very low quantization time.
  • the modulator order is maintained, and the high-order processing of residual error quantization is realized through the high-order expansion of the digital filter, thereby reducing the quantization error and improving the accuracy.
  • different digital filters have different processing characteristics for different input signals, thus affecting the detection accuracy of the ⁇ - ⁇ ADC.
  • the embodiments of the present application provide an analog-to-digital converter, a power detection circuit, and a battery management system.
  • the analog-to-digital converter includes a modulator, a digital filtering module, a signal detector, and a selection circuit;
  • the modulator is used for quantizing the input signal to output the quantized signal;
  • the digital filtering module is connected to the modulator and is used for filtering the quantized signal; wherein the digital filtering module includes at least two digital filters connected in sequence;
  • the signal detector is used for The signal parameter of the input signal is detected; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used for adjusting the order of the digital filter module according to the signal parameter.
  • the signal parameters of the input signal are detected by the signal detector, so that the types of the input signals can be distinguished, and then the order of the digital filtering module is adjusted according to the signal parameters by the selection circuit, and the digital filtering module is adapted to different types of input signals. It can realize the optimal configuration of different types of input signals and achieve fast and high-precision measurement.
  • an embodiment of the present application provides an analog-to-digital converter 100 .
  • the analog-to-digital converter 100 includes a modulator 110 , a digital filtering module 120 , a signal detector 130 and a selection circuit 140 .
  • the modulator 110 is used to quantize the input signal to output the quantized signal;
  • the digital filtering module 120 is connected to the modulator 110 and is used to filter the quantized signal;
  • the digital filtering module 120 includes at least two digital filters;
  • the detector 130 is used to detect the signal parameters of the input signal;
  • the selection circuit 140 is connected to the digital filter module 120 and the signal detector 130, and is used to adjust the order of the digital filter module 120 according to the signal parameters.
  • the modulator 110 is a sigma-delta modulator.
  • the analog-to-digital converter 100 samples the input signal through the sampling clock, and sends the input signal to the modulator 110.
  • the modulator 110 receives the input signal and can quantize the input signal, and then outputs the quantized signal.
  • the input signal may be, but not limited to, an AC signal or a DC signal.
  • the digital filtering module 120 may perform digital integral filtering on the quantized signal output by the modulator 110 to complete the processing of the quantized signal.
  • the digital filtering module 120 may include at least two digital filters.
  • the digital filter may be a digital integral filter.
  • the digital filtering module 120 can be configured as a low-order digital integrator filter as well as a high-order digital integrator filter. It is worth noting that low-order digital integral filtering and high-order digital integral filtering have different processing characteristics for different input signals.
  • the low-order digital integral filtering incremental sigma-delta ADC has high measurement accuracy for AC signals and fast dynamic response; high-order digital integral filtering incremental sigma-delta ADCs have high measurement accuracy for DC signals and slow dynamic response to AC signals.
  • the signal detector 130 may detect signal parameters of the input signal.
  • the signal parameter may include, but is not limited to, the frequency of the input signal, the amplitude of the input signal, and the signal-to-noise ratio of the input signal.
  • the type of the input signal can be determined to a certain extent. For example, by detecting the frequency fluctuation of the input signal, it can be determined whether the input signal is an AC signal or a DC signal; by detecting the amplitude of the input signal, it can be determined whether the input signal is a large signal or a small signal. .
  • the selection circuit 140 can adaptively adjust the order of the digital filtering module 120 according to the signal parameters of the input signal detected by the signal detector 130, that is, the digital filtering module 120 can be configured as a low-order digital integral filter or a high-order digital filter. Integral filter. It is worth noting that the low-order digital integrator filter does not specifically refer to a digital integrator filter of a certain order, it can represent a digital integrator filter of a certain order range; similarly, the high-order digital integrator filter also does not refer to It does not specifically refer to a digital integral filter of a certain order, but can also represent a digital integral filter of a certain order range.
  • the analog-to-digital converter 100 detects the signal parameters of the input signal through the signal detector 130, and then adjusts the order of the digital filter module 120 through the selection circuit 140 according to the detected signal parameters of the input signal, and configures the digital filter module 120. It is a digital integrating filter of different orders, so that when the analog-to-digital converter 100 measures the input signal, it can measure the input signal with the digital integrating filter whose order is most suitable for the input signal, so as to ensure that the input signal is measured. The measurement accuracy of the input signal. Then, in the face of different types of input signals, the optimal digital integral filtering configuration can be given to different types of input signals, so as to achieve fast and high-precision measurement of different types of input signals.
  • the analog-to-digital converter 100 can configure optimal integral digital filtering for the DC input signal and the AC input signal, thereby realizing fast and high-precision measurement of the DC input signal and the AC input signal.
  • the signal detector 130 can detect the frequency fluctuation degree of the input signal, and distinguish whether the input signal is a DC input signal or an AC input signal according to the frequency fluctuation degree, so that the selection circuit 140 can configure the digital input signal with the optimal order. filter module.
  • the signal detector 130 includes a frequency detection module 131 , and the frequency detection module 131 is configured to receive the input signal and detect the frequency fluctuation degree of the input signal.
  • the selection circuit 140 is also used for adjusting the order of the digital filtering module 120 according to the degree of frequency fluctuation.
  • the frequency detection module 131 includes a threshold circuit 1311 , a window comparison circuit 1312 , a clock circuit 1313 and a pulse width detector 1314 .
  • the threshold circuit 1311 is used to receive the input signal and provide a threshold window signal according to the input signal
  • the window comparison circuit 1312 is connected to the threshold circuit 1311 and used to compare the input signal with the threshold window signal and output the comparison result
  • the clock circuit 1313 The pulse width detector 1314 is connected to the clock circuit 1313 and used to detect the pulse width of the pulse signal and obtain the frequency fluctuation degree of the input signal according to the pulse width.
  • the pulse signal output by the clock circuit 1313 according to the comparison result of the window comparison circuit 1312 is high level, and the pulse width detector 1314 detects the high level duration of the pulse signal. detection, and then the frequency fluctuation degree of the input signal can be obtained.
  • the frequency detection module 131 further includes a low-pass filter 1315 .
  • the low-pass filter 1315 receives the input signal Vin and filters the output signal Vdc.
  • the threshold circuit 1311 is a zero-crossing threshold circuit, and the threshold circuit 1311 includes a first window output terminal and a second window output terminal.
  • the threshold value circuit 1311 receives the output signal Vdc of the low-pass filter 1315 and outputs the first threshold value window signal (Vdc+Vth) at the first window output end, and outputs the second threshold value window signal (Vdc-Vth) at the second window output end .
  • the window comparison circuit 1312 includes a first comparator A1 and a second comparator A2.
  • the first comparator A1 includes a first non-inverting input terminal and a first inverting input terminal, wherein the first non-inverting input terminal is connected to the first window output terminal of the threshold circuit 1311 to receive the first threshold window signal (Vdc+Vth) , the first inverting input terminal receives the input signal Vin, and the output terminal is connected to the clock circuit 1313 .
  • the second comparator A2 includes a second non-inverting input terminal and a second inverting input terminal, wherein the second non-inverting input terminal receives the input signal Vin, and the second inverting input terminal is connected to the second window output terminal of the threshold circuit 1311 to receive the first Two threshold window signals (Vdc-Vth), the output terminals are connected to the clock circuit 1313 .
  • the clock circuit 1313 includes an OR circuit, an AND circuit, and an RS (reset/set) flip-flop.
  • the two input ends of the OR circuit are respectively connected to the output end of the first comparator and the output end of the second comparator, and the output end of the OR circuit is connected to the set end of the RS flip-flop.
  • the two input terminals of the AND gate circuit are also respectively connected to the input terminal of the first comparator and the output terminal of the second comparator, and the output terminal of the AND gate circuit is connected to the reset terminal of the RS flip-flop.
  • the output terminal of the RS flip-flop is connected to the input terminal of the pulse width detector 1314 .
  • the selection circuit 140 can configure the order of the digital filtering module 120 according to the frequency fluctuation degree of the input signal.
  • a fluctuation threshold can be preset, and the type of the input signal can be determined according to the comparison result between the frequency fluctuation degree of the input signal and the fluctuation threshold.
  • the input signal can be considered as AC signal; when the frequency fluctuation of the input signal is less than the fluctuation threshold, the input signal can be considered as a DC signal.
  • the selection circuit 140 can configure the digital filtering module 120 as a low-order digital integral filter; when the frequency fluctuation degree of the input signal is less than the fluctuation threshold, the selection circuit 140 can The digital filtering module 120 is configured as a high-order digital integration filter.
  • the analog-to-digital converter 100 can realize fast and high-precision measurement of different input signals.
  • the analog-to-digital converter 100 can configure optimal integral digital filtering for the large input signal and the small input signal, so as to realize fast and high-precision measurement of the large input signal and the small input signal.
  • the signal detector 130 can detect the amplitude of the input signal, and determine whether the type of the input signal is a large signal or a small signal according to the amplitude, so that a digital filtering module with an optimal order can be configured for the input signal.
  • the signal detector 130 includes an amplitude detection module 132 connected to the modulator 110 for detecting the amplitude of the input signal according to the quantized signal.
  • the selection circuit 140 is also used for adjusting the order of the digital filtering module 120 according to the amplitude.
  • the amplitude detection module 132 may be a PDM (Pulse Density Modulation, pulse density modulation) amplitude detection quantizer.
  • the amplitude of the input signal can be obtained through PDM technology.
  • the amplitude detection module 132 includes a level detection module 1321 , a counter 1323 and a threshold judgment circuit 1324 .
  • the level detection circuit is connected to the modulator 110 and used to detect the level of the quantized signal in each zero-crossing period, wherein the level includes a high level and/or a low level.
  • the counter 1323 is connected to the level detection circuit for counting the number of levels.
  • the counter 1323 can count the number of high levels and the number of low levels in the entire measurement period of the input signal by the analog-to-digital converter 100 .
  • the threshold judging circuit 1324 is connected to the counter 1323, and is used for calculating at least one of the average value and the variance of the number of levels in the whole measurement period, and obtaining the amplitude of the input signal according to at least one of the average value and the variance.
  • the threshold value judgment circuit 1324 can calculate at least one of the mean value and the variance of the number of high levels in the entire measurement period, when the mean value of the number of high levels is greater than or equal to the mean value threshold and the variance of the number of high levels is greater than the variance threshold. When any one of them is satisfied, the input signal can be considered as a large signal; when the average value of the number of high levels is less than the average threshold and the variance of the number of high levels is less than the variance threshold, the input signal can be considered as a small signal.
  • the input signal when the average value of the number of high levels is greater than or equal to the average value threshold and the variance of the number of high levels is greater than the variance threshold, the input signal can be considered as a large signal; when the average value of the number of high levels is greater than the variance threshold When either the variance equal to the average threshold or the variance of the number of high levels is greater than the variance threshold, the input signal can be considered as a small signal.
  • the input signal can be considered as a large signal; when the average value of the number of low levels is less than the average.
  • the input signal is considered to be a small signal when the value threshold is exceeded and the variance of the number of low levels is less than the variance threshold.
  • the input signal when the average value of the number of low levels is greater than or equal to the average value threshold and the variance of the number of low levels is greater than the variance threshold, the input signal can be considered as a large signal; when the average value of the number of low levels is greater than the variance threshold When either of the variance equal to the average threshold or the variance of the number of low levels is greater than the variance threshold, the input signal can be considered as a small signal.
  • the selection circuit 140 can configure the order of the digital filtering module 120 according to the amplitude of the input signal, so that when the input signal is a large signal, the analog-to-digital converter 100 performs the input signal with a digital integrating filter whose order is most suitable for the large signal. Measurement: when the input signal is a small signal, the analog-to-digital converter 100 measures the input signal with a digital integrating filter whose order is most suitable for the small signal, thereby realizing fast and high-precision measurement of different input signals.
  • the analog-to-digital converter 100 may configure digital filter modules with optimal order for the DC input signal, the AC large input signal, and the AC small input signal, respectively, so as to realize the detection of the DC input signal, the AC large input signal, the Fast, high-accuracy measurements of small AC input signals.
  • the signal detector 130 can detect the frequency fluctuation degree of the input signal and the amplitude of the input signal at the same time, and can distinguish whether the input signal is a direct current signal or an alternating current signal by the frequency fluctuation degree, and can distinguish whether the alternating current signal is a large alternating current signal or an alternating small signal by the amplitude , so that the selection circuit 140 can configure a digital filter module with an optimal order for the input signal.
  • the signal detector 130 may include a frequency detection module 131 and an amplitude detection module 132 .
  • the frequency detection module 131 is used for receiving the input signal and detecting the frequency fluctuation degree of the input signal; the amplitude detection module 132 is connected to the modulator 110 and is used for detecting the amplitude of the input signal according to the quantized signal.
  • the selection circuit 140 is also used to configure the order of the digital filtering module 120 according to the frequency fluctuation degree and amplitude.
  • the structures and principles of the frequency detection module 131 and the amplitude detection module 132 are the same as those in the previous embodiment, and will not be described again.
  • the selection circuit 140 can configure the digital filtering module 120 as a high-order digital integral filter; when the input signal is considered to be a high-order digital integral filter according to the frequency fluctuation degree of the input signal AC signal, and when the input signal is considered to be a large signal according to the amplitude of the input signal, the input signal is considered to be an AC large signal, and the selection circuit 140 can configure the digital filtering module 120 as a low-order digital integral filter;
  • the input signal is considered to be an AC signal according to the degree of frequency fluctuation of the input signal, and when the input signal is considered to be a small signal according to the amplitude of the input signal, the input signal is considered to be an AC small signal, and the selection circuit 140 can configure the digital filter module 120 as a high-order Digital integrating filter to achieve fast and high-precision measurement of different input signals.
  • the digital filter module 120 includes at least two digital filters connected in sequence
  • the selection circuit 140 includes a multiplexer 141 and a selection control circuit 142 .
  • the multiplexer 141 includes an output terminal and at least two input terminals, and each input terminal is connected to the output terminal of each digital filter in a one-to-one correspondence.
  • the selection control circuit 142 is connected to the signal detector 130 and the multiplexer 141 for connecting the output terminal of the multiplexer 141 to one of the input terminals of the multiplexer 141 according to the signal parameters.
  • the selection control circuit 142 can control the multiplexer 141 to configure the digital filter module 120 as digital integral filters of different orders according to the frequency fluctuation degree of the input signal detected by the signal detector 130 and the amplitude of the input signal . Since the at least two digital filters in the digital filtering module 120 are connected in sequence, and each input end of the multiplexer 141 is connected to the output end of each digital filter in a one-to-one correspondence, each of the multiplexer 141 The input ends are all connected to a digital integral filter of a certain order.
  • the digital filter is a first-order digital integral filter
  • the second input end of the selector 141 is connected with two digital filters connected in sequence, and the two digital filters connected in sequence are second-order digital integral filters, that is, in this embodiment, the order includes and multi-channel.
  • the selection control circuit 142 can configure the digital filtering module 120 as digital integrating filters of different orders by connecting the output terminal of the multiplexer 141 to one of the input terminals of the multiplexer 141 .
  • the analog-to-digital converter includes a modulator, a digital filtering module, a signal detector, and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used to quantify the input signal.
  • the quantized signal is filtered; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to detect the signal The parameter adjusts the order of the digital filter module.
  • the signal parameter of the input signal is detected by the signal detector, so that the type of the input signal can be distinguished, and then the order of the digital filtering module is adjusted according to the signal parameter by the selection circuit, and then the digital integral filtering module is used for different types of input signals. Adaptation, so as to achieve the optimal configuration of different types of input signals, to achieve fast and high-precision measurement.
  • this embodiment further provides an analog-to-digital converter 200 .
  • the analog-to-digital converter 200 also includes a modulator 210 , a digital filtering module 220 , a signal detector 230 and a selection circuit 240 .
  • the functions of the modulator 210 , the digital filtering module 220 , the signal detector 230 , and the selection circuit 240 are the same as those in the previous embodiment, and will not be repeated.
  • the modulator 210 includes an integrator 211, a main quantizer 212, and a digital-to-analog converter 213; wherein, the integrator 211 is an incremental sigma-delta modulation integrator, and the integrator 211 is used for The input signal is integrated to output the integrated signal; the main quantizer 212 is connected to the integrator 211 for quantizing the integrated signal to output the quantized signal; the digital-to-analog converter 213 is connected to the output end of the main quantizer 212 and the integrator 211 input to form a feedback path.
  • the modulator 210 further includes a first gain module 214 , a second gain module 215 and a third gain module 216 .
  • the input end of the first gain module 214 is used for receiving the input signal, and the output end is connected to the input end of the integrator 211;
  • the second gain module 215 is arranged between the integrator 211 and the main quantizer 212, and the second gain module 215
  • the input end is connected to the output end of the integrator 211, and the output end is connected to the input end of the main quantizer 212;
  • the third gain module 216 is set in the feedback path, and the input end of the third gain module 216 is connected to the digital-to-analog converter 213
  • the output terminal is connected to the input terminal of the integrator 211 .
  • the digital filtering module 220 includes a first digital filter 221 and a second digital filter 222 .
  • the input end of the first digital filter 221 is connected to the output end of the main quantizer 212 ; the input end of the second digital filter 222 is connected to the output end of the first digital filter 221 .
  • the signal detector 230 includes a frequency detection module 231 and an amplitude detection module 232 .
  • the frequency detection module 231 receives the input signal and is used to detect the frequency fluctuation degree of the input signal.
  • the amplitude detection module 232 is connected to the output end of the main quantizer 212, and is used for detecting the amplitude of the input signal according to the quantized signal.
  • the structures and principles of the frequency detection module 231 and the amplitude detection module 232 in this embodiment may be the same as those in the foregoing embodiments, and will not be described again.
  • the selection circuit 240 includes a multiplexer 241 and a selection control circuit 242 .
  • the multiplexer 241 includes a first input terminal and a second input terminal. The first input terminal is connected to the output terminal of the first digital filter 221 , and the second input terminal is connected to the output terminal of the second digital filter 222 .
  • the input end of the selection control circuit 242 is connected to the output end of the frequency detection module 231 and the output end of the amplitude detection module 232 , and the output end is connected to the control end of the multiplexer 241 .
  • the signal detector 230 can simultaneously detect the frequency fluctuation degree of the input signal and the amplitude of the input signal, so that the selection control circuit 242 can control the multiplexer 241 to convert the digital signal according to the frequency fluctuation degree of the input signal and the amplitude of the input signal.
  • the filtering module 220 is configured as digital integral filters of different orders, so as to adapt to different input signal types.
  • the digital filtering module 220 When the selection control circuit 242 controls the first input terminal of the multiplexer 241 to be connected to the output terminal, the digital filtering module 220 is configured as a first-order digital integral filter; when the selection control circuit 242 controls the second input terminal of the multiplexer 241 When the input terminal is connected to the output terminal, the digital filtering module 220 is configured as a second-order digital integral filter.
  • the analog-to-digital converter 200 in this embodiment can configure the digital filtering module 220 as a first-order digital integration filter or a second-order digital integration filter according to the type of the input signal, so as to adapt to different input signals and respond to different types of input signals.
  • the optimal configuration of the input signal achieves fast and high-precision measurement.
  • the analog-to-digital converter 200 further includes a reset circuit (not shown in the figure), and the reset circuit is used to reset the analog-to-digital converter 200 after each time the modulator 210 quantizes the input signal, to eliminate this quantified information. That is, after the analog-to-digital converter 200 completes one quantization, the modulator 210 and the digital filtering module 220 can be reset by the reset circuit to eliminate the information of the current quantization state and ensure that the initial state of each quantization is the same.
  • each quantization of the analog-to-digital converter 200 may include multiple conversion cycles.
  • V 1 [0] is the input signal of the main quantizer 212 in the reset stage.
  • V 1 [1] (V 1 [0]+a1*Vin[0]-b1*Vref*D[0])*a2 (2)
  • V 1 [1] (a1*Vin[0]-b1*Vref*D[0])*a2 (3)
  • V 1 [2] (V 1 [1]+a1*Vin[1]-b1*Vref*D[1])*a2 (4)
  • V 1 [2] [a1*(Vin[1]+Vin[0])-b1*Vref*(D[1]+D[0])]*a2 (5)
  • V 1 [2] is the input signal of the main quantizer 212 in the second conversion period; Vin[1] is the input signal in the first conversion period; D[1] is the main quantizer 212 in the first conversion period The output code value.
  • V 1 [n] is the input signal of the main quantizer 212 of the n-th conversion cycle; Vin[k] is the input signal; D[k] is the digital integral filter.
  • the input signal Vin satisfies the following equation:
  • D'[k] is the second-order integral digital filter.
  • the analog-to-digital converter 200 can configure the digital filtering module 220 as a first-order digital integral filter or a second-order digital integral filter for different types of input signals by detecting the signal parameters of the input signal, and further Different input signals adaptively select first-order digital integral filtering or second-order digital integral filtering.
  • FIG. 10 is a schematic diagram of a simulation result of measuring an input signal by analog-to-digital conversion provided in this embodiment.
  • the input signal is a mixed signal of DC signal and AC signal.
  • the DC signal is 10uV
  • the continuous period is 6.5s
  • the AC signal is 100uV
  • the period is 6.5s.
  • the digital filtering module 220 can be configured as a second-order digital integrating filter, so as to provide the measurement accuracy of the DC signal.
  • the digital filtering module 220 can be configured as a first-order digital integrating filter, so as to provide the measurement accuracy of the AC signal.
  • the analog-to-digital converter 200 in this embodiment can configure digital integrating filters of the optimal order for different input signals by detecting the frequency characteristics and amplitude characteristics of the input signals, so as to realize the detection of different input signals. Fast, high-precision measurement of input signals.
  • the analog-to-digital converter includes a modulator, a digital filtering module, a signal detector, and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used to quantify the input signal.
  • the quantized signal is filtered; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to detect the signal The parameter adjusts the order of the digital filter module.
  • the signal parameter of the input signal is detected by the signal detector, so that the type of the input signal can be distinguished, and then the order of the digital filtering module is adjusted according to the signal parameter by the selection circuit, and then the digital integral filtering module is used for different types of input signals. Adaptation, so as to achieve the optimal configuration of different types of input signals, to achieve fast and high-precision measurement.
  • an embodiment of the present application further provides a power detection circuit 300 .
  • the power detection circuit 300 includes a sampling circuit 310 and the above-mentioned analog-to-digital converter. One end of the sampling circuit 310 is used for sampling the input signal, and the other end is connected to the analog-to-digital converter.
  • the sampling circuit 310 includes a first resistor R1, a second resistor R2, a third resistor R3 and a capacitor C1.
  • the first end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end is connected to the first end of the third resistor R3; the two ends of the first resistor R1 are also connected to two terminals of the battery BAT respectively. end; the first end of the capacitor C1 is connected to the second end of the second resistor R2, and the second end is connected to the second end of the third resistor R3; the second end of the second resistor R2 is connected to the second end of the third resistor R3 The terminal is connected to the analog-to-digital converter.
  • the sampling circuit can sample the voltage of the battery BAT, and convert the sampled signal into a differential signal and input it to the analog-to-digital converter for high-precision measurement.
  • the electric quantity detection circuit includes a modulator, a digital filtering module, a signal detector and a selection circuit; the modulator is used for quantizing the input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used for quantizing the quantized signal.
  • the digital filtering module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filtering module and the signal detector, and the selection circuit is used for according to the signal parameters Adjust the order of the digital filter block.
  • the signal parameter of the input signal is detected by the signal detector, so that the type of the input signal can be distinguished, and then the order of the digital filtering module is adjusted according to the signal parameter by the selection circuit, and then the digital integral filtering module is used for different types of input signals. Adaptation, so as to achieve the optimal configuration of different types of input signals, to achieve fast and high-precision measurement.
  • Embodiments of the present application further provide a battery management system, where the battery management system includes the above-mentioned electric quantity detection circuit.

Abstract

本申请实施例提供了一种模数转换器，包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。

Description

模数转换器、电量检测电路以及电池管理系统
相关申请的交叉引用
本申请要求于2020年12月31日提交的申请号为2020116280722的中国申请的优先权，其在此处于所有目的通过引用将其全部内容并入本文。
技术领域
本申请涉及模拟数字转换技术领域，具体涉及一种模数转换器、电量检测电路以及电池管理系统。
背景技术
近年来，随着超大规模集成电路制造水平的提高，Σ-ΔADC(Sigma-Delta Analog-to-Digital Converter，Σ-Δ模数转换器)正以其分辨率高、线性度好、成本低等特点得到越来越广泛的应用。
通常地，Σ-ΔADC通过数字滤波器对输入信号进行处理，但是不同的数字滤波器对不同的输入信号处理的特性不同，从而影响Σ-ΔADC的检测精度。
发明内容
鉴于以上问题，本申请实施例提供一种模数转换器、电量检测电路以及电池管理系统，以解决上述技术问题。
本申请实施例是采用以下技术方案实现的：
一种模数转换器，包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。
本申请实施例还提供一种电量检测电路，包括上述的模数转换器，电量检测电路还包括采样电路；采样电路一端用于采样输入电压，另一端连接于模数转换器。
本申请实施例还提供一种电池管理系统，包括上述的电量检测电路。
本申请的这些方面或其他方面在以下实施例的描述中会更加简明易懂。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1示出了本申请实施例提供的一种模数转换器的模块框图。
图2示出了本申请实施例提供模数转换器的一种实施方式示例图。
图3示出了图2中频率检测模块的模块框图。
图4示出了图2中频率检测模块的电路结构示意图。
图5示出了本申请实施例提供的模数转换器的另一种实施方式示例图。
图6示出了图5中幅度检测模块的模块框图。
图7示出了本申请实施例提供的模数转换器的又一种实施方式示例图。
图8示出了本申请实施例提供的数字滤波模块与选择电路的模块框图。
图9示出了本申请实施例提供的另一种模数转换器的模块框图。
图10示出了本申请实施例提供的模数转换对输入信号测量的仿真结果示意图。
图11示出了本申请实施例提供的一种电量检测电路的电路结构示意图。
具体实施方式
下面详细描述本申请的实施方式，实施方式的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性地，仅用于解释本申请，而不能理解为对本申请的限制。
为了使本技术领域的人员更好地理解本申请的方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整的描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
随着快充和5G(5th generation mobile networks,第五代移动通信技术)的普及，需要精确手机电池电量监测功能，电池电量监测是通过电量计实现的，电量计用来计量并显示电池电量，通常包括剩余容量、满充容量、百分比容量、电压、电流、温度等，部分电量计还包含放空、充满时间、最大化学容量以及阻抗表。电量计通过对电池的电流在指定时间窗口内进行高精度采样得到电荷(电流*时间)信息，通过测量开路电压，结合两者信息实现电池电量和阻抗表等关键参数的动态刷新。
传统的Σ-ΔADC(Sigma-Delta Analog-to-Digital Converter，Σ-Δ模数转换器)不具有精确的自 动增益控制，没有消除Offset(偏移)的措施，并且使用结构复杂的数字抽取滤波器，因此不能满足用于仪器仪表和传感测量领域的ADC的要求。虽然双斜ADC具有较好的低Offset和精确增益，但是其需要2N+1个量化周期数实现N Bit的量化精度，同时要求模拟电路具有良好的匹配精度。由于量化周期数和模拟器件匹配精度的限制，双斜ADC无法满足高精度ADC要求。增量式Σ-ΔADC可以很好的满足仪器仪表和传感测量领域的应用条件。因此，增量式Σ-ΔADC应因可实现对电池的电压/电流信号精确采集被广泛应用在电池电量监测系统。
增量式Σ-ΔADC可以认为是传统的Σ-ΔADC工作在瞬态模式，每完成一次量化之后，需要将调制器和数字滤波器进行复位，消除上一次量化状态的信息，保证每次量化的初始状态是相同的。相对于传统Σ-ΔADC，增量式Σ-ΔADC具有以下优点：
1、具有精确的高增益。传统Σ-ΔADC中，基带内的量化噪声功率为常数，随着输入信号幅值的减小，信噪比下降。而增量式Σ-ΔADC的原理是量化输入信号的幅值，因此在每个输入幅值范围内，其量化精度都是保持不变的。
2、高线性度。在增量式Σ-ΔADC中，每次量化之前都进行一次复位，消除前一个量化状态的信息，因此对输入信号幅度范围内的信号，都能够进行精度相同的量化，线性度高。
3、相对于双斜ADC，一阶增量式Σ-ΔADC的量化周期数与其在相同的数量级上，需要2N个量化周期数实现N Bit的量化精度。而增量式Σ-ΔADC具有传统Σ-ΔADC的特点，即可以进行高阶扩展。因此，增量式Σ-ΔADC可以用很低的量化时间实现高精度。
对于低功耗应用场合，保持调制器阶数，通过数字滤波器的高阶扩展，实现对余误差量化的高阶处理，进而减小量化误差，提高精度。但是不同的数字滤波器对不同的输入信号处理的特性不同，从而影响Σ-ΔADC的检测精度。
经过申请人的长期研究与测试，本申请实施例提供一种模数转换器、电量检测电路以及电池管理系统，该模数转换器包括包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个依次连接的数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。本实施例通过信号检测器检测输入信号的信号参数，进而能够区分输入信号的类型，再通过选择电路根据该信号参数调整数字滤波模块的阶数，进而数字滤波模块对不同类型的输入信号进行适配，从而实现对不同类型输入信号的最优配置，达到快速高精度测量。
如图1所示，本申请实施例提供一种模数转换器100。模数转换器100包括调制器110、数字滤波模块120、信号检测器130以及选择电路140。其中调制器110用于对输入信号进行量化，以输出量化信号；数字滤波模块120连接于调制器110，且用于对量化信号进行滤波；数字滤波 模块120包括至少两个数字滤波器；信号检测器130用于检测输入信号的信号参数；选择电路140连接于数字滤波模块120以及信号检测器130，且用于根据信号参数调整数字滤波模块120的阶数。
调制器110为Σ-Δ调制器。模数转换器100通过采样时钟采样输入信号，并将输入信号送入调制器110，调制器110接收输入信号可以对输入信号进行量化，进而输出量化信号。本实施例中，输入信号可以是但不限于是交流信号或直流信号。
数字滤波模块120可以对调制器110输出的量化信号进行数字积分滤波，完成对量化信号的处理。本实施例中，数字滤波模块120可以包括至少两个数字滤波器。该数字滤波器可以为数字积分滤波器。数字滤波模块120能够被配置为低阶数字积分滤波器以及高阶数字积分滤波器。值得说明的是，低阶数字积分滤波与高阶数字积分滤波对不同输入信号处理的特性不同。例如，低阶数字积分滤波增量式Σ-ΔADC对交流信号的测量精度高，动态响应快；高阶数字积分滤波增量式Σ-ΔADC对直流信号测量精度高，对交流信号动态响应慢。
信号检测器130可以检测输入信号的信号参数。本申请实施例中，该信号参数可以包括但不限于输入信号的频率、输入信号的幅度以及输入信号的信噪比。其中，通过检测输入信号的信号参数，能够在一定程度上判别输入信号的类型。例如，通过检测输入信号的频率波动，能够判别输入信号是交流信号还是直流信号；通过检测输入信号的幅度，能够判别输入信号是大信号还是小信号。。
选择电路140可以根据信号检测器130检测到的输入信号的信号参数，自适应地调节数字滤波模块120的阶数，也即可以将数字滤波模块120配置为低阶数字积分滤波器或高阶数字积分滤波器。值得说明的是，低阶数字积分滤波器并不特指某一阶数的数字积分滤波器，其可以表示某一阶数范围的数字积分滤波器；同样地，高阶数字积分滤波器也并不特指某一阶数的数字积分滤波器，同样可以表示某一阶数范围的数字积分滤波器。
本实施例中，模数转换器100通过信号检测器130检测输入信号的信号参数，再通过选择电路140根据检测的输入信号的信号参数调节数字滤波模块120的阶数，将数字滤波模块120配置为不同阶数的数字积分滤波器，使得模数转换器100在对输入信号进行测量时，能够以阶数与该输入信号最为适配的数字积分滤波器对该输入信号进行测量，保证对该输入信号的测量精度。那么在面对不同类型的输入信号时，能够给不同类型的输入信号最优的数字积分滤波配置，从而实现对不同类型输入信号的快速、高精度测量。
作为一种实施方式，模数转换器100可以对直流输入信号和交流输入信号配置最优的积分数字滤波，从而实现对直流输入信号和交流输入信号的快速、高精度测量。
其中，信号检测器130可以检测输入信号的频率波动程度，根据该频率波动程度区分输入信 号的类型是直流输入信号或交流输入信号，从而使得选择电路140能够对输入信号配置阶数最优的数字滤波模块。
如图2所示，本实施方式中，信号检测器130包括频率检测模块131，频率检测模块131用于接收输入信号并检测输入信号的频率波动程度。选择电路140还用于根据频率波动程度调整数字滤波模块120的阶数。
如图3所示，频率检测模块131包括阈值电路1311、窗口比较电路1312、时钟电路1313以及脉宽检测器1314。其中，阈值电路1311用于接收输入信号，且根据输入信号提供阈值窗口信号；窗口比较电路1312连接于阈值电路1311，且用于将输入信号与阈值窗口信号比较，并输出比较结果；时钟电路1313连接于窗口比较电路1312，且用于根据比较结果输出脉冲信号；脉宽检测器1314连接于时钟电路1313，且用于检测脉冲信号的脉冲宽度，并根据脉冲宽度获得输入信号的频率波动程度。
本实施方式中，当输入信号大于阈值窗口信号时，时钟电路1313根据窗口比较电路1312的比较结果输出的脉冲信号为高电平，脉宽检测器1314通过对脉冲信号的高电平持续时间进行检测，进而可以获取到输入信号的频率波动程度。
如图4所示，频率检测模块131还包括低通滤波器1315。低通滤波器1315接收输入信号Vin进行滤波后输出信号Vdc。
阈值电路1311为过零阈值电路，且阈值电路1311包括第一窗口输出端以及第二窗口输出端。阈值电路1311接收低通滤波器1315的输出信号Vdc后在第一窗口输出端输出第一阈值窗口信号(Vdc+Vth)，并在第二窗口输出端输出第二阈值窗口信号(Vdc-Vth)。
窗口比较电路1312包括第一比较器A1以及第二比较器A2。第一比较器A1包括第一同相输入端以及第一反相输入端，其中第一同相输入端连接于阈值电路1311的第一窗口输出端以接收第一阈值窗口信号(Vdc+Vth)，第一反相输入端接收输入信号Vin，输出端连接于时钟电路1313。第二比较器A2包括第二同相输入端以及第二反相输入端，其中第二同相输入端接收输入信号Vin，第二反相输入端连接于阈值电路1311的第二窗口输出端以接收第二阈值窗口信号(Vdc-Vth)，输出端连接于时钟电路1313。
时钟电路1313包括或门电路、与门电路以及RS(复位/置位)触发器。或门电路的两个输入端分别连接第一比较器的输出端以及第二比较器的输出端，或门电路的输出端连接于RS触发器的置位端。与门电路的两个输入端也分别连接第一比较器的输入端以及第二比较器的输出端，与门电路的输出端连接于RS触发器的复位端。RS触发器的输出端连接于脉宽检测器1314的输入端。
选择电路140可以根据输入信号的频率波动程度配置数字滤波模块120的阶数。例如，可以预先设定一波动阀值，根据输入信号的频率波动程度与波动阀值的比较结果确定输入信号的类 型，当输入信号的频率波动程度大于或等于波动阈值时，可认为输入信号为交流信号；当输入信号的频率波动程度小于该波动阈值时，则可认为输入信号为直流信号。因此，当输入信号的频率波动程度大于或等于波动阈值时，选择电路140可以将数字滤波模块120配置为低阶数字积分滤波器；当输入信号的频率波动程度小于波动阈值时，选择电路140可以将数字滤波模块120配置为高阶数字积分滤波器。由此，可使得模数转换器100实现对不同输入信号的快速、高精度测量。
作为另一种实施方式，模数转换器100可以对大输入信号和小输入信号配置最优的积分数字滤波，从而实现对大输入信号和小输入信号的快速、高精度测量。
其中，信号检测器130可以检测输入信号的幅度，并根据幅度确定输入信号的类型是大信号还是小信号，从而能够对输入信号配置阶数最优的数字滤波模块。
如图5所示，本实施方式中，信号检测器130包括连接于调制器110的幅度检测模块132，以用于根据量化信号检测输入信号的幅度。选择电路140还用于根据幅度调整数字滤波模块120的阶数。
本实施方式中，幅度检测模块132可以为PDM(Pulse Density Modulation,脉冲密度调制)幅度检测量化器。可通过PDM技术获取输入信号的幅度。如图6所示，幅度检测模块132包括电平检测模块1321、计数器1323以及阈值判断电路1324。其中，电平检测电路连接于调制器110，并用于检测在每个过零周期量化信号的电平，其中电平包括高电平和/或低电平。计数器1323连接于电平检测电路，用于统计电平的数量。其中，计数器1323可以在模数转换器100对输入信号的整个测量周期内统计高电平的数量和低电平的数量。阈值判断电路1324连接于计数器1323，用于计算整个测量周期内电平数量的平均值和方差中的至少一个，并根据平均值以及方差中的至少一个获取输入信号的幅度。
阈值判断电路1324可以计算整个测量周期内高电平数量的平均值和方差中的至少一个，当高电平数量的平均值大于或等于平均值阈值以及高电平数量的方差大于方差阈值中的任一满足时，可认为该输入信号为大信号；当高电平数量的平均值小于平均值阈值且高电平数量的方差小于方差阈值时，可认为该输入信号为小信号。在一些实施方式中，当高电平数量的平均值大于或等于平均值阈值且高电平数量的方差大于方差阈值时，可认为该输入信号为大信号；当高电平数量的平均值大于或等于平均值阈值以及高电平数量的方差大于方差阈值中任一不满足时，可认为该输入信号为小信号。当低电平数量的平均值大于或等于平均值阈值以及低电平数量的方差大于方差阈值中的任一满足时，可认为该输入信号为大信号；当低电平数量的平均值小于平均值阈值且低电平数量的方差小于方差阈值时，可认为该输入信号为小信号。在一些实施方式中，当低电平数量的平均值大于或等于平均值阈值且低电平数量的方差大于方差阈值时，可认为该输入信号为大信号；当低电平数量的平均值大于或等于平均值阈值以及低电平数量的方差大于方差阈值中 任一不满足时，可认为该输入信号为小信号。
选择电路140可以根据输入信号的幅度配置数字滤波模块120的阶数，使得当输入信号为大信号时模数转换器100以阶数与该大信号最为适配的数字积分滤波器对输入信号进行测量；当输入信号为小信号时模数转换器100以阶数与该小信号最为适配的数字积分滤波器对输入信号进行测量，从而实现对不同输入信号的快速、高精度测量。
作为又一种实施方式，模数转换器100可以分别对直流输入信号、交流大输入信号、交流小输入信号配置阶数最优的数字滤波模块，从而实现对直流输入信号、交流大输入信号、交流小输入信号的快速、高精度测量。
其中，信号检测器130可以同时检测输入信号的频率波动程度以及输入信号的幅度，通过频率波动程度可以区分输入信号是直流信号或交流信号，通过幅度可以区分交流信号是交流大信号还是交流小信号，从而使得选择电路140能够对输入信号配置阶数最优的数字滤波模块。
如图7所示，本实施方式中，信号检测器130可以包括频率检测模块131以及幅度检测模块132。频率检测模块131用于接收输入信号并检测输入信号的频率波动程度；幅度检测模块132连接于调制器110，且用于根据量化信号检测输入信号的幅度。选择电路140还用于根据频率波动程度与幅度配置数字滤波模块120的阶数。本实施方式中，频率检测模块131与幅度检测模块132的结构和原理与前述实施方式相同，不再赘述。
其中，当根据输入信号的频率波动程度认为该输入信号是直流信号时，选择电路140可以将数字滤波模块120配置为高阶数字积分滤波器；当根据输入信号的频率波动程度认为该输入信号是交流信号，且根据输入信号的幅度认为该输入信号是大信号时，则认为该输入信号是交流大信号，选择电路140可以将数字滤波模块120配置为低阶数字积分滤波器；当根据输入信号的频率波动程度认为该输入信号是交流信号，且根据输入信号的幅度认为该输入信号是小信号时，则认为该输入信号是交流小信号，选择电路140可以将数字滤波模块120配置为高阶数字积分滤波器，从而实现对不同输入信号的快速、高精度测量。
如图8所示，数字滤波模块120包括至少两个依次连接的数字滤波器，选择电路140包括多路选择器141以及选择控制电路142。其中，多路选择器141包括输出端以及至少两个输入端，且每个输入端与每个数字滤波器的输出端一一对应连接。选择控制电路142连接于信号检测器130以及多路选择器141，用于根据信号参数将多路选择器141的输出端与多路选择器141的其中一个输入端连接。
本实施例中，选择控制电路142可以根据信号检测器130检测的输入信号的频率波动程度和输入信号的幅度，控制多路选择器141将数字滤波模块120配置为不同阶数的数字积分滤波器。由于数字滤波模块120中的至少两个数字滤波器依次连接，且多路选择器141的每个输入端与每 个数字滤波器的输出端一一对应连接，使得多路选择器141的每一个输入端均连接某一阶数的数字积分滤波器，例如若多路选择器141的第一输入端连接有一个数字滤波器，该一个数字滤波器即为一阶数字积分滤波器；若多路选择器141的第二输入端连接有两个依次连接的数字滤波器，该两个依次连接的数字滤波器即为二阶数字积分滤波器，即在本实施例中，阶数包括与多路选择器141任一输入端依次连接的数字滤波器的个数。因此选择控制电路142通过将多路选择器141的输出端与多路选择器141的其中一个输入端连接，从而能够将数字滤波模块120配置为不同阶数的数字积分滤波器。
本实施例提供的模数转换器包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个依次连接的数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。本实施例通过信号检测器检测输入信号的信号参数，进而能够区分输入信号的类型，再通过选择电路根据该信号参数调整数字滤波模块的阶数，进而数字积分滤波模块对不同类型的输入信号进行适配，从而实现对不同类型输入信号的最优配置，达到快速高精度测量。
如图9所示，本实施例还提供一种模数转换器200。模数转换器200同样包括调制器210、数字滤波模块220、信号检测器230以及选择电路240。本实施例中，调制器210、数字滤波模块220、信号检测器230以及选择电路240的功能与前述实施例相同，不在赘述。
作为一种可选的实施方式，调制器210包括积分器211、主量化器212以及数模转换器213；其中，积分器211为增量式Σ-Δ调制积分器，积分器211用于对输入信号进行积分，以输出积分信号；主量化器212连接于积分器211，用于对积分信号进行量化，以输出量化信号；数模转换器213连接于主量化器212输出端与积分器211的输入端，以形成反馈通路。
作为一种可选的实施方式，调制器210还包括第一增益模块214、第二增益模块215以及第三增益模块216。其中第一增益模块214的输入端用于接收输入信号，输出端连接于积分器211的输入端；第二增益模块215设于积分器211与主量化器212之间，且第二增益模块215的输入端连接于积分器211的输出端，输出端连接于主量化器212的输入端；第三增益模块216设于反馈通路，且第三增益模块216的输入端连接于数模转换器213的输出端，输出端连接于积分器211的输入端。
作为一种可选的实施方式，数字滤波模块220包括第一数字滤波器221以及第二数字滤波器222。其中，第一数字滤波器221的输入端连接于主量化器212的输出端；第二数字滤波器222的输入端连接于第一数字滤波器221的输出端。
作为一种可选的实施方式，信号检测器230包括频率检测模块231以及幅度检测模块232。其中，频率检测模块231接收输入信号，且用于检测输入信号的频率波动程度。幅度检测模块232连接于主量化器212的输出端，且用于根据量化信号检测输入信号的幅度。本实施例中的频率检测模块231与幅度检测模块232的结构与原理均可以和前述实施例相同，不再赘述。
作为一种可选的实施方式，选择电路240包括多路选择器241以及选择控制电路242。多路选择器241包括第一输入端以及第二输入端，第一输入端连接于第一数字滤波器221的输出端，第二输入端连接于第二数字滤波器222的输出端。选择控制电路242的输入端连接于频率检测模块231以及幅度检测模块232的输出端，输出端连接于多路选择器241的控制端。本实施例中，信号检测器230可以同时检测输入信号的频率波动程度以及输入信号的幅度，使得选择控制电路242能够根据输入信号的频率波动程度以及输入信号的幅度控制多路选择器241将数字滤波模块220配置为不同阶数的数字积分滤波器，从而适配不同的输入信号类型。
当选择控制电路242控制多路选择器241的第一输入端与输出端连接时，数字滤波模块220被配置为一阶数字积分滤波器；当选择控制电路242控制多路选择器241的第二输入端与输出端连接时，数字滤波模块220被配置为二阶数字积分滤波器。
因此，本实施例中的模数转换器200能够根据输入信号的类型将数字滤波模块220配置为一阶数字积分滤波器或二阶数字积分滤波器，以适配不同的输入信号，对不同类型输入信号的最优配置，达到快速高精度测量。
作为一种可选的实施方式，模数转换器200还包括复位电路(图中未示出)，复位电路用于在调制器210每次对输入信号量化之后，将模数转换器200复位，以消除本次量化的信息。也即，模数转换器200每完成一次量化之后，可以通过复位电路将调制器210与数字滤波模块220复位，消除此次量化状态的信息，保证每次量化的初始状态是相同的。
需要说明的是，模数转换器200每次量化可以包括多个转换周期。
当模数转换器200对输入信号进行量化时，在复位阶段：V 1[0]＝0  (1)
；其中V 1[0]为复位阶段主量化器212的输入信号。
在第一个转换周期：V 1[1]＝(V 1[0]+a1*Vin[0]-b1*Vref*D[0])*a2   (2)
由式(2)整理得：V 1[1]＝(a1*Vin[0]-b1*Vref*D[0])*a2     (3)
其中，V 1[1]为第一个转换周期主量化器212的输入信号；a1为第一增益模块214的增益；Vin[0]为复位阶段的输入信号；b1为第三增益模块116的增益；Vref为数模转换器213的基准信号；D[0]为复位阶段主量化器212输出的码值。
在第二个转换周期：V 1[2]＝(V 1[1]+a1*Vin[1]-b1*Vref*D[1])*a2   (4)
由式(4)整理得：V 1[2]＝[a1*(Vin[1]+Vin[0])-b1*Vref*(D[1]+D[0])]*a2     (5)
其中，V 1[2]为第二个转换周期主量化器212的输入信号；Vin[1]为第一个转换周期的输入信号；；D[1]为第一个转换周期主量化器212输出的码值。
由此可推导出在第n个转换周期：
Figure PCTCN2021141707-appb-000001
其中，V 1[n]为第n个转换周期主量化器212的输入信号；Vin[k]为输入信号；D[k]为数字积分滤波。
由式(6)可得，当数字滤波模块220被配置为一阶数字积分滤波器时，输入信号Vin满足下式：
Figure PCTCN2021141707-appb-000002
其中，PGA为模数转换器200的增益，PGA＝a1/b1；D[k]为一阶数字积分滤波。
当数字滤波模块220被配置为二阶数字积分滤波器时，输入信号Vin满足下式：
Figure PCTCN2021141707-appb-000003
其中，D'[k]为二阶积分数字滤波。
本实施例中，模数转换器200通过对输入信号的信号参数进行检测，可以对不同类型的输入信号将数字滤波模块220配置为一阶数字积分滤波器或二阶数字积分滤波器，进而对不同的输入信号自适应选取一阶数字积分滤波或二阶数字积分滤波。
示例性地，如图10所示，图10为本实施例提供的模数转换对输入信号测量的仿真结果示意图。输入信号为直流信号与交流信号的混合信号。其中，直流信号为10uV，持续周期为6.5s；交流信号为100uV，周期为6.5s。
在对直流信号进行测量时，由图可知，一阶数字积分滤波的测量结果为12.2uV，二阶数字积分滤波的测量结果为9.88uV。
由此可见，对于直流信号而言，二阶数字积分滤波器的输出特性优于一阶数字积分滤波器。因此，当通过输入信号的信号参数检测到输入信号为直流信号时，可以将数字滤波模块220配置为二阶数字积分滤波器，从而提供对直流信号的测量精度。
在对交流信号进行测量时，由图可知，一阶数字积分滤波的测量结果为99.18uV，二阶数字 积分滤波的测量结果为130.5uV。
由此可见，对于交流信号而言，一阶数字积分滤波器的输出特性优于二阶数字积分滤波器。因此，当通过输入信号的信号参数检测到输入信号为交流信号时，可以将数字滤波模块220配置为一阶数字积分滤波器，从而提供对交流信号的测量精度。
综上，本实施例中的模数转换器200通过对输入信号的频率特性以及幅度特性进行检测，从而能够对不同的输入信号以最优阶数的数字积分滤波器进行配置，从而实现对不同输入信号的快速、高精度测量。
本实施例提供的模数转换器包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个依次连接的数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。本实施例通过信号检测器检测输入信号的信号参数，进而能够区分输入信号的类型，再通过选择电路根据该信号参数调整数字滤波模块的阶数，进而数字积分滤波模块对不同类型的输入信号进行适配，从而实现对不同类型输入信号的最优配置，达到快速高精度测量。
如图11所示，本申请实施例还提供一种电量检测电路300。电量检测电路300包括采样电路310以及上述的模数转换器。其中，采样电路310的一端用于采样输入信号，另一端连接于模数转换器。
采样电路310包括第一电阻R1、第二电阻R2、第三电阻R3以及电容C1。其中，第一电阻R1的第一端连接于第二电阻R2的第一端、第二端连接于第三电阻R3的第一端；第一电阻R1的两端还分别连接于电池BAT的两端；电容C1的第一端连接于第二电阻R2的第二端、第二端连接于第三电阻R3的第二端；第二电阻R2的第二端与第三电阻R3的的第二端连接于模数转换器。
采样电路能够对电池BAT的电压进行采样，并将采样信号转换为差分信号输入至模数转换器进行高精度测量。
本实施例提供的电量检测电路包括调制器、数字滤波模块、信号检测器以及选择电路；调制器用于对输入信号进行量化，以输出量化信号；数字滤波模块连接于调制器，且用于对量化信号进行滤波；其中数字滤波模块包括至少两个依次连接的数字滤波器；信号检测器用于检测输入信号的信号参数；以及选择电路连接于数字滤波模块以及信号检测器，选择电路用于根据信号参数调整数字滤波模块的阶数。本实施例通过信号检测器检测输入信号的信号参数，进而能够区分输入信号的类型，再通过选择电路根据该信号参数调整数字滤波模块的阶数，进而数字积分滤波模 块对不同类型的输入信号进行适配，从而实现对不同类型输入信号的最优配置，达到快速高精度测量。
本申请实施例还提供一种电池管理系统，电池管理系统包括上述的电量检测电路。
以上，仅是本申请的较佳实施例而已，并非对本申请作任何形式上的限制，虽然本申请已以较佳实施例揭示如上，然而并非用以限定本申请，任何本领域技术人员，在不脱离本申请技术方案范围内，当可利用上述揭示的技术内容做出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本申请技术方案内容，依据本申请的技术实质对以上实施例所作的任何简介修改、等同变化与修饰，均仍属于本申请技术方案的范围内。

Claims (12)

  1. 一种模数转换器，其特征在于，包括：
    调制器，用于对输入信号进行量化，以输出量化信号；
    数字滤波模块，连接于所述调制器，且用于对所述量化信号进行滤波；其中所述数字滤波模块包括至少两个数字滤波器；
    信号检测器，用于检测所述输入信号的信号参数；以及
    选择电路，连接于所述数字滤波模块以及所述信号检测器，所述选择电路用于根据所述信号参数调整所述数字滤波模块的阶数。
  2. 如权利要求1所述的模数转换器，其特征在于，所述信号参数包括频率，所述信号检测器包括频率检测模块，所述频率检测模块用于接收所述输入信号并检测所述输入信号的频率波动程度，所述选择电路还用于根据所述频率波动程度调整所述数字滤波模块的阶数。
  3. 如权利要求2所述的模数转换器，其特征在于，所述频率检测模块包括：
    阈值电路，用于接收所述输入信号，且根据所述输入信号提供阈值窗口信号；
    窗口比较电路，连接于所述阈值电路，且用于将所述输入信号与所述阈值窗口信号比较，并输出比较结果；
    时钟电路，连接于所述窗口比较电路，且用于根据所述比较结果输出脉冲信号；以及
    脉宽检测器，连接于所述时钟电路，且用于检测所述脉冲信号的脉冲宽度，并根据所述脉冲宽度获得所述输入信号的所述频率波动程度。
  4. 如权利要求3所述的模数转换器，其特征在于，所述阈值电路包括第一窗口输出端以及第二窗口输出端；所述窗口比较电路包括：
    第一比较器，包括第一同相输入端以及第一反相输入端，所述第一同相输入端连接于所述第一窗口输出端、所述第一反相输入端用于接收所述输入信号、输出端连接于所述时钟电路；以及
    第二比较器，包括第二同相输入端以及第二反相输入端，所述第二同相输入端用于接收所述输入信号、所述第二反相输入端连接于所述第二窗口输出端、输出端连接于所述时钟电路。
  5. 如权利要求4所述的模数转换器，其特征在于，所述时钟电路包括：
    或门电路，输入端分别连接所述第一比较器的输出端与所述第二比较器的输出端：
    与门电路，输入端分别连接所述第一比较器的输出端与所述第二比较器的输出端；以及
    复位/置位触发器，置位端连接于所述或门电路的输出端、复位端连接于所述与门电路的输出端，输出端连接于所述脉宽检测器。
  6. 如权利要求2所述的模数转换器，其特征在于，所述信号参数还包括幅度，所述信号检测器还包括连接于所述调制器的幅度检测模块，以用于根据所述量化信号检测所述输入信号的幅度，所述选择电路还用于根据所述频率波动程度以及所述幅度调整所述数字滤波模块的阶数。
  7. 如权利要求6所述的模数转换器，其特征在于，所述幅度检测模块包括：
    电平检测电路，连接于所述调制器，用于在每个过零周期检测所述量化信号的电平，其中所述电平包括高电平和/或低电平；
    计数器，连接于所述电平检测电路，用于统计所述电平的数量；以及
    阈值判断电路，连接于所述计数器，用于计算整个测量周期内电平数量的平均值和方差中的至少一个，并根据所述平均值以及所述方差中的至少一个获取所述输入信号的幅度。
  8. 如权利要求1所述的模数转换器，其特征在于，所述信号参数包括幅度，所述信号检测器包括连接于所述调制器的幅度检测模块，以用于根据所述量化信号检测所述输入信号的幅度，所述选择电路还用于根据所述幅度调整所述数字滤波模块的阶数。
  9. 如权利要求1～8任一项所述的模数转换器，其特征在于，所述至少两个数字滤波器依次连接，所述选择电路包括：
    多路选择器，包括输出端以及至少两个输入端，其中每个所述输入端与每个所述数字滤波器的输出端一一对应连接；以及
    选择控制电路，连接于信号检测器以及所述多路选择器，用于根据所述信号参数将所述多路选择器的输出端与所述多路选择器的其中一个所述输入端连接。
  10. 如权利要求1～8任一项所述的模数转换器，其特征在于，所述模数转换器还包括复位电路，所述复位电路用于在所述调制器每次对输入信号量化之后，将所述模数转换器复位，以消除本次量化的信息。
  11. 一种电量检测电路，其特征在于，包括上述权利要求1～10任一项所述模数转换器，所述电量检测电路还包括采样电路；所述采样电路一端用于采样输入电压，另一端连接于所述模数转换器。
  12. 一种电池管理系统，其特征在于，包括权利要求11所述的电量检测电路。
PCT/CN2021/141707 2020-12-31 2021-12-27 模数转换器、电量检测电路以及电池管理系统 WO2022143542A1 (zh)

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