WO2022142061A1

WO2022142061A1 - Freezing chip, freezing system, and sample testing system and method

Info

Publication number: WO2022142061A1
Application number: PCT/CN2021/092883
Authority: WO
Inventors: 赵蒙
Original assignee: 生物岛实验室; 珠海飒德科技有限公司
Priority date: 2020-12-28
Filing date: 2021-05-10
Publication date: 2022-07-07
Also published as: CN116685838A; CN112747995A; CN214668100U

Abstract

Disclosed are a freezing chip, a freezing system, and a sample testing system and method. The freezing chip comprises a chip substrate; a sample placement layer, wherein the surface of the sample placement layer is divided into at least one local temperature control area, and the local temperature control area is used for the placement of a sample; a plurality of temperature control units which are used for adjusting the temperature of the local temperature control area, wherein the chip substrate has a supporting face for supporting a partial area of a top face or a bottom face of the sample placement layer to form a first contact face; and the projection of the area of the first contact face is not completely overlapped with the projection of the local temperature control area in the same plane. The technology can select a specific time for freezing and thawing during the process of in-situ observation and characterization of a sample, and can obtain a freezing and heating speed higher than 105 °C/s by means of an interface thermal resistance design, so as to ensure that the sample is not damaged. The technology is a significant improvement on related operations such as freezing, thawing and in-situ microscopic observation of biological samples, and has great significance and wide application prospects.

Description

Cryochip, refrigerating system, sample testing system and method

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority of the Chinese patent application number "CN 202011583914.7" filed on December 28, 2020, the entire contents of which are incorporated into this application as a whole.

technical field

The present disclosure relates to the technical field of biomedicine, and in particular, to a freezing chip, a freezing system, a sample testing system and a method.

Background technique

The rapid freezing and heating technology of biological samples has many important applications in the biomedical field, such as cell cryopreservation and resurrection, protein cryofixation characterization, etc.

The current biological freezing technologies mainly include insertion freezing, jet freezing and high pressure freezing. Plunge freeze is the most commonly used sample preparation method in the industry. Insertion freezing usually fixes the sample stage (microgrid) carrying the biological sample at the front end of the sample rod, and quickly inserts the sample into a cryogenic liquid, such as liquid ethane, or liquid nitrogen, under mechanical control, so as to complete the freezing of biological samples. In jetting freezing, the sample stage carrying the biological sample is usually transferred to a specific position in the freezing chamber through a sample rod, and then the sample is sprayed at a high speed with high-pressure liquid nitrogen vapor to complete the freezing of the biological sample. High pressure freezing is similar to the principle of insertion freezing. It uses cryogenic liquid to freeze the sample, but while freezing, a high pressure of about 2000 atmospheres is applied in the sample cavity to reduce the freezing temperature of water and inhibit the process of ice crystallization. The resulting volume expansion, thereby avoiding the damage to the structure of biological samples by ice crystallization, and preparing frozen biological samples of higher quality.

However, insertion freezing has the following drawbacks: because the entire sample needs to be inserted into the cryogenic liquid, it is impossible to selectively freeze specific regions of the sample during the freezing process, and in situ real-time microscopic observation cannot be performed during the freezing process. On the basis of plug-in refrigeration, jet freezing uses liquid nitrogen vapor instead of cryogenic liquid to improve heat transfer efficiency. The principle of high-pressure freezing is similar to the above two freezing methods. Because the high pressure inhibits ice crystallization, the freezing effect is better and the sample quality is higher. However, jet freezing and high-pressure freezing also have the defects of not being able to real-time microscopic observation and local selective freezing. These deficiencies limit further in-depth studies of frozen biological samples.

A device for rapidly freezing samples is also proposed in the prior art, which includes: a sample container and a heating support device located on the side of the container to support the sample container, the sample container is placed on the base, and by controlling the switch of the heating support device, Rapid freezing of samples is achieved. In this device, since the sample is arranged in a closed sample carrying structure, the wall of the sample carrying device separates the sample from the heating support device, resulting in additional thermal resistance, resulting in an unsatisfactory freezing speed of the frozen sample. In addition, in terms of heating and recovering frozen biological samples, the current conventional method has a relatively slow heating speed. Usually, auxiliary media such as DMSO need to be added to the sample to ensure that the biological sample is not destroyed during the heating process, which has an impact on the activity of the biological sample and cannot be expressed. The true performance of biological samples such as cells in a normal environment.

SUMMARY OF THE INVENTION

In order to solve the problems in the related art, embodiments of the present disclosure provide a freezing chip, a freezing system, a sample testing system and a method.

In a first aspect, embodiments of the present disclosure provide a cryochip.

Specifically, the freezing chip is in contact with a low-temperature cold source for freezing the sample, and the freezing chip includes: a sample placement layer, the surface of which is divided into at least one local temperature control area, and the local temperature control area is used for placing the sample; Several temperature control units are used to adjust the temperature of the local temperature control area; the chip substrate supports the top surface or bottom surface of the sample placement layer to form a first contact surface; the first contact surface and the local temperature control area Projections on the same plane do not overlap or partially overlap.

Optionally, the chip substrate is supported in a peripheral area outside the central area of the sample placement layer, and the central area is divided into at least one local temperature control area; or the chip substrate is supported in the central area of the sample placement layer, The peripheral area outside the central area is divided into at least one local temperature control area; or the chip substrate is supported at spaced positions of the local temperature control area.

Optionally, when the chip substrate supports the top surface of the sample placement layer to form the first contact surface, the chip substrate further has a second contact surface for contacting the low-temperature cold source; wherein, The first contact surface and the second contact surface are located on the same side of the chip substrate.

Optionally, the temperature control unit and the sample placement layer are of an integrated structure.

Optionally, the temperature control unit is disposed on the sample placement layer using a chip micro-nano processing technology, and the local temperature control area is divided by the temperature control unit.

Optionally, the sample placement layer is a heat-conducting layer; the temperature control unit is disposed on the heat-conducting layer, so as to divide the local temperature-control area on the heat-conducting layer; or

The sample placement layer includes: a thermal conductive layer and a first isolation layer fabricated on the thermal conductive layer by a chip micro-nano processing process; wherein the temperature control unit is arranged on the first isolation layer to The local temperature control area is divided on the first isolation layer; or

The sample placement layer includes: a thermal conductive layer, a first isolation layer fabricated on the thermal conductive layer using a chip micro-nano processing technology, and a second isolation layer fabricated on the first isolation layer using a chip micro-nano processing technology; Wherein, the temperature control unit is arranged on the first isolation layer, so as to divide the local temperature control area on the second isolation layer; or

The sample placement layer includes: a third isolation layer, a thermal conductive layer fabricated on the third isolation layer using a chip micro-nano processing technology, a first isolation layer fabricated on the thermal conductive layer using a chip micro-nano processing technology, and A second isolation layer fabricated on the first isolation layer by a chip micro-nano processing process; wherein the temperature control unit is disposed on the first isolation layer to divide the second isolation layer on the second isolation layer. Local temperature controlled areas; or

The sample placement layer includes: a third isolation layer, a first isolation layer fabricated on the third isolation layer using a chip micro-nano processing technology, and a thermally conductive layer fabricated on the first isolation layer using a chip micro-nano processing technology. layer and a second isolation layer fabricated on the thermally conductive layer using a chip micro-nano processing process; wherein the temperature control unit is arranged on the third isolation layer to divide the second isolation layer Local temperature control area.

Optionally, the sample placement layer includes: at least one sample layer, a heating layer, a fourth isolation layer, a heat conduction layer and a fifth isolation layer which are arranged separately; wherein, the surface of the sample layer is divided into at least one local temperature control layer area; the temperature control unit is arranged on the heating layer.

Optionally, the thickness of the portion of the thermally conductive layer close to the temperature control unit and the end portion of the thermally conductive layer is greater than the thickness of the portion of the thermally conductive layer therebetween; and/or the thermally conductive layer is close to the temperature control unit The portion of the thermally conductive layer between the portion of the thermally conductive layer and the end portion of the thermally conductive layer is arranged in a patterned structure.

Optionally, the local temperature control area is provided with at least one closed sample containing cavity and/or open sample containing cavity for containing the sample.

Optionally, the temperature control unit further includes an auxiliary temperature control unit disposed on the wall of the closed sample accommodating cavity and/or the open sample accommodating cavity.

Optionally, the sample placement layer is provided with an optical path channel to adapt to a microscope, a photodetector, an X-ray, a Raman spectrometer, and an infrared spectrometer.

Optionally, the cryochip is made of a light-transmitting material or has a perforated channel as the light passage channel.

Optionally, the cryochip is made by a chip micro-nano processing technology.

Optionally, the thickness of the cryochip is controlled at 0.1-2 mm.

In a second aspect, an embodiment of the present disclosure provides a sample stage assembly, including the cryochip according to any one of the first aspects. Specifically, the sample stage assembly includes: a controller electrically connected to the temperature control unit for adjusting the temperature of the temperature control unit.

Optionally, the sample stage assembly further comprises: a sample heat sink for accommodating the cryochip.

In a third aspect, embodiments of the present disclosure provide a freezing system including the sample stage assembly according to any one of the second aspect. Specifically, the freezing system includes: a low-temperature cold source; a heat sink base for fixing the sample stage assembly, in contact with the low-temperature cold source.

Optionally, the freezing system also includes:

The freezing medium sealing cover plate is used for sealing the cryogenic cold source.

Optionally, the freezing system also includes:

The sample cover has an area capable of at least sealing the opening of the heat sink base.

In a fourth aspect, an embodiment of the present disclosure provides a sample testing system, including the freezing system described in the third aspect. Specifically, the sample testing system includes;

Microscopic observation device and/or detection device used in conjunction with the freezing system.

Optionally, the microscopic observation device is at least one of an upright optical microscope, an inverted optical microscope, and an electron microscope; the detection device is at least one of a photodetector, an X-ray, a Raman spectrometer, and an infrared spectrometer. kind.

In a fifth aspect, embodiments of the present disclosure provide a method for freezing a sample using the freezing system of the third aspect. Specifically, the method includes: adjusting the electrical parameters of the temperature control unit to keep the average temperature of the sample stable at the first temperature, and maintaining the temperature gradient between the sample and the low temperature cold source in the sample placement layer; detecting and adjusting all the The electrical parameter is adjusted to a first predetermined range, so as to adjust the average temperature of the sample at a second temperature, wherein the second temperature is lower than the first temperature and within the lowest temperature range that the low temperature cold source can provide Determine the desired temperature value.

Optionally, before adjusting the electrical parameters of the temperature control unit to maintain the average temperature of the sample to be stable at the first temperature, and before maintaining the temperature gradient between the sample and the low-temperature cold source in the sample placement layer, the method further includes: adjusting the temperature of the local temperature control area to a first temperature; the sample is placed in the local temperature control area.

Optionally, the first temperature to the second temperature is changed over a predetermined period of time.

Optionally, the electrical parameters of the temperature control unit are adjusted by electronic equipment.

Optionally, the first temperature is the liquid temperature of the sample, and the second temperature enables the same sample to be directly transformed from a liquid state to an amorphous solid state under the same environment, and continuously maintains the temperature of the amorphous solid state.

Optionally, the first temperature is 0°C to 40°C, and the second temperature is lower than -140°C.

In a sixth aspect, embodiments of the present disclosure provide a method for heating a sample using the freezing system of the third aspect. Specifically, the method includes: adjusting electrical parameters of the temperature control unit to a second predetermined range, and then detecting and adjusting the electrical parameters to maintain the average temperature of the sample at a first temperature; or heating the sample with an external heat source , the average temperature of the sample is determined to be at a first temperature by a temperature measuring unit; wherein, the first temperature is greater than the second temperature.

Optionally, the method further includes:

The electrical parameters are detected and adjusted to bring the average temperature of the local temperature-controlled area to a second temperature.

Optionally, the second temperature is increased to the first temperature within a predetermined period of time.

Optionally, the predetermined time period is within 10 ms.

Optionally, the first temperature is the liquid temperature of the sample, and the second temperature is the temperature at which the same sample is directly transformed from the liquid state to the amorphous solid state under the same environment, and the amorphous solid state is maintained continuously.

In a seventh aspect, embodiments of the present disclosure provide a method of operating a sample using the sample testing system of the fourth aspect.

Specifically, the method includes: adjusting electrical parameters of the temperature control unit to maintain the average temperature of the sample at a first temperature and maintaining the temperature gradient between the sample and the low-temperature cold source in the sample placement layer; detecting and adjusting the electrical parameters to a first predetermined range to adjust the average temperature of the sample at a second temperature, and then operate the sample at the second temperature, wherein the second temperature is lower than the first temperature, at the low temperature Determine the required temperature value within the lowest temperature range that the source can provide.

Optionally, the method further includes: adjusting the electrical parameters of the temperature control unit to a second predetermined range to heat the sample or using an external heat source to heat the sample to a first temperature, and then repeating detection and adjusting the electrical parameters to a first predetermined range to maintain the average temperature of the sample at a second temperature, and then operate the sample at the second temperature.

Optionally, the method further includes: after the step of adjusting the electrical parameters of the temperature control unit to maintain the average temperature of the sample at the first temperature and maintaining the temperature gradient between the sample and the low-temperature cold source in the sample placement layer , operate the sample at a first temperature and determine a start-up time for adjusting the electrical parameters to a first predetermined range, and at the start-up time, detect and adjust the electrical parameters to a first predetermined range to maintain the sample The average temperature is at the second temperature.

Optionally, the method further comprises: replacing the sample after manipulating the sample.

Optionally, the first temperature is changed to the second temperature within a first predetermined period of time.

Optionally, the second temperature is changed to the third temperature within a second predetermined time period.

Optionally, the second predetermined time period is within 10 ms.

Optionally, the method is suitable for microscopic observation of samples.

The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects:

(1) In the freezing chip of the embodiment of the present disclosure, by setting at least one local temperature control area, and using the temperature control unit to adjust the temperature of the local temperature control area, samples can be selectively frozen, and for samples that do not need freezing, the temperature control unit can be controlled Heat is released to maintain the temperature gradient between the sample and the low temperature cold source. For samples that need to be frozen, the electrical parameters of the temperature control unit are adjusted so that the heat of the sample is conducted to the low temperature cold source, thereby realizing the effect of local selective freezing.

(2) In the cryochip of the embodiment of the present disclosure, the temperature control unit is integrated with the sample placement layer. When the cryochip is in contact with the low-temperature cold source, a temperature gradient between the sample and the low-temperature cold source is formed in the sample placement layer. By adjusting the temperature According to the electrical parameters of the control unit, the heat of the sample can be rapidly conducted along the direction of the temperature gradient, so as to realize the rapid freezing of the sample, and can provide low-temperature sample preparation for other testing devices, such as microscopes, X-ray devices, etc.

(3) In the cryochip of the embodiment of the present disclosure, by designing the structure of the heat-conducting layer, the temperature gradient is limited to the portion of the heat-conducting layer between the portion of the heat-conducting layer close to the temperature control unit and the end portion of the heat-conducting layer. At the same time, the heat capacity of the frozen part is reduced, so that the freezing speed is higher than 10 ⁵ ℃/s. For cell samples, rapid freezing of the samples will not damage the cell samples, which facilitates better study of cell biological behavior.

(4) In the cryochip of the embodiment of the present disclosure, the sample placement layer has an optical path channel, so that a test device can be adapted to perform in-situ characterization of the sample, such as a microscope, X-ray device, etc., so as to realize the simultaneous, in-situ and real-time freezing of the sample. Test samples, improve the efficiency of sample testing.

(5) The method used by the sample testing system of the embodiment of the present disclosure to operate the sample, by adjusting the parameters of the temperature control unit, it is possible to realize the operation process of frozen sample-operation sample, or frozen sample-operation sample-heated reanimated sample-frozen sample - Manipulate the sample - heat the reanimated sample in a cycle of the above procedure, or manipulate the sample before freezing - freeze the sample - manipulate the sample - Manipulating the sample - Reviving the sample by heating the cycle of the above procedure, or repeating the above procedure after changing the sample after freezing the sample - Manipulating the sample. This technical solution limits the heat capacity of the local temperature control area by designing the thermal resistance and heat exchange efficiency of each interface between the local temperature control area, the chip substrate and the low temperature cold source, and obtains a freezing and heating rate higher than 10 ⁵ ℃/s , to ensure that the sample structure and function are not damaged during repeated freezing and heating processes, which is a major improvement for biological sample freezing, in-situ observation and heating thawing operations, and has great significance and broad application prospects. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the following will briefly introduce the accompanying drawings used in the description of the exemplary embodiments or related technologies. Obviously, the accompanying drawings in the following description These are some exemplary embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

Figure 1a shows a front view of a cryochip according to an embodiment of the present disclosure;

Figure 1b shows a cross-sectional view in the direction of Figure 1DD';

Figure 1c shows a cross-sectional view of a cryochip according to another embodiment of the present disclosure;

Figure 1d shows a cross-sectional view of a cryochip according to another embodiment of the present disclosure;

2a-2e illustrate schematic structural diagrams of a sample placement layer according to an embodiment of the present disclosure;

3 shows a schematic diagram of a temperature gradient within a sample placement layer according to an embodiment of the present disclosure;

4 shows a schematic structural diagram of a cryochip on which a sample is placed according to an embodiment of the present disclosure;

5 shows a schematic structural diagram of a sample stage assembly according to an embodiment of the present disclosure;

6 shows a schematic structural diagram of a freezing system according to an embodiment of the present disclosure;

7 shows a schematic flowchart of a method for freezing a sample according to an embodiment of the present disclosure;

FIG. 8 shows a schematic diagram of the basic principle of the operation of the temperature control unit according to an embodiment of the present disclosure;

9 shows a schematic flowchart of a method for heating a sample according to an embodiment of the present disclosure;

10 shows a schematic flowchart of a method for microscopically observing a sample according to an embodiment of the present disclosure;

Figure 11 shows a schematic diagram of the chip and cell samples before and after freezing on the chip.

Figure 12 shows a schematic diagram of the freezing rate of the cryochip according to Figures 2a-2e.

Detailed ways

In order for those skilled in the art to better understand the solutions of the present disclosure, the technical solutions in the exemplary embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the exemplary embodiments of the present disclosure.

In some of the processes described in the specification and claims of the present disclosure and the above-mentioned figures, various operations are included in a specific order, but it should be clearly understood that the operations may be performed out of the order in which they appear in the text. For execution or parallel execution, the sequence numbers of the operations, such as 101, 102, etc., are only used to distinguish different operations, and the sequence numbers themselves do not represent any execution order. Additionally, these flows may include more or fewer operations, and these operations may be performed sequentially or in parallel. It should be noted that the descriptions such as "first" and "second" in this document are used to distinguish different messages, devices, modules, etc., and do not represent a sequence, nor do they limit "first" and "second" are different types.

The technical solutions in the exemplary embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the exemplary embodiments of the present disclosure. Obviously, the described exemplary embodiments are only a part of the embodiments of the present disclosure, rather than All examples. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present disclosure.

In the prior art, insertion freezing has the following drawbacks: since the entire sample needs to be inserted into the cryogenic liquid, it is impossible to selectively freeze specific regions of the sample during the freezing process, and in situ real-time microscopic observation cannot be performed during the freezing process. . On the basis of plug-in refrigeration, jet freezing uses liquid nitrogen vapor instead of cryogenic liquid to improve heat transfer efficiency. The principle of high-pressure freezing is similar to the above two freezing methods. Because the high pressure inhibits ice crystallization, the freezing effect is better and the sample quality is higher. However, jet freezing and high-pressure freezing also have the defects of not being able to real-time microscopic observation and local selective freezing. These deficiencies limit further in-depth studies of frozen biological samples. At the same time, there is no mature technology that can recover frozen samples by high-speed heating.

The present disclosure is made to address, at least in part, problems identified in the prior art by the inventors.

The freezing chip provided by the present disclosure differs from the three methods of insert freezing, jet freezing and high pressure freezing in terms of freezing samples. The difference is that the sample placed on the cryochip is not in direct contact with the freezing medium (such as liquid nitrogen), but while the freezing medium cools the sample stage (usually the chip is placed on the sample stage and the sample stage is immersed in the freezing medium), The sample is kept at a higher temperature by means of external resistance heating. After the resistive heating is turned off, the sample heat is rapidly transferred to the cryogenic sample stage, enabling rapid freezing of the sample.

Figure 1a shows a front view of a cryochip according to an embodiment of the present disclosure. The low-temperature cold source A shown in FIGS. 1b to 1d is not a part of the cryochip 10. In the present disclosure, the low-temperature cold source A is a device that provides a low-temperature environment for the cryochip 10 and is in direct contact with the cryochip 10. For example, the cryochip 10 uses When , the sample heat sink is placed on the sample heat sink, and then the sample heat sink is fixed on the heat sink base immersed in the low temperature cold source. Therefore, the sample heat sink also has the temperature of the low temperature cold source (such as liquid nitrogen), which can be regarded as the low temperature cold source. A. The above is a schematic illustration, and the present disclosure does not limit the low-temperature cooling source A.

As shown in FIGS. 1 a to 1 d , the cryochip 10 includes: a chip substrate 11 , a sample placement layer 12 and several temperature control units 13 . The chip substrate 11 is in contact with the top surface or the bottom surface of the supporting sample placement layer 12 to form a first contact surface 14 . The surface of the sample placement layer 12 is divided into at least one local temperature control area N, and the local temperature control area N is used for placing samples. The temperature control unit 13 generally uses Joule heating (electricity generates heat through a resistance) locally to generate heat, so as to adjust the temperature of the local temperature control area N. The projections of the region P of the first contact surface 14 and the local temperature control region N on the same plane do not overlap or partially overlap.

According to an embodiment of the present disclosure, the top surface of the sample placement layer 12 is used for placing samples, the chip substrate 11 usually supports the bottom surface of the sample placement layer 12 to form the first contact surface 14 (as shown in FIG. 1 b ), and the chip substrate 11 also The top surface of the sample placement layer 12 can be supported to form a first contact surface (as shown in FIG. 1 c ). FIG. 1 d also shows that the chip substrate 11 supports the top surface of the sample placement layer 12 . The difference from FIG. 1 c is that the chip substrate 11 When the top surface of the supporting sample placement layer 12 forms the first contact surface, the chip substrate 11 also has a second contact surface for contacting the low-temperature cold source A; wherein, the first contact surface is The second contact surface is located on the same side of the chip substrate. According to the embodiment of the present disclosure, the sample can be in direct contact with the sample placement layer 12, which is relatively non-direct contact, which can avoid generating additional thermal resistance and improve the freezing rate.

The above descriptions shown in FIGS. 1 b to 1 d are schematic descriptions, which can be flexibly selected according to actual needs. The present disclosure is not limited to the above setting methods, and will not be repeated here.

According to an embodiment of the present disclosure, the same plane may be the plane where the sample placement layer 12 is located. As shown in FIG. 1b, the area P of the first contact surface 14 does not overlap with the local temperature control area N, and the sample heat in the local temperature control area N is laterally conducted from the local temperature control area N to the area P along the direction indicated by the arrow. Then, it is conducted to the low-temperature heat source A along the chip substrate 11 . As shown in Fig. 1c, the area P partially overlaps with the local temperature control area N, and the sample heat in the local temperature control area N1 is conducted laterally from the local temperature control area N1 to the area P1 along the direction indicated by the arrow, and then conducts along the chip substrate 11 To the low temperature cold source A, the difference from FIG. 1b is that the heat of the sample in the local temperature control area N2 is conducted along the direction indicated by the arrow, and is conducted longitudinally through the temperature control unit 13 by the local temperature control area N2, and then conducts along the chip substrate 11. to low temperature cooling source A.

It should be noted that the wires of the temperature control unit 13 may pass through the sample placement layer 12 and be connected to the controller outside the cryochip 10. When the temperature of the sample in the local temperature control area N is adjusted, the wire part generates a Heat is negligible.

In the freezing chip shown in Figures 1b-1d, the heat of the sample can be conducted to the low-temperature cold source A along the lateral conduction and longitudinal conduction directions, thereby freezing the sample. Moreover, the central area of the chip substrate 11 is hollow, which can be adapted to a testing device to perform in-situ characterization of the sample, such as a microscope, an X-ray device, etc., which is not limited in the present disclosure.

When using the cryochip provided by the present disclosure, before freezing the sample, place the cryochip on the low-temperature cold source A, and the temperature control unit 13 maintains the sample at a first temperature such as 20°C to 30°C. The temperature gradient is formed in the sample placement layer. After the freezing starts, the electrical parameters of the temperature control unit 13 are adjusted, and the heat of the sample in the local temperature control area N is conducted along the direction of the temperature gradient, so as to realize the rapid freezing of the sample, and then the electrical parameters are detected to adjust the sample temperature to the required second temperature. For example, when the low temperature cold source A can provide a low temperature of -190 °C, the sample temperature can be adjusted to -140 °C.

It should be noted that, the second temperature is determined according to the temperature of the low-temperature cooling source A, and may not be lower than the temperature, which is not limited in the present disclosure.

The freezing chip of the embodiment of the present disclosure can selectively freeze samples by setting at least one local temperature control area and adjusting the temperature of the local temperature control area by using the temperature control unit. For samples that do not need freezing, the temperature control unit is controlled to release heat to Maintain the temperature gradient between the sample and the low-temperature cold source. For samples that need to be frozen, adjust the electrical parameters of the temperature control unit to conduct the heat of the sample to the low-temperature cold source, thereby realizing the effect of local selective freezing.

According to an embodiment of the present disclosure, the chip substrate 11 is supported on a peripheral area outside the central area of the sample placement layer 12 ; the central area of the sample placement layer 12 is divided into at least one local temperature control area. For example, the chip substrate 11 is a surrounding structure adapted to the periphery outside the central area of the sample placement layer 12 and surrounds and supports the top or bottom surface of the sample placement layer 12; or the chip substrate 11 is an independent support The block is supported on one side or both sides of the central area, etc.; wherein, the central area is divided into at least one local temperature control area N. Above or below the central area, a test device can be adapted to perform in-situ characterization of the sample, such as a microscope, an X-ray device, and the like.

As another embodiment, the chip substrate 11 is supported in the central area of the sample placement layer 12 ; the peripheral area outside the central area is divided into at least one local temperature control area N. For example, if the frozen chip is T-shaped, the sample placement layer 12 is arranged horizontally, and the area supported by the chip substrate 11 is not used to divide the local temperature control area N, but is divided into several local temperature control areas N around the support area.

In some cases, the chip substrate 11 may also be supported at the spaced positions of the local temperature control area N. For example, if the chip substrate 11 is at least two independent support blocks, which are used to support the sample placement layer 12 respectively, the local temperature control area N can be divided into the area between the support blocks and the peripheral area outside the support blocks, respectively.

According to the embodiment of the present disclosure, the freezing chip 10 is made by a chip micro-nano processing process, such as a thin film deposition process, a dry or wet etching process, a photolithography process and other processes in the chip field. Repeat.

According to the embodiment of the present disclosure, the overall thickness of the cryochip 10 is controlled to be 0.1-2 mm.

According to an embodiment of the present disclosure, the sample placement layer 12 is provided with an optical path channel, so that a test device can be adapted to perform in-situ characterization of the sample, such as a microscope, an X-ray device, etc., so as to achieve simultaneous in-situ and real-time freezing of the sample. Test samples, improve the efficiency of sample testing. Specifically, the cryochip is made of a light-transmitting material or has a perforated channel as the light path channel, so as to be suitable for an upright optical microscope, an inverted optical microscope, an electron microscope, a photodetector, an X-ray, a Raman spectrometer, Infrared spectrometer and other monitoring instruments.

According to an embodiment of the present disclosure, the chip substrate 11 is used as a mechanical carrier part of the cryochip 10 . The thickness of the chip substrate 11 is usually 0.1-2 mm, and the materials used are usually silicon (such as silicon wafer) and silicon carbide.

According to an embodiment of the present disclosure, the temperature control unit 13 is disposed in the sample placement layer 12 using a chip micro-nano fabrication process, and the local temperature control area and the local temperature control area N are divided by the temperature control unit 13 . Each local temperature control area N can be independently controlled by the corresponding temperature control unit 13 to control heating and stop heating, so as to independently adjust the temperature of the samples placed in different local temperature control areas N. In some cases, a combination of a And adjust the temperature of the samples in several local temperature control areas N, which is not limited in the present disclosure.

According to the embodiment of the present disclosure, the thickness of the temperature control unit 13 is usually 0.1-5um, and the materials used are usually conductive materials, such as metals (aluminum, copper, platinum, etc.), metal compounds (titanium nitride, indium tin oxide, etc.) ) or semiconductors (silicon, silicon carbide, etc.).

2a-2e illustrate schematic structural diagrams of a sample placement layer according to an embodiment of the present disclosure. As shown in FIGS. 2 a to 2 e , the sample placement layer 12 includes: a thermal conductive layer 121 , a first isolation layer 122 , a second isolation layer 123 and a third isolation layer 124 . The thermally conductive layer 121 is used to laterally conduct the sample heat to the low temperature cooling source A, the first isolation layer 122 is used to isolate the thermally conductive layer 121 and the temperature control unit 13, and the second isolation layer 123 is used to isolate the temperature control unit 13 from its external contact environment , plays the role of insulating and protecting the temperature control unit 13 , and the third isolation layer 124 is used to isolate the chip substrate 11 and the heat conduction layer 121 . Wherein, the first isolation layer 122 , the second isolation layer 123 and the third isolation layer 124 may be omitted according to circumstances.

Wherein, the material of the thermally conductive layer 121 may be metal (eg, aluminum, copper, platinum, etc.), thermally conductive ceramics (eg, aluminum oxide, aluminum nitride, etc.), or other thermally conductive materials (eg, silicon, silicon carbide, silicon nitride, etc.). The thickness of the thermally conductive layer 121 is usually 0.1-5um.

According to an embodiment of the present disclosure, the temperature control unit 13 and the sample placement layer 12 are an integrated structure.

As shown in FIG. 2 a , the sample placement layer 12 only includes a thermally conductive layer 121 ; the temperature control unit 13 is disposed on the thermally conductive layer 121 to divide the local temperature control area N on the thermally conductive layer 121 . In this embodiment, the sample placement layer 12 is only composed of a thermally conductive layer, and the power consumption for maintaining the temperature of the sample is relatively large, but it has a relatively high freezing speed, and the freezing speed of the cryochip can reach 10 ⁵ -10 ⁶ °C/s.

As shown in FIG. 2b, the sample placement layer 12 includes: a thermal conductive layer 121 and a first isolation layer 122 fabricated on the thermal conductive layer 121 by a chip micro-nano processing process; wherein, the temperature control unit 13 is arranged on the on the first isolation layer 122 , so as to divide the local temperature control area on the first isolation layer 122 . In this embodiment, the freezing speed of the cryochip is smaller than that in Fig. 2a, and can still reach 10 ⁵ -10 ⁶ °C/s.

As shown in FIG. 2 c , the sample placement layer 12 includes: a thermal conductive layer 121 , a first isolation layer 122 fabricated on the thermal conductive layer 121 by a chip micromachining process, and a first isolation layer 122 fabricated on the first isolation layer by a chip micromachining process The second isolation layer 123 on the upper layer 122 ; wherein, the temperature control unit 13 is disposed on the first isolation layer 122 to divide the local temperature control area N on the second isolation layer 123 . In this embodiment, the first isolation layer 122 is provided with a second isolation layer 123, which prevents the temperature control unit 13 from being exposed to the external environment, thereby prolonging the service life of the cryochip. After testing, the freezing speed of the cryochip can still be Reach 10 ⁵ -10 ⁶ ℃/s.

As shown in FIG. 2d, the sample placement layer 12 includes: a third isolation layer 124, a thermal conductive layer 121 fabricated on the third isolation layer 124 using a chip micro-nano processing technology, and a chip micro-nano processing technology on the third isolation layer 121. The first isolation layer 122 on the thermally conductive layer 121 and the second isolation layer 123 fabricated on the first isolation layer 122 by the chip micro-nano processing technology; wherein, the temperature control unit 13 is arranged on the first isolation layer layer 122 to divide the local temperature control area N on the second isolation layer 123 . In this embodiment, a third isolation layer 123 is disposed under the thermally conductive layer 121. Considering that the thermally conductive layer 121 is usually made of metal material, based on the convenience of the processing technology, a third isolation layer can be disposed between the thermally conductive layer 121 and the chip substrate 11. 123, thus meeting the technological requirements. After testing, the freezing speed of the cryochip can still reach 10 ⁵ ℃/s.

As shown in FIG. 2e, the sample placement layer 12 includes: a third isolation layer 124, a first isolation layer 122 fabricated on the third isolation layer 124 by a chip micro-nano processing technology, and a chip micro-nano processing technology. The thermal conductive layer 121 on the first isolation layer 122 and the second isolation layer 123 fabricated on the thermal conductive layer 121 by chip micro-nano processing technology; wherein, the temperature control unit 13 is disposed on the third isolation layer layer 124 to divide the local temperature control region on the second isolation layer 123 . In this embodiment, the difference from the embodiment in FIG. 2d is that the temperature control unit 13 is located under the heat-conducting layer 121 and is closer to the chip substrate 11 and the low-temperature cooling source A, so it has a large power consumption. The freezing speed can still reach 10 ⁵ ℃/s.

Specifically, as shown in Figure 12, for the blank chip, it took 1.2ms for the temperature to drop from 300K (corresponding to the time point of the horizontal axis: 1.4ms) to 90K (corresponding to the time point of the horizontal axis: 2.6ms), and the freezing rate reached about 1.8×10 ⁵ ℃/s. Similarly, the water-containing chip of the frozen sample can freeze the sample temperature from 300K (corresponding to the horizontal axis time point 1.4ms) to 90K (corresponding to the horizontal axis time point 3.6ms) in only 2.2ms, and the freezing rate reaches 1.0×10 ⁵ °C/S. In the present disclosure, unless otherwise specified, a blank chip refers to a chip that does not carry a sample, and an aqueous chip refers to a chip that carries a liquid sample.

In FIGS. 2 a to 2 e , the material of the thermally conductive layer 121 is preferably a material with high thermal conductivity, such as a metal material, so as to improve the freezing speed.

The specific manner shown above is used as a schematic illustration, and can be flexibly selected according to specific needs. The present disclosure is not limited to the above manner, and details are not described herein.

In the cryogenic chip of the embodiment of the present disclosure, by designing the structure of the heat conducting layer, the temperature gradient is limited to the portion of the heat conducting layer between the portion of the heat conducting layer close to the temperature control unit and the end portion of the heat conducting layer, thereby limiting the heat capacity of the local temperature control region , so that the freezing speed is higher than 10 ⁵ ℃/s. For cell samples, rapid freezing will not damage the cell samples, which is convenient for better study of cell biological behavior.

Those of ordinary skill in the art can understand that, according to design requirements, the above-mentioned chip substrate, sample placement layer, and thermal conductive layer, first isolation layer, and second isolation layer in the sample placement layer may be discontinuous, and holes may be opened in them. grooves, etc. to adjust thermal conductivity or facilitate light observation.

As another embodiment, the sample placement layer 12 includes: at least one sample layer, a heating layer, a fourth isolation layer, a heat conduction layer, and a fifth isolation layer that are disposed separately; wherein, the surface of the sample layer is divided into at least one A local temperature control area; the temperature control unit is arranged on the heating layer.

Different from the sample placement layers shown in Figures 2a-2e, the sample placement layer 12 adopts a non-integrated structure as a whole. When in use, the sample layer, the heating layer, the fourth isolation layer, the thermal conductive layer and the fifth isolation layer are stacked in sequence. , and fix it with an external clamp. The sample layer is set independently from other layers, and the heating layer, the fourth isolation layer, the thermal conductive layer and the fifth isolation layer can be set independently of each other, or two or three of the layers can be combined by using the chip micro-nano processing technology. When combining, it should be combined according to the stacking order when the sample placement layer is used. Since the sample layers can be set independently, the number of sample layers can be flexibly set as required, and when a sample layer is damaged, it can be replaced in time. Compared with the sample placement layer of the integrated structure, a new thermal resistance will be generated between the layers, which usually affects the freezing speed of the cryochip. When the heat of the frozen chip provided by the embodiment of the present disclosure is conducted to the low-temperature cold source A in the lateral direction, the influence of the interlayer thermal resistance on the freezing speed can be reduced. After testing, the freezing speed can also achieve an order of magnitude of 10 ⁵ °C/s.

It should be noted that, for other technical details of the sample layer, the heating layer, the fourth isolation layer, the thermal conductive layer and the fifth isolation layer, reference may be made to the embodiment of the sample placement layer shown in FIGS. isolation layer; the heating layer corresponds to the isolation layer provided with the temperature control unit; the fourth isolation layer corresponds to the first isolation layer for isolating the temperature control unit and the heat conduction layer; the fifth isolation layer corresponds to the third isolation layer for The isolation of the chip substrate and the thermal conductive layer will not be repeated here.

In addition, the cryochip provided by the present disclosure can also be improved from the following aspects:

a Adjust the thickness of the thermally conductive layer, so that the thickness of the part close to the temperature control unit and the end of the thermally conductive layer is greater than the thickness of the thermally conductive layer between them;

b The portion of the thermally conductive layer between the portion of the thermally conductive layer close to the temperature control unit and the end portion of the thermally conductive layer is arranged in a patterned structure.

Specifically, FIG. 3 shows a schematic diagram of a temperature gradient within a sample placement layer according to an embodiment of the present disclosure. As shown in FIG. 3 , the temperature of the low-temperature cooling source A is -170° C., and the temperature at the bottom w1 of the chip substrate 11 is similar to the temperature of the low-temperature cooling source A, for example, -160° C. The temperature at the top w2 point of the sample placement layer 12 is, for example, -120°C. The temperature at the w3 point close to the temperature control unit 13 is located on the same plane as the w2 point. When the temperature control unit heats the sample, for example, it is 30°C, and the temperature gradient is mainly concentrated between the w3 point and the w2 point. The above temperature values are illustrative and do not limit the present disclosure.

The inventors have found that the freezing rate is limited by the heat capacity of the local temperature control area. Since the final freezing temperature of the sample is determined, the relatively high temperature area before freezing should be reduced as much as possible. For example, the scope of the local temperature control area should be small enough, and the temperature control unit should be as close to the sample as possible, thereby limiting the heat capacity of the local temperature control area. The freezing speed can be increased. On the other hand, outside the temperature control unit, the position close to the temperature control unit adopts a structure with low relative thermal conductivity, so that the temperature gradient is concentrated in the area close to the temperature control unit as much as possible, for example, the temperature gradient is concentrated at the w3 point and the between points w4 instead of between w3 and w2 to increase the freezing speed. Combining the above two improvements is beneficial to improve the freezing speed.

Using the above method a and/or method b to improve the cryochip can further improve the freezing speed of the cryochip. After testing, the freezing speed can reach the order of 10 ⁵ °C/s.

FIG. 4 shows a schematic structural diagram of a cryochip on which a sample is placed according to an embodiment of the present disclosure. As shown in FIG. 4 , the difference from FIG. 1 a is that the local temperature control area is provided with at least one closed sample accommodating cavity a and/or open sample accommodating cavity b for accommodating samples. Of course, a closed sample accommodating cavity a and/or an open sample accommodating cavity b may also be provided on the basis of the cryochip shown in FIGS. 1b-1c , which is not limited in the present disclosure. For other technical contents of the cryochip according to the embodiment of the present disclosure, refer to the embodiments shown in FIGS. 1 a to 1 c , which will not be repeated here.

According to an embodiment of the present disclosure, the temperature control unit 12 further includes an auxiliary temperature control unit disposed on the wall of the closed sample accommodating cavity a and/or the open sample accommodating cavity b, for reducing the amount of temperature control placed in the same local The temperature difference between multiple samples in a region. In this embodiment, the auxiliary temperature control unit and the temperature control unit may use the same components or equivalent components.

FIG. 5 shows a schematic structural diagram of a sample stage assembly according to an embodiment of the present disclosure. As shown in FIG. 5 , the sample stage assembly 20 includes: a cryochip 10 , a sample heat sink 21 and a controller 22 . Wherein, the sample heat sink 21 is used for accommodating the cryochip 10 . The controller 22 is electrically connected to the temperature control unit 13 for adjusting the temperature of the temperature control unit 13 . It should be noted that, the sample heat sink 21 can be designed as a light-transmitting structure, so as to be suitable for observing the sample under a microscope.

In the present disclosure, the sample heat sink 21 in the sample stage assembly 20 can be regarded as a low-temperature cooling source A. It can be understood that the sample heat sink 21 can also be omitted, and the cryochip 10 can be directly placed on the heat sink base 32 described below. At this time, the heat sink base 32 can be regarded as a low-temperature cold source A, which is not covered in this disclosure. limit.

In the present disclosure, the sample stage assembly 20 further includes a control circuit board (not shown in the figure), and the control circuit board can be embedded in the sample heat sink 21 or arranged around the area where the sample heat sink 21 is in direct contact with the cryochip 10 , so as to The present disclosure does not limit the position of the control circuit board, as long as the efficient heat transfer of the two is not affected. The controller 22 is electrically connected to the temperature control unit 13 through a control circuit board, so as to adjust the temperature of the temperature control unit 13 .

FIG. 6 shows a schematic structural diagram of a freezing system according to an embodiment of the present disclosure. As shown in FIG. 6 , the freezing system 30 includes: a sample stage assembly 20 , a low temperature cooling source 31 and a heat sink base 32 . The low-temperature cooling source 31 can be liquid nitrogen, which is used to cool the heat sink base 32 and keep it close to the temperature of liquid nitrogen. The heat sink base 32 is used to fix the sample stage assembly 20 and serve as a cold source to freeze the sample stage assembly 20 .

According to the embodiment of the present disclosure, when the sample is frozen, the heat sink base 32 is in direct contact with the sample heat sink 21 , so that the temperature of the sample heat sink 21 is close to the liquid nitrogen temperature or the same as the liquid nitrogen temperature. Other parts outside the temperature control area N are also frozen at the same time. The controller 22 adjusts the electrical parameters of the temperature control unit 13, and the sample is directly cooled by other parts of the chip and the sample heat sink 21 whose ambient temperature is close to or equal to the temperature of liquid nitrogen.

According to an embodiment of the present disclosure, the freezing system 30 further includes: a freezing medium sealing cover plate 33, the freezing medium sealing cover plate 33 is used to seal the low-temperature cold source, and in some cases can also support the heat sink base 32 Immerse in the low temperature cold source.

According to an embodiment of the present disclosure, the freezing system 30 further includes: a sample cover plate 34 whose area can at least seal the opening of the heat sink base 32 . The length of the sample cover plate 34 shown in the figure extends to the two ends of the freezing medium sealing cover plate 33 respectively. This setting is to ensure that in the low temperature environment where the cryochip is located, no water vapor will enter and prevent the water vapor from condensing and forming droplets to adhere to the surface. In order to avoid the formation of ice crystals in the low temperature environment, the droplets will not affect the microscopic observation or property characterization of the sample. It can be understood that when the area of the sample cover plate 34 is sufficient to cover the sample heat sink, the low temperature environment where the cryochip is located can usually be sealed to prevent water vapor from entering. On this basis, the length of the sample cover plate 34 can be appropriately increased. make restrictions.

In the present disclosure, the sample cover plate 34 may also be provided with an observation area or a detection area, so that under the premise of preventing water vapor from entering in a low temperature environment, the sample can be observed microscopically through the observation area and/or a detection device can be used at the position of the detection area Characterize the properties of the sample. In some cases, a dry atmosphere can be provided for a low temperature environment to solve the defect that water vapor condensation affects the observation or characterization of the sample, and in this case, the sample cover plate 34 can be omitted.

The present disclosure also provides a sample testing system, including a freezing system 30 and a microscopic observation device and/or a detection device used in conjunction with the freezing system 30 .

According to an embodiment of the present disclosure, the microscopic observation device is at least one of an upright optical microscope, an inverted optical microscope, and an electron microscope. The detection device is at least one of monitoring instruments such as photodetectors, X-rays, Raman spectrometers, and infrared spectrometers.

FIG. 7 shows a schematic flowchart of a method for freezing a sample according to an embodiment of the present disclosure. As shown in FIG. 7 , the method utilizes the freezing system 30 to freeze the sample, including the following steps S110-S140.

In step S110, the temperature of the local temperature control area is adjusted to the first temperature;

In the present disclosure, firstly, at room temperature, connect the control circuit board to the controller; secondly, start the controller to heat the temperature control unit to a set temperature slightly higher than room temperature (determine the temperature by measuring the resistance value in real time). control unit temperature, such as 30°C), and keep it constant at this temperature (adjusted by resistance feedback). Since the distance between the temperature control unit and the sample is extremely small and the thermal resistance is extremely low, it can be approximately considered that the sample temperature is also at the set temperature ( Such as 30 ℃), the typical resistance value range at this time is Rheater=50-100ohm.

In step S120, a sample is placed in the local temperature control area;

In step S130, the electrical parameters of the temperature control unit are adjusted to keep the average temperature of the sample stable at the first temperature, and to maintain the temperature gradient between the sample and the low-temperature cold source in the sample placement layer;

In the present disclosure, the sample stage assembly is placed on the frozen heat sink base (about -190°C), and the temperature of the frozen chip begins to decrease. At this time, the controller automatically increases the current Iheater to perform resistance heating to reduce the local temperature. The average temperature of the sample in the control area N is maintained at the first temperature (for example, 30°C), at this time, the typical current value range is Iheater=50-100mA, and the typical power of the Rheater (Rheater*Iheater2) is about 0.3W;

In step S140, the electrical parameter is detected and adjusted to a first predetermined range, so as to adjust the average temperature of the sample at a second temperature, wherein the second temperature is lower than the first temperature, and at the low temperature Determine the required temperature value within the lowest temperature range that the cold source can provide.

In the present disclosure, when freezing is required, the controller sends a signal to suddenly reduce the current Iheater to 0.1-1.0 mA, the temperature of the sample in the local temperature control area N will rapidly drop to the temperature of the heat sink base 31, and the Rheater also sharply Reduced to about 1/7 of the Rheater at room temperature, the control circuit maintains a small constant current (0.1-1.0mA) throughout the cooling process. After freezing, the control circuit maintains a small current (0.1-1.0mA), maintains the average temperature of the sample at the second temperature (eg -190°C), and continuously monitors the change of the Rheater, which is used as a reference for the sample temperature.

In the present disclosure, the second temperature is determined according to the temperature of the low-temperature cooling source A, and may not be lower than this temperature. Specifically, when the low temperature cold source A can provide a low temperature of -190°C, the temperature of the sample can be adjusted to a desired temperature, for example, it can be -140°C.

It should be noted that step S110 and step S120 are steps performed before placing the sample stage assembly into the heat sink base. In step S110, the temperature of the local temperature control area can also be room temperature, in this case, it is not necessary to activate the controller to heat the temperature. control unit. In addition, the execution order of step S110 and step S120 may be interchanged, which is not limited in the present disclosure.

The basic principles of the working of the temperature control unit are explained as follows:

FIG. 8 is a schematic diagram showing the basic principle of the operation of the temperature control unit according to the embodiment of the present disclosure. As shown in Figure 8, the temperature control unit is connected by a 4-terminal measurement method, namely Force_H(I+), Sense_H(V+), Sense_L(V-), Force_L(I-). The heating current Iheater is applied through I+ to I-, and this current can reach the maximum magnitude of 50-200mA. At the same time, measure the voltage difference Vheater at both ends of V+ and V-, the port current at both ends is very small (such as virtual ground), and the influence on the current passing through the temperature control unit is not recorded. The resistance value Rheater of the temperature control unit is measured in real time by Vheater/Iheater, and the average temperature of the temperature control unit is evaluated based on this.

It should be noted that, in the embodiments of the present disclosure, the function of local selective freezing can be realized by controlling the corresponding temperature control units in different local temperature control areas. The temperature control units and the local temperature control areas can be in a one-to-one correspondence. One temperature control unit can be used to adjust the temperature of multiple local temperature control areas as required, and those skilled in the art can freely combine them, and all can use the above methods to realize the function of rapidly freezing samples. This disclosure does not limit this.

According to embodiments of the present disclosure, the average temperature of the sample is adjusted by adjusting electrical parameters. The electrical parameters may be current, resistance or power parameters, which are not limited in the present disclosure.

In the present disclosure, the temperature control unit can be used to measure the temperature of the sample in real time while heating the sample, or an additional temperature measurement unit can be provided on the cryochip, the temperature control unit is used to heat the sample, and the temperature measurement unit is used to measure the temperature of the sample in real time at the same time. . This disclosure does not limit this.

In the present disclosure, a curve of resistance versus time can be plotted, and then the cooling rate of the sample can be estimated according to the curve of resistance versus time. Specifically, the Rheater can be calculated by measuring the Vheater under the condition of keeping the Iheater current constant, and the curve of the Rheater variation with time during the cooling process can be continuously monitored, and the curve can be used as a reference for evaluating the freezing speed of the sample.

According to an embodiment of the present disclosure, the first temperature to the second temperature is changed within a predetermined period of time.

In the present disclosure, the predetermined time period for reducing the first temperature to the second temperature is controlled within 10ms, for example, 1-2ms. Specifically, within 1 ms, the temperature decreased from room temperature to below -140°C, and further decreased to below -180°C in the following 1-2 ms.

According to an embodiment of the present disclosure, the time delay may be a delay time from when the control system sends an electrical signal for reducing the first temperature to when the cryochip receives the electrical signal and starts to freeze the sample. It can be understood that, when testing a biological sample, it is necessary to determine a time point for freezing the biological sample, so as to observe the sample at this time point or perform other tests. The delay reflects the delay time of the freezing operation. The smaller the delay is, the more precise the time point of freezing the sample can be controlled, so that the state of the sample after freezing is close to the state of the sample during the freezing operation, so that the sample can be tested better.

According to the embodiments of the present disclosure, by optimizing the circuit structure and control method of the temperature control unit, the time delay can be controlled to be less than 0.1 ms.

According to an embodiment of the present disclosure, the first temperature is the liquid temperature of the sample, for example, an aqueous solution under normal pressure, and for conventional cell samples, the temperature is in the range of 0-40°C, preferably 20-30°C; For special heat-resistant cells or bacteria, the temperature can be increased; under extreme pressure conditions, the temperature range may also be changed to ensure that the culture medium is in a liquid state and the biological sample survives normally.

According to an embodiment of the present disclosure, the second temperature is a temperature at which the same sample is directly transformed from a liquid state to an amorphous solid state under the same environment, and the amorphous solid state is maintained continuously. For example, for water or a general aqueous solution, the temperature should be lower than -140°C, high pressure or low pressure, the temperature range may be changed to ensure that the culture medium is frozen to an amorphous stable temperature without damaging the sample structure.

FIG. 9 shows a schematic flowchart of a method of heating a sample according to an embodiment of the present disclosure. As shown in FIG. 9 , the method utilizes the freezing system 30 to heat the sample, including the following steps S210-S220.

In step S210, the electrical parameters are detected and adjusted so that the average temperature of the local temperature control area reaches the second temperature.

In the present disclosure, firstly, under the condition of low temperature (at liquid nitrogen temperature), the temperature control unit is connected with the controller; secondly, the control circuit is started, and the set value of I_Heater is 0.1-1.0mA (only for measuring the resistance value to Evaluation temperature, heating can be ignored), the temperature of the temperature control unit is close to the temperature of the heat sink.

In step S220, the electrical parameters of the temperature control unit are adjusted to a second predetermined range, and then the electrical parameters are detected and adjusted to maintain the average temperature of the sample at the first temperature; The temperature unit determines that the average temperature of the sample is at a first temperature; wherein the first temperature is greater than the second temperature.

In the disclosed method, when the temperature of the temperature control unit is close to the temperature of the heat sink, the IHeater is suddenly increased, and the Rheater is heated to the Rheater value corresponding to the set temperature (eg, 30° C.) at the fastest speed. In this process, since the resistance value of the initial Rheater at the temperature of liquid nitrogen is only about 1/7 of the room temperature, the initial heating current will reach the order of 200-300mA before reaching the equivalent power of 0.3W, in order to achieve for rapid heating purposes. At the same time, due to the rapid increase of the resistance value during the heating process, the Iheater needs to be quickly adjusted (lowered) to a reasonable range, so as to maintain the Rheater at the set value (such as the Rheater corresponding to 30°C). After maintaining the heating element at a set temperature (eg, 30°C), the sample can be removed as needed, or the sample can continue to be frozen.

In the present disclosure, an external heat source can be used to limit the heating area to a local temperature control area on the cryochip by focusing to heat the sample, and then control the heating power and temperature by cooperating with the feedback system on the cryochip, such as A temperature measurement unit can be set on the cryochip to monitor the sample temperature in real time, and then control the heating power of the external heat source. The external heat source may be microwaves, lasers, and the like.

It should be noted that, after using the cryochip to freeze the sample, step S210 may be omitted, and step S220 may be directly performed to heat the sample.

In the method for heating a sample provided by the embodiment of the present disclosure, the freezing system 30 is used to heat the sample. For specific technical details, refer to the embodiment shown in FIG. 6 , which will not be repeated here.

According to an embodiment of the present disclosure, the second temperature is increased to the first temperature within a predetermined period of time.

According to an embodiment of the present disclosure, the predetermined time period is within 10 ms, for example, 1-2 ms.

10 shows a schematic flow diagram of a method of manipulating a sample according to an embodiment of the present disclosure. As shown in FIG. 10 , the method utilizes the sample testing system to operate the sample, including the following steps S310-S370.

In step S310, the electrical parameters of the temperature control unit are adjusted to maintain the average temperature of the sample at the first temperature, and to maintain the temperature gradient between the sample and the low temperature cooling source in the sample placement layer;

In step S320, the electrical parameter is detected and adjusted to a first predetermined range to adjust the average temperature of the sample at a second temperature, and then the sample is operated at the second temperature, wherein the second temperature is lower At the first temperature, determine the required temperature value within the lowest temperature range that the low-temperature cold source can provide;

In step S330, the electrical parameters of the temperature control unit are adjusted to a second predetermined range to heat the sample or an external heat source is used to heat the sample to a first temperature, and then the electrical parameters are repeatedly detected and adjusted to the first predetermined range, to maintain the average temperature of the sample at a second temperature, and then operate the sample at the second temperature;

In step S340, after the sample is operated, the sample is replaced.

It should be noted that step S340 can be performed after heating the sample to the first temperature in step S320, that is, after operating the sample at the second temperature for one time, after heating the sample to the first temperature, the sample can be repeatedly frozen as needed, After the sample is operated for the second time, the sample is heated to the first temperature and then the operation is terminated. The present disclosure does not limit the number of cycles of freezing, heating, and re-freezing. It can be understood that after the operation is completed in step S320, a new sample can also be replaced at the first temperature, and then the new sample can be repeatedly frozen, which is not limited in the present disclosure.

For the method for operating a sample provided by the embodiment of the present disclosure, the specific technical details refer to the embodiments shown in FIG. 7 and FIG. 9 , which are not repeated in the embodiment of the present disclosure.

According to an embodiment of the present disclosure, the operation sample may be a microscopic observation sample, a detection signal of a test sample under monitoring instruments such as a photodetector, X-ray, Raman spectrometer, infrared spectrometer, etc., which is not limited in the present disclosure.

According to an embodiment of the present disclosure, in step S310, the electrical parameters of the temperature control unit are adjusted to maintain the average temperature of the sample at the first temperature, and after the step of maintaining the temperature gradient between the sample and the low temperature cooling source in the sample placement layer, the Methods also include:

Operating the sample at a first temperature and determining a start-up moment for adjusting the electrical parameter to a first predetermined range, and at the start-up moment, detecting and adjusting the electrical parameter to the first predetermined range to maintain the average value of the sample The temperature is at the second temperature.

According to an embodiment of the present disclosure, the first temperature to the second temperature is changed within a first predetermined period of time.

According to an embodiment of the present disclosure, the electrical parameters of the temperature control unit are adjusted by electronic equipment. For example, by using keithley2612B to adjust the electrical parameters of the temperature control unit, the delay can be controlled within 2ms.

According to an embodiment of the present disclosure, the second temperature is changed to the first temperature within a second predetermined period of time.

According to an embodiment of the present disclosure, the second predetermined time period is within 10 ms, for example, 1-2 ms.

The method used by the sample testing system of the embodiment of the present disclosure to operate the sample, by adjusting the parameters of the temperature control unit, can realize the operation flow of frozen sample-operational sample, or frozen sample-operational sample-heated reanimated sample-frozen sample-operational sample - A cycle of the above procedure for heating the revived sample, or the procedure for handling the sample before freezing - freezing the sample - handling the sample, or handling the sample before freezing - freezing the sample - handling the sample - heating the resurrecting sample - handling the sample before freezing - freezing the sample - handling the sample - The cycle of the above procedure for heating and reviving the sample, it is also possible to repeat the above procedure after changing the sample after freezing the sample - manipulating the sample. This technical solution limits the heat capacity of the local temperature control area by designing the thermal resistance and heat exchange efficiency of each interface between the local temperature control area, the chip substrate and the low temperature cold source, and obtains a freezing and heating rate higher than 10 ⁵ ℃/s , to ensure that the sample is not damaged (or less damaged) during the repeated freezing and heating process, which is a major improvement for biological sample freezing, in-situ observation and heating thawing, and has great significance and broad application prospects.

The following will specifically describe the manner in which the sample testing system provided by the embodiment of the present disclosure is used for microscopic observation of the sample.

Method 1. Place the sample in the local temperature control area - keep it to the first temperature - freeze to the second temperature - microscopic observation. This method is suitable for protein samples, and high-resolution microscopic observation is performed after freezing the sample;

Method 2: Place the sample in a local temperature-controlled area - keep it to the first temperature - real-time microscopic observation - start freezing at a specific time node - keep it to the second temperature - high-resolution microscopic observation, this method is suitable for cell samples and can be Sample activity is observed in real-time, frozen at specific time points of interest, such as cell division, when cells engulf foreign material, and then high-resolution microscopy.

It should be noted that the microscopes used for real-time microscopic observation before freezing and after freezing can be different, so as to realize observation with different resolutions. For example, a conventional upright optical microscope is used to observe the sample in real time, and an electron microscope is used to observe the high-resolution structure of the cells after freezing.

According to the method for microscopic observation of samples provided in the embodiments of the present disclosure, the cell samples are frozen from 20-30 °C to about -170 °C, the time is less than 2 ms, and the freezing speed is higher than 10 ⁵ °C/s, so as to ensure that the cell samples are kept after freezing. The shape remains essentially unchanged, neither cracking nor appreciably deforming. The above description is merely a preferred embodiment of the present disclosure and an illustration of the technical principles employed. It should be understood by those skilled in the art that the scope of the invention involved in the present disclosure is not limited to the technical solutions formed by the specific combination of the above technical features, and should also cover the above technical features without departing from the inventive concept. Other technical solutions formed by any combination of its equivalent features. For example, a technical solution is formed by replacing the above-mentioned features with the technical features disclosed in the present disclosure (but not limited to) with similar functions.

Claims

A freezing chip, characterized in that the freezing chip is in contact with a low-temperature cold source for freezing a sample, comprising:

a sample placement layer, the surface of which is divided into at least one local temperature control area, and the local temperature control area is used for placing the sample;

several temperature control units for adjusting the temperature of the local temperature control area;

The chip substrate supports the top surface or bottom surface of the sample placement layer to form a first contact surface; the projection of the first contact surface and the local temperature control area on the same plane does not overlap or partially overlap.
The cryochip according to claim 1, wherein,

The chip substrate is supported on a peripheral area outside the central area of the sample placement layer; the central area is divided into at least one local temperature control area; or

The chip substrate is supported in the central area of the sample placement layer; the peripheral area outside the central area is divided into at least one local temperature control area; or

The chip substrates are supported at spaced positions of the local temperature control regions.
The cryochip according to claim 1, wherein,

When the chip substrate supports the top surface of the sample placement layer to form the first contact surface, the chip substrate further has a second contact surface for contacting with the low-temperature cold source; wherein the first contact surface is The contact surface and the second contact surface are located on the same side of the chip substrate.
The cryochip according to claim 1, wherein,

The temperature control unit and the sample placement layer are of an integrated structure.
The cryochip according to claim 1, wherein the temperature control unit is disposed on the sample placement layer using a chip micro-nano processing technology, and the local temperature control area is divided by the temperature control unit.
The cryochip according to claim 5, wherein,

The sample placement layer is a heat-conducting layer; the temperature control unit is disposed on the heat-conducting layer, so as to divide the local temperature-control area on the heat-conducting layer; or

The sample placement layer includes: a thermal conductive layer and a first isolation layer fabricated on the thermal conductive layer by a chip micro-nano processing process; wherein the temperature control unit is arranged on the first isolation layer to The local temperature control area is divided on the first isolation layer; or

The sample placement layer includes: a thermal conductive layer, a first isolation layer fabricated on the thermal conductive layer using a chip micro-nano processing technology, and a second isolation layer fabricated on the first isolation layer using a chip micro-nano processing technology; Wherein, the temperature control unit is arranged on the first isolation layer, so as to divide the local temperature control area on the second isolation layer; or

The sample placement layer includes: a third isolation layer, a thermal conductive layer fabricated on the third isolation layer using a chip micro-nano processing technology, a first isolation layer fabricated on the thermal conductive layer using a chip micro-nano processing technology, and A second isolation layer fabricated on the first isolation layer by a chip micro-nano processing process; wherein the temperature control unit is disposed on the first isolation layer to divide the second isolation layer on the second isolation layer. Local temperature controlled areas; or

The sample placement layer includes: a third isolation layer, a first isolation layer fabricated on the third isolation layer using a chip micro-nano processing technology, and a thermally conductive layer fabricated on the first isolation layer using a chip micro-nano processing technology. layer and a second isolation layer fabricated on the thermally conductive layer using a chip micro-nano processing process; wherein the temperature control unit is arranged on the third isolation layer to divide the second isolation layer Local temperature control area.
The cryochip according to claim 1, wherein,

The sample placement layer includes: at least one sample layer, a heating layer, a fourth isolation layer, a heat conduction layer, and a fifth isolation layer arranged separately;

Wherein, the surface of the sample layer is divided into at least one local temperature control area; the temperature control unit is arranged on the heating layer.
The cryochip according to claim 6 or 7, wherein the thickness of the portion of the thermally conductive layer close to the temperature control unit and the end portion of the thermally conductive layer is greater than the thickness of the portion of the thermally conductive layer therebetween; and /or

The portion of the heat conducting layer between the portion of the heat conducting layer close to the temperature control unit and the end portion of the heat conducting layer is arranged in a patterned structure.
The cryochip according to any one of claims 6-8, wherein the local temperature control area is provided with at least one closed sample accommodating cavity and/or open sample accommodating cavity for accommodating the sample.
The cryochip according to claim 9, wherein the temperature control unit further comprises an auxiliary temperature control unit disposed on the wall of the closed sample accommodating cavity and/or the open sample accommodating cavity.
The cryochip according to any one of claims 1-10, wherein the sample placement layer is provided with an optical path channel to adapt to a microscope, a photodetector, an X-ray, a Raman spectrometer, and an infrared spectrometer.
The cryochip according to claim 11, which is made of a light-transmitting material or has a perforated channel as the light passage channel.
The cryochip according to any one of claims 1-12, characterized in that, the cryochip is made by a chip micro-nano processing technology.
The cryochip according to claim 13, wherein the thickness of the cryochip is controlled at 0.1-2 mm.
A sample stage assembly comprising the cryochip according to any one of claims 1-14, characterized in that, comprising:

A controller electrically connected to the temperature control unit is used to adjust the temperature of the temperature control unit.
The sample stage assembly of claim 15, further comprising: a sample heat sink for accommodating the cryochip.
A freezing system comprising the sample stage assembly of claim 15 or 16, characterized in that, comprising:

low temperature cold source;

The heat sink base of the sample stage assembly is fixed to be in contact with the low temperature cooling source.
The freezing system of claim 17, further comprising:

The freezing medium sealing cover plate is used for sealing the cryogenic cold source.
The freezing system of claim 17, further comprising:

The sample cover has an area capable of at least sealing the opening of the heat sink base.
A sample testing system comprising the freezing system of any one of claims 17-19, comprising;

Microscopic observation device and/or detection device used in conjunction with the freezing system.
The sample testing system according to claim 20, wherein the microscopic observation device is at least one of an upright optical microscope, an inverted optical microscope, and an electron microscope;

The detection device is at least one of a photodetector, an X-ray, a Raman spectrometer, and an infrared spectrometer.
A method for freezing a sample by the freezing system according to any one of claims 17-19, characterized in that, comprising:

adjusting the electrical parameters of the temperature control unit to maintain the average temperature of the sample to be stable at the first temperature, and to maintain the temperature gradient between the sample and the low temperature cold source in the sample placement layer;

Detecting and adjusting the electrical parameters to a first predetermined range to adjust the average temperature of the sample at a second temperature, wherein the second temperature is lower than the first temperature, and the low temperature cold source can provide Determine the required temperature value within the lowest temperature range.
The method according to claim 22, wherein the adjustment of the electrical parameters of the temperature control unit is to maintain the average temperature of the sample to be stable at the first temperature, and to maintain the temperature between the sample and the low temperature cooling source in the sample placement layer. Before the temperature gradient, the method further includes:

adjusting the temperature of the local temperature control area to the first temperature;

A sample is placed within the localized temperature-controlled area.
The method of claim 22, wherein:

The first temperature is changed to the second temperature within a predetermined period of time.
The method of claim 24, wherein the predetermined time period is within 10 ms.
The method according to claim 22, wherein the electrical parameters of the temperature control unit are adjusted by electronic equipment.
The method of claim 22, wherein:

The first temperature is the liquid temperature of the sample, and the second temperature is the temperature at which the same sample is directly transformed from a liquid state to an amorphous solid state under the same environment, and the amorphous solid state is maintained continuously.
The method of claim 27, wherein:

The first temperature is 0°C to 40°C, and the second temperature is lower than -140°C.
A method for heating a sample by a freezing system as claimed in any one of claims 17-19, comprising:

Adjust the electrical parameters of the temperature control unit to a second predetermined range, and then detect and adjust the electrical parameters to maintain the average temperature of the sample at the first temperature; or use an external heat source to heat the sample, and determine the temperature through the temperature measuring unit The average temperature of the sample is at a first temperature; wherein the first temperature is greater than the second temperature.
The method of claim 29, further comprising:

The electrical parameters are detected and adjusted to bring the average temperature of the local temperature-controlled area to a second temperature.
The method of claim 29, wherein:

The second temperature is changed to the first temperature within a predetermined time period.
The method according to claim 29, wherein the predetermined time period is within 10 ms.
The method of claim 29, wherein:

The first temperature is the liquid temperature of the sample, and the second temperature is the temperature at which the same sample is directly transformed from a liquid state to an amorphous solid state under the same environment, and the amorphous solid state is maintained continuously.
The method of claim 33, wherein:

The first temperature is 0°C to 40°C, and the second temperature is lower than -140°C.
A method for manipulating a sample using the sample testing system of claim 20, comprising:

Adjusting the electrical parameters of the temperature control unit to maintain the average temperature of the sample at the first temperature, and to maintain the temperature gradient between the sample and the low temperature cold source in the sample placement layer;

Detecting and adjusting the electrical parameter to a first predetermined range to adjust the average temperature of the sample at a second temperature, and then operating the sample at the second temperature, wherein the second temperature is lower than the first temperature The required temperature value is determined within the lowest temperature range that the low-temperature cold source can provide.
The method of claim 35, further comprising:

Adjust the electrical parameters of the temperature control unit to a second predetermined range to heat the sample or use an external heat source to heat the sample to a first temperature, and then repeatedly detect and adjust the electrical parameters to the first predetermined range to maintain the sample The average temperature is at the second temperature, and then the sample is operated at the second temperature.
The method of claim 35 or 36, further comprising:

After the steps of adjusting the electrical parameters of the temperature control unit to maintain the average temperature of the sample at the first temperature and maintaining the temperature gradient between the sample and the low temperature cold source in the sample placement layer, operate the sample at the first temperature and determine A start-up time when the electrical parameters are adjusted to a first predetermined range, and at the start-up time, the electrical parameters are detected and adjusted to a first predetermined range to maintain the average temperature of the sample at a second temperature.
The method of claim 37, further comprising:

After manipulating the sample, the sample is replaced.
The method of claim 35, wherein:

The first temperature is changed to the second temperature within a first predetermined period of time.
The method according to claim 35, wherein the electrical parameters of the temperature control unit are adjusted by electronic equipment.
The method of claim 35, wherein:

The second temperature is changed to the third temperature within a second predetermined time period.
The method of claim 41, wherein the second predetermined time period is within 10 ms.
The method according to any one of claims 35-42, wherein,

The first temperature is the liquid temperature of the sample, and the second temperature is the temperature at which the same sample is directly transformed from a liquid state to an amorphous solid state under the same environment, and the amorphous solid state is maintained continuously.
The method of claim 43, wherein:

The first temperature is 0°C to 40°C, and the second temperature is lower than -140°C.
The method of claim 35, wherein the method is suitable for microscopic observation of samples.