WO2022135095A1 - 端面耦合器及其制造方法 - Google Patents

端面耦合器及其制造方法 Download PDF

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Publication number
WO2022135095A1
WO2022135095A1 PCT/CN2021/134925 CN2021134925W WO2022135095A1 WO 2022135095 A1 WO2022135095 A1 WO 2022135095A1 CN 2021134925 W CN2021134925 W CN 2021134925W WO 2022135095 A1 WO2022135095 A1 WO 2022135095A1
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Prior art keywords
waveguide
dielectric layer
layer
grating
optical fiber
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PCT/CN2021/134925
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English (en)
French (fr)
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李博文
冯俊波
朱继光
曹国威
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联合微电子中心有限责任公司
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Priority to US17/922,959 priority Critical patent/US20230161107A1/en
Publication of WO2022135095A1 publication Critical patent/WO2022135095A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12002—Three-dimensional structures
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29D—PRODUCING PARTICULAR ARTICLES FROM PLASTICS OR FROM SUBSTANCES IN A PLASTIC STATE
    • B29D11/00—Producing optical elements, e.g. lenses or prisms
    • B29D11/00663—Production of light guides
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1228—Tapered waveguides, e.g. integrated spot-size transformers
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/124—Geodesic lenses or integrated gratings
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/14—Mode converters
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/30—Optical coupling means for use between fibre and thin-film device
    • G02B6/305—Optical coupling means for use between fibre and thin-film device and having an integrated mode-size expanding section, e.g. tapered waveguide
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035—Materials
    • G02B2006/12061—Silicon
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/12107—Grating
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films

Definitions

  • the present disclosure relates to the field of semiconductor technology, and in particular, to an end-face coupler and a manufacturing method thereof.
  • Silicon photonics integration technology is widely used in important fields such as large-capacity communications, optical signal processing, and avionics systems.
  • silicon photonic chips one of the key issues that inhibits the widespread application of silicon photonic chips is the coupling of optical fibers to silicon photonic chips.
  • the mode spot size of the optical waveguide in the silicon photonic chip is quite different from the mode spot size of the optical fiber, and the silicon photonic-fiber coupling loss caused by the mode spot mismatch is high. Therefore, the coupling problem between the optical fiber and the optical waveguide in the chip can generally be realized by a coupler.
  • the coupler in the related art has problems such as low coupling efficiency.
  • some key parts of the coupler are in the floating state, which leads to the low reliability of the structure and is easy to break during the wafer dicing and chip packaging process, which increases the cost and inhibits the yield.
  • some couplers have complex structures and require precise control of the growth of multiple layers of materials and the distance between them, resulting in high process requirements and increased cost.
  • a method of fabricating an end-face coupler comprising: providing a semiconductor-on-insulator substrate, the semiconductor-on-insulator substrate including a first substrate, an insulating layer on the first substrate, and an insulating semiconductor layer on layer; patterning semiconductor layer to form first waveguide; forming first dielectric layer on insulating layer; forming second dielectric layer on first dielectric layer and first waveguide; on second dielectric layer forming a second waveguide; forming a third dielectric layer covering the second waveguide; bonding the third dielectric layer to the carrier substrate on the side of the third dielectric layer away from the second waveguide; removing the first substrate; A fourth dielectric layer is formed on the surface of the layer.
  • an end-face coupler comprising: a first waveguide; a first dielectric layer adjacent to the first waveguide; a second dielectric layer on the first waveguide and the first dielectric layer; a second waveguide on the second dielectric layer; a third dielectric layer covering the second waveguide; a carrier substrate on the third dielectric layer; an insulating layer beneath the first waveguide and the first dielectric layer; and an insulating layer A fourth dielectric layer below the layer.
  • FIG. 1 is a flowchart of a method of manufacturing an end-face coupler according to an exemplary embodiment of the present disclosure
  • FIGS. 2A to 2K are schematic cross-sectional views of exemplary structures of end-face couplers formed in various steps of a method of manufacturing the end-face coupler according to an exemplary embodiment of the present disclosure
  • 3A to 3C are schematic structural diagrams of a second waveguide according to an exemplary embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a partial structure of an end-face coupler according to an exemplary embodiment of the present disclosure.
  • first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or Sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure.
  • Terms such as “before” or “before” and “after” or “followed by” may similarly be used, for example, to indicate the order in which light travels through elements.
  • the device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
  • a layer is referred to as being “between” two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
  • Embodiments of the disclosure are described herein with reference to schematic illustrations (and intermediate structures) of idealized embodiments of the disclosure. As such, variations to the shapes of the illustrations are to be expected, eg, as a result of manufacturing techniques and/or tolerances. Accordingly, embodiments of the present disclosure should not be construed as limited to the particular shapes of the regions illustrated herein, but are to include deviations in shapes due, for example, to manufacturing. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present disclosure.
  • the term “substrate” may refer to the substrate of a diced wafer, or may refer to the substrate of an un-diced wafer.
  • the terms chip and die are used interchangeably, unless such interchange would create a conflict.
  • film includes layers and should not be construed to indicate vertical or horizontal thickness unless otherwise specified. It should be noted that the thicknesses of the material layers of the hydrophone shown in the figures are only schematic representations, and do not represent actual thicknesses.
  • Optical coupling can be achieved between the fiber and the chip through a coupler.
  • the aforementioned optical coupling can be achieved by surface couplers or end-face couplers.
  • the scheme adopted by surface couplers is based on diffraction gratings, which mainly utilize grating structures to couple light into optical waveguides in a diffracted form.
  • the length of the traditional grating coupler is mostly hundreds of microns. Although this length makes the leakage factor of the grating very small, it limits the bandwidth of the grating coupler.
  • the use of end couplers is sometimes considered.
  • the key parts of the current end-face coupler are often in a suspended state, and the core part of the coupler needs to be supported by beams, so its structural reliability is not high, and it is easy to break in the process of wafer dicing and chip packaging, which increases the cost, inhibited production.
  • some end-face couplers have complex structures, which require precise control of the growth of multiple layers of materials and the distance between them, resulting in high process requirements and increased cost.
  • Embodiments of the present disclosure provide a method for manufacturing an end face coupler and an end face coupler. Fabricating an end-face coupler by a method according to an embodiment of the present disclosure helps to improve coupling efficiency, improve reliability, reduce device size, and reduce process cost.
  • FIGS. 2A-2K are schematic diagrams of example structures formed through the various steps of the method 100 .
  • the method 100 is described below with reference to Figures 1 and 2A-2K.
  • a semiconductor-on-insulator substrate 210 is provided. As shown in FIG. 2A , the semiconductor-on-insulator substrate 210 includes a first substrate 212 , an insulating layer 214 on the first substrate 212 , and a semiconductor layer 216 on the insulating layer 214 .
  • the semiconductor-on-insulator substrate 210 may be a silicon-on-insulator (SOI) substrate. SOI substrates are readily available commercially and have good properties for integrated photonic devices.
  • the first substrate 212 may be made of any suitable material (eg, silicon or germanium).
  • the insulating layer 214 may be an oxide material, a thermal oxide material, a nitride material, or the like.
  • the insulating layer 214 may be silicon dioxide.
  • the insulating layer 214 may have a thickness of about 1 ⁇ m to 5 ⁇ m.
  • the semiconductor layer 216 may be referred to as a semiconductor device layer in which various semiconductor components are formed.
  • the semiconductor layer 216 may be made of silicon, but the present disclosure is not limited thereto.
  • the semiconductor layer 216 may have a thickness of about 200 nm to 250 nm.
  • a barrier layer 218, is shown in addition to the structure of the semiconductor-on-insulator substrate 210.
  • the barrier layer 218 may be formed in an optional step after step 110 .
  • a barrier layer 218 may be formed on the semiconductor layer 216 in accordance with some embodiments.
  • the material forming the barrier layer 218 may be titanium nitride or polysilicon. It should be understood, however, that barrier layers 218 of other materials are possible.
  • the semiconductor layer 216 is patterned to form a first waveguide 220, as shown in Figure 2B.
  • the semiconductor layer 216 may be patterned by processes such as photolithography and etching.
  • the first waveguide is formed on the semiconductor-on-insulator substrate 210 through steps such as spin-off, exposure, development, baking, etc. Photoresist pattern. After that, using the photoresist as a mask, the semiconductor layer 216 is etched through an etching process to form the first waveguide 220 . Subsequently, degumming and cleaning are performed.
  • the etching process may be, for example, wet etching or dry etching.
  • wet etching can be divided into isotropic etching and anisotropic etching.
  • Dry etching employs physical methods (eg, sputtering, ion etching) or chemical methods (eg, reactive ion etching).
  • a barrier layer 218 may be formed on the semiconductor layer 216 . That is, the barrier layer 218 may be formed on the semiconductor layer 216 before the semiconductor layer 216 is patterned.
  • FIG. 2B shows the barrier layer 218 as formed.
  • patterning semiconductor layer 216 to form first waveguide 220 may include patterning barrier layer 218 and semiconductor layer 216 to form the first waveguide 220.
  • the first waveguide 220 may be formed of a material selected from the group consisting of silicon, silicon oxynitride, silicon nitride, lithium niobate, polymers, and indium phosphide (InP).
  • the first waveguide formed of the above-mentioned materials can be compatible with the existing semiconductor process, such as CMOS process, which helps to reduce the process cost.
  • a first dielectric layer 223 is formed on the insulating layer 214, as shown in FIG. 2C.
  • the barrier layer 218 may be formed on the semiconductor layer 216 prior to patterning the semiconductor layer 216 .
  • forming the first dielectric layer 223 on the insulating layer 214 includes: forming a first dielectric material layer 222 covering the barrier layer 218 and the insulating layer 214; and planarizing the first dielectric material layer 222 until the barrier layer 218 is completely removed, thereby forming the first dielectric layer 223 .
  • the surface of the first dielectric layer 223 away from the first substrate 212 is substantially flush with the surface of the first waveguide 220 away from the first substrate 212 .
  • FIG. 2D shows a schematic diagram after forming a first dielectric material layer 222 overlying barrier layer 218 and insulating layer 214 . It should be understood that although the surface of the first dielectric material layer 222 shown in FIG. 2D is a flat interface, it should be understood that in an actual manufacturing process, due to the influence of the manufacturing process, its surface may not be flat. Therefore, it may be necessary to planarize the first dielectric material layer 222 to obtain a substantially smooth and flat surface.
  • the surface of the first dielectric layer 223 away from the first substrate 212 is substantially flush with the surface of the first waveguide 220 away from the first substrate 212 .
  • the upper surface of the first dielectric layer 223 is substantially flush with the upper surface of the first waveguide 220 .
  • the term “substantially flush” encompasses “flush” and deviations from “flush” due to manufacturing process-induced errors. It should be understood that, considering the influence of the manufacturing process, it is possible for the surfaces of the first dielectric layer and the first waveguide to float up and down within the allowable precision range, but they are basically smooth planes.
  • the first dielectric material layer 222 may be formed by deposition and planarized by chemical mechanical polishing until the barrier layer 218 is fully removed, resulting in a smooth surface.
  • the barrier layer 218 can protect the first waveguide 220 from being damaged during the planarization process, and can act as a stop layer for the planarization process, ie, the barrier layer 218 can be completely removed. Stop the planarization process.
  • the smoothness of the upper surface of the first dielectric layer 223 can be ensured, and the first waveguide 220 can be protected from being damaged during the planarization process.
  • the first dielectric layer 223 may be formed of a material selected from the group consisting of oxides, oxynitrides, and polymers.
  • the first dielectric layer 223 may be formed of photo-epoxy.
  • the first dielectric layer may be formed of silicon dioxide.
  • a second dielectric layer 224 is formed on the first dielectric layer 223 and the first waveguide 220, as shown in FIG. 2E.
  • the second dielectric layer 224 may be formed on the first dielectric layer 223 and the first waveguide 220 by deposition.
  • the second dielectric layer 224 may be formed of a material selected from the group consisting of oxides, thermal oxides, and nitrides.
  • the material of the second dielectric layer 224 may be silicon dioxide.
  • other materials for forming the second dielectric layer are also possible, which are not limited herein.
  • the second dielectric layer 224 may, for example, serve as a spacer layer between the first waveguide 220 and a second waveguide (described later).
  • the thickness of the second dielectric layer may be determined based on at least the material of the first waveguide, the material of the second waveguide, the material of the second dielectric layer, and the expected coupling efficiency. For example, in order to achieve the coupling efficiency required for evanescent field coupling between the first waveguide and the second waveguide, after selecting the material of the second dielectric layer and the materials and structures of the first waveguide and the second waveguide, the Finite Difference Time Domain (FDTD) method calculates the thickness of the second dielectric layer that satisfies the desired coupling efficiency (eg, optimal coupling efficiency).
  • FDTD Finite Difference Time Domain
  • the second dielectric layer 224 is formed on the first dielectric layer 223 and the first waveguide 220 . That is, the first dielectric layer 223 and the second dielectric layer 224 are formed separately. Compared with the case where one dielectric layer is integrally formed by the same material to cover the first waveguide, forming two dielectric layers separately helps to obtain a thickness of the second dielectric layer 224 within a desired range to meet the expected design requirements , to improve the coupling efficiency. In addition, since the material for forming the first dielectric layer and the material for forming the second dielectric layer can be selected separately, a flexible design can be realized, which helps to meet the requirements of different applications.
  • a second waveguide 228 is formed on the second dielectric layer 224, as shown in Figure 2G.
  • forming the second waveguide 228 on the second dielectric layer 224 includes: forming a second waveguide material layer 226 on the second dielectric layer 224; and patterning the second waveguide material layer 226 to A second waveguide 228 is formed, as shown in Figures 2F and 2G.
  • the second waveguide 228 may be formed of silicon nitride or silicon oxynitride.
  • the second waveguide formed of silicon nitride or silicon oxynitride can be compatible with existing semiconductor processes, such as CMOS processes.
  • the second waveguide formed of silicon nitride or silicon oxynitride has lower requirements on the precision of the photolithography machine, thus further reducing the process cost.
  • the second waveguide material layer 226 may be formed on the second dielectric layer 224 by LPCVD (Low Pressure Chemical Vapor Deposition) or PECVD (Plasma Enhanced Chemical Vapor Deposition).
  • LPCVD Low Pressure Chemical Vapor Deposition
  • PECVD Pasma Enhanced Chemical Vapor Deposition
  • a photoresist pattern for the second waveguide 228 is formed through the steps of sling, exposure, development, baking, and the like.
  • the second waveguide material layer 226 is etched to pattern the second waveguide material layer 226 to form the second waveguide 228 .
  • degumming and cleaning followsed by degumming and cleaning.
  • the above-described manner of forming the second waveguide is merely exemplary, and the present disclosure is not limited thereto. Any suitable process capable of forming the second waveguide 228 may be selected depending on the specific application and/or requirements.
  • a third dielectric layer 234 is formed overlying the second waveguide 228, as shown in Figure 2H.
  • the third dielectric layer 234 can be used, for example, as an upper cladding layer of the end-face coupler.
  • the third dielectric layer 234 may be formed of a material selected from the group consisting of oxides, thermal oxides, and nitrides.
  • the third dielectric layer 234 may be formed of silicon dioxide material.
  • the material for forming the third dielectric layer 234 may be the same as the material for forming the first dielectric layer 223 .
  • a planarization process such as chemical mechanical polishing may be used to planarize the surface of the third dielectric layer 234 .
  • the third dielectric layer 234 is bonded to the carrier substrate 236 on the side of the third dielectric layer 234 remote from the second waveguide 228, as shown in FIG. 2I.
  • the carrier substrate 236 may be made of any suitable material including, but not limited to, silicon, germanium, glass or ceramic, etc., without limitation.
  • FIG. 2I shows a schematic diagram after bonding the carrier substrate 236 to the upper surface of the third dielectric layer 234 .
  • the carrier substrate 236 may provide support during subsequent removal of the first substrate, thereby avoiding damage to already formed waveguide structures and the like.
  • the first substrate 212 is removed, as shown in Figure 2J.
  • the first substrate 212 may be removed using any suitable technique, including but not limited to grinding, lapping, chemical mechanical polishing (CMP), dry polishing, electrochemical etching, Wet etching (wet etching), plasma assisted chemical etching (PACE), atmospheric pressure plasma etching (atmospheric downstream plasma etching, ADPE) and so on.
  • CMP chemical mechanical polishing
  • dry polishing electrochemical etching
  • wet etching wet etching
  • PACE plasma assisted chemical etching
  • ADPE atmospheric pressure plasma etching
  • the structure shown in FIG. 2I can be flipped over, and then the first substrate 212 can be removed.
  • a fourth dielectric layer 238 is formed on the surface of the insulating layer 214, as shown in FIG. 2K.
  • the fourth dielectric layer 238 is formed of a material selected from the group consisting of oxides, thermal oxides, and nitrides. However, it should be understood that other materials for forming the fourth dielectric layer 238 are also possible, which are not limited herein.
  • the material forming the fourth dielectric layer 238 may be selected to have the same or similar refractive index as the material forming the insulating layer 214 .
  • a planarization process such as chemical mechanical polishing may be used to planarize the surface of the fourth dielectric layer 238 .
  • the fourth dielectric layer 238 can be used, for example, as a lower cladding layer of the end-face coupler.
  • the end-face coupler may include: a first waveguide 220 ; a first dielectric layer 223 adjacent to the first waveguide 220 ; a second dielectric layer 223 on the first waveguide 220 and the first dielectric layer 223 dielectric layer 224; second waveguide 228 on second dielectric layer 224; third dielectric layer 234 covering second waveguide 228; carrier substrate 236 on third dielectric layer 234; first waveguide 220 and first The insulating layer 214 under the dielectric layer 223 ; and the fourth dielectric layer 238 under the insulating layer 214 .
  • 3A-3C are schematic diagrams of example structures of the second waveguide 228 according to example embodiments of the present disclosure.
  • the second waveguide 228 includes a conversion waveguide 232 and a transmission waveguide 230 .
  • the conversion waveguide 232 is used for mode-spot conversion of the light received from the optical fiber 310, and transmits the mode-converted light to the transmission waveguide 230; at least a part of the transmission waveguide 230 is vertically aligned with at least a part of the first waveguide to couple the light propagating in the transmission waveguide 230 into the first waveguide.
  • At least a portion of the switching waveguide 232 is gradually reduced in size in a direction perpendicular to the direction proximate the optical fiber 310 .
  • the conversion waveguide 232 is a linear tapered waveguide, a nonlinear tapered waveguide, or a subwavelength grating.
  • a linear tapered waveguide a nonlinear tapered waveguide
  • a subwavelength grating a subwavelength grating
  • FIG. 3A shows an example in which the converted waveguide 232 is a nonlinear tapered waveguide.
  • the nonlinear tapered waveguide 232 gradually decreases in size in a direction perpendicular to the direction close to the fiber 310 (eg, the Y direction).
  • the upper and lower sides of the nonlinear tapered waveguide 232 may be parabolic-like or hyperbolic.
  • other shapes of nonlinear tapered waveguides are also possible, which are not limited here.
  • Figure 3B shows an example of the conversion waveguide 232 being a linear tapered waveguide.
  • the linear tapered waveguide 232 gradually decreases in size in a direction perpendicular to the direction close to the fiber 310 (eg, the Y direction).
  • Figure 3C shows an example of converting waveguide 232 into a subwavelength grating.
  • the subwavelength grating may include a first grating portion 301 and a second grating portion 302 .
  • the first grating portion 301 may include a plurality of first grating structure units 3011 arranged with a first grating period (also known as a grating constant) ⁇ 1, and the plurality of first grating structure units 3011 are arranged in a direction close to the optical fiber 310 (eg, The size gradually decreases in the X direction) and in the direction perpendicular to the direction close to the fiber 310 (eg, the Y direction).
  • the second grating part 302 may include a plurality of second grating structure units 3021 arranged at a second grating period ⁇ 2 and a tapered unit 3023 connected to the plurality of second grating structure units 3021 .
  • the sizes of the plurality of second grating structure units 3021 are the same, and the tapered units 3023 gradually decrease in size in the direction perpendicular to the direction close to the optical fiber 310 (eg, the Y direction).
  • the tip of the tapered element 3023 faces the fiber.
  • the sub-wavelength grating structure included in the second waveguide can improve the alignment tolerance, reduce the manufacturing difficulty of the end-face coupler, and reduce the size of the end-face coupler, compared with the waveguide of the traditional tapered structure.
  • the equivalent refractive index of the sub-wavelength grating can be adjusted, so that the optical signal transmits along the sub-wavelength grating,
  • the initial large mode field mode spot can be gradually converted into a small mode field mode spot that can be bound by the transmission waveguide 230 , so as to realize the mode conversion of light from the optical fiber 310 to the transmission waveguide 230 .
  • the geometric size of the first grating structural unit closest to the optical fiber 310 among the plurality of first grating structural units 3011 may be determined based on the mode spot diameter of the optical fiber 310 .
  • the first grating structure closest to the optical fiber 310 among the plurality of first grating structure units 3011 may be set based on the diameter of the mode spot of the light output by the optical fiber 310 The geometric size of the unit improves the matching degree of the subwavelength grating with the optical fiber 310 .
  • the method of eigenmode simulation can be used to calculate that the first grating structural unit (ie, the tip of the subwavelength grating 232 ) of the plurality of first grating structural units 3011 closest to the optical fiber 310 achieves the maximum mode spot matching with the optical fiber 310 time parameters, and based on this, the geometric size of the first grating structural unit closest to the optical fiber 310 among the plurality of first grating structural units 3011 is determined.
  • the tip of the sub-wavelength grating is at a certain distance from the end face of the end-face coupler on the same side. This distance is to ensure high optical quality and high optical quality of the tip of the sub-wavelength grating when the deep etching process is used to connect the optical fiber. coupling efficiency.
  • the end face of the first grating structure unit closest to the optical fiber 310 among the plurality of first grating structure units 3011 is square.
  • the end face of the first grating structural unit closest to the optical fiber 310 among the plurality of first grating structural units 3011 is set to be square, so that the sub-wavelength grating can be better matched with the end face of the optical fiber such as a standard single-mode optical fiber, so that the optical fiber in the optical fiber can be better matched.
  • the light achieves low polarization loss transmission.
  • the end face of the first grating structural unit closest to the optical fiber 310 has other shapes (for example, a rectangle), which is not limited here.
  • the duty cycle of the first grating portion 301 may vary in a direction close to the fiber 310 (eg, the X direction).
  • the first grating period (also known as the grating constant) of the first grating portion 301 is ⁇ 1 .
  • the first grating structure unit 3011 is shown as the black part in FIG. 3C .
  • the duty ratio of the first grating portion 301 (the ratio of the first grating structure unit 3011 to the first grating period ⁇ 1 ) changes along the X direction.
  • the duty cycle of the first grating portion 301 may be smaller and smaller as the fiber 310 is approached.
  • the equivalent refractive index of the subwavelength grating can be made higher and higher in the direction away from the optical fiber 310 , thereby helping to convert the mode spot of the large mode field into the mode spot of the small mode field.
  • the variation of the equivalent refractive index of the subwavelength grating may be linear or non-linear.
  • the mode conversion efficiency of subwavelength gratings is related to the mode field size of the fiber, the material and structure of the subwavelength gratings.
  • the structural parameters of the subwavelength grating that meet the coupling efficiency requirements can be calculated by the finite difference time domain (FDTD) method, such as the grating structure. Cell size and corresponding duty cycle.
  • FDTD finite difference time domain
  • the duty cycle of the second grating portion 302 may remain unchanged.
  • the first grating period may be equal to the second grating period.
  • FIG. 3C shows the first grating period as ⁇ 1 and the second grating period as ⁇ 2 .
  • the first grating period ⁇ 1 may be the same as the second grating period ⁇ 2.
  • the first grating period ⁇ 1 may also be different from the second grating period ⁇ 2 .
  • FIG. 4 is a schematic diagram of a partial structure of an end-face coupler according to an exemplary embodiment of the present disclosure.
  • At least a portion of the transmission waveguide 230 of the second waveguide in the end face coupler includes a tapered structure 2301 and at least a portion of the first waveguide 220 includes a tapered structure 2201 .
  • the tapered structure 2301 of the transmission waveguide 230 tapers in a direction away from the fiber, and the tapered structure 2201 of the first waveguide 220 tapers in a direction close to the fiber.
  • FIG. 4 also shows the fourth dielectric layer 238 , the insulating layer 214 , the first dielectric layer 223 , the second dielectric layer 224 , the third dielectric layer 234 , and the carrier substrate 236 of the end-face coupler.
  • the tapered structure 2301 of the transmission waveguide 230 and the tapered structure 2201 of the first waveguide 220 can form a vertical coupling structure that can efficiently couple the optical signal in the transmission waveguide 230 into the first waveguide 220 .
  • the tapered structure of the transmission waveguide and the tapered structure of the first waveguide may be linearly graded tapered structures, hyperbolic tapered structures, or parabolic-like tapered structures.
  • the mode spot of the optical signal transmitted in the transmission waveguide 230 will gradually become larger, so that the mode of the evanescent field can pass through the first waveguide 220.
  • the conical structure 2201 of the coupling occurs.
  • the light coupled into the tapered structure 2201 is gradually converted into a mode that can be bound by the first waveguide 220 due to the change of the width of the tapered structure 2201 , thereby finally realizing efficient optical coupling of the fiber to the first waveguide 220 .
  • the tapered structures 2301 of the transmission waveguide 230 and the tapered structures 2201 of the first waveguide 220 may be aligned on the X-Y plane.
  • the lengths of the two pyramidal structures are the same, and in the Y-direction, the two pyramidal structures are overlapped.
  • an end-face coupler which can be manufactured by the above-described method.
  • the working band of the end-face coupler formed by the manufacturing method according to the exemplary embodiment of the present disclosure may be O-band, S-band, C-band or L-band.
  • the total length of the end face coupler may be determined based on the coupling efficiency between the end face coupler and the optical fiber.
  • the total length of the end-face coupler that satisfies the desired coupling efficiency can be calculated by finite difference time domain (FDTD).
  • the polarization modes of end-face couplers fabricated according to methods of exemplary embodiments of the present disclosure may be configured to support one of the group consisting of: TE mode; TM mode; and both TE and TM modes.
  • the end-face coupler can be applied to various modes, and the applicable range of the coupler can be increased.

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Abstract

本公开提供一种端面耦合器及其制造方法。该方法包括：提供绝缘体上半导体衬底，所述绝缘体上半导体衬底包括第一衬底、第一衬底上的绝缘层以及绝缘层上的半导体层；对半导体层进行图案化以形成第一波导；在绝缘层上形成第一介质层；在第一介质层和第一波导上形成第二介质层；在第二介质层上形成第二波导；形成覆盖第二波导的第三介质层；在第三介质层远离第二波导的一侧，将第三介质层键合至载体衬底；去除第一衬底；以及在绝缘层的表面上形成第四介质层。

Description

端面耦合器及其制造方法 技术领域
本公开涉及半导体技术领域，特别是涉及一种端面耦合器及其制造方法。
背景技术
硅光集成技术被广泛应用于大容量通信、光信号处理、航电系统等重要领域。目前，抑制硅光子芯片广泛应用的关键问题之一是光纤与硅光子芯片的耦合。
在一些情况下，硅光子芯片中的光波导的模斑尺寸与光纤的模斑尺寸相差较大，因模斑失配产生的硅光子-光纤耦合损耗高。因此，一般可以通过耦合器来实现光纤与芯片中光波导之间的耦合问题。
相关技术中的耦合器存在耦合效率低等问题。为了提高耦合效率，有些耦合器的关键部位处于悬空状态，这导致其结构的可靠性不高，在晶圆划片和芯片封装过程中容易折断，使得成本增高、抑制了产量。此外，有些耦合器的结构复杂，需要对于多层材料的生长以及彼此之间的距离进行精准控制，导致对工艺的要求高，成本增大。
发明内容
提供一种缓解、减轻或者甚至消除上述问题中的一个或多个的机制将是有利的。
根据本公开的一些实施例，提供了一种端面耦合器的制造方法，包括：提供绝缘体上半导体衬底，该绝缘体上半导体衬底包括第一衬底、第一衬底上的绝缘层以及绝缘层上的半导体层；对半导体层进行图案化以形成第一波导；在绝缘层上形成第一介质层；在第一介质层和第一波导上形成第二介质层；在第二介质层上形成第二波导；形成覆盖第二波导的第三介质层；在第三介质层远离第二波导的一侧，将第三介质层键合至载体衬底；去除第一衬底；以及在绝缘层的表面上形成第四介质层。
根据本公开的一些实施例，还提供了一种端面耦合器，包括：第一波导；与第一波导邻接的第一介质层；位于第一波导和第一介质层上的第二介质层；位于第二介质层上的第二波导；覆盖第二波导的第三介质层；位于第三介质层上的载体衬底；位于第一波导和第一介质层之下的绝缘层；以及位于绝缘层之下的第四介质层。
根据在下文中所描述的实施例，本公开的这些和其它方面将是清楚明白的，并且将参考在下文中所描述的实施例而被阐明。
附图说明
在下面结合附图对于示例性实施例的描述中，本公开的更多细节、特征和优点被公开，在附图中：
图1是根据本公开示例性实施例的端面耦合器的制造方法的流程图；
图2A至2K是根据本公开示例性实施例的在端面耦合器的制造方法的各个步骤中所形成的端面耦合器的示例结构的剖面示意图；
图3A至3C是根据本公开示例性实施例的第二波导的结构示意图；以及
图4是根据本公开示例性实施例的端面耦合器的部分结构的示意图。
具体实施方式
将理解的是，尽管术语第一、第二、第三等等在本文中可以用来描述各种元件、部件、区、层和/或部分，但是这些元件、部件、区、层和/或部分不应当由这些术语限制。这些术语仅用来将一个元件、部件、区、层或部分与另一个元件、部件、区、层或部分相区分。因此，下面讨论的第一元件、部件、区、层或部分可以被称为第二元件、部件、区、层或部分而不偏离本公开的教导。
诸如“在…下面”、“在…之下”、“较下”、“在…下方”、“在…之上”、“较上”等等之类的空间相对术语在本文中可以为了便于描述而用来描述如图中所图示的一个元件或特征与另一个(些)元件或特征的关系。将理解的是，这些空间相对术语意图涵盖除了图中描绘的取向之外在使用或操作中的器件的不同取向。例如，如果翻转图中的器件，那么被描述为“在其他元件或特征之下”或“在其他元件或特征下面”或“在其他元件或特征下方”的元件将取向为“在其他元件或特征之上”。因此，示例性术语“在…之下”和“在…下方”可以涵盖在…之上和在…之下的取向两者。诸如“在…之前”或“在…前”和“在…之后”或“接着是”之类的术语可以类似地例如用来指示光穿过元件所依的次序。器件可以取向为其他方式(旋转90度或以其他取向)并且相应地解释本文中使用的空间相对描述符。另外，还将理解的是，当层被称为“在两个层之间”时，其可以是在该两个层之间的唯一的层，或者也可以存在一个或多个中间层。
本文中使用的术语仅出于描述特定实施例的目的并且不意图限制本公开。如本文中使用的，单数形式“一个”、“一”和“该”意图也包括复数形式，除非上下文清楚地另有指示。将进一步理解的是，术语“包括”和/或“包含”当在本说明书中使用时指定所述及特征、整体、步骤、操作、元件和/或部件的存在，但不排除一个或多个其他特征、 整体、步骤、操作、元件、部件和/或其群组的存在或添加一个或多个其他特征、整体、步骤、操作、元件、部件和/或其群组。如本文中使用的，术语“和/或”包括相关联的列出项目中的一个或多个的任意和全部组合，并且短语“A和B中的至少一个”是指仅A、仅B、或A和B两者。
将理解的是，当元件或层被称为“在另一个元件或层上”、“连接到另一个元件或层”、“耦合到另一个元件或层”或“邻近另一个元件或层”时，其可以直接在另一个元件或层上、直接连接到另一个元件或层、直接耦合到另一个元件或层或者直接邻近另一个元件或层，或者可以存在中间元件或层。相反，当元件被称为“直接在另一个元件或层上”、“直接连接到另一个元件或层”、“直接耦合到另一个元件或层”、“直接邻近另一个元件或层”时，没有中间元件或层存在。然而，在任何情况下“在…上”或“直接在…上”都不应当被解释为要求一个层完全覆盖下面的层。
本文中参考本公开的理想化实施例的示意性图示(以及中间结构)描述本公开的实施例。正因为如此，应预期例如作为制造技术和/或公差的结果而对于图示形状的变化。因此，本公开的实施例不应当被解释为限于本文中图示的区的特定形状，而应包括例如由于制造导致的形状偏差。因此，图中图示的区本质上是示意性的，并且其形状不意图图示器件的区的实际形状并且不意图限制本公开的范围。
除非另有定义，本文中使用的所有术语(包括技术术语和科学术语)具有与本公开所属领域的普通技术人员所通常理解的相同含义。将进一步理解的是，诸如那些在通常使用的字典中定义的之类的术语应当被解释为具有与其在相关领域和/或本说明书上下文中的含义相一致的含义，并且将不在理想化或过于正式的意义上进行解释，除非本文中明确地如此定义。
如本文使用的，术语“衬底”可以表示经切割的晶圆的衬底，或者可以指示未经切割的晶圆的衬底。类似地，术语芯片和裸片可以互换使用，除非这种互换会引起冲突。应当理解，术语“薄膜”包括层，除非另有说明，否则不应当解释为指示垂直或水平厚度。需要说明的是，图中所示水听器的各材料层的厚度仅仅只是示意，并不代表实际厚度。
可以通过耦合器在光纤和芯片之间来实现光耦合。在实际应用中，可以通过表面耦合器或端面耦合器来实现前述光耦合。例如，表面耦合器采用的方案是基于衍射光栅，其主要利用光栅结构将光以衍射的形式耦合到光波导中。然而传统的光栅耦合器长度多在数百微米，这种长度虽然会使得光栅的泄露因子非常小，但是却限制了光栅耦合器的 带宽。为了改善表面耦合器的缺陷，有时会考虑使用端面耦合器。然而，目前的端面耦合器关键部位常常处于悬空状态，需要通过梁来支撑耦合器的核心部分，因此其结构可靠性不高，在晶圆划片和芯片封装过程中容易折断，使得成本增高、抑制了产量。此外，有些端面耦合器的结构复杂，需要对于多层材料的生长以及彼此之间的距离进行精准控制，导致对工艺的要求高，成本增大。
本公开的实施例提供了一种端面耦合器的制造方法以及端面耦合器。通过根据本公开实施例的方法来制造端面耦合器有助于提高耦合效率、提高可靠性、减小器件尺寸并且降低工艺成本。
图1是根据本公开示例性实施例的端面耦合器的制造方法100的流程图，并且图2A至2K是通过方法100的各个步骤形成的示例结构的示意图。下面参照图1和图2A至2K描述方法100。
在步骤110，提供绝缘体上半导体衬底210。如图2A所示，绝缘体上半导体衬底210包括第一衬底212、第一衬底212上的绝缘层214以及绝缘层214上的半导体层216。
在一些实施例中，绝缘体上半导体衬底210可以是绝缘体上硅(silicon-on-insulator,SOI)衬底。SOI衬底商业上可容易获得，并且对于集成光子器件具有良好的特性。在这样的实施例中，第一衬底212可以由任何适当的材料(例如，硅或锗)制成。绝缘层214可以是氧化物材料、热氧化物材料、氮化物材料等。例如，该绝缘层214可以为二氧化硅。在示例中，绝缘层214可以具有约1μm至5μm的厚度。半导体层216可以被称为半导体器件层，其中形成各种半导体组件。在一些实施例中，半导体层216可以由硅制成，但是本公开不限于此。在示例中，半导体层216可以具有约200nm至250nm的厚度。
在一些实施例中，如图2A所示，除绝缘体上半导体衬底210的结构之外，还示出了附加的可选特征——阻挡层218。该阻挡层218可以在步骤110之后的可选步骤中被形成。例如，根据一些实施例，在提供绝缘体上半导体衬底210之后，可以在半导体层216上形成阻挡层218。根据一些实施例，形成阻挡层218的材料可以为氮化钛或多晶硅。但是应当理解，其他材料的阻挡层218也是可能的。
在步骤120，对半导体层216进行图案化以形成第一波导220，如图2B所示。
在一些示例中，可以通过光刻和刻蚀等工艺对半导体层216进行图案化。例如，在在绝缘体上半导体衬底210为标准的SOI衬底的实施例中，通过例如甩胶、曝光、显影、烘烤等步骤，在绝缘体上半导体衬底210上形成用于第一波导的光刻胶图案。之后，以光刻胶为掩膜，通过刻蚀工艺对半导体层216进行刻蚀，以形成第一波导220。随后，进 行去胶和清洗。刻蚀工艺例如可以为湿法刻蚀或干法刻蚀。取决于在刻蚀液中沿不同晶向的刻蚀速率，湿法刻蚀可以分为各向同性刻蚀和各向异性刻蚀。干法刻蚀采用物理方法(例如，溅射、离子刻蚀)或化学方法(例如，反应离子刻蚀)。
应当理解，以上描述的对半导体层进行图案化以形成第一波导的方式仅仅是示例，但本公开并不限制于此。根据具体的应用和/或需求，可以选择能够使半导体层图案化的任何适当的工艺。
如上所述，根据一些实施例，在提供绝缘体上半导体衬底210之后，可以在半导体层216上形成阻挡层218。即，可以在对半导体层216进行图案化之前，在半导体层216上形成阻挡层218。
图2B示出了所形成的阻挡层218。如图2B所示，在形成了阻挡层218的实施例中，对半导体层216进行图案化以形成第一波导220可以包括：对阻挡层218和半导体层216进行图案化，以形成第一波导220。
根据一些实施例，第一波导220可以由选自以下各项构成的组中的材料形成：硅、氮氧化硅、氮化硅、铌酸锂、聚合物和磷化铟(InP)。由上述材料形成的第一波导能够与已有的半导体工艺、比如CMOS工艺相兼容，有助于降低工艺成本。
在步骤130，在绝缘层214上形成第一介质层223，如图2C所示。
如上所述，根据一些实施例，可以在对半导体层216进行图案化之前，在半导体层216上形成阻挡层218。在形成了阻挡层218的实施例中，如图2C和2D所示，在绝缘层214上形成第一介质层223，包括：形成覆盖阻挡层218和绝缘层214的第一介质材料层222；以及对第一介质材料层222进行平坦化，直到阻挡层218被全部去除，从而形成第一介质层223。第一介质层223的远离第一衬底212的表面与第一波导220的远离第一衬底212的表面基本上齐平。图2D示出了形成覆盖阻挡层218和绝缘层214的第一介质材料层222后的示意图。应当理解，虽然图2D中示出的第一介质材料层222表面为平整界面，但是可以理解，在实际的制造过程中，由于其制造工艺的影响，其表面可能并非为平整的。因此，有可能需要对第一介质材料层222进行平坦化以获得基本上光滑平整的表面。
第一介质层223的远离第一衬底212的表面与第一波导220的远离第一衬底212的表面基本上齐平。例如，参考图2D所示的取向，即，第一介质层223的上表面与第一波导220的上表面基本上齐平。
在本公开中，术语“基本上齐平”涵盖“齐平”和由于制造工艺引起的误差而所致的相对于“齐平”的偏离。应当理解，考虑到受其制造工艺的影响，第一介质层和第一波导的表面在其精度允许范围内的上下浮动都是可能的，但其基本上均为光滑的平面。
根据一些实施例，可以通过沉积来形成第一介质材料层222，并且通过化学机械抛光对第一介质材料层222进行平坦化，直到阻挡层218被全部去除，从而得到光滑的表面。
在上述包含阻挡层218的实施例中，阻挡层218可以保护第一波导220在平坦化工艺中不被损坏，并且能够充当平坦化工艺的停止层，即，阻挡层218被全部去除后即可停止平坦化工艺。由此，能够确保第一介质层223的上表面的光滑度，并且能够保护第一波导220在平坦化工艺中不被损坏。
根据一些实施例，第一介质层223可以由选自以下各项构成的组中的材料形成：氧化物、氮氧化物和聚合物。例如，第一介质层223可以由光环氧树脂形成。根据另一示例，第一介质层可由二氧化硅形成。
在步骤140，在第一介质层223和第一波导220上形成第二介质层224，如图2E所示。
在一些示例中，可以通过沉积在第一介质层223和第一波导220上形成第二介质层224。
根据一些实施例，第二介质层224可以由选自以下各项构成的组中的材料形成：氧化物、热氧化物和氮化物。例如，第二介质层224的材料可以为二氧化硅。但是应当理解，形成第二介质层的其它材料也是可能的，在此不作限制。
第二介质层224例如可以用作第一波导220与第二波导(稍后描述)之间的间隔层。根据一些实施例，第二介质层的厚度可以至少基于第一波导的材料、第二波导的材料、第二介质层的材料和预期的耦合效率来确定。例如，为了实现第一波导与第二波导之间进行倏逝场耦合所需的耦合效率，可以在选定了第二介质层的材料以及第一波导与第二波导的材料与结构之后，通过时域有限差分法(FDTD)计算出满足所需的耦合效率(例如，最佳耦合效率)时的第二介质层的厚度。
如上所述，在形成第一介质层223之后，在第一介质层223和第一波导220上形成第二介质层224。即，第一介质层223和第二介质层224是分别形成的。与其中通过同一材料一体地形成一个介质层以覆盖第一波导的情况相比，分别形成两层介质层有助于得到处于理想范围内的第二介质层224的厚度，从而满足预期的设计要求，提高耦合效率。 此外，由于可以分别选择形成第一介质层的材料以及形成第二介质层的材料，能够实现灵活的设计，这有助于满足不同应用的需求。
在步骤150，在第二介质层224上形成第二波导228，如图2G所示。
根据一些实施例，在第二介质层224上形成第二波导228，包括：在第二介质层224上形成第二波导材料层226；以及对所述第二波导材料层226进行图案化，以形成第二波导228，如图2F和2G所示。
根据一些实施例，第二波导228可以由氮化硅或氮氧化硅形成。由氮化硅或氮氧化硅形成的第二波导能够与已有的半导体工艺、比如CMOS工艺兼容。此外，由氮化硅或氮氧化硅形成的第二波导对光刻机的精度要求有所降低，因此，能够进一步降低工艺成本。
根据一些示例，可以通过LPCVD(低压化学气相沉积)或者PECVD(等离子体增强化学气相沉积)在第二介质层224上形成第二波导材料层226。之后，在所形成的第二波导材料层226上，通过甩胶、曝光、显影、烘烤等步骤形成用于第二波导228的光刻胶图案。随后，以光刻胶为掩膜，对第二波导材料层226进行刻蚀从而使第二波导材料层226图案化，以形成第二波导228。随后进行去胶、清洗。
应当理解，以上描述的形成第二波导的方式仅仅是示例性的，但本公开并不限制于此。根据具体的应用和/或需求，可以选择能够形成第二波导228的任何适当的工艺。
在步骤160，形成覆盖第二波导228的第三介质层234，如图2H所示。
第三介质层234例如可以用作端面耦合器的上包覆层。根据一些实施例，第三介质层234可以由选自以下各项构成的组中的材料形成：氧化物、热氧化物和氮化物。例如，第三介质层234可以采用二氧化硅材料形成。
根据一些示例性实施例，形成第三介质层234的材料可以与形成第一介质层223的材料相同。可选地，在形成第三介质层234之后，可以利用比如化学机械抛光的平坦化工艺，使第三介质层234的表面平坦化。
在步骤170，在第三介质层234远离第二波导228的一侧，将第三介质层234键合至载体衬底236，如图2I所示。
在一些示例中，载体衬底236可以由任何适当的材料制成，包括但不限于硅、锗、玻璃或陶瓷等，在此不作限制。
图2I示出了将载体衬底236与第三介质层234的上表面进行键合后的示意图。如稍后所描述的，载体衬底236可以在后续去除第一衬底的过程中提供支撑，从而避免对已经形成的波导结构等造成损害。
在步骤180，去除第一衬底212，如图2J所示。
在一些示例中，可以使用任何合适的技术去除第一衬底212，包括但不限于磨削、研磨、化学机械抛光(CMP)、干式抛光(dry polishing)、电化学腐蚀(electrochemical etching)、湿法腐蚀(wet etching)、等离子辅助化学腐蚀(PACE)、常压等离子腐蚀(atmospheric downstream plasma etching，ADPE)等。通过去除第一衬底212，可以得到更小尺寸的端面耦合器，并且有助于改善电气性能和散热性能。
在一些实施例中，可以将图2I所示的结构进行翻转，然后去除第一衬底212。
在步骤190，在绝缘层214的表面上形成第四介质层238，如图2K所示。
根据一些实施例，第四介质层238由选自以下各项构成的组中的材料形成：氧化物、热氧化物和氮化物。但是应当理解，形成第四介质层238的其它材料也是可能的，在此不作限制。
根据一些实施例，形成第四介质层238的材料可以选择为与形成绝缘层214的材料的折射率相同或相近。可选地，在形成第四介质层238之后，可以利用比如化学机械抛光的平坦化工艺，使第四介质层238的表面平坦化。第四介质层238例如可以用作端面耦合器的下包覆层。
已经描述了端面耦合器的制造方法的实施例，结果得到的端面耦合器的结构将是清楚明白的。在下文中，为了完备性起见，结合图2K来描述端面耦合器的示例性实施例。端面耦合器实施例能够提供与方法实施例相同或相应的优点，关于这些优点的详细描述为了简洁性起见被省略。
根据一些实施例，如图2K所示，端面耦合器可以包括：第一波导220；与第一波导220邻接的第一介质层223；位于第一波导220和第一介质层223上的第二介质层224；位于第二介质层224上的第二波导228；覆盖第二波导228的第三介质层234；位于第三介质层234上的载体衬底236；位于第一波导220和第一介质层223之下的绝缘层214；以及位于绝缘层214之下的第四介质层238。
下面将结合图3，对根据本公开示例性实施例的第二波导228的示意性结构进行说明。图3A-3C是根据本公开示例性实施例的第二波导228的示例结构的示意图。
如图3A-3C所示，根据一些实施例，第二波导228包括转换波导232和传输波导230。转换波导232用于将从光纤310接收的光进行模斑转换，并且将经模斑转换的光传输至传输波导230；传输波导230的至少一部分在竖直方向上与第一波导的至少一部分对准，从而将在传输波导230中传输的光耦合至第一波导中。
根据一些实施例，转换波导232的至少一部分在与靠近光纤310的方向垂直的方向上尺寸逐渐减小。
根据一些实施例，转换波导232为线性锥形波导、非线性锥形波导或亚波长光栅。但是应当理解，其它结构的转换波导也是可能的，在此不作限制。
图3A示出了转换波导232为非线性锥形波导的示例。非线性锥形波导232在与靠近光纤310的方向垂直的方向(例如Y方向)上尺寸逐渐减小。示例地，非线性锥形波导232上下两条边可以为类抛物线或双曲线形状。但是应当理解，其他形状的非线性锥形波导也是可能的，在此不作限制。
图3B示出了转换波导232为线性锥形波导的示例。线性锥形波导232在与靠近光纤310的方向垂直的方向(例如Y方向)上尺寸逐渐减小。
图3C示出了转换波导232为亚波长光栅的示例。亚波长光栅可以包括第一光栅部分301和第二光栅部分302。第一光栅部分301可以包括以第一光栅周期(又称，光栅常数)Λ 1排布的多个第一光栅结构单元3011，多个第一光栅结构单元3011在靠近光纤310的方向(例如，X方向)上以及与靠近光纤310的方向垂直的方向(例如Y方向)上尺寸逐渐减小。第二光栅部分302可以包括以第二光栅周期Λ 2排布的多个第二光栅结构单元3021以及连接至多个第二光栅结构单元3021的锥形单元3023。多个第二光栅结构单元3021的尺寸相同，并且锥形单元3023在与靠近光纤310的方向垂直的方向(例如，Y方向)上尺寸逐渐减小。例如，锥形单元3023的尖端朝向光纤。
根据本公开的实施例，第二波导所包括的亚波长光栅结构与传统锥形结构的波导相比，能够提高对准容差，并且降低端面耦合器的制造难度以及减小端面耦合器的尺寸。
通过改变光栅结构单元的尺寸和相应的占空比(光栅结构单元与光栅周期的比例)，能够调整亚波长光栅的等效折射率，从而使光信号在沿着亚波长光栅传输的过程中，能够由初始的大模场模斑逐渐转换为能够由传输波导230束缚的小模场模斑，从而实现光从光纤310至传输波导230的模斑转换。
在一些实施例中，如图3C所示，多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元的几何尺寸可以基于光纤310的模斑直径来确定。
为了更好地实现亚波长光栅与光纤310之间的模斑匹配，可以基于光纤310输出的光的模斑的直径来设置多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元的几何尺寸，从而提升亚波长光栅与光纤310的匹配度。例如，可以通过本征模模拟的方法，计算出多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元(即，亚波长光栅232的尖端)与光纤310实现最大模斑匹配时的参数，并基于此确定多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元的几何尺寸。
在一些实施例中，亚波长光栅的尖端距离其同侧的端面耦合器端面有一定的距离，这个距离是为了保证在深刻蚀工艺以连接光纤时，亚波长光栅的尖端的高光学质量和高的耦合效率。
在一些实施例中，多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元的端面为正方形。将多个第一光栅结构单元3011中最靠近光纤310的第一光栅结构单元的端面设置为正方形，能够使亚波长光栅与例如标准单模光纤的光纤的端面实现更好地匹配，从而光纤中的光实现低偏振损耗传输。
但是可以理解，最靠近光纤310的第一光栅结构单元的端面为其他形状(例如长方形)也是可能的，在此不作限制。
在一些实施例中，第一光栅部分301的占空比可以在靠近光纤310的方向(例如X方向)上发生变化。
例如，如图3C所示，假设第一光栅部分301的第一光栅周期(又称，光栅常数)为Λ 1。第一光栅结构单元3011如图3C中的黑色部分所示。第一光栅部分301的占空比(第一光栅结构单元3011与第一光栅周期Λ 1的比例)沿着X方向发生了变化。示例性地，随着逐渐靠近光纤310，第一光栅部分301的占空比可以越来越小。通过这样的设置，能够使亚波长光栅的等效折射率在远离光纤310的方向上越来越高，从而有助于将大模场模斑转换为小模场模斑。示例性地，亚波长光栅的等效折射率的变化可以是线性变化的或者是非线性变化的。
亚波长光栅的模斑转换效率与光纤的模场大小、亚波长光栅的材料以及结构相关。可以在选定光纤规格和亚波长光栅的材料后，通过时域有限差分法(FDTD)计算出满足耦合效率需求(例如，满足最佳耦合效率)时的亚波长光栅的结构参数，比如光栅结构单元的尺寸和相应的占空比。
在一些实施例中，第二光栅部分302的占空比可以保持不变。
在一些实施例中，第一光栅周期可以等于第二光栅周期。例如，图3C中将第一光栅周期示出为Λ 1，将第二光栅周期示出为Λ 2。第一光栅周期Λ 1可以与第二光栅周期Λ 2相同。在另一些实施例中，第一光栅周期Λ 1也可以与第二光栅周期Λ 2不相同。通过灵活设置第一光栅周期与第二光栅周期之间的关系，可以实现对传输光的模斑的灵活控制。
光纤中的光经过亚波长光栅的传播进入传输波导，并经过传输波导的至少一部分进入第一波导。以下将结合图4说明光在传输波导和第一波导之间的传输过程。图4是根据本公开示例性实施例的端面耦合器的部分结构的示意图。
在一些实施例中，如图4所示，端面耦合器中第二波导的传输波导230的至少一部分包括锥形结构2301，并且第一波导220的至少一部分包括锥形结构2201。传输波导230的锥形结构2301在远离光纤的方向上渐缩，并且第一波导220的锥形结构2201在靠近光纤的方向上渐缩。图4还示出了端面耦合器的第四介质层238、绝缘层214、第一介质层223、第二介质层224、第三介质层234以及载体衬底236。
传输波导230的锥形结构2301和第一波导220的锥形结构2201能够构成垂直耦合结构，该垂直耦合结构可以将传输波导230中的光信号高效地耦合进第一波导220中。
在一些实施例中，传输波导的锥形结构和第一波导的锥形结构可以为线性渐变的锥形结构、双曲线锥形结构或类抛物线锥形结构。
如图4所示，通过逐渐减小传输波导230的锥形结构2301的宽度，传输波导230中所传输的光信号模斑会逐渐变大，从而能够通过倏逝场的模式与第一波导220的锥形结构2201发生耦合。耦合进入锥形结构2201中的光由于锥形结构2201的宽度的变化而逐渐转换为能够被第一波导220束缚的模式，从而最终实现光纤至第一波导220的高效光耦合。
示例性地，如图4的下半部分所示，传输波导230的锥形结构2301和第一波导220的锥形结构2201可以在X-Y平面上对齐。例如，在X方向上，两个锥形结构的长度相同，在Y方向上，两个锥形结构重叠设置。
根据本公开的示例性实施例，还提供了一种端面耦合器，该端面耦合器可以通过上述方法制造。
在一些实施例中，通过根据本公开示例性实施例的制造方法所形成的端面耦合器的工作波段可以为O波段、S波段、C波段或L波段。
在一些实施例中，端面耦合器的总长度可以基于端面耦合器与光纤之间的耦合效率来确定。例如，可以通过时域有限差分法(FDTD)，计算出满足所需耦合效率(例如，最大耦合效率)时的端面耦合器的总长度。
根据本公开示例性实施例的方法制造的端面耦合器的偏振模式可以配置为支持以下各项构成的组中的一种：TE模；TM模；以及TE模与TM模两者。由此，能够使得端面耦合器适用于多种模式，增大耦合器的适用范围。
虽然在附图和和前面的描述中已经详细地说明和描述了本公开，但是这样的说明和描述应当被认为是说明性的和示意性的，而非限制性的；本公开不限于所公开的实施例。通过研究附图、公开内容和所附的权利要求书，本领域技术人员在实践所要求保护的主题时，能够理解和实现对于所公开的实施例的变型。在权利要求书中，词语“包括”不排除未列出的其他元件或步骤，不定冠词“一”或“一个”不排除多个，并且术语“多个”是指两个或两个以上。在相互不同的从属权利要求中记载了某些措施的仅有事实并不表明这些措施的组合不能用来获益。

Claims (20)

  1. 一种端面耦合器的制造方法，包括：
    提供绝缘体上半导体衬底，所述绝缘体上半导体衬底包括第一衬底、所述第一衬底上的绝缘层以及所述绝缘层上的半导体层；
    对所述半导体层进行图案化以形成第一波导；
    在所述绝缘层上形成第一介质层；
    在所述第一介质层和所述第一波导上形成第二介质层；
    在所述第二介质层上形成第二波导；
    形成覆盖所述第二波导的第三介质层；
    在所述第三介质层远离所述第二波导的一侧，将所述第三介质层键合至载体衬底；
    去除所述第一衬底；以及
    在所述绝缘层的表面上形成第四介质层。
  2. 如权利要求1所述的方法，还包括：在对所述半导体层进行图案化之前，在所述半导体层上形成阻挡层，
    其中，对所述半导体层进行图案化以形成第一波导，包括：
    对所述阻挡层和所述半导体层进行图案化，以形成所述第一波导。
  3. 如权利要求2所述的方法，其中，在所述绝缘层上形成第一介质层，包括：
    形成覆盖所述阻挡层和所述绝缘层的第一介质材料层；以及
    对所述第一介质材料层进行平坦化，直到所述阻挡层被全部去除，从而形成所述第一介质层，
    其中，所述第一介质层的远离所述第一衬底的表面与所述第一波导的远离所述第一衬底的表面基本上齐平。
  4. 如权利要求1所述的方法，其中，在所述第二介质层上形成第二波导，包括：
    在所述第二介质层上形成第二波导材料层；以及
    对所述第二波导材料层进行图案化，以形成所述第二波导。
  5. 如权利要求1所述的方法，其中，所述第一波导由选自以下各项构成的组中的材料形成：硅、氮氧化硅、氮化硅、铌酸锂、聚合物和磷化铟。
  6. 如权利要求1所述的方法，其中，所述第二波导由氮化硅或氮氧化硅形成。
  7. 如权利要求1所述的方法，其中，所述第一介质层由选自以下各项构成的组中的材料形成：氧化物、氮氧化物和聚合物。
  8. 如权利要求1所述的方法，其中，所述第二介质层、所述第三介质层和所述第四介质层由选自以下各项构成的组中的材料形成：氧化物、热氧化物和氮化物。
  9. 一种端面耦合器，包括：
    第一波导；
    与所述第一波导邻接的第一介质层；
    位于所述第一波导和所述第一介质层上的第二介质层；
    位于所述第二介质层上的第二波导；
    覆盖所述第二波导的第三介质层；
    位于所述第三介质层上的载体衬底；
    位于所述第一波导和所述第一介质层之下的绝缘层；以及
    位于所述绝缘层之下的第四介质层。
  10. 如权利要求9所述的端面耦合器，其中，所述第二波导包括转换波导和传输波导，其中，
    所述转换波导用于将从光纤接收的光进行模斑转换，并且将经模斑转换的光传输至所述传输波导；以及
    所述传输波导的至少一部分在竖直方向上与所述第一波导的至少一部分对准，从而将在所述传输波导中传输的光耦合至所述第一波导中。
  11. 如权利要求10所述的端面耦合器，其中，
    所述转换波导的至少一部分在与靠近所述光纤的方向垂直的方向上尺寸逐渐减小。
  12. 如权利要求11所述的端面耦合器，其中，所述转换波导为线性锥形波导、非线性锥形波导或亚波长光栅。
  13. 如权利要求12所述的端面耦合器，其中，所述转换波导为亚波长光栅，并且
    其中，所述亚波长光栅包括第一光栅部分和第二光栅部分，
    其中，所述第一光栅部分包括以第一光栅周期排布的多个第一光栅结构单元，所述多个第一光栅结构单元在靠近所述光纤的方向上以及与所述靠近所述光纤的方向垂直的方向上尺寸逐渐减小，并且
    其中，所述第二光栅部分包括以第二光栅周期排布的多个第二光栅结构单元以及连接至所述多个第二光栅结构单元的锥形单元，所述多个第二光栅结构单元的尺寸相同，并且所述锥形单元在靠近所述光纤的方向上渐缩。
  14. 如权利要求13所述的端面耦合器，其中，
    所述多个第一光栅结构单元中最靠近所述光纤的第一光栅结构单元的几何尺寸基于所述光纤的模斑直径来确定。
  15. 根据权利要求13所述的端面耦合器，其中，
    所述多个第一光栅结构单元中最靠近所述光纤的第一光栅结构单元的端面为正方形。
  16. 根据权利要求13所述的端面耦合器，其中，
    所述第一光栅部分的占空比在靠近所述光纤的方向上发生变化。
  17. 根据权利要求13所述的端面耦合器，其中，
    所述第二光栅部分的占空比保持不变。
  18. 根据权利要求13所述的端面耦合器，其中，
    所述第一光栅周期等于所述第二光栅周期。
  19. 如权利要求10所述的端面耦合器，其中，
    所述传输波导的所述至少一部分包括锥形结构，并且所述第一波导的所述至少一部分包括锥形结构，并且
    其中，所述传输波导的所述锥形结构在远离所述光纤的方向上渐缩，并且所述第一波导的所述锥形结构在靠近所述光纤的方向上渐缩。
  20. 如权利要求19所述的端面耦合器，其中，
    所述传输波导的锥形结构和所述第一波导的锥形结构为线性渐变的锥形结构、双曲线锥形结构或类抛物线锥形结构。
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