WO2022134952A1 - 一种通信方法、装置和电子设备 - Google Patents

一种通信方法、装置和电子设备 Download PDF

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Publication number
WO2022134952A1
WO2022134952A1 PCT/CN2021/131189 CN2021131189W WO2022134952A1 WO 2022134952 A1 WO2022134952 A1 WO 2022134952A1 CN 2021131189 W CN2021131189 W CN 2021131189W WO 2022134952 A1 WO2022134952 A1 WO 2022134952A1
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Prior art keywords
ssb
wake
system information
information block
reception
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PCT/CN2021/131189
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English (en)
French (fr)
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徐勋华
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展讯通信（上海）有限公司
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Publication of WO2022134952A1 publication Critical patent/WO2022134952A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0212—Power saving arrangements in terminal devices managed by the network, e.g. network or access point is master and terminal is slave
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
    • H04W52/0248—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal dependent on the time of the day, e.g. according to expected transmission activity
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a communication method, apparatus and electronic device.
  • the primary and secondary synchronization signal (Synchronization Signal, SS) of the cell is coupled with the physical broadcast channel (Physical Broadcast Channel, PBCH), which appears in the form of SS/PBCH resource blocks, abbreviated as SSB.
  • PBCH Physical Broadcast Channel
  • SSB Physical Broadcast Channel
  • NR New Radio
  • PDCCH Physical Downlink Control Channel
  • SIB System Information Block
  • the monitored time slots (slots) are different. Different base stations also have different beam directions when transmitting data.
  • the PDCCH CORESET monitored by each Search space is a set of physical resources (that is, a specific area on the NR downlink resource grid) and a set of parameters for carrying PDCCH/DCI) is also quasi-co-located with the corresponding SSB. (Quasi-Colocation, QCL) corresponds. Therefore, when receiving SIBs, in order to obtain the best reception performance, it is necessary to receive on the strongest SSB monitoring slot.
  • a device when a device is in an idle state, it usually enters a sleep state due to power consumption considerations.
  • the state of the SSB may change, which may cause the reception of the SIB to fail.
  • the present application provides a communication method, apparatus and electronic device, and the present application also provides a computer-readable storage medium.
  • the present application provides a communication method, including:
  • the search space 0 position is calculated according to the most recent strongest SSB before this dormancy, so as to receive the first system information block after this wake-up;
  • the SSB is completely received and measured to confirm the strongest first SSB
  • the 0 position of the search space is calculated according to the first SSB, so as to receive the second system information block after this wake-up.
  • the method further includes:
  • the subsequent system information block reception after the current wake-up is performed according to the most recent strongest SSB before the current sleep.
  • the method further includes:
  • the subsequent system information block reception after the wake-up this time is performed according to the first SSB.
  • the method further includes:
  • the 0 position of the search space is calculated according to the latest confirmed strongest SSB, so as to receive the system information block after the wake-up this time.
  • the method further includes:
  • the current device When the decoding of the system information block received for the first time after the wake-up this time fails, in the current data communication cycle, the current device is prohibited from entering a sleep state.
  • the method further includes:
  • frequency offset and time offset tracking is performed on the SSB.
  • the method further includes:
  • the 0 position of the search space is calculated according to the second SSB, so as to receive the first system information block after waking up again.
  • the present application also provides a communication device, including a receiving module and an SSB measurement module, wherein:
  • the receiving module is used to calculate the search space 0 position according to the most recent strongest SSB before the current sleep after the current device wakes up from the dormant state, so as to receive the first system information block after this wake-up;
  • the SSB measurement module is configured to completely receive and measure the SSB to confirm the strongest first SSB when the decoding of the first system information block reception after the wake-up this time fails;
  • the receiving module is further configured to calculate the 0 position of the search space according to the first SSB, so as to receive the second system information block after this wake-up.
  • the present application provides an electronic device comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein when the computer program instructions are executed by the processor, The electronic device is triggered to execute the method steps described in the embodiments of the present application.
  • the present application provides an electronic chip, which is used for receiving and decoding wireless signals, and the electronic chip includes:
  • a processor for executing computer program instructions stored in a memory wherein when the computer program instructions are executed by the processor, the electronic chip is triggered according to the method according to any one of claims 1 to 8
  • the step receives and decodes the wireless signal to obtain the system information block.
  • the present application provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer-readable storage medium runs on a computer, causes the computer to execute the method of the embodiments of the present application.
  • the SSB is fully received and measured to confirm the strongest SSB, so as to improve the reception performance as much as possible, so that in the case of a weak channel, Greatly improve the success rate of SIB reception.
  • the success rate of SIB reception can be greatly improved.
  • FIG. 1 is a flowchart of a method according to an embodiment of the present application
  • FIG. 2 is a structural diagram of a device according to an embodiment of the present application.
  • the device in the sleep state, in order to save power, the device will only receive a part of the SSB, so that the device cannot track and calculate the frequency offset, time offset, and automatic gain control (Automatic Gain Control, AGC). In this way, the device cannot perceive the frequency offset and time offset changes of the SSB before and after the device sleeps, and the device will not adjust the AGC accordingly. Therefore, when the device directly uses the strongest SSB before the sleep state, the problem of SIB reception failure occurs due to ignoring the SSB change.
  • AGC Automatic Gain Control
  • an embodiment of the present application proposes a communication method.
  • the device wakes up from the dormant state, firstly the strongest SSB confirmed last time before entering the dormant state is used for the first SIB reception. If the reception is successful, it means that during the device dormancy process, the most The strong SSB has not changed, so the subsequent SIB reception can use the strongest SSB. If the reception fails, the SSB is fully received and measured to confirm the strongest SSB; the search space 0 position is calculated according to the confirmed strongest SSB to perform the second SIB reception after wake-up.
  • FIG. 1 is a flowchart of a method according to an embodiment of the present application. Assuming that the strongest SSB confirmed by device A last time before entering the dormant state is SSB0, when device A wakes up from the dormant state, it performs the following steps as shown in Figure 1 to receive the SIB:
  • Step 110 after the current device wakes up from the dormant state, calculate the search space 0 position according to SSB0, so as to perform the first SIB reception after this wake-up;
  • Step 120 confirming whether the decoding of the first SIB reception after this wake-up is successful
  • Step 130 when the decoding of the first SIB reception after this wake-up is successful, perform subsequent SIB reception after this wake-up according to SSB0;
  • Step 140 when the decoding of the first SIB reception after this wake-up fails, complete reception and measurement of the SSB to confirm the strongest SSBSSB1;
  • Step 150 Calculate the 0 position of the search space according to SSB1, so as to perform the second SIB reception after this wake-up.
  • the SSB is fully received and measured to confirm the strongest SSB, so as to improve the reception performance as much as possible, so that in the case of a weak channel, Greatly improve the success rate of SIB reception.
  • the success rate of SIB reception can be greatly improved.
  • step 150 when the decoding of the second SIB reception after this wake-up is successful, it means that SSB1 is available. Therefore, after step 150, SSB1 can be used for subsequent SIB reception after this wake-up, so that it is unnecessary to perform complete SSB reception and measurement again to confirm the strongest SSB, which greatly reduces system consumption.
  • the 0 position of the search space is calculated according to the latest confirmed strongest SSB for SIB reception after this wake-up.
  • step 120 when it is confirmed in step 120 that the decoding of the first SIB reception after this wake-up fails, it means that there is a frequency offset and a time offset in the sleep state. Therefore, in an embodiment of the present application, in order to improve the success rate of SIB reception, after the decoding of the first system information block reception after this wake-up fails, the frequency offset and time offset tracking of the SSB is performed.
  • the device may also enter the sleep state when the communication cycle is not completed.
  • the time offset and frequency offset caused by the sleep may affect the communication cycle Data reception has an impact.
  • the decoding of the first SIB reception after the wake-up this time fails, it means that entering the sleep state will affect the reception of the SIB. Therefore, , in the current data communication cycle, the current device is prohibited from entering the sleep state. In this way, the time offset and frequency offset can be effectively avoided from entering dormancy, thereby effectively improving the success rate of SIB reception.
  • step 120 when it is confirmed that the decoding of the first SIB reception after this wake-up is successful, it means that entering the dormant state will not have an impact on the reception of the SIB. Therefore, the current device is allowed to communicate in the current data. enter the sleep state during the cycle. In this way, the power consumption can be effectively reduced without reducing the success rate of SIB reception.
  • step 120 when it is confirmed in step 120 that the decoding of the first SIB reception after this wake-up fails, it means that entering the dormant state will have an impact on the reception of the SIB. Therefore, After the current device enters the sleep state again and is woken up again, it does not need to use the most recent strongest SSB (for example, SSB1) before the sleep state for SIB reception (so it has been judged that entering the sleep state will affect the reception of SIBs, and the use of sleep state).
  • the most recent strongest SSB has a high probability of failure to receive SIB), but directly perform complete reception and measurement on the SSB to confirm the strongest SSB2; calculate the 0 position of the search space according to SSB2 for re-wake-up. First SIB reception. In this way, not only power consumption is reduced (no need to use SSB1 to try), but also the success rate of SIB reception is effectively improved.
  • PLD Programmable Logic Device
  • FPGA Field Programmable Gate Array
  • HDL Hardware Description Language
  • ABEL Advanced Boolean Expression Language
  • AHDL Altera Hardware Description Language
  • HDCal JHDL
  • Lava Lava
  • Lola MyHDL
  • PALASM RHDL
  • VHDL Very-High-Speed Integrated Circuit Hardware Description Language
  • Verilog Verilog
  • FIG. 2 is a structural diagram of an apparatus according to an embodiment of the present application.
  • the communication apparatus 200 includes:
  • the receiving module 210 is used to calculate the search space 0 position according to the most recent strongest SSB before the current sleep after the current device wakes up from the sleep state, so as to receive the first system information block after the wake-up. ;
  • the SSB measurement module 220 is configured to receive and measure the SSB completely to confirm the strongest first SSB when the decoding of the first system information block reception after this wake-up fails.
  • the receiving module 210 is further configured to calculate the 0 position of the search space according to the first SSB, so as to receive the second system information block after this wake-up.
  • the receiving module 210 is further configured to, when the decoding of the system information block received for the first time after the wake-up is successful, perform the follow-up after the wake-up according to the most recent strongest SSB before the sleep this time The system information block received.
  • the receiving module 210 is further configured to, according to the first SSB, perform subsequent system information block reception after the wake-up this time according to the first SSB when the decoding of the second system information block reception after this wake-up is successful.
  • the SSB measurement module 220 is further configured to, when the decoding of the second system information block received after this wake-up is successful, perform a complete SSB measurement before receiving the system information block after this wake-up each time. Receiving and measuring to re-confirm the strongest SSB; the receiving module 210 is further configured to calculate the search space 0 position according to the latest confirmed strongest SSB, so as to receive the system information block after this wake-up.
  • the communication apparatus is configured to, in the current data communication cycle, prohibit the current device from entering the sleep state when the decoding of the first system information block received after this wake-up fails.
  • the SSB measurement module 220 is further configured to track the frequency offset and time offset of the SSB after the decoding of the system information block received for the first time after this wake-up fails.
  • the SSB measurement module 220 is further configured to, when the decoding of the system information block received for the first time after this wake-up fails, after the current device enters the sleep state again and is woken up again, complete reception of the SSB and measurement to confirm the strongest second SSB; the receiving module 210 is further configured to calculate the 0 position of the search space according to the second SSB, so as to receive the first system information block after reawakening.
  • the apparatuses proposed in the embodiments of the present application may be fully or partially integrated into a physical entity during actual implementation, or may be physically separated.
  • these modules can all be implemented in the form of software calling through processing elements; they can also all be implemented in hardware; some modules can also be implemented in the form of software calling through processing elements, and some modules can be implemented in hardware.
  • the detection module may be a separately established processing element, or may be integrated in a certain chip of the electronic device.
  • the implementation of other modules is similar.
  • all or part of these modules can be integrated together, and can also be implemented independently.
  • each step of the above-mentioned method or each of the above-mentioned modules can be completed by an integrated logic circuit of hardware in the processor element or an instruction in the form of software.
  • the above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC), or, one or more digital signal processors ( Digital Singnal Processor, DSP), or, one or more Field Programmable Gate Array (Field Programmable Gate Array, FPGA), etc.
  • ASIC Application Specific Integrated Circuit
  • DSP Digital Singnal Processor
  • FPGA Field Programmable Gate Array
  • these modules can be integrated together and implemented in the form of an on-chip device (System-On-a-Chip, SOC).
  • an embodiment of the present application proposes an electronic chip, which is used for receiving and decoding wireless signals (including receiving SIBs), and the electronic chip includes:
  • the processor is used to execute the computer program instructions stored in the memory, wherein when the computer program instructions are executed by the processor of the electronic chip, the electronic chip is triggered to receive and decode the wireless signal according to the method steps described in the embodiments of the present application to obtain the System Information Block.
  • the memory for storing the computer program instructions may be the internal memory of the electronic chip itself, or may be an external memory.
  • an embodiment of the present application proposes a communication chip, which is used for sending and receiving wireless signals to realize 5G communication, and the baseband chip has a built-in memory and a processor.
  • the memory of the communication chip is loaded with program codes that can implement the method flow described in the embodiments of the present application.
  • the processor of the communication chip calls and runs the program code loaded in the memory, so that the communication chip can receive the wireless signal according to the method flow described in the embodiment of the present application, so as to realize the reception of the SIB.
  • An embodiment of the present application also provides an electronic device, the electronic device includes a memory for storing computer program instructions and a processor for executing the program instructions, wherein when the computer program instructions are executed by the processor, the electronic device is triggered The device executes the method steps described in the embodiments of the present application.
  • the above-mentioned one or more computer programs are stored in the above-mentioned memory, and the above-mentioned one or more computer programs include instructions.
  • the above-mentioned instructions are executed by the above-mentioned device, the above-mentioned device is made to execute the application. The method steps described in the examples.
  • the processor of the electronic device may be an on-chip device SOC, and the processor may include a central processing unit (Central Processing Unit, CPU), and may further include other types of processors.
  • the processor of the electronic device may be a PWM control chip.
  • the involved processor may include, for example, a CPU, a DSP, a microcontroller, or a digital signal processor, and may also include a GPU, an embedded Neural-network Process Units (NPU, NPU) ) and an image signal processor (Image Signal Processing, ISP), the processor may also include necessary hardware accelerators or logic processing hardware circuits, such as ASICs, or one or more integrated circuits for controlling the execution of programs in the technical solution of the present application Wait. Furthermore, the processor may have the function of operating one or more software programs, which may be stored in a storage medium.
  • the memory of the electronic device may be a read-only memory (ROM), other types of static storage devices that can store static information and instructions, random access memory (random access memory) memory, RAM) or other types of dynamic storage devices that can store information and instructions, also can be electrically erasable programmable read-only memory (electrically erasable programmable read-only memory, EEPROM), compact disc read-only memory, CD-ROM) or other optical disk storage, optical disk storage (including compact disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), magnetic disk storage medium or other magnetic storage device, or can also be used for portable or Any computer-readable medium that stores desired program code in the form of instructions or data structures and can be accessed by a computer.
  • ROM read-only memory
  • RAM random access memory
  • dynamic storage devices that can store information and instructions
  • EEPROM electrically erasable programmable read-only memory
  • CD-ROM compact disc read-only memory
  • optical disk storage including compact disk, laser disk, optical disk, digital versatile disk
  • a processor may be combined with a memory to form a processing device, which is more commonly an independent component.
  • the processor is used to execute program codes stored in the memory to implement the method described in the embodiment of the present application.
  • the memory can also be integrated in the processor, or be independent of the processor.
  • devices, devices, and modules described in the embodiments of the present application may be specifically implemented by computer chips or entities, or by products with certain functions.
  • the embodiments of the present application may be provided as a method, an apparatus, or a computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media having computer-usable program code embodied therein.
  • any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • an embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when it runs on a computer, the computer executes the method provided by the embodiment of the present application.
  • An embodiment of the present application further provides a computer program product, where the computer program product includes a computer program that, when running on a computer, causes the computer to execute the method provided by the embodiment of the present application.
  • These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions
  • the apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.
  • At least one of a, b, and c may represent: a, b, c, a and b, a and c, b and c or a and b and c, where a, b, c may be single, or Can be multiple.
  • the terms “comprising”, “comprising” or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes Other elements not expressly listed, or which are inherent to such a process, method, article of manufacture, or apparatus are also included.
  • an element qualified by the phrase “comprising a" does not preclude the presence of additional identical elements in the process, method, article of manufacture, or device that includes the element.
  • the application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer.
  • program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types.
  • the application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network.
  • program modules may be located in both local and remote computer storage media including storage devices.

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Abstract

本申请实施例提供一种通信方法、装置和电子设备。方法包括：在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；当所述本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB；根据所述第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。相较于现有技术，根据本申请实施例的方法，可以大大提高SIB接收的成功率。

Description

一种通信方法、装置和电子设备 技术领域
本申请涉及通信技术领域，特别涉及一种通信方法、装置和电子设备。
背景技术
5G中将小区主辅同步信号(Synchronization Signal，SS)与物理广播信道(Physical Broadcast Channel，PBCH)进行了耦合，以SS/PBCH资源块的形式出现，简称为SSB。在新空口(New Radio，NR)系统中，存在多个波(Beam)，每个Beam会关联到一个SSB上。如果系统信息块(System Information Block，SIB)1的物理下行控制信道(Physical Downlink Control Channel，PDCCH)是搜索空间(Search space)0，那么，Search space 0关联到各个SSB上。
针对不同的SSB，监听的时隙(slot)不同。不同基站在发送数据的时候，也会有波束方向的不同。并且，各个Search space监听的PDCCH CORESET(CORESET是一组物理资源(即NR下行链路资源网格上的特定区域)和一组用于携带PDCCH/DCI的参数)也是和相应的SSB准同位置(Quasi-Colocation，QCL)相对应。因此，在接收SIB时，为了获取最好的接收新能，需要在最强的SSB监听slot上接收。
在现有技术中，设备在闲置(idle)状态时，出于功耗考虑，通常会进入休眠状态。当设备从休眠状态下被唤醒时，SSB的状态可能会发生变化，这就有可能会导致SIB的接收失败。
发明内容
针对现有技术下设备从休眠状态下被唤醒时无法成功接收SIB的问题，本申请提供了一种通信方法、装置和电子设备，本申请还提供一种计算机可读存储介质。
本申请实施例采用下述技术方案：
第一方面，本申请提供一种通信方法，包括：
在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；
当所述本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB；
根据所述第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
当所述本次唤醒后的第一次的系统信息块接收的译码成功时，根据所述本次休眠前最近一次的最强的SSB，进行本次唤醒后的后续的系统信息块接收。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
当所述本次唤醒后的第二次的系统信息块接收的译码成功时，根据所述第一SSB，进 行本次唤醒后的后续的系统信息块接收。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
当所述本次唤醒后的第二次的系统信息块接收的译码成功时，在每次进行本次唤醒后的系统信息块接收之前，对SSB进行完整的接收以及测量以重新确认最强的SSB；
根据最新确认的最强的SSB计算搜索空间0位置，以进行所述本次唤醒后的系统信息块接收。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
当所述本次唤醒后的第一次的系统信息块接收的译码失败时，在当前数据通信周期内，禁止所述当前设备进入休眠状态。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
在所述本次唤醒后的第一次的系统信息块接收的译码失败后，对SSB进行频偏、时偏跟踪。
在上述第一方面的一种可行的实现方式中，所述方法还包括：
当所述本次唤醒后的第一次的系统信息块接收的译码失败时，在所述当前设备再次进入休眠状态并被再次唤醒后，对SSB进行完整的接收以及测量以确认最强的第二SSB；
根据所述第二SSB计算搜索空间0位置，以进行再次唤醒后的第一次的系统信息块接收。
第二方面，本申请还提供一种通信装置，包括接收模块以及SSB测量模块，其中：
所述接收模块用于在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；
所述SSB测量模块用于当所述本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB；
所述接收模块还用于根据所述第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。
第三方面，本申请提供了一种电子设备，所述电子设备包括用于存储计算机程序指令的存储器和用于执行程序指令的处理器，其中，当该计算机程序指令被该处理器执行时，触发所述电子设备执行如本申请实施例所述的方法步骤。
第四方面，本申请提供了一种电子芯片，所述电子芯片用于接收并解码无线信号，所述电子芯片包括：
处理器，其用于执行存储器存储的计算机程序指令，其中，当所述计算机程序指令被所述处理器执行时，触发所述电子芯片按照如权利要求1～8中任一项所述的方法步骤接收并解码无线信号以获取系统信息块。
第五方面，本申请提供了一种计算机可读存储介质，计算机可读存储介质中存储有计算机程序，当其在计算机上运行时，使得计算机执行本申请实施例的方法。
根据本申请实施例所提出的上述技术方案，至少可以实现下述技术效果：
根据本申请实施例的方法，在第一次的SIB接收失败后，通过对SSB进行完整的接收以及测量以确认最强的SSB，从而尽可能的提高接收性能，从而在弱信道的情况下，大大提高SIB接收的成功率。相较于现有技术，根据本申请实施例的方法，可以大大提高SIB接收的成功率。
附图说明
图1所示为根据本申请一实施例的方法流程图；
图2所示为根据本申请一实施例的装置结构图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请具体实施例及相应的附图对本申请技术方案进行清楚、完整地描述。显然，所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的实施方式部分使用的术语仅用于对本申请的具体实施例进行解释，而非旨在限定本申请。
在实际应用场景中，在设备休眠前后，可能会存在频偏、时偏。例如，设备在休眠状态下，通常会关闭接收机和高精度时钟,只维持一个低精度时钟，这种低精度的时钟本身会有误差，并且和高精度的时钟还有一个转换误差。这样，当设备从休眠中恢复时，就会引入一个时钟偏差。
进一步的，在休眠状态下，为了节省功率，设备只会接收一部分SSB，这样设备就不能对频偏、时偏、自动增益控制(Automatic Gain Control，AGC)进行跟踪计算。这样，设备就无法感知设备休眠前后SSB所发生的频偏、时偏变化，设备也不会对AGC进行相应调整。由此，当设备直接沿用休眠状态前的最强的SSB时，就会出现因忽视SSB变化而导致SIB接收失败的问题。
为了解决因忽视SSB变化而导致SIB接收失败的问题，本申请一实施例提出了一种通信方法。在本申请实施例的方法中，在设备从休眠状态被唤醒时，首先沿用进入休眠状态前最近一次确认的最强的SSB进行首次SIB接收，如果接收成功，则说明在设备休眠过程中，最强SSB并未发生变化，那么后续的SIB接收均可沿用该最强的SSB。如果接收失败，则对SSB进行完整的接收以及测量以确认最强的SSB；根据确认的最强的SSB计算搜索空间0位置，以进行唤醒后的第二次的SIB接收。
图1所示为根据本申请一实施例的方法流程图。假设设备A在进入休眠状态前最近一次确认的最强的SSB为SSB0，当设备A从休眠状态下唤醒后，执行如图1所示的下述步骤以接收SIB：
步骤110，在当前设备从休眠状态下唤醒后，根据SSB0计算搜索空间0位置，以进行本次唤醒后的第一次的SIB接收；
步骤120，确认本次唤醒后的第一次的SIB接收的译码是否成功；
步骤130，当本次唤醒后的第一次的SIB接收的译码成功时，根据SSB0进行本次唤醒后的后续的SIB接收；
步骤140，当本次唤醒后的第一次的SIB接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的SSBSSB1；
步骤150，根据SSB1计算搜索空间0位置，以进行本次唤醒后的第二次的SIB接收。
根据本申请实施例的方法，在第一次的SIB接收失败后，通过对SSB进行完整的接 收以及测量以确认最强的SSB，从而尽可能的提高接收性能，从而在弱信道的情况下，大大提高SIB接收的成功率。相较于现有技术，根据本申请实施例的方法，可以大大提高SIB接收的成功率。
进一步的，在步骤150中，当本次唤醒后的第二次的SIB接收的译码成功时，则说明SSB1可用。因此，在步骤150之后，就可以沿用SSB1进行本次唤醒后的后续的SIB接收，从而无需再次对SSB进行完整的接收以及测量以确认最强的SSB，大大减少系统消耗。
进一步的，为了尽可能地提高SIB接收的成功率，避免SIB接收失败，在本申请一实施例中，当步骤150中本次唤醒后的第二次的SIB接收的译码成功时，在每次进行本次唤醒后的SIB接收之前，对SSB进行完整的接收以及测量以重新确认最强的SSB；
根据最新确认的最强的SSB计算搜索空间0位置，以进行本次唤醒后的SIB接收。
进一步的，当在步骤120中，确认本次唤醒后的第一次的SIB接收的译码失败时，则说明休眠状态下存在频偏、时偏。因此，在本申请一实施例中，为提高SIB接收的成功率，在本次唤醒后的第一次的系统信息块接收的译码失败后，对SSB进行频偏、时偏跟踪。
进一步的，在设备进行通信的过程中，在一个通信周期内，在未完成通信周期时，设备也有可能会进入休眠状态，此时休眠导致的时偏、频偏就有可能会对本通信周期的数据接收产生影响。针对上述情况，在本申请一实施例中，当在步骤120中，确认本次唤醒后的第一次的SIB接收的译码失败时，则说明进入休眠状态会对SIB的接收产生影响，因此，在当前数据通信周期内，禁止当前设备进入休眠状态。这样就可以有效避免进入休眠对时偏、频偏，从而有效提高SIB接收的成功率。
对应的，当在步骤120中，确认本次唤醒后的第一次的SIB接收的译码成功时，则说明进入休眠状态不会对SIB的接收产生影响，因此，允许当前设备在当前数据通信周期内进入休眠状态。这样就可以在不降低SIB接收的成功率的前提下，有效削减功耗。
进一步的，在本申请一实施例中，当在步骤120中，确认本次唤醒后的第一次的SIB接收的译码失败时，则说明进入休眠状态会对SIB的接收产生影响，因此，在当前设备再次进入休眠状态并被再次唤醒后，不需要沿用休眠前最近一次的最强的SSB(例如，SSB1)进行SIB接收(因此已判断进入休眠状态会对SIB的接收产生影响，沿用休眠前最近一次的最强的SSB进行SIB接收的失败几率较大)，而是直接对SSB进行完整的接收以及测量以确认最强的SSB2；根据SSB2计算搜索空间0位置，以进行再次唤醒后的第一次的SIB接收。这样，不仅降低了功耗消耗(不需要使用SSB1进行尝试)，而且有效提高了SIB接收的成功率。
进一步的，在20世纪90年代，对于一个技术的改进可以很明显地区分是硬件上的改进(例如，对二极管、晶体管、开关等电路结构的改进)还是软件上的改进(对于方法流程的改进)。然而，随着技术的发展，当今的很多方法流程的改进已经可以视为硬件电路结构的直接改进。设计人员几乎都通过将改进的方法流程编程到硬件电路中来得到相应的硬件电路结构。因此，不能说一个方法流程的改进就不能用硬件实体模块来实现。例如，可编程逻辑器件(Programmable Logic Device,PLD)(例如现场可编程门阵列(Field Programmable Gate Array，FPGA))就是这样一种集成电路，其逻辑功能由访问方对器件编程来确定。由设计人员自行编程来把一个数字装置“集成”在一片PLD上，而不需要请 芯片制造厂商来设计和制作专用的集成电路芯片。而且，如今，取代手工地制作集成电路芯片，这种编程也多半改用“逻辑编译器(logic compiler)”软件来实现，它与程序开发撰写时所用的软件编译器相类似，而要编译之前的原始代码也得用特定的编程语言来撰写，此称之为硬件描述语言(Hardware Description Language，HDL)，而HDL也并非仅有一种，而是有许多种，如ABEL(Advanced Boolean Expression Language)、AHDL(Altera Hardware Description Language)、Confluence、CUPL(Cornell University Programming Language)、HDCal、JHDL(Java Hardware Description Language)、Lava、Lola、MyHDL、PALASM、RHDL(Ruby Hardware Description Language)等，目前最普遍使用的是VHDL(Very-High-Speed Integrated Circuit Hardware Description Language)与Verilog。本领域技术人员也应该清楚，只需要将方法流程用上述几种硬件描述语言稍作逻辑编程并编程到集成电路中，就可以很容易得到实现该逻辑方法流程的硬件电路。
因此，基于本申请实施例提出的方法，本申请还提出了一种通信装置。图2所示为根据本申请一实施例的装置结构图，如图2所示，通信装置200包括：
接收模块210，其用于在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；
SSB测量模块220，其用于当本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB。
接收模块210还用于根据第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。
具体的，接收模块210还用于，当本次唤醒后的第一次的系统信息块接收的译码成功时，根据本次休眠前最近一次的最强的SSB，进行本次唤醒后的后续的系统信息块接收。
具体的，接收模块210还用于，当本次唤醒后的第二次的系统信息块接收的译码成功时，根据第一SSB，进行本次唤醒后的后续的系统信息块接收。
具体的，SSB测量模块220还用于，当本次唤醒后的第二次的系统信息块接收的译码成功时，在每次进行本次唤醒后的系统信息块接收之前，对SSB进行完整的接收以及测量以重新确认最强的SSB；接收模块210还用于，根据最新确认的最强的SSB计算搜索空间0位置，以进行本次唤醒后的系统信息块接收。
具体的，通信装置配置为，当本次唤醒后的第一次的系统信息块接收的译码失败时，在当前数据通信周期内，禁止当前设备进入休眠状态。
具体的，SSB测量模块220还用于，在本次唤醒后的第一次的系统信息块接收的译码失败后，对SSB进行频偏、时偏跟踪。
具体的，SSB测量模块220还用于，当本次唤醒后的第一次的系统信息块接收的译码失败时，在当前设备再次进入休眠状态并被再次唤醒后，对SSB进行完整的接收以及测量以确认最强的第二SSB；接收模块210还用于，根据第二SSB计算搜索空间0位置，以进行再次唤醒后的第一次的系统信息块接收。
在本申请实施例的描述中，为了描述的方便，描述装置时以功能分为各种模块分别描述，各个模块的划分仅仅是一种逻辑功能的划分，在实施本申请实施例时可以把各模块/单元的功能在同一个或多个软件和/或硬件中实现。
具体的，本申请实施例所提出的装置在实际实现时可以全部或部分集成到一个物理实 体上，也可以物理上分开。且这些模块可以全部以软件通过处理元件调用的形式实现；也可以全部以硬件的形式实现；还可以部分模块以软件通过处理元件调用的形式实现，部分模块通过硬件的形式实现。例如，检测模块可以为单独设立的处理元件，也可以集成在电子设备的某一个芯片中实现。其它模块的实现与之类似。此外这些模块全部或部分可以集成在一起，也可以独立实现。在实现过程中，上述方法的各步骤或以上各个模块可以通过处理器元件中的硬件的集成逻辑电路或者软件形式的指令完成。
例如，以上这些模块可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(Application Specific Integrated Circuit，ASIC)，或，一个或多个数字信号处理器(Digital Singnal Processor，DSP)，或，一个或者多个现场可编程门阵列(Field Programmable Gate Array，FPGA)等。再如，这些模块可以集成在一起，以片上装置(System-On-a-Chip，SOC)的形式实现。
例如，本申请一实施例提出了一种电子芯片，该电子芯片用于接收并解码无线信号(包括接收SIB)，该电子芯片包括：
处理器，其用于执行存储器存储的计算机程序指令，其中，当计算机程序指令被电子芯片的处理器执行时，触发电子芯片按照如本申请实施例所述的方法步骤接收并解码无线信号以获取系统信息块。
进一步的，存储计算机程序指令的存储器可以是电子芯片自身的内部存储器，也可以是外部存储器。
例如，本申请一实施例提出了一种通信芯片，该通信芯片用于收发无线信号以实现5G通信，该基带芯片内置有存储器以及处理器。通信芯片的存储器中加载有可实现本申请实施例所述的方法流程的程序代码。通信芯片的处理器调用并运行存储器所加载的程序代码，即可令通信芯片按照本申请实施例所述的方法流程，对无线信号进行接收，以实现接收SIB。
本申请一实施例还提出了一种电子设备，电子设备包括用于存储计算机程序指令的存储器和用于执行程序指令的处理器，其中，当该计算机程序指令被该处理器执行时，触发电子设备执行如本申请实施例所述的方法步骤。
具体的，在本申请一实施例中，上述一个或多个计算机程序被存储在上述存储器中，上述一个或多个计算机程序包括指令，当上述指令被上述设备执行时，使得上述设备执行本申请实施例所述的方法步骤。
具体的，在本申请一实施例中，电子设备的处理器可以是片上装置SOC，该处理器中可以包括中央处理器(Central Processing Unit，CPU)，还可以进一步包括其他类型的处理器。具体的，在本申请一实施例中，电子设备的处理器可以是PWM控制芯片。
具体的，在本申请一实施例中，涉及的处理器可以例如包括CPU、DSP、微控制器或数字信号处理器，还可包括GPU、嵌入式神经网络处理器(Neural-network Process Units，NPU)和图像信号处理器(Image Signal Processing，ISP)，该处理器还可包括必要的硬件加速器或逻辑处理硬件电路，如ASIC，或一个或多个用于控制本申请技术方案程序执行的集成电路等。此外，处理器可以具有操作一个或多个软件程序的功能，软件程序可以存储在存储介质中。
具体的，在本申请一实施例中，电子设备的存储器可以是只读存储器(read-only  memory，ROM)、可存储静态信息和指令的其它类型的静态存储设备、随机存取存储器(random access memory，RAM)或可存储信息和指令的其它类型的动态存储设备，也可以是电可擦可编程只读存储器(electrically erasable programmable read-only memory，EEPROM)、只读光盘(compact disc read-only memory，CD-ROM)或其他光盘存储、光碟存储(包括压缩光碟、激光碟、光碟、数字通用光碟、蓝光光碟等)、磁盘存储介质或者其它磁存储设备，或者还可以是能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何计算机可读介质。
具体的，在本申请一实施例中，处理器可以和存储器可以合成一个处理装置，更常见的是彼此独立的部件，处理器用于执行存储器中存储的程序代码来实现本申请实施例所述方法。具体实现时，该存储器也可以集成在处理器中，或者，独立于处理器。
进一步的，本申请实施例阐明的设备、装置、模块，具体可以由计算机芯片或实体实现，或者由具有某种功能的产品来实现。
本领域内的技术人员应明白，本申请实施例可提供为方法、装置、或计算机程序产品。因此，本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质上实施的计算机程序产品的形式。
在本申请所提供的几个实施例中，任一功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。
具体的，本申请一实施例中还提供一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序，当其在计算机上运行时，使得计算机执行本申请实施例提供的方法。
本申请一实施例还提供一种计算机程序产品，该计算机程序产品包括计算机程序，当其在计算机上运行时，使得计算机执行本申请实施例提供的方法。
本申请中的实施例描述是参照根据本申请实施例的方法、设备(装置)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算 机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
还需要说明的是，本申请实施例中，“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示单独存在A、同时存在A和B、单独存在B的情况。其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项”及其类似表达，是指的这些项中的任意组合，包括单项或复数项的任意组合。例如，a，b和c中的至少一项可以表示：a，b，c，a和b，a和c，b和c或a和b和c，其中a，b，c可以是单个，也可以是多个。
本申请实施例中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
本申请可以在由计算机执行的计算机可执行指令的一般上下文中描述，例如程序模块。一般地，程序模块包括执行特定任务或实现特定抽象数据类型的例程、程序、对象、组件、数据结构等等。也可以在分布式计算环境中实践本申请，在这些分布式计算环境中，由通过通信网络而被连接的远程处理设备来执行任务。在分布式计算环境中，程序模块可以位于包括存储设备在内的本地和远程计算机存储介质中。
本申请中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于装置实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
本领域普通技术人员可以意识到，本申请实施例中描述的各单元及算法步骤，能够以电子硬件、计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的装置、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
以上所述，仅为本申请的具体实施方式，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。本申请的保护范围应以所述权利要求的保护范围为准。

Claims (11)

  1. 一种通信方法，其特征在于，包括：
    在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；
    当所述本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB；
    根据所述第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。
  2. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    当所述本次唤醒后的第一次的系统信息块接收的译码成功时，根据所述本次休眠前最近一次的最强的SSB，进行本次唤醒后的后续的系统信息块接收。
  3. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    当所述本次唤醒后的第二次的系统信息块接收的译码成功时，根据所述第一SSB，进行本次唤醒后的后续的系统信息块接收。
  4. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    当所述本次唤醒后的第二次的系统信息块接收的译码成功时，在每次进行本次唤醒后的系统信息块接收之前，对SSB进行完整的接收以及测量以重新确认最强的SSB；
    根据最新确认的最强的SSB计算搜索空间0位置，以进行所述本次唤醒后的系统信息块接收。
  5. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    当所述本次唤醒后的第一次的系统信息块接收的译码失败时，在当前数据通信周期内，禁止所述当前设备进入休眠状态。
  6. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    在所述本次唤醒后的第一次的系统信息块接收的译码失败后，对SSB进行频偏、时偏跟踪。
  7. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    当所述本次唤醒后的第一次的系统信息块接收的译码失败时，在所述当前设备再次进入休眠状态并被再次唤醒后，对SSB进行完整的接收以及测量以确认最强的第二SSB；
    根据所述第二SSB计算搜索空间0位置，以进行再次唤醒后的第一次的系统信息块接收。
  8. 一种通信装置，其特征在于，包括接收模块以及SSB测量模块，其中：
    所述接收模块用于在当前设备从休眠状态下唤醒后，根据本次休眠前最近一次的最强的SSB计算搜索空间0位置，以进行本次唤醒后的第一次的系统信息块接收；
    所述SSB测量模块用于当所述本次唤醒后的第一次的系统信息块接收的译码失败时，对SSB进行完整的接收以及测量以确认最强的第一SSB；
    所述接收模块还用于根据所述第一SSB计算搜索空间0位置，以进行本次唤醒后的第二次的系统信息块接收。
  9. 一种电子设备，其特征在于，所述电子设备包括用于存储计算机程序指令的存储器和用于执行程序指令的处理器，其中，当该计算机程序指令被该处理器执行时，触发所述 电子设备执行如权利要求1～8中任一项所述的方法步骤。
  10. 一种电子芯片，其特征在于，所述电子芯片用于接收并解码无线信号，所述电子芯片包括：
    处理器，其用于执行存储器存储的计算机程序指令，其中，当所述计算机程序指令被所述处理器执行时，触发所述电子芯片按照如权利要求1-8中任一项所述的方法步骤接收并解码无线信号以获取系统信息块。
  11. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机程序，当其在计算机上运行时，使得计算机执行如权利要求1-8中任一项所述的方法。
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