WO2022134452A1 - 稳压模组和电子装置 - Google Patents

稳压模组和电子装置 Download PDF

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Publication number
WO2022134452A1
WO2022134452A1 PCT/CN2021/095527 CN2021095527W WO2022134452A1 WO 2022134452 A1 WO2022134452 A1 WO 2022134452A1 CN 2021095527 W CN2021095527 W CN 2021095527W WO 2022134452 A1 WO2022134452 A1 WO 2022134452A1
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Prior art keywords
voltage
control
terminal
circuit
output
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PCT/CN2021/095527
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English (en)
French (fr)
Inventor
魏家徵
闵振元
于梁
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海宁奕斯伟集成电路设计有限公司
北京奕斯伟计算技术有限公司
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Publication of WO2022134452A1 publication Critical patent/WO2022134452A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/563—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation

Definitions

  • the present disclosure relates to the technical field of voltage stabilization, and in particular, to a voltage stabilization module and an electronic device.
  • LDOs low dropout voltage regulators
  • Analog LDO has higher bandwidth and better PSR (Primary Switching Regulator, primary side feedback), but has a smaller operating range; digital LDO has a larger operating range, but has larger output noise .
  • PSR Primary Switching Regulator, primary side feedback
  • the main purpose of the present disclosure is to provide a voltage regulator module and an electronic device to solve the problem that the existing voltage regulator module cannot take into account the voltage regulation speed and the voltage regulation accuracy.
  • the present disclosure provides a voltage stabilization module, including a voltage output terminal, a control circuit, a digital voltage stabilization circuit and an analog voltage stabilization circuit, wherein,
  • the control circuit is electrically connected to the voltage output terminal, the digital voltage stabilization circuit and the analog voltage stabilization circuit, respectively, and is configured to provide a trigger signal to the digital voltage stabilization circuit when the voltage stabilization module is activated, and is configured to control the digital voltage stabilizing circuit to work and the analog voltage stabilizing circuit to not work when the output voltage provided by the voltage output terminal is less than the first voltage or greater than the second voltage, and when the output voltage is greater than the first voltage When a voltage is less than a second voltage, controlling the analog voltage regulator circuit to work and the digital voltage regulator circuit to not work;
  • the digital voltage regulator circuit is electrically connected to the voltage output terminal, and is configured to control the output voltage to increase after receiving the trigger signal, and is configured to operate when controlled by the control circuit, controlling and adjusting the output voltage so that the absolute value of the difference between the output voltage and the reference voltage becomes smaller;
  • the analog voltage regulator circuit is electrically connected to the voltage output terminal, and is configured to regulate the output voltage to the reference voltage when controlled by the control circuit to operate;
  • the reference voltage is greater than the first voltage, and the reference voltage is less than the second voltage.
  • control circuit is further configured to provide a first turn-on control signal to the digital voltage stabilizer circuit when the output voltage is less than the first voltage or greater than the second voltage, and send the signal to the digital voltage stabilizer through the voltage stabilizer control terminal.
  • the analog voltage regulator circuit provides a first turn-off control signal, and is further configured to provide a second turn-off control signal to the digital voltage regulator circuit when the output voltage is greater than the first voltage and less than the second voltage, through the
  • the voltage-stabilizing control terminal provides a second turn-on control signal to the analog voltage-stabilizing circuit;
  • the digital voltage regulator circuit is further configured to control to increase the output voltage when it is determined that the output voltage is less than a preset reference voltage when receiving the first turn-on control signal, and when it is determined that the output voltage is higher than the preset reference voltage.
  • the output voltage is controlled to be lowered, and the output voltage is further configured to stop working when the second shutdown control signal is received;
  • the analog voltage regulator circuit is further configured to regulate the output voltage to the reference voltage upon receiving the second turn-on control signal, and is configured to adjust the output voltage to the reference voltage upon receiving the first turn-off control signal stop working.
  • the digital voltage regulator circuit includes an analog-to-digital conversion unit, a charging control unit and an energy storage unit;
  • the analog-to-digital conversion unit is respectively electrically connected to the control circuit, the voltage output terminal and the charging control unit, and is configured to compare the The output voltage and the reference voltage, when the output voltage is less than the reference voltage, provide a first charging control signal to the charging control unit, when the output voltage is greater than the reference voltage, provide the charging control signal to the charging control unit the unit provides a first stop charging control signal;
  • the charging control unit is respectively electrically connected with the charging voltage terminal and the energy storage unit, and is configured to control the communication between the charging voltage terminal and the energy storage unit when receiving the first charging control signal, so as to pass
  • the charging voltage signal provided by the charging voltage terminal charges the energy storage unit, and is configured to control the disconnection between the charging voltage terminal and the energy storage unit when the first charging stop control signal is received.
  • the analog-to-digital conversion unit includes an N-bit analog-to-digital converter; N is a positive integer; the first charging control signal includes N first control signals;
  • the N-bit analog-to-digital converter is respectively electrically connected to the voltage output terminal, the reference voltage terminal and the charging control unit, and is configured to output the output voltage to the charging control unit according to the output voltage and the reference voltage.
  • the N first control signals to control the connection or disconnection between the charging voltage terminal and the energy storage unit;
  • the reference voltage terminal is configured to provide a reference voltage.
  • the N-bit analog-to-digital converter is a successive approximation register-type analog-to-digital converter.
  • the charging control unit includes N charging control transistors;
  • the control electrode of the nth charge control transistor is connected to the nth first control signal, the first electrode of the nth charge control transistor is electrically connected to the charging voltage terminal, and the second electrode of the nth charge control transistor is connected to the energy storage unit electrical connection;
  • n is a positive integer less than or equal to N.
  • the energy storage unit includes a storage capacitor
  • the first terminal of the storage capacitor is electrically connected to the voltage output terminal, and the second terminal of the storage capacitor is electrically connected to the ground terminal.
  • the analog voltage regulator circuit includes an operational amplifier, a first control transistor and a second control transistor;
  • the first input terminal of the operational amplifier is electrically connected to the voltage output terminal, the second input terminal of the operational amplifier is connected to a reference voltage, and the output terminal of the operational amplifier is electrically connected to the control electrode of the second control transistor. connect;
  • the control electrode of the first control transistor is electrically connected to the voltage regulator control terminal, the first electrode of the first control transistor is electrically connected to the third voltage terminal, and the second electrode of the first control transistor is electrically connected to the voltage regulator terminal.
  • the control electrode of the second control transistor is electrically connected;
  • the first pole of the second control transistor is electrically connected to the fourth voltage terminal, and the second pole of the second control transistor is electrically connected to the energy storage unit.
  • control circuit includes a control unit, a first comparator and a second comparator;
  • the first comparator is electrically connected to the voltage output terminal, and the first comparator is connected to a first voltage, the first comparator is configured to compare the output voltage with the first voltage, and will obtain The first comparison result is sent to the control unit;
  • the second comparator is electrically connected to the voltage output terminal, and the second comparator is connected to a second voltage, the second comparator is configured to compare the output voltage with the second voltage, and compare the output voltage with the second voltage.
  • the obtained second comparison result is transmitted to the control unit;
  • the control unit is respectively electrically connected to the first comparator, the second comparator, the digital voltage regulator circuit and the analog voltage regulator circuit, and is configured to, when the voltage regulator module starts
  • the digital voltage stabilizing circuit provides a trigger signal and is configured to adjust the voltage to the digital voltage when the output voltage is less than the first voltage or greater than the second voltage according to the first comparison result and the second comparison result
  • the circuit provides a first turn-on control signal, provides a first turn-off control signal to the analog voltage regulator circuit through the voltage regulator control terminal, and is also configured to obtain the first comparison result according to the first comparison result and the second comparison result.
  • a second turn-off control signal is provided to the digital voltage regulator circuit, and a second turn-on control signal is provided to the analog voltage regulator circuit through the voltage regulator control terminal.
  • control unit is a finite state machine.
  • the present disclosure also provides an electronic device, including the above-mentioned voltage stabilization module.
  • the control circuit After the voltage stabilization module and the electronic device according to the embodiments of the present disclosure are activated, the control circuit firstly controls the digital voltage stabilization circuit to perform rough adjustment of the output voltage. Since the digital voltage stabilization circuit has a fast adjustment speed, it can improve the adjusting speed; and when the output voltage is greater than the first voltage but less than the second voltage, the control circuit controls the digital voltage stabilizer circuit to stop working to save power; the control circuit controls the analog voltage stabilizer circuit to adjust the output voltage to the output voltage. Trimming is done to adjust the output voltage to a reference voltage and keep it at the reference voltage. By using the voltage stabilization module described in the embodiments of the present disclosure, the voltage adjustment speed can be improved, and the voltage adjustment accuracy can be ensured.
  • FIG. 1 is a structural diagram of a voltage regulator module according to an embodiment of the present disclosure
  • FIG. 2 is a structural diagram of a voltage regulator module according to another embodiment of the present disclosure.
  • FIG. 3 is a structural diagram of a voltage regulator module according to another embodiment of the present disclosure.
  • FIG. 4 is a structural diagram of a voltage regulator module according to still another embodiment of the present disclosure.
  • FIG. 5 is a circuit diagram of a voltage regulator module according to an embodiment of the present disclosure.
  • FIG. 6 is a timing diagram of a simulation operation of the embodiment of the voltage regulator module shown in FIG. 5 .
  • the transistors used in all the embodiments of the present disclosure may be triodes, thin film transistors, field effect transistors, or other devices with the same characteristics.
  • one pole is called the first pole, and the other pole is called the second pole.
  • control electrode when the transistor is a triode, the control electrode may be the base electrode, the first electrode may be the collector electrode, and the second electrode may be the emitter electrode; or the control electrode may be the base electrode electrode, the first electrode can be an emitter electrode, and the second electrode can be a collector electrode.
  • the control electrode when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate electrode, the first electrode may be a source electrode, and the second electrode may be a drain electrode;
  • the control electrode may be a gate electrode, the first electrode may be a drain electrode, and the second electrode may be a source electrode.
  • the voltage stabilization module described in the embodiments of the present disclosure includes a voltage output terminal, a control circuit, a digital voltage stabilization circuit and an analog voltage stabilization circuit, wherein,
  • the control circuit is electrically connected to the voltage output terminal, the digital voltage stabilization circuit and the analog voltage stabilization circuit, respectively, and is configured to provide a trigger signal to the digital voltage stabilization circuit when the voltage stabilization module is activated, and is configured to control the digital voltage stabilizing circuit to work and the analog voltage stabilizing circuit to not work when the output voltage provided by the voltage output terminal is less than the first voltage or greater than the second voltage, and when the output voltage is greater than the first voltage When a voltage is less than a second voltage, controlling the analog voltage regulator circuit to work and the digital voltage regulator circuit to not work;
  • the digital voltage regulator circuit is electrically connected to the voltage output terminal, and is configured to control the output voltage to increase after receiving the trigger signal, and is configured to operate when controlled by the control circuit, controlling and adjusting the output voltage so that the absolute value of the difference between the output voltage and the reference voltage becomes smaller;
  • the analog voltage regulator circuit is electrically connected to the voltage output terminal, and is configured to regulate the output voltage to the reference voltage when controlled by the control circuit to operate;
  • the reference voltage is greater than the first voltage, and the reference voltage is less than the second voltage.
  • the control circuit After the voltage stabilization module according to the embodiment of the present disclosure is started, the control circuit firstly controls the digital voltage stabilization circuit to coarsely adjust the output voltage. Since the adjustment speed of the digital voltage stabilization circuit is fast, the adjustment speed can be improved; When the output voltage is greater than the first voltage but less than the second voltage, the control circuit controls the digital voltage stabilizer circuit to stop working to save power; the control circuit controls the analog voltage stabilizer circuit to fine-tune the output voltage to The output voltage is regulated to the reference voltage and kept at the reference voltage.
  • the voltage stabilization module described in the embodiments of the present disclosure, the voltage adjustment speed can be improved, and the voltage adjustment accuracy can be ensured.
  • control circuit is further configured to provide a first turn-on control signal to the digital voltage stabilizer circuit when the output voltage is less than the first voltage or greater than the second voltage, and send the signal to the digital voltage stabilizer through the voltage stabilizer control terminal.
  • the analog voltage regulator circuit provides a first turn-off control signal, and is further configured to provide a second turn-off control signal to the digital voltage regulator circuit when the output voltage is greater than the first voltage and less than the second voltage, through the
  • the voltage-stabilizing control terminal provides a second turn-on control signal to the analog voltage-stabilizing circuit;
  • the digital voltage regulator circuit is further configured to control to increase the output voltage when it is determined that the output voltage is less than a preset reference voltage when receiving the first turn-on control signal, and when it is determined that the output voltage is higher than the preset reference voltage.
  • the output voltage is controlled to be lowered, and the output voltage is further configured to stop working when the second shutdown control signal is received;
  • the analog voltage regulator circuit is further configured to regulate the output voltage to the reference voltage upon receiving the second turn-on control signal, and is configured to adjust the output voltage to the reference voltage upon receiving the first turn-off control signal stop working.
  • the voltage stabilization module described in the embodiment of the present disclosure includes a voltage output terminal Out, a control circuit 11 , a digital voltage stabilization circuit 12 and an analog voltage stabilization circuit 13 , wherein,
  • the control circuit 11 is respectively electrically connected to the voltage output terminal Out, the digital voltage regulator circuit 12 and the analog voltage regulator circuit 13, and is configured to send the voltage to the digital voltage regulator circuit when the voltage regulator module is activated.
  • 12 provides a trigger signal, and is configured to provide a first turn-on control signal to the digital voltage regulator circuit 12 when the output voltage Vout provided by the voltage output terminal Out is smaller than the first voltage or larger than the second voltage, and is regulated by a voltage regulator.
  • the control terminal S0 provides a first turn-off control signal to the analog voltage regulator circuit 13, and is also configured to provide a first turn-off control signal to the digital voltage regulator circuit 12 when the output voltage Vout is greater than the first voltage but less than the second voltage. Two turn-off control signals, providing a second turn-on control signal to the analog voltage regulator circuit 13 through the voltage regulator control terminal S0;
  • the digital voltage regulator circuit 12 is electrically connected to the voltage output terminal Out, and is configured to control and increase the output voltage Vout after receiving the trigger signal, and is configured to turn on the first after receiving the trigger signal.
  • the control signal when it is determined that the output voltage Vout is less than a preset reference voltage, the control is to increase the output voltage Vout, and when it is determined that the output voltage Vout is greater than the reference voltage, the control is to lower the output voltage Vout.
  • the output voltage Vout is further configured to stop working when receiving the second shutdown control signal;
  • the analog voltage regulator circuit 13 is electrically connected to the voltage output terminal Out, and is configured to adjust the output voltage Vout to the reference voltage when receiving the second turn-on control signal, and is configured to Stop working when the first shutdown control signal is received.
  • control circuit 11 may also be connected to the first voltage VL and the second voltage VH, but not limited thereto.
  • the reference voltage is between the first voltage and the second voltage, but not limited thereto.
  • a trigger signal is provided to the digital voltage stabilization circuit 12, and the digital voltage stabilization circuit 12 receives the trigger signal after receiving the trigger signal. , control to increase the output voltage Vout;
  • the control circuit 11 When the output voltage Vout provided by the voltage output terminal Out is less than the first voltage or greater than the second voltage, the control circuit 11 provides a first turn-on control signal to the digital voltage regulator circuit 12, and sends the signal to the digital voltage regulator circuit 12 through the voltage regulator control terminal S0.
  • the analog voltage regulator circuit 13 provides a first turn-off control signal, and when the digital voltage regulator circuit 12 receives the first turn-on control signal and determines that the output voltage Vout is less than a preset reference voltage, it controls the Increase the output voltage Vout, and control to decrease the output voltage Vout when it is determined that the output voltage Vout is greater than the reference voltage; the analog voltage regulator circuit 13 receives the first shutdown control
  • the control circuit 11 controls the digital voltage regulator circuit 12 to adjust output voltage, the control circuit 11 controls the analog voltage regulator circuit 13 to stop working;
  • the control circuit 11 When the output voltage Vout is greater than the first voltage and less than the second voltage, the control circuit 11 provides a second turn-off control signal to the digital voltage regulator circuit 12 and a second turn-on control signal to the analog voltage regulator circuit 13 , the digital voltage regulator circuit 12 stops working when receiving the second turn-off control signal, and the analog voltage regulator circuit 13 adjusts the output voltage Vout to the reference voltage.
  • the control circuit 11 When the voltage stabilization module described in the embodiment of the present disclosure is in operation, after the voltage stabilization module is started, the control circuit 11 first controls the digital voltage stabilization circuit 12 to perform rough adjustment of the output voltage. When the output voltage Vout is greater than the first voltage but less than the second voltage, the control circuit 11 controls the digital voltage regulator circuit 12 to stop working to save power; the control circuit 11 controls the The analog voltage regulator circuit 13 fine-tunes the output voltage Vout to adjust the output voltage Vout to a reference voltage and keep Vout at the reference voltage. By using the voltage stabilization module described in the embodiments of the present disclosure, the voltage adjustment speed can be improved, and the voltage adjustment accuracy can be ensured.
  • the digital voltage stabilization circuit may include an analog-to-digital conversion unit 21 , a charging control unit 22 and an energy storage unit 23 ;
  • the energy unit 23 is electrically connected to the voltage output terminal Out;
  • the analog-to-digital conversion unit 21 is electrically connected to the voltage output terminal Out, the control circuit 11 and the charging control unit 22 respectively, the digital-to-analog conversion unit 21 is connected to the reference voltage Vref, and the digital-to-analog conversion unit 21 is is configured to compare the output voltage Vout with the reference voltage when the trigger signal or the first turn-on control signal is received, and when the output voltage Vout is less than the reference voltage, send the charging control unit 22 provides a first charging control signal, and when the output voltage Vout is greater than the reference voltage, provides a first stop charging control signal to the charging control unit 22;
  • the charging control unit 22 is electrically connected to the charging voltage terminal V1 and the energy storage unit 23 respectively, and is configured to control the connection between the charging voltage terminal V1 and the energy storage unit 23 when receiving the first charging control signal.
  • the energy storage unit 23 is charged with the charging voltage signal provided by the charging voltage terminal V1, and is configured to control the charging voltage terminal V1 and the charging voltage terminal V1 when receiving the first stop charging control signal. The energy storage units 23 are disconnected.
  • the charging voltage terminal V1 may be a positive voltage terminal, but is not limited thereto.
  • the charging control unit 22 provides the first charging control signal or the first stop charging control signal; when the charging control unit 22 receives the first charging control signal, it controls to charge the energy storage unit 23 through the charging voltage signal, and when the charging control unit 22 receives the first charging control signal, When the first stop charging control signal is received, the control is to stop charging the energy storage unit 23 through the charging voltage signal.
  • the analog-to-digital conversion unit may include an N-bit analog-to-digital converter; N is a positive integer; the first charging control signal includes N first control signals;
  • the N-bit analog-to-digital converter is respectively electrically connected to the voltage output terminal, the reference voltage terminal and the charging control unit, and is configured to output the output voltage to the charging control unit according to the output voltage and the reference voltage.
  • the N first control signals to control the connection or disconnection between the charging voltage terminal and the energy storage unit;
  • the reference voltage terminal is configured to provide a reference voltage.
  • the N-bit analog-to-digital converter may be a SAR (successive approximation register type) analog-to-digital converter.
  • the analog-to-digital conversion unit may include an N-bit analog-to-digital converter, and the N-bit analog-to-digital converter outputs N first control signals
  • the charging control unit may include N charging control transistors, the first The n charging control transistor is controlled by the nth first control signal to be turned on or off.
  • the charging control unit includes N charging control transistors;
  • the control electrode of the nth charge control transistor is connected to the nth first control signal, the first electrode of the nth charge control transistor is electrically connected to the charging voltage terminal, and the second electrode of the nth charge control transistor is connected to the energy storage unit electrical connection;
  • n is a positive integer less than or equal to N.
  • the N charge control transistors are of the same type, that is, the N charge control transistors are all p-type transistors, or the N charge control transistors are all n-type transistors.
  • the charging control unit includes N charging control transistors, and the nth charging When the control transistor is controlled by the nth first control signal, when the Nth charging control transistors are p-type transistors, and when the nth first control signal is a low voltage signal, the nth charging control transistor is turned on, When the nth first control signal is a high voltage signal, the nth charging control transistor is turned off; when the Nth charging control transistors are n-type transistors, when the nth first control signal is a high voltage signal , the nth charging control transistor is turned on, and when the nth first control signal is a low voltage signal, the nth charging control transistor is turned off.
  • the energy storage unit may include a storage capacitor;
  • the first terminal of the storage capacitor is electrically connected to the voltage output terminal, and the second terminal of the storage capacitor is electrically connected to the ground terminal.
  • the second end of the storage capacitor may not be limited to being electrically connected to the ground terminal, but may also be electrically connected to other DC voltage terminals.
  • the analog voltage regulator circuit includes an operational amplifier, a first control transistor and a second control transistor;
  • the first input terminal of the operational amplifier is electrically connected to the voltage output terminal, the second input terminal of the operational amplifier is connected to a reference voltage, and the output terminal of the operational amplifier is electrically connected to the control electrode of the second control transistor. connect;
  • the control electrode of the first control transistor is electrically connected to the voltage regulator control terminal, the first electrode of the first control transistor is electrically connected to the third voltage terminal, and the second electrode of the first control transistor is electrically connected to the voltage regulator terminal.
  • the control electrode of the second control transistor is electrically connected;
  • the first pole of the second control transistor is electrically connected to the fourth voltage terminal, and the second pole of the second control transistor is electrically connected to the energy storage unit.
  • the third voltage terminal may be a positive voltage terminal
  • the fourth voltage terminal may be a positive voltage terminal, but not limited thereto; according to the type of the second control transistor, the third voltage terminal It can also be a negative voltage terminal.
  • the analog voltage stabilization circuit may include an operational amplifier Amp, a first control transistor T1 and a second control transistor T2;
  • the first input terminal of the operational amplifier Amp is electrically connected to the voltage output terminal Out
  • the second input terminal of the operational amplifier Amp is connected to the reference voltage Vref
  • the output terminal of the operational amplifier Amp is connected to the second control
  • the gate of the transistor T2 is electrically connected
  • the control terminal of the operational amplifier Amp is electrically connected to the voltage regulator control terminal S0;
  • the gate of the first control transistor T1 is electrically connected to the voltage stabilization control terminal S0, the source of the first control transistor T1 is electrically connected to the third voltage terminal V3, and the drain of the first control transistor T1 is electrically connected is electrically connected to the gate of the second control transistor T2;
  • the source of the second control transistor T2 is electrically connected to the fourth voltage terminal V4 , and the drain of the second control transistor T2 is electrically connected to the energy storage unit 23 .
  • both T1 and T2 are p-type thin film transistors, but not limited thereto.
  • the control circuit 11 When the embodiment of the voltage stabilization module of the present disclosure as shown in FIG. 3 is in operation, when the analog voltage stabilization circuit is in operation, the control circuit 11 outputs a high voltage signal through S0, and T1 is turned off.
  • the output voltage Vout output by Out When it is greater than the reference voltage, Amp outputs a high voltage signal, T2 is turned off, and stops charging the energy storage unit 23 through the fourth voltage signal provided by the fourth voltage terminal V4; when Vout is less than the reference voltage, Amp outputs a low voltage signal, and T2 is turned on , charging the energy storage unit 23 through the fourth voltage signal to increase Vout;
  • control circuit 11 When the analog voltage regulator circuit does not work, the control circuit 11 outputs a low voltage signal through S0, T1 is turned on, the gate of T2 is connected to the third voltage signal V3, and T2 is turned off.
  • control circuit may include a control unit, a first comparator and a second comparator;
  • the first comparator is electrically connected to the voltage output terminal, and the first comparator is connected to a first voltage, the first comparator is configured to compare the output voltage with the first voltage, and will obtain The first comparison result is sent to the control unit;
  • the second comparator is electrically connected to the voltage output terminal, and the second comparator is connected to a second voltage, the second comparator is configured to compare the output voltage with the second voltage, and will obtain The second comparison result is sent to the control unit;
  • the control unit is respectively electrically connected to the first comparator, the second comparator, the digital voltage regulator circuit and the analog voltage regulator circuit, and is configured to, when the voltage regulator module starts
  • the digital voltage stabilizing circuit provides a trigger signal and is configured to adjust the voltage to the digital voltage when the output voltage is less than the first voltage or greater than the second voltage according to the first comparison result and the second comparison result
  • the circuit provides a first turn-on control signal, provides a first turn-off control signal to the analog voltage regulator circuit through the voltage regulator control terminal, and is also configured to obtain the first comparison result according to the first comparison result and the second comparison result.
  • a second turn-off control signal is provided to the digital voltage regulator circuit, and a second turn-on control signal is provided to the analog voltage regulator circuit through the voltage regulator control terminal.
  • control unit may be an FSM (Finite State Machine, finite state machine), but is not limited thereto.
  • FSM Finite State Machine, finite state machine
  • the control circuit may include a control unit 41 , a first comparator 42 and a second comparator 43 ;
  • the first comparator 42 is electrically connected to the voltage output terminal Out, and the first comparator 42 is connected to the first voltage VL, and the first comparator 42 is configured to compare the output voltage Vout with the first voltage VL. a voltage, and transmit the obtained first comparison result to the control unit 41; the first voltage value is the first voltage VL;
  • the second comparator 43 is electrically connected to the voltage output terminal Out, and the second comparator 43 is connected to the second voltage VH, and the second comparator 43 is configured to compare the output voltage Vout with the first voltage VH. two voltages, and transmit the obtained second comparison result to the control unit 41;
  • the control unit 41 is respectively electrically connected to the first comparator 42, the second comparator 43, the digital voltage regulator circuit 12 and the analog voltage regulator circuit 13, and is configured to operate in the voltage regulator mode.
  • a trigger signal is provided to the digital voltage regulator circuit 12, and is configured to be configured to obtain the output voltage Vout when the output voltage Vout is smaller than the first voltage or larger than the second voltage according to the first comparison result and the second comparison result
  • the digital voltage regulator circuit 12 is provided with a first turn-on control signal
  • the analog voltage regulator circuit 13 is provided with a first turn-off control signal through the voltage regulator control terminal S0, and is also configured to be configured according to the first comparison result and the second comparison result, when it is obtained that the output voltage Vout is greater than the first voltage but less than the second voltage
  • a second turn-off control signal is provided to the digital voltage regulator circuit 12, and is sent to the digital voltage regulator circuit 12 through the voltage regulator control terminal S0.
  • the analog voltage regulator circuit 13 provides a second turn-on control signal.
  • the voltage stabilization module includes a voltage output terminal Out, a control circuit, a digital voltage stabilization circuit and an analog voltage stabilization circuit, wherein,
  • the digital voltage regulator circuit includes an analog-to-digital conversion unit, a charging control unit 22 and an energy storage unit;
  • the analog-to-digital conversion unit includes a 3-bit SAR analog-to-digital converter 51; the energy storage unit includes a storage capacitor Cout;
  • the charging control unit 22 includes a first charging control transistor M1, a second charging control transistor M2 and a third charging control transistor M3;
  • the gate of the first charging control transistor M1 is connected to the first first control signal S1 output by the 3-bit SAR analog-to-digital converter 51 , and the source of the first charging control transistor M1 is electrically connected to the charging voltage terminal V1 , the drain of the first charging control transistor M1 is electrically connected to the first terminal of the storage capacitor Cout; the second terminal of Cout is electrically connected to the ground terminal GND; the first terminal of Cout is also electrically connected to the voltage output terminal Out;
  • the gate of the second charging control transistor M2 is connected to the second first control signal S2 output by the 3-bit SAR analog-to-digital converter 51 , and the source of the second charging control transistor M2 is electrically connected to the charging voltage terminal V1 , the drain of the second charging control transistor M2 is electrically connected to the first end of the storage capacitor Cout;
  • the gate of the third charging control transistor M3 is connected to the third first control signal S3 output by the 3-bit SAR analog-to-digital converter 51 , and the source of the third charging control transistor M3 is electrically connected to the charging voltage terminal V1 , the drain of the third charging control transistor M3 is electrically connected to the first end of the storage capacitor Cout;
  • the analog voltage regulator circuit includes an operational amplifier Amp, a first control transistor T1 and a second control transistor T2;
  • the first input terminal of the operational amplifier Amp is electrically connected to the voltage output terminal Out
  • the second input terminal of the operational amplifier Amp is connected to the reference voltage Vref
  • the output terminal of the operational amplifier Amp is connected to the second control
  • the gate of the transistor T2 is electrically connected
  • the control terminal of Amp is electrically connected to the voltage regulator control terminal S0;
  • the gate of the first control transistor T1 is electrically connected to the voltage stabilization control terminal S0, the source of the first control transistor T1 is electrically connected to the third voltage terminal V3, and the drain of the first control transistor T1 is electrically connected is electrically connected to the gate of the second control transistor T2;
  • the source of the second control transistor T2 is electrically connected to the fourth voltage terminal V4, and the drain of the second control transistor T2 is electrically connected to the first terminal of Cout;
  • the control circuit includes a control unit 41, a first comparator 42 and a second comparator 43;
  • the first comparator 42 is electrically connected to the voltage output terminal Out, and the first comparator 42 is connected to the first voltage VL, and the first comparator 42 is configured to compare the output voltage Vout with the first voltage VL. a voltage, and transmit the obtained first comparison result to the control unit 41;
  • the second comparator 43 is electrically connected to the voltage output terminal Out, and the second comparator 43 is connected to the second voltage VH, and the second comparator 43 is configured to compare the output voltage Vout with the first voltage VH. two voltages, and transmit the obtained second comparison result to the control unit 41;
  • the control unit 41 is respectively electrically connected to the first comparator 42, the second comparator 43, the digital voltage regulator circuit 12 and the analog voltage regulator circuit 13, and is configured to operate in the voltage regulator mode.
  • a trigger signal is provided to the digital voltage regulator circuit 12, and is configured to be configured to obtain the output voltage Vout when the output voltage Vout is smaller than the first voltage or larger than the second voltage according to the first comparison result and the second comparison result
  • the digital voltage regulator circuit 12 is provided with a first turn-on control signal
  • the analog voltage regulator circuit 13 is provided with a first turn-off control signal through the voltage regulator control terminal S0, and is also configured to be configured according to the first comparison result and the second comparison result, when it is obtained that the output voltage Vout is greater than the first voltage but less than the second voltage
  • a second turn-off control signal is provided to the digital voltage regulator circuit 12, and is sent to the digital voltage regulator circuit 12 through the voltage regulator control terminal S0.
  • the analog voltage regulator circuit 13 provides a second turn-on control signal
  • all the transistors are p-type thin film transistors, and the control unit is an FSM, but not limited thereto.
  • a 3-bit SAR ADC analog-to-digital converter
  • SoC chips system-on-chip
  • LDOs low dropout voltage regulators
  • the one labeled L0 is the load.
  • the control unit 41 When the voltage regulator module is activated, the control unit 41 provides a trigger signal to the 3-bit SAR analog-to-digital converter 51, and the 3-bit SAR analog-to-digital converter 51 controls to increase Vout, and when Vout is less than the first voltage or Vout is greater than the second voltage voltage, the control unit 41 provides the first turn-on control signal to the 3-bit SAR analog-to-digital converter 51, and the 3-bit SAR analog-to-digital converter 51 controls the outputs S1, S2 and S3 according to the difference between Vout and the reference voltage , to control the on-off of M1, M2 and M3; specifically, when the difference between the reference voltage and Vout is large, S1, S2 and S3 are all low voltage signals, and M1, M2 and M3 are all turned on to pass
  • the charging voltage signal provided by the charging voltage terminal V1 charges Cout, and because there are three charging channels at this time, the charging speed is fast; when the difference between the reference voltage and Vout becomes smaller, S1 becomes a high
  • control unit 41 When Vout is less than the first voltage or Vout is greater than the second voltage, the control unit 41 provides a low voltage signal to Amp and T1 through S0, so as to control Amp to stop working, make T1 open, and control the connection between the gate of T2 and V3, So that T2 is turned off;
  • the control unit 41 When Vout is between the first voltage and the second voltage, the control unit 41 provides a second shutdown control signal to the 3-bit SAR analog-to-digital converter, and the control unit 41 provides a high voltage signal to Amp and T1 through S0 to control Amp work, and turn off T1; when Amp compares Vout to be greater than the reference voltage, Amp outputs a high-voltage signal, and T2 turns off; when Amp compares Vout to be less than the reference voltage, Amp outputs a low-voltage signal, and T2 is turned on to pass
  • the fourth voltage signal provided by V4 charges Cout to regulate Vout to the reference voltage.
  • FIG. 6 is a timing diagram of a simulation operation of the embodiment of the voltage regulator module shown in FIG. 5 .
  • control unit 41 provides a trigger signal to the 3-bit SAR analog-to-digital converter 52, and the 3-bit SAR analog-to-digital converter 52 generates S1, S2 and S3 according to Vout and Vref to improve the Vout;
  • Vout is less than VL, and the control unit 41 controls the 3-bit SAR analog-to-digital converter 52 to work;
  • Vout rises to be greater than VL
  • the control unit 41 controls the 3-bit SAR analog-to-digital converter 52 to stop working, and the control unit 41 controls Amp to work to control Vout to be adjusted to Vref;
  • the control unit 41 controls the 3-bit SAR analog-to-digital converter 52 to work to increase Vout.
  • control unit 41 controls the 3-bit SAR analog-to-digital converter 52 to stop working, and the control unit 41 controls Amp to work, so as to control Vout to be adjusted to Vref.
  • the horizontal axis is time t in seconds, and the vertical axis is Vout in volts.
  • the electronic device may include the above-mentioned voltage regulator module.
  • the electronic device may also include a Soc chip (system-on-chip), and the voltage regulator module may be an LDO (low dropout voltage regulator), which provides the Soc chip with a simple structure, low power consumption, and fast speed. , Clean internal power supply.
  • Soc chip system-on-chip
  • LDO low dropout voltage regulator

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Abstract

本公开提供一种稳压模组和电子装置。稳压模组包括电压输出端、控制电路、数字稳压电路和模拟稳压电路；控制电路在稳压模组启动时，向数字稳压电路提供触发信号，并被配置为在输出电压小于第一电压或大于第二电压时，控制数字稳压电路工作而模拟稳压电路不工作，当输出电压大于第一电压而小于第二电压时，控制模拟稳压电路工作而数字稳压电路不工作；数字稳压电路在接收到触发信号后，控制调高输出电压，并当被控制电路控制而工作时，控制调节输出电压，使得输出电压与参考电压之间的差值的绝对值变小；模拟稳压电路在被控制电路控制而工作时，将输出电压调节至参考电压。本公开既可以提升电压调节速度，又可以保证电压调节精度。

Description

稳压模组和电子装置 技术领域
本公开涉及稳压技术领域，尤其涉及一种稳压模组和电子装置。
背景技术
随着SoC芯片(系统级芯片)变得越来越复杂，尺寸越来越大，功耗越来越高，需要低压差稳压器(LDO)来提供结构简单、功耗低、快速、清洁的内部电压源。
模拟LDO具有较高的带宽和更好的PSR(Primary Switching Regulator，原边反馈)，但具有较小的工作范围(operating range)；数字LDO具有较大的工作范围，但具有更大的输出噪声。
发明内容
本公开的主要目的在于提供一种稳压模组和电子装置，解决现有的稳压模组无法兼顾电压调节速度和电压调节精度的问题。
为了达到上述目的，本公开提供了一种稳压模组，包括电压输出端、控制电路、数字稳压电路和模拟稳压电路，其中，
所述控制电路分别与所述电压输出端、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为在所述电压输出端提供的输出电压小于第一电压或大于第二电压时，控制所述数字稳压电路工作而所述模拟稳压电路不工作，当所述输出电压大于第一电压而小于第二电压时，控制所述模拟稳压电路工作而所述数字稳压电路不工作；
所述数字稳压电路与所述电压输出端电连接，被配置为在接收到所述触发信号后，控制调高所述输出电压，并被配置为当被所述控制电路控制而工作时，控制调节所述输出电压，以使得所述输出电压与参考电压之间的差值 的绝对值变小；
所述模拟稳压电路与所述电压输出端电连接，被配置为在被所述控制电路控制而工作时，将所述输出电压调节至所述参考电压；
所述参考电压大于所述第一电压，所述参考电压小于所述第二电压。
可选的，所述控制电路还被配置为在所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号；
所述数字稳压电路还被配置为在接收到所述第一开启控制信号时，当判断到所述输出电压小于预先设定的参考电压时，控制调高所述输出电压，并当判断到所述输出电压大于所述参考电压时，控制调低所述输出电压，还被配置为在接收到所述第二关断控制信号时停止工作；
所述模拟稳压电路还被配置为在接收到所述第二开启控制信号时，将所述输出电压调节至所述参考电压，并被配置为在接收到所述第一关断控制信号时停止工作。
可选的，所述数字稳压电路包括模数转换单元、充电控制单元和储能单元；
所述模数转换单元分别与所述控制电路、所述电压输出端和所述充电控制单元电连接，被配置为当接收到所述触发信号或所述第一开启控制信号时，比较所述输出电压与所述参考电压，当所述输出电压小于所述参考电压时，向所述充电控制单元提供第一充电控制信号，当所述输出电压大于所述参考电压时，向所述充电控制单元提供第一停止充电控制信号；
所述充电控制单元分别与充电电压端和所述储能单元电连接，被配置为在接收到所述第一充电控制信号时，控制充电电压端与所述储能单元之间连通，以通过充电电压端提供的充电电压信号为所述储能单元充电，并被配置为在接收到所述第一停止充电控制信号时，控制所述充电电压端与所述储能单元之间断开。
可选的，所述模数转换单元包括N位模数转换器；N为正整数；所述第 一充电控制信号包括N个第一控制信号；
所述N位模数转换器分别与所述电压输出端、参考电压端和所述充电控制单元电连接，被配置为根据所述输出电压和所述参考电压，向所述充电控制单元输出所述N个第一控制信号，以控制所述充电电压端与所述储能单元之间连通或断开；
所述参考电压端被配置为提供参考电压。
可选的，所述N位模数转换器为逐次逼近寄存器型模数转换器。
可选的，所述充电控制单元包括N个充电控制晶体管；
第n充电控制晶体管的控制极接入第n个第一控制信号，第n充电控制晶体管的第一极与所述充电电压端电连接，第n充电控制晶体管的第二极与所述储能单元电连接；
n为小于或等于N的正整数。
可选的，所述储能单元包括存储电容；
所述存储电容的第一端与所述电压输出端电连接，所述存储电容的第二端与地端电连接。
可选的，所述模拟稳压电路包括运算放大器、第一控制晶体管和第二控制晶体管；
所述运算放大器的第一输入端与所述电压输出端电连接，所述运算放大器的第二输入端接入参考电压，所述运算放大器的输出端与所述第二控制晶体管的控制极电连接；
所述第一控制晶体管的控制极与所述稳压控制端电连接，所述第一控制晶体管的第一极与第三电压端电连接，所述第一控制晶体管的第二极与所述第二控制晶体管的控制极电连接；
所述第二控制晶体管的第一极与第四电压端电连接，所述第二控制晶体管的第二极与所述储能单元电连接。
可选的，所述控制电路包括控制单元、第一比较器和第二比较器；
所述第一比较器与所述电压输出端电连接，并所述第一比较器接入第一电压，所述第一比较器被配置为比较所述输出电压与第一电压，并将得到的第一比较结果传送至所述控制单元；
所述第二比较器与所述电压输出端电连接，并所述第二比较器接入第二电压，所述第二比较器被配置为比较所述输出电压的与第二电压，并将得到的第二比较结果传送至所述控制单元；
所述控制单元分别与所述第一比较器、所述第二比较器、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号。
可选的，所述控制单元为有限状态机。
本公开还提供了一种电子装置，包括上述的稳压模组。
本公开实施例所述稳压模组和电子装置在稳压模组启动后，控制电路先控制通过数字稳压电路对输出电压进行粗调，由于数字稳压电路的调节速度快，则可以提高调节速度；并在所述输出电压大于第一电压而小于第二电压时，控制电路控制所述数字稳压电路停止工作，以节省功率；控制电路控制所述模拟稳压电路对所述输出电压进行微调，以将所述输出电压调节至参考电压，并使得保持为所述参考电压。通过采用本公开实施例所述的稳压模组，既可以提升电压调节速度，又可以保证电压调节精度。
附图说明
图1是本公开实施例所述的稳压模组的结构图；
图2是本公开另一实施例所述的稳压模组的结构图；
图3是本公开又一实施例所述的稳压模组的结构图；
图4是本公开再一实施例所述的稳压模组的结构图；
图5是本公开实施例所述的稳压模组的电路图；
图6是图5所示的稳压模组的实施例的仿真工作时序图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为三极管、薄膜晶体管或场效应管或其他特性相同的器件。在本公开实施例中，为区分晶体管除控制极之外的两极，将其中一极称为第一极，另一极称为第二极。
在实际操作时，当所述晶体管为三极管时，所述控制极可以为基极，所述第一极可以为集电极，所述第二极可以发射极；或者，所述控制极可以为基极，所述第一极可以为发射极，所述第二极可以集电极。
在实际操作时，当所述晶体管为薄膜晶体管或场效应管时，所述控制极可以为栅极，所述第一极可以为源极，所述第二极可以为漏极；或者，所述控制极可以为栅极，所述第一极可以为漏极，所述第二极可以为源极。
本公开实施例所述的稳压模组包括电压输出端、控制电路、数字稳压电路和模拟稳压电路，其中，
所述控制电路分别与所述电压输出端、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为在所述电压输出端提供的输出电压小于第一电压或大于第二电压时，控制所述数字稳压电路工作而所述模拟稳压电路不工作，当所述输出电压大于第一电压而小于第二电压时，控制所述模拟稳压电路工作而所述数字稳压电路不工作；
所述数字稳压电路与所述电压输出端电连接，被配置为在接收到所述触发信号后，控制调高所述输出电压，并被配置为当被所述控制电路控制而工作时，控制调节所述输出电压，以使得所述输出电压与参考电压之间的差值的绝对值变小；
所述模拟稳压电路与所述电压输出端电连接，被配置为在被所述控制电路控制而工作时，将所述输出电压调节至所述参考电压；
所述参考电压大于所述第一电压，所述参考电压小于所述第二电压。
本公开实施例所述稳压模组在启动后，控制电路先控制通过数字稳压电路对输出电压进行粗调，由于数字稳压电路的调节速度快，则可以提高调节速度；并在所述输出电压大于第一电压而小于第二电压时，控制电路控制所述数字稳压电路停止工作，以节省功率；控制电路控制所述模拟稳压电路对所述输出电压进行微调，以将所述输出电压调节至参考电压，并使得保持为所述参考电压。通过采用本公开实施例所述的稳压模组，既可以提升电压调节速度，又可以保证电压调节精度。
可选的，所述控制电路还被配置为在所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号；
所述数字稳压电路还被配置为在接收到所述第一开启控制信号时，当判断到所述输出电压小于预先设定的参考电压时，控制调高所述输出电压，并当判断到所述输出电压大于所述参考电压时，控制调低所述输出电压，还被配置为在接收到所述第二关断控制信号时停止工作；
所述模拟稳压电路还被配置为在接收到所述第二开启控制信号时，将所述输出电压调节至所述参考电压，并被配置为在接收到所述第一关断控制信号时停止工作。
如图1所示，本公开实施例所述的稳压模组包括电压输出端Out、控制电路11、数字稳压电路12和模拟稳压电路13，其中，
所述控制电路11分别与所述电压输出端Out、所述数字稳压电路12和所述模拟稳压电路13电连接，被配置为在所述稳压模组启动时，向数字稳压电路12提供触发信号，并被配置为在所述电压输出端Out提供的输出电压Vout小于第一电压或大于第二电压时，向所述数字稳压电路12提供第一开启控制信号，通过稳压控制端S0向所述模拟稳压电路13提供第一关断控制信号，还被配置为当所述输出电压Vout大于第一电压而小于第二电压时，向所述数字稳压电路12提供第二关断控制信号，通过所述稳压控制端S0向 所述模拟稳压电路13提供第二开启控制信号；
所述数字稳压电路12与所述电压输出端Out电连接，被配置为在接收到所述触发信号后，控制调高所述输出电压Vout，并被配置为在接收到所述第一开启控制信号时，当判断到所述输出电压Vout小于预先设定的参考电压时，控制调高所述输出电压Vout，并当判断到所述输出电压Vout大于所述参考电压时，控制调低所述输出电压Vout，还被配置为在接收到所述第二关断控制信号时停止工作；
所述模拟稳压电路13与所述电压输出端Out电连接，被配置为在接收到所述第二开启控制信号时，将所述输出电压Vout调节至所述参考电压，并被配置为在接收到所述第一关断控制信号时停止工作。
在图1所示的实施例中，所述控制电路11还可以接入第一电压VL和第二电压VH，但不以此为限。
在本公开实施例中，参考电压在第一电压和第二电压之间，但不以此为限。
本公开实施例所述的稳压模组在工作时，在所述稳压模组启动时，向数字稳压电路12提供触发信号，所述数字稳压电路12在接收到所述触发信号后，控制调高所述输出电压Vout；
控制电路11在所述电压输出端Out提供的输出电压Vout小于第一电压或大于第二电压时，向所述数字稳压电路12提供第一开启控制信号，通过稳压控制端S0向所述模拟稳压电路13提供第一关断控制信号，所述数字稳压电路12在接收到所述第一开启控制信号时，当判断到所述输出电压Vout小于预先设定的参考电压时，控制调高所述输出电压Vout，并当判断到所述输出电压Vout大于所述参考电压时，控制调低所述输出电压Vout；所述模拟稳压电路13在接收到所述第一关断控制信号时停止工作；也即，当所述输出电压Vout与参考电压相差较大时，也即输出电压Vout小于第一电压或大于第二电压时，控制电路11控制所述数字稳压电路12调节输出电压，控制电路11控制所述模拟稳压电路13停止工作；
控制电路11在所述输出电压Vout大于第一电压而小于第二电压时，向所述数字稳压电路12提供第二关断控制信号，向所述模拟稳压电路13提供 第二开启控制信号，所述数字稳压电路12在接收到所述第二关断控制信号时停止工作，所述模拟稳压电路13在接收到所述第二开启控制信号时，将所述输出电压Vout调节至所述参考电压。
本公开实施例所述的稳压模组在工作时，在稳压模组启动后，控制电路11先控制通过数字稳压电路12对输出电压进行粗调，由于数字稳压电路12的调节速度快，则可以提高调节速度；并在所述输出电压Vout大于第一电压而小于第二电压时，控制电路11控制所述数字稳压电路12停止工作，以节省功率；控制电路11控制所述模拟稳压电路13对所述输出电压Vout进行微调，以将所述输出电压Vout调节至参考电压，并使得Vout保持为所述参考电压。通过采用本公开实施例所述的稳压模组，既可以提升电压调节速度，又可以保证电压调节精度。
如图2所示，在图1所示的稳压模组的实施例的基础上，所述数字稳压电路可以包括模数转换单元21、充电控制单元22和储能单元23；所述储能单元23与所述电压输出端Out电连接；
所述模数转换单元21分别与电压输出端Out、所述控制电路11和所述充电控制单元22电连接，所述数模转换单元21接入参考电压Vref，所述数模转换单元21被配置为当接收到所述触发信号或所述第一开启控制信号时，比较所述输出电压Vout与所述参考电压，当所述输出电压Vout小于所述参考电压时，向所述充电控制单元22提供第一充电控制信号，当所述输出电压Vout大于所述参考电压时，向所述充电控制单元22提供第一停止充电控制信号；
所述充电控制单元22分别与充电电压端V1和所述储能单元23电连接，被配置为在接收到所述第一充电控制信号时，控制充电电压端V1与所述储能单元23之间连通，以通过充电电压端V1提供的充电电压信号为所述储能单元23充电，并被配置为在接收到所述第一停止充电控制信号时，控制所述充电电压端V1与所述储能单元23之间断开。
在本公开实施例中，所述充电电压端V1可以为正电压端，但不以此为限。
本公开如图2所示的稳压模组的实施例在工作时，所述数模转换单元21 当接收到所述触发信号或所述第一开启控制信号时，根据Vout和参考电压，向充电控制单元22提供第一充电控制信号或第一停止充电控制信号；所述充电控制单元22在接收到所述第一充电控制信号时，控制通过充电电压信号为储能单元23充电，并在接收到所述第一停止充电控制信号时，控制停止通过充电电压信号为储能单元23充电。
在具体实施时，所述模数转换单元可以包括N位模数转换器；N为正整数；所述第一充电控制信号包括N个第一控制信号；
所述N位模数转换器分别与所述电压输出端、参考电压端和所述充电控制单元电连接，被配置为根据所述输出电压和所述参考电压，向所述充电控制单元输出所述N个第一控制信号，以控制所述充电电压端与所述储能单元之间连通或断开；
所述参考电压端被配置为提供参考电压。
在本公开实施例中，所述N位模数转换器可以为SAR(逐次逼近寄存器型)模数转换器。
在本公开实施例中，所述模数转换单元可以包括N位模数转换器，N位模数转换器输出N个第一控制信号，所述充电控制单元可以包括N个充电控制晶体管，第n充电控制晶体管受第n个第一控制信号控制而导通或关断。
可选的，所述充电控制单元包括N个充电控制晶体管；
第n充电控制晶体管的控制极接入第n个第一控制信号，第n充电控制晶体管的第一极与所述充电电压端电连接，第n充电控制晶体管的第二极与所述储能单元电连接；
n为小于或等于N的正整数。
在本公开实施例中，所述N个充电控制晶体管的类型相同，也即，所述N个充电控制晶体管都为p型晶体管，或者，所述N个充电控制晶体管都为n型晶体管。
在具体实施时，当所述模数转换单元可以包括N位模数转换器，N位模数转换器输出N个第一控制信号，所述充电控制单元包括N个充电控制晶体管，第n充电控制晶体管受第n个第一控制信号控制时，当所述N个充电控制晶体管为p型晶体管时，当第n个第一控制信号为低电压信号时，第n个 充电控制晶体管导通，当第n个第一控制信号为高电压信号时，第n个充电控制晶体管关断；当所述N个充电控制晶体管为n型晶体管时，当第n个第一控制信号为高电压信号时，第n个充电控制晶体管导通，当第n个第一控制信号为低电压信号时，第n个充电控制晶体管关断。在具体实施时，所述储能单元可以包括存储电容；
所述存储电容的第一端与所述电压输出端电连接，所述存储电容的第二端与地端电连接。
在具体实施时，所述存储电容的第二端也可以不限于与地端电连接，也可以与其他直流电压端电连接。
可选的，所述模拟稳压电路包括运算放大器、第一控制晶体管和第二控制晶体管；
所述运算放大器的第一输入端与所述电压输出端电连接，所述运算放大器的第二输入端接入参考电压，所述运算放大器的输出端与所述第二控制晶体管的控制极电连接；
所述第一控制晶体管的控制极与所述稳压控制端电连接，所述第一控制晶体管的第一极与第三电压端电连接，所述第一控制晶体管的第二极与所述第二控制晶体管的控制极电连接；
所述第二控制晶体管的第一极与第四电压端电连接，所述第二控制晶体管的第二极与所述储能单元电连接。在本公开实施例中，所述第三电压端可以为正电压端，所述第四电压端可以为正电压端，但不以此为限；根据第二控制晶体管的类型，第三电压端也可以为负电压端。
如图3所示，在图2所示的稳压模组的实施例的基础上，所述模拟稳压电路可以包括运算放大器Amp、第一控制晶体管T1和第二控制晶体管T2；
所述运算放大器Amp的第一输入端与所述电压输出端Out电连接，所述运算放大器Amp的第二输入端接入参考电压Vref，所述运算放大器Amp的输出端与所述第二控制晶体管T2的栅极电连接；所述运算放大器Amp的控制端与所述稳压控制端S0电连接；
所述第一控制晶体管T1的栅极与所述稳压控制端S0电连接，所述第一控制晶体管T1的源极与第三电压端V3电连接，所述第一控制晶体管T1的 漏极与所述第二控制晶体管T2的栅极电连接；
所述第二控制晶体管T2的源极与第四电压端V4电连接，所述第二控制晶体管T2的漏极与所述储能单元23电连接。
在图3所示的实施例中，T1和T2都为p型薄膜晶体管，但不以此为限。
本公开如图3所示的稳压模组的实施例在工作时，当所述模拟稳压电路工作时，控制电路11通过S0输出高电压信号，T1关断，当Out输出的输出电压Vout大于参考电压时，Amp输出高电压信号，T2关断，停止通过第四电压端V4提供的第四电压信号为储能单元23充电；当Vout小于参考电压时，Amp输出低电压信号，T2开启，通过所述第四电压信号为储能单元23充电，以提升Vout；
当所述模拟稳压电路不工作时，控制电路11通过S0输出低电压信号，T1导通，T2的栅极与第三电压信号V3之间连通，T2关断。
在具体实施时，所述控制电路可以包括控制单元、第一比较器和第二比较器；
所述第一比较器与所述电压输出端电连接，并所述第一比较器接入第一电压，所述第一比较器被配置为比较所述输出电压与第一电压，并将得到的第一比较结果传送至所述控制单元；
所述第二比较器与所述电压输出端电连接，并所述第二比较器接入第二电压，所述第二比较器被配置为比较所述输出电压与第二电压，并将得到的第二比较结果传送至所述控制单元；
所述控制单元分别与所述第一比较器、所述第二比较器、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号。
在本公开实施例中，所述控制单元可以为FSM(Finite State Machine，有限状态机)，但不以此为限。
如图4所示，在图1所示的稳压模组的实施例的基础上，所述控制电路可以包括控制单元41、第一比较器42和第二比较器43；
所述第一比较器42与所述电压输出端Out电连接，并所述第一比较器42接入第一电压VL，所述第一比较器42被配置为比较所述输出电压Vout与第一电压，并将得到的第一比较结果传送至所述控制单元41；所述第一电压值为所述第一电压VL；
所述第二比较器43与所述电压输出端Out电连接，并所述第二比较器43接入第二电压VH，所述第二比较器43被配置为比较所述输出电压Vout与第二电压，并将得到的第二比较结果传送至所述控制单元41；
所述控制单元41分别与所述第一比较器42、所述第二比较器43、所述数字稳压电路12和所述模拟稳压电路13电连接，被配置为在所述稳压模组启动时，向数字稳压电路12提供触发信号，并被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压Vout小于第一电压或大于第二电压时，向所述数字稳压电路12提供第一开启控制信号，通过稳压控制端S0向所述模拟稳压电路13提供第一关断控制信号，还被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压Vout大于第一电压而小于第二电压时，向所述数字稳压电路12提供第二关断控制信号，通过所述稳压控制端S0向所述模拟稳压电路13提供第二开启控制信号。
如图5所示，本公开实施例所述的稳压模组包括电压输出端Out、控制电路、数字稳压电路和模拟稳压电路，其中，
所述数字稳压电路包括模数转换单元、充电控制单元22和储能单元；
所述模数转换单元包括3位SAR模数转换器51；所述储能单元包括存储电容Cout；
所述充电控制单元22包括第一充电控制晶体管M1、第二充电控制晶体管M2和第三充电控制晶体管M3；
第一充电控制晶体管M1的栅极接入所述3位SAR模数转换器51输出的第一个第一控制信号S1，第一充电控制晶体管M1的源极与所述充电电压 端V1电连接，第一充电控制晶体管M1的漏极与所述存储电容Cout的第一端电连接；Cout的第二端与地端GND电连接；Cout的第一端还与电压输出端Out电连接；
第二充电控制晶体管M2的栅极接入所述3位SAR模数转换器51输出的第二个第一控制信号S2，第二充电控制晶体管M2的源极与所述充电电压端V1电连接，第二充电控制晶体管M2的漏极与所述存储电容Cout的第一端电连接；
第三充电控制晶体管M3的栅极接入所述3位SAR模数转换器51输出的第三个第一控制信号S3，第三充电控制晶体管M3的源极与所述充电电压端V1电连接，第三充电控制晶体管M3的漏极与所述存储电容Cout的第一端电连接；
所述模拟稳压电路包括运算放大器Amp、第一控制晶体管T1和第二控制晶体管T2；
所述运算放大器Amp的第一输入端与所述电压输出端Out电连接，所述运算放大器Amp的第二输入端接入参考电压Vref，所述运算放大器Amp的输出端与所述第二控制晶体管T2的栅极电连接；Amp的控制端与所述稳压控制端S0电连接；
所述第一控制晶体管T1的栅极与所述稳压控制端S0电连接，所述第一控制晶体管T1的源极与第三电压端V3电连接，所述第一控制晶体管T1的漏极与所述第二控制晶体管T2的栅极电连接；
所述第二控制晶体管T2的源极与第四电压端V4电连接，所述第二控制晶体管T2的漏极与Cout的第一端电连接；
所述控制电路包括控制单元41、第一比较器42和第二比较器43；
所述第一比较器42与所述电压输出端Out电连接，并所述第一比较器42接入第一电压VL，所述第一比较器42被配置为比较所述输出电压Vout与第一电压，并将得到的第一比较结果传送至所述控制单元41；
所述第二比较器43与所述电压输出端Out电连接，并所述第二比较器43接入第二电压VH，所述第二比较器43被配置为比较所述输出电压Vout与第二电压，并将得到的第二比较结果传送至所述控制单元41；
所述控制单元41分别与所述第一比较器42、所述第二比较器43、所述数字稳压电路12和所述模拟稳压电路13电连接，被配置为在所述稳压模组启动时，向数字稳压电路12提供触发信号，并被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压Vout小于第一电压或大于第二电压时，向所述数字稳压电路12提供第一开启控制信号，通过稳压控制端S0向所述模拟稳压电路13提供第一关断控制信号，还被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压Vout大于第一电压而小于第二电压时，向所述数字稳压电路12提供第二关断控制信号，通过所述稳压控制端S0向所述模拟稳压电路13提供第二开启控制信号
在图5所示的实施例中，所有的晶体管都为p型薄膜晶体管，所述控制单元为FSM，但不以此为限。
在图5所示的实施例中，采用3位SAR ADC(模数转换器)，用于功率、面积和响应时间的权衡，用于具有更好功率和面积的SoC芯片(系统级芯片)的多个分布式LDO(低压差稳压器)。
在图5所示的实施例中，标号为L0的为负载。
本公开如图5所示的稳压模组的实施例在工作时，
当稳压模组启动时，所述控制单元41向3位SAR模数转换器51提供触发信号，3位SAR模数转换器51控制提升Vout，并当Vout小于第一电压或Vout大于第二电压时，所述控制单元41向3位SAR模数转换器51提供第一开启控制信号，3位SAR模数转换器51根据Vout与参考电压之间的差值，控制输出S1、S2和S3，以控制M1、M2和M3的通断；具体的，当参考电压与Vout之间的差值较大时，S1、S2和S3都为低电压信号，M1、M2和M3都打开，以通过充电电压端V1提供的充电电压信号为Cout充电，并由于此时存在三个充电通道，因此充电速度较快；当参考电压与Vout之间的差值变小时，S1变为高电压信号，S2和S3为低电压信号，M1关断，M2和M3打开，此时存在两个充电通道；当参考电压与Vout之间的差值再变小时，S1和S2为高电压信号，S3为低电压信号，M1和M2关断，M3打开，此时存在一个充电通道；当Vout大于参考电压时，S1、S2和S3都为高电压信号，M1、M2和M3都关断；
当Vout小于第一电压或Vout大于第二电压时，控制单元41通过S0向Amp和T1提供低电压信号，以控制Amp停止工作，并使得T1打开，控制T2的栅极与V3之间连通，从而使得T2关断；
当Vout在第一电压和第二电压之间时，控制单元41向3位SAR模数转换器提供第二关断控制信号，控制单元41通过S0向Amp和T1提供高电压信号，以控制Amp工作，并使得T1关断；当Amp比较得到Vout大于参考电压时，Amp输出高电压信号，T2关断；当Amp比较得到Vout小于参考电压时，Amp输出低电压信号,T2导通，以通过V4提供的第四电压信号为Cout充电，以将Vout调节至参考电压。
图6是图5所示的稳压模组的实施例的仿真工作时序图。
由图6可知，在稳压模组启动后，控制单元41向3位SAR模数转换器52提供触发信号，3位SAR模数转换器52根据Vout与Vref生成S1、S2和S3，以提升Vout；
在第一阶段P1，Vout小于VL，控制单元41控制3位SAR模数转换器52工作；
在第二阶段P2，Vout上升至大于VL，控制单元41控制3位SAR模数转换器52停止工作，控制单元41控制Amp工作，以控制将Vout调节至Vref；
在第三阶段P3，负载变大，Vout突然变小而小于VL，控制单元41控制3位SAR模数转换器52工作而调升Vout，SAR模拟转换器52的调节幅度较较大则会使得Vout大于VH，在Vout大于VH后，3位SAR模数转换器52调降Vout，直至Vout小于VH；
在第四阶段P4，控制单元41控制3位SAR模数转换器52停止工作，控制单元41控制Amp工作，以控制将Vout调节至Vref。
在图6中，横轴是时间t，单位为秒，纵轴为Vout，单位为伏。
本公开实施例所述的电子装置可以包括上述的稳压模组。
在具体实施时，所述电子装置还可以包括Soc芯片(系统级芯片)，所述稳压模组可以为LDO(低压差稳压器)，LDO为Soc芯片提供结构简单，功耗低、快速、清洁的内部电源。
以上所述是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (11)

  1. 一种稳压模组，所述稳压模组包括电压输出端、控制电路、数字稳压电路和模拟稳压电路，其中，
    所述控制电路分别与所述电压输出端、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为在所述电压输出端提供的输出电压小于第一电压或大于第二电压时，控制所述数字稳压电路工作而所述模拟稳压电路不工作，当所述输出电压大于第一电压而小于第二电压时，控制所述模拟稳压电路工作而所述数字稳压电路不工作；
    所述数字稳压电路与所述电压输出端电连接，被配置为在接收到所述触发信号后，控制调高所述输出电压，并被配置为当被所述控制电路控制而工作时，控制调节所述输出电压，以使得所述输出电压与参考电压之间的差值的绝对值变小；
    所述模拟稳压电路与所述电压输出端电连接，被配置为在被所述控制电路控制而工作时，将所述输出电压调节至所述参考电压；
    所述参考电压大于所述第一电压，所述参考电压小于所述第二电压。
  2. 如权利要求1所述的稳压模组，其中，所述控制电路还被配置为在所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号；
    所述数字稳压电路还被配置为在接收到所述第一开启控制信号时，当判断到所述输出电压小于预先设定的参考电压时，控制调高所述输出电压，并当判断到所述输出电压大于所述参考电压时，控制调低所述输出电压，还被配置为在接收到所述第二关断控制信号时停止工作；
    所述模拟稳压电路还被配置为在接收到所述第二开启控制信号时，将所述输出电压调节至所述参考电压，并被配置为在接收到所述第一关断控制信 号时停止工作。
  3. 如权利要求2所述的稳压模组，其中，所述数字稳压电路包括模数转换单元、充电控制单元和储能单元；
    所述模数转换单元分别与所述控制电路、所述电压输出端和所述充电控制单元电连接，被配置为当接收到所述触发信号或所述第一开启控制信号时，比较所述输出电压与所述参考电压，当所述输出电压小于所述参考电压时，向所述充电控制单元提供第一充电控制信号，当所述输出电压大于所述参考电压时，向所述充电控制单元提供第一停止充电控制信号；
    所述充电控制单元分别与充电电压端和所述储能单元电连接，被配置为在接收到所述第一充电控制信号时，控制充电电压端与所述储能单元之间连通，以通过充电电压端提供的充电电压信号为所述储能单元充电，并被配置为在接收到所述第一停止充电控制信号时，控制所述充电电压端与所述储能单元之间断开。
  4. 如权利要求3所述的稳压模组，其中，所述模数转换单元包括N位模数转换器；N为正整数；所述第一充电控制信号包括N个第一控制信号；
    所述N位模数转换器分别与所述电压输出端、参考电压端和所述充电控制单元电连接，被配置为根据所述输出电压和所述参考电压，向所述充电控制单元输出所述N个第一控制信号，以控制所述充电电压端与所述储能单元之间连通或断开；
    所述参考电压端被配置为提供参考电压。
  5. 如权利要求4所述的稳压模组，其中，所述N位模数转换器为逐次逼近寄存器型模数转换器。
  6. 如权利要求4所述的稳压模组，其中，所述充电控制单元包括N个充电控制晶体管；
    第n充电控制晶体管的控制极接入第n个第一控制信号，第n充电控制晶体管的第一极与所述充电电压端电连接，第n充电控制晶体管的第二极与所述储能单元电连接；
    n为小于或等于N的正整数。
  7. 如权利要求3所述的稳压模组，其中，所述储能单元包括存储电容；
    所述存储电容的第一端与所述电压输出端电连接，所述存储电容的第二端与地端电连接。
  8. 如权利要求3所述的稳压模组，其中，所述模拟稳压电路包括运算放大器、第一控制晶体管和第二控制晶体管；
    所述运算放大器的第一输入端与所述电压输出端电连接，所述运算放大器的第二输入端接入参考电压，所述运算放大器的输出端与所述第二控制晶体管的控制极电连接；
    所述第一控制晶体管的控制极与所述稳压控制端电连接，所述第一控制晶体管的第一极与第三电压端电连接，所述第一控制晶体管的第二极与所述第二控制晶体管的控制极电连接；
    所述第二控制晶体管的第一极与第四电压端电连接，所述第二控制晶体管的第二极与所述储能单元电连接。
  9. 如权利要求3至8中任一权利要求所述的稳压模组，其中，所述控制电路包括控制单元、第一比较器和第二比较器；
    所述第一比较器与所述电压输出端电连接，并所述第一比较器接入第一电压，所述第一比较器被配置为比较所述输出电压与第一电压，并将得到的第一比较结果传送至所述控制单元；
    所述第二比较器与所述电压输出端电连接，并所述第二比较器接入第二电压，所述第二比较器被配置为比较所述输出电压的与第二电压，并将得到的第二比较结果传送至所述控制单元；
    所述控制单元分别与所述第一比较器、所述第二比较器、所述数字稳压电路和所述模拟稳压电路电连接，被配置为在所述稳压模组启动时，向数字稳压电路提供触发信号，并被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压小于第一电压或大于第二电压时，向所述数字稳压电路提供第一开启控制信号，通过稳压控制端向所述模拟稳压电路提供第一关断控制信号，还被配置为当根据所述第一比较结果和所述第二比较结果，得到所述输出电压大于第一电压而小于第二电压时，向所述数字稳压电路提供第二关断控制信号，通过所述稳压控制端向所述模拟稳压电路提供第二开启控制信号。
  10. 如权利要求9所述的稳压模组，其中，所述控制单元为有限状态机。
  11. 一种电子装置，所述电子装置包括如权利要求1至10中任一权利要求所述的稳压模组。
PCT/CN2021/095527 2020-12-25 2021-05-24 稳压模组和电子装置 WO2022134452A1 (zh)

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