WO2022121931A1 - 摩擦纳米发电突触晶体管 - Google Patents

摩擦纳米发电突触晶体管 Download PDF

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WO2022121931A1
WO2022121931A1 PCT/CN2021/136366 CN2021136366W WO2022121931A1 WO 2022121931 A1 WO2022121931 A1 WO 2022121931A1 CN 2021136366 W CN2021136366 W CN 2021136366W WO 2022121931 A1 WO2022121931 A1 WO 2022121931A1
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layer
electrode
oxide
transistor
intermediate layer
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PCT/CN2021/136366
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English (en)
French (fr)
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刘启晗
赵春
赵策洲
刘伊娜
杨莉
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西交利物浦大学
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Priority to EP21902636.6A priority Critical patent/EP4177959A1/en
Priority to US18/042,283 priority patent/US20230327579A1/en
Publication of WO2022121931A1 publication Critical patent/WO2022121931A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/84—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
    • H02N1/00—Electrostatic generators or motors using a solid moving electrostatic charge carrier
    • H02N1/04—Friction generators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/30—Piezoelectric or electrostrictive devices with mechanical input and electrical output, e.g. functioning as generators or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate

Definitions

  • the present application relates to a triboelectric nanometer power generation synapse transistor, which belongs to the technical field of semiconductor devices.
  • bionic synaptic transistors based on thin film transistor structures exhibit the characteristics of simple structure, low power, and complete synaptic characteristics, and have been widely received.
  • biomimetic synapse transistors also show certain application potential in biomimetic skin and biomimetic sensors.
  • the biomimetic synapse transistors are composed of circuits and devices such as rectifier bridges and sensors or triboelectric devices.
  • the bionic functions such as stimulus acquisition, signal transmission, and information storage show extremely high application value as the interaction of the neural network system and the external information acquisition port.
  • the integration of biomimetic synaptic transistors and stimulation acquisition terminals has been achieved through additional complex circuits, and additional power supply is required, which is not conducive to applications such as flexible electronic devices, wearable devices, and biomimetic skin.
  • the present application provides a triboelectric nano-power generation synapse transistor, which requires no additional power supply, is lightweight, flexible, and has a simple structure.
  • a triboelectric nanogenerator synapse transistor comprising: a triboelectric nanogenerator and a synapse transistor, a substrate; an electrode layer formed on the substrate; a shared intermediate layer formed on the electrode layer; The active layer, the source electrode and the drain electrode of the synapse transistor on the shared intermediate layer; and the positive friction layer and the negative friction layer formed on the shared intermediate layer; wherein, the shared intermediate layer serves as the synaptic transistor The dielectric layer of the triboelectric nanogenerator and the middle layer of the triboelectric nanogenerator, the electrode layer serves as the output electrode of the triboelectric nanogenerator and the gate electrode of the synaptic transistor; by rubbing the negative friction layer with a positive friction material Or by rubbing the positive friction layer with a negative friction material, the shared intermediate layer generates a pulse voltage, and the charges in the shared intermediate layer are transferred to change the conductivity of the active layer of the synaptic transistor, and in the An exc
  • FIG. 1 is a schematic structural diagram of a triboelectric nano-electricity synapse transistor shown in the application;
  • Fig. 2 is the open-circuit voltage diagram of no shared intermediate layer in the triboelectric nano-electricity synapse transistor shown in Fig. 1;
  • Fig. 3 is the open circuit voltage diagram of the nanogenerator end realized by the triboelectric nanogenerator synapse transistor shown in Fig.1 using alumina high dielectric material as a shared intermediate layer;
  • Figure 4 is a graph of excitatory postsynaptic currents with enhanced properties of the triboelectric nanoelectric synaptic transistor shown in Figure 1;
  • FIG. 5 is a graph of excitatory postsynaptic currents with decay characteristics of the triboelectric nanoelectric synaptic transistor shown in FIG. 1 .
  • the self-driven triboelectric nano-electricity synapse transistor shown in an embodiment of the present application includes a triboelectric nanogenerator and a synaptic transistor, and the self-driven triboelectric nano-electricity synapse transistor includes a substrate 11 ; it is formed on the substrate 11
  • the electrode layer 12 on the top; the shared interlayer 13 formed on the electrode layer 12; the synapse transistor active layer 16, the source electrode 17, and the drain electrode 18 formed on the shared interlayer 13; and formed on the shared interlayer 13
  • the positive friction layer 14 and the negative friction layer 15 share the intermediate layer 13 as the dielectric layer of the synaptic transistor and the intermediate layer of the triboelectric nanogenerator, and the electrode layer 12 acts as the output electrode of the triboelectric nanogenerator and the gate electrode of the synaptic transistor.
  • the shared intermediate layer 13 generates a pulse voltage
  • the charge in the shared intermediate layer 13 is transferred to change the conductivity of the active layer 16 of the synaptic transistor, and the source electrode 17 and the drain electrode 18 produces excitatory postsynaptic current (excitatory postsynaptic current).
  • the material of the shared intermediate layer 13 is a high-dielectric material, and the high-dielectric material is a high-dielectric material with synaptic effect or a high-dielectric material with ferroelectric polarization characteristics.
  • the high dielectric material is one or a combination of two or more selected from gallium oxide, hafnium oxide, aluminum oxide, tantalum oxide, iridium oxide, zirconium oxide, lanthanum oxide, lithium oxide, and scandium oxide.
  • the high dielectric material can also be other materials, which are not listed here.
  • the thickness of the shared intermediate layer 13 is in the range of 20-80 nm. In this embodiment, the shared intermediate layer 13 is made of high-dielectric alumina material.
  • the substrate 11 is any one of glass, silicon dioxide, polyimide, polyethylene terephthalate, and polyethylene naphthalate.
  • the substrate 11 may be a rigid substrate or a flexible substrate.
  • the substrate 11 is single crystal silicon and silicon dioxide with a thickness of 20-200 nm is formed on the surface of the single crystal silicon.
  • the material of the substrate 11 is here Without limitation, other materials may also be used, which will not be listed one by one here, and an appropriate substrate 11 may be selected according to actual needs.
  • the materials of the electrode layer 12 , the source electrode 17 and the drain electrode 18 are one or a combination of two or more of indium zinc oxide, indium tin oxide, zinc aluminum oxide, titanium nitride, gold, silver, copper, and aluminum.
  • the thickness of the electrode layer 12 is in the range of 200-400 nm, and the thickness of the source electrode 17 and the drain electrode 18 is in the range of 200-400 nm.
  • the materials of the electrode layer 12 , the source electrode 17 and the drain electrode 18 are not limited here, and may also be other materials, which will not be listed one by one here.
  • the motor layer is indium tin oxide (ITO), and the material of the source electrode 17 and the drain electrode 18 is aluminum.
  • the positions of the source electrode 17 and the drain electrode 18 are not limited here, and the distance between the source electrode 17 and the drain electrode 18 can be selected according to the actual situation, which is not repeated here.
  • the material of the active layer 16 of the synapse transistor is one of an organic semiconductor material and an inorganic semiconductor material.
  • the materials of the synapse transistor active layer 16 are not listed here, and can be selected according to actual needs, and the thickness range of the synapse transistor active layer 16 can also be set according to actual needs. 16 has a thickness range of 5-100 nm.
  • the active layer 16 of the synaptic transistor is made of indium oxide semiconductor.
  • the positive friction layer 14 is prepared by using a material that is more likely to lose electrons.
  • the negative friction layer 15 is prepared by using materials that are easier to obtain electrons.
  • the materials of the positive friction layer 14 and the negative friction layer 15 are not listed here.
  • the thickness of the positive friction layer 14 and the negative friction layer 15 is in the range of 0.1-1 mm, which is not limited here, and can be set according to actual needs.
  • the positive friction layer 14 is a copper foil
  • the negative friction layer 15 is a polytetrafluoroethylene film.
  • Step 1 Cleaning and hydrophilic treatment of the substrate
  • the cleaned substrate is put into an ultraviolet ozone cleaning machine, and the surface ozone cleaning is performed for 10-30 minutes to obtain a substrate with a hydrophilic surface.
  • ITO with a thickness of 200-400 nm is prepared on the surface of the substrate to obtain an electrode layer. If an electrode layer with a pattern needs to be prepared, a mask with a corresponding pattern can be provided on the substrate during the preparation process.
  • the substrate with ITO is cleaned by ozone on the surface of the ultraviolet ozone cleaning machine for 10-30min; the alumina precursor solution is prepared.
  • 0.23-2.3g of aluminum nitrate nonahydrate and 0.094-0.94 g of urea was dissolved in 5-50 ml of ethanol and magnetically stirred for 5-20 minutes, after filtering through a 0.22 ⁇ m pore size polytetrafluoroethylene filter; the alumina precursor solution was dropped on the ITO surface and stirred at 2000-6000 rpm Spin down for 10-60s; place the spin-coated sample with the alumina precursor solution on a heating plate and anneal at 250-350°C to obtain an alumina film with a thickness of 20-80 nm.
  • a mask with a corresponding pattern can be set on the surface of the ITO during the ozone cleaning process, and selective cleaning can be performed to obtain an aluminum oxide film with a pattern.
  • an indium oxide semiconductor precursor solution in one embodiment, 0.22-2.2 g of indium nitrate hydrate is dissolved in 5 ml of deionized water, and stirred evenly; the indium oxide semiconductor precursor is sprayed on the aluminum oxide film by inkjet printing solution; annealed at 250-350° C. to obtain a 5-100 nm thick synaptic transistor active layer.
  • the source electrode and the drain electrode can also have patterns, and the patterns can be selected according to the actual situation.
  • a positive friction layer is obtained by covering a copper foil with single-sided adhesiveness on a designated area on the aluminum oxide film, and the thickness of the copper foil is 0.1-1 mm.
  • the negative friction layer is obtained by covering a designated area on the aluminum oxide film with a polytetrafluoroethylene film with single-sided adhesiveness, and the thickness of the polytetrafluoroethylene film is 0.1-1 mm.
  • Fig. 2 is the open-circuit voltage diagram of the self-driven triboelectric nanogenerating synapse transistor without a shared intermediate layer
  • Fig. 2 is a blank control
  • the peak voltage is about 15 volts.
  • Figure 3 is the open circuit voltage diagram of the self-driven triboelectric nanogenerating synapse transistor realized by using alumina high dielectric material as a shared intermediate layer, the voltage peak is about 30 volts, compared with no shared intermediate layer, alumina high dielectric material As a shared intermediate layer, the open circuit voltage is significantly improved, resulting in an increase in open circuit voltage of about 100%, which increases the output of the triboelectric nanogenerator.
  • the positive charge or negative charge is collected by the triboelectric nanogenerator, so as to realize the enhancement or inhibition effect of the excitatory postsynaptic current of the synaptic transistor, and achieve the integration effect of the triboelectric nanogenerator self-driven synaptic transistor.
  • the self-driven triboelectric nano-electricity synapse transistor obtained in this example has enhanced characteristics.
  • the positive stimulation pulse signal induced by the negative friction layer acts on the gate of the synaptic transistor. This resulted in the enhancement of excitatory postsynaptic currents as shown in Figure 4. Referring to FIG.
  • the self-driven triboelectric nano-electricity synapse transistor obtained in this embodiment has attenuation characteristics.
  • the negative stimulation pulse signal induced by the positive friction layer acts on the gate of the synaptic transistor. This produces the inhibitory effect of excitatory postsynaptic currents as shown in Figure 5.
  • the excitatory postsynaptic current and the excitatory postsynaptic current are exactly the same, and they are both translated words, and no distinction is made here.
  • Triboelectric nanogenerators have the advantages of low cost, high efficiency, and no pollution, and have great advantages in mechanical motion energy harvesting. Therefore, the application of triboelectric nanogenerators in self-driven flexible electronic devices and smart wearable devices has received increasing attention.
  • the present application integrates triboelectric nanogenerators and bionic synaptic devices to obtain self-driven triboelectric nanogenerators that can not only respond to external stimuli and collect energy to generate electrical signals, but also realize bionic synaptic functions driven by the generated electrical signals. touch transistor.
  • the obtained self-driven triboelectric nanogenerator synapse transistor has a simple structure, light weight and flexibility, and can self-drive to realize the function of the bionic synapse transistor.
  • the shared intermediate layer uses high dielectric materials, which improves the output voltage of the triboelectric nanogenerator and enables the synaptic function of the synaptic transistor.

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Abstract

本申请涉及的摩擦纳米发电突触晶体管，包括摩擦纳米发电机和突触晶体管，包括衬底；形成在衬底上的电极层；形成在电极层上的共享中间层；形成在共享中间层上的突触晶体管有源层、源电极和漏电极；以及形成在共享中间层上的正摩擦层和负摩擦层，共享中间层作为突触晶体管的介电层以及摩擦纳米发电机的中间层。

Description

摩擦纳米发电突触晶体管
本申请要求在2020年12月08日提交中国专利局、申请号为202011421752.7的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及一种摩擦纳米发电突触晶体管，属于半导体器件技术领域。
背景技术
智能时代带来的大数据和高效人机交互的需求，对复杂信息的处理和储存提出了更高的要求。相较于人脑的低功率和小体积，计算机系统存在明显不足，近年来，模仿人脑的信息处理方式开发出的类神经网络计算系统，提供了一条通往高效运算的潜在途径。神经网络系统大多运用互补型金属氧化物半导体技术，虽然类似神经网络的计算功能能够在结合代码算法的条件下实现，但是神经网络系统的效率仍远低于人脑。这其中的根本原因是没有摆脱冯·诺依曼构架的限制，因此，从基于单个器件出发模拟人脑中的神经元与突触的工作原理，实现人脑的低功率高效运算，是解决此问题的有效方法。因此，模仿生物突触的结构和工作机理并制备具有生物突触功能的仿生人工突触器件是实现低功率高功效的神经网络的重点。近年来，海内外诸多研究机构涌现诸多基于仿生人工突触器件的申请，其中，基于薄膜晶体管结构的仿生突触晶体管展现出了结构简单、低功率、以及突触特性完备等特点并受到了广泛的关注，同时仿生突触晶体管也在仿生皮肤、仿生传感器中展现出了一定的应用潜力，将仿生突触晶体管通过电路以及例如整流桥等器件与传感器或摩擦发电器件组成系统，可以实现对于外部刺激的采集、信号传输、信息储存等仿生功能，作为类神经网络系统的交互以及外部信息采集端口展现出了极高的应用价值。但是，近年来的研究通过外加的复杂电路实现仿生突触晶体管与刺激采集端的集成并需要额外的电源供应，不利于应用于柔性电子器件、可穿戴设备与仿生皮肤等运用。
发明内容
本申请提供一种摩擦纳米发电突触晶体管，实现无需额外供电，轻便、柔性、且结构简单。
提供一种摩擦纳米发电突触晶体管，包括：摩擦纳米发电机和突触晶体管，衬底；形成在所述衬底上的电极层；形成在所述电极层上的共享中间层；形成在所述共享中间层上的突触晶体管有源层、源电极和漏电极；以及形成在所述 共享中间层上的正摩擦层和负摩擦层；其中，所述共享中间层作为所述突触晶体管的介电层以及所述摩擦纳米发电机的中间层，所述电极层作为所述摩擦纳米发电机的输出电极以及所述突触晶体管的栅电极；通过使用正摩擦材料摩擦所述负摩擦层或通过使用负摩擦材料摩擦所述正摩擦层，所述共享中间层产生脉冲电压，所述共享中间层中的电荷发生转移从而改变所述突触晶体管有源层的电导率，并在所述源电极和漏电极之间产生兴奋性突触后电流。
附图说明
图1为本申请所示的摩擦纳米发电突触晶体管的结构示意图；
图2为图1中所示的摩擦纳米发电突触晶体管中无共享中间层的开路电压图；
图3为图1中所示的摩擦纳米发电突触晶体管将氧化铝高介电材料作为共享中间层实现的纳米发电机端的开路电压图；
图4为图1中所示的摩擦纳米发电突触晶体管具有增强特性的兴奋性突触后电流图；
图5为图1中所示的摩擦纳米发电突触晶体管具有衰减特性的兴奋性突触后电流图。
具体实施方式
下面将结合附图对本申请的技术方案进行描述，所描述的实施例是本申请一部分实施例，而不是全部的实施例。
此外，下面所描述的本申请不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。
请参见图1，本申请一实施例所示的自驱动摩擦纳米发电突触晶体管，包括摩擦纳米发电机和突触晶体管，自驱动摩擦纳米发电突触晶体管包括衬底11；形成在衬底11上的电极层12；形成在电极层12上的共享中间层13；形成在共享中间层13上的突触晶体管有源层16、源电极17和漏电极18；以及形成在共享中间层13上的正摩擦层14和负摩擦层15，共享中间层13作为突触晶体管的介电层以及摩擦纳米发电机的中间层，电极层12作为摩擦纳米发电机的输出电 极以及突触晶体管的栅电极，摩擦正摩擦层14或负摩擦层15，共享中间层13产生脉冲电压，共享中间层13中的电荷发生转移从而改变突触晶体管有源层16的电导率，并在源电极17和漏电极18之间产生兴奋性突触后电流(excitatory postsynaptic current)。
其中，共享中间层13的材料为高介电材料，且高介电材料为具有突触效应的高介电材料或具有铁电极化特性的高介电材料。高介电材料为氧化镓、氧化铪、氧化铝、氧化钽、氧化铱、氧化锆、氧化镧、氧化锂、氧化钪中的一种或两种以上的组合。高介电材料还可以为其他材料，在此不一一列举。共享中间层13的厚度范围为20-80nm。本实施例中，共享中间层13为氧化铝高介电材料。
衬底11为玻璃、二氧化硅、聚酰亚胺、聚对苯二甲酸乙二醇酯、聚萘二甲酸乙二醇酯中的任一种。衬底11可以为刚性衬底或者柔性衬底，本实施例中，衬底11为单晶硅且单晶硅的表面上形成有20-200nm厚度的二氧化硅，衬底11的材料在此不做限定，还可以其他材料，在此不一一列举，可根据实际需要选择合适的衬底11。
电极层12、源电极17以及漏电极18的材料为氧化铟锌、氧化铟锡、氧化锌铝、氮化钛、金、银、铜、铝中的一种或两种以上的组合。电极层12的厚度范围为200-400nm，源电极17和漏电极18的厚度范围为200-400nm。关于电极层12、源电极17以及漏电极18的材料在此不做限定，还可以为其他材料，在此不一一列举。本实施例中，电机层为氧化铟锡ITO，源电极17和漏电极18的材料为铝。源电极17和漏电极18的位置在此不做限定，源电极17和漏电极18之间的距离可根据实际进行选择，在此不再赘述。
突触晶体管有源层16的材料为有机半导体材料和无机半导体材料中的一种。关于突触晶体管有源层16的材料在此不一一列举，可根据实际需要进行选择，且突触晶体管有源层16的厚度范围也根据实际需要进行设置即可，突触晶体管有源层16的厚度范围为5-100nm。本实施例中，突触晶体管有源层16由氧化铟半导体制备得到。
正摩擦层14采用更易失去电子的材料制备得到。负摩擦层15采用更易得到电子的材料制备得到。关于正摩擦层14和负摩擦层15的材料在此不一一列举。正摩擦层14和负摩擦层15的厚度的范围为0.1-1mm，在此不做限定，可根据实际需要进行设置。本实施例中，正摩擦层14为铜箔，负摩擦层15为聚四氟乙烯薄膜。
关于制备上述自驱动摩擦纳米发电突触晶体管的制备方法，下面进行说明。
步骤一、清洗并亲水处理衬底
提供表面具有20-200nm厚的二氧化硅的单晶硅作为衬底；将衬底完全浸入丙酮溶液中，超声清洗10-30min；再将衬底转移并完全浸入异丙醇溶液中，超声清洗10-30min；之后将衬底完全浸入乙醇溶液中，超声清洗10-30min；最后用去离子水冲洗衬底并用氮气吹干，从而完成了对衬底的清洗。
将清洗完成的衬底放入紫外臭氧清洗机内，并进行10-30min的表面臭氧清洗，得到表面亲水的衬底。
步骤二、制备电极层
使用磁控溅射工艺，在衬底表面上制备200-400nm厚的ITO得到电极层。若需要制备具有图形的电极层，则可以在制备过程中在衬底上设置具有相应图案的掩模版。
步骤三、制备共享中间层
先将具有ITO的衬底在紫外臭氧清洗机内进行10-30min的表面臭氧清洗；制备氧化铝前驱体溶液，在一实施例中，将0.23-2.3g的硝酸铝九水合物和0.094-0.94g的尿素溶于5-50ml的乙醇中并进行5-20分钟的磁力搅拌，通过0.22μm孔径的聚四氟乙烯过滤嘴过滤后；将氧化铝前驱体溶液滴在ITO表面上并在2000-6000rpm下旋涂10-60s；将旋涂后的带有氧化铝前驱体溶液的样品放置在加热板上，在250-350℃下退火处理，得到20-80nm厚的氧化铝薄膜。
若需要制备具有图形的共享中间层，则可以在臭氧清洗过程中在ITO表面上设置具有相应图案的掩模版，进行选择性清洗，则可得到具有图形的氧化铝薄膜。
步骤四、制备突触晶体管有源层
制备氧化铟半导体前驱体溶液，在一实施例中，将0.22-2.2g的硝酸铟水合物溶于5ml的去离子水中，搅拌均匀；通过喷墨打印在氧化铝薄膜上喷涂氧化铟半导体前驱体溶液；在250-350℃下退火处理，得到5-100nm厚的突触晶体管有源层。
若需要制备具有图形的突触晶体管有源层，喷墨打印即可实现，在此不再赘述。
步骤五、制备源电极和漏电极
先在突触晶体管有源层上覆盖掩模版，然后在氧化铝薄膜上进行电子束蒸镀200-400nm厚的带有图形的铝作为源电极和漏电极。源电极和漏电极也可以具有图形，图形可根据实际进行选择。
步骤六、制备正摩擦层
通过在氧化铝薄膜上的指定区域覆盖具有单面粘性的铜箔，铜箔的厚度为0.1-1mm，得到正摩擦层。
步骤七、制备负摩擦层
通过在氧化铝薄膜上的指定区域覆盖具有单面粘性的聚四氟乙烯薄膜，聚四氟乙烯薄膜的厚度为0.1-1mm，得到负摩擦层。
本申请将突触晶体管和摩擦纳米发电机集成，通过共享突触晶体管介电层和摩擦纳米发电机中间层，既减少了制备工艺流程和成本，也提升了摩擦纳米发电机输出。请参见图2和图3，图2为无共享中间层的自驱动摩擦纳米发电突触晶体管的开路电压图，图2作为空白对照，电压峰值约为15伏特。图3为将氧化铝高介电材料作为共享中间层实现的自驱动摩擦纳米发电突触晶体管的开路电压图，电压峰值约为30伏特，相比于无共享中间层，氧化铝高介电材料作为共享中间层显著提升了开路电压，产生了约为100％的开路电压增幅，即提升了摩擦纳米发电机输出。
通过摩擦纳米发电机采集正电荷或负电荷，从而实现突触晶体管的兴奋性突触后电流增强或抑制效果，达到摩擦纳米发电自驱动突触晶体管的集成效果。请参见图4，本实施例得到的自驱动摩擦纳米发电突触晶体管具有增强特性，通过使用正摩擦材料摩擦负摩擦层，负摩擦层感应产生的正向刺激脉冲信号作用于突触晶体管的栅极从而产生了如图4所示的兴奋性突触后电流的增强效果。请参见图5，本实施例得到的自驱动摩擦纳米发电突触晶体管具有衰减特性，通过使用负摩擦材料摩擦正摩擦层，正摩擦层感应产生的负向刺激脉冲信号作用于突触晶体管的栅极从而产生了如图5所示的兴奋性突触后电流的抑制效果。兴奋性后突触电流和兴奋性突触后电流完全相同，都是翻译的用词，在此不做区分。
摩擦纳米发电机具有成本低、高效率、无污染等优点并在机械运动能量收集上具有巨大的优势。因此，摩擦纳米发电机在自驱动的柔性电子器件以及智能可穿戴设备的应用收到了越来越多的关注。本申请将摩擦纳米发电机和仿生突触器件集成，得到既能对外界刺激响应并收集能量从而产生电信号，也能在产生的电信号驱动下实现仿生突触功能的自驱动摩擦纳米发电突触晶体管。因为摩擦纳米发电机结构的引入，实现了对于外界刺激的响应以及能量收集，从而不需要额外供电，便可驱动突触晶体管并产生兴奋性突触后电流，实现诸如突触抑制、增强等仿生功能。
综上，(1)将摩擦纳米发电机和仿生突触晶体管集成，得到的自驱动摩擦纳米发电突触晶体管结构简单，轻便且柔性，能够自驱动实现仿生突触晶体管功能。
(2)无需外部供电即可产生电荷转移从而驱动突触晶体管并产生兴奋性突触后电流。
(3)共享中间层使用高介电材料，提升了摩擦纳米发电机的输出电压并能够实现突触晶体管的突触功能。
以上所述实施例的多个技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的多个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。

Claims (7)

  1. 一种摩擦纳米发电突触晶体管，包括：摩擦纳米发电机和突触晶体管，衬底；形成在所述衬底上的电极层；形成在所述电极层上的共享中间层；形成在所述共享中间层上的突触晶体管有源层、源电极和漏电极；以及形成在所述共享中间层上的正摩擦层和负摩擦层；其中，所述共享中间层作为所述突触晶体管的介电层以及所述摩擦纳米发电机的中间层，所述电极层作为所述摩擦纳米发电机的输出电极以及所述突触晶体管的栅电极；通过使用正摩擦材料摩擦所述负摩擦层或通过使用负摩擦材料摩擦所述正摩擦层，所述共享中间层产生脉冲电压，所述共享中间层中的电荷发生转移从而改变所述突触晶体管有源层的电导率，并在所述源电极和所述漏电极之间产生兴奋性突触后电流。
  2. 如权利要求1所述的摩擦纳米发电突触晶体管，其中，所述共享中间层的材料为高介电材料。
  3. 如权利要求2所述的摩擦纳米发电突触晶体管，其中，所述高介电材料为具有突触效应的高介电材料或具有铁电极化特性的高介电材料。
  4. 如权利要求2所述的摩擦纳米发电突触晶体管，其中，所述高介电材料为氧化镓、氧化铪、氧化铝、氧化钽、氧化铱、氧化锆、氧化镧、氧化锂、氧化钪中的一种或两种以上的组合。
  5. 如权利要求1所述的摩擦纳米发电突触晶体管，其中，所述衬底为玻璃、二氧化硅、聚酰亚胺、聚对苯二甲酸乙二醇酯、聚萘二甲酸乙二醇酯中的任一种。
  6. 如权利要求1所述的摩擦纳米发电突触晶体管，其中，所述电极层、所述源电极以及所述漏电极的材料为氧化铟锌、氧化铟锡、氧化锌铝、氮化钛、金、银、铜、铝中的一种或两种以上的组合。
  7. 如权利要求1所述的摩擦纳米发电突触晶体管，其中，所述突触晶体管有源层的材料为有机半导体材料和无机半导体材料中的一种。
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