WO2022104668A1 - Vcsel驱动电路及装置 - Google Patents

Vcsel驱动电路及装置 Download PDF

Info

Publication number
WO2022104668A1
WO2022104668A1 PCT/CN2020/130278 CN2020130278W WO2022104668A1 WO 2022104668 A1 WO2022104668 A1 WO 2022104668A1 CN 2020130278 W CN2020130278 W CN 2020130278W WO 2022104668 A1 WO2022104668 A1 WO 2022104668A1
Authority
WO
WIPO (PCT)
Prior art keywords
vcsel
unit
signal
voltage
control unit
Prior art date
Application number
PCT/CN2020/130278
Other languages
English (en)
French (fr)
Inventor
杜灿鸿
林玉波
Original Assignee
深圳市汇顶科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2020/130278 priority Critical patent/WO2022104668A1/zh
Publication of WO2022104668A1 publication Critical patent/WO2022104668A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/42—Arrays of surface emitting lasers

Definitions

  • the present application relates to circuit technology, and in particular, to a vertical cavity surface emitting laser (Vertical Cavity Surface Emitting Laser, VCSEL) drive circuit and device.
  • VCSEL Vertical Cavity Surface Emitting Laser
  • VCSELs As an illumination light source, VCSELs have been widely used in the prior art. For example, in 3D Time of Flight (3D ToF) imaging technology, VCSELs need to be used as illumination light sources. The imaging principle of 3D ToF determines that the VCSEL needs to be switched and driven during imaging.
  • 3D ToF 3D Time of Flight
  • the driving circuit of the VCSEL usually drives and controls the turning on or off of the VCSEL by controlling the turning on or off of the transistors in the driving circuit.
  • the driving circuit in order to keep the VCSEL emitting stable light, the driving circuit usually adopts a constant current driving mode.
  • the constant current driving mode the driving current of the internal transistor of the driving circuit is controlled to keep the driving current constant, so that the optical power of the VCSEL is kept constant, thereby keeping the VCSEL emitting stably.
  • the on-voltage drop of the transistor inside the driving circuit is relatively high, resulting in relatively large driving loss and low driving efficiency.
  • the present application provides a VCSEL driving circuit and device, which reduces the driving loss and has high driving efficiency.
  • the present application provides a VCSEL drive circuit, comprising: a drive control unit and a power supply unit connected to the drive control unit;
  • the drive control unit is used to control the on or off of the VCSEL using a switch drive mode according to the input pulse signal, and output voltage control according to the optical power sensing signal of the VCSEL and the preset operating current setting signal of the VCSEL Signal;
  • the power supply unit is configured to control the magnitude of the voltage for supplying power to the VCSEL according to the voltage control signal, so that the current when the VCSEL is turned on is a preset operating current.
  • the drive control unit includes a drive unit, an optical power sensing unit and a control unit;
  • the first end of the drive unit is connected to the input pulse signal; the second end of the drive unit is the VCSEL drive signal end; the input end of the optical power sensing unit is connected to the photodiode or to the drive unit The second end is connected; the output end of the optical power sensing unit is connected with the first input end of the control unit; the second input end of the control unit is the preset working current setting signal input end; the The output end of the control unit is connected with the power supply unit;
  • the driving unit configured to control the turn-on or turn-off of the VCSEL according to the input pulse signal
  • the optical power sensing unit for acquiring the optical power sensing signal of the VCSEL
  • the control unit is configured to determine a voltage control signal according to the optical power sensing signal and the preset operating current setting signal.
  • the drive unit includes a switch drive circuit and a first switch tube;
  • the input end of the switch drive circuit is connected to the input pulse signal; the output end of the switch drive circuit is connected to the first end of the first switch tube; the second end of the first switch tube is the VCSEL drive signal terminal; the third terminal of the first switch tube is grounded;
  • the switch driving circuit is configured to control the first switch tube to be in an on state according to the input pulse signal, so as to control the VCSEL to be turned on, or to control the first switch tube to be turned off according to the input pulse signal. off state to control the VCSEL to turn off.
  • an input end of the optical power sensing unit is connected to a photodiode, and the optical power sensing unit includes a first operational amplifier unit and a first timing control unit;
  • the first operational amplifier unit is connected to the photodiode, the input terminal of the first timing control unit is connected to the input pulse signal; the output terminal of the first timing control unit is connected to the first operational amplifier unit ;
  • the photodiode is used to detect the light intensity of the VCSEL
  • the first timing control unit is configured to control the first operational amplifier unit to output the optical power sensing signal according to the light intensity when the VCSEL is turned on.
  • the optical power sensing unit includes a second operational amplifier unit and a second timing control unit;
  • the second operational amplifier unit is connected to the second end of the first switch tube; the input end of the second timing control unit is connected to the input pulse signal; the output end of the second timing control unit is connected to the The second operational amplifier unit is connected;
  • the second timing control unit is configured to control the second operational amplifier unit to output the optical power sensing signal according to the voltage on the first switch tube when the VCSEL is turned on.
  • the third end of the first switch tube is grounded through a first resistor;
  • the optical power sensing unit includes a third operational amplifier unit and a third timing control unit;
  • the third operational amplifier unit is connected to the third terminal of the first switch tube; the input terminal of the third timing control unit is connected to the input pulse signal; the output terminal of the third timing control unit is connected to the The third operational amplifier unit is connected;
  • the third timing control unit is configured to control the third operational amplifier unit to output the optical power sensing signal according to the voltage on the first resistor when the VCSEL is turned on.
  • control unit includes: an analog-to-digital conversion unit, an error correction unit, and a digital-to-analog conversion unit;
  • the analog-to-digital conversion unit is used to convert the optical power sensing signal into a digital sensing signal
  • the error correction unit is configured to determine the digital voltage control signal corresponding to the current pulse signal according to the digital sensing signal, the preset working current setting signal and the pre-stored digital voltage control signal corresponding to the previous pulse signal;
  • the digital-to-analog conversion unit is used for converting the digital voltage control signal corresponding to the current pulse signal into the voltage control signal.
  • control unit includes: an analog subtractor, an analog adder, and an analog memory;
  • the first input end of the analog subtractor is connected to the output end of the optical power sensing unit, and the second input end of the analog subtractor is the input end of the preset working current setting signal; the analog adder The first input end of the analog subtractor is connected to the output end of the analog subtractor and the output end of the analog memory respectively, the second input end of the analog adder is grounded, and the output end of the analog adder is connected to the power supply unit connection; the input end of the analog memory is connected with the output end of the analog adder;
  • the analog subtractor is configured to determine an error signal according to the preset working current setting signal and the optical power sensing signal
  • the analog memory is used to output the voltage control signal corresponding to the last pulse signal
  • the analog adder is configured to output the voltage control signal according to the error signal and the voltage control signal corresponding to the last pulse signal.
  • the power supply unit includes: a first feedback amplifier, a first regulating tube and a first voltage regulating circuit;
  • the non-inverting end of the first feedback amplifier is connected to the output end of the drive control unit; the reverse end of the first feedback amplifier is connected to the first voltage regulating circuit; the input end of the first regulating tube is connected to the The output end of the first feedback amplifier is connected; the output end of the first regulating tube is connected with the first voltage regulating circuit, and the output end of the first regulating tube outputs the supply voltage of the VCSEL;
  • the first regulating tube is used for regulating the magnitude of the voltage supplied to the VCSEL under the control of the first feedback amplifier and the first voltage regulating circuit.
  • the first voltage adjustment circuit includes a second resistor and a third resistor
  • the first end of the second resistor is connected to the reverse end of the feedback amplifier, the second end of the second resistor is connected to the output end of the regulating tube; the first end of the third resistor is connected to the The first end of the second resistor is connected, and the second end of the third resistor is grounded.
  • the power supply unit includes: a second feedback amplifier, a second regulating tube and a second voltage regulating circuit;
  • the non-inverting terminal of the second feedback amplifier is connected to the reference voltage signal; the reverse terminal of the second feedback amplifier is connected to the second voltage regulating circuit; the second voltage regulating circuit is also connected to the output of the driving control unit
  • the input end of the second regulating tube is connected with the output end of the second feedback amplifier; the output end of the second regulating tube is connected with the second voltage regulating circuit;
  • the output terminal outputs the supply voltage of the VCSEL;
  • the first regulating tube is used for regulating the magnitude of the voltage supplied to the VCSEL under the control of the first feedback amplifier and the second voltage regulating circuit.
  • the second voltage adjustment circuit includes a fourth resistor, a fifth resistor and a sixth resistor;
  • the first end of the fourth resistor is connected to the reverse end of the second feedback amplifier, the first end of the fifth resistor and the first end of the sixth resistor respectively;
  • the two ends are connected to the output end of the regulating tube;
  • the second end of the fifth resistor is connected to the output end of the drive control unit;
  • the second end of the sixth resistor is grounded.
  • the present application provides a VCSEL module, including a VCSEL driver circuit and a VCSEL; a first end of the VCSEL driver circuit is connected to an anode of the VCSEL for supplying power to the VCSEL; the VCSEL driver circuit The second end of the VCSEL is connected to the cathode of the VCSEL, and is used to control the turn-on or turn-off of the VCSEL according to the input pulse signal, and the VCSEL is used to emit light signals under the control of the VCSEL drive circuit;
  • the VCSEL driving circuit is the VCSEL driving circuit described in the first aspect.
  • the present application provides a VCSEL driver chip, including the VCSEL driver circuit described in the first aspect.
  • the present application provides a VCSEL driving method, which is applied to the VCSEL driving circuit described in the first aspect, and the method includes:
  • the VCSEL is powered according to the optical power sensing signal and a preset operating current setting signal of the VCSEL.
  • the fifth method provides an electronic device, including an image sensor, and the VCSEL module as described in the second aspect, wherein after the optical signal emitted by the VCSEL module is reflected by a target object, The image sensor generates a corresponding photoelectric signal, and the photoelectric signal is used to calculate the distance between the target object and the electronic device.
  • the present application provides a VCSEL driving circuit and device.
  • the VCSEL driving circuit controls the magnitude of the voltage that supplies power to the VCSEL based on the VCSEL optical power sensing signal and the VCSEL preset operating current setting signal, so that the on-current of the VCSEL can be maintained constant.
  • the on-current of the VCSEL can be adjusted by setting different preset operating currents through the preset operating current setting signal. Because the VCSEL driving circuit adjusts the on-current of the VCSEL by adjusting the supply voltage of the VCSEL, that is, the VCSEL driving circuit is in the switching driving mode, which reduces the driving loss and has a higher driving efficiency than the constant current driving mode. , while ensuring the constant and adjustable VCSEL current.
  • FIG. 1 is a schematic structural diagram of a VCSEL drive circuit in the prior art
  • FIG. 2 is a voltage and current waveform diagram of a VCSEL drive circuit in the prior art
  • FIG. 3 is an output characteristic diagram of a transistor used in the VCSEL drive circuit shown in FIG. 1;
  • FIG. 4 is a structural block diagram of a VCSEL drive circuit provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of an embodiment of a drive control unit in the VCSEL drive circuit shown in FIG. 4;
  • FIG. 6 is a schematic structural diagram of another embodiment of the drive control unit in the VCSEL drive circuit shown in FIG. 4;
  • FIG. 7 is a schematic structural diagram of an embodiment of a drive unit in the drive control unit shown in FIG. 5 or FIG. 6;
  • FIG. 8 is a schematic structural diagram of an embodiment of an optical power sensing unit in the drive control unit shown in FIG. 5;
  • FIG. 9 is a schematic structural diagram of an embodiment of an optical power sensing unit in the drive control unit shown in FIG. 6;
  • FIG. 10 is a schematic structural diagram of another embodiment of the optical power sensing unit in the drive control unit shown in FIG. 6;
  • FIG. 11 is a schematic structural diagram of an embodiment of the control unit in the drive control unit shown in FIG. 5 or FIG. 6;
  • FIG. 12 is a schematic structural diagram of another embodiment of the control unit in the drive control unit shown in FIG. 5 or FIG. 6;
  • FIG. 13 is a schematic structural diagram of an embodiment of a power supply unit in the VCSEL drive circuit shown in FIG. 4;
  • FIG. 14 is a schematic structural diagram of another embodiment of the power supply unit in the VCSEL drive circuit shown in FIG. 4;
  • FIG. 15 is a schematic structural diagram of a VCSEL driving circuit provided by an embodiment of the present application.
  • FIG. 16 is a schematic structural diagram of another VCSEL driving circuit provided by an embodiment of the present application.
  • the VCSEL driving circuit provided by the present application can be applied to scenarios that require on-off driving of VCSELs such as 3D ToF imaging and ToF depth detection, and can also be applied to other scenarios that require on-off driving of VCSELs, which is not limited in this application.
  • the VCSEL driving circuit in the related art will be introduced below.
  • FIG. 1 is a schematic structural diagram of a VCSEL driving circuit in the prior art.
  • the power supply unit 11 provides the power supply voltage VDD to power the VCSEL
  • the power supply voltage VDD is a fixed value
  • the transistor Q0 in the driving unit 12 is controlled by the input pulse signal to perform high-speed switching.
  • the transistor Q0 is turned off, the VCSEL current is zero; when the transistor Q0 is turned on, the magnitude of the current passing through the VCSEL depends on the driving mode of the driving circuit 120 of Q0.
  • FIG. 2 is a voltage and current waveform diagram of a VCSEL driving circuit in the prior art. Among them, Ud is the voltage waveform of the transistor Q0, and Vds is the turn-on voltage drop of the transistor Q0.
  • the driving mode of the driving circuit 120 is determined by its circuit structure.
  • the driving circuit 120 may be implemented by a driving circuit in a switching driving mode, or the driving circuit 120 may be implemented by a driving circuit in a constant current driving mode.
  • the current setting signal SET indicated by the dotted line in FIG. 1 is only used to indicate that when the driving circuit 120 is a driving circuit in the constant current driving mode, a signal of the magnitude of the constant current is set; when the driving circuit 120 is in the switching driving mode When driving the circuit, the current setting signal SET is not required.
  • VDD, VF and Rds are all fixed, so Id is also fixed, that is, the conduction current of VCSEL is not adjustable.
  • Id the conduction current of VCSEL is not adjustable.
  • the on-current Id of the VCSEL needs to be adjusted, and this kind of circuit obviously cannot meet the requirements.
  • the turn-on voltage drop VF of the VCSEL and the turn-on voltage drop Rds of the transistor Q0 will have obvious temperature drift, which will cause the turn-on current Id of the VCSEL to be actually not constant, so that the optical power of the VCSEL is not constant. constant.
  • the driving circuit 120 when the driving circuit 120 is implemented by a driving circuit in a constant current driving mode, the on-current Id of the transistor Q0, that is, the on-current Id of the VCSEL, is controlled by the magnitude of the current set by the external current setting signal SET .
  • This method can improve the above problems in the switch driving mode to a certain extent, that is, by changing the current set by the current setting signal SET, the on-current of the VCSEL can be adjusted, and the driving circuit of the constant current driving mode can be To a certain extent, the problem of temperature drift is improved, but the constant current drive will generate additional power consumption problems.
  • the power consumption problem is described below in combination with the realization principle of constant current drive.
  • the drive circuit 120 controls the output voltage of the transistor Q0, that is, controls the drive voltage VGS of the transistor Q0, so that the transistor Q0 produces a constant current effect.
  • the on-current Id is different, that is, the on-current Id of the VCSEL is different.
  • the transistor Q0 operates in the linear amplifying region, which will make the turn-on voltage drop Vds of the transistor Q0 relatively large, resulting in a relatively large loss of the transistor Q0 and serious heat generation.
  • FIG. 3 is an output characteristic diagram of a transistor used in the VCSEL driving circuit shown in FIG. 1 .
  • Curves 1-4 in FIG. 3 respectively illustrate the output characteristics of the transistor under different driving voltages VGS, and the circled part in the figure. is the constant current region of the transistor.
  • Rds of the transistor Q0 is 0.1ohm
  • the constant current driving mode as shown in Fig. 3
  • the conduction voltage drop of the transistor Q0 is Vds>1.25V, that is, the loss of the transistor Q0 in the constant current driving mode is more than 1 times larger than that in the switching driving mode.
  • the present application provides a VCSEL drive circuit, which controls the voltage for supplying power to the VCSEL based on the VCSEL optical power and a preset operating current setting signal of the VCSEL.
  • the VCSEL drive circuit adjusts the power supply voltage according to the change of the optical power sensing signal of the VCSEL, so that the on-current of the VCSEL produces a reverse change that can offset the temperature drift, so that the on-current of the VCSEL is changed. remain constant at the preset operating current.
  • the VCSEL driving circuit of the present application will be described below with reference to the embodiments.
  • FIG. 4 is a structural block diagram of a VCSEL driving circuit provided by an embodiment of the present application.
  • the VCSEL driving circuit includes: a driving control unit 41 and a power supply unit 42 .
  • FIG. 4 also illustrates the connection relationship between the VCSEL driver circuit and the VCSEL.
  • the driving control unit 41 is used to control the on or off of the VCSEL in a switch driving mode according to the input pulse signal, and output a voltage control signal according to the optical power sensing signal of the VCSEL and the preset operating current setting signal of the VCSEL.
  • the power supply unit 42 is configured to control the magnitude of the voltage for supplying power to the VCSEL according to the voltage control signal, so that the current when the VCSEL is turned on is the preset operating current.
  • the driving control unit 41 is controlled by the input pulse signal to control the on or off of the VCSEL, the power supply unit 42 provides a variable power supply voltage VDD for the VCSEL, and the power supply voltage VDD of the power supply unit 42 is controlled by the drive The voltage control signal of the control unit 41 . That is, the driving control unit 41 is implemented by a switch driving mode circuit. When the power supply voltage VDD provided by the power supply unit 42 for the VCSEL changes, the on-current Id of the VCSEL changes.
  • the driving control unit 41 determines the voltage control signal according to the optical power sensing signal of the VCSEL and the preset operating current setting signal of the VCSEL, wherein the optical power sensing signal of the VCSEL can be directly or indirectly sensed by the driving control unit 41 by sensing the light of the VCSEL.
  • the power is obtained in a manner, which is not limited in this application.
  • the preset working current of the VCSEL is the current value required for the VCSEL to work, which can be set through the external communication signal of the VCSEL drive circuit.
  • different preset working currents can be set according to different application scenarios. For example, it needs to be adjusted When the brightness of the VCSEL is adjusted, the preset operating current can be changed according to the required brightness.
  • the optical power sensing signal of the VCSEL acquired by the driving control unit 41 can sense the optical power of the VCSEL according to the The change of the signal adjusts the output voltage control signal, so that the power supply voltage VDD of the power supply unit 42 changes, so that the on-current Id of the VCSEL generates the opposite change that can offset the temperature drift, and finally ensures that the on-current of the VCSEL is constant at the preset value.
  • Working current
  • the driving control unit 41 can adjust the output voltage control signal according to the change of the optical power sensing signal of the VCSEL, so that the power supply voltage of the power supply unit 42 is adjusted.
  • VDD decreases, so that the on-current Id of the VCSEL decreases, thereby offsetting the increase of the on-current Id caused by the temperature drift, so that the on-current Id of the VCSEL remains constant.
  • the VCSEL driving circuit controls the voltage for supplying power to the VCSEL based on the VCSEL optical power sensing signal and the VCSEL preset operating current setting signal, so that the on-current of the VCSEL can be kept constant.
  • the on-current of the VCSEL can be adjusted by setting different preset operating currents through the preset operating current setting signal. Since the VCSEL driving circuit adjusts the on-current of the VCSEL by adjusting the supply voltage of the VCSEL, that is, the VCSEL driving circuit is in the switching driving mode, so that Q1 works in the saturation region, which reduces the driving loss compared with the constant current driving mode. , with high driving efficiency.
  • the driving control unit 41 and the power supply unit 42 in the VCSEL driving circuit are respectively described in detail with reference to examples.
  • FIG. 5 is a schematic structural diagram of an embodiment of a driving control unit in the VCSEL driving circuit shown in FIG. 4 .
  • the driving control unit 41 includes a driving unit 411 , an optical power sensing unit 412 and a control unit 413 .
  • FIG. 5 also illustrates the connection relationship between the drive control unit 41 and the VCSEL.
  • the first end of the drive unit 411 is connected to the input pulse signal; the second end of the drive unit 411 is the VCSEL drive signal end, for example, as shown in FIG. 5 , the second end of the drive unit 411 is connected to the cathode of the VCSEL; the optical power
  • the input end of the sensing unit 412 is connected to a photodiode (Photo-Diode, PD for short), the output end of the optical power sensing unit 412 is connected to the first input end of the control unit 413, and the optical power sensing unit 412 is also connected to the input pulse Signal connection;
  • the second input end of the control unit 413 is the input end of the preset working current setting signal; the output end of the control unit 413 is connected to the power supply unit 42 .
  • the driving unit 411 is used to control the on or off of the VCSEL according to the input pulse signal; the optical power sensing unit 412 is used to obtain the optical power sensing signal Vs of the VCSEL; the control unit 413 is used to sense the signal Vs according to the optical power and the preset The working current setting signal determines the voltage control signal Vc; the power supply unit 42 is used to control the magnitude of the voltage VDD that supplies power to the VCSEL according to the voltage control signal Vc.
  • the driving unit 411 is controlled by the input pulse signal to control the on or off of the VCSEL, and the driving unit 411 is in a switch driving mode; the optical power sensing unit 412 directly senses the optical power of the VCSEL through the PD, or through the VCSEL The on-current of the VCSEL indirectly senses the optical power of the VCSEL, and the on-current Id of the VCSEL is proportional to its optical power.
  • the control unit 413 outputs the voltage control signal Vc through arithmetic processing according to the optical power sensing signal Vs and the preset operating current setting signal obtained by the optical power sensing unit 412, and the control unit 413 can use a digital circuit and/or an analog circuit. To achieve this, the comparison in this embodiment is not limited.
  • FIG. 6 is a schematic structural diagram of another embodiment of the driving control unit in the VCSEL driving circuit shown in FIG. 4 .
  • the driving control unit 41 includes a driving unit 411 , an optical power sensing unit 412 and a control unit 413 .
  • FIG. 6 also illustrates the connection relationship between the drive control unit 41 and the VCSEL.
  • the first end of the drive unit 411 is connected to the input pulse signal; the second end of the drive unit 411 is the VCSEL drive signal end, for example, as shown in FIG. 5 , the second end of the drive unit 411 is connected to the cathode of the VCSEL; the optical power
  • the input end of the sensing unit 412 is connected to the second end of the driving unit 411, the output end of the optical power sensing unit 412 is connected to the first input end of the control unit 413, and the optical power sensing unit 412 is also connected to the input pulse signal;
  • the second input end of the control unit 413 is the input end of the preset operating current setting signal; the output end of the control unit 413 is connected to the power supply unit 42 .
  • the driving unit 411 is used to control the on or off of the VCSEL according to the input pulse signal; the optical power sensing unit 412 is used to obtain the optical power sensing signal Vs of the VCSEL; the control unit 413 is used to sense the signal Vs according to the optical power and the preset The working current setting signal determines the voltage control signal Vc; the power supply unit 42 is used to control the magnitude of the voltage VDD that supplies power to the VCSEL according to the voltage control signal Vc.
  • the driving unit 411 is controlled by the input pulse signal to control the on or off of the VCSEL, and the driving unit 411 is in a switch driving mode; the optical power sensing unit 412 indirectly senses the optical power of the VCSEL through the on-current of the VCSEL , the on-current Id of the VCSEL is proportional to its optical power.
  • the control unit 413 outputs the voltage control signal Vc through arithmetic processing according to the optical power sensing signal Vs and the preset operating current setting signal obtained by the optical power sensing unit 412, and the control unit 413 can use a digital circuit and/or an analog circuit. To achieve this, the comparison in this embodiment is not limited.
  • the driving unit 411 the optical power sensing unit 412 and the control unit 413 can be implemented by various circuits.
  • FIG. 7 is a schematic structural diagram of an embodiment of a driving unit in the driving control unit shown in FIG. 5 or FIG. 6 .
  • the driving unit 411 includes a switch driving circuit 4111 and a first switch transistor Q1.
  • the input end of the switch drive circuit 4111 is connected to the input pulse signal; the output end of the switch drive circuit 4111 is connected to the first end of the first switch tube Q1; the second end of the first switch tube Q1 is the VCSEL drive signal end, used to control the VCSEL
  • the second end of the first switch tube Q1 is connected to the cathode of the VCSEL; the third end of the first switch tube Q1 is grounded.
  • the switch driving circuit 4111 is used to control the VCSEL to turn on when the first switch Q1 is turned on according to the input pulse signal, or to turn off the VCSEL when the first switch Q1 is turned off according to the input pulse signal.
  • the switch drive circuit 4111 is a drive circuit in a switch drive mode.
  • the switch drive circuit 4111 In the switch drive mode, the switch drive circuit 4111 only controls the turn-on or turn-off of the first switch transistor Q1 according to the input pulse signal, without controlling the first switch Q1.
  • the driving voltage of the switch tube Q1 is used to generate a constant current effect.
  • the on-current of the VCSEL can be controlled by its supply voltage VDD, thereby reducing the driving loss.
  • FIG. 8 is a schematic structural diagram of an embodiment of an optical power sensing unit in the driving control unit shown in FIG. 5 .
  • the input end of the optical power sensing unit 412 is connected to the PD, and the optical power sensing unit 412 includes a first operational amplifier unit 4121 and a first timing control unit 4122;
  • the first operational amplifier unit 4121 is connected to the PD, and the input terminal of the first timing control unit 4122 is connected to the input pulse signal; the output terminal of the first timing control unit 4122 is connected to the first operational amplifier unit 4121; the PD is used to detect the light intensity of the VCSEL ; The first timing control unit 4122 is used to control the first operational amplifier unit 4121 to output the optical power sensing signal Vs according to the light intensity when the VCSEL is turned on.
  • the PD-based direct optical power sensing is used, and the PD needs to be set near the VCSEL to ensure that the PD can receive the light emitted by the VCSEL, so that the VCSEL optical power can be converted into an electrical signal, and then the optical power of the VCSEL can be converted into an electrical signal.
  • the operational amplifier unit 4121 amplifies the electrical signal and outputs the optical power sensing signal Vs.
  • the optical power sensing unit 412 needs to combine the input pulse signal for timing control to ensure that the light when the VCSEL is turned on is correctly detected. Therefore, the input pulse signal is connected through the first timing control unit 4122 , so that the first operational amplifier unit 4121 is controlled according to the input pulse signal to output the optical power sensing signal Vs according to the light intensity when the VCSEL is turned on.
  • the optical power sensing unit of the present embodiment directly senses the optical power through the PD, and does not require an additional sensing circuit, so it is not affected by other circuit factors, and the measurement result is accurate.
  • FIG. 9 is a schematic structural diagram of an embodiment of an optical power sensing unit in the driving control unit shown in FIG. 6 .
  • the optical power sensing unit 412 includes a second operational amplifier unit 4123 and a second timing control unit 4124;
  • the second operational amplifier unit 4123 is connected to the second end of the first switch tube Q1; the input terminal of the second timing control unit 4124 is connected to the input pulse signal; the output terminal of the second timing control unit 4124 is connected to the second operational amplifier unit 4123;
  • the second timing control unit 4124 is used to control the second operational amplifier unit 4123 to output the optical power sensing signal Vs according to the voltage on the first switch tube Q1 when the VCSEL is turned on.
  • the voltage drop of the first transistor Q1 is Id*Rds. Therefore, by measuring the voltage drop of the first transistor Q1, the on-current Id of the first transistor Q1, that is, the on-current Id of the VCSEL, can be indirectly measured, thereby indirectly measuring the on-current Id of the first transistor Q1. Sensing the optical power of the VCSEL. Since the VCSEL is in a high-frequency switching state, its current is also a high-frequency pulse. In order to accurately measure the current, it needs to be controlled in combination with the input pulse signal to achieve synchronous detection.
  • the second operational amplifier unit 4123 includes an operational amplifier and a capacitor
  • the second timing control unit 4124 is used to control the switch SW according to the input pulse signal.
  • Id reaches a stable value
  • the second timing control unit 4124 controls the switch SW to be turned on, and the capacitor voltage in the second operational amplifier unit 4123 is Id*Rds; the switch SW is turned off in time before the first transistor Q1 is turned off, so that the voltage of the capacitor in the second operational amplifier unit 4123 Keep Id*Rds unchanged until the next pulse arrives to repeat this process for a new sampling.
  • this indirect sensing optical power sampling unit reduces the circuit cost compared to the optical power sampling unit using the PD in FIG. 8 .
  • FIG. 10 is a schematic structural diagram of another embodiment of the optical power sensing unit in the driving control unit shown in FIG. 6 .
  • the third end of the first switch tube Q1 is grounded through the first resistor R01;
  • the optical power sensing unit 412 includes a third operational amplifier unit 4125 and a third timing control unit 4126;
  • the third operational amplifier unit 4125 is connected to the third terminal of the first switch tube Q1; the input terminal of the third timing control unit 4126 is connected to the input pulse signal; the output terminal of the third timing control unit 4126 is connected to the third operational amplifier unit 4125;
  • the third timing control unit 4126 is configured to control the third operational amplifier unit 4125 to output the optical power sensing signal Vs according to the voltage on the first resistor when the VCSEL is turned on.
  • the third end of the first switch transistor Q1 is grounded through the first resistor R01, and the voltage drop of the first resistor R01 is Id*R01. Therefore, the conduction of the VCSEL can also be indirectly measured by measuring the voltage drop of the first resistor R1.
  • the current Id is turned on to indirectly sense the optical power of the VCSEL.
  • the VCSEL since the VCSEL is in a high-frequency switching state, its current is also a high-frequency pulse. In order to accurately measure the current, it is necessary to combine the input pulse signal for control to achieve synchronous detection.
  • the third operational amplifier unit 4125 includes an operational amplifier and a capacitor
  • the third timing control unit 4126 is used to control the switch SW according to the input pulse signal.
  • the first transistor Q1 is turned on, Id reaches a stable value
  • the second timing control unit 4124 controls the switch SW to be turned on, and the capacitor voltage in the second operational amplifier unit 4123 is Id*R1; the switch SW is turned off in time before the first transistor Q1 is turned off, so that the voltage of the capacitor in the second operational amplifier unit 4123 Keep Id*R1 unchanged until the next pulse arrives to repeat this process for a new sampling.
  • the optical power sampling unit of this embodiment also adopts the indirect sensing method, which reduces the circuit cost.
  • the temperature drift of the on-resistance Rds of the first switch transistor Q1 is relatively large, but it does not require additional resistance, which avoids additional Resistive power loss, while saving a device, can reduce cost.
  • using the first resistor R1 for measurement reduces the influence of temperature drift.
  • FIG. 11 is a schematic structural diagram of an embodiment of the control unit in the drive control unit shown in FIG. 5 or FIG. 6 .
  • the control unit 413 includes: an analog-to-digital conversion unit ADC, an error correction unit 4131 and a digital-to-analog conversion unit DAC.
  • the analog-to-digital conversion unit is used to convert the optical power sensing signal Vs into a digital sensing signal DVs.
  • the error correction unit 4131 is configured to determine the digital voltage control signal DVc corresponding to the current pulse signal according to the digital sensing signal DVs, the preset operating current setting signal and the pre-stored digital voltage control signal MVc corresponding to the previous pulse signal.
  • the digital-to-analog conversion unit is used to convert the digital voltage control signal corresponding to the current pulse signal into the voltage control signal Vc.
  • control unit 413 performs signal operation by sampling and digitizing.
  • the preset working current is set by an external communication signal, and the error correction unit 4131 can determine the target reference voltage value DVset based on the preset working current.
  • the error correction unit 4131 may compensate the preset working current set by the external communication signal according to the temperature of the VCSEL, and determine the target reference voltage value DVset according to the compensated preset working current.
  • the lock signal is used to lock the stored DVc, keeping the DVc constant.
  • the stored DVc value is converted into the voltage control signal Vc through the DAC.
  • FIG. 12 is a schematic structural diagram of another embodiment of the control unit in the drive control unit shown in FIG. 5 or FIG. 6 .
  • the control unit 413 includes an analog subtractor 4132 , an analog adder 4133 and an analog memory 4134 .
  • the first input end of the analog subtractor 4132 is connected to the output end of the optical power sensing unit 412 , the second input end of the analog subtractor 4132 is the input end of the preset working current setting signal; the first input end of the analog adder 4133 It is connected to the output end of the analog subtractor 4132 and the output end of the analog memory 4134 respectively, the second input end of the analog adder 4133 is grounded, and the output end of the analog adder 4133 is connected to the power supply unit 42; the input end of the analog memory 4134 is connected to the analog The output terminal of the adder 4133 is connected.
  • the analog subtractor 4132 is used to determine the error signal according to the preset operating current setting signal and the optical power sensing signal Vs.
  • the analog memory 4134 is used to output the voltage control signal corresponding to the last pulse signal.
  • the analog adder 4133 is used to output the voltage control signal Vc according to the error signal and the voltage control signal corresponding to the previous pulse signal.
  • the control unit 413 in this embodiment obtains the voltage control signal Vc by computing in a digital-analog hybrid manner.
  • the preset working current is set by an external communication signal, and the target reference voltage value Vset is determined based on the preset working current.
  • the preset working current set by the external communication signal may also be compensated according to the temperature of the VCSEL, and the target reference voltage value Vset may be determined according to the compensated preset working current.
  • the operational amplifier OP1 and the resistors R1-R4 constitute an analog subtractor 4132.
  • the operational amplifier OP3, the capacitor C1, and the timing control unit constitute the analog memory 4134.
  • the timing control unit controls the switch SW0 to close, thereby buffering the voltage of the voltage control signal Vc on the capacitor C1, and using C1 to store the voltage.
  • control unit of this embodiment adopts an operational amplifier to form an analog subtractor, an analog adder, and an analog memory, and the ADC and DAC are omitted, and the structure is simpler.
  • FIG. 13 is a schematic structural diagram of an embodiment of a power supply unit in the VCSEL driving circuit shown in FIG. 4 .
  • the power supply unit 42 includes: a first feedback amplifier 421 , a first regulating tube 422 and a first voltage regulating circuit 423 .
  • the non-inverting end of the first feedback amplifier 421 is connected to the output end of the drive control unit 41; the reverse end of the first feedback amplifier 421 is connected to the first voltage regulating circuit 423; the input end of the first regulating tube 422 is connected to the first feedback amplifier 421 The output end of the first regulating tube 422 is connected to the first voltage regulating circuit 423 and the anode of the VCSEL, respectively.
  • the first regulating tube 422 is used to regulate the magnitude of the voltage supplied to the VCSEL under the control of the first feedback amplifier 421 and the first voltage regulating circuit 423 .
  • the first voltage adjustment circuit 423 includes a second resistor R02 and a third resistor R03.
  • the first end of the second resistor R02 is connected to the reverse end of the feedback amplifier, the second end of the second resistor R02 is connected to the output end of the regulating tube; the first end of the third resistor R03 is connected to the first end of the second resistor R02 connected, the second end of the third resistor R03 is grounded; the output end of the first regulating tube 422 is grounded through a capacitor.
  • the power supply unit in this embodiment controls the output voltage VDD by controlling the balance condition of the first feedback amplifier 421 , that is, the voltage balance between the non-inverting terminal and the inverting terminal.
  • FIG. 14 is a schematic structural diagram of another embodiment of the power supply unit in the VCSEL driving circuit shown in FIG. 4 .
  • the power supply unit 42 includes: a second feedback amplifier 424 , a second regulating tube 425 and a second voltage regulating circuit 426 ;
  • the non-inverting terminal of the second feedback amplifier 424 is connected to the reference voltage signal; the reverse terminal of the second feedback amplifier 424 is connected to the second voltage regulating circuit 426; the second voltage regulating circuit 426 is also connected to the output terminal of the driving control unit 41;
  • the input end of the regulating tube 425 is connected to the output end of the second feedback amplifier 424; the output end of the second regulating tube 425 is connected to the anode of the second voltage regulating circuit 426 and the VCSEL respectively;
  • the first regulating tube is used to regulate the magnitude of the voltage supplying power to the VCSEL under the control of the first feedback amplifier and the second voltage regulating circuit 426 .
  • the second voltage adjustment circuit 426 includes a fourth resistor R04 , a fifth resistor R05 and a sixth resistor R06 ; the first end of the fourth resistor R04 and the reverse end of the second feedback amplifier 424 , the first end of the fifth resistor R05 and the first end of the sixth resistor R06 are respectively connected; the second end of the fourth resistor R04 is connected with the output end of the regulating tube; the second end of the fifth resistor R05 is connected with the drive control unit 41 The output terminal of 1 is connected; the second terminal of the sixth resistor R06 is grounded.
  • the power supply unit in this embodiment controls the output voltage VDD by controlling the balance condition of the first feedback amplifier 424 , that is, the voltage balance between the non-inverting terminal and the inverting terminal.
  • the power supply voltage VDD R04/(R05//R04//R06)*Vref-R04/R05*Vc for the power supply unit 42 to supply power to the VCSEL, so that it can be realized by controlling the voltage control signal Vc Regulation of supply voltage VDD.
  • each unit module of the VCSEL driving circuit provided by the present application is described by way of example.
  • the VCSEL drive circuit composed of the combination of each unit module will be described as an example below.
  • FIG. 15 is a schematic structural diagram of a VCSEL driving circuit according to an embodiment of the present application.
  • the VCSEL drive circuit includes a drive control unit 41 and a power supply unit 42 .
  • the driving control unit 41 includes a driving unit 411 , an optical power sensing unit 412 and a control unit 413 .
  • the driving unit 411 is the driving unit shown in FIG. 7
  • the optical power sensing unit 412 is the optical power sensing unit shown in FIG. 8
  • the control unit 413 is the control unit shown in FIG. 11
  • the power supply unit 42 is the power supply unit shown in FIG. 14 .
  • the driving unit 411 adopts a switch driving mode, and controls the turn-on or turn-off of the first switch transistor Q1 according to the input pulse signal, thereby controlling the turn-on or turn-off of the VCSEL.
  • the optical power sensing unit 412 senses the optical power of the VCSEL through the PD and outputs the optical power sensing signal Vs to the control unit 413 .
  • the control unit 413 performs an operation based on the preset operating current set by the external communication signal and the optical power sensing signal Vs to obtain a voltage control signal Vc, and outputs the voltage control signal Vc to the power supply unit 42 .
  • the power supply unit 42 outputs the power supply voltage VDD to the VCSEL according to the voltage control signal Vc, so as to complete the closed-loop control of the on-current of the VCSEL.
  • the power supply unit 42 can be implemented by a boost switching power supply control chip, and the boost switching power supply control chip is used with the inductor L1 and the capacitor C2 to form a boost topology high-efficiency boost circuit, so that the output voltage VDD is higher than the power supply voltage; the second voltage adjustment circuit 426 and the voltage control signal Vc jointly determine the magnitude of the output voltage VDD.
  • the drive unit 411, the optical power sensing unit 412 and the control unit 413 included in the drive control unit 41 can be integrated inside the drive control chip, wherein: the drive unit 411 is connected to an external VCSEL; the optical power sensing unit 412 is connected to a PD for sensing The optical power of the VCSEL; the control unit 413 outputs the voltage control signal Vc to control the voltage to the power supply unit 42 , and controls the output voltage VDD of the power supply unit 42 .
  • the switching pulse is input to the driving control chip, which is used to control the on-off of the VCSEL, and the external communication signal is input to the driving control chip, which is used to configure the preset working current or optical power of the VCSEL.
  • each unit module of the VCSEL driving circuit provided by the embodiment of the present application may be integrated as required, and each unit module may be integrated in one or more chips.
  • the drive control unit 41 and the power supply unit 42 can be integrated in one chip, so that from the outside of the chip, one port is used to receive the input pulse signal, one port is used to receive the external communication signal, and one port is used to control the VCSEL On or off, one port is used to connect the PD to collect optical power, and one port is used to output the voltage VDD.
  • the embodiments of the present application do not limit the specific chip integration manner of the VCSEL driving circuit.
  • FIG. 16 is a schematic structural diagram of another VCSEL driving circuit provided by an embodiment of the present application.
  • the optical power sensing unit 412 obtains the optical power sensing signal by means of indirect sensing, so that when the VCSEL driving circuit is integrated into a chip, There is no separate optical power sampling port outside the chip.
  • FIG. 15 and FIG. 16 only exemplify two VCSEL driving circuits that each unit module exemplified in the foregoing embodiments can be combined to form, but do not limit the structure of the VCSEL driving circuit only to this.
  • the unit modules exemplified in the foregoing embodiments can be combined to form VCSEL driving circuits with different internal structures.
  • each unit module can be integrated according to the integration requirements of the circuit to form an integrated chip VCSEL driving circuit.
  • the embodiment of the present application also provides a VCSEL module, which includes the VCSEL driving circuit and the VCSEL in any of the above-mentioned embodiments; the first end of the VCSEL driving circuit is connected to the anode of the VCSEL for supplying power to the VCSEL; The second terminal is connected to the cathode of the VCSEL, and is used to control the turn-on or turn-off of the VCSEL according to the input pulse signal, and the VCSEL is used to emit light signals under the control of the VCSEL driving circuit.
  • Embodiments of the present application further provide a VCSEL driver chip, including the VCSEL driver circuit in any of the foregoing embodiments.
  • An embodiment of the present application further provides a VCSEL driving method, which is applied to the VCSEL driving circuit in any of the foregoing embodiments, and the method includes:
  • the VCSEL is powered according to the optical power sensing signal and the preset operating current setting signal of the VCSEL.
  • Embodiments of the present application further provide an electronic device, including an image sensor, and the VCSEL module in the above-mentioned embodiments, wherein after the optical signal emitted by the VCSEL module is reflected by a target object, a corresponding photoelectric signal is generated by the image sensor, and the photoelectric signal is generated by the image sensor.
  • the signal is used to calculate the distance between the target object and the electronic device.
  • the electronic device can be used to determine the depth information of the target object, or can be used to obtain a three-dimensional image of the surface of the target object, and the like.
  • the term “comprising” and its variants may mean non-limiting inclusion; the term “or” and its variants may mean “and/or”.
  • the terms “first”, “second” and the like in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
  • “plurality” means two or more.
  • “And/or”, which describes the association relationship of the associated objects means that there can be three kinds of relationships, for example, A and/or B, which can mean that A exists alone, A and B exist at the same time, and B exists alone.
  • the character “/" generally indicates that the associated objects are an "or” relationship.

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

本申请提供一种VCSEL驱动电路及装置。该VCSEL驱动电路包括：驱动控制单元和与驱动控制单元连接的供电单元；驱动控制单元用于根据输入脉冲信号控制VCSEL的开通或关断，以及，根据VCSEL的光功率感测信号和VCSEL的预设工作电流设置信号输出电压控制信号；供电单元用于根据电压控制信号控制向VCSEL供电的电压大小。从而，在保证了VCSEL电流恒定的同时，降低了驱动损耗。

Description

VCSEL驱动电路及装置 技术领域
本申请涉及电路技术，尤其涉及一种垂直腔面发射激光器(Vertical Cavity Surface Emitting Laser，VCSEL)驱动电路及装置。
背景技术
VCSEL作为照明光源，在现有技术中已经获得了广泛应用，例如在三维飞行时间(3D Time of Flight，3D ToF)成像技术中即需要用到VCSEL作为照明光源。3D ToF的成像原理决定了在成像时需要对VCSEL进行开关驱动。
相关技术中，VCSEL的驱动电路通常是通过控制驱动电路内部晶体管的开通或关断，来驱动控制VCSEL的开通或关断。在具体实现时，为了保持VCSEL稳定发光，驱动电路通常采用恒流驱动模式。该恒流驱动模式通过控制驱动电路内部晶体管的驱动电压来控制驱动电流保持恒定，从而使VCSEL的光功率保持恒定，进而保持VCSEL稳定发光。但是，在这种恒流驱动模式下，驱动电路内部晶体管的导通压降较高，导致驱动损耗比较大，驱动效率较低。
发明内容
本申请提供一种VCSEL驱动电路及装置，降低了驱动损耗，具有较高的驱动效率。
第一方面，本申请提供一种VCSEL驱动电路，包括：驱动控制单元和与所述驱动控制单元连接的供电单元；
所述驱动控制单元，用于根据输入脉冲信号采用开关驱动模式控制VCSEL的开通或关断，以及，根据所述VCSEL的光功率感测信号和所述VCSEL的预设工作电流设置信号输出电压控制信号；
所述供电单元用于，根据所述电压控制信号控制向所述VCSEL供电的电压大小，以使所述VCSEL开通时的电流为预设工作电流。
在一种可行的实现方式中，所述驱动控制单元包括驱动单元、光功率感测单元和控制单元；
所述驱动单元的第一端连接所述输入脉冲信号；所述驱动单元的第二端为VCSEL驱动信号端；所述光功率感测单元的输入端与光电二极管连接或者与所述驱动单元的第二端连接；所述光功率感测单元的输出端与所述控制单元的第一输入端连接；所述控制单元的第二输入端为所述预设工作电流设置信号输入端；所述控制单元的输出端与所述供电单元连接；
所述驱动单元，用于根据所述输入脉冲信号控制所述VCSEL的开通或关断；
所述光功率感测单元，用于获取所述VCSEL的光功率感测信号；
所述控制单元，用于根据所述光功率感测信号和所述预设工作电流设置信号确定电压控制信号。
在一种可行的实现方式中，所述驱动单元包括开关驱动电路和第一开关管；
所述开关驱动电路的输入端连接所述输入脉冲信号；所述开关驱动电路的输出端与所述第一开关管的第一端连接；所述第一开关管的第二端为VCSEL驱动信号端；所述第一开关管的第三端接地；
所述开关驱动电路用于根据所述输入脉冲信号控制所述第一开关管处于开通状态，以控制所述VCSEL开通，或者，用于根据所述输入脉冲信号控制所述第一开关管处于关断状态，以控制所述VCSEL关断。
在一种可行的实现方式中，所述光功率感测单元的输入端与光电二极管连接，所述光功率感测单元包括第一运放单元和第一时序控制单元；
所述第一运放单元与所述光电二极管连接，所述第一时序控制单元的输入端连接所述输入脉冲信号；所述第一时序控制单元的输出端与所述第一运放单元连接；
所述光电二极管用于检测所述VCSEL的光强度；
所述第一时序控制单元用于控制所述第一运放单元在所述VCSEL导通时，根据所述光强度输出所述光功率感测信号。
在一种可行的实现方式中，所述光功率感测单元包括第二运放单元和第二时序控制单元；
所述第二运放单元与所述第一开关管的第二端连接；所述第二时序控制单元的输入端连接所述输入脉冲信号；所述第二时序控制单元的输出端与所述第二运放单元连接；
所述第二时序控制单元用于控制所述第二运放单元在所述VCSEL导通时，根据所述第一开关管上的电压输出所述光功率感测信号。
在一种可行的实现方式中，所述第一开关管的第三端通过第一电阻接地；所述光功率感测单元包括第三运放单元和第三时序控制单元；
所述第三运放单元与所述第一开关管的第三端连接；所述第三时序控制单元的输入端连接所述输入脉冲信号；所述第三时序控制单元的输出端与所述第三运放单元连接；
所述第三时序控制单元用于控制所述第三运放单元在所述VCSEL导通时，根据所述第一电阻上的电压输出所述光功率感测信号。
在一种可行的实现方式中，所述控制单元包括：模数转换单元、误差修正单元和数模转换单元；
所述模数转换单元用于将所述光功率感测信号转换为数字感测信号；
所述误差修正单元用于根据所述数字感测信号、预设工作电流设置信号和预存的上一个脉冲信号对应的数字电压控制信号，确定当前脉冲信号对应的数字电压控制信号；
所述数模转换单元用于将当前脉冲信号对应的数字电压控制信号转换为所述电压控制信号。
在一种可行的实现方式中，所述控制单元包括：模拟减法器、模拟加法器和模拟存储器；
所述模拟减法器的第一输入端与所述光功率感测单元的输出端连接，所述模拟减法器的第二输入端为所述预设工作电流设置信号输入端；所述模拟加法器的第一输入端与所述模拟减法器的输出端和所述模拟存储器的输出端分别连接，所述模拟加法器的第二输入端接地，所述模拟加法器的输出端与所述供电单元连接；所述模拟存储器的输入端与所述模拟加法器的输出端连接；
所述模拟减法器用于根据所述预设工作电流设置信号和所述光功率感测信号确定误差信号；
所述模拟存储器用于输出上一个脉冲信号对应的电压控制信号；
所述模拟加法器用于根据所述误差信号和所述上一个脉冲信号对应的电压控制信号输出所述电压控制信号。
在一种可行的实现方式中，所述供电单元包括：第一反馈放大器、第 一调节管和第一电压调节电路；
所述第一反馈放大器的同相端与所述驱动控制单元的输出端连接；所述第一反馈放大器的反向端与所述第一电压调节电路连接；所述第一调节管的输入端与所述第一反馈放大器的输出端连接；所述第一调节管的输出端与所述第一电压调节电路连接，所述第一调节管的输出端输出所述VCSEL的供电电压；
所述第一调节管用于在所述第一反馈放大器和所述第一电压调节电路的控制下调节向所述VCSEL供电的电压大小。
在一种可行的实现方式中，所述第一电压调节电路包括第二电阻和第三电阻；
所述第二电阻的第一端与所述反馈放大器的反向端连接，所述第二电阻的第二端与所述调节管的输出端连接；所述第三电阻的第一端与所述第二电阻的第一端连接，所述第三电阻的第二端接地。
在一种可行的实现方式中，所述供电单元包括：第二反馈放大器、第二调节管和第二电压调节电路；
所述第二反馈放大器的同相端连接参考电压信号；所述第二反馈放大器的反向端与所述第二电压调节电路连接；所述第二电压调节电路还与所述驱动控制单元的输出端连接；所述第二调节管的输入端与所述第二反馈放大器的输出端连接；所述第二调节管的输出端与所述第二电压调节电路连接；所述第二调节管的输出端输出所述VCSEL的供电电压；
所述第一调节管用于在所述第一反馈放大器和所述第二电压调节电路的控制下调节向所述VCSEL供电的电压大小。
在一种可行的实现方式中，所述第二电压调节电路包括第四电阻、第五电阻和第六电阻；
所述第四电阻的第一端与所述第二反馈放大器的反向端、所述第五电阻的第一端和所述第六电阻的第一端分别连接；所述第四电阻的第二端与所述调节管的输出端连接；所述第五电阻的第二端与所述驱动控制单元的输出端连接；所述第六电阻的第二端接地。
第二方面，本申请提供一种VCSEL模组，包括VCSEL驱动电路和VCSEL；所述VCSEL驱动电路的第一端与所述VCSEL的阳极连接，用于向所述VCSEL供电；所述VCSEL驱动电路的第二端与所述VCSEL的阴 极连接，用于根据输入脉冲信号控制所述VCSEL的开通或关断，所述VCSEL用于在所述VCSEL驱动电路的控制下发射光信号；
所述VCSEL驱动电路为第一方面中所述的VCSEL驱动电路。
第三方面，本申请提供一种VCSEL驱动芯片，包括第一方面中所述的VCSEL驱动电路。
第四方面，本申请提供一种VCSEL驱动方法，应用于第一方面中所述的VCSEL驱动电路，所述方法包括：
获取所述VCSEL的光功率感测信号；
根据所述光功率感测信号和所述VCSEL的预设工作电流设置信号向所述VCSEL供电。
第五方法，本申请提供一种电子设备，包括图像传感器，以及如第二方面中所述的VCSEL模组，其中，所述VCSEL模组所发射的光信号经目标物体反射后，由所述图像传感器生成对应的光电信号，所述光电信号用于计算所述目标物体与所述电子设备之间的距离。
本申请提供一种VCSEL驱动电路及装置，该VCSEL驱动电路，基于VCSEL光功率感测信号和VCSEL的预设工作电流设置信号来控制向VCSEL供电的电压大小，从而能够使得VCSEL的导通电流保持恒定。此外，在需要改变VCSEL导通电流时，通过预设工作电流设置信号来设置不同的预设工作电流，即可实现VCSEL的导通电流可调。由于该VCSEL驱动电路是通过调节VCSEL的供电电压的方式来调节VCSEL的导通电流，即VCSEL驱动电路为开关驱动模式，相比于恒流驱动模式，降低了驱动损耗，具有较高的驱动效率，同时保证了VCSEL电流的恒定和可调。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图做一简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中的一种VCSEL驱动电路的结构示意图；
图2为现有技术中的一种VCSEL驱动电路的电压和电流波形图；
图3为图1所示VCSEL驱动电路中所采用的一种晶体管的输出特性图；
图4为本申请实施例提供的一种VCSEL驱动电路的结构框图；
图5为图4所示VCSEL驱动电路中驱动控制单元的一种实施方式的结构示意图；
图6为图4所示VCSEL驱动电路中驱动控制单元的另一种实施方式的结构示意图；
图7为图5或图6所示驱动控制单元中驱动单元的一种实施方式的结构示意图；
图8为图5所示驱动控制单元中光功率感测单元的一种实施方式的结构示意图；
图9为图6所示驱动控制单元中光功率感测单元的一种实施方式的结构示意图；
图10为图6所示驱动控制单元中光功率感测单元的另一种实施方式的结构示意图；
图11为图5或图6所示驱动控制单元中控制单元的一种实施方式的结构示意图；
图12为图5或图6所示驱动控制单元中控制单元的另一种实施方式的结构示意图；
图13为图4所示VCSEL驱动电路中供电单元的一种实施方式的结构示意图；
图14为图4所示VCSEL驱动电路中供电单元的另一种实施方式的结构示意图；
图15为本申请实施例提供的一种VCSEL驱动电路的结构示意图；
图16为本申请实施例提供的另一种VCSEL驱动电路的结构示意图。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请提供的VCSEL驱动电路可以应用于3D ToF成像、ToF深度检测等需要对VCSEL进行开关驱动的场景中，也可以应用于其他需要对 VCSEL进行开关驱动的场景中，本申请对此不作限定。以下首先对相关技术中的VCSEL驱动电路进行介绍。
图1为现有技术中的一种VCSEL驱动电路的结构示意图。如图1中所示，供电单元11提供供电电压VDD为VCSEL供电，供电电压VDD为固定值，驱动单元12中的晶体管Q0受控于输入脉冲信号进行高速开关。当晶体管Q0关断时，VCSEL电流为零；当晶体管Q0导通时，通过VCSEL的电流大小取决于Q0的驱动电路120的驱动模式。示例的，图2为现有技术中的一种VCSEL驱动电路的电压和电流波形图。其中，Ud为晶体管Q0的电压波形，Vds为晶体管Q0的导通压降。
驱动电路120的驱动模式由其电路结构决定，例如，驱动电路120可以采用开关驱动模式的驱动电路实现，或者驱动电路120也可以采用恒流驱动模式的驱动电路实现。需要说明的是，图1中虚线所示意的电流设置信号SET仅用于示意驱动电路120为恒流驱动模式的驱动电路时，设置恒流电流大小的信号；当驱动电路120为开关驱动模式的驱动电路时，不需要该电流设置信号SET。
驱动电路120采用开关驱动模式的驱动电路实现时，VCSEL的导通电流Id取决于供电单元11提供的供电电压VDD、晶体管Q0的导通电阻Rds以及VCSEL的导通压降VF。具体的，由于Vds＝Id*Rds，因此VDD＝Vds+VF＝Id*Rds+VF。
在温度不变的情况下，VDD、VF和Rds都是固定的，因此Id也是固定的，即VCSEL的导通电流是不可调节的。然而在实际应用中有些场合，例如需要调节VCSEL的亮度时，需要调节VCSEL的导通电流Id，而这种电路显然无法满足该使用要求。另一方面，当温度变化时，VCSEL的导通压降VF和晶体管Q0的导通压降Rds会存在明显温漂，这会导致VCSEL的导通电流Id实际上不恒定，使得VCSEL光功率不恒定。
在另一种情况下，驱动电路120采用恒流驱动模式的驱动电路实现时，晶体管Q0的导通电流Id，即VCSEL的导通电流Id，受控于外部电流设置信号SET所设置的电流大小。这种方式能在一定程度上改善上述开关驱动模式中存在的问题，即通过改变电流设置信号SET所设置的电流大小可以实现VCSEL的导通电流可调，且恒流驱动模式的驱动电路可在一定程度上改善温漂的问题，但是恒流驱动又会产生额外的功耗问题。以下结合恒 流驱动的实现原理对该功耗问题进行说明。
在恒流驱动模式下，根据晶体管的输出特性，驱动电路120通过控制其输出电压，即控制晶体管Q0的驱动电压VGS，使晶体管Q0产生恒流效果，并且，驱动电压VGS不同时，晶体管Q0的导通电流Id不同，即VCSEL的导通电流Id不同。但是在这种驱动模式下，晶体管Q0工作在线性放大区，这样会使得晶体管Q0的导通压降Vds会比较大，导致晶体管Q0的损耗比较大且发热严重。
示例的，图3为图1所示VCSEL驱动电路中所采用的一种晶体管的输出特性图，图3中的曲线1-4分别示意了不同驱动电压VGS下晶体管的输出特性，图中圆圈部分为晶体管的恒流区。假设晶体管Q0的导通电阻Rds为0.1ohm，若以Id＝6A为例，开关驱动模式时晶体管Q0的导通压降Vds＝6A*0.1ohm＝0.6V，而恒流驱动模式下，以图3为例可知晶体管Q0的导通压降Vds>1.25V，即恒流驱动模式下晶体管Q0的的损耗比开关驱动模式大了1倍以上。
本申请提供一种VCSEL驱动电路，该VCSEL驱动电路基于VCSEL光功率和VCSEL的预设工作电流设置信号来控制向VCSEL供电的电压大小，在VCSEL的导通电流发生变化时，例如由于VCSEL温度发生变化导致导通电流发生变化时，VCSEL驱动电路根据VCSEL的光功率感测信号的变化来调节供电电压，使VCSEL的导通电流产生可抵消温漂的反向变化，从而使得VCSEL的导通电流保持恒定在预设工作电流。以下结合实施例对本申请的VCSEL驱动电路进行说明。
图4为本申请实施例提供的一种VCSEL驱动电路的结构框图。如图4所示，VCSEL驱动电路包括：驱动控制单元41和供电单元42。为了清楚示意VCSEL驱动电路的工作原理，图4中还示意了VCSEL驱动电路与VCSEL之间的连接关系。
驱动控制单元41用于根据输入脉冲信号采用开关驱动模式控制VCSEL的开通或关断，以及，根据VCSEL的光功率感测信号和VCSEL的预设工作电流设置信号输出电压控制信号。
供电单元42用于根据电压控制信号控制向VCSEL供电的电压大小，以使VCSEL开通时的电流为预设工作电流。
本实施例中，驱动控制单元41受控于输入脉冲信号来控制VCSEL的 开通或关断，供电单元42为VCSEL提供可变的供电电压VDD，且供电单元42的供电电压VDD大小受控于驱动控制单元41的电压控制信号。即驱动控制单元41采用开关驱动模式的电路实现，当供电单元42为VCSEL提供的供电电压VDD变化时，VCSEL的导通电流Id产生变化。
驱动控制单元41根据VCSEL的光功率感测信号和VCSEL的预设工作电流设置信号确定电压控制信号，其中，VCSEL的光功率感测信号可以由驱动控制单元41通过直接或间接感测VCSEL的光功率的方式获取，本申请对此不作限定。
VCSEL的预设工作电流是VCSEL工作所需的电流值，可以通过VCSEL驱动电路的外部通信信号对其进行设置，在实际应用中可以根据应用场景的不同设置不同的预设工作电流，例如需要调节VCSEL的光亮度时，可以根据需要的光亮度来改变预设工作电流。
当VCSEL温度发生变化时，VCSEL的导通电流Id发生变化，相应的，驱动控制单元41获取到的VCSEL的光功率感测信号也会产生变化，驱动控制单元41可以根据VCSEL的光功率感测信号的变化来调节输出的电压控制信号，使得供电单元42的供电电压VDD发生变化，从而使VCSEL的导通电流Id产生可以抵消温漂的相反变化，最终保证VCSEL的导通电流恒定在预设工作电流。
示例的，假设VCSEL的温度升高时，VCSEL的导通电流Id增大，驱动控制单元41可以根据VCSEL的光功率感测信号的变化来调节输出的电压控制信号，使得供电单元42的供电电压VDD降低，从而使VCSEL的导通电流Id减小，以此抵消温漂导致的导通电流Id增大的部分，使得VCSEL的导通电流Id维持恒定。
本实施例提供的VCSEL驱动电路，基于VCSEL光功率感测信号和VCSEL的预设工作电流设置信号来控制向VCSEL供电的电压大小，从而能够使得VCSEL的导通电流保持恒定。此外，在需要改变VCSEL导通电流时，通过预设工作电流设置信号来设置不同的预设工作电流，即可实现VCSEL的导通电流可调。由于该VCSEL驱动电路是通过调节VCSEL的供电电压的方式来调节VCSEL的导通电流，即VCSEL驱动电路为开关驱动模式，使得Q1工作在饱和区，相比于恒流驱动模式，降低了驱动损耗，具有较高的驱动效率。
结合示例对VCSEL驱动电路中的驱动控制单元41和供电单元42分别进行详细说明。
图5为图4所示VCSEL驱动电路中驱动控制单元的一种实施方式的结构示意图。如图5所示，驱动控制单元41包括驱动单元411、光功率感测单元412和控制单元413。为了清楚示意驱动控制单元41的工作原理，图5中还示意了驱动控制单元41与VCSEL之间的连接关系。
驱动单元411的第一端连接输入脉冲信号；驱动单元411的第二端为VCSEL驱动信号端，示例的，如图5中所示，驱动单元411的第二端与VCSEL的阴极连接；光功率感测单元412的输入端与光电二极管(Photo-Diode，简称PD)连接，光功率感测单元412的输出端与控制单元413的第一输入端连接，光功率感测单元412还与输入脉冲信号连接；控制单元413的第二输入端为预设工作电流设置信号的输入端；控制单元413的输出端与供电单元42连接。
驱动单元411用于根据输入脉冲信号控制VCSEL的开通或关断；光功率感测单元412用于获取VCSEL的光功率感测信号Vs；控制单元413用于根据光功率感测信号Vs和预设工作电流设置信号确定电压控制信号Vc；供电单元42用于根据电压控制信号Vc控制向VCSEL供电的电压VDD的大小。
本实施例中，驱动单元411受控于输入脉冲信号来控制VCSEL的开通或关断，驱动单元411为开关驱动模式；光功率感测单元412通过PD直接感测VCSEL的光功率，或者通过VCSEL的导通电流间接感测VCSEL的光功率，VCSEL的导通电流Id与其光功率成正比。控制单元413根据光功率感测单元412获取到的光功率感测信号Vs以及预设工作电流设置信号，通过运算处理输出电压控制信号Vc，控制单元413可以采用数字电路和/或模拟电路的方式来实现，本实施例对比不作限定。
图6为图4所示VCSEL驱动电路中驱动控制单元的另一种实施方式的结构示意图。如图6所示，驱动控制单元41包括驱动单元411、光功率感测单元412和控制单元413。为了清楚示意驱动控制单元41的工作原理，图6中还示意了驱动控制单元41与VCSEL之间的连接关系。
驱动单元411的第一端连接输入脉冲信号；驱动单元411的第二端为VCSEL驱动信号端，示例的，如图5中所示，驱动单元411的第二端与 VCSEL的阴极连接；光功率感测单元412的输入端与驱动单元411的第二端连接，光功率感测单元412的输出端与控制单元413的第一输入端连接，光功率感测单元412还与输入脉冲信号连接；控制单元413的第二输入端为预设工作电流设置信号的输入端；控制单元413的输出端与供电单元42连接。
驱动单元411用于根据输入脉冲信号控制VCSEL的开通或关断；光功率感测单元412用于获取VCSEL的光功率感测信号Vs；控制单元413用于根据光功率感测信号Vs和预设工作电流设置信号确定电压控制信号Vc；供电单元42用于根据电压控制信号Vc控制向VCSEL供电的电压VDD的大小。
本实施例中，驱动单元411受控于输入脉冲信号来控制VCSEL的开通或关断，驱动单元411为开关驱动模式；光功率感测单元412通过VCSEL的导通电流间接感测VCSEL的光功率，VCSEL的导通电流Id与其光功率成正比。控制单元413根据光功率感测单元412获取到的光功率感测信号Vs以及预设工作电流设置信号，通过运算处理输出电压控制信号Vc，控制单元413可以采用数字电路和/或模拟电路的方式来实现，本实施例对比不作限定。
在实际应用时，驱动单元411、光功率感测单元412和控制单元413均可以采用多种不同的电路进行具体实现，以下结合示例对各个单元模块分别进行进一步说明。
图7为图5或图6所示驱动控制单元中驱动单元的一种实施方式的结构示意图。如图7所示，驱动单元411包括开关驱动电路4111和第一开关管Q1。
开关驱动电路4111的输入端连接输入脉冲信号；开关驱动电路4111的输出端与第一开关管Q1的第一端连接；第一开关管Q1的第二端为VCSEL驱动信号端，用于控制VCSEL的开通或关断，示例的，如图7中所示，第一开关管Q1的第二端与VCSEL的阴极连接；第一开关管Q1的第三端接地。
开关驱动电路4111用于根据输入脉冲信号控制第一开关管Q1处于开通状态时，控制VCSEL开通，或者，用于根据输入脉冲信号控制第一开关管Q1处于关断状态时，控制VCSEL关断。
本实施例中，开关驱动电路4111即采用开关驱动模式的驱动电路，在开关驱动模式下，开关驱动电路4111仅根据输入脉冲信号控制第一开关管Q1的开通或关断，而不必控制第一开关管Q1的驱动电压来使其产生恒流效果。在开关驱动模式下，VCSEL的导通电流可以通过其供电电压VDD来进行控制，从而降低了驱动损耗。
图8为图5所示驱动控制单元中光功率感测单元的一种实施方式的结构示意图。如图8所示，光功率感测单元412的输入端与PD连接，光功率感测单元412包括第一运放单元4121和第一时序控制单元4122；
第一运放单元4121与PD连接，第一时序控制单元4122的输入端连接输入脉冲信号；第一时序控制单元4122的输出端与第一运放单元4121连接；PD用于检测VCSEL的光强度；第一时序控制单元4122用于控制第一运放单元4121在VCSEL导通时，根据光强度输出光功率感测信号Vs。
本实施例中采用的是基于PD的直接光功率感测，需要将PD设置在VCSEL附近，保证PD可以接收到VCSEL发出的光线，从而能够将VCSEL光功率转换为电信号，之后再由第一运放单元4121对该电信号进行放大处理后输出光功率感测信号Vs。
由于VCSEL处于开关点亮状态，因此光功率感测单元412需要联合输入脉冲信号来进行时序控制，保证正确地检测到VCSEL点亮时的光线，因此，通过第一时序控制单元4122连接输入脉冲信号，从而根据输入脉冲信号来控制第一运放单元4121在VCSEL导通时，根据光强度输出光功率感测信号Vs。
本实施例的光功率感测单元通过PD直接感测光功率，无需额外的感测电路，因此不受其他电路因素影响，测量结果准确。
图9为图6所示驱动控制单元中光功率感测单元的一种实施方式的结构示意图。如图9所示，光功率感测单元412包括第二运放单元4123和第二时序控制单元4124；
第二运放单元4123与第一开关管Q1的第二端连接；第二时序控制单元4124的输入端连接输入脉冲信号；第二时序控制单元4124的输出端与第二运放单元4123连接；
第二时序控制单元4124用于控制第二运放单元4123在VCSEL导通 时，根据第一开关管Q1上的电压输出光功率感测信号Vs。
本实施例中，第一晶体管Q1的压降为Id*Rds，因此通过测量第一晶体管Q1的压降可以间接测量第一晶体管Q1的导通电流Id，即VCSEL的导通电流Id，从而间接感测VCSEL的光功率。由于VCSEL处于高频开关状态，其电流也为高频脉冲，为了准确测量电流大小，需要结合输入脉冲信号进行控制，实现同步检测。
可选的，第二运放单元4123包括运算放大器和电容，采用第二时序控制单元4124根据输入脉冲信号来控制开关SW，当第一晶体管Q1导通后Id达到稳定值，第二时序控制单元4124控制开关SW导通，第二运放单元4123中的电容电压为Id*Rds；在第一晶体管Q1尚未关断前将开关SW及时关掉，这样第二运放单元4123中的电容的电压保持为Id*Rds不变，直至下一次脉冲到来时重复此过程进行新一次采样。
第二运放单元4123中的电容的电压经过由运算放大器构成的跟随器缓冲后输出光功率感测信号Vs，Vs＝Id*Rds。
采用这种间接感测的光功率采样单元，相比于图8中采用PD的光功率采样单元，降低了电路成本。
图10为图6所示驱动控制单元中光功率感测单元的另一种实施方式的结构示意图。如图9所示，第一开关管Q1的第三端通过第一电阻R01接地；光功率感测单元412包括第三运放单元4125和第三时序控制单元4126；
第三运放单元4125与第一开关管Q1的第三端连接；第三时序控制单元4126的输入端连接输入脉冲信号；第三时序控制单元4126的输出端与第三运放单元4125连接；
第三时序控制单元4126用于控制第三运放单元4125在VCSEL导通时，根据第一电阻上的电压输出光功率感测信号Vs。
本实施例中，第一开关管Q1的第三端通过第一电阻R01接地，第一电阻R01的压降为Id*R01，因此通过测量第一电阻R1的压降也可以间接测量VCSEL的导通电流Id，从而间接感测VCSEL的光功率。同样的，由于VCSEL处于高频开关状态，其电流也为高频脉冲，为了准确测量电流大小，需要结合输入脉冲信号进行控制，实现同步检测。
可选的，第三运放单元4125包括运算放大器和电容，采用第三时序控制单元4126根据输入脉冲信号来控制开关SW，当第一晶体管Q1导通后 Id达到稳定值，第二时序控制单元4124控制开关SW导通，第二运放单元4123中的电容电压为Id*R1；在第一晶体管Q1尚未关断前将开关SW及时关掉，这样第二运放单元4123中的电容的电压保持为Id*R1不变，直至下一次脉冲到来时重复此过程进行新一次采样。
第二运放单元4123中的电容的电压经过由运算放大器构成的跟随器缓冲后输出光功率感测信号Vs，Vs＝Id*R01。
本实施例的光功率采样单元同样采用间接感测的方式，降低了电路成本。此外，图9与图10中两种检测感测方案相比，图9的方案中，第一开关管Q1的导通电阻Rds温漂偏大，但是其不需要额外增加电阻，避免了额外的电阻功率损耗，同时节省一个器件，可以降低成本。而图10的方案中，利用第一电阻R1进行测量降低了温漂的影响。
图11为图5或图6所示驱动控制单元中控制单元的一种实施方式的结构示意图。如图11所示，控制单元413包括：模数转换单元ADC、误差修正单元4131和数模转换单元DAC。
模数转换单元用于将光功率感测信号Vs转换为数字感测信号DVs。
误差修正单元4131用于根据数字感测信号DVs、预设工作电流设置信号和预存的上一个脉冲信号对应的数字电压控制信号MVc，确定当前脉冲信号对应的数字电压控制信号DVc。
数模转换单元用于将当前脉冲信号对应的数字电压控制信号转换为电压控制信号Vc。
本实施例中控制单元413采样数字化的方式进行信号运算。预设工作电流由外部通信信号进行设置，误差修正单元4131可基于该预设工作电流确定目标基准电压值DVset。可选的，为了补偿温度变化的影响，误差修正单元4131可以根据VCSEL的温度对外部通信信号设置的预设工作电流进行补偿，并根据补偿后的预设工作电流确定目标基准电压值DVset。
ADC将光功率感测信号Vs数字化为DVs后，误差修正单元4131将DVset和DVs相减，得到误差值Err＝DVset-DVs；根据该误差值Err进行误差修正得到DVc＝MVc+Err，并将其进行存储，其中MVc来自上一次误差修正后存储的DVc值。锁定信号用于锁定存储的DVc，令DVc保持恒定。存储的DVc值经过DAC转换为电压控制信号Vc。
经过若干次上述的误差修正运算，最终使Err＝0，此时DVset＝DVs， 即采样值等于目标值，并且DVc保持恒定，即电压控制信号Vc保持恒定。
图12为图5或图6所示驱动控制单元中控制单元的另一种实施方式的结构示意图。如图12所示，控制单元413包括：模拟减法器4132、模拟加法器4133和模拟存储器4134。
模拟减法器4132的第一输入端与光功率感测单元412的输出端连接，模拟减法器4132的第二输入端为预设工作电流设置信号的输入端；模拟加法器4133的第一输入端与模拟减法器4132的输出端和模拟存储器4134的输出端分别连接，模拟加法器4133的第二输入端接地，模拟加法器4133的输出端与供电单元42连接；模拟存储器4134的输入端与模拟加法器4133的输出端连接。
模拟减法器4132用于根据预设工作电流设置信号和光功率感测信号Vs确定误差信号。
模拟存储器4134用于输出上一个脉冲信号对应的电压控制信号。
模拟加法器4133用于根据误差信号和上一个脉冲信号对应的电压控制信号输出电压控制信号Vc。
本实施例中的控制单元413采用数模混合的方式运算得到电压控制信号Vc。其中，预设工作电流由外部通信信号进行设置，并基于该预设工作电流确定目标基准电压值Vset。可选的，为了补偿温度变化的影响，还可以根据VCSEL的温度对外部通信信号设置的预设工作电流进行补偿，并根据补偿后的预设工作电流确定目标基准电压值Vset。
如图12中所示，运算放大器OP1以及电阻R1-R4构成模拟减法器4132，令R1＝R2＝R3＝R4，则运算放大器OP1的输出Err＝Vset-Vs。运算放大器OP2以及电阻R5-R8构成模拟加法器4133，令R5＝R6＝R7＝R8，则运算放大器的输出Vc＝MVc+Err。运算放大器OP3、电容C1、以及时序控制单元构成模拟存储器4134，通过时序控制单元控制开关SW0闭合，从而将电压控制信号Vc的电压缓存至电容C1上，并且利用C1存储电压。
采用这种数模混合的方式经过若干次循环运算后，Err＝0，Vset＝Vs，从而得到恒定的电压控制信号Vc。
本实施例的控制单元，相对于图11中的方案，采用了运算放大器构成模拟减法器和模拟加法器、模拟存储器，省略了ADC和DAC，结构更为简单。
图13为图4所示VCSEL驱动电路中供电单元的一种实施方式的结构示意图。如图13所示，供电单元42包括：第一反馈放大器421、第一调节管422和第一电压调节电路423。
第一反馈放大器421的同相端与驱动控制单元41的输出端连接；第一反馈放大器421的反向端与第一电压调节电路423连接；第一调节管422的输入端与第一反馈放大器421的输出端连接；第一调节管422的输出端与第一电压调节电路423和VCSEL的阳极分别连接。
第一调节管422用于在第一反馈放大器421和第一电压调节电路423的控制下调节向VCSEL供电的电压大小。
可选的，如图13所示，第一电压调节电路423包括第二电阻R02和第三电阻R03。第二电阻R02的第一端与反馈放大器的反向端连接，第二电阻R02的第二端与调节管的输出端连接；第三电阻R03的第一端与第二电阻R02的第一端连接，第三电阻R03的第二端接地；第一调节管422的输出端通过电容接地。
本实施例的供电单元，通过控制第一反馈放大器421的平衡条件，即同相端和反向端的电压平衡，来实现对输出电压VDD的控制。根据图13所示的电路可以确定供电单元42向VCSEL供电的供电电压VDD＝(R02/R03+1)*Vc，从而通过控制电压控制信号Vc即可实现供电电压VDD的调节。
图14为图4所示VCSEL驱动电路中供电单元的另一种实施方式的结构示意图。如图14所示，供电单元42包括：第二反馈放大器424、第二调节管425和第二电压调节电路426；
第二反馈放大器424的同相端连接参考电压信号；第二反馈放大器424的反向端与第二电压调节电路426连接；第二电压调节电路426还与驱动控制单元41的输出端连接；第二调节管425的输入端与第二反馈放大器424的输出端连接；第二调节管425的输出端与第二电压调节电路426和VCSEL的阳极分别连接；
第一调节管用于在第一反馈放大器和第二电压调节电路426的控制下调节向VCSEL供电的电压大小。
可选的，如图14所示，第二电压调节电路426包括第四电阻R04、第五电阻R05和第六电阻R06；第四电阻R04的第一端与第二反馈放大器424 的反向端、第五电阻R05的第一端和第六电阻R06的第一端分别连接；第四电阻R04的第二端与调节管的输出端连接；第五电阻R05的第二端与驱动控制单元41的输出端连接；第六电阻R06的第二端接地。
本实施例的供电单元，通过控制第一反馈放大器424的平衡条件，即同相端和反向端的电压平衡，来实现对输出电压VDD的控制。根据图14所示的电路可以确定供电单元42向VCSEL供电的供电电压VDD＝R04/(R05//R04//R06)*Vref-R04/R05*Vc，从而通过控制电压控制信号Vc即可实现供电电压VDD的调节。
上述各实施例中分别了对本申请提供的VCSEL驱动电路的各个单元模块进行了示例说明。以下对各单元模块组合构成的VCSEL驱动电路进行示例说明。
图15为本申请实施例提供的一种VCSEL驱动电路的结构示意图。如图15所示，VCSEL驱动电路包括驱动控制单元41和供电单元42。驱动控制单元41包括驱动单元411、光功率感测单元412和控制单元413。
其中，驱动单元411为如图7中所示的驱动单元，光功率感测单元412为如图8中所示的光功率感测单元；控制单元413为如图11所示的控制单元。供电单元42为如图14所示的供电单元。
驱动单元411采用开关驱动模式，根据输入脉冲信号控制第一开关管Q1的开通或关断，进而控制VCSEL的开通或关断。光功率感测单元412通过PD感测VCSEL的光功率并将光功率感测信号Vs输出至控制单元413。控制单元413基于外部通信信号所设置的预设工作电流和光功率感测信号Vs进行运算，得到电压控制信号Vc，并将电压控制信号Vc输出至供电单元42。供电单元42根据电压控制信号Vc输出供电电压VDD至VCSEL，从而完成VCSEL导通电流的闭环控制。
本实施例中，供电单元42可以采用升压型开关电源控制芯片实现，通过升压型开关电源控制芯片，配合电感L1和电容C2构成Boost拓扑高效率升压电路，使输出电压VDD高于电源电压；第二电压调节电路426和电压控制信号Vc共同决定了输出电压VDD的大小。
驱动控制单元41所包括的驱动单元411、光功率感测单元412和控制单元413可以集成在驱动控制芯片内部，其中：驱动单元411外接VCSEL；光功率感测单元412外接PD，用于感测VCSEL的光功率；控制单元413输出 电压控制信号Vc控制电压至供电单元42，控制供电单元42的输出电压VDD。开关脉冲输入驱动控制芯片，用于控制VCSEL的开通关断，外部通信信号输入驱动控制芯片，用于配置VCSEL的预设工作电流大小或者光功率大小。
需要说明的是，上述以升压型开关电源控制芯片和驱动控制芯片这两个芯片为核心的实现方案仅为一种示例方案。在实际应用中，可以上本申请实施例所提供的VCSEL驱动电路的各个单元模块按照需要进行集成，各个单元模块可以集成在一个或多个芯片内。例如，可以将驱动控制单元41和供电单元42集成在一颗芯片内，这样，从芯片外部看，一个端口用于接收输入脉冲信号，一个端口用于接收外部通信信号，一个端口用于控制VCSEL的开通或关断，一个端口用于连接PD以采集光功率，一个端口用于输出电压VDD。本申请实施例对于VCSEL驱动电路的具体芯片集成方式不作限定。
图16为本申请实施例提供的另一种VCSEL驱动电路的结构示意图。与图15所示的电路相比，本实施例的VCSEL驱动电路中，光功率感测单元412采用间接感测的方式获取光功率感测信号，从而在将VCSEL驱动电路集成为芯片时，在芯片外部不具有单独的光功率采样端口。
可以理解的是，图15和图16仅示例性给出了两种前述实施例中所示例的各单元模块可以组合构成的VCSEL驱动电路，但并不限定VCSEL驱动电路的结构仅局限于此。在实际应用中，可以将前述实施例中所示例的各单元模块进行组合以构成具有不同内部结构的VCSEL驱动电路。并且，可以根据电路的集成需求，对各个单元模块进行集成，以形成集成芯片化的VCSEL驱动电路。
本申请实施例还提供一种VCSEL模组，其中包括上述任一实施例中的VCSEL驱动电路和VCSEL；VCSEL驱动电路的第一端与VCSEL的阳极连接，用于向VCSEL供电；VCSEL驱动电路的第二端与VCSEL的阴极连接，用于根据输入脉冲信号控制VCSEL的开通或关断，VCSEL用于在VCSEL驱动电路的控制下发射光信号。
本申请实施例还提供一种VCSEL驱动芯片，包括上述任一实施例中的VCSEL驱动电路。
本申请实施例还提供一种VCSEL驱动方法，应用于上述任一实施例中的VCSEL驱动电路，该方法包括：
获取VCSEL的光功率感测信号；
根据光功率感测信号和VCSEL的预设工作电流设置信号向VCSEL供电。
本申请实施例还提供一种电子设备，包括图像传感器，以及上述实施例中的VCSEL模组，其中VCSEL模组所发射的光信号经目标物体反射后，由图像传感器生成对应的光电信号，光电信号用于计算目标物体与电子设备之间的距离。该电子设备可以用于确定目标物体的深度信息，或者可以用于获取目标物体表面的三维图像等。
本申请实施例的VCSEL模组、VCSEL驱动芯片、VCSEL驱动方法以及电子设备的实现原理和技术效果与上述任一实施例中的VCSEL驱动电路类似，此处不再赘述。
显然，本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。
在本申请中，术语“包括”及其变形可以指非限制性的包括；术语“或”及其变形可以指“和/或”。本本申请中术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。本申请中，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。

Claims (16)

  1. 一种垂直腔面发射激光器VCSEL驱动电路，其特征在于，包括：驱动控制单元和与所述驱动控制单元连接的供电单元；
    所述驱动控制单元，用于根据输入脉冲信号采用开关驱动模式控制VCSEL的开通或关断，以及，根据所述VCSEL的光功率感测信号和所述VCSEL的预设工作电流设置信号输出电压控制信号；
    所述供电单元，用于根据所述电压控制信号控制向所述VCSEL供电的电压大小，以使所述VCSEL开通时的电流为预设工作电流。
  2. 根据权利要求1所述的VCSEL驱动电路，其特征在于，所述驱动控制单元包括驱动单元、光功率感测单元和控制单元；
    所述驱动单元的第一端连接所述输入脉冲信号，所述驱动单元的第二端为VCSEL驱动信号端；
    所述光功率感测单元的输入端与光电二极管连接或者与所述驱动单元的第二端连接；所述光功率感测单元的输出端与所述控制单元的第一输入端连接；
    所述控制单元的第二输入端为所述预设工作电流设置信号输入端；所述控制单元的输出端与所述供电单元连接；
    所述驱动单元，用于根据所述输入脉冲信号控制所述VCSEL的开通或关断；
    所述光功率感测单元，用于获取所述VCSEL的光功率感测信号；
    所述控制单元，用于根据所述光功率感测信号和所述预设工作电流设置信号确定电压控制信号。
  3. 根据权利要求2所述的VCSEL驱动电路，其特征在于，所述驱动单元包括开关驱动电路和第一开关管；
    所述开关驱动电路的输入端连接所述输入脉冲信号；所述开关驱动电路的输出端与所述第一开关管的第一端连接；所述第一开关管的第二端为VCSEL驱动信号端；所述第一开关管的第三端接地；
    所述开关驱动电路用于根据所述输入脉冲信号控制所述第一开关管处于开通状态，以控制所述VCSEL开通，或者，用于根据所述输入脉冲信号控制所述第一开关管处于关断状态，以控制所述VCSEL关断。
  4. 根据权利要求2所述的VCSEL驱动电路，其特征在于，所述光功率感测单元的输入端与光电二极管连接，所述光功率感测单元包括第一运放单元和第一时序控制单元；
    所述第一运放单元与所述光电二极管连接，所述第一时序控制单元的输入端连接所述输入脉冲信号；所述第一时序控制单元的输出端与所述第一运放单元连接；
    所述光电二极管，用于检测所述VCSEL的光强度；
    所述第一时序控制单元，用于控制所述第一运放单元在所述VCSEL导通时，根据所述光强度输出所述光功率感测信号。
  5. 根据权利要求3所述的VCSEL驱动电路，其特征在于，所述光功率感测单元包括第二运放单元和第二时序控制单元；
    所述第二运放单元与所述第一开关管的第二端连接；所述第二时序控制单元的输入端连接所述输入脉冲信号；所述第二时序控制单元的输出端与所述第二运放单元连接；
    所述第二时序控制单元，用于控制所述第二运放单元在所述VCSEL导通时，根据所述第一开关管上的电压输出所述光功率感测信号。
  6. 根据权利要求3所述的VCSEL驱动电路，其特征在于，所述第一开关管的第三端通过第一电阻接地；所述光功率感测单元包括第三运放单元和第三时序控制单元；
    所述第三运放单元与所述第一开关管的第三端连接；所述第三时序控制单元的输入端连接所述输入脉冲信号；所述第三时序控制单元的输出端与所述第三运放单元连接；
    所述第三时序控制单元，用于控制所述第三运放单元在所述VCSEL导通时，根据所述第一电阻上的电压输出所述光功率感测信号。
  7. 根据权利要求2所述的VCSEL驱动电路，其特征在于，所述控制单元包括：模数转换单元、误差修正单元和数模转换单元；
    所述模数转换单元，用于将所述光功率感测信号转换为数字感测信号；
    所述误差修正单元，用于根据所述数字感测信号、预设工作电流设置信号和预存的上一个脉冲信号对应的数字电压控制信号，确定当前脉冲信号对应的数字电压控制信号；
    所述数模转换单元，用于将当前脉冲信号对应的数字电压控制信号转 换为所述电压控制信号。
  8. 根据权利要求2所述的VCSEL驱动电路，其特征在于，所述控制单元包括：模拟减法器、模拟加法器和模拟存储器；
    所述模拟减法器的第一输入端与所述光功率感测单元的输出端连接，所述模拟减法器的第二输入端为所述预设工作电流设置信号输入端；所述模拟加法器的第一输入端与所述模拟减法器的输出端和所述模拟存储器的输出端分别连接，所述模拟加法器的第二输入端接地，所述模拟加法器的输出端与所述供电单元连接；所述模拟存储器的输入端与所述模拟加法器的输出端连接；
    所述模拟减法器，用于根据所述预设工作电流设置信号和所述光功率感测信号确定误差信号；
    所述模拟存储器，用于输出上一个脉冲信号对应的电压控制信号；
    所述模拟加法器，用于根据所述误差信号和所述上一个脉冲信号对应的电压控制信号输出所述电压控制信号。
  9. 根据权利要求1-8中任一项所述的VCSEL驱动电路，其特征在于，所述供电单元包括：第一反馈放大器、第一调节管和第一电压调节电路；
    所述第一反馈放大器的同相端与所述驱动控制单元的输出端连接；所述第一反馈放大器的反向端与所述第一电压调节电路连接；所述第一调节管的输入端与所述第一反馈放大器的输出端连接；所述第一调节管的输出端与所述第一电压调节电路连接，所述第一调节管的输出端输出所述VCSEL的供电电压；
    所述第一调节管，用于在所述第一反馈放大器和所述第一电压调节电路的控制下调节向所述VCSEL供电的电压大小。
  10. 根据权利要求9所述的VCSEL驱动电路，其特征在于，所述第一电压调节电路包括第二电阻和第三电阻；
    所述第二电阻的第一端与所述反馈放大器的反向端连接，所述第二电阻的第二端与所述调节管的输出端连接；所述第三电阻的第一端与所述第二电阻的第一端连接，所述第三电阻的第二端接地。
  11. 根据权利要求1-8中任一项所述的VCSEL驱动电路，其特征在于，所述供电单元包括：第二反馈放大器、第二调节管和第二电压调节电路；
    所述第二反馈放大器的同相端连接参考电压信号；所述第二反馈放大 器的反向端与所述第二电压调节电路连接；所述第二电压调节电路还与所述驱动控制单元的输出端连接；所述第二调节管的输入端与所述第二反馈放大器的输出端连接；所述第二调节管的输出端与所述第二电压调节电路连接；所述第二调节管的输出端输出所述VCSEL的供电电压；
    所述第二调节管，用于在所述第二反馈放大器和所述第二电压调节电路的控制下调节向所述VCSEL供电的电压大小。
  12. 根据权利要求11所述的VCSEL驱动电路，其特征在于，所述第二电压调节电路包括第四电阻、第五电阻和第六电阻；
    所述第四电阻的第一端与所述第二反馈放大器的反向端、所述第五电阻的第一端和所述第六电阻的第一端分别连接；所述第四电阻的第二端与所述调节管的输出端连接；所述第五电阻的第二端与所述驱动控制单元的输出端连接；所述第六电阻的第二端接地。
  13. 一种垂直腔面发射激光器VCSEL模组，其特征在于，包括VCSEL驱动电路和VCSEL；所述VCSEL驱动电路的第一端与所述VCSEL的阳极连接，用于向所述VCSEL供电；所述VCSEL驱动电路的第二端与所述VCSEL的阴极连接，用于根据输入脉冲信号控制所述VCSEL的开通或关断，所述VCSEL用于在所述VCSEL驱动电路的控制下发射光信号；
    所述VCSEL驱动电路为权利要求1-12中任一项所述的VCSEL驱动电路。
  14. 一种垂直腔面发射激光器VCSEL驱动芯片，其特征在于，包括权利要求1-12中任一项所述的VCSEL驱动电路。
  15. 一种垂直腔面发射激光器VCSEL驱动方法，其特征在于，应用于权利要求1-12任一项所述的VCSEL驱动电路，所述方法包括：
    获取所述VCSEL的光功率感测信号；
    根据所述光功率感测信号和所述VCSEL的预设工作电流设置信号向所述VCSEL供电。
  16. 一种电子设备，其特征在于，包括图像传感器，以及如权利要求13所述的垂直腔面发射激光器VCSEL模组，其中，所述VCSEL模组所发射的光信号经目标物体反射后，由所述图像传感器生成对应的光电信号，所述光电信号用于计算所述目标物体与所述电子设备之间的距离。
PCT/CN2020/130278 2020-11-20 2020-11-20 Vcsel驱动电路及装置 WO2022104668A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/130278 WO2022104668A1 (zh) 2020-11-20 2020-11-20 Vcsel驱动电路及装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/130278 WO2022104668A1 (zh) 2020-11-20 2020-11-20 Vcsel驱动电路及装置

Publications (1)

Publication Number Publication Date
WO2022104668A1 true WO2022104668A1 (zh) 2022-05-27

Family

ID=81708193

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/130278 WO2022104668A1 (zh) 2020-11-20 2020-11-20 Vcsel驱动电路及装置

Country Status (1)

Country Link
WO (1) WO2022104668A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2713701Y (zh) * 2003-12-29 2005-07-27 爱科凯能科技（北京）有限公司 用于脉冲半导体激光器的驱动电源
CN1760721A (zh) * 2004-10-14 2006-04-19 索尼公司 发光元件驱动装置和显示系统
CN101132115A (zh) * 2007-08-30 2008-02-27 吉林大学 大功率激光二极管驱动器
CN101567519A (zh) * 2009-05-27 2009-10-28 北京国科世纪激光技术有限公司 大电流脉冲ld激光器驱动电源
CN102447218A (zh) * 2011-11-23 2012-05-09 武汉长盈通光电技术有限公司 激光器恒流控制驱动电路
US8314757B2 (en) * 2007-12-10 2012-11-20 Sanken Electric Co., Ltd. Apparatus for driving light emitting elements and electronic appliance employing the apparatus

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2713701Y (zh) * 2003-12-29 2005-07-27 爱科凯能科技（北京）有限公司 用于脉冲半导体激光器的驱动电源
CN1760721A (zh) * 2004-10-14 2006-04-19 索尼公司 发光元件驱动装置和显示系统
CN101132115A (zh) * 2007-08-30 2008-02-27 吉林大学 大功率激光二极管驱动器
US8314757B2 (en) * 2007-12-10 2012-11-20 Sanken Electric Co., Ltd. Apparatus for driving light emitting elements and electronic appliance employing the apparatus
CN101567519A (zh) * 2009-05-27 2009-10-28 北京国科世纪激光技术有限公司 大电流脉冲ld激光器驱动电源
CN102447218A (zh) * 2011-11-23 2012-05-09 武汉长盈通光电技术有限公司 激光器恒流控制驱动电路

Similar Documents

Publication Publication Date Title
TWI426821B (zh) 用以控制雷射二極體之偏壓電流的自動功率控制迴路
TWI434167B (zh) Automatic power control system, device, compensation voltage operation module and detection module
US6967978B2 (en) Light-emitting element driving device
JP2003068480A (ja) 調光制御回路
WO2022104668A1 (zh) Vcsel驱动电路及装置
JP2014045604A (ja) 負荷駆動装置およびその制御方法
CN112134145B (zh) Vcsel驱动电路及装置
US20020093999A1 (en) Laser diode drive circuit and optical transmission system
JP2744043B2 (ja) 半導体レーザ制御装置
KR20090026564A (ko) Ｌｅｄ 구동회로
JP3000798B2 (ja) スイッチング電源回路
CN110120627B (zh) 发光元件驱动电路
JP2001244556A (ja) レーザダイオード駆動装置およびレーザダイオード駆動方法
JPH0321082A (ja) 光受信回路
JP2840273B2 (ja) 半導体レーザ制御装置
CN110190507B (zh) 一种小功率激光器及其驱动电路
JP2840276B2 (ja) 半導体レーザ制御装置
KR20060039802A (ko) 자동 전압 조절 기능을 갖는 스위치 모드 전원 공급장치
JP7226995B2 (ja) 光照射器用電源装置及び光照射システム
JP2744044B2 (ja) 半導体レーザ制御装置
JP2000252754A (ja) 直流信号電圧変換器
JP2840275B2 (ja) 半導体レーザ制御装置
JP2744045B2 (ja) 半導体レーザ制御装置
JPH07295659A (ja) ペルチエ素子駆動回路
JP2610173B2 (ja) レーザ光量制御装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20961959

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20961959

Country of ref document: EP

Kind code of ref document: A1