WO2022100409A1 - 一种时间敏感网络的循环周期时隙计数方法及电子设备 - Google Patents

一种时间敏感网络的循环周期时隙计数方法及电子设备 Download PDF

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WO2022100409A1
WO2022100409A1 PCT/CN2021/125662 CN2021125662W WO2022100409A1 WO 2022100409 A1 WO2022100409 A1 WO 2022100409A1 CN 2021125662 W CN2021125662 W CN 2021125662W WO 2022100409 A1 WO2022100409 A1 WO 2022100409A1
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cycle
time
synchronization time
counting
count value
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PCT/CN2021/125662
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English (en)
French (fr)
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汪漪
冯景斌
刘超波
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鹏城实验室
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0078Timing of allocation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0078Timing of allocation
    • H04L5/0085Timing of allocation when channel conditions change

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  • the present invention relates to the technical field of communications, and in particular, to a method and electronic equipment for counting cyclic period time slots in a time-sensitive network.
  • Time Sensitive Networking divides time into cyclic cycles and repeats cycles, and configures a gated list in each cycle. There are multiple entries in the list, and each entry corresponds to a gated time slot. One or more service flows use the same gated time slot, thereby ensuring the isolation of the bandwidth between each service flow and the deterministic transmission of each service flow.
  • the time-sensitive network In order to ensure the consistency of the cycle period and gated time slot of the whole network, the time-sensitive network must be synchronized with the time of the whole network.
  • time-sensitive networks cannot achieve complete time synchronization. For example, when synchronization packets are lost or synchronization sources are switched, a relatively large synchronization time jump may occur, resulting in a longer cycle period, which cannot be maintained. Bandwidth isolation and determinism for network nodes.
  • the technical problem to be solved by the present invention is that, aiming at the above-mentioned defects of the prior art, a method and an electronic device for counting cyclic period time slots of a time-sensitive network are provided, which aim to solve the problem of causing the network synchronization time in the prior art to jump when the network synchronization time jumps.
  • the cycle period becomes longer, and the bandwidth isolation and determinism of network nodes cannot be guaranteed.
  • an embodiment of the present invention provides a method for counting cyclic period slots in a time-sensitive network, wherein the method includes:
  • cycle counting is performed according to the preset first cycle period length to obtain a first count value
  • the time slot count in the cycle period is performed.
  • the method for counting cyclic period timeslots of the time-sensitive network wherein the step of determining whether the current network synchronization time has a synchronization time jumpback according to the current network synchronization time and the network synchronization time obtained last time includes:
  • the method for counting time slots in a cyclic period of a time-sensitive network wherein the step of counting time slots in a cyclic period according to the first count value includes:
  • a regeneration cycle start flag is output, and time slots in the cycle period are counted according to the regeneration cycle start flag.
  • the method for counting cyclic period timeslots in a time-sensitive network further comprises:
  • the second count value it is determined whether the deviation cycle number of the cycle cycle exceeds the limit.
  • the method for counting cyclic period slots in the time-sensitive network wherein the step of determining whether the number of deviation periods of the cyclic period exceeds the limit according to the second count value includes:
  • the method for counting cyclic period timeslots in a time-sensitive network further comprises:
  • Counting of time slots within a cycle period is performed according to the expected cycle cycle start time.
  • the method for counting time slots in a cycle period of a time-sensitive network wherein the step of counting time slots in a cycle cycle according to the expected cycle cycle start time includes:
  • the method for counting cyclic period timeslots in a time-sensitive network further comprises:
  • Whether the cycle deviation of the cycle period exceeds the limit is determined according to the third count value.
  • an implementation of the present invention further provides an intelligent terminal, comprising a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors.
  • the one or more programs include a method for performing a cycle time slot counting method for a time sensitive network as described in any of the above.
  • an embodiment of the present invention further provides a non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by the processor of the electronic device, the electronic device can execute any of the above The cyclic period slot counting method for time-sensitive networks described above.
  • the embodiment of the present invention first obtains the current network synchronization time, and then determines whether a synchronization time jump occurs in the current network synchronization time according to the current network synchronization time and the previously obtained network synchronization time. Next, when the current network synchronization time jumps back in synchronization time, cycle counting is performed according to the preset first cycle period length to obtain a first count value. Finally, count the timeslots in the cycle according to the first count value, and when the synchronization time jumps back to cause the cycle to become longer, the first count value obtained by presetting the length of the first cycle is used to count the time slots in the cycle. Slot counting, when the network synchronization time jumps back in the network synchronization time, the preset cycle length and the time slot count in the normal cycle can still be maintained, which ensures the bandwidth isolation and determinism of the network nodes.
  • Fig. 1 is the internal structure principle block diagram of the existing time gating processing module
  • Fig. 2 is the flow chart that the existing method carries out time slot counting
  • Fig. 3 is the effect diagram of using the existing method to count the time slot when the synchronization time backjump occurs
  • FIG. 4 is a flowchart of an embodiment of a method for counting cyclic period time slots in a time-sensitive network provided by an embodiment of the present invention
  • 5 is an effect diagram of time slot counting using the method provided in the embodiment of the present invention when synchronization time backjump occurs;
  • Fig. 6 is the specific application embodiment flow chart of the cycle time slot counting method of the time-sensitive network provided by the embodiment of the present invention.
  • FIG. 7 is a schematic block diagram of an internal structure of a time-gated processing module provided by an embodiment of the present invention.
  • FIG. 8 is a schematic block diagram of an internal structure of an intelligent terminal provided by an embodiment of the present invention.
  • the block diagram of the internal structure of the time-gated processing module defined by the IEEE 802.1Qbv protocol in the time-sensitive network is shown in Figure 1.
  • the time-gated processing module defined by the IEEE 802.1Qbv protocol includes four units, namely the time-gated list configuration unit , cycle timer, gated list executor, and slot timer.
  • the time gated list configuration unit is used to configure the gated start time, cycle period and gated time slot
  • the cycle timer timer is used to output the cycle start flag according to the expected cycle cycle start time, so
  • the gated list executor and the time slot timer are used to complete the count value of each gated time slot according to the cycle start flag output by the cycle cycle timer.
  • the flow chart of the loop cycle counter outputting the cycle cycle start flag according to the network synchronization time is shown in Figure 2. It can be seen from Figure 2 that the cycle cycle counter uses the network synchronization time to compare with the expected cycle cycle start time. Once the current synchronization When the time reaches or exceeds the expected cycle start time, the cycle cycle start flag is output to the gated list executor and the time slot timer to count the time slots in the cycle cycle.
  • cycle C there is a synchronization time jump back, that is, the synchronization time jumps to the past time.
  • the synchronization time will go through the process of current time ⁇ past time ⁇ original current time ⁇ expected cycle cycle start time.
  • the cycle counter will always wait for the expected start time of the cycle, resulting in a longer cycle C, that is, a longer time without bandwidth isolation and non-determinism in the node, during which the network is uncontrolled. Users cannot perceive it, nor can it be monitored in existing standards and implementation technologies.
  • this embodiment provides a method for counting cyclic period slots in a time-sensitive network.
  • the preset first cyclic period length can be calculated according to the method. Obtain the first count value, and count the time slots in the cycle according to the first count value, which avoids the no-bandwidth isolation in the node and the lengthening of the non-deterministic time caused by the synchronization time jump, and the network synchronization occurs at the network synchronization time.
  • the preset cycle length and the time slot count in the normal cycle can still be maintained, which ensures the bandwidth isolation and determinism of the network nodes.
  • the current network synchronization time is obtained first, and then, whether the current network synchronization time has a synchronization time jump is determined according to the current network synchronization time and the network synchronization time obtained previously.
  • cycle counting is performed according to the preset first cycle period length to obtain a first count value.
  • Slot counting when the network synchronization time jumps back in the network synchronization time, the preset cycle length and the time slot count in the normal cycle can still be maintained, which ensures the bandwidth isolation and determinism of the network nodes.
  • This embodiment provides a method for counting cyclic time slots in a time-sensitive network, and the method can be applied to an intelligent terminal. Specifically as shown in Figure 4, the method includes:
  • Step S100 Acquire the current network synchronization time, and determine whether a synchronization time jump occurs in the current network synchronization time according to the current network synchronization time and the network synchronization time obtained previously.
  • the current network synchronization time refers to the currently obtained synchronization time of the time-sensitive network.
  • the currently obtained network synchronization time will be less than the previously obtained network synchronization time. Therefore, whether the current network synchronization time has a synchronization time jump can be determined according to the currently acquired network synchronization time and the previously acquired network synchronization time.
  • the current network synchronization time may be acquired in real time, or the current network synchronization time may be acquired at preset time intervals, and the current network synchronization time may be compared with the previously acquired network synchronization time. Compare the network synchronization time with the current network synchronization time to determine whether the synchronization time jumps back to the current network synchronization time.
  • the step of determining whether a synchronization time jumpback occurs in the current network synchronization time according to the current network synchronization time and the network synchronization time obtained last time in step S100 includes:
  • Step S110 when the current network synchronization time is less than the network synchronization time obtained last time, obtain the difference between the current network synchronization time and the network synchronization time obtained last time;
  • Step S120 Compare the difference with a preset synchronization time bounce threshold.
  • Step S130 When the difference is greater than or equal to a preset synchronization time bounce threshold, determine that synchronization time bounce occurs at the current network synchronization time.
  • a synchronization time bounce threshold is further set.
  • the preset synchronization time bounce threshold may be set according to user needs.
  • Step S200 When the current network synchronization time jumps back in synchronization time, cycle counting is performed according to a preset first cycle period length to obtain a first count value.
  • the first cycle length is preset in this embodiment.
  • the cycle count is performed according to the preset length of the first cycle period to obtain the first count value, so that in the subsequent steps, the time slot count in the cycle cycle is performed according to the first count value, so as to ensure that when the network synchronization time jumps back, the network synchronization time is still
  • the preset cycle length and the slot count within the normal cycle can be maintained.
  • the preset first cycle length can be set according to user needs. In order to avoid no bandwidth isolation and non-deterministic time lengthening in the node, the preset first cycle length should be smaller than the cycle length after the synchronization time bounce occurs.
  • the first cycle length is the cycle length of the previous cycle, so that when the network synchronization time jumps back, the last cycle length and the time slot count in the cycle are still normal.
  • Step S300 Count the time slots in the cycle according to the first count value.
  • each cycle is counted by the output cycle start flag.
  • it is determined whether a cycle ends according to the first count value. If it ends, the cycle start flag is output, and according to the output cycle The cycle start flag is counted.
  • step S300 specifically includes:
  • Step S310 comparing the first count value with the first cycle length
  • Step S320 When the first count value is equal to the first cycle length, output a regeneration cycle start flag, and count the time slots in the cycle according to the regeneration cycle start flag.
  • the cycle count is performed according to the preset first cycle period length, and when the first count value reaches the preset first cycle period length, it indicates that one cycle period ends.
  • the first count value is compared with the first cycle length, and when the first count value is equal to the first cycle length, the regeneration cycle start flag is output, and according to the The regeneration cycle start flag is used to count the time slots in the cycle.
  • FIG. 5 it is an effect diagram of using the method provided by the embodiment of the present invention to count time slots when the synchronization time backjump occurs.
  • the cycle C according to the regeneration cycle start mark
  • the cycle C is divided into cycle C1, cycle C2 and cycle C3 to ensure that the synchronization time returns. Bandwidth isolation and determinism for network nodes within a hop time period.
  • the method further includes:
  • Step S210 counting according to the first count value to obtain a second count value
  • Step S220 Determine whether the deviation cycle number of the cycle cycle exceeds the limit according to the second count value.
  • the second count value is used to represent the cycle number of the cycle period.
  • the second count value can be obtained according to the first count value.
  • compare the first count value with the length of the first cycle and when the first count value is equal to the length of the first cycle, add one to the first count; otherwise, continue to obtain the first count count value.
  • the first count value is continuously repeated from 0 to the first cycle length, and the second count value increases by one each time the first count value reaches the first cycle length.
  • the second count value after the second count value is obtained, it is further determined whether the number of deviation periods of the cycle cycle exceeds the limit according to the second count value, and in the When the number of deviation cycles in the cycle exceeds the limit, the output deviation cycle number exceeds the limit alarm to remind the user and perform human intervention when necessary.
  • step S220 includes:
  • Step S221 comparing the second count value with a preset deviation cycle number threshold
  • Step S222 when the second count value is greater than or equal to the preset deviation cycle number threshold, determine that the deviation cycle number of the cycle cycle exceeds the limit, and output an alarm for the deviation cycle number exceeding the limit.
  • a threshold value of deviation cycle number is also preset in this embodiment. After the second count value is obtained, the second count value is compared with the preset deviation cycle number threshold. When When the second count value is greater than or equal to the deviation cycle number threshold, it indicates that the deviation cycle number of the cycle cycle has exceeded the limit, and an over-limit deviation cycle number alarm is output to remind the user.
  • the method further comprises the steps of:
  • Step S410 when the current network synchronization time does not jump back in synchronization time, obtain the expected cycle start time
  • Step S420 Count the time slots in the cycle according to the expected cycle start time.
  • the expected start time of the cycle period is obtained, and the time slot count in the cycle period is performed according to the expected start time of the cycle period.
  • the preset gating start time can be compared with the current network synchronization time.
  • step S420 specifically includes:
  • Step S421 comparing the current network synchronization time with the expected cycle start time
  • Step S422 When the current network synchronization time is greater than or equal to the expected cycle start time, output an original cycle start flag, and count the time slots in the cycle according to the original cycle start flag.
  • the method further includes:
  • Step S510 counting according to the original cycle start flag to obtain a third count value
  • Step S520 Determine whether the cycle deviation of the cycle period exceeds the limit according to the third count value.
  • the third count value is similar to the aforementioned first count value, and represents the cycle length of one cycle period.
  • Counting that is, counting when the original cycle start flag is output to obtain a third count value, and then according to the third count value to determine whether the cycle deviation of the cycle exceeds the limit, when the cycle deviation exceeds the limit, the cycle deviation overrun alarm is output.
  • the present invention also provides a specific application example, as shown in FIG. 6 , which specifically includes the following steps:
  • Step 601 obtaining the current network synchronization time
  • Step 602 when judging whether the current network synchronization time is less than the network synchronization time obtained last time; if so, go to step S603; if not, go to step S601;
  • Step 603 Obtain the difference between the current network synchronization time and the network synchronization time obtained last time;
  • Step 604 determine whether the difference is greater than or equal to the preset synchronization time bounce threshold; if so, go to step S605; if not, go to step S601;
  • Step 605 determining that the current network synchronization time has a synchronization time jump
  • Step 606 performing cycle counting according to the preset first cycle period length to obtain a first count value
  • Step 607 determine whether the first count value is equal to the length of the first cycle; if so, go to step 608; if not, go to step 606;
  • Step 608 outputting the start flag of the regeneration cycle
  • Step 609 Count the time slots in the cycle according to the start flag of the regeneration cycle.
  • an embodiment of the present invention provides a time-gated processing module, which includes: a time-gated list configuration unit, a first cycle unit, a gated list executor, a time slot timer, a second Cycle cycle timer, synchronization time jump detector, cycle cycle selector and cycle cycle deviation detection unit.
  • the time gating list configuration unit is used to configure the gating starting time, the cycle period and the gating time slot.
  • the first cycle timer timer is used to output the original cycle start flag according to the expected cycle start time.
  • the second cycle timer is used to count according to the preset first cycle length when the synchronization time jumps back in the current network synchronization time to obtain a first count value, and output the regeneration cycle according to the first count value start flag; the second cycle timer is also used to obtain a second count value according to the first count value, and output an over-limit alarm for the number of deviation cycles according to the second count value; the second cycle timer is also used to When the current network synchronization time does not jump back to the synchronization time, counting is performed according to the original cycle start flag to obtain a third count value.
  • the gated list executor and the time slot timer are used to complete the count value of each gated time slot according to the original cycle start flag or the regeneration cycle start flag.
  • the synchronization time jump detector is used for acquiring the current network synchronization time, and determining whether a synchronization time jump occurs at the current network synchronization time, and outputs a synchronization time jump flag when a synchronization time jump occurs at the current network synchronization time.
  • the cycle selection unit is used to output the original cycle start flag or the regeneration cycle start flag to the gated list executor.
  • the cycle deviation detector is used for detecting the cycle deviation exceeding the limit according to the third count value, and outputting an alarm for the cycle deviation exceeding the limit.
  • the present invention also provides an intelligent terminal, the principle block diagram of which may be shown in FIG. 8 .
  • the intelligent terminal includes a processor, a memory, a network interface, a display screen, and a temperature sensor connected through a system bus.
  • the processor of the intelligent terminal is used to provide computing and control capabilities.
  • the memory of the intelligent terminal includes a non-volatile storage medium and an internal memory.
  • the nonvolatile storage medium stores an operating system and a computer program.
  • the internal memory provides an environment for the execution of the operating system and computer programs in the non-volatile storage medium.
  • the network interface of the intelligent terminal is used for communicating with external terminals through network connection.
  • the computer program when executed by a processor, implements a cycle time slot counting method for a time sensitive network.
  • the display screen of the smart terminal may be a liquid crystal display screen or an electronic ink display screen, and the temperature sensor of the smart terminal is pre-set inside the smart terminal to detect the operating temperature of the internal equipment.
  • FIG. 8 is only a block diagram of a partial structure related to the solution of the present invention, and does not constitute a limitation on the intelligent terminal to which the solution of the present invention is applied. More or fewer components than shown in the figures may be included, or some components may be combined, or have a different arrangement of components.
  • an intelligent terminal includes a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors
  • One or more programs contain instructions to:
  • cycle counting is performed according to the preset first cycle period length to obtain a first count value
  • the time slot count in the cycle period is performed.
  • Nonvolatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in various forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Road (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
  • the present invention discloses a method and an electronic device for counting cyclic period time slots in a time-sensitive network.
  • the method includes: acquiring a current network synchronization time, and synchronizing with a previously acquired network according to the current network synchronization time The time determines whether a synchronization time bounce occurs in the current network synchronization time; when a synchronization time bounce occurs in the current network synchronization time, cycle counting is performed according to the preset first cycle period length to obtain a first count value; according to the The first count value counts the timeslots within the cycle.
  • the present invention uses the first count value obtained by presetting the length of the first cycle to count the time slots in the cycle, and when the network synchronization time jumps back to the network synchronization time, the preset cycle length and the normal cycle can still be maintained.
  • the time slot count within the network ensures bandwidth isolation and determinism of network nodes.

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Abstract

本发明公开了一种时间敏感网络的循环周期时隙计数方法及电子设备,所述方法包括:获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳;当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值;根据所述第一计数值进行循环周期内的时隙计数。本发明通过预设第一循环周期长度得到的第一计数值进行循环周期内的时隙计数,在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数,保证了网络节点的带宽隔离和确定性。

Description

一种时间敏感网络的循环周期时隙计数方法及电子设备 技术领域
本发明涉及通信技术领域,尤其涉及的是一种时间敏感网络的循环周期时隙计数方法及电子设备。
背景技术
时间敏感网络(Time Sensitive Networking,TSN)将时间划分成循环周期反复循环,在每个循环周期内配置一个门控列表,列表里有多个条目,每个条目对应一个门控时隙。一个或者多个业务流使用同一门控时隙,从而保证各个业务流之间带宽相互隔离以及各业务流的确定性传送。为了保证全网的循环周期、门控时隙的一致性,时间敏感网络必须全网时间同步。
但实际使用中,时间敏感网络并不能做到完全时间同步,例如,在同步报文丢失或者同步源切换等情况下,可能会发生比较大的同步时间跳变,导致循环周期变长,无法保持网络节点的带宽隔离和确定性。
因此,现有技术还有待改进和发展。
发明内容
本发明要解决的技术问题在于,针对现有技术的上述缺陷,提供一种时间敏感网络的循环周期时隙计数方法及电子设备,旨在解决现有技术中网络同步时间发生跳变时,导致循环周期变长,无法保证网络节点的带宽隔离和确定性的问题。
本发明解决问题所采用的技术方案如下:
第一方面,本发明实施例提供一种时间敏感网络的循环周期时隙计数方法,其中,所述方法包括:
获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳;
当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值;
根据所述第一计数值进行循环周期内的时隙计数。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述根据所述当前网络同步 时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳的步骤包括:
当所述当前网络同步时间小于前次获取的网络同步时间时,获取所述当前网络同步时间与前次获取的网络同步时间的差值;
将所述差值与预设同步时间回跳阈值进行比较;
当所述差值大于或者等于预设同步时间回跳阈值时,确定所述当前网络同步时间发生同步时间回跳。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述根据所述第一计数值,进行循环周期内的时隙计数的步骤包括:
将所述第一计数值与所述第一循环周期长度进行比较;
当所述第一计数值等于所述第一循环周期长度时,输出再生循环周期开始标志,并根据所述再生循环周期开始标志进行循环周期内的时隙计数。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述方法还包括:
根据所述第一计数值进行计数,得到第二计数值;
根据所述第二计数值确定循环周期的偏差周期数是否超限。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述根据所述第二计数值确定循环周期的偏差周期数是否超限的步骤包括:
将所述第二计数值与预设偏差周期数阈值进行比较;
当所述第二计数值大于或者等于预设偏差周期数阈值时,确定循环周期的偏差周期数超限,并输出偏差周期数超限报警。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述方法还包括:
当所述当前网络同步时间未发生同步时间回跳时,获取预期循环周期起始时间;
根据所述预期循环周期起始时间进行循环周期内的时隙计数。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述根据所述预期循环周期起始时间进行循环周期内的时隙计数的步骤包括:
将所述当前网络同步时间与所述预期循环周期起始时间进行比较;
当所述当前网络同步时间大于或者等于所述预期循环周期起始时间时,输出原始循环周期开始标志,并根据所述原始循环周期开始标志进行循环周期内的时隙计数。
所述的时间敏感网络的循环周期时隙计数方法,其中,所述方法还包括:
根据所述原始循环周期开始标志进行计数,得到第三计数值;
根据所述第三计数值确定循环周期的周期偏差是否超限。
第二方面,本发明实施还提供一种智能终端,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于执行如上述任意一项所述的时间敏感网络的循环周期时隙计数方法。
第三方面,本发明实施例还提供一种非临时性计算机可读存储介质,当所述存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行如上述中任意一项所述的时间敏感网络的循环周期时隙计数方法。
本发明的有益效果:本发明实施例首先获取当前网络同步时间,然后,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳。接着,当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值。最后,根据所述第一计数值进行循环周期内的时隙计数,当同步时间回跳导致循环周期变长时,通过预设第一循环周期长度得到的第一计数值进行循环周期内的时隙计数,在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数,保证了网络节点的带宽隔离和确定性。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是现有时间门控处理模块的内部结构原理框图;
图2是现有方法进行时隙计数的流程图;
图3是在发生同步时间回跳时,使用现有方法进行时隙计数的效果图;
图4是本发明实施例提供的时间敏感网络的循环周期时隙计数方法的一个实施例流程图;
图5是在发生同步时间回跳时,使用本发明实施例中提供的方法进行时隙计数的效果图;
图6是本发明实施例提供的时间敏感网络的循环周期时隙计数方法的具体应用实施 例流程图;
图7是本发明实施例提供的时间门控处理模块的内部结构原理框图;
图8是本发明实施例提供的智能终端的内部结构原理框图。
具体实施方式
为使本发明的目的、技术方案及优点更加清楚、明确,以下参照附图并举实施例对本发明进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
需要说明,若本发明实施例中有涉及方向性指示(诸如上、下、左、右、前、后……),则该方向性指示仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。
时间敏感网络中的IEEE 802.1Qbv协议定义的时间门控处理模块的内部结构原理框图如图1所示,IEEE 802.1Qbv协议定义的时间门控处理模块包括四个单元,即时间门控列表配置单元、循环周期计时器、门控列表执行器以及时隙定时器。所述时间门控列表配置单元用于进行门控起始时间、循环周期以及门控时隙的配置,所述循环周期计时器计时器用于根据预期循环周期起始时间输出循环周期开始标志,所述门控列表执行器和所述时隙定时器用于根据循环周期计时器输出的循环周期开始标志完成每个门控时隙的计数值。其中,循环周期计数器根据网络同步时间输出循环周期开始标志的流程图如图2所示,由图2可以看出,循环周期计数器使用网络同步时间与预期循环周期起始时间进行比较,一旦当前同步时间达到或者超过预期周期起始时间,输出循环周期开始标志给门控列表执行器和时隙定时器进行循环周期内的时隙计数。
由于循环周期计数器完全依赖于网络同步时间,如图3所示,在循环周期A、B内,由于同步时间没有跳变或者跳变很小,所以A、B循环周期长度与预期相同或者相近。在循环周期C中,出现了一次同步时间跳回,即同步时间往过去时间跳变,此时同步时间将会经历当前时间→过去时间→原来的当前时间→预期循环周期起始时间的过程,此时循环周期计数器会一直等待预期循环周期起始时间,从而导致循环周期C变长,也就是节点内无带宽隔离和非确定性的时间变长,这段时间内网络是不受控的,用户无法感知,且现有标准和实现技术中也无法监测。
为了解决现有技术的问题,本实施例提供了一种时间敏感网络的循环周期时隙计数方法,通过所述方法在网络同步时间发生同步时间回跳时,可以根据预设第一循环周期 长度得到第一计数值,并根据第一计数值进行循环周期内的时隙计数,避免了由于同步时间回跳导致的节点内无带宽隔离和非确定性时间变长,在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数,保证了网络节点的带宽隔离和确定性。具体实施时,首先获取当前网络同步时间,然后,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳。接着,当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值。最后,根据所述第一计数值进行循环周期内的时隙计数,当同步时间回跳导致循环周期变长时,通过预设第一循环周期长度得到的第一计数值进行循环周期内的时隙计数,在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数,保证了网络节点的带宽隔离和确定性。
示例性方法
本实施例提供一种时间敏感网络的循环周期时隙计数方法,该方法可以应用于智能终端。具体如图4中所示,所述方法包括:
步骤S100、获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳。
具体地,所述当前网络同步时间是指当前获取的时间敏感网络的同步时间,对于发生同步时间回跳的时间敏感网络来说,当前获取的网络同步时间会小于前次获取的网络同步时间,因此,可以根据当前获取的网络同步时间与前次获取的网络同步时间确定当前网络同步时间是否发生同步时间回跳。本实施例可以实时获取当前网络同步时间,或者每隔预设时间间隔获取当前网络同步时间,并将当前网络同步时间与前次获取的网络同步时间进行比较,根据当前网络同步时间与前次获取的网络同步时间进行比较,确定当前网络同步时间是否发生同步时间回跳。
在一具体实时方式中,步骤S100中所述根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳的步骤包括:
步骤S110、当所述当前网络同步时间小于前次获取的网络同步时间时,获取所述当前网络同步时间与前次获取的网络同步时间的差值;
步骤S120、将所述差值与预设同步时间回跳阈值进行比较。
步骤S130、当所述差值大于或者等于预设同步时间回跳阈值时,确定所述当前网络同步时间发生同步时间回跳。
具体地,在判断当前网络同步时间是否发生同步时间回跳时,首先将当前网络同步时间与前次获取的网络同步时间进行比较,当当前网络同步时间小于前次获取的网络同步时间时,说明当前网络同步时间发生回跳。考虑到当前网络同步时间回跳量较少时,循环周期偏差较小,本实时例中还进一步设置了同步时间回跳阈值,当判断当前网络同步时间小于前次获取的网络同步时间时,进一步获取当前网络同步时间与前次获取的网络同步时间的差值,并将差值与预设同步时间回跳阈值进行比较,当差值大于或者等于预设同步时间回跳阈值时,确定当前网络同步时间发生同步时间回跳。具体实施时,预设同步时间回跳阈值可以根据用户需要进行设定。
步骤S200、当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值。
具体地,当确定当前网络同步时间发生同步时间回跳时,按照现有技术,需要等待当前网络同步时间达到或者超过预期循环周期起始时间才输出循环周期开始标志,导致节点内无带宽隔离和非确定性的时间变长。为了避免当前网络同步时间回跳导致节点内无带宽隔离和非确定性的时间变长,本实施例中预先设置了第一循环周期长度,当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值,以便后续步骤中根据第一计数值进行循环周期内的时隙计数,保证在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数。预设第一循环周期长度可以根据用户需要进行设定,为了避免节点内无带宽隔离和非确定性的时间变长,预设第一循环周期长度应该小于发生同步时间回跳后的循环周期长度,在一具体实施例中,第一循环周期长度为上一个循环周期的循环周期长度,从而使得网络同步时间回跳时,仍保持上一次的循环周期长度以及循环周期内的时隙计数正常。
步骤S300、根据所述第一计数值进行循环周期内的时隙计数。
具体地,每个循环周期是以输出的循环周期开始标志进行时隙计数,本实施例中根据第一计数值确定一个循环周期是否结束,若结束则输出循环周期开始标志,并根据输出的循环周期开始标志进行计数。
在一具体实施例中,步骤S300具体包括:
步骤S310、将所述第一计数值与所述第一循环周期长度进行比较;
步骤S320、当所述第一计数值等于所述第一循环周期长度时,输出再生循环周期开始标志,并根据所述再生循环周期开始标志进行循环周期内的时隙计数。
由于确定当前网络同步时间发生同步时间回跳时,是根据预设第一循环周期长度进行循环计数,则当第一计数值达到预设第一循环周期长度时,表明一个循环周期结束。本实施例中在获取到第一计数值后,将第一计数值与第一循环周期长度进行比较,当第一计数值等于第一循环周期长度时,输出再生循环周期开始标志,并根据所述再生循环周期开始标志进行循环周期内的时隙计数。
如图5所示,为在发生同步时间回跳时,使用本发明实施例提供的方法进行时隙计数的效果图,从图5可以看出,在循环周期C中,按照再生循环周期开始标志进行循环周期内的时隙计数时,保持上一次的循环周期长度和循环周期内的时隙计数正常,循环周期C被分割为循环周期C1、循环周期C2以及循环周期C3,保证了同步时间回跳时间段内的网络节点的带宽隔离和确定性。
在一具体实施方式中,所述方法还包括:
步骤S210、根据所述第一计数值进行计数,得到第二计数值;
步骤S220、根据所述第二计数值确定循环周期的偏差周期数是否超限。
具体地,所述第二计数值用于表示循环周期的周期数,当获取到第一计数值后,即可根据第一计数值,得到第二计数值。当获取到第一计数值后,将第一计数值与第一循环周期长度进行比较,当第一计数值等于第一循环周期长度时,将第一计数值加一;否则,继续获取第一计数值。在计数过程中,所述第一计数值不断的重复从0到第一循环周期长度,所述第二计数值在每次第一计数值达到第一循环周期长度时增加一。
为了解决现有标准和计数中没有对循环周期偏差进行检测的方法,本实施例中在获取到第二计数值后,进一步根据第二计数值确定循环周期的偏差周期数是否超限,并在循环周期的偏差周期数超限时,输出偏差周期数超限报警,以提醒用户并在必要时进行人为干预。
在一具体实施例中,步骤S220包括:
步骤S221、将所述第二计数值与预设偏差周期数阈值进行比较;
步骤S222、当所述第二计数值大于或者等于预设偏差周期数阈值时,确定循环周期的偏差周期数超限,并输出偏差周期数超限报警。
为了衡量循环周期的偏差周期数是否超限,本实施例中还预先设置了偏差周期数阈值,当获取到第二计数值后,将第二计数值与预设偏差周期数阈值进行比较,当第二计数值大于或者等于所述偏差周期数阈值时,表明循环周期的偏差周期数已超限,并输出偏差周期数超限报警向用户进行提醒。
在一具体实施方式中,所述方法还包括步骤:
步骤S410、当所述当前网络同步时间未发生同步时间回跳时,获取预期循环周期起始时间;
步骤S420、根据所述预期循环周期起始时间进行循环周期内的时隙计数。
具体地,当确定当前网络同步时间未发生同步时间回跳时,获取预期循环周期起始时间,并根据预期循环周期起始时间进行循环周期内的时隙计数。在获取预期循环周期起始时间时,可以将预先设置的门控起始时间与当前网络同步时间进行比较,当门控起始时间大于或者等于当前网络同步时间时,根据门控起始时间与循环周期确定预期循环周期起始时间,其中,预期循环周期起始时间=门控起始时间+k*循环周期;当门控起始时间小于当前网络同步时间时,将门控起始时间作为预期循环周期。
在一具体实施方式中,步骤S420具体包括:
步骤S421、将所述当前网络同步时间与所述预期循环周期起始时间进行比较;
步骤S422、当所述当前网络同步时间大于或者等于所述预期循环周期起始时间时,输出原始循环周期开始标志,并根据所述原始循环周期开始标志进行循环周期内的时隙计数。
具体地,获取到当前网络同步时间后,将当前网络同步时间与预期循环周期的起始时间进行比较,当确定当前网络同步时间大于或者等于所述预期循环周期起始时间时,输出原始循环周期开始标志,并根据所述原始循环周期开始标志进行循环周期内的时隙计数。
在一具体实施方式中,所述方法还包括:
步骤S510、根据所述原始循环周期开始标志进行计数,得到第三计数值;
步骤S520、根据所述第三计数值确定循环周期的周期偏差是否超限。
具体地,所述第三计数值与前述第一计数值类似,代表一个循环周期的循环周期长度,当确定所述当前网络同步时间未发生同步时间回跳时,则根据原始循环周期开始标志进行计数,即在输出原始循环周期开始标志时进行计数,得到第三计数值,然后根据第三计数值确定循环周期的周期偏差是否超限,在周期偏差超限时,输出周期偏差超限报警。
在根据第三计数值确定循环周期的周期偏差是否超限时,首先将第三计数值与实际循环周期的周期长度相减并取绝对值,得到周期偏差,然后将周期偏差与预设周期偏差阈值进行比较,当第三计数值大于预设周期偏差阈值时,则确定循环周期的周期偏差超 限,并输出周期偏差超限报警。
为了更好地理解本发明的技术,本发明还提供一种具体的应用实施例,如图6中所示,具体包括如下步骤:
步骤601、获取当前网络同步时间;
步骤602、判断当前网络同步时间是否小于前次获取的网络同步时间时;若是,则执行步骤S603;若否,则执行步骤S601;
步骤603、获取当前网络同步时间与前次获取的网络同步时间的差值;
步骤604、判断差值是否大于或者等于预设同步时间回跳阈值;若是,则执行步骤S605;若否,则执行步骤S601;
步骤605、确定当前网络同步时间发生同步时间回跳;
步骤606、根据预设第一循环周期长度进行循环计数,得到第一计数值;
步骤607、判断第一计数值是否等于第一循环周期长度;若是,则执行步骤608;若否,则执行步骤606;
步骤608、输出再生循环周期开始标志;
步骤609、根据再生循环周期开始标志进行循环周期内的时隙计数。
示例性设备
如图7中所示,本发明实施例提供一种时间门控处理模块,该模块包括:时间门控列表配置单元、第一循环周期单元、门控列表执行器、时隙定时器、第二循环周期计时器、同步时间跳变检测器、循环周期选择器以及循环周期偏差检测单元。具体地,所述时间门控列表配置单元用于进行门控起始时间、循环周期以及门控时隙的配置。所述第一循环周期计时器计时器用于根据预期循环周期起始时间输出原始循环周期开始标志。所述第二循环周期计时器,用于在当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行计数,得到第一计数值,并根据第一计数值输出再生循环周期开始标志;所述第二循环周期计时器还用于根据第一计数值得到第二计数值,并根据第二计数值输出偏差周期数超限报警;所述第二循环周期计时器还用于在当前网络同步时间未发生同步时间回跳时,根据原始循环周期开始标志进行计数,得到第三计数值。所述门控列表执行器和所述时隙定时器用于根据原始循环周期开始标志或再生循环周期开始标志完成每个门控时隙的计数值。所述同步时间跳变检测器,用于获取当前网络同步时间,并确定当前网络同步时间是否发生同步回跳,在当前网络同步时间发生同步时间回跳时,输出同步时间回跳标志。所述循环周期选择单元用于向门控列表执行器输出原始 循环周期开始标志或再生循环周期开始标志。所述循环周期偏差检测器用于根据第三计数值检测周期偏差超限,并输出周期偏差超限报警。
基于上述实施例,本发明还提供了一种智能终端,其原理框图可以如图8所示。该智能终端包括通过系统总线连接的处理器、存储器、网络接口、显示屏、温度传感器。其中,该智能终端的处理器用于提供计算和控制能力。该智能终端的存储器包括非易失性存储介质、内存储器。该非易失性存储介质存储有操作系统和计算机程序。该内存储器为非易失性存储介质中的操作系统和计算机程序的运行提供环境。该智能终端的网络接口用于与外部的终端通过网络连接通信。该计算机程序被处理器执行时以实现一种时间敏感网络的循环周期时隙计数方法。该智能终端的显示屏可以是液晶显示屏或者电子墨水显示屏,该智能终端的温度传感器是预先在智能终端内部设置,用于检测内部设备的运行温度。
本领域技术人员可以理解,图8中示出的原理框图,仅仅是与本发明方案相关的部分结构的框图,并不构成对本发明方案所应用于其上的智能终端的限定,具体的智能终端可以包括比图中所示更多或更少的部件,或者组合某些部件,或者具有不同的部件布置。
在一个实施例中,提供了一种智能终端,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于进行以下操作的指令:
获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳;
当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值;
根据所述第一计数值进行循环周期内的时隙计数。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程,是可以通过计算机程序来指令相关的硬件来完成,所述的计算机程序可存储于一非易失性计算机可读取存储介质中,该计算机程序在执行时,可包括如上述各方法的实施例的流程。其中,本发明所提供的各实施例中所使用的对存储器、存储、数据库或其它介质的任何引用,均可包括非易失性和/或易失性存储器。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局 限,RAM以多种形式可得,诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。
综上所述,本发明公开了一种时间敏感网络的循环周期时隙计数方法及电子设备,所述方法包括:获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳;当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值;根据所述第一计数值进行循环周期内的时隙计数。本发明通过预设第一循环周期长度得到的第一计数值进行循环周期内的时隙计数,在网络同步时间发生网络同步时间回跳时,仍能够保持预设循环周期长度以及正常的循环周期内的时隙计数,保证了网络节点的带宽隔离和确定性。
应当理解的是,本发明的应用不限于上述的举例,对本领域普通技术人员来说,可以根据上述说明加以改进或变换,所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (10)

  1. 一种时间敏感网络的循环周期时隙计数方法,其特征在于,所述方法包括:
    获取当前网络同步时间,根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳;
    当所述当前网络同步时间发生同步时间回跳时,根据预设第一循环周期长度进行循环计数,得到第一计数值;
    根据所述第一计数值进行循环周期内的时隙计数。
  2. 根据权利要求1所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述根据所述当前网络同步时间与前次获取的网络同步时间确定所述当前网络同步时间是否发生同步时间回跳的步骤包括:
    当所述当前网络同步时间小于前次获取的网络同步时间时,获取所述当前网络同步时间与前次获取的网络同步时间的差值;
    将所述差值与预设同步时间回跳阈值进行比较;
    当所述差值大于或者等于预设同步时间回跳阈值时,确定所述当前网络同步时间发生同步时间回跳。
  3. 根据权利要求1所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述根据所述第一计数值,进行循环周期内的时隙计数的步骤包括:
    将所述第一计数值与所述第一循环周期长度进行比较;
    当所述第一计数值等于所述第一循环周期长度时,输出再生循环周期开始标志,并根据所述再生循环周期开始标志进行循环周期内的时隙计数。
  4. 根据权利要求1所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述方法还包括:
    根据所述第一计数值进行计数,得到第二计数值;
    根据所述第二计数值确定循环周期的偏差周期数是否超限。
  5. 根据权利要求4所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述根据所述第二计数值确定循环周期的偏差周期数是否超限的步骤包括:
    将所述第二计数值与预设偏差周期数阈值进行比较;
    当所述第二计数值大于或者等于预设偏差周期数阈值时,确定循环周期的偏差周期数超限,并输出偏差周期数超限报警。
  6. 根据权利要求1所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述方法还包括:
    当所述当前网络同步时间未发生同步时间回跳时,获取预期循环周期起始时间;
    根据所述预期循环周期起始时间进行循环周期内的时隙计数。
  7. 根据权利要求6所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述根据所述预期循环周期起始时间进行循环周期内的时隙计数的步骤包括:
    将所述当前网络同步时间与所述预期循环周期起始时间进行比较;
    当所述当前网络同步时间大于或者等于所述预期循环周期起始时间时,输出原始循环周期开始标志,并根据所述原始循环周期开始标志进行循环周期内的时隙计数。
  8. 根据权利要求7所述的时间敏感网络的循环周期时隙计数方法,其特征在于,所述方法还包括:
    根据所述原始循环周期开始标志进行计数,得到第三计数值;
    根据所述第三计数值确定循环周期的周期偏差是否超限。
  9. 一种智能终端,其特征在于,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于执行如权利要求1-8中任意一项所述的方法。
  10. 一种非临时性计算机可读存储介质,当所述存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行如权利要求1-8中任意一项所述的方法。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103684728A (zh) * 2012-09-04 2014-03-26 中国航空工业集团公司第六三一研究所 Fc网络时钟同步误差补偿方法
WO2020021309A1 (en) * 2018-07-25 2020-01-30 Nokia Solutions And Networks Oy Synchronizing tsn master clocks in wireless networks
CN111385224A (zh) * 2020-02-14 2020-07-07 重庆邮电大学 一种EtherCAT与时间敏感网络的流量调度方法
CN112511283A (zh) * 2020-11-12 2021-03-16 鹏城实验室 一种时间敏感网络的循环周期时隙计数方法及电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7362149B1 (en) * 2006-10-23 2008-04-22 Agilent Technologies, Inc. Zero crossing detection and correction upon a distorted primary AC power line voltage
EP2586142B1 (en) * 2010-07-07 2017-05-03 Huawei Technologies Co., Ltd. Deterministic placement of timestamp packets using a periodic gap
CN104219015B (zh) * 2013-06-03 2018-05-25 中兴通讯股份有限公司 一种sdh中支路信号的时钟和数据恢复方法及装置
CN104679897A (zh) * 2015-03-18 2015-06-03 成都金本华科技股份有限公司 一种大数据环境下的数据检索方法
CN107517069B (zh) * 2017-08-22 2020-06-02 深圳市华信天线技术有限公司 跳频同步的方法、装置、接收机以及发射机
CN111565083A (zh) * 2019-02-14 2020-08-21 北京三星通信技术研究有限公司 时间同步的方法、ue、基站、设备及计算机可读存储介质
CN111654908A (zh) * 2020-07-03 2020-09-11 安徽理工大学 基于时间敏感网络的井下混合网络时间同步方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103684728A (zh) * 2012-09-04 2014-03-26 中国航空工业集团公司第六三一研究所 Fc网络时钟同步误差补偿方法
WO2020021309A1 (en) * 2018-07-25 2020-01-30 Nokia Solutions And Networks Oy Synchronizing tsn master clocks in wireless networks
CN111385224A (zh) * 2020-02-14 2020-07-07 重庆邮电大学 一种EtherCAT与时间敏感网络的流量调度方法
CN112511283A (zh) * 2020-11-12 2021-03-16 鹏城实验室 一种时间敏感网络的循环周期时隙计数方法及电子设备

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PAHLEVAN MARYAM; BALAKRISHNA BALAKRISHNA; OBERMAISSER ROMAN: "Simulation Framework for Clock Synchronization in Time Sensitive Networking", 2019 IEEE 22ND INTERNATIONAL SYMPOSIUM ON REAL-TIME DISTRIBUTED COMPUTING (ISORC), IEEE, 7 May 2019 (2019-05-07), pages 213 - 220, XP033576220, DOI: 10.1109/ISORC.2019.00046 *

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