WO2022085572A1 - Low-resistance component, circuit board, and manufacturing method - Google Patents

Low-resistance component, circuit board, and manufacturing method Download PDF

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Publication number
WO2022085572A1
WO2022085572A1 PCT/JP2021/038139 JP2021038139W WO2022085572A1 WO 2022085572 A1 WO2022085572 A1 WO 2022085572A1 JP 2021038139 W JP2021038139 W JP 2021038139W WO 2022085572 A1 WO2022085572 A1 WO 2022085572A1
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WIPO (PCT)
Prior art keywords
low resistance
resistance component
conductor pattern
circuit board
substrate
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PCT/JP2021/038139
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French (fr)
Japanese (ja)
Inventor
祥吾 中山
優 坂口
Original Assignee
パナソニックＩｐマネジメント株式会社
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Publication of WO2022085572A1 publication Critical patent/WO2022085572A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern

Definitions

  • the present disclosure generally relates to low resistance components, circuit boards, and manufacturing methods. More specifically, the present disclosure relates to a low resistance component bonded to a printed circuit board, a circuit board including the low resistance component and the printed circuit board, and a method for manufacturing the low resistance component.
  • Patent Document 1 describes that a wiring pattern (conductor pattern) formed on a printed circuit board or the like needs to have a cross-sectional area according to the amount of flowing current in order to prevent excessive heat generation of the wiring when energized. There is. Further, it is described that when a power device or a control device is included, a large cross-sectional area is required for the wiring pattern of the power supply system having a large amount of current, but there is a limit to widening the wiring width. Further, as a method of further increasing the current capacity without widening the wiring width, there are a method of increasing the thickness of the wiring and a method of forming a pattern by using a plurality of conductive layers of a multilayer board in parallel. There is.
  • Patent Document 1 it is described in Patent Document 1 that there is a limit to unnecessarily increasing the number of conductive layers in a method of using a plurality of conductive layers of a multilayer substrate in parallel.
  • Patent Document 1 discloses a wiring structure for solving these problems.
  • This wiring structure includes a resin layer and wiring formed on the resin layer.
  • the resin layer has a plurality of parallel grooves in the region where the wiring is formed.
  • the wiring is composed of a plating film formed on the surface of the resin layer in the region where the wiring is formed and the inner wall surface of the plurality of grooves.
  • the printed circuit board may still be large.
  • the present disclosure has been made in view of the above reasons, and an object thereof is to provide a low resistance component, a circuit board, and a manufacturing method capable of suppressing an increase in the size of a printed circuit board.
  • the low resistance component of one aspect of the present disclosure is configured to be joinable on a conductor pattern formed on a printed circuit board.
  • the low resistance component includes a substrate formed in a block shape and having conductivity, and a plating layer containing Sn.
  • the plating layer is provided on at least one surface of the substrate facing the conductor pattern.
  • the circuit board of one aspect of the present disclosure includes the above low resistance component and the printed circuit board having the conductor pattern to which the low resistance component can be joined.
  • the manufacturing method of one aspect of the present disclosure is a manufacturing method of one or a plurality of low resistance parts.
  • the manufacturing method includes a plating step and a cutting step.
  • a plating step a plating layer containing Sn is formed on at least one surface of a strip-shaped hoop material that serves as a conductive substrate.
  • the cutting step the hoop material on which the plating layer is formed is cut into block-shaped pieces.
  • FIG. 1A is a schematic perspective view of a low resistance component according to an embodiment.
  • FIG. 1B is a schematic partial plan view of a printed circuit board in which a plurality of the same low resistance components are mounted on a conductor pattern.
  • FIG. 1C is a schematic partial side view of the printed circuit board of the same.
  • 2A to 2C are diagrams for explaining a method for manufacturing a low resistance component according to an embodiment.
  • FIG. 3 is a schematic perspective view of a modified example of the same low resistance component.
  • the low resistance component 1 is configured to be joinable on the conductor pattern 3 formed on the printed circuit board 2.
  • the printed circuit board 2 referred to here is a printed wiring board in which conductor wiring (conductor pattern 3) is provided on the surface and inside of a plate-shaped insulating substrate 20 formed of an insulator.
  • Various electronic components such as chip components and lead components can be mounted on the printed circuit board 2.
  • the various electronic components mounted on the printed circuit board 2 and the conductor pattern 3 can form a power system electric circuit such as a power supply circuit or a drive circuit such as a motor, or a signal system electric circuit such as a control circuit.
  • the low resistance component 1 is joined to the conductor pattern 3 formed on the insulating substrate 20 by, for example, soldering.
  • the low resistance component 1 includes a substrate 11 formed in a block shape and having conductivity, and a plating layer 12 containing Sn.
  • the plating layer 12 is provided on at least one surface of the substrate 11 facing the conductor pattern 3 (hereinafter, may be referred to as “first surface 111”).
  • the plating layer 12 is a layer provided to facilitate joining the low resistance component 1 to the conductor pattern 3 by soldering. That is, the provision of the plating layer 12 improves the solder wettability.
  • the low resistance component 1 By joining the low resistance component 1 to the conductor pattern 3, when the printed circuit board 2 is used, a part of the current flowing through the conductor pattern 3 passes through the low resistance component 1. Therefore, it is possible to increase the allowable amount of the current flowing through the printed circuit board 2 without changing the structural design of the conductor pattern 3 itself (increase in thickness and width, formation of grooves, etc.). In other words, it can be said that the partial thickness of the conductor pattern 3 can be substantially increased by retrofitting. As a result, it is possible to suppress the increase in size of the printed circuit board 2.
  • a power system electric circuit and a signal system electric circuit may be provided.
  • the low resistance component 1 is partially bonded only to the conductor pattern 3 constituting the power system electric circuit in which a larger current can flow than the signal system electric circuit, and the current is applied only to the power system electric circuit side. The allowable amount can be easily increased.
  • FIG. 1B shows only a main part of the circuit board 10 according to the present embodiment in an enlarged manner.
  • the circuit board 10 includes a low resistance component 1 and a printed circuit board 2.
  • X axis the axis along the length direction of the long strip-shaped low resistance component 1
  • Y axis the axis along the thickness direction
  • Z axis the axis along the width direction of the low resistance component 1
  • the direction along the Y axis may be simply referred to as "up and down direction”, the positive direction of the Y axis may be referred to as “upward”, and the negative direction of the Y axis may be referred to as "downward”.
  • the X-axis, Y-axis, and Z-axis are all virtual axes, and the arrows indicating "X", “Y", and “Z” in the drawings are shown for illustration purposes only. , Neither is accompanied by substance. Further, these directions are not shown for the purpose of limiting the directions when the low resistance component 1 is used.
  • the low resistance component 1 is configured to be joinable on the conductor pattern 3 formed on the printed circuit board 2.
  • the low resistance component 1 includes a substrate 11 (conductor) and a plating layer 12.
  • the low resistance component 1 is a chip-shaped component that is flat as a whole.
  • the plating layer 12 is shown by dot hatching so as to be easily distinguishable from the substrate 11.
  • the substrate 11 has conductivity.
  • the substrate 11 is made of metal.
  • the material of the substrate 11 is, for example, Cu (copper).
  • the material of the substrate 11 is the same as that of the conductor pattern 3 of the printed circuit board 2.
  • the material of the substrate 11 may contain a component other than copper, or may be a copper alloy. However, pure copper is desirable because the resistance value of the low resistance component 1 can increase as the amount of components other than copper increases.
  • the material of the substrate 11 may be Ag (silver), Au (gold), or an alloy thereof.
  • the substrate 11 is formed in a block shape.
  • the substrate 11 has a rectangular parallelepiped shape that is flat in the Y-axis direction and long in the X-axis direction.
  • the substrate 11 has a strip shape having a length L1 in the first direction A1 and a width W1 in the second direction A2 orthogonal to the first direction A1.
  • the first direction A1 is a direction along the X axis.
  • the second direction A2 is a direction along the Z axis.
  • the thickness H1 of the substrate 11 is, for example, half or less of the width W1.
  • the length L1 of the substrate 11 is 1 cm
  • the width W1 is 5 mm
  • the thickness H1 is 2.5 mm or less.
  • These numerical values are merely examples and are not particularly limited.
  • the thickness H1 increases, the upper portion of the substrate 11 may become a portion where a current does not flow much as compared with the lower portion, and even considering the cost aspect of the low resistance component 1, the thickness H1 is described above. As you can see, it is preferably less than half the width W1.
  • the plating layer 12 contains Sn (tin) and has conductivity.
  • the plating layer 12 may contain Sn as a main component and other components.
  • the plating layer 12 is a thin film layer.
  • the plating layer 12 is provided on the first surface 111 (lower surface) of the substrate 11 facing at least the conductor pattern 3.
  • the plating layer 12 is provided so as to cover the entire region of the first surface 111.
  • the plating layer 12 may be provided so as to cover only a part of the first surface 111.
  • the plating layer 12 is further both end surfaces in the first direction A1 (hereinafter, may be referred to as "second surface 112" and “third surface 113", respectively). It is also provided in.
  • the second surface 112 is an end surface on the negative side of the X-axis of the substrate 11.
  • the third surface 113 is an end surface on the positive side of the X-axis of the substrate 11.
  • the plating layer 12 is provided so as to cover the entire region of each of the second surface 112 and the third surface 113.
  • the plating layer 12 may be provided on only one of the second surface 112 and the third surface 113 in addition to the first surface 111. Further, the plating layer 12 may be provided so as to cover only a part of each region of the second surface 112 and the third surface 113.
  • the portion of the plating layer 12 covering the first surface 111 is referred to as a first plating portion 121
  • the portion of the plating layer 12 covering the second surface 112 is referred to as a second plating portion 122
  • the portion of the plating layer 12 covering the third surface 113 is referred to as a plating layer.
  • the 12 portions may be referred to as a third plating portion 123. That is, the plating layer 12 includes the first to third plating portions 121 to 123.
  • the first to third plated portions 121 to 123 are continuously integrally formed so as to cover the three surfaces of the substrate 11.
  • the surface of the substrate 11 opposite to the first surface 111 is referred to as a fourth surface 114 (upper surface), and the end surface on the negative side of the Z axis is referred to as a fifth surface 115 (front surface).
  • the end face on the positive side of the Z axis may be referred to as the sixth surface 116 (rear surface).
  • the fourth surface 114 and the end surface on the positive side of the Y axis in the second plating portion 122 and the third plating portion 123 are substantially flush with each other. Further, the fifth surface 115 and the end faces on the negative side of the Z axis in the first plating portion 121, the second plating portion 122, and the third plating portion 123 are substantially flush with each other. Further, the sixth surface 116 and the end faces on the positive side of the Z axis in the first plating portion 121, the second plating portion 122, and the third plating portion 123 are substantially flush with each other.
  • the weight ratio of Cu (copper), which is a component of the conductor (base 11), to the whole is 90% or more, and the rest is approximately Sn (tin) contained in the plating layer 12. ). Even if the component of the conductor (base 11) is Ag (silver) or Au (gold) instead of Cu (copper), the weight ratio is similarly 90% or more. Further, the resistance value of the low resistance component 1 is assumed to be about 0.3 m ⁇ as an example.
  • the printed circuit board 2 has a thickness along the Y-axis direction.
  • the printed circuit board 2 has a conductor pattern 3 to which the low resistance component 1 can be bonded.
  • the printed circuit board 2 is, for example, a single-sided printed wiring board having an insulating substrate 20 (base material) and a conductor pattern 3 (printed wiring).
  • the printed circuit board 2 may be a double-sided printed wiring board.
  • the insulating substrate 20 has electrical insulation.
  • Examples of the insulating substrate 20 include a glass epoxy substrate and the like.
  • the conductor pattern 3 is formed on one side (positive side of the Y axis) of the insulating substrate 20.
  • the conductor pattern 3 can electrically connect a plurality of electronic components (circuit components) mounted on the printed circuit board 2, and can form a circuit together with the plurality of electronic components.
  • the material of the conductor pattern 3 is assumed to be copper (copper foil), but may be aluminum, stainless steel, or the like.
  • the thickness of the conductor pattern 3 is assumed to be, for example, 18 ⁇ m or more and 100 ⁇ m or less, but is not particularly limited.
  • the printed circuit board 2 is obtained by processing a copper foil of a metal-clad laminate into a desired conductor pattern 3 by a photoetching method. A part of the conductor pattern 3 may be covered with a resist layer.
  • the thickness H1 of the substrate 11 in the low resistance component 1 is set to be thicker than the thickness H2 of the conductor pattern 3 (see FIG. 1C).
  • the low resistance component 1 is surface-mounted on the conductor pattern 3 formed on the printed circuit board 2 by soldering. Specifically, the first plated portion 121 is joined onto the conductor pattern 3 by soldering so that the first surface 111 (lower surface) faces the surface of the conductor pattern 3. Further, the second plating portion 122 and the third plating portion 123 are also joined on the conductor pattern 3 by soldering. At that time, it is preferable that the low resistance component 1 is joined onto the conductor pattern 3 so that its length L1 is along the extending direction of the conductor pattern 3.
  • the number of low resistance components 1 mounted on one printed circuit board 2 is not particularly limited. A required number of low resistance components 1 may be mounted depending on the magnitude of the current that can flow in the conductor pattern 3.
  • the low resistance component 1 may be mounted on the conductor pattern 3 by a component mounting machine (chip mounter) like other mounting components (circuit components or the like), or may be manually mounted using tweezers or the like. May be implemented by.
  • a component mounting machine chip mounter
  • a first circuit (signal system electric circuit) and a second circuit (power system electric circuit) in which a relatively large current can flow as compared with the first circuit may be formed. ..
  • the low resistance component 1 of the present embodiment is preferably mounted on the conductor pattern 3 constituting the second circuit among the first circuit and the second circuit.
  • the allowable amount can be increased by locally arranging the low resistance component 1 afterwards. It becomes possible to provide the increased circuit board 10.
  • the "allowable amount" of current will be explained.
  • a conductor pattern such as a copper foil may be burnt out.
  • the substrate itself may be damaged by heat generation such that the temperature exceeds the glass transition point (120 ° C. to 140 ° C.). Therefore, in the substrate design, it is necessary to design the thickness and width of the conductor pattern so that such heat generation does not occur.
  • the allowable amount of current depends on the thickness and width of the conductor pattern, and is designed, for example, for a copper foil having a predetermined thickness, the allowable amount is 1 A (ampere) for a width of 1 mm.
  • the conductor pattern of a circuit through which a large current can flow is designed to have a wide width, for example, in order to increase the allowable amount.
  • the timing for mounting the low resistance component 1 is not particularly limited, and the low resistance component 1 may be mounted at the same time as the circuit component constituting the second circuit (in the same process), or may be mounted before or after the circuit component is mounted. May be good. Further, of course, the low resistance component 1 may be mounted not only on the second circuit but also on the conductor pattern 3 constituting the first circuit.
  • FIG. 1B shows an example in which a plurality of (three in the illustrated example) low resistance components 1 are collectively mounted on the conductor pattern 3.
  • FIG. 1B is a schematic enlarged plan view showing only a main part of the printed circuit board 2.
  • a plurality of low resistance components 1 are arranged side by side on the conductor pattern 3 at substantially equal intervals.
  • Solder fillets 5 are formed on both sides of each low resistance component 1 in the direction of the X-axis by joining the plating layers 12 with solder. That is, in the illustrated example, the two adjacent low resistance components 1 are arranged with a certain gap in consideration of the forming region of the solder fillet 5. However, in order to suppress the heat generation more effectively, it is preferable that the plurality of low resistance components 1 are mounted with as few gaps as possible.
  • the low resistance component 1 having dimensions corresponding to the thickness or width of the conductor pattern 3 formed on the printed circuit board 2 may be selectively arranged from a plurality of types of low resistance components 1.
  • the low resistance component 1 whose width W1 substantially matches the width of the conductor pattern 3 is selected and arranged.
  • the low resistance component 1 By joining the low resistance component 1 according to the present embodiment to the conductor pattern 3, the low resistance component 1 flows through the printed circuit board 2 without changing the structure of the conductor pattern 3 itself (increase in thickness and width, formation of grooves, etc.).
  • the allowable amount of current can be increased. As a result, it is possible to suppress the increase in size of the printed circuit board 2.
  • the thickness H1 of the substrate 11 of the low resistance component 1 is less than half of the width W1, the current easily flows more efficiently. Further, since the thickness H1 of the substrate 11 is thicker than the thickness H2 of the conductor pattern 3, it is possible to provide the low resistance component 1 in which the current easily flows more efficiently. Further, even if the low resistance component 1 is joined, it is possible to suppress the heightening of the printed circuit board 2 as a whole.
  • the plating layer 12 is provided not only on the first surface 111 but also on the second surface 112 and the third surface 113, the reliability of joining to the conductor pattern 3 is improved.
  • the manufacturing method of the low resistance component 1 includes a plating process and a cutting process.
  • FIG. 2A schematically shows a part of the hoop material 4 in a state where one end on the negative side of the Z axis is extended along the direction of the Z axis.
  • the hoop material 4 is a base material that serves as a base material 11 having conductivity in the low resistance component 1.
  • the hoop material 4 is a copper material.
  • the thickness of the hoop material 4 (dimensions in the Y-axis direction) is equal to the thickness H1 of the substrate 11 (for example, 2.5 mm or less).
  • the width of the hoop material 4 (dimension in the direction of the X-axis) is equal to the length L1 of the substrate 11.
  • a plating layer 12 containing Sn (tin) is formed on at least one surface 41 (lower surface) of the strip-shaped hoop material 4.
  • the hoop material 4 is conveyed toward the negative side of the Z axis by the feeding device, and Sn (tin) plating is applied to one surface 41 (lower surface) of the hoop material 4 to form the plating member B1. Fabricate (see FIG. 2B).
  • the first side surface 42 end surface on the negative side of the X axis
  • the second side surface 43 positive side of the X axis
  • Sn is formed as a film on the Cu surface by immersing the one surface 41, the first side surface 42, and the second side surface 43 in a solution containing Sn ions.
  • the hoop material 4 (plating member B1) on which the plating layer 12 is formed is cut into block-shaped individual pieces P1 (see FIG. 2C).
  • a plurality of plating members B1 are conveyed toward the negative side of the Z axis by a feeding device, and are sequentially cut from one end of the negative side of the Z axis by a cutting machine at predetermined intervals (3 in FIG. 2C).
  • Pieces P1 are sequentially generated. Each piece P1 becomes a low resistance component 1.
  • the predetermined interval is equal to the width W1 of each low resistance component 1.
  • the fifth surface 115 (front surface) and the sixth surface 116 (rear surface) of each low resistance component 1 are cut surfaces cut by a cutting machine.
  • the method for manufacturing the low resistance component 1 may further include a step of manufacturing the hoop material 4, or a commercially available copper material may be used as the hoop material 4.
  • the method for manufacturing the low resistance component 1 may further include a step related to a masking process so that the hoop material 4 is partially plated when Sn plating is applied.
  • the method for manufacturing the low resistance component 1 may further include a step related to surface treatment such as polishing treatment for each piece P1 after cutting or the hoop material 4.
  • the method for manufacturing the low resistance component 1 may further include a step of forming a protective film for each piece P1.
  • this manufacturing method it is possible to provide a manufacturing method of one or a plurality of low resistance parts 1 capable of suppressing the increase in size of the printed circuit board 2.
  • the low resistance component 1 has a long plate shape in one direction (first direction A1).
  • the shape of the low resistance component 1 is not particularly limited, and may be, for example, a square plate when viewed along the thickness direction.
  • the low resistance component 1 is provided with a plating layer 12 on three surfaces (first surface 111, second surface 112, third surface 113) of the substrate 11.
  • the low resistance component 1 may be provided with the plating layer 12 on at least the first surface 111 (lower surface).
  • the plating layer 12 may be provided on the fourth surface 114 (upper surface) opposite to the first surface 111.
  • the upper surface and the lower surface (first surface 111, fourth surface 114) of the low resistance component 1A are identified and oriented. Effort is saved.
  • the low resistance component 1 whose width W1 substantially matches the width of the conductor pattern 3 is selected and arranged.
  • a component having a width W1 smaller than or larger than the width of the conductor pattern 3 may be arranged.
  • a plurality of (three) low resistance components 1 are collectively arranged on the conductor pattern 3 (see FIG. 1B).
  • one relatively long low resistance component 1 having a length corresponding to a plurality (three) of the low resistance components 1 shown in FIG. 1B may be arranged on the conductor pattern 3.
  • the low resistance component (1, 1A) is configured to be joinable on the conductor pattern (3) formed on the printed circuit board (2).
  • the low resistance component (1,1A) includes a substrate (11) formed in a block shape and having conductivity, and a plating layer (12) containing Sn.
  • the plating layer (12) is provided on at least one surface (first surface 111) of the substrate (11) facing the conductor pattern (3).
  • the structural design (increase in thickness and width, formation of grooves, etc.) of the conductor pattern (3) itself is changed by joining the low resistance component (1, 1A) to the conductor pattern (3). It is possible to increase the permissible amount of the current flowing through the printed circuit board (2) without doing so. As a result, it becomes possible to suppress the increase in size of the printed circuit board (2).
  • the substrate (11) has a length (L1) in the first direction (A1), and the first direction (A1). It is a strip having a width (W1) in the second direction (A2) orthogonal to the above.
  • the increase in size of the printed circuit board (2) to which the low resistance components (1, 1A) are joined is further suppressed.
  • the thickness (H1) of the substrate (11) is half or less of the width (W1).
  • the thickness (H1) of the substrate (11) is thicker than the thickness (H2) of the conductor pattern (3).
  • the plating layer (12) is further added to the one surface (first surface 111). It is also provided on at least one of both end faces (second surface 112, third surface 113) in one direction (A1).
  • the circuit board (10) according to the sixth aspect includes the low resistance component (1,1A) in any one of the first to fifth aspects, and the printed circuit board (2).
  • the printed circuit board (2) has a conductor pattern (3) to which low resistance components (1, 1A) can be bonded.
  • circuit board (10) capable of suppressing the increase in size of the printed circuit board (2).
  • the substrate (11) has a length (L1) in the first direction (A1) and is orthogonal to the first direction (A1). It is in the shape of a strip having a width (W1) in the second direction (A2).
  • the low resistance component (1,1A) is joined onto the conductor pattern (3) so that the length (L1) is along the extending direction of the conductor pattern (3).
  • circuit board (10) provided with a low resistance component (1,1A) in which a current easily flows more efficiently.
  • the manufacturing method according to the eighth aspect is a manufacturing method for one or a plurality of low resistance parts (1,1A).
  • the manufacturing method includes a plating step and a cutting step.
  • a plating layer (12) containing Sn is formed on at least one surface (41) of the strip-shaped hoop material (4) to be the conductive substrate (11).
  • the cutting step the hoop material (4) on which the plating layer (12) is formed is cut into block-shaped pieces (P1).
  • the configurations according to the second to fifth aspects are not essential configurations for low resistance components (1, 1A) and can be omitted as appropriate. Further, the configuration according to the seventh aspect is not an essential configuration for the circuit board (10) and can be omitted as appropriate.
  • 1,1A Low resistance component 11 Base 111 First surface (one surface of the substrate) 112 Second surface (both ends of the substrate) 113 Third surface (both ends of the substrate) 12 Plating layer 2 Printed circuit board 3 Conductor pattern 4 Hoop material 41 (of hoop material) One side 10 Circuit board A1 1st direction A2 2nd direction H1 (of substrate) Thickness H2 (of conductor pattern) Thickness L1 Length P1 Piece W1 width

Abstract

The present disclosure addresses the problem of suppressing an increase in the size of a printed board. A low-resistance component (1) according to the present disclosure is configured so as to be joinable to a conductor pattern (3) formed on a printed board (2). The low-resistance component (1) comprises a substrate (11) formed in a block shape and having conductivity, and a plating layer (12) containing Sn. The plating layer (12) is provided to at least a first surface (111) of the substrate (11) facing the conductor pattern (3).

Description

低抵抗部品、回路基板、及び製造方法Low resistance components, circuit boards, and manufacturing methods
　本開示は、一般に、低抵抗部品、回路基板、及び製造方法に関する。より詳細には、本開示は、プリント基板に接合される低抵抗部品、当該低抵抗部品とプリント基板とを備えた回路基板、及び、当該低抵抗部品の製造方法に関する。 The present disclosure generally relates to low resistance components, circuit boards, and manufacturing methods. More specifically, the present disclosure relates to a low resistance component bonded to a printed circuit board, a circuit board including the low resistance component and the printed circuit board, and a method for manufacturing the low resistance component.
　特許文献１には、プリント基板等に形成される配線パターン（導体パターン）は、通電時における配線の過度な発熱を防ぐため、流れる電流量に応じた断面積が必要となることが記載されている。またパワーデバイスや制御デバイスを含む場合等では、電流量の多い電源系の配線パターンには大きな断面積が必要となるが、配線幅を広げるのには限界があることが記載されている。また配線幅を広げないで更に電流容量を上げる方法としては、配線の厚みを厚くする方法及び多層の基板の複数の導電層を並列に使用してパターンを形成する方法があることが記載されている。しかし、配線の厚みを厚くする方法は、配線のメッキに時間がかかるという問題があり、また流れる電流が少なくても良い信号線の配線間隔を狭めて微細化を測ることができなくなるという問題があることが、特許文献１に記載されている。また多層の基板の複数の導電層を並列に使用する方法においては、導電層の層数をむやみに増やすことには限界があることが、特許文献１に記載されている。 Patent Document 1 describes that a wiring pattern (conductor pattern) formed on a printed circuit board or the like needs to have a cross-sectional area according to the amount of flowing current in order to prevent excessive heat generation of the wiring when energized. There is. Further, it is described that when a power device or a control device is included, a large cross-sectional area is required for the wiring pattern of the power supply system having a large amount of current, but there is a limit to widening the wiring width. Further, as a method of further increasing the current capacity without widening the wiring width, there are a method of increasing the thickness of the wiring and a method of forming a pattern by using a plurality of conductive layers of a multilayer board in parallel. There is. However, the method of increasing the thickness of the wiring has a problem that it takes time to plate the wiring, and there is a problem that it is not possible to measure the miniaturization by narrowing the wiring interval of the signal line where the flowing current may be small. It is described in Patent Document 1. Further, it is described in Patent Document 1 that there is a limit to unnecessarily increasing the number of conductive layers in a method of using a plurality of conductive layers of a multilayer substrate in parallel.
　そこで、特許文献１では、これらの問題を解消するための配線構造が開示されている。この配線構造は、樹脂層と、樹脂層に形成された配線とを備える。樹脂層は、配線が形成される領域内に複数の平行な溝を有する。配線は、配線が形成される領域内の樹脂層表面と複数の溝の内壁面とに形成されたメッキ膜からなっている。 Therefore, Patent Document 1 discloses a wiring structure for solving these problems. This wiring structure includes a resin layer and wiring formed on the resin layer. The resin layer has a plurality of parallel grooves in the region where the wiring is formed. The wiring is composed of a plating film formed on the surface of the resin layer in the region where the wiring is formed and the inner wall surface of the plurality of grooves.
　特許文献１に記載の配線構造では複数の平行な溝を形成するため、依然としてプリント基板が大きくなる可能性がある。 Since the wiring structure described in Patent Document 1 forms a plurality of parallel grooves, the printed circuit board may still be large.
特開２０１７－１６２８９５号公報Japanese Unexamined Patent Publication No. 2017-162895
　本開示は上記事由に鑑みてなされ、プリント基板の大型化の抑制を図ることが可能な低抵抗部品、回路基板、及び製造方法を提供することを目的とする。 The present disclosure has been made in view of the above reasons, and an object thereof is to provide a low resistance component, a circuit board, and a manufacturing method capable of suppressing an increase in the size of a printed circuit board.
　本開示の一態様の低抵抗部品は、プリント基板に形成される導体パターン上に接合可能に構成される。前記低抵抗部品は、ブロック状に形成されて導電性を有する基体と、Ｓｎを含むメッキ層と、を備える。前記メッキ層は、前記基体の、少なくとも前記導体パターンと対向する一面に設けられている。 The low resistance component of one aspect of the present disclosure is configured to be joinable on a conductor pattern formed on a printed circuit board. The low resistance component includes a substrate formed in a block shape and having conductivity, and a plating layer containing Sn. The plating layer is provided on at least one surface of the substrate facing the conductor pattern.
　本開示の一態様の回路基板は、上記の低抵抗部品と、前記低抵抗部品が接合可能である前記導体パターンを有する前記プリント基板と、を備える。 The circuit board of one aspect of the present disclosure includes the above low resistance component and the printed circuit board having the conductor pattern to which the low resistance component can be joined.
　本開示の一態様の製造方法は、１又は複数個の低抵抗部品の製造方法である。前記製造方法は、メッキ工程と、切断工程と、を含む。前記メッキ工程では、導電性を有する基体となる帯板状のフープ材の少なくとも一面に、Ｓｎを含むメッキ層を形成する。前記切断工程では、前記メッキ層が形成された前記フープ材をブロック状の個片に切断する。 The manufacturing method of one aspect of the present disclosure is a manufacturing method of one or a plurality of low resistance parts. The manufacturing method includes a plating step and a cutting step. In the plating step, a plating layer containing Sn is formed on at least one surface of a strip-shaped hoop material that serves as a conductive substrate. In the cutting step, the hoop material on which the plating layer is formed is cut into block-shaped pieces.
図１Ａは、一実施形態に係る低抵抗部品の模式的な斜視図である。図１Ｂは、同上の低抵抗部品が複数個、導体パターン上に実装されたプリント基板の模式的な部分平面図である。図１Ｃは、同上のプリント基板の模式的な部分側面図である。FIG. 1A is a schematic perspective view of a low resistance component according to an embodiment. FIG. 1B is a schematic partial plan view of a printed circuit board in which a plurality of the same low resistance components are mounted on a conductor pattern. FIG. 1C is a schematic partial side view of the printed circuit board of the same. 図２Ａ～図２Ｃは、一実施形態に係る低抵抗部品の製造方法を説明するための図である。2A to 2C are diagrams for explaining a method for manufacturing a low resistance component according to an embodiment. 図３は、同上の低抵抗部品における変形例の模式的な斜視図である。FIG. 3 is a schematic perspective view of a modified example of the same low resistance component.
　（実施形態）
　以下、本実施形態に係る低抵抗部品１，１Ａ、回路基板１０、及び製造方法について、図１Ａ～図３を参照して説明する。下記の実施形態等において説明する各図は、いずれも模式的な図であり、各図中の各構成要素の大きさ及び厚さそれぞれの比が、必ずしも実際の寸法比を反映しているとは限らない。 (Embodiment)
Hereinafter, the low resistance components 1, 1A, the circuit board 10, and the manufacturing method according to the present embodiment will be described with reference to FIGS. 1A to 3. Each of the figures described in the following embodiments and the like is a schematic view, and it is said that the ratio of the size and the thickness of each component in each figure does not necessarily reflect the actual dimensional ratio. Is not always.
　（１）概要
　まず、本実施形態に係る低抵抗部品１の概要について、図１Ａ～１Ｃを参照して説明する。 (1) Outline First, an outline of the low resistance component 1 according to the present embodiment will be described with reference to FIGS. 1A to 1C.
　本実施形態に係る低抵抗部品１は、プリント基板２に形成される導体パターン３上に接合可能に構成される。ここでいうプリント基板２は、絶縁体により形成された板状の絶縁基板２０の表面及び内部に、導体の配線（導体パターン３）が施されたプリント配線板である。プリント基板２には、チップ部品、リード部品等の種々の電子部品が実装され得る。プリント基板２に実装される種々の電子部品、及び導体パターン３は、電源回路やモータ等の駆動回路等のパワー系の電気回路、又は、制御回路等の信号系の電気回路を構成し得る。低抵抗部品１は、例えば、はんだによって、絶縁基板２０に形成された導体パターン３上に接合される。 The low resistance component 1 according to the present embodiment is configured to be joinable on the conductor pattern 3 formed on the printed circuit board 2. The printed circuit board 2 referred to here is a printed wiring board in which conductor wiring (conductor pattern 3) is provided on the surface and inside of a plate-shaped insulating substrate 20 formed of an insulator. Various electronic components such as chip components and lead components can be mounted on the printed circuit board 2. The various electronic components mounted on the printed circuit board 2 and the conductor pattern 3 can form a power system electric circuit such as a power supply circuit or a drive circuit such as a motor, or a signal system electric circuit such as a control circuit. The low resistance component 1 is joined to the conductor pattern 3 formed on the insulating substrate 20 by, for example, soldering.
　低抵抗部品１は、ブロック状に形成されて導電性を有する基体１１と、Ｓｎを含むメッキ層１２と、を備える。メッキ層１２は、基体１１の、少なくとも導体パターン３と対向する一面（以下、「第１面１１１」と呼ぶこともある）に設けられている。メッキ層１２は、はんだによって低抵抗部品１を導体パターン３に接合しやすくするために設けられる層である。つまり、メッキ層１２が設けられていることで、はんだ濡れ性が向上する。 The low resistance component 1 includes a substrate 11 formed in a block shape and having conductivity, and a plating layer 12 containing Sn. The plating layer 12 is provided on at least one surface of the substrate 11 facing the conductor pattern 3 (hereinafter, may be referred to as “first surface 111”). The plating layer 12 is a layer provided to facilitate joining the low resistance component 1 to the conductor pattern 3 by soldering. That is, the provision of the plating layer 12 improves the solder wettability.
　低抵抗部品１を導体パターン３に接合することで、プリント基板２の利用時においては、導体パターン３を流れる電流の一部が低抵抗部品１を通ることになる。そのため、導体パターン３自体の構造設計（厚みや幅の増加、又は溝の形成等）を変更することなく、プリント基板２を流れる電流の許容量の増加を図れる。言い換えると、実質的に、導体パターン３の部分的な厚みの増加を後付けで図れるといえる。結果的に、プリント基板２の大型化の抑制を図ることが可能となる。 By joining the low resistance component 1 to the conductor pattern 3, when the printed circuit board 2 is used, a part of the current flowing through the conductor pattern 3 passes through the low resistance component 1. Therefore, it is possible to increase the allowable amount of the current flowing through the printed circuit board 2 without changing the structural design of the conductor pattern 3 itself (increase in thickness and width, formation of grooves, etc.). In other words, it can be said that the partial thickness of the conductor pattern 3 can be substantially increased by retrofitting. As a result, it is possible to suppress the increase in size of the printed circuit board 2.
　特に、１つのプリント基板２内で、例えば、パワー系の電気回路と信号系の電気回路とが設けられる場合がある。信号系の電気回路に比べて大きな電流が流れ得るパワー系の電気回路を構成する導体パターン３に対してのみ、部分的に低抵抗部品１を接合させて、パワー系の電気回路側のみ電流の許容量の増加を容易に図れる。 In particular, in one printed circuit board 2, for example, a power system electric circuit and a signal system electric circuit may be provided. The low resistance component 1 is partially bonded only to the conductor pattern 3 constituting the power system electric circuit in which a larger current can flow than the signal system electric circuit, and the current is applied only to the power system electric circuit side. The allowable amount can be easily increased.
　（２）詳細
　次に、本実施形態に係る低抵抗部品１、及び回路基板１０の詳細について、図１Ａ～図２Ｃを参照して説明する。 (2) Details Next, the details of the low resistance component 1 and the circuit board 10 according to the present embodiment will be described with reference to FIGS. 1A to 2C.
　（２．１）全体構成
　図１Ｂは、本実施形態に係る回路基板１０の要部のみを拡大して示している。回路基板１０は、低抵抗部品１と、プリント基板２と、を備える。 (2.1) Overall Configuration FIG. 1B shows only a main part of the circuit board 10 according to the present embodiment in an enlarged manner. The circuit board 10 includes a low resistance component 1 and a printed circuit board 2.
　以下では一例として、各図面に示すように、互いに直交するＸ軸、Ｙ軸及びＺ軸の３軸を設定して説明する。ここでは、長尺で帯板状の低抵抗部品１の長さ方向に沿った軸を「Ｘ軸」とし、厚み方向に沿った軸を「Ｙ軸」とする。また低抵抗部品１の幅方向に沿った軸を「Ｚ軸」とする。以下の説明では、Ｙ軸に沿った方向を、単に、「上下方向」と呼び、Ｙ軸の正の方を「上方」、Ｙ軸の負の方を「下方」と呼ぶことがある。 In the following, as an example, as shown in each drawing, three axes, an X-axis, a Y-axis, and a Z-axis, which are orthogonal to each other, will be set and described. Here, the axis along the length direction of the long strip-shaped low resistance component 1 is referred to as the “X axis”, and the axis along the thickness direction is referred to as the “Y axis”. Further, the axis along the width direction of the low resistance component 1 is referred to as a "Z axis". In the following description, the direction along the Y axis may be simply referred to as "up and down direction", the positive direction of the Y axis may be referred to as "upward", and the negative direction of the Y axis may be referred to as "downward".
　Ｘ軸、Ｙ軸、及びＺ軸は、いずれも仮想的な軸であり、図面中の「Ｘ」、「Ｙ」、「Ｚ」を示す矢印は、説明のために表記しているに過ぎず、いずれも実体を伴わない。また、これらの方向は、低抵抗部品１の使用時の方向を限定する趣旨で表記していない。 The X-axis, Y-axis, and Z-axis are all virtual axes, and the arrows indicating "X", "Y", and "Z" in the drawings are shown for illustration purposes only. , Neither is accompanied by substance. Further, these directions are not shown for the purpose of limiting the directions when the low resistance component 1 is used.
　低抵抗部品１は、プリント基板２に形成される導体パターン３上に接合可能に構成される。 The low resistance component 1 is configured to be joinable on the conductor pattern 3 formed on the printed circuit board 2.
　低抵抗部品１は、基体１１（導電体）とメッキ層１２とを備える。低抵抗部品１は、全体として扁平なチップ状の部品である。図１Ａでは、説明の便宜上、メッキ層１２を、基体１１と区別しやすいように、ドットハッチングで示している。 The low resistance component 1 includes a substrate 11 (conductor) and a plating layer 12. The low resistance component 1 is a chip-shaped component that is flat as a whole. In FIG. 1A, for convenience of explanation, the plating layer 12 is shown by dot hatching so as to be easily distinguishable from the substrate 11.
　基体１１は、導電性を有する。基体１１は、金属製である。基体１１の材質は、例えばＣｕ（銅）である。ここでは一例として、基体１１の材質は、プリント基板２の導体パターン３と同じである。基体１１の材質は、銅以外の成分を含んでもよく、銅合金でもよい。ただし、銅以外の成分が増えるほど、低抵抗部品１の抵抗値が高く成り得るため、純銅が望ましい。或いは、基体１１の材質は、Ａｇ（銀）、Ａｕ（金）、又はこれらの合金でもよい。 The substrate 11 has conductivity. The substrate 11 is made of metal. The material of the substrate 11 is, for example, Cu (copper). Here, as an example, the material of the substrate 11 is the same as that of the conductor pattern 3 of the printed circuit board 2. The material of the substrate 11 may contain a component other than copper, or may be a copper alloy. However, pure copper is desirable because the resistance value of the low resistance component 1 can increase as the amount of components other than copper increases. Alternatively, the material of the substrate 11 may be Ag (silver), Au (gold), or an alloy thereof.
　基体１１は、ブロック状に形成されている。ここでは一例として、基体１１は、Ｙ軸の方向に扁平で、Ｘ軸の方向に長尺な直方体状となっている。言い換えると、基体１１は、図１Ａに示すように、第１方向Ａ１に長さＬ１を有し、第１方向Ａ１と直交する第２方向Ａ２に幅Ｗ１を有した帯板状である。第１方向Ａ１は、Ｘ軸に沿った方向である。第２方向Ａ２は、Ｚ軸に沿った方向である。 The substrate 11 is formed in a block shape. Here, as an example, the substrate 11 has a rectangular parallelepiped shape that is flat in the Y-axis direction and long in the X-axis direction. In other words, as shown in FIG. 1A, the substrate 11 has a strip shape having a length L1 in the first direction A1 and a width W1 in the second direction A2 orthogonal to the first direction A1. The first direction A1 is a direction along the X axis. The second direction A2 is a direction along the Z axis.
　基体１１の厚みＨ１（図１Ａ参照）は、例えば、幅Ｗ１の半分以下である。ここでは、基体１１の長さＬ１は１ｃｍであり、幅Ｗ１は５ｍｍであり、厚みＨ１は２．５ｍｍ以下であることを想定する。これらの数値は単なる一例であり、特に限定されない。ただし、厚みＨ１が増すほど、基体１１の上部は、下部に比べて電流があまり流れない部位となる可能性があり、低抵抗部品１のコスト面を考慮しても、厚みＨ１は、上述の通り、幅Ｗ１の半分以下であることが好ましい。 The thickness H1 of the substrate 11 (see FIG. 1A) is, for example, half or less of the width W1. Here, it is assumed that the length L1 of the substrate 11 is 1 cm, the width W1 is 5 mm, and the thickness H1 is 2.5 mm or less. These numerical values are merely examples and are not particularly limited. However, as the thickness H1 increases, the upper portion of the substrate 11 may become a portion where a current does not flow much as compared with the lower portion, and even considering the cost aspect of the low resistance component 1, the thickness H1 is described above. As you can see, it is preferably less than half the width W1.
　メッキ層１２は、Ｓｎ（すず）を含み、導電性を有する。メッキ層１２は、Ｓｎを主成分として他の成分を含んでもよい。本実施形態では、メッキ層１２は、薄膜層である。 The plating layer 12 contains Sn (tin) and has conductivity. The plating layer 12 may contain Sn as a main component and other components. In this embodiment, the plating layer 12 is a thin film layer.
　メッキ層１２は、基体１１の、少なくとも導体パターン３と対向する第１面１１１（下面）に設けられている。ここでは一例として、メッキ層１２は、第１面１１１の全体の領域を覆うように設けられている。ただし、メッキ層１２は、第１面１１１の一部の領域のみを覆うように設けられてもよい。 The plating layer 12 is provided on the first surface 111 (lower surface) of the substrate 11 facing at least the conductor pattern 3. Here, as an example, the plating layer 12 is provided so as to cover the entire region of the first surface 111. However, the plating layer 12 may be provided so as to cover only a part of the first surface 111.
　また本実施形態では、メッキ層１２は、第１面１１１に加えて、さらに第１方向Ａ１における両端面（以下、それぞれ「第２面１１２」、「第３面１１３」と呼ぶことがある）にも設けられている。第２面１１２は、基体１１におけるＸ軸の負の側の端面である。第３面１１３は、基体１１におけるＸ軸の正の側の端面である。メッキ層１２は、第２面１１２及び第３面１１３の各々の全体の領域を覆うように設けられている。ただし、メッキ層１２は、第１面１１１に加えて、第２面１１２及び第３面１１３のいずれか一方のみに設けられてもよい。またメッキ層１２は、第２面１１２及び第３面１１３の各々の一部の領域のみを覆うように設けられてもよい。 Further, in the present embodiment, in addition to the first surface 111, the plating layer 12 is further both end surfaces in the first direction A1 (hereinafter, may be referred to as "second surface 112" and "third surface 113", respectively). It is also provided in. The second surface 112 is an end surface on the negative side of the X-axis of the substrate 11. The third surface 113 is an end surface on the positive side of the X-axis of the substrate 11. The plating layer 12 is provided so as to cover the entire region of each of the second surface 112 and the third surface 113. However, the plating layer 12 may be provided on only one of the second surface 112 and the third surface 113 in addition to the first surface 111. Further, the plating layer 12 may be provided so as to cover only a part of each region of the second surface 112 and the third surface 113.
　以下、第１面１１１を覆うメッキ層１２の部位を第１メッキ部１２１と呼び、第２面１１２を覆うメッキ層１２の部位を第２メッキ部１２２と呼び、第３面１１３を覆うメッキ層１２の部位を第３メッキ部１２３と呼ぶことがある。つまり、メッキ層１２は、第１～第３メッキ部１２１～１２３を含む。第１～第３メッキ部１２１～１２３は、基体１１の三面を覆うように連続一体となって形成されている。 Hereinafter, the portion of the plating layer 12 covering the first surface 111 is referred to as a first plating portion 121, the portion of the plating layer 12 covering the second surface 112 is referred to as a second plating portion 122, and the portion of the plating layer 12 covering the third surface 113 is referred to as a plating layer. The 12 portions may be referred to as a third plating portion 123. That is, the plating layer 12 includes the first to third plating portions 121 to 123. The first to third plated portions 121 to 123 are continuously integrally formed so as to cover the three surfaces of the substrate 11.
　また以下、基体１１における、第１面１１１（下面）とは反対側の面を第４面１１４（上面）と呼び、Ｚ軸の負の側の端面を第５面１１５（前面）と呼び、Ｚ軸の正の側の端面を第６面１１６（後面）と呼ぶことがある。 Hereinafter, the surface of the substrate 11 opposite to the first surface 111 (lower surface) is referred to as a fourth surface 114 (upper surface), and the end surface on the negative side of the Z axis is referred to as a fifth surface 115 (front surface). The end face on the positive side of the Z axis may be referred to as the sixth surface 116 (rear surface).
　第４面１１４と、第２メッキ部１２２及び第３メッキ部１２３におけるＹ軸の正の側の端面とは、概ね面一となっている。また第５面１１５と、第１メッキ部１２１、第２メッキ部１２２及び第３メッキ部１２３におけるＺ軸の負の側の端面とは、概ね面一となっている。さらに第６面１１６と、第１メッキ部１２１、第２メッキ部１２２及び第３メッキ部１２３におけるＺ軸の正の側の端面とは、概ね面一となっている。 The fourth surface 114 and the end surface on the positive side of the Y axis in the second plating portion 122 and the third plating portion 123 are substantially flush with each other. Further, the fifth surface 115 and the end faces on the negative side of the Z axis in the first plating portion 121, the second plating portion 122, and the third plating portion 123 are substantially flush with each other. Further, the sixth surface 116 and the end faces on the positive side of the Z axis in the first plating portion 121, the second plating portion 122, and the third plating portion 123 are substantially flush with each other.
　本実施形態の低抵抗部品１は、全体に対する、導電体（基体１１）の成分であるＣｕ（銅）の占める重量比が９０％以上であり、残りが概ねメッキ層１２に含まれるＳｎ（すず）である。導電体（基体１１）の成分が、Ｃｕ（銅）の代わりに、Ａｇ（銀）又はＡｕ（金）であっても、同様に重量比が９０％以上である。また低抵抗部品１の抵抗値は、一例として約０．３ｍΩを想定する。 In the low resistance component 1 of the present embodiment, the weight ratio of Cu (copper), which is a component of the conductor (base 11), to the whole is 90% or more, and the rest is approximately Sn (tin) contained in the plating layer 12. ). Even if the component of the conductor (base 11) is Ag (silver) or Au (gold) instead of Cu (copper), the weight ratio is similarly 90% or more. Further, the resistance value of the low resistance component 1 is assumed to be about 0.3 mΩ as an example.
　プリント基板２は、Ｙ軸の方向に沿った厚みを有する。プリント基板２は、低抵抗部品１が接合可能である導体パターン３を有する。 The printed circuit board 2 has a thickness along the Y-axis direction. The printed circuit board 2 has a conductor pattern 3 to which the low resistance component 1 can be bonded.
　より詳細には、プリント基板２は、例えば、絶縁基板２０（母材）と、導体パターン３（プリント配線）とを有する片面プリント配線板である。ただし、プリント基板２は、両面プリント配線板でもよい。 More specifically, the printed circuit board 2 is, for example, a single-sided printed wiring board having an insulating substrate 20 (base material) and a conductor pattern 3 (printed wiring). However, the printed circuit board 2 may be a double-sided printed wiring board.
　絶縁基板２０は、電気絶縁性を有する。絶縁基板２０は、例えば、ガラスエポキシ基板等が挙げられる。 The insulating substrate 20 has electrical insulation. Examples of the insulating substrate 20 include a glass epoxy substrate and the like.
　導体パターン３は、絶縁基板２０の片面側（Ｙ軸の正の側）に形成されている。導体パターン３は、プリント基板２上に実装される複数の電子部品（回路部品）間を電気的に接続し得て、複数の電子部品と共に回路を形成し得る。 The conductor pattern 3 is formed on one side (positive side of the Y axis) of the insulating substrate 20. The conductor pattern 3 can electrically connect a plurality of electronic components (circuit components) mounted on the printed circuit board 2, and can form a circuit together with the plurality of electronic components.
　導体パターン３の材質は、銅（銅箔）を想定するが、アルミニウム、又はステンレス等でもよい。導体パターン３の厚みは、例えば、１８μｍ以上１００μｍ以下であることを想定するが、特に限定されない。プリント基板２は、金属張積層板の銅箔がフォトエッチング法により所望の導体パターン３に加工されることにより得られる。導体パターン３は、その一部がレジスト層により覆われていてもよい。 The material of the conductor pattern 3 is assumed to be copper (copper foil), but may be aluminum, stainless steel, or the like. The thickness of the conductor pattern 3 is assumed to be, for example, 18 μm or more and 100 μm or less, but is not particularly limited. The printed circuit board 2 is obtained by processing a copper foil of a metal-clad laminate into a desired conductor pattern 3 by a photoetching method. A part of the conductor pattern 3 may be covered with a resist layer.
　低抵抗部品１における基体１１の厚みＨ１は、導体パターン３の厚みＨ２（図１Ｃ参照）より厚く設定されている。 The thickness H1 of the substrate 11 in the low resistance component 1 is set to be thicker than the thickness H2 of the conductor pattern 3 (see FIG. 1C).
　本実施形態では、低抵抗部品１は、プリント基板２に形成されている導体パターン３上に、はんだ付けにより表面実装される。具体的には、第１面１１１（下面）が導体パターン３の表面を向く態様で、第１メッキ部１２１が、はんだにより導体パターン３上に接合される。また第２メッキ部１２２及び第３メッキ部１２３も、はんだにより導体パターン３上に接合される。その際、低抵抗部品１は、その長さＬ１が導体パターン３の延長する方向に沿うように導体パターン３上に接合されることが好ましい。 In the present embodiment, the low resistance component 1 is surface-mounted on the conductor pattern 3 formed on the printed circuit board 2 by soldering. Specifically, the first plated portion 121 is joined onto the conductor pattern 3 by soldering so that the first surface 111 (lower surface) faces the surface of the conductor pattern 3. Further, the second plating portion 122 and the third plating portion 123 are also joined on the conductor pattern 3 by soldering. At that time, it is preferable that the low resistance component 1 is joined onto the conductor pattern 3 so that its length L1 is along the extending direction of the conductor pattern 3.
　１つのプリント基板２に対して、実装される低抵抗部品１の数は特に限定されない。導体パターン３に流れ得る電流の大きさに応じて、必要な数の低抵抗部品１が実装されてよい。 The number of low resistance components 1 mounted on one printed circuit board 2 is not particularly limited. A required number of low resistance components 1 may be mounted depending on the magnitude of the current that can flow in the conductor pattern 3.
　低抵抗部品１は、例えば、他の実装部品（回路部品等）と同様に部品実装機（チップマウンター）によって導体パターン３上に実装されてもよいし、或いは、ピンセット等を用いて人の手により実装されてもよい。 The low resistance component 1 may be mounted on the conductor pattern 3 by a component mounting machine (chip mounter) like other mounting components (circuit components or the like), or may be manually mounted using tweezers or the like. May be implemented by.
　１つのプリント基板２において、第１回路（信号系の電気回路）と、第１回路に比べて比較的大きな電流が流れ得る第２回路（パワー系の電気回路）とが形成される場合がある。この場合、本実施形態の低抵抗部品１は、第１回路及び第２回路のうち、第２回路を構成する導体パターン３上に実装されることが好ましい。この場合、プリント基板２の製造時に導体パターン３が形成された後であっても、第２回路のみ電流の許容量の増加を容易に図れる。つまり、第２回路で想定される電流量が許容量を超えてしまうほどプリント配線の幅や厚みが小さい場合であっても、低抵抗部品１を局所的に後付けで配置させることで許容量が増加した回路基板１０を提供可能となる。 In one printed circuit board 2, a first circuit (signal system electric circuit) and a second circuit (power system electric circuit) in which a relatively large current can flow as compared with the first circuit may be formed. .. In this case, the low resistance component 1 of the present embodiment is preferably mounted on the conductor pattern 3 constituting the second circuit among the first circuit and the second circuit. In this case, even after the conductor pattern 3 is formed at the time of manufacturing the printed circuit board 2, it is possible to easily increase the current allowable amount only in the second circuit. That is, even if the width and thickness of the printed wiring are so small that the amount of current assumed in the second circuit exceeds the allowable amount, the allowable amount can be increased by locally arranging the low resistance component 1 afterwards. It becomes possible to provide the increased circuit board 10.
　ここで電流の「許容量」について説明する。例えば、プリント基板の回路が動作中において大電流が回路を流れることで高い熱が発生すると、銅箔等の導体パターンが焼け切れてしまう可能性がある。またプリント基板がガラスエポキシ基板等であれば、温度がガラス転移点（１２０℃～１４０℃）を超えるような発熱により基板自体が損傷する可能性がある。そのため、基板設計においては、そのような発熱が起きないように導体パターンの厚みや幅を設計する必要がある。電流の許容量は、導体パターンの厚み及び幅等に依存し、例えば、ある所定の厚みの銅箔に関して、幅が１ｍｍに対して許容量が１Ａ（アンペア）として設計される。大電流が流れ得る回路の導体パターンについては、許容量を大きくするために、例えば幅を広くする等の設計がなされる。本実施形態のように低抵抗部品１が配置されることで、後付けで電流の許容量を増やすことができる。 Here, the "allowable amount" of current will be explained. For example, when a circuit of a printed circuit board is in operation and a large current flows through the circuit to generate high heat, a conductor pattern such as a copper foil may be burnt out. If the printed circuit board is a glass epoxy board or the like, the substrate itself may be damaged by heat generation such that the temperature exceeds the glass transition point (120 ° C. to 140 ° C.). Therefore, in the substrate design, it is necessary to design the thickness and width of the conductor pattern so that such heat generation does not occur. The allowable amount of current depends on the thickness and width of the conductor pattern, and is designed, for example, for a copper foil having a predetermined thickness, the allowable amount is 1 A (ampere) for a width of 1 mm. The conductor pattern of a circuit through which a large current can flow is designed to have a wide width, for example, in order to increase the allowable amount. By arranging the low resistance component 1 as in the present embodiment, the current allowable amount can be increased by retrofitting.
　低抵抗部品１を実装するタイミングは特に限定されず、第２回路を構成する回路部品と同時に（同じ工程内で）に実装されてもよいし、回路部品の実装前、或いは実装後に実装されてもよい。またもちろん、低抵抗部品１は、第２回路だけでなく、第１回路を構成する導体パターン３上にも実装されてもよい。 The timing for mounting the low resistance component 1 is not particularly limited, and the low resistance component 1 may be mounted at the same time as the circuit component constituting the second circuit (in the same process), or may be mounted before or after the circuit component is mounted. May be good. Further, of course, the low resistance component 1 may be mounted not only on the second circuit but also on the conductor pattern 3 constituting the first circuit.
　大きな電流が導体パターン３を流れることによる発熱を効果的に抑制するために、低抵抗部品１を複数個用意し、複数個の低抵抗部品１を集約的に配置してもよい。図１Ｂは、複数個（図示例では３個）の低抵抗部品１を集約的に導体パターン３上に実装する一例を示す。図１Ｂは、プリント基板２の要部のみを示す模式的な拡大平面図である。 In order to effectively suppress heat generation due to a large current flowing through the conductor pattern 3, a plurality of low resistance components 1 may be prepared and a plurality of low resistance components 1 may be centrally arranged. FIG. 1B shows an example in which a plurality of (three in the illustrated example) low resistance components 1 are collectively mounted on the conductor pattern 3. FIG. 1B is a schematic enlarged plan view showing only a main part of the printed circuit board 2.
　複数個の低抵抗部品１は、導体パターン３上に、概ね等しい間隔で隣接して並んで配置される。各低抵抗部品１におけるＸ軸の方向の両側には、メッキ層１２をはんだで接合したことによるはんだフィレット５が形成されている。つまり、図示例では、隣り合う２つの低抵抗部品１は、はんだフィレット５の形成領域を考慮して、一定の隙間を空けて配置される。ただし、上記の発熱をより効果的に抑制するために、複数個の低抵抗部品１は、可能な限り隙間を空けずに詰めて実装されることが好ましい。 A plurality of low resistance components 1 are arranged side by side on the conductor pattern 3 at substantially equal intervals. Solder fillets 5 are formed on both sides of each low resistance component 1 in the direction of the X-axis by joining the plating layers 12 with solder. That is, in the illustrated example, the two adjacent low resistance components 1 are arranged with a certain gap in consideration of the forming region of the solder fillet 5. However, in order to suppress the heat generation more effectively, it is preferable that the plurality of low resistance components 1 are mounted with as few gaps as possible.
　また寸法が互いに異なる低抵抗部品１を複数種類用意されていることが好ましい。プリント基板２に形成されている導体パターン３の厚み又は幅等に応じた寸法の低抵抗部品１が、複数種類の低抵抗部品１の中から選択的に配置されてもよい。図１Ｂでは、幅Ｗ１が導体パターン３の幅と略一致する低抵抗部品１が選択されて配置されている。 It is also preferable to prepare a plurality of types of low resistance parts 1 having different dimensions. The low resistance component 1 having dimensions corresponding to the thickness or width of the conductor pattern 3 formed on the printed circuit board 2 may be selectively arranged from a plurality of types of low resistance components 1. In FIG. 1B, the low resistance component 1 whose width W1 substantially matches the width of the conductor pattern 3 is selected and arranged.
　［利点］
　本実施形態に係る低抵抗部品１は、導体パターン３に接合することで、導体パターン３自体の構造（厚みや幅の増加、又は溝の形成等）を変更することなく、プリント基板２を流れる電流の許容量の増加を図れる。結果的に、プリント基板２の大型化の抑制を図ることが可能となる。 [advantage]
By joining the low resistance component 1 according to the present embodiment to the conductor pattern 3, the low resistance component 1 flows through the printed circuit board 2 without changing the structure of the conductor pattern 3 itself (increase in thickness and width, formation of grooves, etc.). The allowable amount of current can be increased. As a result, it is possible to suppress the increase in size of the printed circuit board 2.
　また低抵抗部品１を導体パターン３に接合することで、導体パターン３に大電流が流れることによるプリント基板２の発熱の抑制を図ることも可能となる。 Further, by joining the low resistance component 1 to the conductor pattern 3, it is possible to suppress heat generation of the printed circuit board 2 due to a large current flowing through the conductor pattern 3.
　また低抵抗部品１の基体１１の厚みＨ１は、幅Ｗ１の半分以下であるため、電流がより効率良く流れやすい。さらに基体１１の厚みＨ１は、導体パターン３の厚みＨ２より厚いため、電流がより効率良く流れやすい低抵抗部品１を提供できる。また低抵抗部品１が接合されても、プリント基板２全体としての高背化を抑制できる。 Further, since the thickness H1 of the substrate 11 of the low resistance component 1 is less than half of the width W1, the current easily flows more efficiently. Further, since the thickness H1 of the substrate 11 is thicker than the thickness H2 of the conductor pattern 3, it is possible to provide the low resistance component 1 in which the current easily flows more efficiently. Further, even if the low resistance component 1 is joined, it is possible to suppress the heightening of the printed circuit board 2 as a whole.
　特にメッキ層１２は、第１面１１１に加えて、さらに第２面１１２及び第３面１１３にも設けられているため、導体パターン３に対する接合に関する信頼性が向上する。 In particular, since the plating layer 12 is provided not only on the first surface 111 but also on the second surface 112 and the third surface 113, the reliability of joining to the conductor pattern 3 is improved.
　（２．２）低抵抗部品の製造
　次に、本実施形態に係る低抵抗部品１の製造方法について、図２Ａ～図２Ｃを参照しながら説明する。 (2.2) Manufacture of Low Resistance Parts Next, a method for manufacturing the low resistance parts 1 according to the present embodiment will be described with reference to FIGS. 2A to 2C.
　低抵抗部品１の製造方法は、メッキ工程と切断工程とを含む。 The manufacturing method of the low resistance component 1 includes a plating process and a cutting process.
　先ず、ロール状に巻かれた、帯板状のフープ材４を準備する。図２Ａは、Ｚ軸の負の側の一端部がＺ軸の方向に沿って延ばされた状態のフープ材４の一部を模式的に示す。フープ材４は、低抵抗部品１における導電性を有する基体１１となる母材である。フープ材４は、銅材である。フープ材４の厚み（Ｙ軸の方向の寸法）は、基体１１の厚みＨ１（例えば２．５ｍｍ以下）と等しい。フープ材４の幅（Ｘ軸の方向の寸法）は、基体１１の長さＬ１と等しい。 First, prepare a strip-shaped hoop material 4 wound in a roll shape. FIG. 2A schematically shows a part of the hoop material 4 in a state where one end on the negative side of the Z axis is extended along the direction of the Z axis. The hoop material 4 is a base material that serves as a base material 11 having conductivity in the low resistance component 1. The hoop material 4 is a copper material. The thickness of the hoop material 4 (dimensions in the Y-axis direction) is equal to the thickness H1 of the substrate 11 (for example, 2.5 mm or less). The width of the hoop material 4 (dimension in the direction of the X-axis) is equal to the length L1 of the substrate 11.
　メッキ工程では、帯板状のフープ材４の少なくとも一面４１（下面）に、Ｓｎ（すず）を含むメッキ層１２を形成する。ここでは、例えばフープ材４は、送り装置でＺ軸の負の側に向かって搬送されて、フープ材４の一面４１（下面）に対してＳｎ（すず）メッキを施して、メッキ部材Ｂ１を作製する（図２Ｂ参照）。Ｓｎ（すず）メッキは、フープ材４の一面４１（下面）に加えて、フープ材４の第１側面４２（Ｘ軸の負の側の端面）及び第２側面４３（Ｘ軸の正の側の端面）にも施される。メッキ処理としては、例えば、無電解Ｓｎメッキが適用される。フープ材４は、Ｓｎイオンを含む溶液中に、一面４１、第１側面４２及び第２側面４３を浸すことでＣｕ表面にＳｎが皮膜として形成される。 In the plating step, a plating layer 12 containing Sn (tin) is formed on at least one surface 41 (lower surface) of the strip-shaped hoop material 4. Here, for example, the hoop material 4 is conveyed toward the negative side of the Z axis by the feeding device, and Sn (tin) plating is applied to one surface 41 (lower surface) of the hoop material 4 to form the plating member B1. Fabricate (see FIG. 2B). For Sn (tin) plating, in addition to one surface 41 (lower surface) of the hoop material 4, the first side surface 42 (end surface on the negative side of the X axis) and the second side surface 43 (positive side of the X axis) of the hoop material 4 are applied. It is also applied to the end face of. As the plating treatment, for example, electroless Sn plating is applied. In the hoop material 4, Sn is formed as a film on the Cu surface by immersing the one surface 41, the first side surface 42, and the second side surface 43 in a solution containing Sn ions.
　切断工程では、メッキ層１２が形成されたフープ材４（メッキ部材Ｂ１）をブロック状の個片Ｐ１に切断する（図２Ｃ参照）。メッキ部材Ｂ１は、送り装置でＺ軸の負の側に向かって搬送されて、Ｚ軸の負の側の一端から、切断機で所定の間隔で順に切断することで複数個（図２Ｃでは３個）の個片Ｐ１が順次生成される。この１つ１つの個片Ｐ１が、低抵抗部品１となる。上記所定の間隔は、各低抵抗部品１の幅Ｗ１と等しい。各低抵抗部品１の第５面１１５（前面）及び第６面１１６（後面）は、切断機で切断された切断面である。 In the cutting step, the hoop material 4 (plating member B1) on which the plating layer 12 is formed is cut into block-shaped individual pieces P1 (see FIG. 2C). A plurality of plating members B1 are conveyed toward the negative side of the Z axis by a feeding device, and are sequentially cut from one end of the negative side of the Z axis by a cutting machine at predetermined intervals (3 in FIG. 2C). Pieces P1 are sequentially generated. Each piece P1 becomes a low resistance component 1. The predetermined interval is equal to the width W1 of each low resistance component 1. The fifth surface 115 (front surface) and the sixth surface 116 (rear surface) of each low resistance component 1 are cut surfaces cut by a cutting machine.
　低抵抗部品１の製造方法は、フープ材４を作製する工程を更に含んでもよいし、フープ材４として市販の銅材を用いてもよい。低抵抗部品１の製造方法は、フープ材４に対してＳｎメッキを施す際に、部分メッキされるように、マスキング処理に関する工程を更に含んでもよい。低抵抗部品１の製造方法は、フープ材４又は切断後の各個片Ｐ１に対して研磨処理等の表面処理に関する工程を更に含んでもよい。低抵抗部品１の製造方法は、各個片Ｐ１に対して保護膜を形成する工程を更に含んでもよい。 The method for manufacturing the low resistance component 1 may further include a step of manufacturing the hoop material 4, or a commercially available copper material may be used as the hoop material 4. The method for manufacturing the low resistance component 1 may further include a step related to a masking process so that the hoop material 4 is partially plated when Sn plating is applied. The method for manufacturing the low resistance component 1 may further include a step related to surface treatment such as polishing treatment for each piece P1 after cutting or the hoop material 4. The method for manufacturing the low resistance component 1 may further include a step of forming a protective film for each piece P1.
　この製造方法では、プリント基板２の大型化の抑制を図ることが可能な１又は複数個の低抵抗部品１の製造方法を提供できる。特に、複数の低抵抗部品１を大量生産する場合に、生産効率の良い（歩留まりの良い）製造方法を提供でき、低抵抗部品１の製造コストダウンを図れる。 In this manufacturing method, it is possible to provide a manufacturing method of one or a plurality of low resistance parts 1 capable of suppressing the increase in size of the printed circuit board 2. In particular, when a plurality of low resistance parts 1 are mass-produced, it is possible to provide a manufacturing method having high production efficiency (good yield), and it is possible to reduce the manufacturing cost of the low resistance parts 1.
　（３）変形例
　上述の実施形態は、本開示の様々な実施形態の一つに過ぎない。上述の実施形態は、本開示の目的を達成できれば、設計等に応じて種々の変更が可能である。以下、上述の実施形態の変形例を列挙する。以下に説明する変形例は、適宜組み合わせて適用可能である。以下では、上述した図１Ａ～図２Ｃに示す低抵抗部品１を単に「基本例」と呼ぶことがある。 (3) Modifications The above embodiment is only one of the various embodiments of the present disclosure. The above-described embodiment can be variously modified depending on the design and the like as long as the object of the present disclosure can be achieved. Hereinafter, modified examples of the above-described embodiment will be listed. The modifications described below can be applied in combination as appropriate. Hereinafter, the low resistance component 1 shown in FIGS. 1A to 2C described above may be simply referred to as a “basic example”.
　基本例では、低抵抗部品１は、一方向（第１方向Ａ１）に長尺の板状である。しかし、低抵抗部品１の形状は特に限定されず、例えば、厚み方向に沿って見て、正方形の板状でもよい。 In the basic example, the low resistance component 1 has a long plate shape in one direction (first direction A1). However, the shape of the low resistance component 1 is not particularly limited, and may be, for example, a square plate when viewed along the thickness direction.
　基本例では、低抵抗部品１は、基体１１の三面（第１面１１１、第２面１１２、第３面１１３）に、メッキ層１２が設けられている。しかし、低抵抗部品１は、少なくとも第１面１１１（下面）にメッキ層１２が設けられていればよい。例えば、図３に示す変形例（低抵抗部品１Ａ）のように、第１面１１１とは反対側の第４面１１４（上面）にもメッキ層１２が設けられてもよい。 In the basic example, the low resistance component 1 is provided with a plating layer 12 on three surfaces (first surface 111, second surface 112, third surface 113) of the substrate 11. However, the low resistance component 1 may be provided with the plating layer 12 on at least the first surface 111 (lower surface). For example, as in the modified example (low resistance component 1A) shown in FIG. 3, the plating layer 12 may be provided on the fourth surface 114 (upper surface) opposite to the first surface 111.
　図３の低抵抗部品１Ａでは、基本例と違って、プリント基板２に接合する際に、低抵抗部品１Ａの上面、下面（第１面１１１、第４面１１４）を識別して向きを整える手間が省略される。 In the low resistance component 1A of FIG. 3, unlike the basic example, when joining to the printed circuit board 2, the upper surface and the lower surface (first surface 111, fourth surface 114) of the low resistance component 1A are identified and oriented. Effort is saved.
　基本例では、幅Ｗ１が導体パターン３の幅と略一致する低抵抗部品１が選択されて配置されている。しかし、低抵抗部品１は、幅Ｗ１が導体パターン３の幅より小さいもの、或いは大きいものが配置されてもよい。 In the basic example, the low resistance component 1 whose width W1 substantially matches the width of the conductor pattern 3 is selected and arranged. However, as the low resistance component 1, a component having a width W1 smaller than or larger than the width of the conductor pattern 3 may be arranged.
　基本例では、複数個（３個）の低抵抗部品１が、集約的に導体パターン３上に配置されている（図１Ｂ参照）。しかし、図１Ｂに示す低抵抗部品１の複数個（３個）分の長さを有した比較的長い１個の低抵抗部品１が、導体パターン３上に配置されてもよい。 In the basic example, a plurality of (three) low resistance components 1 are collectively arranged on the conductor pattern 3 (see FIG. 1B). However, one relatively long low resistance component 1 having a length corresponding to a plurality (three) of the low resistance components 1 shown in FIG. 1B may be arranged on the conductor pattern 3.
　（まとめ）
　以上説明したように、第１の態様に係る低抵抗部品（１，１Ａ）は、プリント基板（２）に形成される導体パターン（３）上に接合可能に構成される。低抵抗部品（１，１Ａ）は、ブロック状に形成されて導電性を有する基体（１１）と、Ｓｎを含むメッキ層（１２）と、を備える。メッキ層（１２）は、基体（１１）の、少なくとも導体パターン（３）と対向する一面（第１面１１１）に設けられている。 (summary)
As described above, the low resistance component (1, 1A) according to the first aspect is configured to be joinable on the conductor pattern (3) formed on the printed circuit board (2). The low resistance component (1,1A) includes a substrate (11) formed in a block shape and having conductivity, and a plating layer (12) containing Sn. The plating layer (12) is provided on at least one surface (first surface 111) of the substrate (11) facing the conductor pattern (3).
　この態様によれば、導体パターン（３）に低抵抗部品（１，１Ａ）を接合することで、導体パターン（３）自体の構造設計（厚みや幅の増加、又は溝の形成等）を変更することなく、プリント基板（２）を流れる電流の許容量の増加を図れる。結果的に、プリント基板（２）の大型化の抑制を図ることが可能となる。 According to this aspect, the structural design (increase in thickness and width, formation of grooves, etc.) of the conductor pattern (3) itself is changed by joining the low resistance component (1, 1A) to the conductor pattern (3). It is possible to increase the permissible amount of the current flowing through the printed circuit board (2) without doing so. As a result, it becomes possible to suppress the increase in size of the printed circuit board (2).
　第２の態様に係る低抵抗部品（１，１Ａ）に関して、第１の態様において、基体（１１）は、第１方向（Ａ１）に長さ（Ｌ１）を有し、第１方向（Ａ１）と直交する第２方向（Ａ２）に幅（Ｗ１）を有した帯板状である。 Regarding the low resistance component (1,1A) according to the second aspect, in the first aspect, the substrate (11) has a length (L1) in the first direction (A1), and the first direction (A1). It is a strip having a width (W1) in the second direction (A2) orthogonal to the above.
　この態様によれば、低抵抗部品（１，１Ａ）が接合されたプリント基板（２）全体としての大型化がより抑制される。 According to this aspect, the increase in size of the printed circuit board (2) to which the low resistance components (1, 1A) are joined is further suppressed.
　第３の態様に係る低抵抗部品（１，１Ａ）に関して、第２の態様において、基体（１１）の厚み（Ｈ１）は、幅（Ｗ１）の半分以下である。 Regarding the low resistance component (1,1A) according to the third aspect, in the second aspect, the thickness (H1) of the substrate (11) is half or less of the width (W1).
　この態様によれば、電流がより効率良く流れやすい低抵抗部品（１，１Ａ）を提供できる。 According to this aspect, it is possible to provide a low resistance component (1,1A) in which a current easily flows more efficiently.
　第４の態様に係る低抵抗部品（１，１Ａ）に関して、第２又は第３の態様において、基体（１１）の厚み（Ｈ１）は、導体パターン（３）の厚み（Ｈ２）より厚い。 Regarding the low resistance component (1,1A) according to the fourth aspect, in the second or third aspect, the thickness (H1) of the substrate (11) is thicker than the thickness (H2) of the conductor pattern (3).
　この態様によれば、電流がより効率良く流れやすい低抵抗部品（１，１Ａ）を提供できる。 According to this aspect, it is possible to provide a low resistance component (1,1A) in which a current easily flows more efficiently.
　第５の態様に係る低抵抗部品（１，１Ａ）に関して、第２～第４の態様のいずれか１つにおいて、メッキ層（１２）は、一面（第１面１１１）に加えて、さらに第１方向（Ａ１）における両端面（第２面１１２、第３面１１３）の少なくとも一方にも設けられている。 Regarding the low resistance component (1, 1A) according to the fifth aspect, in any one of the second to fourth aspects, the plating layer (12) is further added to the one surface (first surface 111). It is also provided on at least one of both end faces (second surface 112, third surface 113) in one direction (A1).
　この態様によれば、導体パターン（３）に対する接合に関する信頼性が向上する。 According to this aspect, the reliability of joining to the conductor pattern (3) is improved.
　第６の態様に係る回路基板（１０）は、第１～第５の態様のいずれか１つにおける低抵抗部品（１，１Ａ）と、プリント基板（２）と、を備える。プリント基板（２）は、低抵抗部品（１，１Ａ）が接合可能である導体パターン（３）を有する。 The circuit board (10) according to the sixth aspect includes the low resistance component (1,1A) in any one of the first to fifth aspects, and the printed circuit board (2). The printed circuit board (2) has a conductor pattern (3) to which low resistance components (1, 1A) can be bonded.
　この態様によれば、プリント基板（２）の大型化の抑制を図ることが可能な回路基板（１０）を提供できる。 According to this aspect, it is possible to provide a circuit board (10) capable of suppressing the increase in size of the printed circuit board (2).
　第７の態様に係る回路基板（１０）に関して、第６の態様において、基体（１１）は、第１方向（Ａ１）に長さ（Ｌ１）を有し、第１方向（Ａ１）と直交する第２方向（Ａ２）に幅（Ｗ１）を有した帯板状である。低抵抗部品（１，１Ａ）は、長さ（Ｌ１）が導体パターン（３）の延長する方向に沿うように導体パターン（３）上に接合される。 Regarding the circuit board (10) according to the seventh aspect, in the sixth aspect, the substrate (11) has a length (L1) in the first direction (A1) and is orthogonal to the first direction (A1). It is in the shape of a strip having a width (W1) in the second direction (A2). The low resistance component (1,1A) is joined onto the conductor pattern (3) so that the length (L1) is along the extending direction of the conductor pattern (3).
　この態様によれば、電流がより効率良く流れやすい低抵抗部品（１，１Ａ）を備えた回路基板（１０）を提供できる。 According to this aspect, it is possible to provide a circuit board (10) provided with a low resistance component (1,1A) in which a current easily flows more efficiently.
　第８の態様に係る製造方法は、１又は複数個の低抵抗部品（１，１Ａ）の製造方法である。製造方法は、メッキ工程と、切断工程と、を含む。メッキ工程では、導電性を有する基体（１１）となる帯板状のフープ材（４）の少なくとも一面（４１）に、Ｓｎを含むメッキ層（１２）を形成する。切断工程では、メッキ層（１２）が形成されたフープ材（４）をブロック状の個片（Ｐ１）に切断する。 The manufacturing method according to the eighth aspect is a manufacturing method for one or a plurality of low resistance parts (1,1A). The manufacturing method includes a plating step and a cutting step. In the plating step, a plating layer (12) containing Sn is formed on at least one surface (41) of the strip-shaped hoop material (4) to be the conductive substrate (11). In the cutting step, the hoop material (4) on which the plating layer (12) is formed is cut into block-shaped pieces (P1).
　この態様によれば、プリント基板（２）の大型化の抑制を図ることが可能な１又は複数個の低抵抗部品（１，１Ａ）の製造方法を提供できる。 According to this aspect, it is possible to provide a method for manufacturing one or a plurality of low resistance parts (1, 1A) capable of suppressing the increase in size of the printed circuit board (2).
　第２～５の態様に係る構成については、低抵抗部品（１，１Ａ）に必須の構成ではなく、適宜省略可能である。また第７の態様に係る構成については、回路基板（１０）に必須の構成ではなく、適宜省略可能である。 The configurations according to the second to fifth aspects are not essential configurations for low resistance components (1, 1A) and can be omitted as appropriate. Further, the configuration according to the seventh aspect is not an essential configuration for the circuit board (10) and can be omitted as appropriate.
　１，１Ａ　低抵抗部品
　１１　基体
　１１１　第１面（基体の一面）
　１１２　第２面（基体の両端面）
　１１３　第３面（基体の両端面）
　１２　メッキ層
　２　プリント基板
　３　導体パターン
　４　フープ材
　４１　（フープ材の）一面
　１０　回路基板
　Ａ１　第１方向
　Ａ２　第２方向
　Ｈ１　（基体の）厚み
　Ｈ２　（導体パターンの）厚み
　Ｌ１　長さ
　Ｐ１　個片
　Ｗ１　幅 1,1A Low resistance component 11 Base 111 First surface (one surface of the substrate)
112 Second surface (both ends of the substrate)
113 Third surface (both ends of the substrate)
12 Plating layer 2 Printed circuit board 3 Conductor pattern 4 Hoop material 41 (of hoop material) One side 10 Circuit board A1 1st direction A2 2nd direction H1 (of substrate) Thickness H2 (of conductor pattern) Thickness L1 Length P1 Piece W1 width

Claims (8)

  1. 　プリント基板に形成される導体パターン上に接合可能に構成され、
    　ブロック状に形成されて導電性を有する基体と、Ｓｎを含むメッキ層と、を備え、
    　前記メッキ層は、前記基体の、少なくとも前記導体パターンと対向する一面に設けられている、
    　低抵抗部品。     It is configured to be joinable on the conductor pattern formed on the printed circuit board.
    A substrate formed in a block shape and having conductivity, and a plating layer containing Sn are provided.
    The plating layer is provided on at least one surface of the substrate facing the conductor pattern.
    Low resistance parts.
  2. 　前記基体は、第１方向に長さを有し、前記第１方向と直交する第２方向に幅を有した帯板状である、
    　請求項１に記載の低抵抗部品。     The substrate is in the shape of a strip having a length in the first direction and a width in the second direction orthogonal to the first direction.
    The low resistance component according to claim 1.
  3. 　前記基体の厚みは、前記幅の半分以下である、
    　請求項２に記載の低抵抗部品。     The thickness of the substrate is less than half of the width.
    The low resistance component according to claim 2.
  4. 　前記基体の厚みは、前記導体パターンの厚みより厚い、
    　請求項２又は３に記載の低抵抗部品。     The thickness of the substrate is thicker than the thickness of the conductor pattern.
    The low resistance component according to claim 2 or 3.
  5. 　前記メッキ層は、前記一面に加えて、さらに前記第１方向における両端面の少なくとも一方にも設けられている、
    　請求項２～４のいずれか１項に記載の低抵抗部品。     The plating layer is provided not only on one surface but also on at least one of both end faces in the first direction.
    The low resistance component according to any one of claims 2 to 4.
  6. 　請求項１～５のいずれか１項に記載の低抵抗部品と、
    　前記低抵抗部品が接合可能である前記導体パターンを有する前記プリント基板と、
    を備える、
    　回路基板。     The low resistance component according to any one of claims 1 to 5.
    With the printed circuit board having the conductor pattern to which the low resistance component can be joined,
    To prepare
    Circuit board.
  7. 　前記基体は、第１方向に長さを有し、前記第１方向と直交する第２方向に幅を有した帯板状であり、
    　前記低抵抗部品は、前記長さが前記導体パターンの延長する方向に沿うように前記導体パターン上に接合される、
    　請求項６に記載の回路基板。     The substrate is in the shape of a strip having a length in the first direction and a width in the second direction orthogonal to the first direction.
    The low resistance component is joined onto the conductor pattern so that the length is along the extending direction of the conductor pattern.
    The circuit board according to claim 6.
  8. 　１又は複数個の低抵抗部品の製造方法であって、
    　導電性を有する基体となる帯板状のフープ材の少なくとも一面に、Ｓｎを含むメッキ層を形成するメッキ工程と、
    　前記メッキ層が形成された前記フープ材をブロック状の個片に切断する切断工程と、
    を含む、
    　製造方法。     A method for manufacturing one or more low resistance parts.
    A plating step of forming a plating layer containing Sn on at least one surface of a strip-shaped hoop material serving as a conductive substrate.
    A cutting step of cutting the hoop material on which the plating layer is formed into block-shaped pieces, and
    including,
    Production method.
PCT/JP2021/038139 2020-10-19 2021-10-14 Low-resistance component, circuit board, and manufacturing method WO2022085572A1 (en)

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