WO2022061998A1 - 一种反馈信号检测方法及像素外模拟域补偿显示系统 - Google Patents

一种反馈信号检测方法及像素外模拟域补偿显示系统 Download PDF

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Publication number
WO2022061998A1
WO2022061998A1 PCT/CN2020/121593 CN2020121593W WO2022061998A1 WO 2022061998 A1 WO2022061998 A1 WO 2022061998A1 CN 2020121593 W CN2020121593 W CN 2020121593W WO 2022061998 A1 WO2022061998 A1 WO 2022061998A1
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Prior art keywords
voltage
feedback
nth row
pixel unit
mth column
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PCT/CN2020/121593
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English (en)
French (fr)
Inventor
林兴武
张盛东
张敏
焦海龙
黄杰
邱赫梓
李成林
文金元
Original Assignee
北京大学深圳研究生院
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Publication of WO2022061998A1 publication Critical patent/WO2022061998A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Definitions

  • the present invention relates to the field of optoelectronic technology, in particular to a feedback signal detection method and an external analog domain compensation display system.
  • AMOLED active matrix organic light emitting diode or active matrix organic light emitting diode, Active-matrix Organic light-emitting diode
  • TFT Thin Film Transistor, Thin Film Transistor
  • OLED Organic Light-Emitting Diode or Organic Electroluminesence Display
  • OLED-on-Silicon or QLED-on-Silicon type microdisplay products use silicon as a pixel unit circuit display, and add OLED or QLED (Quantum Dot Light Emitting Diodes) light-emitting devices on it.
  • OLED or QLED Quadantum Dot Light Emitting Diodes
  • TFT, OLED and QLED all have aging problems after emitting light.
  • the increase of TFT threshold voltage causes the current that can be given by the aging TFT to become smaller when the same display signal is input.
  • the threshold voltage of the aged TFT or the threshold voltage of the aged OLED will drift.
  • An increase in the OLED threshold voltage results in a decrease in OLED current.
  • the luminous efficiency of the aged OLED decreases, that is, for the same input current, the light that the aged OLED can emit decreases.
  • TFT, OLED and QLED also have the problem of uneven threshold voltage.
  • the threshold voltage will be uneven due to technological reasons, which will lead to uneven brightness of the display screen.
  • the power supply voltage of the pixel units will be uneven due to the flow of current, and the uneven temperature will lead to the uneven current of the drive tube.
  • the unevenness of each channel source driving module will lead to the unevenness of the feedback driving current.
  • the display driver chips of all pixel systems have the problem of uneven driving of different driving channels, ie, driving circuits.
  • the invention provides an extra-pixel analog domain compensation display system with a feedback signal detection method, which includes M columns of drive channels; each column of drive channels includes a pixel unit and a detection unit; the detection unit includes a source driving module and a detection module; the detection module includes a comparison
  • the system is an extra-pixel compensation dual digital-to-analog converter display system, and the source driving module is provided with a first digital-to-analog converter and a second digital-to-analog converter; the source driving module is connected to the pixel unit through a display signal line;
  • the first input terminal is connected to the pixel unit through the feedback signal line for receiving the feedback voltage corresponding to the feedback signal of the pixel unit; the second input terminal is connected to the second digital-to-analog converter for receiving the second digital-to-analog converter
  • the output comparison voltage; the output end of the comparator is used to output the detection result obtained by comparing the feedback voltage with the comparison voltage; wherein, M is an integer greater than or equal to 1.
  • the present invention also provides a feedback signal detection method, which is applied to the above-mentioned display system, and includes the following processes:
  • the process of the detection operation is: when the write channel of the pixel unit of the nth row is gated, the pixel unit is controlled to generate a feedback voltage and the second digital-to-analog converter is controlled to output the comparison voltage, so that the first input end of the comparator receives the feedback signal corresponding feedback voltage, and make the second input terminal of the comparator receive the comparison voltage; compare the feedback voltage and the comparison voltage; control the comparator to feed back the comparison result to the aging information memory through the shift-out circuit.
  • the present invention provides a feedback signal detection method and an extra-pixel analog domain compensation display system.
  • the system is an extra-pixel compensation dual DAC (Digital-to-Analog Converter, digital-to-analog converter) display system, which utilizes the digital-to-analog conversion of the extra-pixel compensation display system. It can detect the aging information fed back by the target pixel unit, that is, detect the threshold voltage of the light-emitting device and the threshold voltage of the driving tube in the pixel unit, and can detect devices such as TFT, OLED and QLED, and then realize the aging of the device and the threshold voltage.
  • the target pixel unit that is, detect the threshold voltage of the light-emitting device and the threshold voltage of the driving tube in the pixel unit, and can detect devices such as TFT, OLED and QLED, and then realize the aging of the device and the threshold voltage.
  • the present invention also makes full use of the existing modules in the display system, does not increase the chip area, and optimizes the overall design of the display system.
  • the pixel unit can only use the compensated correction signal to feed back a fixed expected current, and then the aging information detection module compares the current with the reference current, and then indirectly calculates the aging degree of the pixel unit driver tube.
  • the present invention directly detects the threshold voltage of the pixel unit driving tube and the change of the threshold voltage of the OLED by repeatedly using the existing modules (ie, the DAC and the comparator).
  • FIG. 1 is a schematic structural diagram of a traditional external compensation display system
  • Fig. 2 is the resistor string of the display DAC and the compensation DAC of the source driver module of the external compensation dual DAC display system;
  • FIG. 3 is a schematic diagram of gamma curve correction performed by 256 reference voltages in a resistor string
  • FIG. 4 is a schematic structural diagram of a pixel unit suitable for the present invention.
  • FIG. 5 is a schematic structural diagram of a pixel unit suitable for use in the present invention.
  • FIG. 6 is a schematic diagram of the layout of a traditional external pixel compensation dual DAC display system
  • FIG. 7 is a schematic diagram of a partial structure of the display system according to the first embodiment.
  • FIG. 8 is a schematic diagram of a partial structure of the display system according to the second embodiment.
  • FIG. 9 is a schematic diagram of a detection operation flow of the present invention.
  • FIG. 10 is a schematic diagram showing the comparison between the feedback voltage and the comparison voltage.
  • controller 10 line scan driver 20, source driver 30, display panel 40, timing control module 11, compensation algorithm module 12, aging information memory 13, first shift-in circuit 34, second shift-in circuit 35, detection unit 32, shift-out circuit 33, source driving module 321, detection module 322, first digital-to-analog converter 61, second digital-to-analog converter 62, analog adder 63, comparator 72, current source 73, pixel unit 41, display Address line 42, feedback address line 43, display signal line 44, feedback signal line 45, second switch transistor Q2, third switch transistor Q3, drive transistor Q1, light emitting diode T1, first resistor string 81, second resistor string 82 , resistor 08, first switch sw1, second switch sw2.
  • connection and “connection” mentioned in the present invention, unless otherwise specified, include both direct and indirect connections (connections).
  • N is an integer greater than or equal to 1
  • n is an integer greater than or equal to 1 and less than or equal to N
  • M is an integer greater than or equal to 1
  • m is an integer greater than or equal to 1 and less than or equal to M
  • K is a natural number greater than 0, and k is A natural number greater than 0.
  • the compensation schemes for AMOLED display systems are divided into in-pixel compensation and out-of-pixel compensation (or external compensation).
  • the out-of-pixel compensation methods are divided into real-time compensation methods and non-real-time compensation methods.
  • Domain compensation method and analog domain compensation method the present invention adopts the analog domain compensation method.
  • FIG. 1 is a schematic structural diagram of a conventional external compensation display system, which includes a controller 10 , a line scan driver 20 , a source driver 30 and a display panel 40 .
  • the controller 10 is connected to the line scan driver 20 and the source driver 30 .
  • the controller 10 includes a timing control module 11 , a compensation algorithm module 12 and an aging information memory 13 which are connected in sequence.
  • the source driver 30 includes a first shift-in circuit 34, a second shift-in circuit 35, a shift-out circuit 33 and M detection units 32;
  • the detection unit 32 includes a source driver module 321 and a detection module 322;
  • the source driver module 321 includes a first digital-to-analog converter , a second digital-to-analog converter, and an analog adder,
  • the detection module 322 includes a comparator.
  • the display panel 40 includes N rows and M columns of pixel units 41, and the row scan driver 20 leads out N rows of display address lines 42 and feedback address lines 43; wherein, the nth row of display address lines 42 and the feedback address lines 43 are respectively connected to the nth row each pixel unit 41; the row scan driver 20 is used to receive the row control signal of the controller 10 and sequentially select the write channel of each pixel unit from the 1st row to the Nth row through the display address lines of the 1st row to the Nth row .
  • the numbers of the pixel units in the first row are [1,1]...[1,m]...[1,M]
  • the numbers of the pixel units in the nth row are [n,1]... [n,m]...[n,M]
  • the numbers of the pixel units in the Nth row are respectively [N,1]...[N,m]...[N,M].
  • the timing control module 11 , the first shift-in circuit 34 and the first digital-to-analog converter in the mth column are connected in sequence, and the compensation algorithm module 12 , the second shift-in circuit 35 and the second digital-to-analog converter in the mth column are connected in sequence.
  • the source driving module 321 of the detection unit 32 in the m-th column is connected to the display signal line 44 in the m-th column and then connected to the pixel units 41 in the m-th column, respectively.
  • the detection modules 322 in the detection unit 32 in the m-th column are respectively connected to the pixel units 41 in the m-th column through the m-th column feedback signal line 45 for receiving the feedback voltage corresponding to the feedback signal of the pixel unit 41 .
  • the detection module 322 in the m-th column of the detection unit 32 may also be used to receive the feedback current corresponding to the feedback signal of the pixel unit 41, which can also achieve the technical effect of the present invention.
  • the output terminal of the detection module 322, the removal circuit 33 and the aging information memory 13 are connected in sequence, so that the output terminal of the detection module 322 of the mth column compares the feedback voltage with the comparison voltage through the removal circuit 33.
  • the detection result is fed back to the controller 10 through the shift-out circuit 33 .
  • the detection unit 32 in the m-th column and the pixel unit 41 in the m-th column form the m-th column of drive channels, and the display system is divided into M-th columns of drive channels.
  • the compensation algorithm in the controller 10 only calculates the compensation value (digital compensation signal), the digital compensation signal and the digital display signal will be simultaneously input from the controller 10 to the source driver 30, and the source driver 30 uses 2
  • Each DAC converts the digital compensation signal and the digital display signal into an analog signal, and then adds the two analog signals with an analog adder to obtain a compensated analog display signal and outputs it to the display signal line, and then writes it into the pixel unit.
  • the bit width of the two DACs in each channel can be smaller than the DAC bit width of a single DAC display system (for example, both DACs are 8 bits, and the digital domain compensation of a single DAC needs to implement gamma correction and reserve voltage space for the pixel unit. Used when aging, DAC generally needs more than 10 bits).
  • the difference between the off-pixel compensation dual DAC display system and the off-pixel compensation single DAC display system is that the dual DAC display system will not output the digital display signal to the 10-bit compensated digital display signal after the controller 10 completes the compensation.
  • the source driver 30 instead outputs the 8-bit digital display signal and the 8-bit digital compensation signal calculated by the compensation algorithm to the source driver 30 in parallel at the same time, and there are two DACs in the source driver module corresponding to each column of pixel units, respectively. Convert the digital display signal and the digital compensation signal into an analog display signal (voltage) and an analog compensation signal (voltage), and then use an analog adder to add the analog display signal and the analog compensation signal to the compensated analog display signal and output it to the Display signal line.
  • the source driving module 321 of the extra-pixel compensation dual DAC display system includes a first digital-to-analog converter 61 , a second digital-to-analog converter 62 and an analog adder 63 .
  • the digital display signal and the digital compensation signal are converted into an analog signal (voltage) and then added by the analog adder to form a compensated analog display signal and output to the display signal line connected to the source driver module.
  • Each source driver module has two sets of 256 reference voltage signal lines, one set of reference voltages is V_disp_0, V_disp_1...V_disp_255, representing 256 reference voltages of different sizes for the display DAC, and the other set of reference voltages is V_comp_0, V_comp_1...V_comp_255, representing the compensation DAC 256 reference voltages of different sizes.
  • the DAC in each source driver module is just a simple decoding circuit, which decodes the input 8-bit digital signal and then selects a corresponding reference voltage from 256 voltages and distributes it to the output terminal.
  • These 2 groups of 256 reference voltage lines are shared by all source driver modules, and come from 2 resistor strings, namely the first resistor string 81 and the second resistor string 82, each group has at least 255 resistors 08, and the resistor divider is used at the highest There are 256 different reference voltages between the reference voltage (V_high, such as 4V) and the lowest reference voltage (V_low, such as 0V).
  • V_high such as 4V
  • V_low lowest reference voltage
  • the highest reference voltage of the first resistor string 81 is V_disp_high, and the lowest reference voltage is V_disp_low; the second resistor
  • the highest reference voltage of string 82 is V_comp_high and the lowest reference voltage is V_comp_low.
  • the digital display signal is disp_m, and the digital compensation signal is comp_m.
  • Figure 3 shows how a resistor string generates 256 reference voltages of different sizes and how gamma correction is performed in the art.
  • the horizontal axis (X axis) is the 8-bit number input by the DAC, from 0 to 255;
  • the vertical axis (Y axis) is 256 reference voltages, and each reference voltage corresponds to each input 8-bit number.
  • V_high is the highest voltage of the resistor string
  • V_low is the lowest voltage of the resistor string.
  • the 8-bit input number corresponding to the reference voltage would be a straight line (curve L1).
  • the voltage difference between each step is
  • V_gamma0, V_gamma1, V_gamma2, and V_gamma3 a curve with gamma correction, that is, curve L2 can be generated.
  • the 4 gamma correction voltages inserted in the middle correspond to the DAC input values of G0, G1, G2 and G3. These four gamma correction voltages can force G0, G1, G2 and G3 to output the reference voltages V_gamma0, V_gamma1, V_gamma2 and V_gamma3 correspondingly.
  • V_gamma0, V_gamma1, V_gamma2, and V_gamma3 The way to generate a line DAC and remove the gamma correction voltages (V_gamma0, V_gamma1, V_gamma2, and V_gamma3) can be to put the buffers (buffers) that output the gamma correction voltages into a disabled state, which allows the buffer output to be floating (floating). condition).
  • V_gamma0 is inserted into the node of resistor string output G0 to force the node to output V_gamma0 voltage
  • V_gamma1 is inserted into the node of resistor string output G1 to force this node to output V_gamma1 voltage
  • V_gamma2 Insert into the node of resistor string output G2 to force this node to output The voltage of V_gamma2
  • V_gamma3 is inserted into the node of the resistor string output G3, forcing the node to output the voltage of V_gamma3.
  • the pixel units form an array, and the pixel units suitable for the extra-pixel compensation display system need to have a feedback channel, and the aging information in the pixel unit needs to be fed back to the aging signal detection module in the source driver 30 for aging detection.
  • the row scan driver 20 respectively sends out row scan signals to the display address line (corresponding to the display address signal) and the feedback address line (corresponding to the feedback address signal).
  • the display address signal is valid
  • the pixel circuit of a row connected to the display address line is turned on, and the signal on the display signal line (such as a correction signal or a compensated analog display signal) is written into the pixel connected to it. in the unit.
  • the feedback address signal is valid, the feedback channel of the pixel unit can be turned on, and the information of the aging of the pixel unit or the uneven threshold voltage of the pixel unit is transmitted to the feedback signal line in the form of current or voltage.
  • the function of the aging signal detection module is to detect whether the aging signal fed back from the pixel unit deviates from the expected aging degree.
  • the detection result is a one-digit number, indicating that the expected aging degree is low or high, and the detection result will be output to the controller 10 through the shift-out circuit, and then the aging information memory will be updated.
  • the pixel unit circuit Since the aging information in the pixel unit needs to be transmitted to the feedback signal line, the pixel unit circuit has a feedback channel output port and a feedback channel control input port.
  • the third switch tube (Q3) in Figure 4 forms a feedback channel connecting the pixel unit and Feedback signal line.
  • the controller 10 Controller controls the function of the source driver 30 and the line scan driver 20 to sequentially select the pixel unit to write the display signal row by row, and also includes an aging information memory. According to the aging information, each pixel unit can be subjected to various aging compensations, using The compensation algorithm calculates a digital compensation value for each pixel cell. In addition, the controller 10 also receives the detection result of the feedback voltage of the pixel unit from the source driver 30 .
  • the display system with out-of-pixel compensation can perform two operations, display operation and correction feedback detection operation.
  • Display operations are generally the same as conventional display systems.
  • the specific implementation details of the correction feedback detection operation need to be matched with the design of the entire off-pixel compensation display system.
  • the correction feedback detection operation may be performed when the display system is not performing the display operation. For example, after the display system is powered on, before the display screen starts to display the picture, when the power supply is still supplied after the display screen is turned off, or the blank period before the frame and the frame, or a period of time is specially arranged to not perform the display operation but to perform the correction feedback detection operation. .
  • the display signal writing channel of the pixel unit of the specified row (or part of the pixel unit of a certain row) is gated by the line scan driver 20, and then the correction signal is written through the display signal line, and the correction signal can come from the controller 10.
  • the line scan driver 20 immediately selects the feedback channel of the row of pixel units, and the detection result of the aging information detected by the detection module is locked in parallel. After that, it is serially output to the controller 10 through the shift-out circuit, and then the aging information memory is updated.
  • the pixel unit 41 includes a second switching transistor Q2, a driving transistor Q1, a third switching transistor Q3 and a light emitting diode T1.
  • the second switch transistor Q2 in the pixel unit 41 of the nth row and the mth column is connected to the display address line 42 of the nth row and the display signal line 44 of the mth column; the second switch transistor Q2, the driving transistor Q1 and the third The switch transistors Q3 are connected in sequence; the light emitting diode T1 is connected between the drive transistor Q1 and the third switch transistor Q3; the third switch transistor Q3 in the pixel unit 41 of the nth row and the mth column is connected to the feedback address line of the nth row 43 and the feedback signal line 45 of the mth column.
  • an optional pixel unit 41 of the present invention which includes a second switch transistor Q2, a drive transistor Q1, a third switch transistor Q3 and a light emitting diode T1; wherein the second switch transistor Q2,
  • the driving transistor Q1 and the third switching transistor Q3 are N-type transistors.
  • the gate of the second switch transistor Q2 is connected to the display address line 42 of the nth row, the first pole of which is connected to the display signal line 44 of the mth column, and the second switch Q2 is connected to the display address line 42 of the nth row.
  • the electrode is connected to the gate of the driving transistor Q1.
  • the first electrode of the driving transistor Q1 is connected to its working voltage terminal VDD_OLED, and the second electrode is connected to the positive electrode of the light emitting diode T1 and the first electrode of the third switching transistor Q3; the working voltage of the display panel is the same as that of the source driver 30 or the line scan driver.
  • the operating voltage of 20 can be different.
  • the cathode of the light-emitting diode T1 is connected to its ground terminal.
  • the gate of the third switch transistor Q3 is connected to the feedback address line 43 in the nth row, and the second pole thereof is connected to the feedback signal line 45 in the mth column.
  • another optional pixel unit 41 of the present invention includes a second switch transistor Q2, a drive transistor Q1, a third switch transistor Q3 and a light-emitting diode T1; wherein, the second switch transistor Q2, the drive transistor Q1 and the third switch tube Q3 are P-type tubes.
  • the gate of the second switch transistor Q2 in the pixel unit 41 of the nth row and the mth column is connected to the display address line 42 of the nth row, the first pole of which is connected to the display signal line 44 of the mth column, and the second The electrode is connected to the gate of the driving transistor Q1.
  • the first pole of the driving transistor Q1 is connected to the cathode of the light emitting diode T1 and the first pole of the third switching transistor Q3, and the second pole thereof is connected to the ground terminal thereof.
  • the anode of the light emitting diode T1 is connected to its working voltage terminal VDD_OLED.
  • the gate of the third switch transistor Q3 is connected to the feedback address line 43 in the nth row, and the second pole thereof is connected to the feedback signal line 45 in the mth column.
  • the driving transistor Q1, the second switching transistor Q2 and the third switching transistor Q3 can be, for example, amorphous silicon. , transistors prepared by polysilicon, oxide semiconductor, organic semiconductor, thin film technology, NMOS technology, PMOS technology or CMOS technology.
  • a conventional display panel circuit structure can be formed only by adjusting the connection relationship of the three Replacing the driving transistor Q1, the second switching transistor Q2 and the third switching transistor Q3 of the present invention with different types of transistors and designing a display panel are also conventional technical means in the art, that is, using other types of transistors to design a circuit for a display panel also falls into the same category. protection scope of the present invention.
  • the source electrode of the transistor as the first electrode and the drain electrode as the second electrode during the design process of the specific circuit structure; alternatively, the drain electrode of the transistor can also be used as the first electrode and the source electrode as the second pole.
  • feedback signal may refer to the following “feedback voltage” or “feedback information”.
  • the feedback information, the feedback signal and the feedback voltage may reflect the aging information or the aging condition of the device.
  • the display system of the present invention is an extra-pixel compensation dual DAC display system, or is called an extra-pixel compensation AMOLED display system.
  • the comparator of the detection unit 32 adopts a voltage comparator
  • the detection module 322 is a module for detecting aging information.
  • the light-emitting device is a light-emitting diode, which can be an organic light-emitting diode (OLED), or a quantum dot light-emitting diode (QLED), or a general type and various other types of LEDs (Light-Emitting Diodes). Diode).
  • OLED organic light-emitting diode
  • QLED quantum dot light-emitting diode
  • Diode Light-Emitting Diodes
  • the aging information memory 13 can store various aging information.
  • FIG. 6 is a schematic structural diagram of a traditional external-pixel compensation dual DAC display system.
  • the converter 62, the first digital-to-analog converter 61 and the second digital-to-analog converter 62 are connected to the first shift-in circuit 34 and the second shift-in circuit 35, respectively.
  • the first digital-to-analog converter 61 is used to convert the 8-bit digital display signal disp_n_m
  • the second digital-to-analog converter 62 is used to convert the 8-bit digital compensation signal comp_n_m.
  • disp_n_m represents the display signal of the pixel unit of the nth row and the mth column
  • comp_n_m represents the compensation signal of the pixel unit of the nth row and the mth column.
  • the two DACs respectively convert the digital display signal and the digital compensation signal into an analog display signal (voltage) and an analog compensation signal (voltage), and then add the analog adder 63 to form an analog compensated display signal and output it to the pixel unit of the mth column. display signal line.
  • the analog compensated display signal is written into the pixel units of the nth row and the mth column that are gated by the scan driver.
  • the compensated display signal 1 will be written to the pixel unit of the target row through the display operation first. Then, the feedback channel of the row of pixel units is turned on, and the detection module 322 will fix the feedback signal line at a low voltage (such as 0.8V), the low voltage will be lower than the threshold voltage of the OLED, to ensure that the OLED will be turned off and turned on, and all driving The current of the tube Q1 will flow to the detection module 322 through the feedback signal line, so as to be compared with the reference current.
  • a low voltage such as 0.8V
  • the reference current is the expected current output by the driving transistor Q1 of the pixel unit 41 when the write-compensated display signal is 1, which is also the current flowing to the OLED, assuming that the expected current is 10nA.
  • the digital signal whose current comparison result is 1 bit will be output to the controller through the shift-out circuit 33 to update the aging data in the aging information memory of the controller.
  • the driving transistor Q1 After the correction signal of the existing design is compensated, the driving transistor Q1 will feed back a driving current of 10nA. If not, adjust the digital correction signal through the comparison result, and let the driving transistor Q1 feedback the current of 10nA.
  • the existing design has defects in detection.
  • the detection module 322 can only compare with one or several (limited number) fixed reference signals (voltage or current), so it is impossible to directly detect the threshold voltage of the OLED and the driving transistor Q1. Because the threshold voltages of the OLED and the driving transistor Q1 are not fixed after aging, and the threshold voltage fed back to the detection module 322 cannot be changed to be close to the reference voltage by adjusting the compensation signal.
  • this embodiment is improved on the basis of the traditional external compensation display system shown in FIG. 6 , and the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 4 .
  • the detection module 322 further includes a current source 73 , and the current source 73 of the detection module 322 in the m-th column is connected to each pixel unit 41 in the m-th column through the feedback signal line 45 in the m-th column.
  • the first digital-to-analog converter 61 is connected to the analog adder 63 , and the analog adder 63 is connected to the pixel unit 41 of the m-th column driving channel through the display signal line 44 .
  • the display system designed according to FIG. 7 can detect the OLED threshold voltage.
  • the positive input terminal of the comparator 72 in the mth column detection module 322 is connected to the mth column feedback signal line 45 and the current source 73 , and the negative input terminal of the comparator 72 is connected to the second digital-to-analog converter of the mth column source driving module 321 62.
  • the detection method of this embodiment firstly configures the two DACs to be the same linear DAC.
  • One of the configuration methods is to disable all gamma voltages of the two resistor strings;
  • the 256 output voltages of the compensation DAC that is, the second digital-to-analog converter, assuming that the DAC is already linear
  • resistor string is copied to the output terminal of the display resistor string, and the output of the original display resistor string needs to be disabled first, that is, the
  • V_disp_0 V_comp_0
  • V_disp_1 V_comp_1
  • V_disp_255 V_comp_255.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the light-emitting diode T1, and includes the following processes:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the row scan driver 20 selects the write channel of the pixel unit of the nth row.
  • the first switch sw1 is closed and the second switch sw2 is opened, and the driving transistor in the mth column is controlled to be turned off and turned on; the connection between the display signal line and the output end of the analog adder is disconnected, and 0V is input from the low power supply V1 to the display signal line , so that the driving transistor Q1 is turned off, and the analog adder 63 , the first digital-to-analog converter 61 and the second digital-to-analog converter 62 are idle.
  • the result of detecting the threshold voltage of the light emitting diode obtained by the pixel unit 41 of the nth row and the mth column stored in the information memory 13 is output to the second digital-to-analog converter 62 of the mth column, so that the second digital-to-analog converter of the mth column is
  • the analog converter 62 converts the result into a voltage signal.
  • the current source 73 outputs a preset small current and transmits it to the light emitting diode T1 in the nth row and the mth column through the feedback channel, and the small current may be, for example, 10 nA. Since the current is small, after the feedback signal line is stabilized, it can be considered that the voltage on the feedback signal line is equal to the threshold voltage of the light emitting diode.
  • the row scan driver 20 selects the feedback channel of the pixel unit 41 of the nth row.
  • the obtained comparison voltage is the voltage converted by the second digital-to-analog converter 62 in the mth column, and the obtained feedback voltage of the pixel unit 41 in the nth row and the mth column is the voltage on the feedback signal line 45 in the mth column.
  • the comparator 72 compares the feedback voltage with the comparison voltage.
  • the comparator 72 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • this embodiment is improved on the basis of the traditional external compensation display system shown in FIG. 6 , and the first digital-to-analog converter 61 and the second The digital-to-analog converter 62 is respectively connected to the display signal line 44 and the comparator 72.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 4;
  • the converter 61 is connected to the pixel unit 41 of the m-th column driving channel through the display signal line 44 .
  • the analog adder 63 in the source driver module 321 is idle.
  • the display system designed according to FIG. 8 can detect the threshold voltage of the driving transistor Q1.
  • the positive input terminal of the comparator 72 in the mth column detection module 322 is connected to the mth column feedback signal line 45 , and the negative input terminal of the comparator 72 is connected to the second digital-to-analog converter 62 of the mth column detection unit 32 .
  • the method of this embodiment first configures the two DACs as the same linear DAC.
  • One of the configuration methods is to disable all the gamma voltages of the two resistor strings; or use a selector to set the compensation DAC (That is, the 256 output voltages of the second digital-to-analog converter) resistor string are copied to the output end of the display resistor string, and the output of the original display resistor string needs to be disabled first, that is, the
  • V_disp_0 V_comp_0
  • V_disp_1 V_comp_1
  • V_disp_255 V_comp_255.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the driving transistor Q1, and includes the following process:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the row scan driver 20 selects the write channel of the pixel unit of the nth row.
  • the result of the driving transistor source voltage Vs obtained by detecting the pixel units 41 in the n-th row and the m-th column stored in the information memory 13 is output to the second digital-to-analog conversion of the m-th column through the second shift-in circuit 35 .
  • the second digital-to-analog converter 62 in the mth column is used to convert the result into a voltage signal.
  • the second preset display signal is output to the display signal line of the mth column, so as to turn on the driving transistor Q1 and the light emitting diode T1 of the pixel unit 41 of the nth row and the mth column.
  • the second preset display signal is a larger fixed value, such as 255.
  • the row scan driver 20 selects the feedback channel of the pixel unit 41 of the nth row.
  • the threshold voltage of the driving transistor Q1 is equal to the gate voltage Vg minus the source voltage Vs.
  • the digital signal of the 8-bit DAC corresponding to the gate voltage Vg may be 255, and the digital signal of the 8-bit DAC corresponding to the source voltage Vs is one of the data stored in the aging memory.
  • the obtained feedback voltage of the pixel unit 41 of the nth row and the mth column is the voltage on the feedback signal line 45 of the mth column, that is, the source voltage of the driving transistor Q1, and the obtained comparison voltage is the second digital-to-analog converter of the mth column. 62 to convert the resulting voltage.
  • the comparator 72 compares the feedback voltage with the comparison voltage.
  • the comparator 72 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • FIG. 9 is a schematic diagram of the feedback signal detection operation flow of the present invention, which is suitable for describing the detection operation of the display system in Embodiment 1 and Embodiment 2.
  • the detection operations in this paper are all directed to the pixel unit of the n-th row and the m-th column, and the pixel unit of the n-th row and the m-th column is used as the target pixel unit.
  • the St1 process and the St2 process can be performed simultaneously.
  • the feedback signal detection method of the present invention includes the following processes:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • St1 gating the write channel of the pixel unit of the nth row
  • St3 compare the feedback voltage with the comparison voltage
  • St4 control the comparator to feed back the detection result obtained by the comparison to the aging information memory through the removal circuit;
  • Process 2 Repeat the process 1. As the process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation. It should be understood by those skilled in the art that process one can be repeatedly performed.
  • the positive input terminal of the comparator 72 can be set as the first input terminal, and the negative input terminal can be set as the second input terminal. Then St3 compares the feedback voltage with the comparison voltage as follows:
  • the comparator 72 compares the comparison voltage with the feedback voltage
  • the comparator 72 compares the comparison voltage with the feedback voltage and outputs a result of 1 in the first round of scanning, then when the line scan driver 20 performs the second round of scanning, when the write channel of the nth row is gated again, the comparison voltage is controlled. Increase the preset value k; if the comparator 72 compares the comparison voltage with the feedback voltage in the first round of scanning and the output result is 0, then when the line scan driver 20 performs the second round of scanning, the write channel of the n-th row is reset again. When gating, control the comparison voltage to reduce the preset value k;
  • the line scan driver 20 When the line scan driver 20 performs a certain round of scanning, after the result outputted by the comparator 72 comparing the comparison voltage and the feedback voltage is inverted for the first time, if the first inversion is 1 to 0, then when the nth row write channel is selected for the next time When it is turned on, the control comparison voltage decreases by 1; if it is turned from 0 to 1 for the first time, when the write channel of the nth row is gated next time, the control comparison voltage increases by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units from the first row to the Nth row.
  • the nth row write channel is gated again, if the result of the previous comparison is 1, this time control
  • the comparison voltage is increased by 1; if the result of the previous comparison is 0, the comparison voltage of this control is decreased by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units in the first row to the Nth row, until the nth row of the write channel is subsequently gated, the feedback voltage and the comparison voltage with a value of K+1 are performed. If the output result of the comparison is 0 and the feedback voltage is compared with the comparison voltage whose value is K, the output result is 1, and a certain value between K and K+1 is used as the final result. For example, an intermediate value between K and K+1, an average value, a numerical value K, or a numerical value K+1 can be used as the detection result, and the calculation of the mean value includes calculation schemes such as arithmetic mean or geometric mean. The operation of "taking a certain value between K and K+1 as the final result" can be performed by the timing control module 11 or determined by a technician.
  • the display system uses the pixel unit shown in Figure 4, and the comparison voltage is the DAC input value.
  • the comparison voltage is the DAC input value.
  • select a value at the DAC input terminal assuming that it starts from the value 0, and then converts it into the corresponding value corresponding to the value 0 through the DAC
  • the analog signal (voltage) is output to the negative input terminal of the comparator 72, and the positive input terminal of the comparator 72 inputs the signal to be detected (ie, the feedback voltage). If the result is 0, it means that the voltage selected by the DAC is high, but at this time the input of the DAC is already 0 and cannot be lower, which means that the input voltage to be detected exceeds the detectable range.
  • k is an integer other than 0, such as 1. If the result of the next round of comparison is still 1, the DAC input value is raised again until the output of the comparator 72 is 0, indicating that the voltage corresponding to the input value selected by the DAC has exceeded the detected signal input by the positive terminal of the comparator , this is the first flip.
  • the DAC value starts from 0, and the final state should be: when the DAC value rises to K+1, the output result of the comparator 72 is 0, indicating that the voltage selected by the DAC is larger than the compared voltage , then in the next comparison, the voltage value selected by the DAC will be decremented by 1; when the DAC value drops to K, the output result of the comparator 72 is 1, indicating that the voltage selected by the DAC is smaller than the compared voltage, and then the next time During the comparison, the voltage value selected by the DAC will be added by 1; this cycle will achieve stability. Finally, the input value of the entire DAC will be stable and jump between K and K+1, indicating that the voltage being compared is between the voltages corresponding to K and K+1.
  • the comparator 72 compares the comparison voltage with the feedback voltage
  • the comparator 72 compares the comparison voltage with the feedback voltage and outputs a result of 0 in the first round of scanning, then when the line scan driver 20 performs the second round of scanning, when the write channel of the nth row is gated again, the comparison voltage is controlled. Increase the preset value k; if the comparator 72 compares the comparison voltage with the feedback voltage in the first round of scanning and the output result is 1, then when the line scan driver 20 performs the second round of scanning, the write channel of the nth row is selected again When on, control the comparison voltage to reduce the preset value k;
  • the line scan driver 20 When the line scan driver 20 performs a certain round of scanning, after the result outputted by the comparator 72 comparing the comparison voltage and the feedback voltage is inverted for the first time, if the first inversion is 0 to 1, then when the nth row write channel is selected for the next time When it is turned on, the control comparison voltage decreases by 1; if it is flipped from 1 to 0 for the first time, when the write channel of the nth row is gated next time, the control comparison voltage increases by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scanning and gating on the pixel units in the first row to the Nth row.
  • the nth row write channel is gated again, if the result of the previous comparison is 0, this time control
  • the comparison voltage is increased by 1; if the result of the previous comparison is 1, the comparison voltage of this control is decreased by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units in the first row to the Nth row, until the nth row of the write channel is subsequently gated, the feedback voltage and the comparison voltage with a value of K+1 are performed. If the output result of the comparison is 1 and the feedback voltage is compared with the comparison voltage whose value is K, the output result is 0, and a certain value between K and K+1 is used as the final result. For example, an intermediate value between K and K+1, an average value, a numerical value K, or a numerical value K+1 can be used as the detection result, and the calculation of the mean value includes calculation schemes such as arithmetic mean or geometric mean.
  • the invention provides a feedback signal detection method and an out-of-pixel analog domain compensation display system.
  • the system is an out-of-pixel compensation dual DAC display system, and the digital-to-analog converter and comparator of the out-of-pixel compensation display system are used to detect the aging of the feedback of the target pixel unit. Specifically, it is to detect the threshold voltage of the light-emitting device and the threshold voltage of the driving tube in the pixel unit. It can detect devices such as TFT, OLED and QLED, and then realize the analysis of device aging, uneven threshold voltage and uneven driving.
  • the present invention also makes full use of the existing modules in the display system without increasing the chip area , optimizes the overall design of the display system.
  • the pixel unit can only use the compensated correction signal to feed back a fixed expected current, and then the aging information detection module compares the current with the reference current, and then indirectly calculates the aging degree of the pixel unit driver tube.
  • the present invention directly detects the threshold voltage of the pixel unit driving tube and the change of the threshold voltage of the OLED by repeatedly using the existing modules (ie, the DAC and the comparator).

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Abstract

一种反馈信号检测方法及像素外模拟域补偿显示系统，系统包括M列驱动通道；每一列驱动通道包括像素单元（41）和检测单元（32）；检测单元（32）包括源驱动模块（321）和检测模块（322）；检测模块（322）包括比较器（72）；源驱动模块（321）内设置有第一数模转换器（61）和第二数模转换器（62）；源驱动模块（321）通过显示信号线（44）连接至像素单元（41）；比较器（72）的第一输入端通过反馈信号线（45）连接至像素单元（41），第二输入端连接至第二数模转换器（62），输出端用于将检测结果输出。利用数模转换器和比较器（72）进行搭配检测目标像素单元（41）反馈的老化信息，可以对TFT、OLED和QLED等器件做检测，还利用了显示系统中已有的模块，不会增加芯片面积，优化了显示系统的整体设计。

Description

一种反馈信号检测方法及像素外模拟域补偿显示系统 技术领域
本发明涉及光电技术领域，具体涉及一种反馈信号检测方法及像素外模拟域补偿显示系统。
 背景技术
现有技术中存在多种显示产品，例如AMOLED（有源矩阵有机发光二极体或主动矩阵有机发光二极体，Active-matrix organic light-emitting diode）是采用TFT（薄膜晶体管，Thin Film Transistor）进行像素单元电路陈列并在其上增设OLED（Organic Light-Emitting Diode或Organic Electroluminesence Display，又称有机发光二极管、有机电激光显示或有机发光半导体）的显示屏。
OLED-on-Silicon 或者QLED-on-Silicon类型的微显示产品是用硅做像素单元电路陈列，并在其上增设OLED或者QLED（量子点发光二极管T1，Quantum Dot Light Emitting Diodes）发光器件。
TFT、OLED和QLED等在发光之后都存在老化问题，例如，TFT阈值电压上升导致输入同样的显示信号老化TFT能给出的电流变小。当显示屏开始显示之后，老化TFT的阈值电压或老化OLED的阈值电压会发生飘移。OLED 阈值电压上升会导致OLED电流减少。老化OLED的发光效率降低，即同样的输入电流，老化OLED能发出来的光减少。
除了老化问题，TFT、OLED和QLED等还存在阈值电压不均匀的问题，例如在生产过程因为工艺原因会导致阈值电压不平均进而导致显示屏发光亮度不均匀。由于显示屏上像素单元陈列位置的不同，在显示屏发光时由于电流的流动会导致像素单元电源电压不平均，温度的不平均会导致驱动管电流不平均。各个通道源驱动模块的不平均会导致反馈的驱动电流不平均。
除此之外，所有像素系统的显示驱动芯片本身都存在不同驱动通道即驱动电路驱动不均匀的问题。
 技术问题 技术解决方案
本发明提供一种反馈信号检测方法的像素外模拟域补偿显示系统，其包括M列驱动通道；每一列驱动通道包括像素单元和检测单元；检测单元包括源驱动模块和检测模块；检测模块包括比较器；系统为像素外补偿双数模转换器显示系统，源驱动模块内设置有第一数模转换器和第二数模转换器；源驱动模块通过显示信号线连接至像素单元；比较器的第一输入端通过反馈信号线连接至像素单元，用于接收像素单元的反馈信号所对应的反馈电压；其第二输入端连接至第二数模转换器，用于接收第二数模转换器输出的比较电压；比较器的输出端用于将反馈电压与比较电压进行比较所得的检测结果输出；其中，M为大于等于1的整数。
本发明还提供一种反馈信号检测方法，其应用于上述显示系统，其包括如下过程：
依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
重复上述操作，再次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
检测操作的过程为：当第n行像素单元的写入通道被选通时，控制像素单元产生反馈电压并控制第二数模转换器输出比较电压，使得比较器的第一输入端接收反馈信号对应的反馈电压，并使得比较器的第二输入端接收比较电压；将反馈电压和比较电压进行比较；控制比较器将比较所得的检测结果通过移出电路反馈至老化信息记忆体。
本发明提供了反馈信号检测方法及像素外模拟域补偿显示系统，系统为像素外补偿双DAC（Digital-to-Analog Converter，数模转换器）显示系统，利用像素外补偿显示系统的数模转换器和比较器进行搭配检测目标像素单元反馈的老化信息，即检测像素单元中发光器件阈值电压和驱动管阈值电压，可以对TFT、OLED和QLED等器件做检测，进而实现器件老化、阈值电压不均匀和驱动不均匀等问题的分析，适用于AMOLED、OLED-on-Silicon、QLED-on-Silicon、PMOLED（被动矩阵有机电激发光二极管，Passive matrix OLED）、LCD驱动芯片和OLED照明驱动芯片等各种类型的产品，本发明还充分利用了显示系统中已有的模块，不会增加芯片面积，优化了显示系统的整体设计。
 有益效果
现有技术的缺点是只能利用补偿过的校正信号让像素单元反馈固定的预期电流，再在老化信息检测模块将该电流与参考电流做比较，再间接推算像素单元驱动管的老化程度。而本发明是通过重复使用已有的模块（即DAC和比较器），直接检测像素单元驱动管的阈值电压以及OLED的阈值电压变化情况。
 附图说明
图1为传统的外部补偿显示系统结构示意图；
图2为像素外补偿双DAC显示系统的源驱动模块的显示用DAC和补偿用DAC的电阻串；
图3为电阻串256个参考电压进行伽马曲线校正示意图；
图4为适用于本发明的像素单元结构示意图；
图5为适用于本发明的像素单元结构示意图；
图6为传统的像素外补偿双DAC显示系统布局示意图；
图7为实施例一的显示系统局部结构示意图；
图8为实施例二的显示系统局部结构示意图；
图9为本发明的检测操作流程示意图；
图10为反馈电压与比较电压进行比较示意图。
附图标记：控制器10、行扫描驱动器20、源驱动器30、显示面板40、时序控制模块11、补偿算法模块12、老化信息记忆体13、第一移入电路34、第二移入电路35、检测单元32、移出电路33、源驱动模块321、检测模块322、第一数模转换器61、第二数模转换器62、模拟加法器63、比较器72、电流源73、像素单元41、显示地址线42、反馈地址线43、显示信号线44、反馈信号线45、第二开关管Q2、第三开关管Q3、驱动管Q1、发光二极管T1、第一电阻串81、第二电阻串82、电阻08、第一开关sw1、第二开关sw2。
 本发明的实施方式
下面通过具体实施方式结合附图对本发明作进一步详细说明。其中不同实施方式中类似元件采用了相关联的类似的元件标号。在以下的实施方式中，很多细节描述是为了使得本发明能被更好的理解。然而，本领域技术人员可以毫不费力的认识到，其中部分特征在不同情况下是可以省略的，或者可以由其他元件、材料、方法所替代。在某些情况下，本发明相关的一些操作并没有在说明书中显示或者描述，这是为了避免本发明的核心部分被过多的描述所淹没，而对于本领域技术人员而言，详细描述这些相关操作并不是必要的，他们根据说明书中的描述以及本领域的一般技术知识即可完整了解相关操作。
另外，说明书中所描述的特点、操作或者特征可以以任意适当的方式结合形成各种实施方式。同时，方法描述中的各步骤或者动作也可以按照本领域技术人员所能显而易见的方式进行顺序调换或调整。因此，说明书和附图中的各种顺序只是为了清楚描述某一个实施例，并不意味着是必须的顺序，除非另有说明其中某个顺序是必须遵循的。
本文中为部件所编序号本身，例如“第一”、“第二”等，仅用于区分所描述的对象，不具有任何顺序或技术含义。而本发明所说“连接”、“联接”，如无特别说明，均包括直接和间接连接（联接）。
本文中，N为大于等于1的整数，n为大于等于1小于等于N的整数；M为大于等于1的整数，m为大于等于1小于等于M的整数；K为大于0的自然数，k为大于0的自然数。
本技术领域中，对AMOLED显示系统做补偿的方案分为像素内补偿和像素外补偿（或者外部补偿），像素外补偿方法分为实时补偿方法和非实时补偿方法，非实时补偿方法分为数字域补偿方法和模拟域补偿方法，本发明即采用模拟域补偿方法。
如图1所示为传统的外部补偿显示系统结构示意图，其包括控制器10、行扫描驱动器20、源驱动器30和显示面板40，控制器10连接至行扫描驱动器20和源驱动器30。控制器10包括依次连接的时序控制模块11、补偿算法模块12和老化信息记忆体13。源驱动器30包括第一移入电路34、第二移入电路35、移出电路33和M个检测单元32；检测单元32包括源驱动模块321和检测模块322；源驱动模块321包括第一数模转换器、第二数模转换器和模拟加法器，检测模块322包括比较器。
显示面板40包括N行、M列像素单元41，行扫描驱动器20引出N行显示地址线42和反馈地址线43；其中，第n行显示地址线42和反馈地址线43分别连接至第n行的各个像素单元41；行扫描驱动器20用于接收控制器10的行控制信号并依次通过第1行至第N行显示地址线选通第1行至第N行的各个像素单元的写入通道。第一行的像素单元的编号分别为[1,1]...[1,m]...[1,M]，第n行的像素单元的编号分别为[n,1]...[n,m]...[n,M]，第N行的像素单元的编号分别为[N,1]...[N,m]...[N,M]。
时序控制模块11、第一移入电路34和第m列第一数模转换器依次连接，补偿算法模块12、第二移入电路35和第m列第二数模转换器依次连接。第m列检测单元32的源驱动模块321连接至第m列显示信号线44进而分别连接至第m列的各个像素单元41。
第m列检测单元32中检测模块322通过第m列反馈信号线45分别连接至第m列的各个像素单元41，用于接收像素单元41的反馈信号所对应的反馈电压。本领域技术人员应当理解，第m列检测单元32中检测模块322也可以是用于接收像素单元41的反馈信号所对应反馈电流，同样能本发明的技术效果。
第m列检测单元32中检测模块322的输出端、移出电路33和老化信息记忆体13依次连接，从而，第m列检测模块322的输出端通过移出电路33将反馈电压与比较电压进行比较所得的检测结果通过移出电路33反馈至控制器10。
第m列检测单元32及第m列的像素单元41组成第m列驱动通道，则显示系统共分成M列驱动通道。
模拟域补偿方法，在控制器10里面的补偿算法只计算补偿值（数字补偿信号），数字补偿信号和数字显示信号会一起从控制器10同步输入给源驱动器30，在源驱动器30里面使用2个DAC分别把数字补偿信号和数字显示信号转换成模拟信号，再把2个模拟信号用模拟加法器相加得出补偿过的模拟显示信号并输出到显示信号线上，再写入像素单元。
每个通道中两个DAC的位宽都可以比单DAC显示系统的DAC位宽小（例如2个DAC都是8位，单个DAC数字域补偿考虑需要实现gamma 校正和预留电压空间给像素单元老化时使用，DAC一般需要10位以上）。像素外补偿双DAC显示系统与像素外补偿单DAC显示系统的区别在于，双DAC显示系统不会在控制器10把数字显示信号做完补偿变成10位补偿过的数字显示信号之后再输出给源驱动器30，而是分别把8位的数字显示信号和经过补偿算法算好的8位数字补偿信号同时并行输出给源驱动器30，而每列像素单元对应的源驱动模块里面有两个DAC分别把数字显示信号和数字补偿信号转换成模拟显示信号（电压）和模拟补偿信号（电压），之后再利用模拟加法器把模拟显示信号和模拟补偿信号相加变成补偿过的模拟显示信号输出到显示信号线上。
如图2所示，本技术领域中，像素外补偿双DAC显示系统的源驱动模块321包括第一数模转换器61、第二数模转换器62和模拟加法器63，2个DAC分别把数字显示信号和数字补偿信号转换成模拟信号（电压）再让模拟加法器相加成补偿过的模拟显示信号并输出到与该源驱动模块相连的显示信号线。每个源驱动模块都有两组各自256条参考电压信号线，一组参考电压是V_disp_0，V_disp_1...V_disp_255，代表给显示DAC 256个不同大小的参考电压，另一组参考电压是V_comp_0，V_comp_1...V_comp_255，代表给补偿DAC 256个不同大小的参考电压。每个源驱动模块里的DAC只是单纯的解码电路，解码输入8位数字信号后再从256个电压里面选一个相对应的参考电压分配到输出端。这2组256条参考电压线是所有源驱动模块共享的，且来自2个电阻串即第一电阻串81和第二电阻串82，每组至少有255个电阻08，利用电阻分压在最高参考电压（V_high，比如4V）和最低参考电压（V_low，比如0V）之间分出256个不同的参考电压，第一电阻串81的最高参考电压为V_disp_high，最低参考电压为V_disp_low；第二电阻串82的最高参考电压为V_comp_high，最低参考电压为V_comp_low。数字显示信号为disp_m，数字补偿信号为comp_m。
图3显示了本技术领域中电阻串如何产生256个不同大小的参考电压以及如何进行伽马校正（gamma correction）。其中，横轴（X轴）为DAC输入的8位数字，从0到255；竖轴（Y轴）为256个参考电压，每个参考电压对应每一个输入的8位数字。V_high为电阻串最高电压，V_low为电阻串最低电压。如果没有中间的4个gamma校正电压（V_gamma0、V_gamma1、V_gamma2和V_gamma3），那么参考电压对应的8位输入数字将是一条直线（曲线L1）。每个步进(step)之间的电压差为
         ΔV=(V_high – V_low)/255                 （1）
如果中间插入4个gamma校正电压（V_gamma0、V_gamma1、V_gamma2和V_gamma3）到电阻串，就可以产生带gamma校正的曲线即曲线L2。中间插入4个gamma校正电压对应DAC输入值为G0、G1、G2和G3。这4个gamma校正电压可以逼迫G0、G1、G2和G3对应输出参考电压V_gamma0、V_gamma1、V_gamma2和V_gamma3。
产生线行DAC、拿掉gamma校正电压（V_gamma0、V_gamma1、V_gamma2和V_gamma3）的方法可以是让这些输出gamma校正电压的buffer（缓冲器）进入禁用状态，该状态可以让缓冲器输出为floating（悬空状态）。
V_gamma0 插入到电阻串输出 G0 的节点，强迫该节点输出 V_gamma0 电压；V_gamma1 插入到电阻串输出 G1 的节点，强迫该节点输出 V_gamma1 电压；V_gamma2 插入到电阻串输出 G2 的节点，强迫该节点输出 V_gamma2 这个电压；V_gamma3 插入到电阻串输出 G3 的节点，强迫该节点输出 V_gamma3 这个电压。
像素单元组成阵列，适用于像素外补偿显示系统的像素单元都需要具备反馈通道，需要把像素单元内的老化信息反馈到源驱动器30内的老化信号检测模块做老化检测。
行扫描驱动器20分别发出行扫描信号到显示地址线（对应显示地址信号）和反馈地址线（对应反馈地址信号）上。当显示地址信号有效时，就会与该显示地址线相连的某行的像素电路导通，把显示信号线上的信号（例如校正信号或者是补偿过的模拟显示信号）写入与其相连的像素单元里。当反馈地址信号有效时，就能导通像素单元的反馈通道，把像素单元的老化或者阈值电压不平均的信息以电流或者电压的形式输送到反馈信号线。
老化信号检测模块的作用是检测从像素单元反馈的老化信号与预期的老化程度是否有偏差。检测结果则为一位的数字，代表预期的老化程度偏低或者偏高，该检测结果会通过移出电路输出给控制器10，再更新老化信息记忆体。
由于需要把像素单元内的老化信息传递到反馈信号线，故像素单元电路具有反馈通道输出端口和反馈通道的控制输入端口，比如图4的第三开关管（Q3）形成反馈通道连接像素单元与反馈信号线。
控制器10里除了具备传统显示系统的时序控制模块（Timing Controller）控制源驱动器30和行扫描驱动器20时序逐行选通像素单元写入显示信号的功能，还包括老化信息记忆体，根据老化信息，每个像素单元都可以被进行各种老化补偿，利用补偿算法计算每个像素单元的数字补偿值。另外控制器10也会从源驱动器30接收像素单元反馈电压的检测结果。
像素外补偿的显示系统可进行两种操作，显示操作和校正反馈检测操作。显示操作一般与传统显示系统一样。校正反馈检测操作具体实施细节需要与整个像素外补偿显示系统的设计相配合。校正反馈检测操作可以在显示系统没有进行显示操作时进行。比如显示系统上电之后显示屏还没有开始显示画面之前，显示屏关闭之后还有电源供应时，或者帧与帧之前的空白时期，或者特意安排一段时期不进行显示操作而专门进行校正反馈检测操作。
校正反馈检测操作中，通过行扫描驱动器20选通指定行像素单元（或者某行的部分像素单元）的显示信号写入通道，再通过显示信号线写入校正信号，校正信号可以来自控制器10或者源驱动器30，或者在本地同通道的源驱动器30产生，在写入校正信号之后，行扫描驱动器20随即选通该行像素单元的反馈通道，检测模块检测到的老化信息检测结果被平行锁存，之后就通过移出电路串行输出给控制器10，再更新老化信息记忆体。
本发明中，像素单元41包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1。第n行、第m列的像素单元41中的第二开关管Q2连接至第n行的显示地址线42和第m列的显示信号线44；第二开关管Q2、驱动管Q1和第三开关管Q3依次连接；发光二极管T1连接于驱动管Q1和第三开关管Q3之间；第n行、第m列的像素单元41中的第三开关管Q3连接至第n行的反馈地址线43和第m列的反馈信号线45。
具体地，如图4所示为本发明一种可选的像素单元41，其包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1；其中，第二开关管Q2、驱动管Q1、第三开关管Q3为N型管。第n行、第m列的像素单元41中，第二开关管Q2的栅极连接至第n行的显示地址线42，其第一极连接至第m列的显示信号线44，其第二极连接至驱动管Q1的栅极。驱动管Q1的第一极连接至其工作电压端VDD_OLED，其第二极连接至发光二极管T1的正极和第三开关管Q3的第一极；显示面板的工作电压与源驱动器30或行扫描驱动器20的工作电压可以不同。发光二极管T1的负极连接至其接地端。第三开关管Q3的栅极连接至第n行的反馈地址线43，其第二极连接至第m列的反馈信号线45。
如图5所示为本发明另一种可选的像素单元41，其包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1；其中，第二开关管Q2、驱动管Q1、第三开关管Q3为P型管。第n行、第m列的像素单元41中的第二开关管Q2的栅极连接至第n行的显示地址线42，其第一极连接至第m列的显示信号线44，其第二极连接至驱动管Q1的栅极。驱动管Q1的第一极连接至发光二极管T1的负极和第三开关管Q3的第一极，其第二极连接至其接地端。发光二极管T1的正极连接至其工作电压端VDD_OLED。第三开关管Q3的栅极连接至第n行的反馈地址线43，其第二极连接至第m列的反馈信号线45。
本领域技术人员可以根据实际情况选用具体的驱动管Q1、第二开关管Q2和第三开关管Q3的类型，驱动管Q1、第二开关管Q2和第三开关管Q3例如可以为非晶硅、多晶硅、氧化物半导体、有机半导体、薄膜工艺、NMOS工艺、PMOS工艺或CMOS工艺所制备的晶体管。当选定了驱动管Q1、第二开关管Q2和第三开关管Q3的具体类型后，只需将三者的连接关系做适应性调整即可构成常规的显示面板电路结构，且将某个种类的晶体管替换本发明的驱动管Q1、第二开关管Q2和第三开关管Q3并设计出显示面板也是本领域的常规技术手段，即利用其它类型的晶体管设计出显示面板的电路同样落入本发明的保护范围。
本领域技术人员在具体电路结构的设计过程中，可以将晶体管的源极作为第一极，将漏极作为第二极；或者，也可以将晶体管的漏极作为第一极，将源极作为第二极。
本领域技术人员应当理解，本发明中，“反馈信号”可以指下文的“反馈电压”，也可以指“反馈信息”。以下实施例中，反馈信息、反馈信号以及反馈电压可以体现器件的老化信息或老化状况。
本发明的显示系统为像素外补偿双DAC显示系统，或者称为像素外补偿AMOLED显示系统。
本发明中检测单元32的比较器采用电压比较器，检测模块322为检测老化信息的模块。
发光器件为发光二极管，可以是有机发光二极管即OLED，或者量子点发光二极管即QLED，或者一般类型及其他各种类型的LED（Light-Emitting Diode）。
老化信息记忆体13可存储各种老化信息。
实施例一：
图6为传统的像素外补偿双DAC显示系统的结构示意图，源驱动器里面共有M个源驱动模块321，每个源驱动模块321包括2个DAC即第一数模转换器61和第二数模转换器62，第一数模转换器61和第二数模转换器62分别连接至第一移入电路34和第二移入电路35。传统像素外补偿双DAC显示系统显示操作时，第一数模转换器61用来转换8位的数字显示信号disp_n_m，第二数模转换器62用来转换8位的数字补偿信号comp_n_m。disp_n_m代表第n行第m列的像素单元的显示信号，comp_n_m代表第n行第m列的像素单元的补偿信号。2个DAC分别把数字显示信号和数字补偿信号转换成模拟显示信号（电压）和模拟补偿信号（电压）再经模拟加法器63相加之后成模拟补偿过的显示信号输出到第m列像素单元的显示信号线。模拟补偿过的显示信号写入被扫描驱动器选通的第n行、第m列的像素单元。
传统像素外补偿双DAC显示系统校正反馈检测操作时，如果要检测像素单元驱动管Q1的老化，会先通过显示操作写入补偿过的显示信号1到目标行的像素单元。之后导通该行像素单元的反馈通道，检测模块322会把反馈信号线固定在一个低电压（比如0.8V），该低电压会低于OLED的阈值电压，保证OLED会截止导通，所有驱动管Q1的电流都会经过反馈信号线流到检测模块322，从而与参考电流做比较。该参考电流是写入补偿过的显示信号为1时，预期像素单元41的驱动管Q1输出的电流，也是流到OLED的电流，假设此该预期电流为10nA。电流比较结果为1位的数字信号会通过移出电路33输出到控制器，更新控制器老化信息记忆体里的老化数据。
现有设计的校正信号经过补偿之后，驱动管Q1会反馈10nA的驱动电流。如果不是，则通过比较结果调整数字校正信号，让驱动管Q1反馈10nA的电流。现有设计在检测方面存在缺陷，检测模块322只能与一个或者几个（有限数量）固定的参考信号（电压或者电流）做比较，这样的话是无法直接检测OLED和驱动管Q1的阈值电压，因为OLED和驱动管Q1老化之后，他们的阈值电压不是固定的，而且不能通过调整补偿信号改变反馈到检测模块322的阈值电压贴近参考电压。
如图1和图7所示，本实施例在如图6所示的传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统采用图4所示的像素单元，检测模块322还包括电流源73，第m列检测模块322的电流源73通过第m列反馈信号线45分别连接至第m列的各个像素单元41。第m列源驱动模块321内，第一数模转换器61连接至模拟加法器63，模拟加法器63通过显示信号线44连接至第m列驱动通道的像素单元41。根据图7而设计的显示系统可以检测OLED阈值电压。
第m列检测模块322中比较器72的正输入端连接第m列反馈信号线45和电流源73，比较器72的负输入端连接至第m列源驱动模块321的第二数模转换器62。
当发光二极管T1开始发光之后出现老化现象，发光二极管T1的阈值电压就会向更高值漂移。为检测发光二极管T1阈值电压，本实施例的检测方法首先要将2个DAC可以选择都配置成同样的线性DAC，配置方法之一是禁用2个电阻串的所有gamma电压；或者采用选择器把补偿DAC（即第二数模转换器，假设该DAC已经是线性）电阻串的256个输出电压拷贝到显示电阻串的输出端，并需要先禁用本来显示电阻串的输出，即令
V_disp_0 = V_comp_0
V_disp_1 = V_comp_1
…
V_disp_255 = V_comp_255。
本实施例的反馈信号检测方法用于检测发光二极管T1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图9所示，检测操作的过程具体为：
St1、行扫描驱动器20选通第n行像素单元的写入通道。
St2、控制像素单元41产生反馈电压并控制第二数模转换器62输出比较电压。
具体地，闭合第一开关sw1并断开第二开关sw2，控制第m列的驱动管截止导通；断开显示信号线与模拟加法器输出端的连接，由低电源V1输入0V到显示信号线，从而截止导通驱动管Q1，模拟加法器63、第一数模转换器61和第二数模转换器62闲置。
将信息记忆体13存储的之前检测第n行、第m列像素单元41所得到的发光二极管阈值电压的结果输出至第m列的第二数模转换器62，使得第m列的第二数模转换器62将该结果转换成电压信号。
电流源73输出预设的小电流通过反馈通道传输至第n行、第m列的发光二极管T1，该小电流例如可以是10nA。由于电流较小，待反馈信号线稳定之后，可以认为反馈信号线上的电压等于发光二极管的阈值电压。
行扫描驱动器20选通第n行像素单元41的反馈通道。
得到的比较电压为第m列第二数模转换器62转换所得的电压，得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压。
St3、比较器72将反馈电压和比较电压进行比较。
St4、比较器72将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果并更新数据。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
实施例二：
如图1和图8所示，本实施例在如图6所示的传统外部补偿显示系统的基础上做了改进，将原本连接至模拟加法器63的第一数模转换器61和第二数模转换器62分别连接至显示信号线44和比较器72，本实施例的反馈信号检测方法的显示系统采用图4所示的像素单元；第m列源驱动模块321内，第一数模转换器61通过显示信号线44连接至第m列驱动通道的像素单元41。源驱动模块321内的模拟加法器63闲置。（加，另一种设计是加法器左边输入端口还是连61的输出，右边输入端口连 0V 电压，这样加法器的输出电压就是61的输出电压。这效果是与把61的输出直接连到显示信号线是一样的）。根据图8而设计的显示系统可以检测驱动管Q1阈值电压。
第m列检测模块322中比较器72的正输入端连接第m列反馈信号线45，比较器72的负输入端连接至第m列检测单元32的第二数模转换器62。
为检测驱动管Q1阈值电压，本实施例的方法首先要将2个DAC都配置成同样的线性DAC，配置方法之一是禁用2个电阻串的所有gamma电压；或者采用选择器把补偿DAC（即第二数模转换器）电阻串的256个输出电压拷贝到显示电阻串的输出端，并需要先禁用本来显示电阻串的输出，即令
V_disp_0 = V_comp_0
V_disp_1 = V_comp_1
…
V_disp_255 = V_comp_255。
本实施例的反馈信号检测方法用于检测驱动管Q1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图9所示，检测操作的过程具体为：
St1、行扫描驱动器20选通第n行像素单元的写入通道。
St2、控制像素单元产生反馈电压并控制第二数模转换器输出比较电压。
具体地，将信息记忆体13存储的之前检测第n行、第m列像素单元41所得到的驱动管源极电压Vs的结果通过第二移入电路35输出至第m列的第二数模转换器62；第m列的第二数模转换器62用于将该结果转换成电压信号。
输出第二预设显示信号至第m列显示信号线，从而导通第n行、第m列像素单元41的驱动管Q1和发光二极管T1。第二预设显示信号为较大的固定值，比如255。
行扫描驱动器20选通第n行像素单元41的反馈通道。
驱动管Q1的阈值电压等于栅极电压Vg减去源极电压Vs。栅极电压Vg对应的8位DAC的数字信号可以是255，源极电压Vs对应的8位DAC的数字信号就是老化记忆体储存着的其中一种数据。
得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压即驱动管Q1源极电压，得到的比较电压为第m列的第二数模转换器62转换所得的电压。
St3、比较器72将反馈电压和比较电压进行比较。
St4、比较器72将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果并更新数据。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
如图9所示为本发明的反馈信号检测操作流程示意图，该图适用于表述实施例一和实施例二中显示系统的检测操作，实施例一和实施例二的方法的主要区别在于St2过程。为便于叙述分析，本文中的检测操作均针对第n行、第m列的像素单元，将第n行、第m列的像素单元作为目标像素单元。St1过程和St2过程可以同时进行。
本发明的反馈信号检测方法包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，检测操作的过程具体为：
St1、选通第n行像素单元的写入通道；
St2、控制像素单元产生反馈电压以及控制参考用数模转换器输出比较电压，使得比较器的第一输入端接收反馈电压，并使得比较器的第二输入端接收比较电压；
St3、将反馈电压和比较电压进行比较；
St4、控制比较器将比较所得的检测结果通过移出电路反馈至老化信息记忆体；
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动。本领域技术人员应当理解，过程一可以不断被重复执行。
本发明中，可以将比较器72的正输入端设定为第一输入端，将负输入端设定为第二输入端。则St3将反馈电压和比较电压进行比较的过程为：
当行扫描驱动器20进行第一轮扫描中选通第n行各个像素单元的写入通道时，比较器72将比较电压与反馈电压进行比较；
若第一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果为1，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压增加预设值k；若第一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果为0，则当当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压减小预设值k；
当行扫描驱动器20进行某一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压增加1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次控制比较电压增加1；若上一次比较的结果为0，则本次控制比较电压减小1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果。例如，可以将K与K+ 1之间的中间值、平均值、数值K或数值K+1作为检测结果，平均值的求解包括计算算数平均值或几何平均值等运算方案。“将K与K+1之间的某一数值作为最终结果”这一操作可以由时序控制模块11执行，也可以由技术人员来决定。
例如，如图10所示，显示系统采用图4所示的像素单元，比较电压为DAC输入值，首先DAC输入端先选一个值，假设从数值0开始，之后经过DAC转换成数值0对应的模拟信号（电压）输出到比较器72的负输入端，比较器72的正输入端输入需要检测的信号（即反馈电压）。如果结果为0，说明DAC选出来的电压偏高，不过此时DAC的输入已经为0不能再低，则说明输入需要检测的电压超出可检测的范围。如果为1，说明DAC选出来的电压不够，在下一轮比较时需要把DAC的输入值加k。此处k是不为0的整数，例如1。如果在下一轮比较结果还是1的话，则将DAC输入值再往上提，直至比较器72的输出为0，说明DAC所选的输入值对应的电压已经超过比较器正端输入的被检测信号，此时为首次翻转。
如图10所示，DAC值从0开始，最终所达到的状态应该是：当DAC值升到K+1之后比较器72的输出结果为0，表示DAC选出来的电压比被比较的电压大，之后在下次比较时就会把DAC选出来的电压值减1；当DAC值降到K之后比较器72的输出结果为1，表示DAC选出来的电压比被比较的电压小，之后在下次比较时就会把DAC选出来的电压值加1；如此循环，达到稳定。最后整个DAC的输入值就会稳定得在K和K+1之间跳动，说明被比较的电压是在K和K+1对应的电压之间。
或者，本领域技术人员根据电路设计的实际需要，还可以将比较器72的负输入端设定为第一输入端，将正输入端设定为第二输入端。则，St3将反馈电压和比较电压进行比较的过程为：
当行扫描驱动器20进行第一轮扫描中选通第n行各个像素单元的写入通道时，比较器72将比较电压与反馈电压进行比较；
若第一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果为0，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压增加预设值k；若第一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果为1，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压减小预设值k；
当行扫描驱动器20进行某一轮扫描中比较器72将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压增加1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次控制比较电压增加1；若上一次比较的结果为1，则本次控制比较电压减小1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果。例如，可以将K与K+ 1之间的中间值、平均值、数值K或数值K+1作为检测结果，平均值的求解包括计算算数平均值或几何平均值等运算方案。
本发明提供了反馈信号检测方法及像素外模拟域补偿显示系统，系统为像素外补偿双DAC显示系统，利用像素外补偿显示系统的数模转换器和比较器进行搭配检测目标像素单元反馈的老化信息，具体即检测像素单元中发光器件阈值电压和驱动管阈值电压，可以对TFT、OLED和QLED等器件做检测，进而实现器件老化、阈值电压不均匀和驱动不均匀等问题的分析，适用于AMOLED、OLED-on-Silicon、QLED-on-Silicon、PMOLED、LCD驱动芯片和OLED照明驱动芯片等各种类型的产品，本发明还充分利用了显示系统中已有的模块，不会增加芯片面积，优化了显示系统的整体设计。
现有技术的缺点是只能利用补偿过的校正信号让像素单元反馈固定的预期电流，再在老化信息检测模块将该电流与参考电流做比较，再间接推算像素单元驱动管的老化程度。而本发明是通过重复使用已有的模块（即DAC和比较器），直接检测像素单元驱动管的阈值电压以及OLED的阈值电压变化情况。
以上应用了具体个例对本发明进行阐述，只是用于帮助理解本发明，并不用以限制本发明。对于本发明所属技术领域的技术人员，依据本发明的思想，还可以做出若干简单推演、变形或替换。

Claims (10)

  1. 一种反馈信号检测方法的像素外模拟域补偿显示系统，其特征在于，
    包括M列驱动通道；
    每一列驱动通道包括像素单元(41)和检测单元(32)；所述检测单元(32)包括源驱动模块(321)和检测模块(322)；所述检测模块(322)包括比较器(72)；
    所述系统为像素外补偿双数模转换器显示系统，所述源驱动模块(321)内设置有第一数模转换器(61)和第二数模转换器(62)；
    所述源驱动模块(321)通过显示信号线(44)连接至所述像素单元(41)；
    所述比较器(72)的第一输入端通过反馈信号线(45)连接至所述像素单元(41)，用于接收所述像素单元(41)的反馈信号所对应的反馈电压；其第二输入端连接至所述第二数模转换器(62)，用于接收所述第二数模转换器(62)输出的比较电压；所述比较器(72)的输出端用于将反馈电压与比较电压进行比较所得的检测结果输出；
    其中，M为大于等于1的整数。
  2. 如权利要求1所述的系统，其特征在于，
    还包括控制器(10)、行扫描驱动器(20)、源驱动器(30)和显示面板(40)；
    所述控制器(10)连接至所述行扫描驱动器(20)和所述源驱动器(30)；
    所述显示面板(40)上设置N行、M列像素单元(41)，所述行扫描驱动器(20)引出N行显示地址线(42)和反馈地址线(43)；其中，第n行显示地址线(42)和反馈地址线(43)分别连接至第n行的各个像素单元(41)；所述行扫描驱动器(20)用于接收所述控制器(10)的行控制信号并依次通过第1行至第N行显示地址线选通第1行至第N行的各个像素单元的写入通道；
    所述源驱动器(30)包括第一移入电路(34)、第二移入电路(35)、移出电路(33)和M个检测单元(32)；
    所述控制器(10)、所述第一移入电路(34)和第m列源驱动模块(321)内的第一数模转换器(61)依次连接；
    所述控制器(10)、所述第二移入电路(35)和第m列源驱动模块(321)内的第二数模转换器(62)依次连接；
    所述控制器(10)用于控制第m列源驱动模块(321)内的第二数模转换器(62)输出比较电压；
    第m列比较器(72)的输出端通过所述移出电路(33)连接至所述控制器(10)，用于将检测结果通过所述移出电路(33)反馈至所述控制器(10)；
    其中，N为大于等于1的整数，n为大于等于1小于等于N的整数；m为大于等于1小于等于M的整数。
  3. 如权利要求2所述的系统，其特征在于，
    所述控制器(10)包括依次连接的时序控制模块(11)、补偿算法模块(12)和老化信息记忆体(13)；
    所述时序控制模块(11)、所述第一移入电路(34)和第m列源驱动模块(321)内的第一数模转换器(61)依次连接；
    所述补偿算法模块(12)、所述第二移入电路(35)和第m列源驱动模块(321)内的第二数模转换器(62)依次连接；
    第m列比较器(72)的输出端、所述移出电路(33)和所述老化信息记忆体(13)依次连接；
    所述像素单元(41)包括第二开关管、驱动管、第三开关管和发光器件；
    第n行、第m列的像素单元(41)中，第二开关管连接至第n行的显示地址线(42)和第m列的显示信号线(44)；
    第二开关管、驱动管和第三开关管依次连接；
    发光器件连接于驱动管和第三开关管之间；
    第三开关管连接至第n行的反馈地址线(43)和第m列的反馈信号线(45)。
  4. 如权利要求2或3所述的系统，其特征在于，
    比较器(72)的第一输入端为正输入端，第二输入端为负输入端；
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，比较器(72)用于将比较电压与反馈电压进行比较；
    若比较器(72)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压增加预设值k；若比较器(72)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压减小预设值k；
    当比较器(72)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次所述控制器(10)控制比较电压增加1；若上一次比较的结果为0，则本次所述控制器(10)控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果；
    或者，比较器(72)的第一输入端为负输入端，第二输入端为正输入端；
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，比较器(72)用于将比较电压与反馈电压进行比较；
    若比较器(72)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压增加预设值k；若比较器(72)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压减小预设值k；
    当比较器(72)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次所述控制器(10)控制比较电压增加1；若上一次比较的结果为1，则本次所述控制器(10)控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果；
    其中，K为大于0的自然数，k为大于0的自然数。
  5. 如权利要求3所述的系统，其特征在于，
    第m列源驱动模块(321)内，所述第一数模转换器(61)连接至模拟加法器(63)，所述模拟加法器(63)通过显示信号线(44)连接至第m列驱动通道的像素单元(41)；
    所述检测模块(322)还包括电流源(73)，第m列电流源(73)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道；
    所述时序控制模块(11)用于控制第m列驱动通道中的驱动管截止导通；
    所述补偿算法模块(12)用于将所述信息记忆体(13)存储的之前检测第n行、第m列像素单元(41)所得到的发光器件阈值电压的结果通过所述第二移入电路(35)输出至第m列的第二数模转换器(62)；第m列的第二数模转换器(62)用于将该结果转换成电压信号；
    所述电流源(73)用于输出预设电流至第m列的发光器件；
    所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道；
    第m列比较器(72)用于比较反馈电压与比较电压，通过所述移出电路(33)将检测结果反馈至所述信息记忆体(13)；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第m列的第二数模转换器(62)转换所得的电压。
  6. 如权利要求3所述的系统，其特征在于，
        第m列源驱动模块(321)内，所述第一数模转换器(61)通过显示信号线(44)连接至第m列驱动通道的像素单元(41)；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道；
    所述时序控制模块(11)用于输出第二预设显示信号至第m列显示信号线，从而导通第n行、第m列像素单元(41)的驱动管和发光器件；
    所述补偿算法模块(12)用于将所述信息记忆体(13)存储的之前检测第n行、第m列像素单元(41)所得到的驱动管源极电压的结果通过所述第二移入电路(35)输出至第m列的第二数模转换器(62)；第m列的第二数模转换器(62)用于将该结果转换成电压信号；
    所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道；
    第m列比较器(72)用于比较反馈电压与比较电压，通过所述移出电路(33)将检测结果反馈至所述信息记忆体(13)；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第m列的第二数模转换器(62)转换所得的电压。
  7. 一种反馈信号检测方法，其应用于如权利要求3所述的显示系统，其特征在于，包括：
    依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
    重复上述操作，再次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
    检测操作的过程为：当第n行像素单元的写入通道被选通时，控制像素单元产生反馈电压并控制第二数模转换器输出比较电压，使得所述比较器的第一输入端接收反馈信号对应的反馈电压，并使得所述比较器的第二输入端接收比较电压；将反馈电压和比较电压进行比较；控制所述比较器将比较所得的检测结果通过所述移出电路反馈至所述老化信息记忆体。
  8. 如权利要求7所述的方法，其特征在于，
    比较器(72)的第一输入端为正输入端，第二输入端为负输入端；
    所述将反馈电压和比较电压进行比较的过程为：
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，控制比较器(72)将比较电压与反馈电压进行比较；
    若比较器(72)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，控制比较电压增加预设值k；若比较器(72)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，控制比较电压减小预设值k；
    当比较器(72)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次控制比较电压增加1；若上一次比较的结果为0，则本次控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果；
    或者，比较器(72)的第一输入端为负输入端，第二输入端为正输入端；
    所述将反馈电压和比较电压进行比较的过程为：
    当所述行扫描驱动器(20)选通第n行各个像素单元的写入通道时，控制比较器(72)将比较电压与反馈电压进行比较；
    若比较器(72)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，控制比较电压增加预设值k；若比较器(72)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，控制比较电压减小预设值k；
    当比较器(72)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次控制比较电压增加1；若上一次比较的结果为1，则本次控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果；
    其中，K为大于0的自然数，k为大于0的自然数。
  9. 如权利要求7或8所述的方法，其用于检测发光器件阈值电压，其特征在于，
    第m列源驱动模块(321)内，所述第一数模转换器(61)连接至模拟加法器(63)，所述模拟加法器(63)通过显示信号线(44)连接至第m列驱动通道的像素单元(41)；
    所述检测模块(322)还包括电流源(73)，第m列电流源(73)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    所述控制像素单元产生反馈电压并控制第二数模转换器输出比较电压为：
    控制第m列的驱动管截止导通；
    将所述信息记忆体(13)存储的之前检测第n行、第m列像素单元(41)所得到的发光器件阈值电压的结果输出至第m列的第二数模转换器(62)，使得第m列的第二数模转换器(62)将该结果转换成电压信号；
    输出预设电流至第m列的发光器件；
    选通第n行像素单元(41)的反馈通道；
    得到的第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第m列的第二数模转换器(62)转换所得的电压。
  10. 如权利要求7或8所述的方法，其用于检测驱动管阈值电压，其特征在于，
    第m列源驱动模块(321)内，所述第一数模转换器(61)通过显示信号线(44)连接至第m列驱动通道的像素单元(41)；
    所述控制像素单元产生反馈电压并控制第二数模转换器输出比较电压为：
    将所述信息记忆体(13)存储的之前检测第n行、第m列像素单元(41)所得到的驱动管源极电压的结果通过所述第二移入电路(35)输出至第m列的第二数模转换器(62)，使得第m列的第二数模转换器(62)将该结果转换成电压信号；
    输出第二预设显示信号至第m列显示信号线，从而导通第n行、第m列像素单元(41)的驱动管和发光器件；
    选通第n行像素单元(41)的反馈通道；
    得到的第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第m列的第二数模转换器(62)转换所得的电压。
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