WO2022061831A1

WO2022061831A1 - Diode and manufacturing method therefor, receiving chip, distance measurement device, and movable platform

Info

Publication number: WO2022061831A1
Application number: PCT/CN2020/118170
Authority: WO
Inventors: 王国才; 卢栋; 郑国光
Original assignee: 深圳市大疆创新科技有限公司
Priority date: 2020-09-27
Filing date: 2020-09-27
Publication date: 2022-03-31
Also published as: CN114556533A

Abstract

The present application provides an avalanche photodiode and a manufacturing method therefor, a receiving chip, a distance measurement device, and a movable platform. The manufacturing method comprises: providing a substrate on which an epitaxial layer is formed; performing first ion implantation of a first doping type on the epitaxial layer to form a first doped layer, wherein the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the dose of the first ion implantation is 1×10¹²cm^-3-3×10¹²cm^-3; and performing second ion implantation of a second doping type on the epitaxial layer to form a second doped layer, wherein the second doped layer is located above the first doped layer, the first doping type is different from the second doping type, and the first doped layer, the second doped layer, and a region between the first doped layer and the second doped layer constitute an avalanche region of the avalanche photodiode.

Description

Diode and preparation method thereof, receiving chip, distance measuring device, and movable platform

manual

technical field

The present application generally relates to the field of integrated circuits, and more particularly, to an avalanche photodiode and a method for manufacturing the same, a receiving chip, a ranging device, and a movable platform.

Background technique

Lidar is a radar system that emits laser beams to detect the position, velocity and other characteristic quantities of targets. The photosensitive sensor of the lidar can convert the obtained optical pulse signal into an electrical signal, and obtain the time information corresponding to the electrical signal based on the comparator, thereby obtaining the distance information between the lidar and the target.

In the receiving chip of lidar, avalanche photodiode (APD), as a widely used photoelectric detection device, is notable for its ability to amplify the weak light signal inside the device through the photomultiplier effect, and the amplified signal can be It is recognized and collected by the post-stage circuit, so as to overcome the disadvantage that the traditional diode cannot effectively detect the weak light signal, and realize the detection of the weak light signal.

The current problem of APD devices is that there is a trade-off between quantum efficiency and bandwidth, or in order to achieve a trade-off between quantum efficiency and bandwidth, its fabrication process is difficult to be compatible with CMOS, which is not conducive to modern large-scale integrated fabrication.

Therefore, there is a need to improve current APD devices to overcome the above problems.

SUMMARY OF THE INVENTION

The present application has been made to solve at least one of the above-mentioned problems. A first aspect of the present application provides a preparation method of an avalanche photodiode, the preparation method comprising:

providing a substrate formed with an epitaxial layer;

A first ion implantation of a first doping type is performed on the epitaxial layer to form a first doping layer, wherein the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the first ion implantation The dose is 1×1012cm-3～3×1012cm-3;

performing a second ion implantation of a second doping type on the epitaxial layer to form a second doping layer, the second doping layer being located above the first doping layer;

Wherein, the first doping type and the second doping type are different, the first doping layer and the second doping layer and the first doping layer and the second doping layer The area in between constitutes the avalanche region of the avalanche photodiode.

A second aspect of the present application provides an avalanche photodiode, the avalanche photodiode comprising:

epitaxial layer;

an avalanche region, located in the epitaxial layer, comprising the first doped layer and the second doped layer and a region between the first doped layer and the second doped layer, wherein:

The first doping layer has a first doping type, the depth of the peak concentration of the first doping layer is greater than or equal to 2 μm, and the doping dose of the first doping layer is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 ;

The second doping layer, located above the first doping layer, has a second doping type, and the first doping type is different from the second doping type.

A third aspect of the present application provides a receiving chip, the receiving chip comprising:

The aforementioned avalanche photodiode is used to receive the optical pulse sequence reflected by the detected object, and convert the received optical pulse sequence into a current signal;

The signal processing unit is used for receiving and processing the current signal of the avalanche photodiode to output a time signal.

A fourth aspect of the present application provides a distance measuring device, the distance measuring device comprising:

Light emitting circuit for emitting light pulse sequence;

The aforementioned receiving chip is used to receive the optical pulse sequence reflected by the detected object, and output a time signal based on the received optical pulse sequence;

an arithmetic circuit for calculating the distance between the detected object and the lidar according to the time signal.

A fifth aspect of the present application provides a movable platform, the movable platform includes:

Movable platform body;

In the aforementioned distance measuring device, the distance measuring device is provided on the movable platform body.

The present application provides an avalanche photodiode and a preparation method thereof, a receiving chip, a ranging device, and a movable platform. In the structure in which the avalanche photodiode is a second doping layer-first doping layer, the depth of the peak concentration of the first ion implantation in the first doping layer is greater than or equal to 2 μm, and the first ion implantation has a depth of 2 μm or more. The implanted dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 . By adjusting the implant depth and dose of the first doped layer, the electric field strength of the avalanche region can be effectively adjusted, and the device gain and noise factor can be optimized.

In addition, due to the use of ion implantation in the present application, the first ions increase slowly between the surface of the epitaxial layer and the peak concentration. When the implantation of the first doped layer reaches a depth of more than 2um, the avalanche region will be expanded accordingly, so that in the same Under the condition of breakdown voltage, the electric field strength of the avalanche region is reduced, thereby reducing the gain and noise factor of the avalanche region.

Description of drawings

1A-1L show schematic cross-sectional views of each intermediate device in the preparation process of the avalanche photodiode provided by the present application;

FIG. 2 shows a schematic flowchart of a method for preparing an avalanche photodiode provided by the present application;

FIG. 3 shows a schematic structural diagram of the laser ranging device described in the present application.

detailed description

In order to make the objectives, technical solutions and advantages of the present application more apparent, the exemplary embodiments according to the present application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application, and it should be understood that the present application is not limited by the example embodiments described herein. Based on the embodiments of the present application described in the present application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present application.

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without one or more of these details. In other instances, some technical features known in the art have not been described in order to avoid confusion with the present application.

It should be understood that the application may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this application to those skilled in the art.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a," "an," and "the/the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the terms "compose" and/or "include", when used in this specification, identify the presence of stated features, integers, steps, operations, elements and/or components, but do not exclude one or more other The presence or addition of features, integers, steps, operations, elements, parts and/or groups. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

For a thorough understanding of the present application, detailed steps and detailed structures will be presented in the following description, so as to explain the technical solutions proposed by the present application. The preferred embodiments of the present application are described in detail below, however, the present application may have other embodiments in addition to these detailed descriptions.

As mentioned earlier, an Avalanche Photodiode (APD) is a metallurgical junction interface (PN junction) device operating in a reverse biased state. Its operating voltage is less than the junction breakdown voltage, and the device is depleted under the action of reverse bias. When excited by an external optical signal, the generated optical signal generates photo-generated carriers in the depletion region, and the photo-generated carriers are separated under the action of the external electric field and move to the anode and the cathode respectively. Under the action of the external electric field, the photogenerated carriers are accelerated. If enough energy is obtained under the action of the high electric field in the junction region, they can collide with the lattice, ionize the lattice, and generate new electron-hole pairs, thereby making the carrier The increase in the number of currents produces a multiplication effect, realizing the amplification and detection of weak signals.

The inventor found that when the adopted APD device structure has an N++/P/P+ structure, the avalanche voltage of the N++/P junction region of the structure can be obtained by the following empirical formula:

Among them, for this type of device, the higher the doping concentration of the P region, the lower the breakdown voltage and the smaller the corresponding depletion region. The quantum efficiency is proportional to the thickness of the P region. Under the condition of a certain thickness of the P region, the larger the depletion region, the faster the photo-generated carrier transfer speed. Conversely, the inability of the depletion region to deplete the entire P region leads to the existence of a neutral body region. In the neutral body region, carriers enter the depletion region by means of a diffusion process, which takes a long time and limits the bandwidth of the APD device.

Therefore, if the p-region doping concentration is high, the device of this structure requires a trade-off between quantum efficiency and bandwidth. On the other hand, the gain noise factor satisfies the following formula:

where M is the avalanche multiplier, and K is the ratio of hole collision ionization coefficient to electron collision ionization coefficient. It can be seen that in order to reduce the gain noise factor, K should be reduced, and K increases with the increase of the avalanche voltage. Therefore, an effective way to reduce the gain noise factor is to use a low-doped P epitaxial layer, which can also solve the problem of quantum efficiency and bandwidth. problem, but the price is that the breakdown voltage is too high, which increases the difficulty of practical use.

The inventors additionally found that for the N+/P/P-/P++ type APD device structure, the trade-off between quantum efficiency, breakdown voltage and bandwidth can be achieved by using different doping concentration regions; it is also possible to adjust the doping and thickness of the P region. To adjust the avalanche voltage to achieve the optimization of the gain and noise factor, but the different doping parts of this structure are generally obtained by epitaxial growth, which is not compatible with Complementary Metal Oxide Semiconductor (CMOS), which is not conducive to modern large Scale integration preparation.

It can be seen from the above that the structure of N++/P/P+ type APD device requires a trade-off among quantum efficiency, bandwidth, gain noise factor, and breakdown voltage. It is difficult to find the optimal structure for the actual structure device to meet the above indicators. At the same time, the N+/P/P-/P++ type APD device structure, although each different doped part can be obtained by epitaxial growth, is not compatible with CMOS, which is not conducive to modern large-scale integration preparation.

In order to solve the above problems, the present application provides a preparation method of an avalanche photodiode, characterized in that the preparation method includes:

providing a substrate formed with an epitaxial layer;

A first ion implantation of a first doping type is performed on the epitaxial layer to form a first doping layer, wherein the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the first ion implantation The dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 ;

The present application also provides an avalanche photodiode, the avalanche photodiode includes:

epitaxial layer;

The first doping layer has a first doping type, the depth of the peak concentration of the first doping layer is greater than or equal to 2 μm, and the doping dose of the doping layer is 1×10 ¹² cm ⁻³ ~3×10 ¹² cm ^-3 ;

The present application provides an avalanche photodiode and a preparation method thereof, a receiving chip, a ranging device, and a movable platform. In the structure in which the avalanche photodiode is a second doping layer-first doping layer, the depth of the peak concentration of the first ion implantation in the first doping layer is greater than or equal to 2 μm, and the first ion implantation has a depth of 2 μm or more. The implanted dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 . By adjusting the implant depth and dose of the first doping layer, the electric field strength of the avalanche region can be effectively adjusted, and the optimization of the device gain and noise factor can be achieved.

Example 1

In order to solve the technical problems mentioned above, the present application also provides a preparation method of an avalanche photodiode, as shown in FIG. 2 , the preparation method specifically includes the following steps:

Step S1: providing a substrate formed with an epitaxial layer;

Step S2 : performing a first ion implantation of a first doping type on the epitaxial layer to form a first doping layer, wherein the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the first ion implantation has a depth of 2 μm or more. The dose of one ion implantation is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 ;

Step S3: performing a second ion implantation of a second doping type on the epitaxial layer to form a second doping layer, the second doping layer being located above the first doping layer;

The preparation method will be described in detail below with reference to FIGS. 1A-1L, wherein FIGS. 1A-1L show schematic cross-sectional views of each intermediate device in the process of preparing the avalanche photodiode provided by the present application.

In the step S1, as shown in FIG. 1A, a substrate 101 having an epitaxial layer 102 is provided, wherein the substrate 101 may be at least one of the following materials: silicon, silicon-on-insulator ( SOI), silicon on insulator (SSOI), silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), germanium on insulator (GeOI), etc.

In an embodiment of the present application, the substrate 101 is made of silicon.

The epitaxial layer 102 can be made of semiconductor material, and in an embodiment of the present application, an epitaxial silicon wafer is selected.

The thickness of the epitaxial layer 102 is approximately 60 μm, and the thickness of the epitaxial layer 102 is not limited to a certain value range.

The epitaxial layer 102 is a silicon layer with an incident wavelength of 850 nm to 940 nm. For example, in an embodiment of the present application, the incident wavelength of the epitaxial layer is 905 nm. The light absorption coefficient in the range is small to improve the light transmittance.

The epitaxial layer 102 includes a first surface and a second surface disposed opposite to each other, the second surface of the epitaxial layer 102 is disposed on the substrate 101, and the first surface of the epitaxial layer 102 is far away from the substrate Bottom 101. Wherein, the first surface is a front surface, and the second surface is a back surface.

In an embodiment of the present application, the avalanche photodiode may be a back-illuminated device or a front-illuminated device, and is not limited to any one.

When the avalanche photodiode can be a back-illuminated device, that is, in the back-illuminated device where the photosensitive device APD is located in front of the circuit transistor, light first enters the photosensitive device APD, thereby increasing the photosensitive amount. In this application, the APD is formed on the first surface of the epitaxial layer 102 , that is, the front surface of the epitaxial layer 102 , and the light is taken in from the back surface of the epitaxial layer 102 , that is, the light enters from the second surface of the epitaxial layer 102 .

Optionally, the epitaxial layer 102 has a low doping type, and the doping type may be N-type or P-type. Generally, the epitaxial layer 102 is P-type doped.

In the present application, setting the epitaxial layer 102 to a low-doped type can reduce the consumption of photogenerated carriers in the APD, thereby quickly reaching the avalanche collection area of the APD, and improving the corresponding speed of the APD, Avoid the tailing problem of APD and avoid the delay of the device.

Wherein, the substrate 101 is a heavily doped substrate, and the heavily doped substrate can be used as an electrode in the subsequent steps, thereby leading out the signal of the avalanche photodiode. The doping concentration of the substrate is 5×10 ¹⁸ /cm ³ to 5×10 ²⁰ /cm ³ .

In the step S2, a first ion implantation of a first doping type is performed on the epitaxial layer 102 to form a first doping layer 109, as shown in FIG. 1C, in the present application, by adjusting the first doping The implantation depth and dose of the layer 109 can adjust the electric field strength of the avalanche region to realize the optimization of the device gain and noise factor.

Specifically, before performing the first ion implantation, the method further includes the step of forming a protective layer 103 on the surface of the epitaxial layer 102 , as shown in FIG. 1A .

Wherein, the protective layer 103 can be selected from conventional oxides, for example, silicon oxide can be selected. The thickness of the protective layer 103 is 10-30 nm. The protective layer 103 is formed before the ion implantation is performed to reduce the damage to the surface lattice during the ion implantation.

In one embodiment, the thickness of the protective layer 103 is about 10 nm, and the thickness of the protective layer 103 is not limited to a certain value range.

During the first ion implantation, the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the dose of the first ion implantation is 1×10 ¹² cm ⁻³ to 3×10 ¹² cm ^{− 3.} When the first ion is implanted to a depth of more than 2um, the avalanche region will be expanded accordingly, thereby reducing the electric field strength of the avalanche region under the same breakdown voltage, thereby reducing the gain and noise factor of the avalanche region.

The first ion implantation is P-type ion implantation. In an embodiment of the present application, the P-type ions are B ions.

In the present application, due to the ion implantation method, the concentration of the first ions increases slowly between the surface of the epitaxial layer 102 and the peak concentration, that is, P++/P-- can be realized on the epitaxial layer 102 by one ion implantation. /P++ structure.

Specifically, the energy of the first ion implantation is 1200keV˜1600keV.

The included angle between the direction of the first ion implantation and the plane perpendicular to the surface of the epitaxial layer 102 is 0°-10°. Wherein, the distribution of doping impurities after the ion implantation is controlled by controlling the direction of the first ion implantation, for example, the angle between the direction of the first ion implantation and the plane perpendicular to the surface of the epitaxial layer 102 When it is between 0 degrees and 10 degrees, the concentration of doping impurities will gradually increase after the first ion implantation, and will reach a peak value, so that the electric field distribution of the prepared avalanche photodiode is more uniform, and the absorption rate of the avalanche region is improved. higher.

In an embodiment of the present application, when the crystal orientation of the epitaxial layer 102 is 100, the angle between the direction of the first ion implantation and a plane perpendicular to the surface of the epitaxial layer 102 is 0 degrees.

In another embodiment of the present application, when the crystal orientation of the epitaxial layer 102 is 111, the angle between the direction of the first ion implantation and a plane perpendicular to the surface of the epitaxial layer is 7 degrees.

In the step S3, as shown in FIG. 1E, a second ion implantation of a second doping type is performed on the epitaxial layer 102 to form a second doping layer 108, and the second doping layer 108 is located in the above the first doped layer 109 .

Wherein, the first doped layer 109 and the second doped layer 108 and the region between the first doped layer 109 and the second doped layer 108 constitute the avalanche region of the avalanche photodiode .

Specifically, the first doping type is different from the second doping type, wherein the first ion implantation is P-type, and the second ion implantation is N-type, in an embodiment of the present application , the second ion implantation is P (phosphorus) ion or As ion.

In an embodiment of the present application, the top of the epitaxial layer 102 is the second doped layer 108 , the lower part is the first doped layer 109 , and a transition region between the two, such as the first doped layer 109 . The P- under the second doped layer 108, the P+ layer with increasing concentration, and the epitaxial layer 102 further form the N++/P-/P+/P++/P--/P++ structure of the avalanche photodiode.

Optionally, an absorbing layer and the like may be further included below the avalanche region, which will not be repeated here.

The depth of the peak concentration of the second ion implantation is less than or equal to 200 nm, and in one embodiment of the present application, the depth of the peak concentration of the second ion implantation is 100 nm.

Wherein, the dose of the second ion implantation is 1×10 ¹⁴ cm ⁻³ to 1×10 ¹⁵ cm ⁻³ ; the energy of the second ion implantation is 20keV˜100keV, so as to form the second doping layer 108 .

After the second ion implantation, the preparation method further includes: performing a rapid annealing step, the temperature of the rapid annealing is 900 degrees Celsius to 1150 degrees Celsius, and the time is 10s to 60s, for activating the implanted ions and eliminating ion implantation defects .

Before performing the second ion implantation of the second doping type, the method further includes:

A guard ring 105 is formed in the epitaxial layer 102 , as shown in FIG. 1B , and in the subsequent second ion implantation step, the second ion implantation is performed in the guard ring 105 to form a The second doped layer 108 (as shown in FIG. 1E ) surrounded by the guard ring 105 is formed by forming the guard ring 105 to prevent edge breakdown, thereby further improving the yield and performance of the device.

The step of forming the guard ring 105 may be before the first ion implantation of the first doping type, or after the first ion implantation of the first doping type and after the second doping type The type of second ion implantation can be selected according to actual needs.

In an embodiment of the present application, the guard ring 105 is formed before the first ion implantation of the first doping type.

Specifically, the method for forming the guard ring 105 includes:

As shown in FIG. 1B , a patterned mask layer 104 is formed on the epitaxial layer 102 to expose the area where the guard ring 105 is to be formed;

In an embodiment of the present application, a photoresist layer is formed on the epitaxial layer as the mask layer 107, and then the photoresist layer is exposed and developed to expose the guard ring to be formed Area.

As shown in FIG. 1B , a third ion implantation of the second doping type is performed using the mask layer 104 as a mask to form the guard ring 105 in the exposed region.

Wherein, the second doping type is N-type, and the third ion implantation is P (phosphorus) ion or As ion. In an embodiment of the present application, the third ion implantation is P (phosphorus) ions. Compared with As ions, P (phosphorus) ions have smaller ions and deeper implantation depths, and have better protection effects.

Wherein, the third ion implantation is implemented by means of multiple ion implantation, and the multiple ion implantation can make the distribution of ions after implantation more uniform and have better protection effect.

Specifically, the energy of the third ion implantation is 20keV˜800keV, and the dose of the third ion implantation is 1×10 ¹² cm ⁻³ to 4×10 ¹² cm ⁻³ .

The depth of the guard ring 105 is greater than or equal to 2 μm.

After the ion implantation, low temperature annealing is performed, wherein the annealing temperature is 800-1000 degrees Celsius for 1-30 minutes to diffuse the implanted phosphorus ions in the guard ring 105 region to activate the ions and eliminate defects.

Wherein, the annealing time is within 30min, so as to be more compatible with the CMOS process.

The depth of the guard ring 105 is greater than or equal to 2 μm.

In the present application, the annealing temperature is kept below 1000 degrees Celsius, which can prevent the high-concentration doping of the substrate 101 from diffusing into the epitaxial layer 102, and avoid affecting the electric field distribution during avalanche of the epitaxial layer through diffusion, resulting in tailing of the photoresponse.

After the guard ring 105 is formed, the mask layer 104 is removed.

In another embodiment of the present application, the method for forming the guard ring 105 may further include the following steps:

Before the second ion implantation, the epitaxial layer 102 is etched to form a trench; wherein the depth of the trench is greater than or equal to 2 μm.

The trench is then filled to form the guard ring 105 to perform the second ion implantation within the guard ring 105 and to form the second doped layer 108 surrounded by the guard ring 105 .

The avalanche layer of the avalanche photodiode described in the present application can be formed through the above steps, and the electric field strength of the avalanche region can be effectively adjusted by adjusting the implantation depth and dose of the first doped layer, so as to realize the optimization of the device gain and noise factor.

The fabrication process of other structures of the avalanche photodiode will be described in detail below. As shown in FIG. 1D , after forming the guard ring 105 , the method further includes the step of forming the first electrode 106 .

Wherein, the formation method of the first electrode 106 includes:

A mask layer is formed again on the epitaxial layer 102 to expose the region where the first electrode 106 is to be formed at the edge of the epitaxial layer 102 , and then the first doping type is performed on the exposed edge region of the epitaxial layer 102 . Four ions are implanted to form the first electrode 106 outside the guard ring 105 .

In an embodiment of the present application, the first electrode 106 is formed by B ion implantation for electrical connection and isolation between pixels.

In an embodiment of the present application, after all the ion implantation steps are performed, the method further includes the step of removing the protective layer 103 .

In an embodiment of the present application, after forming the second doping layer 108 , the method further includes the step of forming a cut-off ring 112 , as shown in FIG. 1G , wherein the cut-off ring 112 has a thickness of generally Above 500 nm, the cut-off ring 112 with this thickness can prevent the second doped layer 108 from being pressurized below the cut-off ring 112 corresponding to the voltage region to form an inversion layer, resulting in conduction between the second doped layer 108 and the first electrode 106 .

In addition, the cut-off ring 112 can also be used to neutralize the surface state of the epitaxial layer 102 to further prevent the conduction between the second doped layer 108 and the first electrode 106 .

Specifically, in an embodiment of the present application, the method for forming the cut-off ring 112 specifically includes the following steps:

As shown in FIG. 1F , a cut-off ring material layer is formed on the second surface of the epitaxial layer 102 to cover the epitaxial layer 102 and various devices formed on the surface thereof;

The stop ring material layer is then patterned to form a stop ring 112 between the guard ring 105 and the first electrode 106 .

Specifically, the region where the cut-off ring 112 needs to be retained is defined by a photolithography process. After the photolithography is completed, the silicon oxide that does not need to be retained is removed by etching to form the cut-off ring 112 , as shown in FIG. 1G .

Wherein, the material of the cut-off ring 112 may be silicon oxide, but is not limited to this material.

After the cut-off ring 112 is formed in the present application, the method further includes the step of forming an anti-reflection layer 113 , by forming the anti-reflection layer 113 to further increase the transmittance of light, reduce the reflection of light, and further improve the device performance.

Wherein, the anti-reflection layer 113 can be selected from silicon nitride or silicon oxide.

Optionally, the method for forming the antireflection layer 113 includes the following steps:

As shown in FIG. 1H , an antireflection layer 113 is formed on the epitaxial layer 102 , wherein the antireflection layer 113 covers the epitaxial layer 102 and the devices on the surface thereof;

The anti-reflection layer 113 is patterned to form a first opening and expose the first electrode 106 and the second doped layer 108 for forming electrical connections in subsequent steps.

In another embodiment, the preparation method of the anti-reflection layer 113 may also be to form the anti-reflection layer 113 while forming the cut-off ring 112 . In this embodiment, the anti-reflection layer 113 is made of silicon nitride. .

Specifically, the preparation method of the antireflection layer 113 may further include the following steps:

forming the stop ring material layer on the epitaxial layer 102;

The cut-off ring material layer is thinned to form the antireflection layer 113. In this step, the cut-off ring material layer can be thinned differently. The thickness reserved in other areas is thinner;

Finally, the anti-reflection layer 113 is patterned to form a first opening and expose the first electrode 106 and the second doped layer 108, as shown in FIG. 1I.

In this application, the preparation method also includes:

A first electrode contact layer 115 is formed on the exposed first electrode 106 to form an electrical connection with the first electrode 106 , and a second electrode contact layer 114 is formed on the second doped layer 108 to form an electrical connection with the first electrode 106 . An electrical connection is formed on the second doped layer 108 . As shown in Figure 1J.

Wherein, the first electrode contact layer 115 and the second electrode contact layer 114 are conductive metals to form electrical connections, wherein the conductive metals may be aluminum or copper, but are not limited to this example.

Further, in this application, as shown in Figure 1K, the method further includes:

forming a passivation layer 116 on the epitaxial layer 102;

The passivation layer 116 is patterned to form a second opening and expose the first electrode contact layer 115 , the second electrode contact layer 114 and the antireflection layer 113 , as shown in FIG. 1L .

When the avalanche photodiode is a second doped layer-first doped layer structure, the depth of the peak concentration of the first ion implantation of the first doped layer is greater than or equal to 2 μm, and the first ion implantation The dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 . By adjusting the implantation depth and dose of the first doping layer, the electric field strength of the avalanche region can be effectively adjusted, and the device gain and noise factor can be optimized.

In addition, due to the ion implantation method used in this application, the first ions increase slowly between the surface of the epitaxial layer and the peak concentration. When the implantation of the first doping layer reaches a depth of more than 2um, the avalanche region will be expanded accordingly, so that in the same Under the condition of breakdown voltage, the electric field strength of the avalanche region is reduced, thereby reducing the gain and noise factor of the avalanche region.

Embodiment 2

In order to solve the above problems, the present application provides an avalanche photodiode, as shown in FIG. 1L, the avalanche photodiode includes:

epitaxial layer 102;

The avalanche region, located in the epitaxial layer, includes the first doping layer 109 and the second doping layer 108 and the region between the first doping layer 109 and the second doping layer 108 ,in:

The first doping layer 109 has a first doping type, the depth of the peak concentration of the first doping layer 109 is greater than or equal to 2 μm, and the doping dose of the first doping layer 109 is 1× 10 ¹² cm ^-3 ～3×10 ¹² cm ^-3 ;

The second doping layer 108, located above the first doping layer 109, has a second doping type, and the first doping type is different from the second doping type.

In an embodiment of the present application, the avalanche photodiode further includes a substrate 101, wherein the substrate 101 may be at least one of the following materials: silicon, silicon-on-insulator (SOI), Silicon on insulator (SSOI), silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), germanium on insulator (GeOI), etc.

Wherein, the substrate 101 is a heavily doped substrate, and the heavily doped substrate can be used as an electrode in the subsequent steps, thereby leading out the signal of the avalanche photodiode.

Optionally, the doping concentration of the substrate is 5×10 ¹⁸ /cm ³ to 5×10 ²⁰ /cm ³ .

The epitaxial layer 102 is a silicon layer with an incident wavelength of 850 nm to 940 nm. For example, in an embodiment of the present application, the incident wavelength of the epitaxial layer 102 is 905 nm.

In the present application, the electric field strength of the avalanche region is adjusted by adjusting the implantation depth and dose of the first doped layer 109, so as to realize the optimization of the device gain and noise factor. Specifically, the depth of the peak concentration of the first doped layer 109 is greater than or equal to 2 μm, and the dose of ion implantation of the first doped layer 109 is 1×10 ¹² cm ⁻³ to 3×10 ¹² cm ^{− 3.} The actual test results show that when the first doped layer 109 is implanted to a depth of more than 2um, the avalanche region will be expanded accordingly, thereby reducing the electric field strength of the avalanche region under the same breakdown voltage, thereby reducing the avalanche region. Gain noise factor size.

In the present application, since the first doped layer 109 is formed by ion implantation, the concentration of the first ions increases slowly between the surface of the epitaxial layer 102 and the peak concentration, that is, the epitaxial layer can be realized by one ion implantation. Layer 102 implements the P++/P--/P++ structure.

Specifically, the energy injected into the first doped layer 109 is 1200keV˜1600keV.

The first doped layer 109 is formed by first ion implantation, and the included angle between the direction of the first ion implantation and a plane perpendicular to the surface of the epitaxial layer 102 is 0°-10°. Wherein, the distribution of doping impurities after the ion implantation is controlled by controlling the direction of the first ion implantation, for example, the angle between the direction of the first ion implantation and the plane perpendicular to the surface of the epitaxial layer 102 When it is between 0 degrees and 10 degrees, the concentration of doping impurities will gradually increase after the first ion implantation, and will reach a peak value, so that the electric field distribution of the prepared avalanche photodiode is more uniform, and the absorption rate of the avalanche region is improved. higher.

Wherein, the second doped layer 108 is located above the first doped layer 109 . The first doped layer 109 and the second doped layer 108 and the region between the first doped layer 109 and the second doped layer 108 constitute the avalanche region of the avalanche photodiode.

In an embodiment of the present application, the top of the epitaxial layer 102 is the second doped layer 108 , the lower part is the first doped layer 109 , and a transition region between the two, such as the first doped layer 109 . The P- under the second doping layer 108, the P+ layer with increasing concentration, and the epitaxial layer further form the N++/P-/P+/P--/P++ structure of the avalanche photodiode.

Wherein, the depth of the peak concentration of the second doping layer 108 is less than or equal to 200 nm, and in one embodiment of the present application, the depth of the peak concentration of the second doping layer 108 is 100 nm.

Wherein, the implantation dose of the second doped layer 108 is 1×10 ¹⁴ cm ^{−3 ˜1} ×10 ¹⁵ cm ⁻³ ; the implantation energy of the second doped layer 108 is 20 keV˜100 keV.

After the second doped layer 108 is formed by the second ion implantation, a rapid annealing step may be performed. The temperature of the rapid annealing is 900 degrees Celsius to 1150 degrees Celsius and the time is 10s to 60s to activate the implanted ions and eliminate the Ion implantation defects.

Optionally, the avalanche photodiode includes: the guard ring 105 located in the epitaxial layer 102 , and the guard ring 105 surrounds the second doped layer 108 .

In the preparation process, a guard ring 105 is first formed in the epitaxial layer 102 , and in the subsequent second ion implantation step, the second ion implantation is performed in the guard ring 105 to form the guard ring 105 . The second doped layer 108 surrounded by the guard ring 105 is formed by forming the guard ring 105 to prevent edge breakdown, thereby further improving the yield and performance of the device.

The guard ring 105 is formed by ion implantation; or the guard ring 105 includes a groove and a filling material in the groove.

Specifically, the method for forming the guard ring 105 includes: forming a patterned mask layer on the epitaxial layer 102 to expose the area where the guard ring 105 is to be formed; A third ion implantation of the second doping type forms the guard ring 105 in the exposed area.

The depth of the guard ring 105 is greater than or equal to 2 μm.

Before the second ion implantation, the epitaxial layer 102 is etched to form a trench; wherein the depth of the trench is greater than or equal to 2 μm. The trench is then filled to form the guard ring 105 to perform the second ion implantation within the guard ring 105 and to form the second doped layer surrounded by the guard ring.

The avalanche photodiode further includes a first electrode, and the first electrode 106 is located in the region of the edge of the epitaxial layer.

The avalanche photodiode further includes a cut-off ring 112 formed on the surface of the epitaxial layer 102 between the guard ring 105 and the first electrode 106 .

The thickness of the cut-off ring 112 is generally more than 500 nm. By setting the cut-off ring 112 with this thickness, the second doping layer 108 can be prevented from being pressurized below the cut-off ring 112 corresponding to the voltage region to form an inversion layer, resulting in the second doping The layer 108 and the first electrode 106 are conductive.

The avalanche photodiode further includes an anti-reflection layer 113, the anti-reflection layer 113 is located on the epitaxial layer 102 and covers the surface of the epitaxial layer 102 and the cut-off ring 112, wherein the anti-reflection layer 113 There is a first opening located above the first electrode 106 and the second doped layer 108 . By arranging the anti-reflection layer 113, the transmittance of light is further increased, the reflection of light is reduced, and the performance of the device is improved.

The avalanche photodiode further includes a first electrode contact layer 115 and a second electrode contact layer 114 , wherein a first electrode contact layer 115 is formed on the exposed first electrode 106 to communicate with the first electrode 106 An electrical connection is formed while a second electrode contact layer 114 is formed on the second doped layer 108 to form an electrical connection with the second doped layer 108 .

The avalanche photodiode further includes 116 formed on the epitaxial layer 102;

The passivation layer 116 has a second opening and exposes the first electrode contact layer 115 , the second electrode contact layer 114 and the antireflection layer 113 .

When the avalanche photodiode is a second doped layer-first doped layer structure, the depth of the peak concentration of the first ion implantation of the first doped layer is greater than or equal to 2 μm, and the first ion implantation The dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 . By adjusting the implant depth and dose of the first doping layer, the electric field strength of the avalanche region can be effectively adjusted, and the optimization of the device gain and noise factor can be achieved. When the first doped layer is implanted to a depth of more than 2um, the avalanche region will be expanded accordingly, thereby reducing the electric field strength of the avalanche region under the same breakdown voltage, thereby reducing the gain and noise factor of the avalanche region.

Embodiment 3

The present application also provides a receiving chip, wherein the receiving chip includes:

The avalanche photodiode may be included on an avalanche photodiode chip, the signal processing unit may be included on a signal processing unit chip, and the avalanche photodiode and the processing unit may be electrically connected to transmit the current signal. to the signal processing unit for processing. Among them, when the avalanche photodiode chip and the signal processing chip are electrically connected, the avalanche photodiode chip and the signal processing chip are stacked up and down, and connected in the form of vertical interconnection, such as connecting bumps (copper pillars) to connecting bumps (copper pillars), Connecting bumps (copper pillars) to an interposer (including a through-silicon via interconnect structure penetrating the upper and lower surfaces of the interposer and a conductive layer on the upper and lower surfaces of the interposer and electrically connected to the through-silicon via interconnect structure) , to avoid the problem of light blocking or mutual interference caused by the way of line connection. At the same time, this connection method is more conducive to miniaturized design. For example, the connection bump can be 50μm in diameter and 100μm in pitch, which can avoid the current solder balls and connection pads. It is difficult to make it small (minimum 200μm) and it is easy to break the circuit, and the height of the connection bump can be more than 100μm, the tensile strength is increased, and the reliability can be effectively improved.

The signal processing unit integrates a plurality of circuits. In an embodiment of the present application, for example, the signal processing unit integrates a transimpedance amplifier circuit (TIA circuit), a multi-stage operational amplifier OPA, a comparator, and a time-to-digital converter (time-to-digital converter). A circuit converted into a digital signal) or an analog-to-digital conversion circuit (ADC circuit), and a subsequent data processing circuit (DSP circuit). Among them, the TIA circuit is an analog front-end circuit that converts the APD photocurrent into a voltage.

Wherein, the avalanche photodiode needs an external high-voltage power supply when converting an optical signal into a current signal, and the APD can provide a stable internal gain and improve the signal-to-noise ratio to output a current signal.

In the signal processing unit, the TIA circuit is electrically connected to the avalanche photodiode, the TIA circuit converts the current signal of the APD into a voltage signal, and provides a conversion gain at the same time; a multi-stage operational amplifier OPA and the TIA circuit The electrical connection is used to amplify the signal output by the TIA circuit to meet the comparison amplitude requirement of the comparator. The comparator is electrically connected to the multi-stage operational amplifier OPA, wherein a comparison threshold is set in the comparator to trigger the analog signal, convert the analog signal into a digital signal, and transmit the signal to the TDC circuit, and the TDC circuit is used to convert the analog signal into a digital signal. The digital signal is converted to a time signal for distance calculation. Wherein, for multiple signal processing units, one TDC circuit may be shared, that is, the number of signal processing units may not correspond to the number of TDC circuits.

A storage system may be further provided in the signal processing unit to cache data, provide input and output buffer space for the interface, and provide space for internal calculation.

An interface can be further set in the signal processing unit to serve as a data input and output channel to output the measurement data.

In a specific embodiment of the present application, the first input terminal of the comparator is used to receive the electrical signal input from the amplifiers across the group, that is, the electrical signal after the amplification operation, and the second input terminal of the comparator is used to receive the preset Threshold, the output end of the comparator is used to output the result of the comparison operation, wherein the result of the comparison operation includes time information corresponding to the electrical signal. It can be understood that the preset threshold value received by the second input end of the comparator may be an electrical signal whose intensity is the preset threshold value. The result of the comparison operation may be a digital signal corresponding to the electric signal after the amplification operation.

Optionally, the time-to-digital converter (Time-to-Digital Converter, TDC) is electrically connected to the output end of the comparator, and is used for extracting time information corresponding to the electrical signal according to the result of the comparison operation output by the comparator.

The receiving chip adopts the avalanche photodiode provided in this application. When the avalanche photodiode is a second doped layer-first doped layer structure, the depth of the peak concentration of the first ion implantation of the first doped layer is greater than or equal to 2 μm, and the first ion implantation The dose is 1×10 ¹² cm ^-3 to 3×10 ¹² cm ^-3 . By adjusting the implantation depth and dose of the first doped layer, the electric field strength of the avalanche region can be effectively adjusted, and the optimization of the gain noise factor of the receiving chip can be realized.

Embodiment 4

The present application also provides a ranging device. The avalanche photodiodes or receiving chips provided in the various embodiments of the present application can be applied to the ranging device, and the ranging device can be an electronic device such as a laser radar or a laser ranging device. In one embodiment, the ranging device is used to sense external environmental information, for example, distance information, orientation information, reflection intensity information, speed information and the like of environmental objects. In an implementation manner, the ranging device can detect the distance from the detected object to the ranging device by measuring the time of light propagation between the ranging device and the detected object, that is, Time-of-Flight (TOF). Alternatively, the ranging device can also detect the distance from the detected object to the ranging device through other technologies, such as a ranging method based on phase shift measurement, or a ranging method based on frequency shift measurement. This does not limit.

The distance measuring device of the present application includes the avalanche photodiode provided in the foregoing embodiments, where the avalanche photodiode is a second doped layer-first doped layer structure, and the first doped layer The depth of the peak concentration of ion implantation is greater than or equal to 2 μm, and the dose of the first ion implantation is 1×10 ¹² cm ⁻³ to 3×10 ¹² cm ⁻³ . By adjusting the implant depth and dose of the first doped layer It can effectively adjust the electric field strength in the avalanche region and realize the optimization of the gain and noise factor of the receiving chip.

The ranging device may be a mechanical rotating laser radar or a solid-state laser radar: in the mechanical rotating laser radar, mechanical rotation is used to change the optical path to scan; the solid-state laser radar can be directly transmitted in a short time A pulsed laser that can cover the detection area is generated, and then a highly sensitive area array receiving chip is used to receive the echo signal, and the detection and perception of the distance information of the surrounding environment are completed by a mode similar to the camera taking pictures.

The following describes in detail that the ranging device is a mechanical rotating laser radar. For ease of understanding, the working process of ranging by the ranging device is described as an example below.

The ranging device may include a transmitting circuit, a receiving chip and an arithmetic circuit. Wherein, the receiving chip includes the aforementioned avalanche photodiode and a signal processing unit.

Wherein, in the signal processing unit, each signal processing unit may be provided with a transimpedance amplifier circuit (TIA circuit) independently, wherein the time-to-digital converter (TDC) may be provided independently, and a plurality of transimpedance amplifier circuits ( TIA circuits) share one of the time-to-digital converters (TDCs), and the time-to-digital converters (TDCs) can switch to different channels to receive and process signals from the transimpedance amplifier circuits (TIA circuits).

Wherein, the operation circuit may also be set independently or a plurality of the signal processing units may share one of the operation circuit.

The transmit circuit may transmit a sequence of optical pulses (eg, a sequence of laser pulses). The receiving chip can receive the optical pulse sequence reflected by the detected object, and output a time signal based on the received optical pulse sequence. The arithmetic circuit may determine the distance between the distance measuring device and the detected object based on the time signal.

Optionally, the distance measuring device may further include a control circuit, which can control other circuits, for example, can control the working time of each circuit and/or set parameters for each circuit.

In some implementation manners, the ranging device may further include a scanning module, configured to change the propagation direction of at least one laser pulse sequence emitted from the transmitting circuit to emit.

Wherein, a module including a transmitting circuit, a receiving chip, and an arithmetic circuit, or a module including a transmitting circuit, a receiving chip, an arithmetic circuit, and a control circuit may be called a ranging module, and the ranging module may be independent of other modules, for example, Scan module.

A coaxial optical path may be used in the ranging device, that is, the light beam emitted by the ranging device and the reflected light beam share at least part of the optical path in the ranging device. For example, after at least one laser pulse sequence emitted by the transmitting circuit changes its propagation direction through the scanning module, the laser pulse sequence reflected by the detection object passes through the scanning module and then enters the receiver. Alternatively, the distance-measuring device may also adopt an off-axis optical path, that is, the light beam emitted by the distance-measuring device and the reflected light beam are respectively transmitted along different optical paths in the distance-measuring device. FIG. 3 shows a schematic diagram of an embodiment in which the distance measuring device of the present application adopts a coaxial optical path.

The ranging device 200 includes a ranging module 210, and the ranging module 210 includes a transmitter 203 (which may include the above-mentioned transmitting circuit), a collimating element 204, and a detector 205 (the receiving chip may include the detector 205, and the detector includes the above-described avalanche photodiode) and optical path changing element 206. The ranging module 210 is used for emitting a light beam, receiving the returning light, and converting the returning light into an electrical signal. Among them, the transmitter 203 can be used to transmit a sequence of optical pulses. In one embodiment, the transmitter 203 may emit a sequence of laser pulses. Optionally, the laser beam emitted by the transmitter 203 is a narrow bandwidth beam with a wavelength outside the visible light range. The collimating element 204 is disposed on the outgoing light path of the transmitter, and is used for collimating the light beam emitted from the transmitter 203, and collimating the light beam emitted by the transmitter 203 into parallel light and outputting to the scanning module. The collimating element also serves to converge at least a portion of the return light reflected by the probe. The collimating element 204 may be a collimating lens or other elements capable of collimating light beams.

In the embodiment shown in FIG. 3 , the transmitting optical path and the receiving optical path in the ranging device are combined by the optical path changing element 206 before the collimating element 204, so that the transmitting optical path and the receiving optical path can share the same collimating element, so that the optical path more compact. In some other implementations, the emitter 203 and the detector 205 may use respective collimating elements, and the optical path changing element 206 may be arranged on the optical path behind the collimating element.

In the embodiment shown in FIG. 3 , since the beam aperture of the light beam emitted by the transmitter 203 is relatively small, and the beam aperture of the return light received by the ranging device is relatively large, the optical path changing element can use a small-area reflective mirror to The transmit light path and the receive light path are combined. In some other implementations, the optical path changing element may also use a reflector with a through hole, wherein the through hole is used to transmit the outgoing light of the emitter 203 , and the reflector is used to reflect the return light to the detector 205 . In this way, in the case of using a small reflector, the occlusion of the return light by the support of the small reflector can be reduced.

In the embodiment shown in FIG. 3 , the optical path changing element is offset from the optical axis of the collimating element 204 . In some other implementations, the optical path altering element may also be located on the optical axis of the collimating element 204 .

The ranging device 200 further includes a scanning module 202 . The scanning module 202 is placed on the outgoing optical path of the ranging module 210 . The scanning module 202 is used to change the transmission direction of the collimated beam 219 emitted by the collimating element 204 and project it to the external environment, and project the return light to the collimating element 204 . The returned light is focused on the detector 205 through the collimating element 204 .

In one embodiment, the scanning module 202 can include at least one optical element for changing the propagation path of the light beam, wherein the optical element can change the propagation path of the light beam by reflecting, refracting, diffracting the light beam, or the like. For example, the scanning module 202 includes lenses, mirrors, prisms, gratings, liquid crystals, optical phased arrays (Optical Phased Array) or any combination of the above optical elements. In one example, at least part of the optical elements are moving, for example, the at least part of the optical elements are driven to move by a driving module, and the moving optical elements can reflect, refract or diffract the light beam to different directions at different times. In some embodiments, the multiple optical elements of the scanning module 202 may be rotated or oscillated about a common axis 209, each rotating or oscillating optical element being used to continuously change the propagation direction of the incident beam. In one embodiment, the plurality of optical elements of the scanning module 202 may rotate at different rotational speeds, or vibrate at different speeds. In another embodiment, at least some of the optical elements of scan module 202 may rotate at substantially the same rotational speed. In some embodiments, the plurality of optical elements of the scanning module may also be rotated about different axes. In some embodiments, the plurality of optical elements of the scanning module may also rotate in the same direction, or rotate in different directions; or vibrate in the same direction, or vibrate in different directions, which are not limited herein.

In one embodiment, the scanning module 202 includes a first optical element 214 and a driver 216 connected to the first optical element 214, and the driver 216 is used to drive the first optical element 214 to rotate around the rotation axis 209, so that the first optical element 214 changes The direction of the collimated beam 219. The first optical element 214 projects the collimated beam 219 in different directions. In one embodiment, the angle between the direction of the collimated light beam 219 changed by the first optical element and the rotation axis 209 changes as the first optical element 214 rotates. In one embodiment, the first optical element 214 includes a pair of opposing non-parallel surfaces through which the collimated beam 219 passes. In one embodiment, the first optical element 214 includes a prism whose thickness varies along at least one radial direction. In one embodiment, the first optical element 214 includes a wedge prism that refracts the collimated light beam 219 .

In one embodiment, the scanning module 202 further includes a second optical element 215 , the second optical element 215 rotates around the rotation axis 209 , and the rotation speed of the second optical element 215 is different from the rotation speed of the first optical element 214 . The second optical element 215 is used to change the direction of the light beam projected by the first optical element 214 . In one embodiment, the second optical element 215 is connected to another driver 217, and the driver 217 drives the second optical element 215 to rotate. The first optical element 214 and the second optical element 215 can be driven by the same or different drivers, so that the rotational speed and/or steering of the first optical element 214 and the second optical element 215 are different, thereby projecting the collimated beam 219 into the external space Different directions can scan a larger spatial range. In one embodiment, the controller 218 controls the

drivers

216 and 217 to drive the first optical element 214 and the second optical element 215, respectively. The rotational speeds of the first optical element 214 and the second optical element 215 may be determined according to the area and pattern expected to be scanned in practical applications.

Drives

216 and 217 may include motors or other drives.

In one embodiment, the second optical element 215 includes a pair of opposing non-parallel surfaces through which the light beam passes. In one embodiment, the second optical element 215 comprises a prism whose thickness varies along at least one radial direction. In one embodiment, the second optical element 215 comprises a wedge prism.

In one embodiment, the scanning module 202 further includes a third optical element (not shown) and a driver for driving the movement of the third optical element. Optionally, the third optical element includes a pair of opposing non-parallel surfaces through which the light beam passes. In one embodiment, the third optical element comprises a prism of varying thickness along at least one radial direction. In one embodiment, the third optical element comprises a wedge prism. At least two of the first, second and third optical elements rotate at different rotational speeds and/or rotations.

The rotation of each optical element in the scanning module 202 can project light in different directions, such as the direction 213 , so as to scan the space around the ranging device 200 . As shown in FIG. 4 , FIG. 4 is a schematic diagram of a scanning pattern of the distance measuring device 200 . It can be understood that when the speed of the optical element in the scanning module changes, the scanning pattern also changes accordingly.

When the light 211 projected by the scanning module 202 hits the detected object 201 , a part of the light is reflected by the detected object 201 to the distance measuring device 200 in a direction opposite to the projected light 211 . The returning light 212 reflected by the probe 201 passes through the scanning module 202 and then enters the collimating element 204 .

A detector 205 is placed on the same side of the collimating element 204 as the emitter 203, and the detector 205 is used to convert at least part of the return light passing through the collimating element 204 into an electrical signal.

In one embodiment, each optical element is coated with an anti-reflection coating. Optionally, the thickness of the anti-reflection film is equal to or close to the wavelength of the light beam emitted by the emitter 203, which can increase the intensity of the transmitted light beam.

In one embodiment, a filter layer is coated on the surface of an element located on the beam propagation path in the distance measuring device, or a filter is provided on the beam propagation path for transmitting at least the wavelength band of the light beam emitted by the transmitter, Reflect other bands to reduce noise from ambient light to the receiver chip.

In some embodiments, the transmitter 203 may comprise a laser diode through which laser pulses are emitted on the nanosecond scale. Further, the laser pulse receiving time can be determined, for example, by detecting the rising edge time and/or the falling edge time of the electrical signal pulse to determine the laser pulse receiving time. In this way, the ranging apparatus 200 can calculate the TOF by using the pulse receiving time information and the pulse sending time information, so as to determine the distance from the probe 201 to the ranging apparatus 200 .

The distance and orientation detected by the ranging device can be used for remote sensing, obstacle avoidance, mapping, modeling, navigation, etc., such as realizing the perception of the surrounding environment, and performing two-dimensional or three-dimensional mapping of the external environment. In one embodiment, the distance measuring device of the embodiment of the present application can be applied to the movable platform.

Based on this, the present application also provides a movable platform, wherein the distance measuring device described above can be applied to the movable platform, and the distance measuring device can be installed on the movable platform body of the movable platform.

In some embodiments, the movable platform includes at least one of an unmanned aerial vehicle, a car, a remote control car, a robot, and a camera. When the ranging device is applied to the unmanned aerial vehicle, the movable platform body is the fuselage of the unmanned aerial vehicle. When the distance measuring device is applied to an automobile, the movable platform body is the body of the automobile. The vehicle may be an autonomous driving vehicle or a semi-autonomous driving vehicle, which is not limited herein. When the distance measuring device is applied to the remote control car, the movable platform body is the body of the remote control car. When the distance measuring device is applied to the robot, the movable platform body is the body of the robot. When the ranging device is applied to the camera, the movable platform body is the body of the camera.

In some embodiments, the movable platform may further include a power system for driving the movable platform body to move. For example, when the movable platform is a vehicle, the power system may be an engine inside the vehicle, which will not be listed here.

Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above-described example embodiments are exemplary only, and are not intended to limit the scope of the application thereto. Various changes and modifications may be made therein by those of ordinary skill in the art without departing from the scope and spirit of the present application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or May be integrated into another device, or some features may be omitted, or not implemented.

In the description provided herein, numerous specific details are set forth. It will be understood, however, that the embodiments of the present application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

Similarly, it is to be understood that in the description of the exemplary embodiments of the present application, various features of the present application are sometimes grouped together into a single embodiment, FIG. , or in its description. However, this method of application should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as the corresponding claims reflect, the invention lies in the fact that the corresponding technical problem may be solved with less than all features of a single disclosed embodiment. Thus, the claims following the Detailed Description are hereby expressly incorporated into this Detailed Description, with each claim standing on its own as a separate embodiment of this application.

It will be understood by those skilled in the art that all features disclosed in this specification (including the accompanying claims, abstract and drawings) and any method or apparatus so disclosed may be used in any combination, except that the features are mutually exclusive. Processes or units are combined. Each feature disclosed in this specification (including accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.

Furthermore, those skilled in the art will appreciate that although some of the embodiments described herein include certain features, but not others, included in other embodiments, that combinations of features of different embodiments are intended to be within the scope of the present application within and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.

Various component embodiments of the present application may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art should understand that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all functions of some modules according to the embodiments of the present application. The present application can also be implemented as a program of apparatus (eg, computer programs and computer program products) for performing part or all of the methods described herein. Such a program implementing the present application may be stored on a computer-readable medium, or may be in the form of one or more signals. Such signals may be downloaded from Internet sites, or provided on carrier signals, or in any other form.

It should be noted that the above-described embodiments illustrate rather than limit the application, and alternative embodiments may be devised by those skilled in the art without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, and third, etc. do not denote any order. These words can be interpreted as names.

The above are only specific embodiments of the present application or descriptions of the specific embodiments, and the protection scope of the present application is not limited thereto. Any changes or substitutions should be included within the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims

A preparation method of an avalanche photodiode, characterized in that the preparation method comprises:

providing a substrate formed with an epitaxial layer;

A first ion implantation of a first doping type is performed on the epitaxial layer to form a first doping layer, wherein the depth of the peak concentration of the first ion implantation is greater than or equal to 2 μm, and the first ion implantation The dose is 1×10 12 cm -3 to 3×10 12 cm -3 ;

performing a second ion implantation of a second doping type on the epitaxial layer to form a second doping layer, the second doping layer being located above the first doping layer;

Wherein, the first doping type and the second doping type are different, the first doping layer and the second doping layer and the first doping layer and the second doping layer The area in between constitutes the avalanche region of the avalanche photodiode.
The preparation method according to claim 1, wherein the depth of the peak concentration of the second ion implantation is less than or equal to 200 nm; and/or

The dose of the second ion implantation is 1×10 14 cm -3 to 1×10 15 cm -3 ; and/or

The energy of the second ion implantation is 20keV˜100keV.
The preparation method according to claim 1, wherein the energy of the first ion implantation is 1200keV˜1600keV.
The preparation method according to claim 1, wherein the included angle between the direction of the first ion implantation and a plane perpendicular to the surface of the epitaxial layer is 0°-10°.
The preparation method according to claim 2, wherein after the second ion implantation, the preparation method further comprises:

The rapid annealing step is performed, and the temperature of the rapid annealing is 900 degrees Celsius to 1150 degrees Celsius, and the time is 10s to 60s.
The preparation method according to claim 2, wherein the preparation method comprises:

Before the second ion implantation, a guard ring is formed in the epitaxial layer to perform the second ion implantation within the guard ring and form the second doped layer surrounded by the guard ring.
The preparation method according to claim 6, wherein the preparation method comprises:

forming a patterned mask layer on the epitaxial layer to expose the region where the guard ring is formed;

A third ion implantation of the second doping type is performed using the mask layer as a mask to form the guard ring in the exposed region.
The preparation method according to claim 7, wherein the preparation method comprises:

The third ion implantation is performed a plurality of times, the energy of the third ion implantation is 20 keV˜800 keV, and the dose of the third ion implantation is 1×10 12 cm −3 to 4×10 12 cm −3 .
The preparation method according to claim 6, wherein the preparation method comprises:

before the second ion implantation, etching the epitaxial layer to form trenches;

The trench is filled to form the guard ring to perform the second ion implantation within the guard ring and to form the second doped layer surrounded by the guard ring.
The preparation method according to claim 6 or 9, wherein the depth of the guard ring is greater than or equal to 2 μm.
The preparation method according to claim 7, wherein after the third ion implantation is performed, the preparation method further comprises:

The rapid annealing step is performed, and the temperature of the rapid annealing is 800 degrees Celsius to 1000 degrees Celsius, and the time is 1 to 30 minutes.
The preparation method according to claim 6, wherein before or after the first ion implantation, the preparation method further comprises:

A fourth ion implantation of the first doping type is performed at the edge of the epitaxial layer to form a first electrode outside the guard ring.
The preparation method according to claim 12, wherein the preparation method further comprises:

A stop ring is formed between the guard ring and the first electrode.
The preparation method according to claim 13, wherein the thickness of the cut-off ring is more than 500 nm.
The preparation method according to claim 12, wherein the preparation method further comprises:

forming an antireflection layer on the epitaxial layer;

The anti-reflection layer is patterned to form a first opening and expose the first electrode and the second doped layer.
The preparation method according to claim 15, wherein the anti-reflection layer is made of silicon nitride or silicon oxide.
The preparation method according to claim 15, wherein the preparation method further comprises:

A first electrode contact layer and a second electrode contact layer are formed on the exposed first electrode and the second doped layer, respectively.
The preparation method according to claim 17, wherein the preparation method further comprises:

forming a passivation layer on the epitaxial layer;

The passivation layer is patterned to form a second opening and expose the first electrode contact layer, the second electrode contact layer, and the antireflection layer.
The preparation method according to claim 12, wherein the preparation method further comprises:

forming a stop ring material layer on the epitaxial layer;

thinning the cut-off ring material layer to form an antireflection layer;

The anti-reflection layer is patterned to form a first opening and expose the first electrode and the second doped layer.
The preparation method according to claim 1, characterized in that, before the first ion implantation and/or the second ion implantation, the preparation method further comprises the step of forming a protective layer on the epitaxial layer.
The preparation method according to claim 1, wherein the epitaxial layer is a silicon layer with an incident wavelength of 850 nm to 940 nm; and/or

The thickness of the epitaxial layer is not less than 60 μm.
The preparation method according to claim 1, wherein the substrate is a heavily doped layer;

The doping concentration of the heavily doped layer is 5×10 18 /cm 3 to 5×10 20 /cm 3 .
An avalanche photodiode, characterized in that the avalanche photodiode comprises:

epitaxial layer;

an avalanche region, located in the epitaxial layer, comprising a first doped layer and a second doped layer and a region between the first doped layer and the second doped layer, wherein:

The first doping layer has a first doping type, the depth of the peak concentration of the first doping layer is greater than or equal to 2 μm, and the doping dose of the first doping layer is 1×10 12 cm -3 to 3×10 12 cm -3 ;

The second doping layer, located above the first doping layer, has a second doping type, and the first doping type is different from the second doping type.
The avalanche photodiode according to claim 23, wherein the depth of the peak concentration of the second doping layer is less than or equal to 200 nm; and/or

The doping dose of the second doping layer is 1×10 14 cm -3 to 1×10 15 cm -3 .
The avalanche photodiode of claim 23, wherein the avalanche photodiode comprises:

A guard ring in the epitaxial layer, the guard ring surrounding the second doped layer.
The avalanche photodiode according to claim 25, wherein the depth of the guard ring is greater than or equal to 2 μm.
The avalanche photodiode of claim 25, wherein the guard ring is formed by ion implantation; or

The guard ring includes a groove and a filler material located in the groove.
The avalanche photodiode of claim 25, wherein the avalanche photodiode further comprises:

The first electrode is formed on the edge of the epitaxial layer and is located outside the guard ring.
The avalanche photodiode of claim 28, wherein the avalanche photodiode further comprises:

A stop ring is formed on the surface of the epitaxial layer and located between the guard ring and the first electrode.
The avalanche photodiode according to claim 29, wherein the cut-off ring has a thickness of 500 nm or more.
The avalanche photodiode of claim 29, wherein the avalanche photodiode further comprises:

an antireflection layer, located on the epitaxial layer, covering the surface of the epitaxial layer and the cut-off ring, wherein the antireflection layer has a first opening, and the first opening is located between the first electrode and the over the second doped layer.
The avalanche photodiode according to claim 31, wherein the anti-reflection layer is made of silicon nitride or silicon oxide.
The avalanche photodiode of claim 31, wherein the avalanche photodiode further comprises:

The first electrode contact layer and the second electrode contact layer are respectively filled in at least the openings on the first electrode and the second doped layer.
The avalanche photodiode of claim 33, wherein the avalanche photodiode further comprises:

a passivation layer covering the anti-reflection layer and having a second opening located above the first electrode contact layer, the second electrode contact layer and the anti-reflection layer.
The avalanche photodiode according to claim 23, wherein the epitaxial layer is a silicon layer with an incident wavelength of 850 nm to 940 nm; and/or

The thickness of the epitaxial layer is not less than 60 μm.
The avalanche photodiode of claim 23, wherein the avalanche photodiode further comprises:

a substrate on which the epitaxial layer is located.
The avalanche photodiode according to claim 36, wherein the substrate is a heavily doped layer;

The doping concentration of the heavily doped layer is 5×10 18 /cm 3 to 5×10 20 /cm 3 .
A receiving chip, characterized in that the receiving chip comprises:

The avalanche photodiode according to any one of claims 23 to 37, which is used for receiving the light pulse sequence reflected by the detected object, and converting the received light pulse sequence into a current signal;

The signal processing unit is used for receiving and processing the current signal of the avalanche photodiode to output a time signal.
A distance measuring device, characterized in that the distance measuring device comprises:

Light emitting circuit for emitting light pulse sequence;

The receiving chip according to claim 38, which is used for receiving the optical pulse sequence reflected by the detected object, and outputting a time signal based on the received optical pulse sequence;

an arithmetic circuit for calculating the distance between the detected object and the lidar according to the time signal.
A movable platform, characterized in that the movable platform comprises:

Movable platform body;

The distance measuring device according to claim 39, wherein the distance measuring device is provided on the movable platform body.
The movable platform of claim 40, wherein the movable platform comprises a drone, an autonomous vehicle, or a robot.