CN108963750B - VCSEL and APD integrated chip and preparation method thereof - Google Patents
VCSEL and APD integrated chip and preparation method thereof Download PDFInfo
- Publication number
- CN108963750B CN108963750B CN201810791393.0A CN201810791393A CN108963750B CN 108963750 B CN108963750 B CN 108963750B CN 201810791393 A CN201810791393 A CN 201810791393A CN 108963750 B CN108963750 B CN 108963750B
- Authority
- CN
- China
- Prior art keywords
- signal
- contact point
- unit
- signal receiving
- structure layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0262—Photo-diodes, e.g. transceiver devices, bidirectional devices
Abstract
The invention relates to the technical field of detection and discloses a VCSEL and APD integrated chip and a preparation method thereof, wherein the integrated chip comprises a signal transmitting unit, a signal receiving unit, a control unit and a data processing unit, the signal transmitting unit comprises a laminated first signal receiving structure layer and a laminated first signal transmitting structure layer, the signal receiving unit comprises a laminated second signal receiving structure layer and a laminated second signal transmitting structure layer, an electrode on the first signal transmitting structure layer is electrically connected to one side of the signal transmitting unit to form contact points, an electrode on the second signal receiving structure layer is electrically connected to one side of the signal receiving unit to form contact points, and each contact point is respectively connected with the control unit and the data processing unit. The first signal receiving structure layer and the second signal receiving structure layer are APD structure layers, and the first signal transmitting structure layer and the second signal transmitting structure layer are VCSEL structure layers. The invention realizes a photoelectric sensing system with high integration of VCSEL and APD.
Description
Technical Field
The invention relates to the technical field of detection, in particular to a VCSEL and APD integrated chip and a preparation method thereof.
Background
Because the Vertical Cavity Surface Emitting Laser (VCSEL) has the advantages of low threshold current, long service life, high modulation rate, small divergence angle and the like, the VCSEL can be commonly combined with an Avalanche Photodiode (APD) to be applied to the fields of laser radar, three-dimensional sensing and the like.
However, in the technical fields of laser radars and three-dimensional sensing at present, a laser and a detector are respectively split into independent modules, and monolithic integration cannot be realized. In addition, high integration cannot be achieved between the laser and its control circuit, between the detector and its readout circuit, and between the control circuit and the readout circuit.
Disclosure of Invention
Therefore, the technical problems to be solved by the invention are as follows: in the prior art, the integration level of the laser and the detector is low.
In order to solve the technical problems, the invention adopts the following technical scheme:
the embodiment of the invention provides a VCSEL and APD integrated chip, which comprises the following components:
the signal transmitting unit is arranged on the substrate and comprises a first signal receiving structure layer and a first signal transmitting structure layer which are arranged in a laminated mode, a first top electrode and a first bottom electrode are arranged on the first signal transmitting structure layer, and the first top electrode and the first bottom electrode are respectively and electrically connected to one side surface of the signal transmitting unit to form a first top contact point and a first bottom contact point;
The signal receiving unit is arranged on the substrate and is separated from the signal transmitting unit in the horizontal direction, and comprises a second signal receiving structure layer and a second signal transmitting structure layer which are arranged in a laminated mode, wherein a second top electrode and a second bottom electrode are arranged on the second signal receiving structure layer, and the second top electrode and the second bottom electrode are respectively and electrically connected to one side surface of the signal receiving unit to form a second top contact point and a second bottom contact point which are positioned on the same plane with the first top contact point and the first bottom contact point;
the control unit is connected with the first top contact point and the first bottom contact point and is used for controlling the first signal transmitting structure layer to transmit laser signals to a target object;
the data processing unit is connected with the second top contact point and the second bottom contact point and is used for analyzing and processing laser signals reflected by the target object;
the first light path adjusting unit is connected with the signal transmitting unit and is used for shaping laser emitted by the first signal transmitting structure layer into parallel light and transmitting the parallel light to the target object;
the second light path adjusting unit is connected with the signal receiving unit and is used for shaping the laser reflected by the target object into parallel light and transmitting the parallel light to the second signal receiving structure layer;
The first signal receiving structural layer and the second signal receiving structural layer are Avalanche Photodiode (APD) structural layers, and the first signal emitting structural layer and the second signal emitting structural layer are Vertical Cavity Surface Emitting Laser (VCSEL) structural layers.
Optionally, the light emitting surface of the signal emitting unit and the light entering surface of the signal receiving unit are located on the same side of the substrate.
Optionally, the first top contact point and the first bottom contact point are located on a side surface of the signal transmitting unit away from the light emitting surface, and the second top contact point and the second bottom contact point are located on a side surface of the signal receiving unit away from the light emitting surface.
Optionally, the control unit is connected with the first top contact point and the first bottom contact point through indium columns, and the data processing unit is connected with the second top contact point and the second bottom contact point through indium columns.
Optionally, the first optical path adjusting unit is a first lens component with a convex surface facing the signal transmitting unit; the second light path adjusting unit is a second lens component with a convex surface facing the target object.
Optionally, the first lens component is a microlens array, and the second lens component is a fresnel lens.
Optionally, the wavelength of the laser signal sent by the signal sending unit is more than or equal to 1400nm. Optionally, the Avalanche Photodiode (APD) structure layer includes a window layer, an absorption region, a composition graded region, a charge region, an avalanche amplification region, a collector layer, and a contact layer arranged in a stack;
the Vertical Cavity Surface Emitting Laser (VCSEL) structure layer comprises a first protection layer, an upper distributed feedback Bragg reflector, a first spacing layer, a first current limiting layer, an active region, a second current limiting layer, a second spacing layer, a lower distributed feedback Bragg reflector and a second protection layer which are arranged in a laminated mode.
The embodiment of the invention also provides a preparation method of the VCSEL and APD integrated chip, which comprises the following steps:
forming a plurality of signal transmitting units and signal receiving units which are separated from each other on a substrate, wherein the signal transmitting units comprise a first signal receiving structure layer and a first signal transmitting structure layer which are arranged in a lamination manner, the signal receiving units comprise a second signal receiving structure layer and a second signal transmitting structure layer which are arranged in a lamination manner, the first signal receiving structure layer and the second signal receiving structure layer are all Avalanche Photodiode (APD) structure layers and are prepared in the same layer, and the first signal transmitting structure layer and the second signal transmitting structure layer are all Vertical Cavity Surface Emitting Laser (VCSEL) structure layers and are prepared in the same layer;
Forming a first top electrode and a first bottom electrode on the first signal emitting structure layer, and forming a second top electrode and a second bottom electrode on the second signal receiving structure layer;
electrically connecting the first top electrode and the first bottom electrode to the surface of one side of the signal emission unit, which is far away from the light-emitting surface, so as to form a first top contact point and a first bottom contact point; electrically connecting the second top electrode and the second bottom electrode to a surface of the signal receiving unit, which is far away from the light incident surface, to form a second top contact point and a second bottom contact point which are positioned on the same plane with the first top contact point and the first bottom contact point;
and electrically connecting the first top contact point and the first bottom contact point with a control unit, and connecting the second top contact point and the second bottom contact point with the data processing unit.
Optionally, the method further comprises:
a first light path adjusting unit is arranged on the light emitting surface of the signal emitting unit;
and/or a second light path adjusting unit is arranged on the light incident surface of the signal receiving unit.
The technical scheme of the invention has the following advantages:
compared with the traditional mode that the detector and the laser are packaged separately and independently, the VCSEL and APD integrated chip provided by the embodiment of the invention has the advantages that the signal transmitting unit and the signal receiving unit are convenient to integrate on the same main board, the integration level is higher, and the photoelectric sensing system with high integration of the VCSEL and the APD is realized. And the volume of the VCSEL and APD integrated chip is reduced, and the miniaturization development trend is met.
The signal transmitting unit comprises a first signal receiving structure layer and a first signal transmitting structure layer which are arranged on the substrate in a laminated mode, the signal receiving unit comprises a second signal receiving structure layer and a second signal transmitting structure layer which are arranged on the substrate in a laminated mode, a first top electrode and a first bottom electrode are arranged on the first signal transmitting structure layer, and a second top electrode and a second bottom electrode are arranged on the second signal receiving structure layer. That is, the signal transmitting unit and the signal receiving unit each include a signal receiving structure layer and a signal transmitting structure layer that are stacked, and when the VCSEL and APD integrated chip is fabricated, the first signal receiving structure layer in the signal transmitting unit and the second signal receiving structure layer in the signal receiving unit may be formed at one time, and the first signal transmitting structure layer in the signal transmitting unit and the second signal transmitting structure layer in the signal receiving unit may be formed at one time. The first top electrode and the first bottom electrode are arranged on the first signal transmitting structure layer in the signal transmitting unit, so that the signal transmitting unit can realize a signal transmitting function, and the second top electrode and the second bottom electrode are arranged on the second signal receiving structure layer in the signal receiving unit, so that the signal receiving unit can realize a signal receiving function, the integration level of the signal transmitting unit and the signal receiving unit is realized, and the preparation process is simplified.
The VCSEL and APD integrated chip provided by the embodiment of the invention has the advantages that the light emitting surface of the signal emitting unit and the light entering surface of the signal receiving unit are positioned on the same side of the substrate, so that the preparation is convenient, and the laser is emitted and incident on the same surface.
The VCSEL and APD integrated chip provided by the embodiment of the invention is characterized in that a first top electrode and a first bottom electrode are respectively and electrically connected to the surface of one side of a signal emission unit far away from a light-emitting surface to form a first top contact point and a first bottom contact point; the second top electrode and the second bottom electrode are respectively and electrically connected to one side surface of the signal receiving unit, which is far away from the light incident surface, so as to form a second top contact point and a second bottom contact point. The arrangement of the electrode contact points facilitates a further integration of other structures, mainly circuit structures, on the signal transmitting unit and the signal receiving unit, and a high integration of the signal transmitting unit and the signal receiving unit with the respective circuit structures. In addition, electrode contact points of the signal transmitting unit and the signal receiving unit are arranged on one side far away from the laser emergent surface and the incident surface, so that the aperture opening ratio of the VCSEL and APD integrated chip is improved, and the improvement of laser flux is facilitated.
The VCSEL and APD integrated chip provided by the embodiment of the invention is characterized in that the first top contact point, the first bottom contact point, the second top contact point and the second bottom contact point are positioned on the same plane. That is, when the signal transmitting unit is connected to its corresponding circuit structure through the first top contact point and the first bottom contact point, and when the signal receiving unit is connected to its corresponding circuit structure through the second top contact point and the second bottom contact point, the two circuit structures are also located on the same plane, that is, the two circuit structures can be integrated on the same motherboard, so that the integration level between the circuit structures is improved.
The VCSEL and APD integrated chip provided by the embodiment of the invention has the advantages that the first top contact point and the first bottom contact point are connected with the control unit, the control unit is used for controlling the first signal transmitting unit to transmit laser signals, the second top contact point and the second bottom contact point are connected with the data processing unit, and the data processing unit is used for processing and analyzing the laser signals reflected by the target objects received by the signal receiving unit. Therefore, the control unit and the data processing unit can be integrated on the same main board, parasitic capacitance is reduced, and pulse modulation frequency of the signal transmitting unit is improved.
The VCSEL and APD integrated chip provided by the embodiment of the invention is characterized in that a first light path adjusting unit is connected to the light emitting surface of a signal emitting unit, and the first light path adjusting unit is a first lens component with a convex surface facing the signal emitting unit; the light incident surface of the signal receiving unit is connected with a second light path adjusting unit, and the second light path adjusting unit is a second lens component with a convex surface facing the target object. The arrangement of the first lens component with the convex surface facing the signal transmitting unit is beneficial to shaping the laser emitted by the signal transmitting unit into parallel emergent laser, improves the high collimation property when the laser is projected to the target object, ensures that most of light can irradiate to the target object, and improves the proportion of the laser reflected by the target object.
The arrangement of the second lens component with the convex surface facing the target object is beneficial to shaping laser reflected by the target object into parallel light to reach the signal receiving unit, and most of the reflected laser can be received by the signal receiving module, so that the utilization rate of the laser is effectively improved, and meanwhile, the power of the VCSEL and APD integrated chip is reduced, and the power consumption is reduced.
The VCSEL and APD integrated chip provided by the embodiment of the invention has the advantage that the wavelength of a laser signal sent by the signal transmitting unit is more than or equal to 1400nm. According to the study of human eye physiology and optical structure, the light with the wavelength more than or equal to 1400nm can not be transmitted into retina, and even if higher power output is adopted, the human eye can not be hurt. Therefore, the long-wavelength signal transmitting unit with the wavelength more than or equal to 1400nm is used as a laser light source, so that a longer detection distance can be realized, and higher resolution and safety can be realized.
The preparation method of the VCSEL and APD integrated chip provided by the embodiment of the invention comprises the steps of firstly forming a plurality of signal transmitting units and signal receiving units which are separated from each other on a substrate, wherein the signal transmitting units comprise a first signal receiving structure layer and a first signal transmitting structure layer which are arranged in a lamination manner, and the signal receiving units comprise a second signal receiving structure layer and a second signal transmitting structure layer which are arranged in a lamination manner; then forming a first top electrode and a first bottom electrode on the first signal emitting structure layer, and forming a second top electrode and a second bottom electrode on the second signal receiving structure layer; then, the first top electrode and the first bottom electrode are electrically connected to one side surface of the signal emission unit, which is far away from the light emitting surface, so that a first top contact point and a first bottom contact point are formed; electrically connecting the second top electrode and the second bottom electrode to one side surface of the signal receiving unit far away from the light incident surface to form a second top contact point and a second bottom contact point; finally, the first top contact point and the first bottom contact point are electrically connected with the control unit, and the second top contact point and the second bottom contact point are connected with the data processing unit.
In the preparation method, the signal transmitting unit and the signal receiving unit are formed on the same substrate, and compared with the traditional mode that the detector and the laser are separated and packaged independently, the signal transmitting unit and the signal receiving unit in the VCSEL and APD integrated chip prepared by the embodiment of the invention are convenient to integrate on the same main board, the integration level is higher, the volume of the VCSEL and APD integrated chip is reduced, and the miniaturization development trend is met.
In addition, when the VCSEL and APD integrated chip is fabricated, the first signal receiving structure layer in the signal transmitting unit and the second signal receiving structure layer in the signal receiving unit may be formed at one time, and the first signal transmitting structure layer in the signal transmitting unit and the second signal transmitting structure layer in the signal receiving unit may be formed at one time. The first top electrode and the first bottom electrode are arranged on the first signal transmitting structure layer in the signal transmitting unit, so that the signal transmitting unit can realize a signal transmitting function, and the second top electrode and the second bottom electrode are arranged on the second signal receiving structure layer in the signal receiving unit, so that the signal receiving unit can realize a signal receiving function, the integration level of the signal transmitting unit and the signal receiving unit is realized, and the preparation process is simplified.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIGS. 1-9 are process flow diagrams for fabricating VCSEL and APD integrated chips according to embodiments of the present invention;
reference numerals:
1-a substrate;
a 2-signal transmitting unit; 21-a first signal receiving structural layer; 211-light emergent holes; 22-a first signal emitting structural layer; 221-a first protective layer; 222-upper distributed feedback bragg mirror; 223-a first spacer layer; 224-a first current confinement layer; 225-an active region; 226-a second current confinement layer; 227-a second spacer layer; 228-a lower distributed feedback bragg mirror; 229-a second protective layer; 2210-a first top electrode; 2211—a first bottom electrode;
a 3-signal receiving unit; 31-a second signal receiving structural layer; 311-window layer; 312-an absorption zone; 313-composition graded region; 314-charge region; 315-avalanche amplification region; 316-collector layer; 317-a contact layer; 318-a second top electrode; 319-a second bottom electrode; 32-a second signal transmitting structural layer;
4-an intermediate barrier layer; 5-a buffer layer; 6-polyimide resin; 7-an antireflection film; 8-a control unit; 9-a data processing unit; 10-indium columns; 11-a first optical path adjustment unit; 12-a second optical path adjusting unit.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, or can be communicated inside the two components, or can be connected wirelessly or in a wired way. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Example 1
The embodiment of the invention provides a VCSEL and APD integrated chip, which comprises a substrate 1, wherein a signal transmitting unit 2 and a signal receiving unit 3 which are distributed along the horizontal direction and are separated from each other are arranged on the substrate 1, as shown in figures 1-9; the signal transmitting unit 2 includes a first signal receiving structure layer 21 and a first signal transmitting structure layer 22 that are stacked on the substrate 1; the signal receiving unit 3 includes a second signal receiving structure layer 31 and a second signal transmitting structure layer 32 which are stacked on the substrate 1.
In the present embodiment, the first signal emitting structure layer 22 in the signal emitting unit 2 and the second signal emitting structure layer 32 in the signal receiving unit 3 are preferably Vertical Cavity Surface Emitting Laser (VCSEL) structures. The first signal receiving structural layer 21 in the signal transmitting unit 2 and the second signal receiving structural layer 31 in the signal receiving unit 3 are preferably Avalanche Photodiode Detector (APD) structures.
The vertical cavity surface emitting laser has the advantages of low threshold current, no Catastrophic Optical Damage (COD), long service life, stable single wavelength operation, high modulation rate, small divergence angle, low coupling efficiency and the like, and the beam quality is far higher than that of an Edge Emitting Laser (EEL) and an LED, so that the vertical cavity surface emitting laser has higher application value in the technical fields of high-speed optical communication, laser radar, three-dimensional sensing, imaging and the like.
The Avalanche Photodiode Detector (APD) has the advantages of high sensitivity, small volume, high speed and the like, the response wave band of the avalanche photodiode can reach 900nm-1700nm according to the selection of materials, the peak wavelength is 1550nm, and the avalanche photodiode detector is suitable for high-speed and high-sensitivity photoelectric detection and is widely applied to the field of long-distance optical communication.
Therefore, the vertical cavity surface emitting laser and the avalanche photodiode detector are selected to be used as the signal emitting structure layer and the signal receiving structure layer respectively, so that excellent service performances of the VCSEL and the APD integrated chip are effectively ensured.
It should be noted that, the signal emitting unit 2 shown in the drawings is only one vcsels, and in practical application, the signal emitting unit 2 may include a plurality of vcsels, that is, a vcsels array. Similarly, the signal receiving unit 3 shown in the figure is only two avalanche photodiodes around one vertical cavity surface emitting laser, and in practical application, the signal receiving unit 3 may include a plurality of avalanche photodiodes, that is, an avalanche photodiode array.
In preparing the VCSEL and APD integrated chip, it is common to simultaneously form the first signal receiving structure layer 21 in the signal transmitting unit 2 and the second signal receiving structure layer 31 in the signal receiving unit 3 on the substrate 1, and then simultaneously form the first signal transmitting structure layer 22 in the signal transmitting unit 2 and the second signal transmitting structure layer 32 in the signal receiving unit 3 thereon. Finally, the structural layer formed on the substrate 1 is divided by a photoetching technology to form a signal transmitting unit 2 and a signal receiving unit 3 which are separated.
In this embodiment, the first signal emitting structure layer 22 is provided with a first top electrode 2210 and a first bottom electrode 2211; the second signal receiving structure layer 31 is provided with a second top electrode 318 and a second bottom electrode 319. That is, in the signal transmitting unit 2, what actually functions is the first signal transmitting structure layer 22, and the signal transmitting function of the signal transmitting unit 2 can be achieved by the transmission of the electric signals of the first top electrode 2210 and the first bottom electrode 2211. In the signal receiving unit 3, what actually functions is the second signal receiving structure layer 31, and the signal receiving function of the signal receiving unit 3 can be realized by the electric signal transmission of the second top electrode 318 and the second bottom electrode 319.
Compared with the traditional mode that the detector and the laser are separately and independently packaged, the VCSEL and APD integrated chip provided by the embodiment of the invention has the advantages that the signal transmitting unit 2 and the signal receiving unit 3 are conveniently integrated on the same main board, the integration level is higher, the volume of the VCSEL and APD integrated chip is reduced, and the miniaturization development trend is met.
As an alternative implementation, in this embodiment, the vcsels include a first protective layer 221, an upper distributed feedback bragg reflector 222 (DBR), a first spacer layer 223, a first current confinement layer 224, an active region 225, a second current confinement layer 226, a second spacer layer 227, a lower distributed feedback bragg reflector 228 (DBR), and a second protective layer 229 that are stacked. Wherein the materials of the layers are shown in the following table:
as an alternative embodiment, the avalanche photodiode detector includes a window layer 311, an absorption region 312, a graded composition region 313, a charge region 314, an avalanche amplification region 315, a collector layer 316, and a contact layer 317, which are stacked. Wherein, the materials of the layers are shown in the following table:
As an alternative implementation, in this embodiment, the contact layer 317 of the avalanche photodiode is adjacent to the first protection layer 221 of the vcsels, and an intermediate barrier layer 4 is disposed between the contact layer 317 and the first protection layer 221, where the intermediate barrier layer 4 is preferably 500nm of I-InP material.
As an alternative embodiment, in this example, the substrate 1 is a P-InP material with a doping concentration of 2×10 18 cm -3 . The substrate 1 is adjacent to the window layer 311 of the avalanche photodiode, between which there is also arranged a buffer layer 5, the buffer layer 5 preferably being 500nm of P-InP material with a doping concentration of 3 x 10 18 cm -3 。
The first top electrode 2210 is an N electrode, which may be disposed on the second spacer layer 227 in the first signal emission structure layer 22, and the first bottom electrode 2211 is a P electrode, which may be disposed on the first spacer layer 223 in the first signal emission structure layer 22. The second top electrode 318 is an N electrode, which may be disposed on the contact layer 317 in the second signal receiving structural layer 31, and the second bottom electrode 319 is a P electrode, which may be disposed on the buffer layer 5.
As an alternative embodiment, in this embodiment, the light emitting surface of the signal emitting unit 2 and the light entering surface of the signal receiving unit 3 are located on the same side of the substrate 1. Further preferably, the light emitting surface of the signal emitting unit 2 is located at a side of the first signal receiving structure layer 21 close to the substrate 1, and the light entering surface of the signal receiving unit 3 is located at a side of the second signal receiving structure layer 31 close to the substrate 1. Since the first signal transmitting structure layer 22 in the signal transmitting unit 2 is further spaced from the substrate 1 by the first signal receiving structure layer 21, in this embodiment, the light emitting hole 211 extending to the first signal transmitting structure layer 22 is further opened in the first signal receiving structure layer 21, thereby enabling the laser light to be emitted from the light emitting hole 211.
As an alternative embodiment, the thickness of the substrate 1 is 0-20 micrometers in this embodiment, so that blocking of the outgoing laser light and the incoming laser light can be reduced, and the detection effect can be prevented from being affected by the excessively thick substrate 1.
As an alternative implementation manner, in this embodiment, the substrate 1 is further provided with an antireflection film 7, where the antireflection film 7 is preferably made of a silicon nitride material, so that not only the light-emitting efficiency and the incident efficiency of the reflected light can be increased, but also the material of the signal receiving structure layer is protected from the external environment.
As an alternative implementation manner, in this embodiment, the first top electrode 2210 and the first bottom electrode 2211 are electrically connected to a surface of the signal emitting unit 2 on a side away from the light emitting surface, respectively, to form a first top contact point and a first bottom contact point; the second top electrode 318 and the second bottom electrode 319 are electrically connected to a side surface of the signal receiving unit 3 away from the light incident surface, respectively, forming a second top contact point and a second bottom contact point.
Specifically, the first top electrode 2210, the first bottom electrode 2211, the second top electrode 318, and the second bottom electrode 319 form a first top contact point, a first bottom contact point, a second top contact point, and a second bottom contact point on the second protection layer 229 in the signal emission structure layer in a climbing manner, respectively.
The provision of electrode contacts facilitates a further integration of other structures, mainly circuit structures, on the signal transmitting unit 2 and the signal receiving unit 3, and a high integration of the signal transmitting unit 2 and the signal receiving unit 3 with the respective circuit structures. In addition, the electrode contact points of the signal transmitting unit 2 and the signal receiving unit 3 are arranged on one side far away from the laser emergent surface and the incident surface, so that the aperture opening ratio of the VCSEL and APD integrated chip is improved, and the laser flux is improved.
In addition, in order to prevent each device structure layer from being affected, the outer sides and the top of the signal transmitting unit 2 and the signal receiving unit are provided with silicon nitride protection layers, namely, the intervals between the conductive slope sections between the electrodes and the contact points and the device structures are formed by the silicon nitride protection layers.
Preferably, in this embodiment, the first top contact point, the first bottom contact point, the second top contact point and the second bottom contact point are located on the same plane. The signal receiving structure layers and the signal transmitting structure layers in the signal transmitting unit 2 and the signal receiving unit 3 are prepared in the same layer and have the same thickness, so that one side of the signal transmitting unit 2 away from the light emitting surface and one side of the signal receiving unit 3 away from the light entering surface are located on the same plane, that is, the first top contact point, the first bottom contact point, the second top contact point and the second bottom contact point are also located on the same plane.
When the signal transmitting unit 2 is connected with its corresponding circuit structure through the first top contact point and the first bottom contact point, and when the signal receiving unit 3 is connected with its corresponding circuit structure through the second top contact point and the second bottom contact point, the two circuit structures are also located on the same plane, so that the two circuit structures can be integrated on the same motherboard, and the integration level between the circuit structures is improved.
As an alternative embodiment, in this embodiment, the first top contact point and the first bottom contact point are connected to the control unit 8, and the control unit 8 is configured to control the first signal emitting unit 2 to emit a laser signal. The second top contact point and the second bottom contact point are connected with a data processing unit 9, and the data processing unit 9 is used for processing and analyzing the laser signals reflected by the target object received by the signal receiving unit 3. Thereby, the control unit 8 and the data processing unit 9 can be integrated on the same motherboard, and parasitic capacitance is reduced, and the pulse modulation frequency of the signal transmitting unit 2 is increased.
In particular, the connection between the contact points and the control unit 8 and the data processing unit 9 is preferably an indium column 10 connection. Because the indium has strong conductivity, the indium column is used as a connecting material between the contact point and the control unit and between the indium column and the data processing unit, and the stability of the integrated chip is improved.
As an alternative implementation manner, in this embodiment, the light-emitting surface of the signal transmitting unit 2 is connected with a first optical path adjusting unit 11, and the first optical path adjusting unit 11 is a first lens component with a convex surface facing the signal transmitting unit 2; the light incident surface of the signal receiving unit 3 is connected with a second light path adjusting unit 12, and the second light path adjusting unit 12 is a second lens component with a convex surface facing the target object.
The arrangement of the first lens component with the convex surface facing the signal transmitting unit 2 is helpful to shape the laser emitted by the signal transmitting unit 2 into parallel emergent laser, so that the high collimation of the laser when being projected to the target object is improved, most of the light can be irradiated to the target object, and the proportion of the laser reflected by the target object is improved.
The arrangement of the second lens component with the convex surface facing the target object is beneficial to shaping laser reflected by the target object into parallel light to reach the signal receiving unit 3, and most of the reflected laser can be received by the signal receiving module, so that the utilization rate of the laser is effectively improved, and meanwhile, the power of the VCSEL and APD integrated chip is reduced, and the power consumption is reduced.
When the signal transmitting unit 2 is a vertical cavity surface emitting laser array, the first optical path adjusting unit 11 may be a micro lens array, and when the signal receiving unit 3 is an avalanche photodiode array, the second optical path adjusting unit 12 may be a fresnel lens. The fresnel lens is a conventional peripheral annular structure, and the convex lens in the center is replaced by the microlens array.
As an alternative embodiment, in this embodiment, the wavelength of the laser signal emitted by the signal emitting unit 2 is 1400nm or more. According to the study of human eye physiology and optical structure, the light with the wavelength more than or equal to 1400nm can not be transmitted into retina, and even if higher power output is adopted, the human eye can not be hurt. Therefore, the long wavelength signal emitting unit 2 with the wavelength of 1400nm or more is used as a laser light source, so that a longer detection distance and higher resolution and safety can be realized.
Further preferably, the wavelength of the laser signal is 1550nm. This is because 1550nm wavelength laser is an important light source for free space optical communication (FSO), which can propagate in air for a long distance, and is beneficial to eliminate the influence of bad weather and avoid injury to human eyes.
Example 2
The embodiment of the invention provides a preparation method of a VCSEL and APD integrated chip, which comprises the following steps:
step S21, forming a plurality of signal transmitting units 2 and signal receiving units 3 separated from each other on a substrate 1, where the signal transmitting units 2 include a first signal receiving structure layer 21 and a first signal transmitting structure layer 22 that are stacked, and the signal receiving units 3 include a second signal receiving structure layer 31 and a second signal transmitting structure layer 32 that are stacked, where the first signal receiving structure layer 21 and the second signal receiving structure layer 31 are both Avalanche Photodiode (APD) structure layers and are prepared in the same layer, and the first signal transmitting structure layer 22 and the second signal transmitting structure layer 32 are both Vertical Cavity Surface Emitting Laser (VCSEL) structure layers and are prepared in the same layer.
Specifically, step S21 includes:
step S211, sequentially forming a signal receiving structure layer and a signal transmitting structure layer, which are stacked on the substrate 1. The signal receiving structure layer and the signal transmitting structure layer are preferably an avalanche photodiode detector structure layer and a vertical cavity surface emitting laser structure layer. Specific structures and materials are described in detail in example 1 and are not described here.
Step S212, etching the signal receiving-structure layer and the signal transmitting-structure layer which are stacked to form the signal transmitting unit 2 and the signal receiving unit 3 which are separated from each other. The signal receiving structure layer and the signal transmitting structure layer in the signal transmitting unit 2 are respectively a first signal receiving structure layer 21 and a first signal transmitting structure layer 22, and the signal receiving structure layer and the signal transmitting structure layer in the signal receiving unit 3 are respectively a second signal receiving structure layer 31 and a second signal transmitting structure layer 32.
Preferably, in step S211, an intermediate barrier layer 4 is also formed between the signal receiving structural layer and the signal transmitting structural layer. The material type of the intermediate barrier layer 4 is described in example 1.
Preferably, before step S21, a step of forming a buffer layer 5 on the substrate 1 is further included. The material type of the buffer layer 5 is shown in example 1.
In step S22, a first top electrode 2210 and a first bottom electrode 2211 are formed on the first signal emitting structure layer 22, and a second top electrode 318 and a second bottom electrode 319 are formed on the second signal receiving structure layer 31.
Preferably, step S22 includes:
step S221, forming a first top electrode 2210 step surface and a first bottom electrode 2211 step surface on the first signal transmitting structure layer 22, and forming a second top electrode 318 step surface and a second bottom electrode 319 step surface on the second signal receiving structure layer 31;
in step S222, the first top electrode 2210, the first bottom electrode 2211, the second top electrode 318 and the second bottom electrode 319 are formed on the first top electrode 2210, the first bottom electrode 2211, the second top electrode 318 and the second bottom electrode 319, respectively.
Step S23, electrically connecting the first top electrode 2210 and the first bottom electrode 2211 to a side surface of the signal emitting unit 2 away from the light emitting surface, forming a first top contact point and a first bottom contact point; the second top electrode 318 and the second bottom electrode 319 are electrically connected to a side surface of the signal receiving unit 3 remote from the light incident surface, forming a second top contact point and a second bottom contact point on the same plane as the first top contact point and the first bottom contact point.
Specifically, the first top electrode 2210 and the first bottom electrode 2211 are pulled to a side surface of the signal emission unit 2, which is far away from the light emitting surface, in a climbing manner, so as to form a first top contact point and a first bottom contact point; the second top electrode 318 and the second bottom electrode 319 are electrically connected to a side surface of the signal receiving unit 3 remote from the light incident surface, forming a second top contact point and a second bottom contact point.
In this embodiment, the first top contact point, the first bottom contact point, the second top contact point, and the second bottom contact point are all located on the same plane.
Step S24, electrically connecting the first top contact point and the first bottom contact point with the control unit 8, and connecting the second top contact point and the second bottom contact point with the data processing unit 9.
That is, the first signal transmitting structural layer 22 in the signal transmitting unit 2 is electrically connected to the control unit 8 to realize the signal transmitting function of the signal transmitting unit 2, and the second signal receiving structural layer 31 of the signal receiving unit 3 is electrically connected to the data processing unit 9 to realize the signal receiving function of the signal receiving unit 3.
Specifically, in step S24, interconnection is achieved by the indium columns 10.
Preferably, step S24 is followed by step S25: the substrate 1 is thinned to a thickness of less than 20 microns. Thus, blocking of outgoing laser light and incoming laser light can be reduced, and the detection effect can be prevented from being affected by the excessively thick substrate 1.
Preferably, step S25 is followed by step S26: the first signal receiving structure layer 21 is provided with a light emitting hole 211 extending to the first signal emitting structure layer 22. Thereby enabling the laser signal to be emitted from the light emitting hole 211.
Preferably, step S26 is followed by step S27: an antireflection film 7 is formed on the surface of the substrate 1 on the side away from the signal receiving structure layer, and the antireflection film 7 is preferably made of silicon nitride material, so that not only can the light-emitting efficiency and the incidence efficiency of reflected light be increased, but also the material of the signal receiving structure layer can be protected from the external environment.
Preferably, step S28 is further included after step S27: the first light path adjusting unit 11 is connected to the light emitting surface of the signal transmitting unit 2, and the second light path adjusting unit 12 is connected to the light receiving surface of the signal receiving unit 3.
In the present embodiment, the first optical path adjusting unit 11 is a first lens assembly with a convex surface facing the signal transmitting unit 2; the light incident surface of the signal receiving unit 3 is connected with a second light path adjusting unit 12, and the second light path adjusting unit 12 is a second lens component with a convex surface facing the target object. The arrangement of the first lens component with the convex surface facing the signal transmitting unit 2 is helpful to shape the laser emitted by the signal transmitting unit 2 into parallel emergent laser, so that the high collimation of the laser when being projected to the target object is improved, most of the light can be irradiated to the target object, and the proportion of the laser reflected by the target object is improved. The arrangement of the second lens component with the convex surface facing the target object is beneficial to shaping laser reflected by the target object into parallel light to reach the signal receiving unit 3, and most of the reflected laser can be received by the signal receiving module, so that the utilization rate of the laser is effectively improved, and meanwhile, the power of the VCSEL and APD integrated chip is reduced, and the power consumption is reduced.
When the signal transmitting unit 2 is a vertical cavity surface emitting laser array, the first optical path adjusting unit 11 may be a micro lens array, and when the signal receiving unit 3 is an avalanche photodiode array, the second optical path adjusting unit 12 may be a fresnel lens. The fresnel lens is a conventional peripheral annular structure, and the convex lens in the center is replaced by the microlens array.
Compared with the traditional mode that the detector and the laser are separately and independently packaged, the preparation method provided by the embodiment of the invention has the advantages that the signal transmitting unit 2 and the signal receiving unit 3 in the VCSEL and APD integrated chip prepared by the embodiment of the invention are convenient to integrate on the same main board, the integration level is higher, the volume of the VCSEL and APD integrated chip is reduced, and the miniaturization development trend is met.
In addition, the signal transmitting unit 2 and the corresponding control unit 8 are interconnected through the indium columns 10, the signal receiving unit 3 and the corresponding data processing unit 9 are interconnected through the indium columns 10, so that the high integration between the signal transmitting unit 2 and the control unit 8 is realized, and the high integration between the signal receiving unit 3 and the data processing unit 9 is realized. Meanwhile, the data processing unit 9 and the control unit 8 are positioned on the same plane, so that the data processing unit 9 and the control unit are beneficial to being integrated together, and the integration level among all circuit structures is improved.
Example 3
The embodiment of the invention provides a specific example of a preparation method of the VCSEL and APD integrated chip provided in the embodiment 2. The method comprises the following steps:
step 1: a buffer layer, an Avalanche Photodiode (APD) structure layer, an intermediate barrier layer, and a Vertical Cavity Surface Emitting Laser (VCSEL) structure layer are sequentially formed on a P-InP substrate. The specific structure and materials were the same as in example 1. Inductively Coupled Plasma (ICP) dry etching method with double sided overlay and Optical Emission Spectroscopy (OES) configuration to thick silicon nitride (SiN) X ) As a mask, the wafer is etched on top of the P-InP buffer layer, a cylindrical mesa of InGaAs APD is formed on the front side, and a pattern of APD array and register marks are formed on the back side of the InP substrate (see fig. 1).
Step 2: and etching the top of the contact layer by using silicon nitride as a mask by using an ICP dry etching method with OES function to form an N-type lower electrode contact layer step of the APD (see figure 2).
Step 3: inductively Coupled Plasma (ICP) method using double sided overlay and Optical Emission Spectroscopy (OES) configuration to form silicon nitride (SiN) X ) As a mask, etching to the top of the first protective layer, forming VCSEL mesas on the front side, and forming VCSEL light-emitting holes and register marks on the back side of the InP substrate (see fig. 2).
Step 4: and etching the top of the P-InP first spacer layer by using silicon nitride as a mask by using an ICP dry etching method with OES function (see figure 3) to form a step of the P-type upper electrode contact layer of the VCSEL.
Step 5: and etching the top of the N-InP second spacer layer by using photoresist as a mask by using an ICP dry etching method with OES function to form a lower distributed feedback Bragg reflector (DBR) mesa of the VCSEL and an N-type lower electrode contact layer step (see figure 3).
Step 6: wet oxidation of In with nitrogen containing vapor 0.40 Al 0.60 In upper and lower DBR mesas of VCSEL 0.52 Al 0.48 As layer, form AlO X A current limiting aperture and an optical limiting aperture.
Step 7: after removal of the photoresist, siN is deposited outside the APD and VCSEL mesas using Inductively Coupled Plasma (ICP) Chemical Vapor Deposition (CVD) methods X A film.
Step 8: removing part of SiN on P-InP buffer layer of APD and P-InP first spacer layer of VCSEL respectively by combining photoetching and wet etching processes X And forming a P-type electrode contact surface by the thin film.
Step 9: a TiAu or AuZn electrode is formed on the P-InP buffer layer of the APD and the P-InP first spacer layer of the VCSEL in combination with photolithography, physical Vapor Deposition (PVD) metallization, and a tape stripping process (see fig. 4).
Step 10: removing part of SiN on N-InP second spacer layer of VCSEL and contact layer of APD respectively by combining photoetching and wet etching processes X And forming a corresponding N-type electrode contact surface by the thin film.
Step 11: an auge niau electrode is formed over the N-InP second spacer layer of the VCSEL and the contact layer of the APD in combination with photolithography and PVD metal deposition and a tape stripping process (see fig. 4).
Step 12: the gap of the VCSEL mesa is filled with polyimide resin 6 and planarized (see fig. 5).
Step 13: and forming climbing electrodes on the side walls and the top of the VCSEL and the APD by utilizing photoetching, PVD metal coating and tape stripping processes. Wherein the P electrode on the P-InP first spacing layer and the N electrode on the N-InP second spacing layer of the VCSEL climb to the top of the peripheral VCSEL side mesa and the cylindrical VCSEL mesa respectively; the P-type electrode on the P-InP buffer layer of the APD and the N-type electrode on the contact layer climb to the inner side and the outer side of the annular APD mesa respectively. Since the top and the outer sides of the VCSEL and APD table tops are protected by silicon nitride, the normal operation of the device can be ensured (see figure 6).
Step 14: in and vapor deposition In and reflow soldering processes are combined to form indium columns on the TiAu or AuZn electrodes of the P-InP buffer layer of the APD and the P-InP first spacer layer of the VCSEL, the N-InP second spacer layer of the VCSEL and the AuGeNiAu electrode on the contact layer of the APD, wherein the height of the indium columns is slightly higher than that of the InGaAs second protective layer of the VCSEL by 3-10 mu m (see figure 7).
Step 15: indium columns on the VCSEL and APD chips are aligned with electrodes on the VCSEL control circuit and readout circuit (ROIC), respectively, and thermally and pressure interconnected (see fig. 8).
Step 16: thinning the InP substrate to 0-20 mu m according to the back VCSEL and APD patterns and register marks manufactured in the step 1 and the step 3 and combining photoetching, wet etching and Chemical Mechanical Polishing (CMP) processes; etching of the APD material in the middle portion then begins to progress to the first protective layer of the VCSEL, forming a flared back side light exit aperture of the VCSEL (see fig. 8).
Step 17: a silicon nitride anti-reflection film is deposited on the InP substrate or the P-InP buffer layer after thinning and polishing. Silicon nitride not only increases the efficiency of VCSEL light extraction and reflected light into the APD, but also protects the APD material from environmental factors (see fig. 9).
Step 18: the VCSEL array and the APD array are aligned with the annular lens of the corresponding micro lens array and the Fresnel lens to achieve good focal length and good fixation, so that the VCSEL light beam is output in collimation and the reflected light enters the APD array in collimation (see figure 9).
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.
Claims (10)
1. A method of fabricating a VCSEL and APD integrated chip, comprising:
sequentially forming a signal receiving structure layer and a signal emitting structure layer which are arranged in a stacked manner on a substrate, etching the signal receiving structure layer and the signal emitting structure layer which are arranged in a stacked manner to form a signal emitting unit and a signal receiving unit which are separated from each other, wherein the signal emitting unit comprises a first signal receiving structure layer and a first signal emitting structure layer which are arranged in a stacked manner, and the signal receiving unit comprises a second signal receiving structure layer and a second signal emitting structure layer which are arranged in a stacked manner, wherein the first signal receiving structure layer and the second signal receiving structure layer are Avalanche Photodiode (APD) structure layers and are prepared in the same layer, and the first signal emitting structure layer and the second signal emitting structure layer are Vertical Cavity Surface Emitting Laser (VCSEL) structure layers and are prepared in the same layer;
forming a first top electrode and a first bottom electrode on the first signal emitting structure layer, and forming a second top electrode and a second bottom electrode on the second signal receiving structure layer;
electrically connecting the first top electrode and the first bottom electrode to the surface of one side of the signal emission unit, which is far away from the light-emitting surface, so as to form a first top contact point and a first bottom contact point; electrically connecting the second top electrode and the second bottom electrode to a surface of the signal receiving unit, which is far away from the light incident surface, to form a second top contact point and a second bottom contact point which are positioned on the same plane with the first top contact point and the first bottom contact point;
And electrically connecting the first top contact point and the first bottom contact point with a control unit, and connecting the second top contact point and the second bottom contact point with a data processing unit.
2. The method of fabricating a VCSEL and APD integrated chip of claim 1, further comprising:
a first light path adjusting unit is arranged on the light emitting surface of the signal emitting unit;
and/or a second light path adjusting unit is arranged on the light incident surface of the signal receiving unit.
3. A VCSEL and APD integrated chip prepared by the method of preparation of claim 1, the VCSEL and APD integrated chip comprising:
the signal transmitting unit is arranged on the substrate and comprises a first signal receiving structure layer and a first signal transmitting structure layer which are arranged in a laminated mode, a first top electrode and a first bottom electrode are arranged on the first signal transmitting structure layer, and the first top electrode and the first bottom electrode are respectively and electrically connected to one side surface of the signal transmitting unit to form a first top contact point and a first bottom contact point;
the signal receiving unit is arranged on the substrate and is separated from the signal transmitting unit in the horizontal direction, and comprises a second signal receiving structure layer and a second signal transmitting structure layer which are arranged in a laminated mode, wherein a second top electrode and a second bottom electrode are arranged on the second signal receiving structure layer, and the second top electrode and the second bottom electrode are respectively and electrically connected to one side surface of the signal receiving unit to form a second top contact point and a second bottom contact point which are positioned on the same plane with the first top contact point and the first bottom contact point;
The control unit is connected with the first top contact point and the first bottom contact point and is used for controlling the first signal transmitting structure layer to transmit laser signals to a target object;
the data processing unit is connected with the second top contact point and the second bottom contact point and is used for analyzing and processing laser signals reflected by the target object;
the first light path adjusting unit is connected with the signal transmitting unit and is used for shaping laser emitted by the first signal transmitting structure layer into parallel light and transmitting the parallel light to the target object;
the second light path adjusting unit is connected with the signal receiving unit and is used for shaping the laser reflected by the target object into parallel light and transmitting the parallel light to the second signal receiving structure layer;
the first signal receiving structural layer and the second signal receiving structural layer are Avalanche Photodiode (APD) structural layers, and the first signal emitting structural layer and the second signal emitting structural layer are Vertical Cavity Surface Emitting Laser (VCSEL) structural layers.
4. The VCSEL and APD integrated chip of claim 3, wherein the light exit face of the signal transmitting unit and the light entrance face of the signal receiving unit are on the same side of the substrate.
5. The integrated VCSEL and APD chip of claim 3 or 4, wherein the first top contact point and the first bottom contact point are located on a side surface of the signal transmitting unit away from the light exit surface, and the second top contact point and the second bottom contact point are located on a side surface of the signal receiving unit away from the light entrance surface.
6. The VCSEL and APD integrated chip of claim 3 or 4, wherein the control unit is connected to the first top contact point, the first bottom contact point by an indium pillar, and the data processing unit is connected to the second top contact point, the second bottom contact point by an indium pillar.
7. The VCSEL and APD integrated chip of claim 3 or 4, wherein the first optical path adjustment unit is a first lens assembly with a convex surface facing the signal emission unit; the second light path adjusting unit is a second lens component with a convex surface facing the target object.
8. The VCSEL and APD integrated chip of claim 7, wherein the first lens component is a microlens array and the second lens component is a fresnel lens.
9. The VCSEL and APD integrated chip according to claim 3 or 4, wherein the wavelength of the laser signal emitted from the signal emitting unit is 1400nm or more.
10. The VCSEL and APD integrated chip of claim 3 or 4, wherein the Avalanche Photodiode (APD) structure layers comprise a window layer, an absorption region, a compositionally graded region, a charge region, an avalanche amplification region, a collector layer, and a contact layer, all of which are stacked;
the Vertical Cavity Surface Emitting Laser (VCSEL) structure layer comprises a first protection layer, an upper distributed feedback Bragg reflector, a first spacing layer, a first current limiting layer, an active region, a second current limiting layer, a second spacing layer, a lower distributed feedback Bragg reflector and a second protection layer which are arranged in a laminated mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810791393.0A CN108963750B (en) | 2018-07-18 | 2018-07-18 | VCSEL and APD integrated chip and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810791393.0A CN108963750B (en) | 2018-07-18 | 2018-07-18 | VCSEL and APD integrated chip and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108963750A CN108963750A (en) | 2018-12-07 |
| CN108963750B true CN108963750B (en) | 2023-08-29 |
Family
ID=64496293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810791393.0A Active CN108963750B (en) | 2018-07-18 | 2018-07-18 | VCSEL and APD integrated chip and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108963750B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110165550A (en) * | 2019-05-31 | 2019-08-23 | 度亘激光技术（苏州）有限公司 | A kind of preparation method and vertical cavity surface emitting laser of distribution Bragg reflector |
| CN110880676A (en) * | 2019-11-08 | 2020-03-13 | 度亘激光技术（苏州）有限公司 | Preparation method of semiconductor laser |
| US11456577B2 (en) * | 2020-07-28 | 2022-09-27 | Raytheon Company | Monolithic quantum cascade laser (QCL)/avalanche photodiode (APD) infrared transceiver |
| CN116111440B (en) * | 2023-04-14 | 2023-08-04 | 苏州立琻半导体有限公司 | Light source module |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023485A (en) * | 1998-02-17 | 2000-02-08 | Motorola, Inc. | Vertical cavity surface emitting laser array with integrated photodetector |
| CN105807378A (en) * | 2016-05-24 | 2016-07-27 | 北京邮电大学 | Transmitting and receiving integrated photoelectric integrated chip |
| CN106936068A (en) * | 2015-12-30 | 2017-07-07 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of integration laser and preparation method thereof |
| CN107005023A (en) * | 2014-12-19 | 2017-08-01 | 皇家飞利浦有限公司 | Laser sensor module |
| CN207318710U (en) * | 2017-11-02 | 2018-05-04 | 厦门市和奕华光电科技有限公司 | A kind of more harness hybrid laser radars of list laser |
| CN207571298U (en) * | 2017-11-15 | 2018-07-03 | 深圳市杰普特光电股份有限公司 | Laser radar array element and laser radar |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8320423B2 (en) * | 2010-08-24 | 2012-11-27 | Alvin Gabriel Stern | Compact, all solid-state, avalanche photodiode emitter-detector pixel with electronically selectable, passive or active detection mode, for large-scale, high resolution, imaging focal plane arrays |
| US10422877B2 (en) * | 2016-06-03 | 2019-09-24 | Stmicroelectronics (Research & Development) Limited | Substrate embedded time of flight sensor packaging |
-
2018
- 2018-07-18 CN CN201810791393.0A patent/CN108963750B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023485A (en) * | 1998-02-17 | 2000-02-08 | Motorola, Inc. | Vertical cavity surface emitting laser array with integrated photodetector |
| CN107005023A (en) * | 2014-12-19 | 2017-08-01 | 皇家飞利浦有限公司 | Laser sensor module |
| CN106936068A (en) * | 2015-12-30 | 2017-07-07 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of integration laser and preparation method thereof |
| CN105807378A (en) * | 2016-05-24 | 2016-07-27 | 北京邮电大学 | Transmitting and receiving integrated photoelectric integrated chip |
| CN207318710U (en) * | 2017-11-02 | 2018-05-04 | 厦门市和奕华光电科技有限公司 | A kind of more harness hybrid laser radars of list laser |
| CN207571298U (en) * | 2017-11-15 | 2018-07-03 | 深圳市杰普特光电股份有限公司 | Laser radar array element and laser radar |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108963750A (en) | 2018-12-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108963750B (en) | VCSEL and APD integrated chip and preparation method thereof | |
| US6392256B1 (en) | Closely-spaced VCSEL and photodetector for applications requiring their independent operation | |
| US8320423B2 (en) | Compact, all solid-state, avalanche photodiode emitter-detector pixel with electronically selectable, passive or active detection mode, for large-scale, high resolution, imaging focal plane arrays | |
| US10971898B2 (en) | Laser radar | |
| KR20230120563A (en) | 3D and LIDAR sensing modules | |
| JP2017112169A (en) | Image sensor, imaging system, and method of manufacturing image sensor | |
| KR101974576B1 (en) | Transmitting type optical image modulator having large aperture area and method of manufacturing the same and optical apparatus comprising transmitting type optical image modulator | |
| US20070133642A1 (en) | Vertical cavity surface emitting laser module having monitoring photodiode and method of fabricating the same | |
| KR20050033875A (en) | Surface emitting laser, method of fabricating the same, and optical transmission module | |
| US20210082973A1 (en) | Pin photodetector | |
| JP3238882U (en) | LIDAR sensor for mobile devices | |
| JP2005217147A (en) | Light receiving and emitting element array, optical module, and optical transmission device | |
| EP3797317B1 (en) | Short wavelength infrared lidar | |
| JP4507567B2 (en) | Manufacturing method of surface emitting laser | |
| JPH05129638A (en) | Optical semiconductor device | |
| US20220050186A1 (en) | Microled based time of flight system | |
| US20230010538A1 (en) | Photodetector module comprising emitter and receiver | |
| KR20230138529A (en) | Surface-emitting laser array, light source module, and distance measuring device | |
| CN208782239U (en) | A kind of VCSEL and APD integrated chip | |
| JP2018098399A (en) | Semiconductor photodetector | |
| CN109786413B (en) | Image sensor with a plurality of pixels | |
| US6989554B2 (en) | Carrier plate for opto-electronic elements having a photodiode with a thickness that absorbs a portion of incident light | |
| JP6660282B2 (en) | Light receiving element | |
| CN111697100A (en) | Single-chip transceiving photoelectric component, single-chip transceiving module, photoelectric system and electronic equipment | |
| KR20160022101A (en) | Transmissive optical shutter and method of fabricating the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |