WO2022047869A1

WO2022047869A1 - Solid-state nanopore manufacturing method and sensor comprising solid-state nanopore

Info

Publication number: WO2022047869A1
Application number: PCT/CN2020/117819
Authority: WO
Inventors: 范建林; 周文益; 莫子羿; 张新联; 刘大伟; 隋国栋; 莫晖; 尹良超; 吴蒙; 卢大儒
Original assignee: 深圳市儒翰基因科技有限公司
Priority date: 2020-09-07
Filing date: 2020-09-25
Publication date: 2022-03-10
Also published as: CN112079330A

Abstract

A solid-state nanopore manufacturing method and a sensor comprising a solid-state nanopore. Said manufacturing method comprises the following steps: depositing a SiN layer (14) on one side of a silicon substrate (12); depositing SiO2 layers (16a, 16b) on the SiN layer (14) and the other side of the silicon substrate (12) respectively; preparing an etching resist layer (20) on the SiO2 layer (16a) on said one side, etching the etching resist layer (20) and the SiO2 layer (16a) on said one side to form an etched groove (24a), the etching groove (24a) exposing said one side having the SiN layer (14), and removing the etching resist layer (20) from said one side; preparing an etching resist layer on the SiO2 layer (16b) on said other side, etching the etching resist layer and the SiO2 layer (16b) on said other side to form an etched groove (24b), the etched grooves (24a, 24b) on the two sides being aligned, the etched groove (24b) on said other side exposing the other side having the silicon substrate (12), and removing the etching resist layer from said other side; respectively printing gold electrodes (30a-d, 40a-d) on the SiO2 layers (16a, 16b) on the two sides; etching the silicon substrate (12) from the exposed part on said other side of the silicon substrate (12), so as to expose said other side having the SiN layer (14); and using a helium ion beam to pass through the exposed part of the SiN layer (14) to form a nanopore (62).

Description

Solid state nanopore fabrication method and sensor including solid state nanopore

technical field

The present invention relates to the technical field of nanopores, and more particularly, to a method for manufacturing solid state nanopores and a sensor comprising solid state nanopores.

Background technique

Nanopores refer to pores with nanometer-scale diameters in a two-dimensional material. Devices containing nanopores are usually placed in a solution environment that separates the solution into two parts, with the nanopore being the only channel connecting the two sides of the solution. When an external voltage is applied to both ends of the solution, the ions, charged molecules and particles in the solution will do electrophoretic motion and pass through the nanopore driven by the electric field force. When these charged molecules are perforated, they will cause related signals, such as A change in the ionic current signal is detected. At present, nanopores have shown excellent performance in the field of molecular sensing such as the detection of DNA, protein, MicroRNA and trace metal ions.

Nanopores are divided into biological nanopores and solid-state nanopores. The pore size and thickness of biological nanopores are single, difficult to control, and their stability is not good enough. extensive attention. However, how to fabricate solid-state nanopores with reasonable detection resolution has been an industry challenge.

technical problem

The purpose of the present invention is to provide a method for manufacturing solid-state nanopores and a sensor including solid-state nanopores, and to solve the technical problem of how to manufacture solid-state nanopores with reasonable detection resolution.

technical solutions

The above-mentioned technical purpose of the present invention is achieved through the following technical solutions: According to one aspect of the present invention, a method for manufacturing solid-state nanopores is provided, the manufacturing method comprising the following steps: depositing a SiN layer on one side of a silicon substrate; A SiO2 layer is deposited on the SiN layer and the other side of the silicon substrate; a resist layer is prepared on the SiO2 layer on one side, and the resist layer and the SiO2 layer on this side are etched forming an etching groove, which exposes one side of the SiN layer, removes the resist layer on this side; prepares a resist layer on the SiO2 layer on the other side, and etches the other side The resist layer and the SiO2 layer form an etching groove, the etching grooves on both sides are aligned, and the etching groove on the other side exposes the other side of the silicon substrate, and removes the other side of the silicon substrate. the resist layer; gold electrodes are respectively printed on the SiO2 layers on both sides; the silicon substrate is etched from the exposed part of the other side of the silicon substrate, so that the other side of the SiN layer is exposed; Nanoholes are formed using a helium ion beam through the exposed portion of the SiN layer.

As a further optimization, the SiN layer is deposited on the silicon substrate by a low temperature chemical vapor deposition process or a plasma enhanced chemical vapor deposition process.

As a further optimization, the resist layer adopts positive photoresist. As a further optimization, the steps of etching the resist layer and the SiO ₂ layer on one side to form an etching groove and etching the resist layer and the SiO ₂ layer on the other side In the step of forming the etching groove, it specifically includes: forming a square groove in the resist layer by photolithography; removing the area of the resist layer inside the square groove by a developing process; etching the SiO ₂ layers form etched trenches.

As a further optimization, the positive photoresist is AZ-MIR 701 photoresist; and/or, the development process adopts CD-26 developer; and/or, the buffer oxide etching process is used to etch the described _SiO2 layer.

As a further optimization, the silicon substrate is etched by a KOH wet etching process.

As a further optimization, there are multiple etching grooves, and each of the etching grooves corresponds to one of the nanoholes.

As a further optimization, the gold electrode is printed on the SiO ₂ layer through a metal printing process. According to another aspect of the present invention, a sensor is provided, comprising a silicon substrate, one side of the silicon substrate is provided with a SiN layer and a SiO2 layer in sequence, the other side of the silicon substrate is provided with a SiO2 layer, and all the two sides are provided with a SiO2 layer. The SiO2 layers are all provided with gold electrodes, the two sides of the sensor are provided with etching grooves penetrating the corresponding SiO2 layers respectively, the etching grooves on the two sides are aligned, and the silicon substrate is provided with an etching cavity, The etching cavity is aligned with the etching groove, the SiN layer is provided with nano-holes, and the nano-holes communicate with the etching groove and the etching cavity on both sides.

As a further optimization, there are a plurality of the etching grooves, and a plurality of the nano-holes are in one-to-one correspondence with the etching grooves.

beneficial effect

To sum up, the present invention has the following beneficial effects: the method for manufacturing solid-state nanopores provided by the present invention can quickly and simply manufacture nanopores with reasonable resolution, the vertical resolution can be improved by adjusting the thickness of the SiN layer, and the Adjust the diameter of the nanohole to adjust the horizontal resolution, and the manufacturing method provided by the present invention is helpful for integration as an array, based on MEMS (Micro-Electro-Mechanical System, micro-electromechanical systems) and metal printing technology simplify the processing of wires and contact areas for further integrated design.

Description of drawings

1 is a schematic diagram of the process steps of the solid-state nanopore manufacturing method in the embodiment; FIG. 2 is a schematic structural diagram of the solid-state nanopore manufacturing method in the embodiment after performing step S1; FIG. 3 is the solid-state nanopore manufacturing method in the embodiment. Fig. 4 is a schematic structural diagram of the solid-state nanopore manufacturing method in the embodiment during the execution step S3; Fig. 5 is the structure of the solid-state nanopore manufacturing method in the embodiment after executing step S4 Schematic diagram; FIG. 6 is a schematic structural diagram of a front view of the solid-state nanopore manufacturing method in the embodiment after performing step S5; FIG. 7 is a structural schematic diagram of the back view of the solid-state nanopore manufacturing method in the embodiment after performing step S6; 8 is a schematic structural diagram of the front view of the solid-state nanopore manufacturing method in the embodiment after performing step S7; FIG. 9 is a half-cut structural schematic diagram of the sensor prepared by the solid-state nanopore manufacturing method in the embodiment.

Embodiments of the present invention

In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and more comprehensible, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

The present invention provides a method for manufacturing a solid-state nanopore. As shown in FIG. 1 , the manufacturing method includes the following steps: Step S1 , depositing a SiN layer on one side of a silicon substrate.

In step S2, a SiO2 layer is deposited on the SiN layer and the other side of the silicon substrate, respectively.

Step S3, prepare a resist layer on one side of the SiO2 layer, etch the resist layer and SiO2 layer on this side to form an etching groove, the etching groove exposes one side of the SiN layer, and removes the resist on this side agent layer.

Step S4, a resist layer is prepared on the SiO2 layer on the other side, the resist layer and the SiO2 layer on the other side are etched to form an etching groove, the etching grooves on the two sides are aligned, and the etching groove on the other side makes the silicon The other side of the substrate is exposed and the resist layer on this other side is removed.

In step S5, gold electrodes are printed on the SiO2 layers on both sides respectively.

In step S6, the silicon substrate is etched from the exposed part of the other side of the silicon substrate, so that the other side of the SiN layer is exposed.

In step S7, a helium ion beam is used to pass through the exposed portion of the SiN layer to form nanoholes.

It is worth noting that the above steps S3 and S4 do not have a strict sequence, and in the actual manufacturing process, these two steps can also be combined as needed, for example, resist layers are prepared on the SiO2 layers on both sides respectively, and then respectively. The corresponding resist layer and the SiO2 layer are etched to form etching grooves, and then the resist layers on both sides are removed respectively.

The manufacturing method of the solid-state nanopore of the present invention will be described in detail below with reference to the specific drawings.

First, step S1 is performed. As shown in FIG. 2, the SiN layer 14 is deposited on one side of the silicon substrate 12. For the convenience of description, one side is called the front side and the other side is called the back side in the following content, which is only for the convenience of description and not for limitation. Front and back in actual use. The SiN layer 14 is deposited on the front side of the silicon substrate 12 by various commonly used techniques, such as a low temperature chemical vapor deposition (LPCVD) process and a plasma enhanced chemical vapor deposition (PECVD) process, the SiN layer 14 serving as a thin film for forming nanopores , the diameter of the formed nanopores can be as small as 2 nm.

Then step S2 is performed, as shown in FIG. 3 , SiO2 layers 16a and 16b are deposited on the SiN layer 14 and the other side of the silicon substrate 12 respectively, the SiO2 layer 16a is deposited on the SiN layer 14, and the backside of the silicon substrate 12 is deposited The SiO2 layer 16b is provided, and the SiO2 layers 16a, 16b on both sides serve as non-conductive or insulating layers.

Then step S3 is performed, a resist layer 20 is prepared on the SiO2 layer 16a on one side, the resist layer 20 and the SiO2 layer 16a on this side are etched to form an etching groove 24a, and the etching groove 24a makes one side of the SiN layer 14 Exposure to remove the resist layer 20 on this side. As shown in FIG. 4 , a resist layer 20 is prepared on the SiO2 layer 16a on the front side. Specifically, the resist layer 20 uses a positive photoresist, such as AZ-MIR 701 photoresist. Etching the resist layer 20 and the SiO2 layer 16a on this side to form the etching groove 24a specifically includes: first, forming a square groove on the resist layer 20 by standard photolithography technology, in the case of using a positive photoresist , the area of the resist layer 20 inside the square groove is removed by a development process such as using CD-26 developer, and then the SiO2 layer 16a is formed by etching the SiO2 layer 16a by a wet etching technology such as buffer oxide etching (BOE). The grooves 24a are etched so that the front side of the SiN layer 14 is exposed. After the etching groove 24a is completed, the resist layer 20 is removed using an organic solvent such as acetone, as shown in FIG. 5 .

Then step S4 is performed, a resist layer is prepared on the SiO2 layer 16b on the other side, the resist layer and the SiO2 layer 16b on the other side are etched to form an etching groove 24b, and the etching grooves 24a and 24b on both sides are aligned. The etching groove 24b on the other side exposes the other side of the silicon substrate 12, and the resist layer on the other side is removed. An etching groove 24b is formed on the SiO2 layer 16b by the same method steps as the above-mentioned step S3 on the backside. As shown in FIG. 5, a specific area of the backside of the silicon substrate 12 is exposed for the next etching process. As an optimization, the manufacturing method of the solid nanopore provided by the present invention can also be integrated, that is, the method steps of steps S3 and S4 are used to etch the SiO2 layers 16a and 16b to form a plurality of etching grooves 24a and 24b.

Then step S5 is performed, and gold electrodes are printed on the SiO2 layers 16a and 16b on both sides respectively. As shown in FIG. 6, gold electrodes 30a, 30b, 30c, 30d are printed on the front SiO2 layer 16a by metal printing technology; as shown in FIG. 7, gold electrodes 40a, 40b, 40c, 40d are also printed by metal printing technology on the backside SiO2 layer 16b. As shown in FIGS. 6 and 7, the etching grooves 24a, 24b are surrounded by gold electrodes. When there are multiple etching grooves 24a, 24b, the layout of the gold electrodes is designed and printed according to process parameters to ensure normal functions.

Then step S6 is performed to etch the silicon substrate 12 from the exposed part of the other side of the silicon substrate 12, so that the other side of the SiN layer 14 is exposed, as shown in FIG. The exposed portion of the backside of the SiN layer 12 is etched until an etching cavity 50 is formed on the silicon substrate 12, thereby exposing the backside of the SiN layer 14.

Finally, step S7 is performed, using a helium ion beam to pass through the exposed part of the SiN layer 14 to form nanoholes 62 , as shown in FIG. ) of the helium ion beam passes through the exposed portions of the SiN layer 14 at the etched trenches 24a, 24b to form the nanoholes 62. When there are multiple etching grooves 24 a and 24 b, each etching groove 24 a needs to have a corresponding nanohole 62 , so that a plurality of nanoholes 62 can be formed on one SiN layer 14 .

The method for manufacturing solid-state nanoholes provided by the present invention can quickly and simply manufacture nanoholes 62 with reasonable resolution, the vertical resolution can be improved by adjusting the thickness of the SiN layer 14 , and the horizontal resolution can be adjusted by adjusting the diameter of the nanoholes 62 , and the manufacturing method provided by the present invention is helpful for array integration, based on MEMS (Micro-Electro-Mechanical System, micro-electromechanical systems) and metal printing technology simplify the processing of wires and contact areas for further integrated design.

The present invention also provides a sensor, which is prepared by the aforementioned manufacturing method. As shown in FIG. 8 and FIG. 9 , the sensor includes a silicon substrate 12, and one side of the silicon substrate is sequentially provided with a SiN layer 14 and SiO2 Layer 16a, the other side of the silicon substrate 12 is provided with a SiO2 layer 16b, the SiO2 layers 16a and 16b on both sides are provided with gold electrodes, the two sides of the sensor are provided with etching grooves 24a, 24b, and the etching grooves 24a on both sides are provided , 24b are aligned and respectively penetrate through the corresponding SiO2 layers 16a, 16b, the silicon substrate 12 is provided with an etching cavity 50, the etching cavity 50 is aligned with the etching groove 24a, the SiN layer 14 is provided with a nano-hole 62, the nano-hole 62 communicates with the etching groove 24a on both sides and the etching cavity 50 . As an optimization, there are multiple etching grooves 24a and 24b, and there are also multiple nanoholes 62, which correspond to the etching grooves 24a/24b one-to-one. The sensor can be applied to the detection of migration of biomolecules such as DNA, protein and RNA, electrochemical storage, and separation of liquids and gases. The above specific embodiments are only the explanation of the present invention, and they are not limitations of the present invention. Those skilled in the art can make modifications to the above embodiments without creative contribution as needed after reading this specification, but only within the scope of the present invention The claims are protected by patent law.

Industrial Applicability

The invention has the following beneficial effects: the manufacturing method of the solid-state nanopore provided by the invention can quickly and simply manufacture nanopores with reasonable resolution, the vertical resolution can be improved by adjusting the thickness of the SiN layer, and the diameter of the nanopore can be adjusted by adjusting the thickness of the SiN layer. Adjust the horizontal resolution, and the manufacturing method provided by the present invention facilitates integration as an array, based on MEMS (Micro-Electro-Mechanical System, micro-electromechanical systems) and metal printing technology simplify the processing of wires and contact areas for further integrated design. Therefore, it has industrial applicability.

Claims

A method for manufacturing solid-state nanopores, characterized in that: the manufacturing method comprises the following steps: depositing a SiN layer on one side of a silicon substrate; depositing a SiO2 layer on the SiN layer and the other side of the silicon substrate respectively ; Prepare a resist layer on the SiO layer of one side, etch the resist layer on this side and the SiO layer to form an etching groove, and the etching groove makes one side of the SiN layer exposed, removing the Remove the resist layer on this side; prepare a resist layer on the SiO2 layer on the other side, etch the resist layer and the SiO2 layer on the other side to form an etching groove, The etching grooves are aligned, the etching grooves on the other side expose the other side of the silicon substrate, and the resist layer on the other side is removed; gold electrodes are printed on the SiO2 layers on both sides respectively. ; Etching the silicon substrate from the exposed portion of the other side of the silicon substrate so that the other side of the SiN layer is exposed; using a helium ion beam to pass through the exposed portion of the SiN layer to form nanoholes.
The method for manufacturing a solid-state nanopore according to claim 1, wherein the SiN layer is deposited on the silicon substrate by a low temperature chemical vapor deposition process or a plasma enhanced chemical vapor deposition process.
The method for manufacturing a solid-state nanopore according to claim 1, wherein the resist layer is a positive photoresist.
The method for manufacturing solid-state nanopores according to claim 3, characterized in that: the step of etching the resist layer and the SiO2 layer on one side of the etching to form an etching groove and the etching of the other side of the etching groove In the step of forming an etching groove on the resist layer and the SiO2 layer, the steps specifically include: forming a square groove on the resist layer by a photolithography technique; removing the square groove on the resist layer by a developing process; The area inside the groove; etching the SiO2 layer to form an etching groove.
The method for manufacturing solid-state nanopores according to claim 4, wherein the positive photoresist is AZ-MIR 701 photoresist; and/or, the development process adopts CD-26 developer; and/or, the SiO2 layer is etched through a buffer oxide etching process.
The method for manufacturing a solid-state nanopore according to claim 1, wherein the silicon substrate is etched by a KOH wet etching process.
The method for manufacturing a solid-state nanopore according to claim 1, wherein a plurality of the etching grooves are etched, and each of the etching grooves corresponds to one of the nanopores.
The method for manufacturing a solid-state nanopore according to claim 1, wherein the gold electrode is printed on the SiO2 layer by a metal printing process.
A sensor is characterized by comprising a silicon substrate, one side of the silicon substrate is provided with a SiN layer and a SiO2 layer in sequence, the other side of the silicon substrate is provided with a SiO2 layer, and the SiO2 layers on both sides are A gold electrode is provided, both sides of the sensor are provided with etching grooves that penetrate through the corresponding SiO2 layers respectively, the etching grooves on both sides are aligned, and an etching cavity is opened on the silicon substrate, and the etching cavity Aligned with the etching groove, the SiN layer is provided with nano-holes, and the nano-holes communicate with the etching groove and the etching cavity on both sides.
The sensor according to claim 9, wherein there are a plurality of the etching grooves, and a plurality of the nano-holes are in one-to-one correspondence with the etching grooves.