WO2022037618A1 - 交流检测电路 - Google Patents

交流检测电路 Download PDF

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Publication number
WO2022037618A1
WO2022037618A1 PCT/CN2021/113278 CN2021113278W WO2022037618A1 WO 2022037618 A1 WO2022037618 A1 WO 2022037618A1 CN 2021113278 W CN2021113278 W CN 2021113278W WO 2022037618 A1 WO2022037618 A1 WO 2022037618A1
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WIPO (PCT)
Prior art keywords
diode
current
power supply
input terminal
detection circuit
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PCT/CN2021/113278
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English (en)
French (fr)
Inventor
夏虎
吴春达
王冬峰
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上海南麟电子股份有限公司
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Priority to US18/021,815 priority Critical patent/US20240085492A1/en
Publication of WO2022037618A1 publication Critical patent/WO2022037618A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
    • G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
    • G01R19/16547—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies voltage or current in AC supplies
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40—Testing power supplies
    • G01R31/42—AC power supplies
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

Definitions

  • the invention relates to the field of integrated circuit design and application, in particular to an AC detection circuit.
  • an external power source such as a battery is generally used to drive the detection circuit, and the detection circuit is constituted by two comparators.
  • the detection circuit When the AC power supply does not supply power and is still connected to the electrical load, the detection circuit outputs a high-level signal, indicating that the electrical load has not been disconnected from the power supply terminal in time after the power outage.
  • the above detection circuit uses a battery as the power supply of the detection circuit.
  • the output signal used to represent the power supply state in the detection circuit also changes accordingly. This not only affects the detection accuracy of the detection circuit, but also leads to misjudgment of the power supply state.
  • FIG. 1 it is a schematic diagram of an AC detection circuit in the prior art.
  • the neutral and live wires of the AC power supply Vac are connected to a load 101, which includes the power grid lines and other loads connected to the power grid, and the resistance Rx represents the power grid between the neutral wire and the live wire after a power outage. Equivalent resistance of other loads.
  • the resistance Rx includes the on-resistance of the incandescent lamp and the resistance of the power grid line.
  • the AC detection circuit on the right is connected to the live wire input terminal VL and the AC neutral wire input terminal VN through the first resistor R1 and the second resistor R2, respectively.
  • the power supply Vbat can be a battery, which supplies power to the AC detection circuit through the NMOS transistor N1.
  • the clamping diode ZD1 When the input voltage between the live wire input terminal VL and the AC neutral input terminal VN is an AC voltage of 220V, the clamping diode ZD1 is broken down. At this time, the input voltage Vdet of one input terminal of the first comparator 102 is equal to the clamping voltage of the clamping diode ZD1, and the clamping voltage is greater than the reference voltage Vref2, and the output signal AC_det of the first comparator 102 is at a high level , then the NOT gate inv2 outputs a low level, and the signal EN output from the AND gate and1 is a low level.
  • the voltage value of Vdet is lower than Vref2 and higher than Vref1, the first comparison If the output signal AC_det of the comparator 102 is at a low level, and the output signal AC_det_R_det of the second comparator is at a high level, the signal EN output by the AND gate and1 is at a high level. At this time, the voltage value of Vdet satisfies:
  • Vdet can be calculated by the following formula:
  • the judgment threshold of Rx includes Vbat, that is, the power supply voltage value.
  • Vbat the power supply voltage value.
  • the power supply voltage of a power source such as a battery does not remain constant, but changes as the battery power changes.
  • the judgment threshold of the load resistance Rx in the above formula also changes with the fluctuation of Vbat.
  • the signal EN output by the AND gate and1 may fluctuate with the change of Vbat. This not only affects the detection accuracy of the detection circuit, but also may lead to misjudgment of the power supply state.
  • the purpose of the present invention is to provide an AC detection circuit, which is used to solve the problem that the output signal of the detection circuit in the prior art will fluctuate with the change of the power supply.
  • the present invention provides an AC detection circuit for detecting the power supply state of the AC power supply to the load, which is characterized in that, it includes:
  • first diode and a second diode whose anodes are connected to each other, the first diode and the second diode are Zener tubes, and the cathode of the second diode is grounded;
  • a first resistor one end of which is connected to the input end of the live wire, and the other end is connected to the cathode of the first diode;
  • a second resistor one end of which is connected to the neutral line input end, and the other end of which is connected to the cathode of the second diode;
  • a rectifier module which is connected to the live wire input end and the neutral wire input end;
  • a power supply for supplying power to the AC detection circuit
  • a current mirror module which has an input terminal, a first output terminal and a second output terminal, the input terminal is connected to the power supply, and the current values output by the first output terminal and the second output terminal have a fixed ratio
  • a unidirectional conduction module for unidirectional conduction of current from the first output end of the current mirror module to the cathode of the first diode
  • the current comparison module includes: an oscillator, a timer, a current comparator and a reference current source; the oscillator is used to generate a periodic oscillation signal as a clock signal of the timer; the current comparator has a first input terminal, a second input terminal and an output terminal, the current comparator The first input terminal of the current mirror module is connected to the second output terminal of the current mirror module, the second input terminal of the current comparator is connected to the reference current source, and the output terminal of the current comparator is connected to the timer; the The current comparator compares the current value of the second output terminal of the current mirror module with the reference current value of the reference current source, and outputs a comparison result signal; The comparison result signal is output after maintaining the timing value for the result signal.
  • the one-way conduction module includes:
  • An NMOS transistor the drain of which is connected to the first output end of the current mirror module, and the source of which is connected to the cathode of the first diode;
  • an amplifier which has a first input end, a second input end and an output end; the first input end of the amplifier is connected to a reference voltage source, the second input end of the amplifier is connected to the source of the NMOS tube, and the amplifier The output terminal is connected to the gate of the NMOS transistor.
  • the current mirror module includes: a first PMOS transistor and a second PMOS transistor whose gates are connected to each other; the power supply, the drain of the first PMOS transistor is connected to the first output terminal of the current mirror module and the gate of the first PMOS transistor, and the drain of the second PMOS transistor is connected to the current mirror module second output.
  • the ratio of the channel width to length ratio of the first PMOS transistor and the second PMOS transistor is 1:m.
  • the timer when there is no AC voltage between the live wire input terminal and the neutral wire input terminal, and the impedance Rx of the load satisfies the following conditions, the timer outputs a high-level signal :
  • M is the ratio of the output current of the second output terminal to the first output terminal of the current mirror module
  • Vref is the voltage value of the reference voltage source
  • Iref is the current value of the reference current source
  • R1 is The resistance value of the first resistor
  • R2 is the resistance value of the second resistor.
  • the reverse breakdown voltage and forward conduction voltage of the first diode and the second diode satisfy the following conditions:
  • V Z is the reverse breakdown voltage of the first diode and the second diode
  • V D is the forward direction of the first diode and the second diode Turn-on voltage
  • Vref is the voltage value of the reference voltage source.
  • the rectifier module includes:
  • the cathode of the fourth diode is connected to the input terminal of the neutral line, and the anode is grounded.
  • the reverse breakdown voltage of the third diode and the fourth diode is higher than the peak voltage of the AC power supply.
  • the rectifier module includes a bridge stack device and a second load;
  • the bridge stack device includes: a fifth diode, a sixth diode, a seventh diode, and an eighth diode diode; one end of the second load is connected to the anodes of the fifth diode and the sixth diode, and the other end is connected to the cathodes of the seventh diode and the eighth diode ;
  • the cathode of the fifth diode is connected to the anode of the seventh diode and the live wire input terminal;
  • the cathode of the sixth diode is connected to the anode of the eighth diode and the zero line input.
  • the present invention provides an AC detection circuit, which has the following beneficial effects:
  • the invention judges the power supply state of the AC power supply by detecting the resistance value between the neutral wire and the live wire of the AC power supply, and outputs a high level when there is no AC voltage between the neutral wire and the live wire of the AC power supply and the resistance value is less than the set value, otherwise the output is low
  • the detection threshold of the resistance value used to judge the power supply state is not affected by the fluctuation of the power supply, and will not change with the application environment. The reliability is good, and the circuit has a simple structure and is easy to design and debug.
  • FIG. 1 is a schematic diagram of an AC detection circuit in the prior art.
  • FIG. 2 is a schematic diagram of an AC detection circuit provided in Embodiment 1 of the present invention.
  • FIG. 3 is a diagram showing the relationship of the AC signal with time according to the first embodiment of the present invention.
  • FIG. 4 is a schematic diagram of an AC detection circuit provided in Embodiment 2 of the present invention.
  • Component label description 101-load; 102-first comparator; 103-second comparator; 201-load; 202-amplifier; 203-oscillator; 204-timer; 205-current comparator; 206-bridge stack device; 207-second load.
  • FIG. 2 Please refer to FIG. 4 to FIG. 4.
  • the diagrams provided in this embodiment are only for illustrating the basic concept of the present invention in a schematic way, although the diagrams only show components related to the present invention rather than actual implementation.
  • the number, shape and size of the components are drawn at the time of the drawing, and the shape, quantity and proportion of each component can be arbitrarily changed in actual implementation, and the layout of the components may also be more complicated.
  • FIG. 2 it is a schematic diagram of an AC detection circuit provided in this embodiment.
  • the AC detection circuit is used to detect the power supply state of the AC power supply Vac to the load 201, and is characterized in that, it includes:
  • a first resistor R1 one end of which is connected to the live wire input end VL, and the other end is connected to the cathode of the first diode ZD1;
  • a second resistor R2 one end of which is connected to the neutral input terminal VN, and the other end is connected to the cathode of the second diode ZD2;
  • a rectifier module which is connected to the live wire input terminal VL and the neutral wire input terminal VN;
  • a power supply Vbat which is used to supply power to the AC detection circuit
  • a current mirror module which has an input terminal, a first output terminal and a second output terminal, the input terminal is connected to the power supply Vbat, and the current values output by the first output terminal and the second output terminal have a fixed ratio ;
  • a unidirectional conduction module which is used for unidirectional conduction of current from the first output end of the current mirror module to the cathode of the first diode ZD1;
  • the current comparison module includes: an oscillator 203, a timer 204, a current comparison 205 and a reference current source Iref; the oscillator 203 is used to generate a periodic oscillation signal as the clock signal of the timer 204; the current comparator 205 has a first input terminal, a second input terminal and an output terminal, the first input terminal of the current comparator 205 is connected to the second output terminal of the current mirror module, the second input terminal of the current comparator 205 is connected to the reference current source Iref, and the current comparator 205 The output terminal of Iref is connected to the timer 204; the current comparator 205 compares the current value of the second output terminal of the current mirror module with the reference current value of the reference current source Iref, and outputs a comparison result signal ; The timer 204 is provided with a timing value Tcount, and the comparison result signal
  • FIG. 2 the circuit structure of the AC detection circuit and the specific structure and connection relationship of each module are shown in FIG. 2 .
  • the one-way conduction module includes:
  • the NMOS transistor N1 the drain of which is connected to the first output terminal of the current mirror module, and the source of which is connected to the cathode of the first diode ZD1;
  • the amplifier 202 has a first input terminal, a second input terminal and an output terminal; the first input terminal of the amplifier 202 is connected to the reference voltage source Vref, and the second input terminal of the amplifier 202 is connected to the source of the NMOS transistor N1 The output terminal of the amplifier 202 is connected to the gate of the NMOS transistor N1.
  • the current mirror module includes: a first PMOS transistor P1 and a second PMOS transistor P2 whose gates are connected to each other; a source of the first PMOS transistor P1 and the second PMOS transistor P2 The pole is connected to the power supply Vbat, the drain of the first PMOS transistor P1 is connected to the first output terminal of the current mirror module and the gate of the first PMOS transistor P1, and the drain of the second PMOS transistor P2 The second output terminal of the current mirror module is connected.
  • the ratio of the channel width to length ratio of the first PMOS transistor P1 and the second PMOS transistor P2 is 1:m.
  • the rectifier module includes:
  • the cathode of the fourth diode D4 is connected to the neutral line input terminal VN, and the anode is grounded.
  • the AC detection circuit provided in this embodiment is connected to the neutral wire and the live wire of the AC power supply, and detects the resistance of the load connected to the AC power supply to determine the power supply state of the AC power supply and whether the load is disconnected from the power supply circuit in a power-off state.
  • the neutral and live wires of the AC power supply Vac are connected to the load 201.
  • the load 201 includes loads such as grid lines and other electrical equipment connected to the grid, and the resistance Rx represents the neutral and live wires after a power failure. Equivalent resistance between the grid and other loads.
  • the AC detection circuit is respectively connected to the live wire input terminal VL and the AC neutral wire input terminal VN through the first resistor R1 and the second resistor R2.
  • the first input terminal of the amplifier 202 is connected to the reference voltage source Vref
  • the second input terminal of the amplifier 202 is connected to the source of the NMOS transistor N1
  • the output terminal of the amplifier 202 is connected to the gate of the NMOS transistor N1 pole.
  • the unidirectional conduction module allows current to only flow in one direction from the top to the bottom along the arrow direction of Idet1 in the figure by introducing the amplifier 202 and the NMOS transistor N1 connected by negative feedback.
  • the first diode ZD1 and the second diode ZD2 are both Zener tubes, and are connected back to back, that is, their respective anodes are connected to each other.
  • the reverse breakdown voltage of the first diode ZD1 and the second diode ZD2 is V Z
  • the forward conduction voltage of the first diode ZD1 and the second diode ZD2 is V D , and satisfy V Z +V D >Vref. Since the source voltage value when the NMOS transistor N1 is turned on is Vref, the current flowing from the source of the NMOS transistor N1 and passing through the first diode ZD1 and the second diode ZD2 is zero .
  • the above-mentioned connection structure of the first diode ZD1 and the second diode ZD2 can also prevent the current from flowing from the ground wire to the source of the NMOS transistor N1.
  • the anode of the third diode D3 is connected to the ground wire, and the cathode is connected to the live wire input terminal VL; the anode of the fourth diode D4 is connected to the ground wire, and the cathode is connected to the neutral wire input terminal VN.
  • the reverse breakdown voltages of the third diode D3 and the fourth diode D4 are both set to be higher than the peak voltage of the AC power supply Vac to prevent the diodes from being damaged by breakdown .
  • the current through the drain of the PMOS transistor P1 is equal to the current through the source of the NMOS transistor N1, the current value is Idet1, and the current through the PMOS transistor P2 The current value of the drain is Idet2.
  • the PMOS transistor P1 and the PMOS transistor P2 are connected to form a current mirror structure.
  • the ratio of the width to length ratio of the PMOS transistor P1 and the PMOS transistor P2 is 1:m, which is determined by the physical dimensions of the two devices.
  • the ratio of the drain current through the PMOS transistor P1 and the PMOS transistor P2 is:
  • the first input terminal of the current comparator 205 is connected to the drain of the PMOS transistor P2, and its input signal is the current Idet2 passing through the drain of the PMOS transistor P2 ;
  • the second input end of the current comparator 205 is connected to the reference current source Iref.
  • Idet2>Iref the output signal CLEAR of the current comparator 205 is high level; and when Idet2 ⁇ Iref, the output signal CLEAR of the current comparator 205 is low level.
  • the output signal CLEAR of the current comparator 205 is used as the clear signal of the timer 204 .
  • the timer 204 is cleared, and the output signal EN of the timer 204 is immediately reset to a low level.
  • the output signal CLEAR changes from a low level to a high level, the timer 204 starts to count. From the start of timing, after the timing value Tcount elapses, the output signal EN of the timer 204 will change from a low level to a high level.
  • the detection conditions of the AC detection circuit of this embodiment for different AC power supply states are classified as follows:
  • the The source of the NMOS transistor N1 flows out, and the current through the first resistor R1 and the second resistor R2 is zero. Since the source voltage value when the NMOS transistor N1 is turned on is Vref, and the voltage value when the first diode ZD1 and the second diode ZD2 are turned on is V Z +V D >Vref, therefore The current flowing from the source of the NMOS transistor N1 and passing through the first diode ZD1 and the second diode ZD2 is zero.
  • the total current flowing from the source of the NMOS transistor N1 is zero.
  • the output signal CLEAR of the comparator 205 is at a low level, the timer 204 is cleared, and the output signal EN of the timer 204 is at a low level.
  • the The source voltage of the NMOS transistor N1 is Vref
  • the output signal CLEAR of the current comparator 205 is at a high level, the timer 204 starts timing, and after the timing value Tcount elapses, the output signal EN of the timer 204 will be at a low level level transitions to a high level. It can be calculated from the above formula that the resistance Rx of the load 201 needs to satisfy:
  • the right side of the above inequality is the detection threshold of the resistance Rx, denoted as Rth, that is, when the resistance Rx of the load 201 is less than Rth, and the timer 204 passes the time value Tcount, the output signal EN of the timer 204 will be to high level.
  • the voltage VL of the live wire input terminal VL is lower than the voltage VN of the neutral wire input terminal VN , and the third diode D3 conducts forward
  • the first diode ZD1 and the second diode ZD2 are not conducting, the source voltage of the NMOS transistor N1 is Vref, and the current through the source of the NMOS transistor N1 is the same as the current through the source of the NMOS transistor N1.
  • the current of a resistor R1 is equal, and the current value is:
  • the output signal CLEAR of the current comparator 205 is changed from a low level to a high level, and the timer 204 counts.
  • the voltage value of the source VS of the NMOS transistor N1 is V Z +V D . Since the reverse breakdown voltage and the forward voltage of the first diode ZD1 and the second diode ZD2 have been set as V Z +V D >Vref in this embodiment, the NMOS transistor N1 has The gate voltage is pulled down, the NMOS transistor N1 is turned off, and the total current flowing from the source of the NMOS transistor N1 is zero.
  • the output signal of the current comparator 205 is a low level
  • the timer 204 is cleared, that is, when the alternating current Vac is in the positive half period, the timer 204 is cleared.
  • the timer 204 counts when the alternating current is in a negative half cycle, and is cleared when the alternating current is in a positive half cycle.
  • the output signal EN of the timer 204 will change from a low level to a high level only after the timing value Tcount has elapsed. Therefore, when the set timing value Tcount time is greater than 1/2 of the alternating current cycle, the timer 204 will be cleared before the full timing value Tcount time, and the output signal EN of the timer 204 is always kept low flat. Since the frequencies of the current civil AC level are usually 50Hz and 60Hz, and the corresponding periods are 20ms and 16.7ms, respectively, the timing value can be correspondingly set to Tcount>10ms.
  • the AC detection circuit provided in this embodiment has the advantages of simple circuit structure and easy implementation compared with the prior art.
  • the detection threshold Rth of the load resistance Rx it satisfies: Analysis of the above formula shows that the values of M, Vref, Iref, R1 and R2 in the formula have been determined during circuit design, and will not change with the environment during actual use, so they have better stability; in addition, the phase Compared with the technical solution of using three resistors in the prior art, this embodiment only introduces the first resistor R1 and the second resistor R2, omitting one resistor, and the connection between the live wire input terminal VL and the neutral wire input terminal is The impedance Rx only needs to meet an upper limit threshold, which is also convenient for technicians to select the resistance value of the resistor when designing the circuit, and it is convenient for the design and debugging of the detection circuit.
  • the rectifier module in this embodiment includes a bridge stack device 206 and a second load 207;
  • the bridge stack device 206 includes: a fifth diode D5, sixth diode D6, seventh diode D7 and eighth diode D8; one end of the second load 207 is connected to the fifth diode D5 and the sixth diode
  • the anode of the tube D6, the other end is connected to the cathode of the seventh diode D7 and the eighth diode D8;
  • the cathode of the fifth diode D5 is connected to the anode of the seventh diode D7 and the live wire input terminal VL;
  • the cathode of the sixth diode D6 is connected to the anode of the eighth diode D8 and the neutral wire input terminal VN.
  • the bridge stack device 206 when the bridge stack device 206 is connected between the live wire input terminal VL and the neutral wire input terminal VN, it can function as the third diode in the first embodiment D3 has the same function as the fourth diode D4.
  • Other technical solutions and effects of this embodiment are the same as those of the first embodiment, and are not repeated here.
  • the present invention provides an AC detection circuit, comprising: a live wire input end and a neutral wire input end; a first diode and a second diode whose anodes are connected to each other, the first diode and the The second diode is a Zener tube, and the cathode of the second diode is grounded; the first resistor is connected to the live wire input terminal at one end and the cathode of the first diode at the other end; Two resistors, one end of which is connected to the neutral line input end, and the other end is connected to the cathode of the second diode; a rectifier module, which is connected to the live line input end and the neutral line input end;
  • the AC detection circuit is powered; a current mirror module has an input end, a first output end and a second output end, the input end is connected to the power supply, and the first output end and the second output end output
  • the current value has a fixed ratio; the unidirectional conduction module is used to unidirectionally conduct the
  • the invention judges the power supply state of the AC power supply by detecting the resistance value between the neutral wire and the live wire of the AC power supply, and outputs a high level when there is no AC voltage between the neutral wire and the live wire of the AC power supply and the resistance value is less than the set value, otherwise the output is low
  • the detection threshold of the resistance value used for judging the power supply state is not affected by the fluctuation of the power supply, and will not change with the application environment. The reliability is good, and the circuit has a simple structure and is easy to design and debug.

Abstract

本发明提供了一种交流检测电路，包括：火线、零线输入端；由阳极互连的齐纳管构成的第一、第二二极管；第一电阻和第二电阻；连接火线、零线输入端的整流模块；供电的电源；电流镜模块，其第一输出端和第二输出端的电流值具有固定比例；单向导通模块，用于使电流镜模块单向导通第一二极管；电流比较模块，包括：振荡器、计时器、电流比较器和基准电流源，用于比对电流镜模块第二输出端电流值与基准电流值。本发明通过检测交流电源零线和火线之间的电阻值判断交流电源的供电状态，当零线和火线间无交流电压且电阻值小于设定值时输出高电平；用于判断供电状态的检测阈值不受供电电源波动影响，可靠性好，且电路结构简单、设计调试方便。

Description

交流检测电路 技术领域
本发明涉及集成电路设计及应用领域，特别是涉及一种交流检测电路。
背景技术
在采用交流电源对用电设备进行供电时，一般需要对交流电源的供电状态进行检测，以在交流电发生异常停电状况时，及时采取相应的应急措施，避免造成次生事故。例如，在停电发生后及时断开电源与电气设备的连接，以免供电恢复时设备意外重启造成事故；在停电后，常规照明设施无法正常工作时，则需要启用应急照明。对于上述需求，如采用专业的电网监控设备检测供电状态，则通常成本偏高，不利于停电检测的普及应用。
目前，在现有的交流电检测电路中，一般采用电池等外部电源驱动检测电路，通过两个比较器构成检测电路。当交流电源不供电，且其仍连接至用电负载时，检测电路输出高电平信号，表明用电负载在停电后未及时与供电端断开。
然而，上述检测电路采用电池作为检测电路的供电电源，当电池的电压值随着电池电量变化而出现波动时，检测电路中用于表征供电状态的输出信号也会随之改变。这不但影响了检测电路的检测精度，甚至还会导致对供电状态产生误判。
如图1所示，是现有技术中的一种交流检测电路的示意图。
在图1中，交流电源Vac的零线和火线连接负载101，所述负载101包括电网线路及其他接入电网的用电设备等负载，电阻Rx代表停电后零线和火线之间的电网及其他负载的等效电阻。例如，当一盏白炽灯通过电网连接所述交流电源Vac，当交流电源Vac停电时，所述电阻Rx就包括所述白炽灯的导通电阻以及电网线路的电阻。右侧的交流检测电路通过第一电阻R1和第二电阻R2分别连接火线输入端VL和交流零线输入端VN，电源Vbat可以是电池，其通过NMOS管N1向交流检测电路供电。
所述交流检测电路判断交流电源供电状态的工作原理如下：
当火线输入端VL和交流零线输入端VN之间的输入电压为220V的交流电压时，钳位二极管ZD1被击穿。此时，第一比较器102的一个输入端的输入电压Vdet等于钳位二极管ZD1的钳位电压，且该钳位电压大于参考电压Vref2，所述第一比较器102的输出信号AC_det为高电平，则非门inv2输出低电平，与门and1输出的信号EN为低电平。
当火线输入端VL和交流零线输入端VN之间的无交流电压，且所述负载101的电阻值Rx为无穷大时，第一比较器102的一个输入端被第三电阻R3下拉为零电平，所述第一比较 器102的输出信号AC_det和第二比较器103的输出信号AC_det_R_det都为低电平，则与门and1输出的信号EN为低电平。
当火线输入端VL和交流零线输入端VN之间的无交流电压，且所述负载101的电阻值Rx小于一定值时，Vdet的电压值低于Vref2且高于Vref1，所述第一比较器102的输出信号AC_det为低电平，第二比较器的输出信号AC_det_R_det为高电平，则与门and1输出的信号EN为高电平。此时，Vdet的电压值满足：
Vref1<Vdet<Vref2
且Vdet可以由如下公式计算得到：
Figure PCTCN2021113278-appb-000001
由上述可以进一步推得，当与门and1输出的信号EN为高电平时，所述负载101的电阻值Rx需要满足：
Figure PCTCN2021113278-appb-000002
从上式中可以看出，Rx的判断阈值包含Vbat，即电源电压值。然而，在交流检测电路的使用过程中，电池等电源的供电电压并非维持恒定不变，而是会随着电池电量的变化而改变。这就导致了上式中负载电阻Rx的判断阈值也随Vbat的波动而改变。当Rx的电阻值未发生变化时，与门and1输出的信号EN可能随Vbat变化而产生波动。这不但影响了检测电路的检测精度，也可能导致对供电状态产生误判。此外，在基于检测电路结构进行电路设计时，需要考虑满足上式中对于负载电阻Rx的判断阈值，对于第一电阻R1、第二电阻R2和第三电阻R3的选型计算较为复杂，导致技术人员在进行电路设计时需要额外花费较多精力。
因此，有必要提出一种新的交流检测电路，解决上述问题。
发明内容
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种交流检测电路，用于解决现有技术中检测电路的输出信号会随供电电源变化而产生波动的问题。
为实现上述目的及其它相关目的，本发明提供了一种交流检测电路，用于检测交流电源对于负载的供电状态，其特征在于，包括：
火线输入端和零线输入端；
阳极相互连接的第一二极管和第二二极管，所述第一二极管和所述第二二极管为齐纳管，所述第二二极管的阴极接地；
第一电阻，其一端连接所述火线输入端，另一端连接所述第一二极管的阴极；
第二电阻，其一端连接所述零线输入端，另一端连接所述第二二极管的阴极；
整流模块，其连接所述火线输入端和所述零线输入端；
电源，其用于向所述交流检测电路供电；
电流镜模块，其具有输入端、第一输出端和第二输出端，所述输入端连接所述电源，所述第一输出端和所述第二输出端所输出的电流值具有固定比例；
单向导通模块，其用于使电流从所述电流镜模块的第一输出端单向导通至所述第一二极管的阴极；
电流比较模块，其用于将所述电流镜模块的第二输出端的电流值与基准电流值进行比对并输出比对结果；所述电流比较模块包括：振荡器、计时器、电流比较器和基准电流源；所述振荡器用于产生周期性的振荡信号，作为所述计时器的时钟信号；所述电流比较器具有第一输入端、第二输入端和输出端，所述电流比较器的第一输入端连接所述电流镜模块的第二输出端，所述电流比较器的第二输入端连接所述基准电流源，所述电流比较器的输出端连接所述计时器；所述电流比较器将所述电流镜模块的第二输出端的电流值与所述基准电流源的基准电流值进行比对，并输出比对结果信号；所述计时器设有计时值，在所述比对结果信号维持所述计时值时间后输出所述比对结果信号。
作为本发明的一种可选方案，所述单向导通模块包括：
NMOS管，其漏极连接所述电流镜模块的第一输出端，源极连接所述第一二极管的阴极；
放大器，其具有第一输入端、第二输入端和输出端；所述放大器的第一输入端连接基准电压源，所述放大器的第二输入端连接所述NMOS管的源极，所述放大器的输出端连接所述NMOS管的栅极。
作为本发明的一种可选方案，所述电流镜模块包括：栅极相互连接的第一PMOS管和第二PMOS管；所述第一PMOS管和所述第二PMOS管的源极连接所述电源，所述第一PMOS管的漏极连接所述电流镜模块的第一输出端以及所述第一PMOS管的栅极，所述第二PMOS管的漏极连接所述电流镜模块的第二输出端。
作为本发明的一种可选方案，所述第一PMOS管和所述第二PMOS管的沟道宽长比的比值为1:m。
作为本发明的一种可选方案，当所述火线输入端和所述零线输入端之间无交流电压，且所述负载的阻抗Rx满足如下条件时，所述计时器输出高电平信号：
Figure PCTCN2021113278-appb-000003
上式中，M为所述电流镜模块的第二输出端与第一输出端的输出电流的比值，Vref为所述基准电压源的电压值，Iref为所述基准电流源的电流值，R1为第一电阻的电阻值，R2为第 二电阻的电阻值。
作为本发明的一种可选方案，所述第一二极管和所述第二二极管的反向击穿电压与正向导通电压满足如下条件：
V Z+V D>Vref
上式中，V Z为所述第一二极管和所述第二二极管的反向击穿电压，V D为所述第一二极管和所述第二二极管的正向导通电压，Vref为所述基准电压源的电压值。
作为本发明的一种可选方案，所述整流模块包括：
第三二极管，其阴极连接所述火线输入端，阳极接地；
第四二极管，其阴极连接所述零线输入端，阳极接地。
作为本发明的一种可选方案，所述第三二极管和所述第四二极管的反向击穿电压高于所述交流电源的峰值电压。
作为本发明的一种可选方案，所述整流模块包括桥堆器件和第二负载；所述桥堆器件包括：第五二极管、第六二极管、第七二极管和第八二极管；所述第二负载的一端连接所述第五二极管和所述第六二极管的阳极，另一端连接所述第七二极管和所述第八二极管的阴极；所述第五二极管的阴极连接所述第七二极管的阳极以及所述火线输入端；所述第六二极管的阴极连接所述第八二极管的阳极以及所述零线输入端。
如上所述，本发明提供一种交流检测电路，具有以下有益效果：
本发明通过检测交流电源零线和火线之间的电阻值判断交流电源的供电状态，当交流电源零线和火线之间无交流电压且电阻值小于设定值时输出高电平，否则输出低电平；用于判断供电状态的电阻值的检测阈值不受供电电源波动影响，不会随应用环境改变，可靠性好，且电路的结构简单、设计调试方便。
附图说明
图1显示为现有技术中的交流检测电路的示意图。
图2显示为本发明实施例一中提供的交流检测电路的示意图。
图3显示为本发明实施例一中提供的交流信号随时间变化关系图。
图4显示为本发明实施例二中提供的交流检测电路的示意图。
元件标号说明：101-负载；102-第一比较器；103-第二比较器；201-负载；202-放大器；203-振荡器；204-计时器；205-电流比较器；206-桥堆器件；207-第二负载。
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其它优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。
请参阅图2至图4需要说明的是，本实施例中所提供的图示仅以示意方式说明本发明的基本构想，虽图示中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制，其实际实施时各组件的形态、数量及比例可为一种随意的改变，且其组件布局形态也可能更为复杂。
实施例一
如图2所示，是本实施例提供的一种交流检测电路的示意图。所述交流检测电路用于检测交流电源Vac对于负载201的供电状态，其特征在于，包括：
火线输入端VL和零线输入端VN；
阳极相互连接的第一二极管ZD1和第二二极管ZD2，所述第一二极管ZD1和所述第二二极管ZD2为齐纳管，所述第二二极管ZD2的阴极接地；
第一电阻R1，其一端连接所述火线输入端VL，另一端连接所述第一二极管ZD1的阴极；
第二电阻R2，其一端连接所述零线输入端VN，另一端连接所述第二二极管ZD2的阴极；
整流模块，其连接所述火线输入端VL和所述零线输入端VN；
电源Vbat，其用于向所述交流检测电路供电；
电流镜模块，其具有输入端、第一输出端和第二输出端，所述输入端连接所述电源Vbat，所述第一输出端和所述第二输出端所输出的电流值具有固定比例；
单向导通模块，其用于使电流从所述电流镜模块的第一输出端单向导通至所述第一二极管ZD1的阴极；
电流比较模块，其用于将所述电流镜模块的第二输出端的电流值与基准电流值进行比对并输出比对结果；所述电流比较模块包括：振荡器203、计时器204、电流比较器205和基准电流源Iref；所述振荡器203用于产生周期性的振荡信号，作为所述计时器204的时钟信号；所述电流比较器205具有第一输入端、第二输入端和输出端，所述电流比较器205的第一输入端连接所述电流镜模块的第二输出端，所述电流比较器205的第二输入端连接所述基准电流源Iref，所述电流比较器205的输出端连接所述计时器204；所述电流比较器205将所述电流镜模块的第二输出端的电流值与所述基准电流源Iref的基准电流值进行比对，并输出比对结果信号；所述计时器204设有计时值Tcount，在所述比对结果信号维持所述计时值Tcount 时间后输出所述比对结果信号。
具体地，在本实施例中，所述交流检测电路的电路结构及各个模块的具体构成及连接关系如图2所示。
作为示例，如图2所示，所述单向导通模块包括：
NMOS管N1，其漏极连接所述电流镜模块的第一输出端，源极连接所述第一二极管ZD1的阴极；
放大器202，其具有第一输入端、第二输入端和输出端；所述放大器202的第一输入端连接基准电压源Vref，所述放大器202的第二输入端连接所述NMOS管N1的源极，所述放大器202的输出端连接所述NMOS管N1的栅极。
作为示例，如图2所示，所述电流镜模块包括：栅极相互连接的第一PMOS管P1和第二PMOS管P2；所述第一PMOS管P1和所述第二PMOS管P2的源极连接所述电源Vbat，所述第一PMOS管P1的漏极连接所述电流镜模块的第一输出端以及所述第一PMOS管P1的栅极，所述第二PMOS管P2的漏极连接所述电流镜模块的第二输出端。其中，所述第一PMOS管P1和所述第二PMOS管P2的沟道宽长比的比值为1:m。
作为示例，如图2所示，所述整流模块包括：
第三二极管D3，其阴极连接所述火线输入端VL，阳极接地；
第四二极管D4，其阴极连接所述零线输入端VN，阳极接地。
本实施例所述交流检测电路的工作原理如下：
本实施例提供的交流检测电路连接交流电源的零线和火线，通过对交流电源所接负载的电阻进行检测，以判断交流电源的供电状态以及断电状态下负载是否从供电电路中断开。
如图2所示，交流电源Vac的零线和火线连接负载201，本实施例中所述负载201包括电网线路及其他接入电网的用电设备等负载，电阻Rx代表停电后零线和火线之间的电网及其他负载的等效电阻。交流检测电路通过第一电阻R1和第二电阻R2分别连接火线输入端VL和交流零线输入端VN。
在图2中，放大器202的第一输入端连接基准电压源Vref，所述放大器202的第二输入端连接NMOS管N1的源极，所述放大器202的输出端连接所述NMOS管N1的栅极。通过上述连接关系，所述放大器202和所述NMOS管N1连接成负反馈结构。当其它信号对所述NMOS管N1的源极进行下拉时，所述NMOS管N1导通，从所述NMOS管N1的源极流出的电流跟随下拉信号改变，
Figure PCTCN2021113278-appb-000004
所述NMOS管N1的源极电压值维持为Vref；当其它信号对所述NMOS管N1的源极进行上拉时，所述NMOS管N1的栅极电压降低，使得所述NMOS管N1关闭，此时将没有电流经过所述NMOS管N1的源极和漏极。即是说，所述单向导通 模块通过引入负反馈连接的所述放大器202和所述NMOS管N1，使电流仅能从上方向下方沿图中Idet1的箭头方向单向流通。
如图2所示，所述第一二极管ZD1和所述第二二极管ZD2都是齐纳管，背靠背连接，即其各自的阳极相互连接。所述第一二极管ZD1和所述第二二极管ZD2的反向击穿电压为V Z，所述第一二极管ZD1和所述第二二极管ZD2的正向导通电压为V D，并满足V Z+V D>Vref。由于所述NMOS管N1导通时的源极电压值为Vref，因此从所述NMOS管N1源极流出并且经过所述第一二极管ZD1和所述第二二极管ZD2的电流为零。上述第一二极管ZD1和第二二极管ZD2的连接结构还可以避免电流从地线流向所述NMOS管N1的源极。
如图2所示，第三二极管D3的阳极连接地线，阴极连接火线输入端VL；第四二极管D4的阳极连接地线，阴极连接零线输入端VN。在本实施例中，所述第三二极管D3和所述第四二极管D4的反向击穿电压都设置为高于所述交流电源Vac的峰值电压，以防止二极管被击穿损坏。
如图2所示，在所述电流镜模块中，经过所述PMOS管P1漏极的电流与经过所述NMOS管N1源极的电流相等，该电流值为Idet1，而经过所述PMOS管P2漏极的电流值为Idet2。所述PMOS管P1和所述PMOS管P2连接构成电流镜结构，所述PMOS管P1和所述PMOS管P2的宽长比的比值为1:m，该比值由这两个器件的物理尺寸决定，从而使通过所述PMOS管P1和所述PMOS管P2的漏极电流的比值为：
Figure PCTCN2021113278-appb-000005
在理想条件下，可以认为m＝M，即所述PMOS管P1和所述PMOS管P2的漏极电流的比值等同于所述PMOS管P1和所述PMOS管P2的宽长比的比值，通过调整P1、P2两个PMOS管宽长比的比值，即可调节其漏极电流的比值。
如图2所示，在所述电流比较模块中，所述电流比较器205的第一输入端连接所述PMOS管P2的漏极，其输入信号为经过所述PMOS管P2漏极的电流Idet2；所述电流比较器205的第二输入端连接所述基准电流源Iref。当Idet2>Iref时，所述电流比较器205的输出信号CLEAR为高电平；而当Idet2<Iref时，所述电流比较器205的输出信号CLEAR为低电平。
所述电流比较器205的输出信号CLEAR作为所述计时器204的清零信号。当输出信号CLEAR为低电平时，所述计时器204被清零，计时器204的输出信号EN立刻被重置为低电平。当输出信号CLEAR由低电平变为高电平后，所述计时器204开始计时。从计时开始，再经过计时值Tcount时间后，所述计时器204的输出信号EN将由低电平转变为高电平。
基于上述电路结构设置，本实施例的交流检测电路对于不同的交流电源供电状态的检测情况分列如下：
当所述火线输入端VL和所述零线输入端VN之间无交流电压，且所述火线输入端VL 和所述零线输入端VN之间的负载201的电阻Rx为无穷大时，从所述NMOS管N1源极流出，且经过所述第一电阻R1和所述第二电阻R2的电流为零。由于所述NMOS管N1导通时的源极电压值为Vref，并且所述第一二极管ZD1和所述第二二极管ZD2导通时的电压值V Z+V D>Vref，因此从所述NMOS管N1源极流出并且经过所述第一二极管ZD1和所述第二二极管ZD2的电流为零。此时，从所述NMOS管N1源极流出的总电流为零。经过所述PMOS管P1漏极的电流与经过所述NMOS管N1源极的电流相等，即Idet1＝0，则经过所述PMOS管P2漏极的电流Idet2＝Idet1＝0<Iref，所述电流比较器205的输出信号CLEAR为低电平，所述计时器204被清零，所述计时器204的输出信号EN为低电平。
当所述火线输入端VL和所述零线输入端VN之间无交流电压，且所述火线输入端VL和所述零线输入端VN之间的负载201的电阻Rx小于一定值时，所述NMOS管N1源极电压为Vref，经过所述第一二极管ZD1和所述第二二极管ZD2的电流为零，从所述NMOS管N1源极流出并且经过所述第一电阻R1、负载电阻Rx和第二电阻R2的电流Idet1可以通过如下公式计算：
Figure PCTCN2021113278-appb-000006
而由于电流镜模块流出的电流比值固定为1:M，因此，经过所述PMOS管P2漏极的电流满足下式：
Figure PCTCN2021113278-appb-000007
当满足Idet2>Iref时，所述电流比较器205的输出信号CLEAR为高电平，所述计时器204进行计时，并在经过计时值Tcount时间后，所述计时器204的输出信号EN将由低电平转变为高电平。由以上公式可以推算得到负载201的电阻Rx此时需要满足：
Figure PCTCN2021113278-appb-000008
以上不等式的右侧即为电阻Rx的检测阈值，记为Rth，即当负载201的电阻Rx小于Rth，且所述计时器204经过计时值Tcount时间后，所述计时器204的输出信号EN将转为高电平。
当所述火线输入端VL和所述交流零线输入端VN之间的输入电压为交流电时，其为周期性的正弦电压：
Figure PCTCN2021113278-appb-000009
如图3所示，当该交流电Vac处于负半周期时，所述火线输入端VL的电压V L低于所述零线输入端VN的电压V N，所述第三二极管D3正向导通，所述火线输入端VL的电压值V L＝-V D3，其中，V D3为所述第三二极管D3正向导通时，其阳极与阴极的电压差值。此时，所述第一二极管ZD1和所述第二二极管ZD2不导通，所述NMOS管N1源极电压为Vref， 经过所述NMOS管N1源极的电流与经过所述第一电阻R1的电流相等，该电流值为：
Figure PCTCN2021113278-appb-000010
经过所述PMOS管P2漏极的电流满足下式：
Figure PCTCN2021113278-appb-000011
使得所述电流比较器205的输出信号CLEAR由低电平变为高电平，所述计时器204进行计时。
如图3所示，当该交流电Vac处于正半周期时，火线输入端VL电压V L高于零线输入端VN电压V N时，二极管D4正向导通，零线输入端VN的电压值V N＝-V D4，其中，V D4为所述第四二极管D4正向导通时，其阳极与阴极的电压差值。所述火线输入端VL输入为正电压，其电压值为：
Figure PCTCN2021113278-appb-000012
所述第一二极管ZD1被击穿，而所述第二二极管ZD2正向导通，此时所述NMOS管N1源极VS电压值为V Z+V D。由于本实施例已将所述第一二极管ZD1和所述第二二极管ZD2的反向击穿电压与正向导通电压设置为V Z+V D>Vref，所述NMOS管N1的栅极电压被拉低，所述NMOS管N1关断，从所述NMOS管N1源极流出的总电流为零。因此，经过所述PMOS管P2漏极的电流Idet1＝Idet2＝0<Iref，所述电流比较器205的输出信号为低电平，所述计时器204被清零，即当交流电Vac处于正半周期时，所述计时器204被清零。
由上述可知，当输入电压为交流电时，所述计时器204在交流电处于负半周期时计时，在交流电处于正半周期时清零。而当所述计时器204开始计时，只有经过计时值Tcount时间后，所述计时器204的输出信号EN才会由低电平变为高电平。因此，当设置的计时值Tcount时间大于交流电周期的1/2时，所述计时器204在计时满计时值Tcount时间之前就会被清零，所述计时器204的输出信号EN一直维持低电平。由于当前民用交流电平的频率通常为50Hz和60Hz，其对应的周期分别为20ms和16.7ms，因此可以对应地将计时值设置为Tcount>10ms。
由上述分析可知，在本实施例提供的交流检测电路中，只有当所述火线输入端VL和所述零线输入端VN之间无交流电压，且所述火线输入端VL和所述零线输入端之间的阻抗Rx满足：
Figure PCTCN2021113278-appb-000013
时，所述计时器204的输出信号EN才会变为高电平。而在其它两种情况下，所述计时器204的输出信号EN都将维持在低电平。
综上所述，本实施例所提供的交流检测电路相比现有技术具有电路结构简单、易于实现的优势。对于负载电阻Rx的检测阈值Rth，其满足：
Figure PCTCN2021113278-appb-000014
分析上式可知，式中的M、Vref、Iref、R1和R2的值在电路设计时就已经确定，而不会在实际使用过程中随 环境改变，因此具有更好的稳定性；此外，相比现有技术中采用三个电阻的技术方案，本实施例仅引入了第一电阻R1和第二电阻R2，省去了一个电阻，且所述火线输入端VL和所述零线输入端之间的阻抗Rx仅需要满足一个上限阈值，这也便于技术人员在电路设计时对于电阻的阻值选型，方便了检测电路的设计与调试。
实施例二
如图4所示，是本实施例提供的一种交流检测电路的示意图。本实施例作为实施例一的一种替代方案，其与实施例一的区别在于：本实施例中的整流模块包括桥堆器件206和第二负载207；所述桥堆器件206包括：第五二极管D5、第六二极管D6、第七二极管D7和第八二极管D8；所述第二负载207的一端连接所述第五二极管D5和所述第六二极管D6的阳极，另一端连接所述第七二极管D7和所述第八二极管D8的阴极；所述第五二极管D5的阴极连接所述第七二极管D7的阳极以及所述火线输入端VL；所述第六二极管D6的阴极连接所述第八二极管D8的阳极以及所述零线输入端VN。
在本实施例中，当所述桥堆器件206连接于所述火线输入端VL和所述零线输入端VN之间时，其可以起到与实施例一中的所述第三二极管D3和所述第四二极管D4相同的作用。本实施例的其他技术方案及功效与实施例一相同，此处不再赘述。
综上所述，本发明提供了一种交流检测电路，包括：火线输入端和零线输入端；阳极相互连接的第一二极管和第二二极管，所述第一二极管和所述第二二极管为齐纳管，所述第二二极管的阴极接地；第一电阻，其一端连接所述火线输入端，另一端连接所述第一二极管的阴极；第二电阻，其一端连接所述零线输入端，另一端连接所述第二二极管的阴极；整流模块，其连接所述火线输入端和所述零线输入端；电源，其用于向所述交流检测电路供电；电流镜模块，其具有输入端、第一输出端和第二输出端，所述输入端连接所述电源，所述第一输出端和所述第二输出端所输出的电流值具有固定比例；单向导通模块，其用于使电流从所述电流镜模块的第一输出端单向导通至所述第一二极管的阴极；电流比较模块，其用于将所述电流镜模块的第二输出端的电流值与基准电流值进行比对并输出比对结果；所述电流比较模块包括：振荡器、计时器、电流比较器和基准电流源；所述振荡器用于产生周期性的振荡信号，作为所述计时器的时钟信号；所述电流比较器具有第一输入端、第二输入端和输出端，所述电流比较器的第一输入端连接所述电流镜模块的第二输出端，所述电流比较器的第二输入端连接所述基准电流源，所述电流比较器的输出端连接所述计时器；所述电流比较器将所述电流镜模块的第二输出端的电流值与所述基准电流源的基准电流值进行比对，并输出比对 结果信号；所述计时器设有计时值，在所述比对结果信号维持所述计时值时间后输出所述比对结果信号。本发明通过检测交流电源零线和火线之间的电阻值判断交流电源的供电状态，当交流电源零线和火线之间无交流电压且电阻值小于设定值时输出高电平，否则输出低电平；用于判断供电状态的电阻值的检测阈值不受供电电源波动影响，不会随应用环境改变，可靠性好，且电路的结构简单、设计调试方便。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (10)

  1. 一种交流检测电路，用于检测交流电源对于负载的供电状态，其特征在于，包括：
    火线输入端和零线输入端；
    阳极相互连接的第一二极管和第二二极管，所述第一二极管和所述第二二极管为齐纳管，所述第二二极管的阴极接地；
    第一电阻，其一端连接所述火线输入端，另一端连接所述第一二极管的阴极；
    第二电阻，其一端连接所述零线输入端，另一端连接所述第二二极管的阴极；
    整流模块，其连接所述火线输入端和所述零线输入端；
    电源，其用于向所述交流检测电路供电；
    电流镜模块，其具有输入端、第一输出端和第二输出端，所述输入端连接所述电源，所述第一输出端和所述第二输出端所输出的电流值具有固定比例；
    单向导通模块，其用于使电流从所述电流镜模块的第一输出端单向导通至所述第一二极管的阴极；
    电流比较模块，其用于将所述电流镜模块的第二输出端的电流值与基准电流值进行比对并输出比对结果；所述电流比较模块包括：振荡器、计时器、电流比较器和基准电流源；所述振荡器用于产生周期性的振荡信号，作为所述计时器的时钟信号；所述电流比较器具有第一输入端、第二输入端和输出端，所述电流比较器的第一输入端连接所述电流镜模块的第二输出端，所述电流比较器的第二输入端连接所述基准电流源，所述电流比较器的输出端连接所述计时器；所述电流比较器将所述电流镜模块的第二输出端的电流值与所述基准电流源的基准电流值进行比对，并输出比对结果信号；所述计时器设有计时值，在所述比对结果信号维持所述计时值时间后输出所述比对结果信号。
  2. 根据权利要求1所述的交流检测电路，其特征在于，所述单向导通模块包括：
    NMOS管，其漏极连接所述电流镜模块的第一输出端，源极连接所述第一二极管的阴极；
    放大器，其具有第一输入端、第二输入端和输出端；所述放大器的第一输入端连接基准电压源，所述放大器的第二输入端连接所述NMOS管的源极，所述放大器的输出端连接所述NMOS管的栅极。
  3. 根据权利要求2所述的交流检测电路，其特征在于，所述电流镜模块包括：栅极相互连接的第一PMOS管和第二PMOS管；所述第一PMOS管和所述第二PMOS管的源极连接所述电源，所述第一PMOS管的漏极连接所述电流镜模块的第一输出端以及所述 第一PMOS管的栅极，所述第二PMOS管的漏极连接所述电流镜模块的第二输出端。
  4. 根据权利要求3所述的交流检测电路，其特征在于，所述第一PMOS管和所述第二PMOS管的沟道宽长比的比值为1:m。
  5. 根据权利要求4所述的交流检测电路，其特征在于，当所述火线输入端和所述零线输入端之间无交流电压，且所述负载的阻抗Rx满足如下条件时，所述计时器输出高电平信号：
    Figure PCTCN2021113278-appb-100001
    上式中，M为所述电流镜模块的第二输出端与第一输出端的输出电流的比值，Vref为所述基准电压源的电压值，Iref为所述基准电流源的电流值，R1为第一电阻的电阻值，R2为第二电阻的电阻值。
  6. 根据权利要求3所述的交流检测电路，其特征在于，所述第一二极管和所述第二二极管的反向击穿电压与正向导通电压满足如下条件：
    V Z+V D>Vref
    上式中，V Z为所述第一二极管和所述第二二极管的反向击穿电压，V D为所述第一二极管和所述第二二极管的正向导通电压，Vref为所述基准电压源的电压值。
  7. 根据权利要求3所述的交流检测电路，其特征在于，所述计时器中设置的所述计时值大于所述交流电源的交流电周期的1/2。
  8. 根据权利要求1所述的交流检测电路，其特征在于，所述整流模块包括：
    第三二极管，其阴极连接所述火线输入端，阳极接地；
    第四二极管，其阴极连接所述零线输入端，阳极接地。
  9. 根据权利要求8所述的交流检测电路，其特征在于，所述第三二极管和所述第四二极管的反向击穿电压高于所述交流电源的峰值电压。
  10. 根据权利要求1所述的交流检测电路，其特征在于，所述整流模块包括桥堆器件和第二负载；所述桥堆器件包括：第五二极管、第六二极管、第七二极管和第八二极管； 所述第二负载的一端连接所述第五二极管和所述第六二极管的阳极，另一端连接所述第七二极管和所述第八二极管的阴极；所述第五二极管的阴极连接所述第七二极管的阳极以及所述火线输入端；所述第六二极管的阴极连接所述第八二极管的阳极以及所述零线输入端。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114992806A (zh) * 2022-06-13 2022-09-02 珠海格力电器股份有限公司 一种空调的零火线线序调理装置及其控制方法
CN116256588A (zh) * 2023-05-15 2023-06-13 深圳利普芯微电子有限公司 一种交流检测电路、芯片及应急照明系统
CN117554687A (zh) * 2024-01-10 2024-02-13 常州通宝光电股份有限公司 一种交流市电电压采样电路

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111707962B (zh) * 2020-08-20 2020-11-10 上海南麟电子股份有限公司 交流检测电路
CN111929504B (zh) 2020-09-28 2020-12-18 上海南麟电子股份有限公司 交流电阻检测电路及系统
CN113985856A (zh) * 2021-11-16 2022-01-28 广西电网有限责任公司电力科学研究院 一种温控器开关量检测装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998043100A2 (en) * 1997-03-21 1998-10-01 Koninklijke Philips Electronics N.V. Current and voltage sensing
TW200849790A (en) * 2007-06-13 2008-12-16 Himax Tech Ltd Negative voltage detection circuit for synchronous rectifier MOSFET
CN104600963A (zh) * 2014-12-30 2015-05-06 上海贝岭股份有限公司 一种开关电源输出电压双模检测电路
CN207866887U (zh) * 2018-03-16 2018-09-14 重庆力华自动化技术有限责任公司 一种交流电压检测电路
CN108957108A (zh) * 2018-08-17 2018-12-07 无锡麟力科技有限公司 一种市电停电检测电路
CN111707962A (zh) * 2020-08-20 2020-09-25 上海南麟电子股份有限公司 交流检测电路

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2738897C2 (de) * 1977-08-29 1984-04-05 Robert Bosch Gmbh, 7000 Stuttgart Spannungsregler
WO1997013314A1 (en) * 1995-10-02 1997-04-10 Philips Electronics N.V. Switched-mode power supply with transformer and feedback via primary winding
CN2563626Y (zh) * 2002-04-26 2003-07-30 戴建文 停电识别与停电抄表式变压器监控器
KR100866967B1 (ko) * 2007-05-10 2008-11-05 삼성전자주식회사 밴드갭 기준 전압 발생 회로를 이용한 이상 전압 검출 및차단 회로
CN101414211B (zh) * 2007-10-18 2012-07-18 鸿富锦精密工业（深圳）有限公司 电源侦测电路
TWI414794B (zh) * 2010-03-12 2013-11-11 Hon Hai Prec Ind Co Ltd 交流電源量測電路
CN102788895A (zh) * 2011-05-18 2012-11-21 富泰华工业（深圳）有限公司 交流电压侦测电路
CN103033672A (zh) * 2012-12-17 2013-04-10 王丽莎 一种停电监测警示方法
US9231472B2 (en) * 2014-04-11 2016-01-05 Infineon Technologies Austria Ag System and method for a switched-mode power supply
CN207069578U (zh) * 2017-05-09 2018-03-02 普冉半导体（上海）有限公司 一种电源反向保护电路
US10491207B2 (en) * 2017-09-07 2019-11-26 Infineon Technologies Austria Ag Method of over current and over voltage protection of a power switch in combination with regulated DI/DT and DV/DT

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998043100A2 (en) * 1997-03-21 1998-10-01 Koninklijke Philips Electronics N.V. Current and voltage sensing
TW200849790A (en) * 2007-06-13 2008-12-16 Himax Tech Ltd Negative voltage detection circuit for synchronous rectifier MOSFET
CN104600963A (zh) * 2014-12-30 2015-05-06 上海贝岭股份有限公司 一种开关电源输出电压双模检测电路
CN207866887U (zh) * 2018-03-16 2018-09-14 重庆力华自动化技术有限责任公司 一种交流电压检测电路
CN108957108A (zh) * 2018-08-17 2018-12-07 无锡麟力科技有限公司 一种市电停电检测电路
CN111707962A (zh) * 2020-08-20 2020-09-25 上海南麟电子股份有限公司 交流检测电路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114992806A (zh) * 2022-06-13 2022-09-02 珠海格力电器股份有限公司 一种空调的零火线线序调理装置及其控制方法
CN114992806B (zh) * 2022-06-13 2023-06-30 珠海格力电器股份有限公司 一种空调的零火线线序调理装置及其控制方法
CN116256588A (zh) * 2023-05-15 2023-06-13 深圳利普芯微电子有限公司 一种交流检测电路、芯片及应急照明系统
CN117554687A (zh) * 2024-01-10 2024-02-13 常州通宝光电股份有限公司 一种交流市电电压采样电路
CN117554687B (zh) * 2024-01-10 2024-03-22 常州通宝光电股份有限公司 一种交流市电电压采样电路

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