WO2022022264A1 - 表声波谐振器及其制造方法 - Google Patents

表声波谐振器及其制造方法 Download PDF

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Publication number
WO2022022264A1
WO2022022264A1 PCT/CN2021/105646 CN2021105646W WO2022022264A1 WO 2022022264 A1 WO2022022264 A1 WO 2022022264A1 CN 2021105646 W CN2021105646 W CN 2021105646W WO 2022022264 A1 WO2022022264 A1 WO 2022022264A1
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WIPO (PCT)
Prior art keywords
cavity
layer
acoustic wave
conductive
wave resonator
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PCT/CN2021/105646
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English (en)
French (fr)
Inventor
黄河
李伟
罗海龙
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中芯集成电路（宁波）有限公司上海分公司
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Publication of WO2022022264A1 publication Critical patent/WO2022022264A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/25—Constructional features of resonators using surface acoustic waves

Definitions

  • SAW devices surface acoustic wave devices
  • SAW devices surface acoustic wave devices
  • SAW devices are circuit elements that convert electrical signals into surface waves and perform signal processing, and are widely used as filters, resonators, and the like.
  • the surface acoustic wave resonator is made of two interdigital transducers on the polished surface of the substrate material with piezoelectric properties, which are respectively used as a transmitting transducer and a receiving transducer.
  • the transmitting transducer converts the RF signal into a surface acoustic wave, which propagates on the surface of the substrate.
  • the receiving transducer converts the acoustic signal into an electrical signal for output.
  • the filtering process is from electricity to sound and from sound to electricity. realized in piezoelectric conversion.
  • the purpose of the present invention is to provide a surface acoustic wave resonator and a manufacturing method thereof, which can solve the problem of acoustic wave loss, avoid damaging the flatness of the piezoelectric layer, enhance the structural strength of the resonator, improve the quality factor (Q), and further improve the device's performance. overall performance.
  • the present invention provides a method for manufacturing a surface acoustic wave resonator, comprising: a substrate and a piezoelectric layer disposed on the substrate; an interdigital transducer, disposed on the upper surface of the piezoelectric layer; A first dielectric layer is provided between the gaps of the device, and a first cavity is provided between at least part of the lower surface of the first dielectric layer and the upper surface of the piezoelectric layer.
  • the interdigital transducer adopts metal material with lower resistivity and better thermal conductivity, which can reduce impedance and enhance thermal conductivity;
  • the dielectric layer adopts high thermal conductivity dielectric material, so as to enhance thermal conductivity.
  • a second dielectric layer is arranged on the outer periphery of the IDT to form a support for the IDT.
  • the sacrificial layer is made of ⁇ -C material, which facilitates the subsequent formation of a thin first cavity with a smaller height.
  • Substrate 1. Supporting layer; 12. Base; 2. Piezoelectric layer; 3. Interdigital transducer; 31. First group of interdigital transducers; 312, the first conductor; 32, the second group of interdigital transducers; 321, the second conductive interdigital; 322, the second conductor; 4, the dielectric layer; 41, the first dielectric layer; 42, the second Dielectric layer; 5, first cavity; 5', sacrificial layer; 61, first conductive bump; 62, second conductive bump; 7, cavity; 71, first sub cavity; 72, second sub 91, the first cavity; 92, the second cavity.
  • the present invention provides a surface acoustic wave resonator.
  • a surface acoustic wave resonator By providing a first cavity between the lower surface of a part of the dielectric layer and the upper surface of the piezoelectric layer, the dielectric layer between the interdigital transducers is formed. It can be suspended to solve the problem of acoustic wave loss, and can avoid destroying the flatness of the piezoelectric layer, enhance the structural strength of the resonator, improve the quality factor (Q), and then improve the overall performance of the device.
  • FIG. 1A is a top view of a surface acoustic wave resonator structure according to an embodiment of the present invention.
  • the left picture is a schematic cross-sectional structure diagram of a thin-film bulk acoustic resonator along AA shown in FIG. 1A
  • the right picture is FIG. 1A
  • the cross-sectional structure diagram of a thin-film bulk acoustic resonator along BB is shown, please refer to FIG. 1A and FIG. 1
  • the surface acoustic resonator includes: a substrate 1 and a piezoelectric layer 2 arranged on the substrate 1; an interdigital transducer 3.
  • the material of the substrate 1 can be any suitable substrate known to those skilled in the art, for example, it can be at least one of the following materials: silicon (Si), germanium (Ge), germanium Silicon (SiGe), Silicon Carbon (SiC), Silicon Germanium Carbon (SiGeC), Indium Arsenide (InAs), Gallium Arsenide (GaAs), Indium Phosphide (InP) or other III/V compound semiconductors.
  • the bonding layer can also use adhesives such as light-curing materials or heat-curing materials, such as adhesive film (Die Attach Film, DAF) or dry film (Dry Film) etc.
  • the material of the base 12 can be the same as the material of the substrate 1, the material of the support layer 11 can be the same as the material of the substrate 1, and can also be any suitable dielectric material, including but not limited to silicon oxide, silicon nitride, silicon oxynitride, One of the materials such as silicon carbonitride.
  • the substrate 1 may be a single-layer structure.
  • the substrate 1 may be provided with a Bragg sound wave reflection layer, and the interdigital transducer is located above the area surrounded by the Bragg sound wave reflection layer.
  • the Bragg reflection layer structure includes a first acoustic impedance layer and a second acoustic impedance layer stacked in sequence, the impedances of the first acoustic impedance layer and the second acoustic impedance layer are different, and the first acoustic impedance layer and the second acoustic impedance layer The thickness of each is an odd multiple of a quarter of the wavelength of a sound wave.
  • a piezoelectric layer 2 is provided above the substrate 1, and the piezoelectric layer 2 can be combined with the substrate 1 by bonding or deposition.
  • the bonding method and deposition method can refer to the bonding or deposition method of the support layer 11 and the substrate 12 above.
  • the piezoelectric layer 2 and the substrate 1 can also be bonded through a bonding layer.
  • the material of the layer refer to the above-mentioned bonding layer, which will not be repeated here.
  • the piezoelectric layer 2 can be made of aluminum nitride (AlN), zinc oxide (ZnO), lead zirconate titanate (PZT), lithium niobate (LiNbO3), quartz (Quartz), potassium niobate (KNbO3) or tantalic acid Piezoelectric materials having a wurtzite crystal structure, such as lithium (LiTaO3), and combinations thereof.
  • the piezoelectric layer 2 may further include a rare earth metal such as at least one of scandium (Sc), erbium (Er), yttrium (Y), and lanthanum (La).
  • the piezoelectric layer 2 when the piezoelectric layer 2 includes aluminum nitride (AlN), the piezoelectric layer 2 may further include a transition metal such as at least one of zirconium (Zr), titanium (Ti), manganese (Mn), and hafnium (Hf). kind.
  • the piezoelectric layer may be deposited using any suitable method known to those skilled in the art, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
  • the piezoelectric layer 2 is provided with an interdigital transducer 3 , and the interdigital transducer 3 includes: a first group of interdigital transducers 31 and a second group of interdigital transducers 32 .
  • the first group of interdigital transducers 31 can be used as transmitting transducers to convert radio frequency signals into surface acoustic waves and propagate on the surface of the piezoelectric layer 2, and can also be used as receiving transducers to convert acoustic signals
  • the second group of interdigital transducers 32 can also be used as transmitting transducers or receiving transducers.
  • the second group The interdigital transducer 32 acts as a receiving transducer and vice versa.
  • the first group of interdigital transducers 31 and the second group of interdigital transducers 32 are connected to the alternating current, the first group of interdigital transducers 31 and the second group of interdigital transducers 32 are respectively used as transmitting transducers and receive the transducer and are in a dynamic process.
  • the lower ends of the first group of interdigital transducers 31 and the second group of interdigital transducers 32 may or may not be in contact with the piezoelectric layer 2 .
  • the conversion effect of acoustic and electrical signals is the best; when the lower ends of the first and second group of interdigital transducers 31 and 32 When the piezoelectric layer 2 is not in contact, the stress caused by the contact of different materials can be avoided.
  • the first group of interdigital transducers 31 includes at least one first conductive interdigital digit 311
  • the second group of interdigital transducers 32 includes at least one second conductive interdigitated finger 321
  • the first conductive interdigitated finger 311 and the second The conductive prongs 321 are parallel to each other.
  • the first group of interdigital transducers 31 further includes a first electrical conductor 312 that facilitates electrical connection
  • the second group of interdigital transducers 32 further includes a second electrical conductor 322 that facilitates electrical connection.
  • One conductive finger 311 is electrically connected
  • the second conductor 322 is electrically connected to all the second conductive fingers 321 .
  • the lower surface of the first electrical conductor 312 may be partially located within the boundary range of the first cavity 5 , partially located on the upper surface of the piezoelectric layer 2 , or entirely within the boundary range of the first cavity 5 , or All are located outside the boundary range of the first cavity 5; and/or, the lower surface of the second electrical conductor 322 may be partially located within the boundary range of the first cavity 5, partially located on the upper surface of the piezoelectric layer 2, or completely located in the first cavity 5. Within the boundary range of the cavity 5 , all of them may be located outside the boundary range of the first cavity 5 .
  • the first dielectric layer 41 between the second conductive body 322 and the first conductive fingers 311 is suspended, so as to prevent the first dielectric layer 41 therebetween from causing loss to the acoustic wave and to piezoelectricize the longitudinal acoustic wave on the layer 2 .
  • the first group of interdigital transducers 31 and the second group of interdigital transducers 32 are connected to the alternating current, sound waves are reflected back and forth between the adjacent first conductive interdigital transducers 311 and second conductive interdigital transducers 322 to form oscillations.
  • the first conductive fingers 311 and the second conductive fingers 321 can use any suitable conductive material or semiconductor material known to those skilled in the art, wherein the conductive material can be a metal material with conductive properties, for example, made of Molybdenum (Mo), Aluminum (Al), Copper (Cu), Tungsten (W), Tantalum (Ta), Platinum (Pt), Ruthenium (Ru), Rhodium (Rh), Iridium (Ir), Chromium (Cr), Titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and other metals made of one or a stack formed of the above metals, semiconductor materials such as Si, Ge, SiGe, SiC, SiGeC, etc.
  • the interdigital transducer 3 may be formed by deposition, electroplating or etching, and the deposition may be physical vapor deposition such as magnetron sputtering, evaporation, or chemical vapor deposition.
  • the materials of the first group of interdigital transducers 31 and the second group of interdigital transducers 32 may be conductive materials with low impedance, such as one or more of gold, silver, tungsten, platinum, aluminum, and copper.
  • the material of the first conductor 312 is the same as that of the first conductive fingers 311 ; and/or the material of the second conductor 322 is the same as the material of the second conductive fingers 321 .
  • a first dielectric layer 41 is provided between the gaps of the interdigital transducer 3 .
  • the gap of the interdigital transducer 3 is the gap between the adjacent first conductive interdigital fingers 311 and the second conductive interdigitated fingers 321
  • the first dielectric layer 41 is disposed between the adjacent first conductive interdigitated fingers 311 and the second conductive interdigitated fingers 321 .
  • the material of the first dielectric layer 41 may be a material with high thermal conductivity, for example, may include at least one of silicon nitride, silicon carbide, sapphire, silicon dioxide, and aluminum nitride. When the material of the first dielectric layer 41 is silicon carbide or silicon nitride, the thermal conductivity is the best.
  • the interdigital transducer 3 has a second dielectric layer 42 on the outer periphery, which is disposed on the substrate 1 and connected to the first dielectric layer 41 .
  • the second dielectric layer 42 can be formed on the substrate 1 by means of deposition or bonding.
  • the material of the second dielectric layer 42 refer to the above-mentioned materials of the first dielectric layer 41 .
  • the second dielectric layer 42 and the first dielectric layer 41 may have an integrated structure to constitute the dielectric layer 4 , and the material of the second dielectric layer 42 is the same as that of the first dielectric layer 41 .
  • a first cavity 5 is provided between part of the lower surface of the sub-dielectric layer and the upper surface of the piezoelectric layer 2, so that part of the lower surface of the sub-dielectric layer is suspended, and part of the lower surface is in contact with the piezoelectric layer 2.
  • the upper surfaces of the piezoelectric layer 2 are in contact; or, a first cavity 5 is provided between the entire lower surface of the sub-dielectric layer and the upper surface of the piezoelectric layer 2, so that the entire lower surface of the sub-dielectric layer is suspended.
  • the above-mentioned sub-dielectric layer is at least one, and when there are at least two sub-dielectric layers, the sub-dielectric layers are adjacent to each other.
  • the sound wave between the first group of interdigital transducers 31 and the second group of interdigital transducers 32 propagates to the suspended sub-dielectric layer, it can prevent the sound wave from being blocked by the sub-dielectric layer and generate energy consumption, and can also pass the sub-dielectric layer.
  • the suspended portion of the dielectric layer suppresses longitudinal clutter on the piezoelectric layer 2 .
  • the effect of reducing the acoustic wave loss is the best.
  • first conductive interdigitated fingers 311 and second conductive interdigitated fingers 321 takes any adjacent first conductive interdigitated fingers 311 and second conductive interdigitated fingers 321 as an example.
  • first conductive fingers 311 and at least one end of the second conductive fingers 321 are located within the boundary range of the first cavity 5, the adjacent first sub-cavities corresponding to them communicate with each other, and the corresponding first sub-cavities communicate with each other.
  • the lower surface of a dielectric layer 41 is suspended.
  • One end of the interdigitated fingers 321 adjacent to the second conductor 322 may or may not be located within the boundary range of the first cavity 5 .
  • one end of the first conductive interdigitated fingers 311 adjacent to the second conductive body 322 is also located within the boundary range of the first cavity 5 .
  • the first cavity 5 can be a sealed first cavity 5 or the first cavity 5 communicates with the outside world. When part of the boundary of the first cavity 5 extends to the boundary of the medium layer 4, the first cavity 5 communicates with the outside world, When all the boundaries of the first cavity 5 are located within the boundary of the dielectric layer 4 , the first cavity 5 is isolated from the outside world.
  • the first cavity 5 can be filled with nitrogen, inert gas or air.
  • the height of the first cavity 5 is 0.05um ⁇ 1um, or the height ratio between the first cavity 5 and the interdigital transducer 3 is between 1/5 and 1/2, so as to achieve the effect of the cavity forming reflection, At the same time, the stability of the structure can be ensured.
  • the cross-sectional shape of the first cavity 5 may be a circle, an ellipse or a polygon, and the polygon may be a quadrilateral, a pentagon, a hexagon, or the like.
  • the first cavity 5 may be formed by a sacrificial layer process or by an etching process.
  • the surface acoustic wave resonator further includes: a first conductive bump 61 and a second conductive bump 62, the first conductive bump 61 is electrically connected to the first group of interdigital transducers 31, The second conductive bumps 62 are electrically connected to the second group of interdigital transducers 32 , and the first conductive bumps 61 and the second conductive bumps 62 are located in areas outside the boundary of the first cavity 5 .
  • the first conductive bumps 61 are at least partially disposed on the first conductive body 312 to be electrically connected to the first conductive body 312
  • the second conductive bumps 62 are at least partially disposed on the second conductive body 322 to be connected to the second conductive body 312 .
  • the bodies 322 are electrically connected, so as to input or output electrical signals to the first group of interdigital transducers 31 and the second group of interdigital transducers 32 through the first conductive bumps 61 and the second conductive bumps 62 respectively.
  • the material of the first conductive bumps 61 may be the same as the material of the first group of interdigital transducers 31; and/or, the material of the second conductive bumps 62 may be the same as the material of the second group of interdigital transducers The material of the device 32 is the same.
  • the thin-film bulk acoustic wave resonator provided by the present invention, by opening the first cavity on the side of the dielectric layer adjacent to the piezoelectric layer, the first dielectric layer between the gaps of the interdigital transducer is suspended, so as to facilitate the The sound wave propagating along the surface of the piezoelectric layer to the suspended part of the first dielectric layer is reflected back, thereby reducing the loss of the sound wave and improving the Q value of the resonator.
  • the interdigital transducer divides the first cavity into a plurality of sub-first cavities, so that the part of the interdigital transducer adjacent to the surface of the piezoelectric layer is exposed to the air, so as to facilitate the elimination of the interdigital transduction clutter at the boundary of the resonator, thereby improving the overall performance of the resonator.
  • first group of interdigital transducers are electrically connected through the first conductive bumps
  • second group of interdigital transducers are electrically connected with the second conductive bumps to convert the first group of interdigital transducers and the second group of interdigital transducers.
  • the transducer is connected to electricity, so that the two can be used as a transmitting transducer and a receiving transducer respectively, thereby realizing the conversion between acoustic and electrical signals.
  • the interdigital transducer adopts metal material with lower resistivity and better thermal conductivity, which can reduce impedance and enhance thermal conductivity;
  • the dielectric layer adopts high thermal conductivity dielectric material, so as to enhance thermal conductivity.
  • a second dielectric layer is arranged on the outer periphery of the IDT to form a support for the IDT.
  • FIG. 2 is a flowchart of a method for manufacturing a surface acoustic wave resonator provided by an embodiment of the present invention. Please refer to FIG. 2 . manufacturing methods, including:
  • step S01 is performed to provide the piezoelectric layer 2 .
  • the piezoelectric layer 2 is a thick piezoelectric wafer, with a thickness greater than 0.3 microns. In the later process, a step of thinning the piezoelectric wafer is also included to make the thickness meet the requirements for resonance generation. In other embodiments, the thickness of the piezoelectric layer 2 is less than 20 microns. In this case, before the piezoelectric layer 2 is provided, a substrate needs to be provided, and then the thin piezoelectric layer 2 is deposited on the substrate. The material of the piezoelectric layer 2 is referred to as described in the foregoing structural embodiments, and details are not repeated here.
  • step S02 is performed to form a sacrificial layer 5' to cover the first region of the piezoelectric layer 2.
  • the first region is located in the middle of the resonator.
  • the cross-sectional shape of the sacrificial layer 5' can be a circle, an ellipse, or a polygon, and the polygon can be a quadrilateral, a pentagon, a hexagon, or the like.
  • the sacrificial layer 5' can be strip-shaped or planar.
  • the sacrificial layer 5' When the sacrificial layer 5' is strip-shaped, the sacrificial layer 5' is distributed along the direction of the first conductive fork pointing to the adjacent second conductive fork, and is located in the first cavity after the sacrificial layer 5' is subsequently removed to form the first cavity
  • a first cavity exists between the lower surface of the dielectric layer between adjacent cavities within the range and the upper surface of the piezoelectric layer 2, and the lower surface of the dielectric layer between adjacent cavities outside the range of the first cavity
  • the upper surfaces of the piezoelectric layers 2 are in contact with each other.
  • the number of strip-shaped sacrificial layers 5' can be multiple, which are parallel to each other.
  • the sacrificial layer 5' When the sacrificial layer 5' is planar, it is convenient for the subsequently formed cavity to extend to the sacrificial layer 5', so as to extend to the lower surface of the dielectric layer and the upper surface of the piezoelectric layer 2 between adjacent cavities of the sacrificial layer 5' A first cavity exists between the surfaces so that the dielectric layer is suspended.
  • the suspension of the dielectric layer can avoid being blocked by the dielectric layer during the propagation of the sound wave, thereby reducing the loss of the sound wave, and also suppressing the longitudinal clutter of the piezoelectric layer 2 .
  • the boundary of the sacrificial layer 5' is provided with a part that overlaps with the boundary of the dielectric layer or exceeds the boundary of the dielectric layer and communicates with the outside world. After the sacrificial layer 5' is removed, the first cavity 5 communicates with the outside world; or, The boundary of the sacrificial layer 5 ′ is located inside the boundary of the dielectric layer. After the sacrificial layer 5 ′ is removed, the first cavity 5 is the sealed first cavity 5 .
  • first cavity 5 when the first cavity 5 is in communication with the outside world, it is not necessary to fill the first cavity 5 with gas; when the first cavity 5 is a sealed first cavity 5, an interdigital exchange is formed in the subsequent Before the energizer, nitrogen, inert gas or air can also be filled into the first cavity 5 .
  • step S03 is performed to form a dielectric layer 4, covering the piezoelectric layer 2 and the sacrificial layer 5'.
  • the material of the dielectric layer 4 can be selected from a material with high thermal conductivity, for example, it can include at least one of silicon nitride, silicon carbide, sapphire, silicon dioxide, and aluminum nitride. When the material of the dielectric layer 4 is silicon carbide or silicon nitride, the thermal conductivity is the best.
  • the dielectric layer 4 can be formed by vapor deposition.
  • Step S04 is performed to form a plurality of longitudinally penetrating cavities 7 in the dielectric layer 4 above the sacrificial layer 5', and at least part of the bottoms of the cavities 7 extend to the sacrificial layer 5', referring to FIG. 6 .
  • the left figure is a schematic cross-sectional structure diagram corresponding to the step A-A in FIG. 1A
  • the right figure is a cross-sectional structure schematic diagram corresponding to the step B-B in FIG. 1A .
  • Extending at least part of the bottom of the cavity 7 to the sacrificial layer 5 ′ includes: part of the bottom of the cavity 7 extending to the sacrificial layer 5 ′, and part of the bottom extending to the upper surface of the piezoelectric layer 2 ; or, the entire bottom of the cavity 7 extending to the sacrificial layer 5 ′. sacrificial layer 5'.
  • a cavity is formed, and the lower surface of the dielectric layer 4 is in contact with the upper surface of the piezoelectric layer 2 between the interdigital transducer gaps in the cavity 7 whose bottom part extends to the upper surface of the piezoelectric layer 2 .
  • the entire bottom of the cavity 7 extends to the sacrificial layer 5', the lower surface of the interdigital transducer formed in the cavity 7 is in contact with the upper surface of the piezoelectric layer 2, and the gap between the interdigital transducer gaps
  • a first cavity exists between the lower surface of the dielectric layer 4 and the upper surface of the piezoelectric layer 2 .
  • the number of the cavities 7 is at least one, and when the number is at least two, the cavities 7 are adjacent to each other.
  • the corresponding cavity 7 communicates with the first cavity formed after the subsequent removal of the sacrificial layer 5'.
  • the suspension of the dielectric layer 4 between the adjacent cavities 7 can reduce the blocking of the acoustic wave by the dielectric layer 4, thereby effectively reducing the acoustic wave loss.
  • the effect of reducing the acoustic wave loss is the best. .
  • Extending the bottom of the cavity 7 to the sacrificial layer 5 ′ includes: extending the bottom of the cavity 7 to the upper surface of the sacrificial layer 5 ′ or through the sacrificial layer 5 ′ to extend to the upper surface of the piezoelectric layer 2 or through a part of the sacrificial layer 5 ′ to extends into the sacrificial layer 5'.
  • the cavity 7 can be communicated with the first cavity, thereby facilitating the subsequent formation of the fork It means that the bottom of the transducer is connected to the upper surface of the piezoelectric layer 2 to ensure the conversion effect of acoustic and electrical signals.
  • the entire bottom extends to the upper surface of the piezoelectric layer 2, so that the lower surface of the subsequently formed first conductor 312 is in contact with the upper surface of the piezoelectric layer 2; and/or, part of the bottom of the second cavity 92 extends to The sacrificial layer 5 ′, part of the bottom extends to the upper surface of the piezoelectric layer 2 , or the entire bottom of the second cavity 92 extends to the sacrificial layer 5 ′, or the entire bottom of the second cavity 92 extends to the top of the piezoelectric layer 2 surface, so that the lower surface of the second electrical conductor 322 to be subsequently formed is in contact with the upper surface of the piezoelectric layer 2 .
  • the first cavity 91 and the second cavity 92 are formed when the cavity 7 is formed. It should be noted that, for the formation steps of the first cavity 91 and the second cavity 92 , reference may be made to the formation steps of the cavity 7 above, which will not be repeated here. In other embodiments, the first cavity 91 and the second cavity 92 may be formed before or after the interdigital transducer is formed.
  • Step S05 is performed to remove the sacrificial layer to form the first cavity 5 .
  • the left figure is a schematic cross-sectional structure diagram corresponding to the step A-A in FIG. 1A
  • the right figure is a cross-sectional structure schematic diagram corresponding to the step B-B in FIG. 1A .
  • a corresponding removal method needs to be adopted according to the material of the sacrificial layer, for example, when the sacrificial layer is ⁇ -C, the sacrificial layer is removed by means of plasma gas burning.
  • the material of the sacrificial layer is polyimide or photoresist, it is removed by ashing method.
  • the sacrificial layer material is low-temperature silicon dioxide, a hydrofluoric acid solvent and low-temperature silicon dioxide are used to react and remove. It should be noted that the shape of the first cavity 5 formed after the sacrificial layer is removed is the same as that of the sacrificial layer.
  • Step S06 is performed to form a conductive material in the cavity 7 to form an interdigital transducer.
  • FIG. 8 the left figure is a schematic cross-sectional structure diagram corresponding to the step A-A in FIG. 1A
  • the right figure is a cross-sectional structure schematic diagram corresponding to the step B-B in FIG. 1A .
  • the interdigital transducer includes: a first group of interdigital transducers and a second group of interdigital transducers.
  • the first group of interdigital transducers includes at least one first conductive interdigital digit 311
  • the second group of interdigital transducers includes at least one second conductive interdigital digit 321
  • the first conductive interdigital transducer 311 and the second conductive interdigitated digit 321 are parallel to each other.
  • the method for forming the interdigital transducer includes: filling the cavity 7 with a conductive material to form a conductive material layer, and then flattening the upper surface of the conductive material layer through a chemical mechanical polishing process (CMP), so that the upper surface of the conductive material layer is flattened.
  • CMP chemical mechanical polishing process
  • the interdigital transducer is formed flush with the dielectric layer 4 , wherein the first conductive interdigital fingers 311 are formed in the first sub-cavity 71 , and the second conductive interdigital fingers 321 are formed in the second sub-chamber 72 .
  • the first cavity 91 and the second cavity 92 are formed simultaneously with the cavity 7 , or when the first cavity 91 and the second cavity 92 are formed before the interdigital transducer is formed, the In the process of forming the interdigital transducer, when the conductive material is filled into the cavity 7, the first cavity 91 and the second cavity 92 are also filled with conductive material, so that when the interdigital transducer is formed, the conductive material is also formed.
  • the first conductor 312 and the second conductor 322 are formed.
  • the first conductor 312 is formed in the first cavity 91 and the second conductor 322 is formed in the second cavity 92 .
  • the first conductor 312 is electrically connected with all the first conductive fingers 311, and the second The conductors 322 are electrically connected to all the second conductive fingers 321 .
  • the method of filling the conductive material may be deposition such as magnetron sputtering, evaporation, or electroplating, and the method of deposition may be chemical vapor deposition or physical vapor deposition.
  • the material of the seed layer may be formed of metal titanium (Ti).
  • the interdigital transducer divides the first cavity 5 into a plurality of first sub-cavities, and the adjacent first sub-cavities are isolated or communicated with each other.
  • the specific situation is implemented with reference to the foregoing structure. described in the example, and will not be repeated here.
  • first conductive bumps 61 and second conductive bumps 62 In order to facilitate the input or output of electrical signals, it also includes forming first conductive bumps 61 and second conductive bumps 62.
  • FIG. 9 the left figure is a schematic cross-sectional structure diagram corresponding to the step AA in FIG. 1A, and the right figure is It is a schematic diagram of a cross-sectional structure corresponding to the step BB in FIG. 1A .
  • the first conductive bumps 61 and the second conductive bumps 62 may be formed simultaneously with the first conductive fingers 311 , the second conductive fingers 321 , the first conductive fingers 311 and the second conductive fingers 321 , specifically: forming a bump material layer, filling in the first cavity 91 and the second cavity 92 and covering part or all of the second dielectric layer 42; chemical mechanical polishing (CMP) to keep the surface of the bump material layer flat ; Etch the bump material layer, remove the bump material layer located in the area other than the first conductor 312 and its adjacent portion of the second dielectric layer 42, and remove the second conductor 322 and its adjacent portion.
  • CMP chemical mechanical polishing
  • the bump material layer on the first conductor 312 and its adjacent portion of the second dielectric layer 322 forms the first conductive bump 61
  • the bump on the second conductor 322 and its adjacent portion of the second dielectric layer 322 The material layer forms the second conductive bump 62
  • the bump material layer located in the first sub-cavity 71 forms the first conductive interdigital 311
  • the bump material layer located in the second sub-cavity 72 forms the second conductive interdigital 321.
  • the first conductive bumps are located on the first conductive body 312, and the second conductive bumps 62 are located on the second conductive body 322, so that the first conductive bumps 61 are electrically connected to the first set of interdigital transducers, and the second conductive bumps 61 are electrically connected to the first set of interdigital transducers.
  • the bumps 62 are electrically connected to the second group of interdigital transducers, so that the first and second groups of interdigital transducers are input through the first conductive bumps 61 and the second conductive bumps 62 respectively. or output signal.
  • the first conductive bumps 61 and the second conductive bumps 62 are located outside the first cavity 5 . Specifically, the first conductive bumps 61 are located on the first conductive body 312 or the first conductive bumps 61 are partially located on the first conductive body 312 and partially located on the second dielectric layer 42 connected to the first conductive body 312 and/or, the second conductive bump 62 is located on the second conductive body 322 or the second conductive bump 62 is partially located on the second conductive body 322 and partially located on the second dielectric layer that is in contact with the second conductive body 322 42 on.
  • the first conductive bumps 61 and the second conductive bumps 62 may not be synchronized with the first conductive fingers 311 , the second conductive fingers 321 , the first conductive fingers 311 , and the second conductive fingers 321 forming, specifically, after forming the first conductive interdigitated fingers 311, the second conductive interdigitated fingers 321, the first conductive interdigitated fingers 311 and the second conductive interdigitated fingers 321, forming on the upper surfaces of the dielectric layer 4 and the interdigital transducer
  • the bump material layer; the bump material layer is flattened by a chemical mechanical polishing process (CMP); the bump material layer is etched to respectively form the first conductive bump 61 at least partially located on the first conductor 312 and the first conductive bump 61 at least partially located on the first conductor 312.
  • CMP chemical mechanical polishing process
  • the second conductive bumps 62 on the second conductors 322, the first conductive bumps 61 are electrically connected to the first group of interdigital transducers, the second conductive bumps 62 are electrically connected to the second group of interdigital transducers, The first conductive bumps 61 and the second conductive bumps 62 are located outside the first cavity 5 .
  • the piezoelectric layer 2 is a thick piezoelectric wafer. After the interdigital transducer 3 is formed, the piezoelectric layer 2 needs to be thinned.
  • FIG. 10 the left diagram is along the lines in FIG. 1A .
  • AA is a schematic cross-sectional structure diagram corresponding to this step
  • the right figure is a cross-sectional structure schematic diagram corresponding to this step along BB in FIG. 1A .
  • the side of the piezoelectric layer 2 away from the first cavity 5 is thinned; the substrate 1 is provided, which is bonded to the thinned side of the piezoelectric layer 2 .
  • the step of thinning the piezoelectric layer 2 may be performed before the formation of the sacrificial layer 7 , and the specific steps can be referred to above, and will not be repeated here.
  • the substrate 1 has a double-layer structure, that is, when the substrate 1 includes a support layer 11 and a base 12 , the support layer 11 and the substrate 12 are sequentially bonded to the thinned side of the piezoelectric layer 2 .
  • the bonding method reference may be made to the foregoing structural embodiments, which will not be repeated here.
  • the method for manufacturing a thin film bulk acoustic resonator forms the first cavity by forming a sacrificial layer on the piezoelectric layer, so as to form a thin first cavity, thereby effectively releasing the sacrificial layer , and avoid the width of the subsequently formed interdigital electrodes to expand too much outward;
  • the formed first cavity can suspend the dielectric layer between the interdigital transducer gaps, so as to reflect the sound waves propagating along the surface of the piezoelectric layer back, and then
  • the boundary of the interdigital transducer adjacent to the piezoelectric layer can be brought into contact with the gas in the first cavity, so as to effectively eliminate boundary clutter;
  • the interdigital transducer is formed in the cavity to avoid the etching of the piezoelectric layer during the formation of the traditional interdigital transducer, to ensure the flatness of the piezoelectric layer, and to limit the interdigital transducer through the formed cavity. The distance between them is to solve the problem that
  • the sacrificial layer is made of ⁇ -C material, which facilitates the subsequent formation of a thin first cavity with a smaller height.
  • the substrate is bonded under the piezoelectric layer to support the piezoelectric layer, so as to avoid the piezoelectric layer being deformed under pressure when the sacrificial layer, the dielectric layer and the interdigital transducer are subsequently formed.
  • the thickness of the piezoelectric layer is thick, it can prevent the piezoelectric layer from being compressed and deformed when the sacrificial layer, the dielectric layer, and the interdigital transducer are formed subsequently, and the interdigital transducer can be formed. Then, the piezoelectric layer is thinned to ensure that the piezoelectric layer has good piezoelectric properties, thereby improving the overall properties of the resonator.

Abstract

一种表声波谐振器及其制造方法，所述表声波谐振器包括：基板（1）及设置于基板（1）上的压电层（2）；叉指换能器（3），设置于压电层（2）的上表面；叉指换能器（3）的间隙之间设有第一介质层（41），至少部分第一介质层（41）的下表面与压电层（2）的上表面之间设有第一空腔（5）。通过在第一介质层（41）临近压电层（2）一侧开设第一空腔（5），使得叉指换能器（3）的间隙之间的第一介质层（41）悬空，以便于将沿压电层（2）表面传播至第一介质层（41）悬空处的声波反射回去，从而减少声波的损耗；通过叉指换能器（3）将第一空腔（5）分割为多个子第一空腔，以便于将叉指换能器（3）临近于压电层（2）表面的部分暴露于空气中，从而便于消除叉指换能器（3）边界的杂波，进而提升谐振器的整体性能。

Description

表声波谐振器及其制造方法 技术领域
本发明涉及半导体器件制造领域，尤其涉及一种表声波谐振器及其制造方法。
 背景技术
自模拟射频通讯技术在上世纪90代初被开发以来，射频前端模块已经逐渐成为通讯设备的核心组件。在所有射频前端模块中，滤波器已成为增长势头最猛、发展前景最大的部件。随着无线通讯技术的高速发展，5G通讯协议日渐成熟，市场对射频滤波器的各方面性能也提出了更为严格的标准。滤波器的性能由组成滤波器的谐振器单元决定。SAW器件（表面声波器件）其体积小、插入损耗低、带外抑制大、品质因数高、工作频率高、功率容量大以及抗静电冲击能力良好等特点，成为最适合5G应用的滤波器之一。SAW器件（表面声波器件）是将电信号转换为表面波并进行信号处理的电路元件，作为滤波器、谐振器等而被广泛使用。
通常，表面声波谐振器实在具有压电特性的基片材料抛光面上制作两个叉指换能器，分别作为发射换能器和接收换能器。发射换能器将RF信号转换为声表面波，在基片表面上传播，经过一定的延迟后，接收换能器将声信号转换为电信号输出，滤波过程是在电到声和声到电的压电转换中实现。
 技术问题
但是，目前制作出的表声波谐振器，两叉指换能器间的声波沿压电层表面传播时，易扩散出去，从而造成损耗，此外，在通过刻蚀工艺刻蚀形成叉指换能器时，易破坏压电层表面的平整性，使得品质因子（Q）无法进一步提高、成品率低，因此无法满足高性能的射频系统的需求。
 技术解决方案
本发明的目的在于提供一种表声波谐振器及其制造方法，解决声波损耗的问题，避免破坏压电层的平整性，增强谐振器的结构强度，提高品质因子（Q），进而提高器件的整体性能。
为了实现上述目的，本发明提供一种表声波谐振器的制造方法，包括：基板及设置于基板上的压电层；叉指换能器，设置于压电层的上表面；叉指换能器的间隙之间设有第一介质层，至少部分第一介质层的下表面与压电层的上表面之间设有第一空腔。
本发明还提供一种薄膜体声波谐振器的制造方法，包括：提供压电层；形成牺牲层，覆盖压电层的第一区域；形成介质层，覆盖压电层、牺牲层；在牺牲层上方的介质层中形成多个纵向贯穿的容腔，至少部分容腔的底部延伸至牺牲层；去除牺牲层，形成第一空腔；在容腔中形成导电材料，以形成叉指换能器。
 有益效果
本发明的有益效果在于：本发明提供的薄膜体声波谐振器，通过在第一介质层临近压电层一侧开设第一空腔，使得叉指换能器的间隙之间的第一介质层悬空，以便于将沿压电层表面传播至第一介质层悬空处的声波反射回去，从而减少声波的损耗，进而提升谐振器的Q值。
进一步地，叉指换能器将第一空腔分割为多个子第一空腔，以便于将叉指换能器临近于压电层表面的部分暴露于空气中，从而便于消除叉指换能器边界的杂波，进而提升谐振器的整体性能。
进一步地，将第一空腔的高度限制在0.05um到1um范围内，太薄则不利于牺牲层有效释放，太厚又会造成插指电极宽度向外扩展太多，只能将厚度限制在某一范围内。
进一步地，通过第一导电凸块电连接第一组叉指换能器、第二导电凸块电连接第二组叉指换能器以将第一组叉指换能器和第二组换能器接电，使得两者分别作为发射换能器和接收换能器，进而实现声、电信号之间的转换。
进一步地，叉指换能器，采用电阻率更低且导热性较好的金属材料，能够减小阻抗并增强导热；介质层，采用高导热介电材料，以便于增强导热性。
进一步地，在叉指换能器的外周设置第二介质层，以对叉指换能器形成支撑。
本发明提供的薄膜体声波谐振器的制造方法，通过在压电层上形成牺牲层的方式形成第一空腔，以便于形成微薄的第一空腔，从而有效释放牺牲层，并避免后续形成的插指电极宽度过于向外扩展；形成的第一空腔可以使位于叉指换能器间隙间的介质层悬空，从而将沿压电层表面传播的声波反射回去，进而降低声波能耗，此外，可以使叉指换能器临近压电层的边界与第一空腔中的气体接触，以便于有效消除边界杂波；通过先在介质层上形成容腔，再在容腔内形成叉指换能器，以避免传统叉指换能器形成过程对压电层的刻蚀，保证了压电层的平整，且通过形成的容腔来限制叉指换能器之间的间距，以解决传统刻蚀工艺无法实现较小间距的问题。
进一步地，牺牲层采用α-C材质，便于后续形成高度较小的微薄第一空腔。
进一步地，当压电层厚度较薄时，通过在压电层下键合基板，以支撑压电层，避免后续形成牺牲层、介质层、叉指换能器时压电层受压变形，从而保证压电层的结构强度；当压电层厚度较厚时，可以在后续形成牺牲层、介质层、叉指换能器时，避免压电层受压变形，在形成叉指换能器后，再对压电层进行减薄，以保证压电层具备良好的压电特性，从而提高谐振器的整体特性。
 附图说明
图1A为本发明一实例提供的一种薄膜体声波谐振器俯视图；图1为图1A所示沿A-A的一种薄膜体声波谐振器剖面结构示意图；图2为本发明一实施例的一种薄膜体声波谐振器的制造方法的步骤流程图；图3-10本实施例提供的一种薄膜体声波谐振器的制造方法在制造过程中不同步骤相对应的结构示意图。
附图标记说明：1、基板；11、支撑层；12、基底；2、压电层；3、叉指换能器；31、第一组叉指换能器；311、第一导电叉指；312、第一导电体；32、第二组叉指换能器；321、第二导电叉指；322、第二导电体；4、介质层；41、第一介质层；42、第二介质层；5、第一空腔；5’、牺牲层；61、第一导电凸块；62、第二导电凸块；7、容腔；71、第一子容腔；72、第二子容腔；91、第一腔体；92、第二腔体。
 本发明的实施方式
目前制作出的表声波谐振器，两叉指换能器间的声波沿压电层表面传播时，易扩散出去，从而造成损耗，此外，在通过刻蚀工艺刻蚀形成叉指换能器时，易破坏压电层表面的平整性，使得品质因子（Q）无法进一步提高、成品率低，因此无法满足高性能的射频系统的需求。
为解决上述问题，本发明提供一种表声波谐振器，通过在部分介质层的下表面与压电层的上表面之间设有第一空腔，使得叉指换能器之间的介质层悬空，以解决声波损耗的问题，且能够避免破坏压电层的平整性，增强谐振器的结构强度，提高品质因子（Q），进而提高器件的整体性能。
以下结合附图和具体实施例对本发明的表声波谐振器及其制造方法制作方法作进一步详细说明。根据下面的说明和附图，本发明的优点和特征将更清楚，然而，需说明的是，本发明技术方案的构思可按照多种不同的形式实施，并不局限于在此阐述的特定实施例。附图均采用非常简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。
在说明书和权利要求书中的术语“第一”“第二”等用于在类似要素之间进行区分，且未必是用于描述特定次序或时间顺序。要理解，在适当情况下，如此使用的这些术语可替换，例如可使得本文所述的本发明实施例能够以不同于本文所述的或所示的其他顺序来操作。类似的，如果本文所述的方法包括一系列步骤，且本文所呈现的这些步骤的顺序并非必须是可执行这些步骤的唯一顺序，且一些所述的步骤可被省略和/或一些本文未描述的其他步骤可被添加到该方法。若某附图中的构件与其他附图中的构件相同，虽然在所有附图中都可轻易辨认出这些构件，但为了使附图的说明更为清楚，本说明书不会将所有相同构件的标号标于每一图中。
图1A为本发明一实施例提供的一种表声波谐振器结构的俯视图，图1中，左图为图1A所示沿A-A的一种薄膜体声波谐振器剖面结构示意图，右图为图1A所示沿B-B的一种薄膜体声波谐振器剖面结构示意图，请参考图1A和图1，该表声波谐振器包括：基板1及设置于基板1上的压电层2；叉指换能器3，设置于压电层2的上表面；叉指换能器3的间隙之间设有第一介质层41，至少部分第一介质层41的下表面与压电层2的上表面之间设有第一空腔5。
在本实施例中，基板1的材质可以为本领域技术人员熟知的任意合适的底材，例如可以是以下所提到的材料中的至少一种：硅(Si)、锗(Ge)、锗硅(SiGe)、碳硅(SiC)、碳锗硅(SiGeC)、砷化铟(InAs)、砷化镓(GaAs)、磷化铟(InP)或者其它III/V化合物半导体。
在本实施例中，基板1可以为双层结构，即基板1包括基底12和支撑层11。需要说明的是，支撑层11可以采用沉积或键合的方式与基底结合，键合的方式包括：共价键键合、粘结键合或熔融键合，沉积的方式可以为化学气相沉积或物理气相沉积。在其他实施例中，基底12与支撑层11还可以通过键合层实现键合，键合层的材料包括氧化硅、氮化硅、氮氧化硅、碳氮化硅或硅酸乙酯。此外，键合层还可以采用光固化材料或热固化材料等黏结剂，例如粘片膜（Die Attach Film，DAF）或干膜（Dry Film）等。基底12的材料可以与基板1的材料相同，支撑层11的材料可以与基板1的材料相同，也可以是任意适合的介电材料，包括但不限于氧化硅、氮化硅、氮氧化硅、碳氮化硅等材料中的一种。在其他实施例中，基板1可以是单层结构。
在一种可能的实现方式中，基板1内可以设有第二空腔，叉指式换能器3位于第二空腔围成的区域上方，第二空腔设置于基板1临近压电层2一侧。当基板1为双层结构时，第二空腔设置于支撑层11临近压电层2一侧，且贯穿部分或全部支撑层11。
在另一种可能的实现方式中，基板1内可以设有布拉格声波反射层，叉指式换能器位于布拉格声波反射层围成的区域上方。具体地，布拉格反射层结构包括依次叠层的第一声阻抗层和第二声阻抗层，第一声阻抗层和第二声阻抗层的阻抗不同，第一声阻抗层和第二声阻抗层的厚度均为四分之一声波波长的奇数倍。
基板1上方设有压电层2，压电层2可以通过键合或沉积的方式与基板1结合。需要说明的是，键合的方式和沉积的方式可以参照上述支撑层11与基底12键合或沉积的方式，此外，压电层2和基板1还可以通过键合层来键合，键合层的材料参照上述键合层，此处不再赘述。
压电层2的材料可以使用氮化铝(AlN)、氧化锌(ZnO)、锆钛酸铅(PZT)、铌酸锂(LiNbO3)、石英(Quartz)、铌酸钾(KNbO3)或钽酸锂(LiTaO3)等具有纤锌矿型结晶结构的压电材料及它们的组合。当压电层2包括氮化铝(AlN)时，压电层2还可包括稀土金属，例如钪(Sc)、铒(Er)、钇(Y)和镧(La)中的至少一种。此外，当压电层2包括氮化铝(AlN)时，压电层2还可包括过渡金属，例如锆(Zr)、钛(Ti)、锰(Mn)和铪(Hf)中的至少一种。可以使用化学气相沉积、物理气相沉积或原子层沉积等本领域技术人员熟知的任何适合的方法沉积形成压电层。
压电层2上设有叉指换能器3，叉指换能器3包括：第一组叉指换能器31和第二组叉指换能器32。在本实施例中，第一组叉指换能器31可以作为发射换能器将射频信号转换为声表面波，并在压电层2表面传播，也可以作为接收换能器将声信号转变为电信号输出，同样的，第二组叉指换能器32也可以作为发射换能器或接收换能器，当第一组叉指换能器31作为发射换能器时，第二组叉指换能器32作为接收换能器，反之，亦然。当第一组叉指换能器31和第二组叉指换能器32接入交流电后，第一组叉指换能器31和第二组叉指换能器32分别作为发射换能器和接收换能器并处于动态变化的过程。
需要注意的是，第一组叉指换能器31和第二组叉指换能器32的下端可以与压电层2抵接或不抵接，当第一组叉指换能器31和第二组叉指换能器32的下端与压电层2抵接时，声电信号转换效果最佳；当第一组叉指换能器31和第二组叉指换能器32的下端与压电层2不抵接时，可以避免不同材料接触产生的应力。
具体地，第一组叉指换能器31至少包括一个第一导电叉指311，第二组叉指换能器32至少包括一个第二导电叉指321，第一导电叉指311和第二导电叉321指互相平行。第一组叉指换能器31还包括便于电连接的第一导电体312，第二组叉指换能器32还包括便于电连接的第二导电体322，第一导电体312与所有第一导电叉指311电连接，第二导电体322与所有第二导电叉指321电连接。需要注意的是，第一导电体312的下表面可以部分位于第一空腔5边界范围内、部分位于压电层2的上表面，或全部位于第一空腔5的边界范围内，也可以全部位于第一空腔5边界范围外；和/或，第二导电体322的下表面可以部分位于第一空腔5边界范围内、部分位于压电层2的上表面，或全部位于第一空腔5的边界范围内，也可以全部位于第一空腔5边界范围外。当第一导电体312的部分或全部下表面位于第一空腔5边界范围内时，第一导电体312与第二导电叉指321端部之间的第一介质层41悬空，从而避免其间的第一介质层41对声波造成损耗，还可以抑制压电层2上的纵向杂波，同理，当第二导电体322的部分或全部下表面位于第一空腔5边界范围内时，第二导电体322与第一导电叉指311之间的第一介质层41悬空，从而避免其间的第一介质层41对声波造成损耗，并压电层2上的纵向声波。当第一组叉指换能器31和第二组叉指换能器32接入交流电后，声波在相邻第一导电叉指311和第二导电叉指322之间来回反射，形成震荡。
一般的，第一导电叉指311和第二导电叉指321可以使用本领域技术人员任意熟知的任意合适的导电材料或半导体材料，其中，导电材料可以为具有导电性能的金属材料，例如，由钼（Mo）、铝（Al）、铜（Cu）、钨（W）、钽（Ta）、铂（Pt）、钌（Ru）、铑（Rh）、铱（Ir）、铬（Cr）、钛（Ti）、金(Au)、锇(Os)、铼(Re)、钯(Pd)等金属中一种制成或由上述金属形成的叠层制成，半导体材料例如是Si、Ge、SiGe、SiC、SiGeC等。需要说明的是，可以通过沉积、电镀或刻蚀的方法形成叉指换能器3，沉积的方式可以为磁控溅射、蒸镀等物理气相沉积或者化学气相沉积。第一组叉指换能器31和第二组叉指换能器32的材料可以为阻抗小的导电材料，比如为金、银、钨、铂、铝、铜中的一种或多种。第一导电体312的材料与第一导电叉指311的材料相同；和/或，第二导电体322的材料与第二导电叉指321的材料相同。
在本实施例中，叉指换能器3的间隙之间设有第一介质层41。应当注意的是，叉指换能器3的间隙为相邻第一导电叉指311和第二导电叉指321之间的间隙，第一介质层41设置于相邻第一导电叉指311和第二导电叉指321之间，以间隔相邻第一导电叉指311和第二导线叉指321。第一介质层41的材料可以选用高导热材料，如可以包括氮化硅、碳化硅、蓝宝石、二氧化硅、氮化铝中的至少一种。当第一介质层41的材料碳化硅或氮化硅时，导热效果最佳。
第一介质层41包含多个子介质层，任一子介质层位于相邻第一导电叉指311和第二导电叉指322之间，相邻子介质层之间连接，第一导电体312与第二导电叉指321之间具有间隙，第二导电体322和第一导电叉指311之间具有间隙。子介质层的数量根据第一导电叉指311和第二导电叉指321的数量确定，比如，当第一导电叉指311和第二导电叉指321的数量均为一个时，子介质层的数量为一个，再比如，当第一导电叉指311的数量为两个、第二导电叉指321的数量为一个时，子介质层的数量为两个，再比如，当第一导电叉指311和第二导电叉指321的数量均为两个时，子介质层的数量为三个，以此类推。在其他实施例中，第一导电体第一导电体312与第二导电叉指321之间不具有间隙，312与第二导电叉指321之间不具有间隙，第二导电体322和第一导电叉指311之间不具有间隙，相邻子介质层之间隔离。
叉指换能器3外周具有第二介质层42，设置于基板1上且与第一介质层41连接。第二介质层42可以采用沉积或键合的方式形成于基板1上，第二介质层42材料参照上述第一介质层41的材料。在本实施例中，第二介质层42和第一介质层41可以为一体结构，构成介质层4，第二介质层42的材料和第一介质层41的材料相同。
在本实施例中，至少部分第一介质层41的下表面与压电层3的上表面之间设有第一空腔5。具体地，至少一个子介质层的下表面与压电层3的上表面之间设有第一空腔5；和/或，子介质层的部分或全部下表面与压电层3的上表面之间设有第一空腔5。以任一子介质层为例，子介质层的部分下表面与压电层2的上表面之间设有第一空腔5，以使该子介质层的部分下表面悬空、部分下表面与压电层2的上表面相接；或者，子介质层的全部下表面与压电层2的上表面之间设有第一空腔5，以使该子介质层的全部下表面悬空。需要说明的是，上述子介质层至少为一个，当子介质层为至少两个时，所述子介质层之间相邻。第一组叉指换能器31和第二组叉指换能器32之间的声波传播至悬空的子介质层时，可以避免声波受该处子介质层阻挡而产生能耗，还可以通过子介质层悬空部分抑制压电层2上的纵向杂波。当所有子介质层的全部下表面与压电层2上表面之间均具有第一空腔5时，减少声波损耗效果最佳。
叉指换能器3将第一空腔5分割为多个第一子空腔，相邻子第一空腔之间相互隔离或相互连通。具体地，第一导电叉指311和第二导电叉指321将第一空腔5分割为多个第一子空腔，当容腔7的边界超出第一空腔5的边界时，相邻第一子空腔之间相互隔离，当容腔7的边界位于第一空腔5的边界内时，相邻子第一空腔之间相互连通。
需要说明的是，以下以任一相邻第一导电叉指311和第二导电叉指321为例。当第一导电叉指311的至少一端和第二导电叉指321的至少一端位于第一空腔5边界范围内时，则与其相对应的相邻第一子空腔之间相互连通，相应第一介质层41的下表面悬空。需要说明的是，第一导电叉指311的至少一端和第二导电叉指321的至少一端位于第一空腔5边界范围内的情形可以为多种，比如第一导电叉指311临近于第二导电体322的一端位于第一空腔5边界范围内时，第二导叉指321的两端或任意一端均可以位于第一空腔5边界范围内；再比如第一导电叉指311临近于第一导电体312的一端位于第一空腔5边界范围内时，第二导电叉指321临近于第一导电体312的一端位于第一空腔5边界范围内，此时，第二导电叉指321临近于第二导电体322的一端可以位于或不位于第一空腔5边界范围内，若第二导电叉指321临近于第二导电体322的一端位于第一空腔5边界范围内，则第一导电叉指311临近于第二导电体322的一端也位于第一空腔5边界范围内。当第一导电叉指311临近于第二导电体322的端部和第二导电叉指321临近于第一导电体312的端部均不位于第一空腔5边界范围内时，与其相对应的相邻第一子空腔之间相互隔离，相应落入第一空腔5范围内的第一介质层41悬空，未落入第一空腔5范围内的第一介质层的下表面与压电层2的上表面相接。
第一空腔5可以为密封的第一空腔5或第一空腔5与外界相通，当第一空腔5的部分边界延伸至介质层4边界时，第一空腔5与外界连通，当第一空腔5的全部边界位于介质层4的边界内时，第一空腔5与外界隔离。第一空腔5中可以填充氮气、惰性气体或空气。第一空腔5的高度为0.05um~1um，或第一空腔5与叉指换能器3的高度比值介于1/5到1/2之间，从而达到空腔形成反射的效果，同时又能确保结构的稳定性。第一空腔5的截面形状可以是圆形、椭圆形或多边形，多边形可以为四边形、五边形、六边形等。在本实施例中，第一空腔5可以通过牺牲层工艺形成，也可以通过刻蚀工艺形成。
为便于电信号的输入或输出，该表声波谐振器还包括：第一导电凸块61和第二导电凸块62，第一导电凸块61与第一组叉指换能器31电连接，第二导电凸块62与第二组叉指换能器32电连接，第一导电凸块61和第二导电凸块62位于第一空腔5边界以外的区域。具体地，第一导电凸块61至少部分设置于第一导电体312上以与第一导电体312电连接，第二导电凸块62至少部分设置于第二导电体322上以与第二导电体322电连接，以便于通过第一导电凸块61、第二导电凸块62分别向第一组叉指换能器31、第二组叉指换能器32输入或输出电信号。需要说明的是，当部分第一导电凸块61设置于第一导电体312上时，剩余部分第一导电凸块61位于第二介质层42上，当部分第二导电凸块62设置于第二导电体322上时，剩余部分第二导电凸块62位于第二介质层42上。在本实施例中，第一导电凸块61的材料可以与第一组叉指换能器31的材料相同；和/或，第二导电凸块62的材料可以与第二组叉指换能器32的材料相同。
综上所述，本发明提供的薄膜体声波谐振器，通过在介质层临近压电层一侧开设第一空腔，使得叉指换能器的间隙之间的第一介质层悬空，以便于将沿压电层表面传播至第一介质层悬空处的声波反射回去，从而减少声波的损耗，进而提升谐振器的Q值。
进一步地，叉指换能器将第一空腔分割为多个子第一空腔，以便于将叉指换能器临近于压电层表面的部分暴露于空气中，从而便于消除叉指换能器边界的杂波，进而提升谐振器的整体性能。
进一步地，将第一空腔的高度限制在0.05um到1um范围内，太薄则不利于牺牲层有效释放，太厚又会造成插指电极宽度向外扩展太多，只能将厚度限制在某一范围内。
进一步地，通过第一导电凸块电连接第一组叉指换能器、第二导电凸块电连接第二组叉指换能器以将第一组叉指换能器和第二组换能器接电，使得两者分别作为发射换能器和接收换能器，进而实现声、电信号之间的转换。
进一步地，叉指换能器，采用电阻率更低且导热性较好的金属材料，能够减小阻抗并增强导热；介质层，采用高导热介电材料，以便于增强导热性。
进一步地，在叉指换能器的外周设置第二介质层，以对叉指换能器形成支撑。
本发明一实施例提供一种薄膜体声波谐振器的制造方法，图2为本发明一实施例提供的一种表声波谐振器的制作方法的流程图，请参考图2，该表声波谐振器的制造方法，包括：
S01：提供压电层。
S02：形成牺牲层，覆盖压电层的第一区域。
S03：形成介质层，覆盖压电层、牺牲层。
S04：在牺牲层上方的介质层中形成多个纵向贯穿的容腔，至少部分容腔的底部延伸至牺牲层。
S05：去除牺牲层，形成第一空腔。
S06：在容腔中形成导电材料，以形成叉指换能器。
图3-图10为本实施例的一种薄膜体声波谐振器的制造方法的相应步骤对应的结构示意图，以下将参考参考图3-图10详细说明本实施例提供的薄膜体声波谐振器的制造方法。
参考图3所示，执行步骤S01，提供压电层2。
在本实施例中，压电层2为厚的压电晶圆，厚度大于0.3微米，在后期工艺中还包括对压电晶圆减薄处理的步骤，使其厚度满足产生谐振的要求。在其他实施例中，压电层2的厚度小于20微米，此时，在提供压电层2之前，还需先提供基板，再在基板上沉积形成薄压电层2。压电层2的材料参照前文结构实施例中所述，此处不再赘述。
参考图4，执行步骤S02，形成牺牲层5’，覆盖压电层2的第一区域。在本实施例中，为便于后续形成叉指换能器，第一区域位于谐振器的中间位置。
在本实施例中，通过沉积的方式在压电层2上形成牺牲层5’，在200度到400度，常压或低压条件下，利用化学气相沉积工艺在压电层2上形成牺牲层5’。具体地，牺牲层5’的厚度为·0.05um~1um，以便于后续去除牺牲层5’后，形成微薄的第一空腔5，以便于有效释放牺牲层5’，并避免后续形成的插指电极宽度过于向外扩展。牺牲层5’的材料可以为α-C，以形成性能较好的微薄第一空腔5。
牺牲层5’的截面形状可以是圆形、椭圆形或多边形，多边形可以为四边形、五边形、六边形等。牺牲层5’可以为条状或面状。当牺牲层5’为条状时，牺牲层5’沿第一导电叉指向其临近的第二导电叉指方向分布，在后续去除牺牲层5’形成第一空腔后，位于第一空腔范围内的相邻容腔间的介质层的下表面与压电层2的上表面之间存在第一空腔，位于第一空腔范围外的相邻容腔间的介质层的下表面与压电层2的上表面相接。条状牺牲层5’的数量可以为多个，相互之间平行。当牺牲层5’为面状时，可以便于后续形成的容腔延伸至牺牲层5’，使得延伸至牺牲层5’的相邻容腔间的介质层的下表面与压电层2的上表面之间存在第一空腔，从而使所述介质层悬空。介质层的悬空，可以避免声波传播过程中受介质层阻挡，进而减少声波损耗，还可以抑制压电层2的纵向杂波。
在本实施例中，牺牲层5’的边界设有与介质层的边界重合或超出介质层的边界与外界相通的部分，去除牺牲层5’后，第一空腔5与外界相通；或，牺牲层5’的边界位于介质层的边界内部，去除牺牲层5’后，第一空腔5为密封的第一空腔5。需要注意的是，当第一空腔5与外界相通时，不需要向第一空腔5内填充气体；当第一空腔5为密封的第一空腔5时，在后续形成叉指换能器之前，还可以向第一空腔5中填充氮气、惰性气体或空气等。
参考图5，执行步骤S03，形成介质层4，覆盖压电层2、牺牲层5’。
介质层4的材料可以选用高导热材料，如可以包括氮化硅、碳化硅、蓝宝石、二氧化硅、氮化铝中的至少一种。当介质层4的材料碳化硅或氮化硅时，导热效果最佳。可以通过气相沉积的方法形成介质层4。
执行步骤S04，在牺牲层5’上方的介质层4中形成多个纵向贯穿的容腔7，至少部分容腔7的底部延伸至牺牲层5’，参考图6。其中，左图为沿图1A中A-A该步骤对应的剖面结构示意图，右图为沿图1A中B-B该步骤对应的剖面结构示意图。
至少部分容腔7的底部延伸至牺牲层5’包括：容腔7的部分底部延伸至牺牲层5’、部分底部延伸至压电层2的上表面；或者，容腔7的全部底部延伸至牺牲层5’。具体地，当容腔7的部分底部延伸至牺牲层5’、部分底部延伸至压电层2的上表面时，后续形成于该容腔7内的叉指换能器的下表面与压电层2的上表面相接，形成于部分底部延伸至牺牲层5’的容腔7内的叉指换能器间隙之间的介质层4的下表面与压电层2上表面之间存在第一空腔，形成于部分底部延伸至压电层2上表面的容腔7内的叉指换能器间隙之间的介质层4的下表面与压电层2的上表面相接。当容腔7的全部底部延伸至牺牲层5’时，形成于容腔7内的叉指换能器的下表面与压电层2的上表面相接，叉指换能器间隙之间的介质层4的下表面与压电层2的上表面之间存在第一空腔。
需要说明的是，上述情形中的容腔7数量至少为一个，当数量为至少两个时，所述容腔7之间彼此相邻。当至少部分容腔7的底部延伸至牺牲层5’时，相应容腔7与后续去除牺牲层5’后形成的第一空腔连通。相邻容腔7间的介质层4的悬空，可以减少介质层4对声波的阻挡，从而有效减少声波损失，当所有相邻容腔间的介质层4全部悬空时，减少声波损耗效果最佳。
容腔7底部延伸至牺牲层5’包括：容腔7的底部延伸至牺牲层5’的上表面或贯穿牺牲层5’以延伸至压电层2的上表面或贯穿部分牺牲层5’以延伸至牺牲层5’中。需要说明的是，当容腔7的底部延伸至牺牲层5’时，后续去除牺牲层5’形成第一空腔后，容腔7均可以与第一空腔连通，从而便于后续形成的叉指换能器的底部与压电层2上表面相接，以保证声电信号的转换效果。
在本实施例中，在形成容腔7的过程中，在介质层4表面涂光刻胶，形成光刻胶层；根据后续需要形成的叉指换能器定义光罩图形；进行曝光，以将光罩图形结构转移至光刻胶层上；再对光刻胶层进行显影，以显影后的光刻胶层为掩膜对介质层4进行刻蚀，形成容腔7；去除光刻胶层。需要说明的是，通过上述方式形成的容腔7，容腔7容腔7可以使相邻容腔7之间具备较小的间距，由此制成的谐振器的工作频率较高，性能较好。此外，可以选用等离子气体烧除的方式去除光刻胶层，以避免对介质层4表面造成损伤，从而避免影响后续形成的叉指换能器3的结构特性。
其他实施例中，为便于刻蚀形成容腔7时，确保压电层2不被刻蚀，在形成压电层2后，还在压电层2上形成掩膜层，掩膜层暴露出部分压电层2表面，在压电层2或掩膜层上沉积牺牲层5’，在掩膜层上沉积介质层4，介质层4覆盖牺牲层5’；在刻蚀形成容腔7后，去除位于压电层2上的牺牲层5’和掩膜层。通过在压电层2上形成掩膜层，避免刻蚀容腔7时对压电层2造成刻蚀，从而保证压电层2的完整性，进一步提高谐振器的结构稳定性。
为了便于后续形成叉指换能器，在形成容腔7过程中，还需要形成第一腔体91和第二腔体92，以便于后续形成叉指换能器过程中，在第一腔体91和第二腔体92内分别形成第一导电体312和第二导电体322，第一腔体91和第二腔体92平行，容腔7包括至少一个第一子容腔71和至少一个第二子容腔72，第一子容腔71和第二子容腔72平行，且任一第一子容腔71和第二子容腔72相邻，第一腔体91连通全部第一子容腔71，且与任意第一子容腔71垂直，第二腔体92连通全部第二子容腔72，且与任意第二子容腔72垂直。
第一腔体91的部分底部延伸至牺牲层5’、部分底部延伸至压电层2的上表面，或第一腔体91的全部底部延伸至牺牲层5’，或第一腔体91的全部底部延伸至压电层2的上表面，以便于后续形成的第一导电体312的下表面与压电层2的上表面相接；和/或，第二腔体92的部分底部延伸至牺牲层5’、部分底部延伸至压电层2的上表面，或第二腔体92的全部底部延伸至牺牲层5’，或第二腔体92的全部底部延伸至压电层2的上表面，以便于后续形成的第二导电体322的下表面与压电层2的上表面相接。在本实施例中，第一腔体91和第二腔体92在形成容腔7时形成。需要说明的是，第一腔体91和第二腔体92的形成步骤可参照上述容腔7的形成步骤，此处不再赘述。在其他实施例中，第一腔体91和第二腔体92可以在形成叉指换能器之前或之后形成。
执行步骤S05，去除牺牲层，形成第一空腔5。参考图7，其中，左图为沿图1A中A-A该步骤对应的剖面结构示意图，右图为沿图1A中B-B该步骤对应的剖面结构示意图。
在本实施例中，需要根据牺牲层的材料，采用相对应的去除方法，比如当牺牲层为α-C时，采用等离子气体烧除的方式去除牺牲层。再比如当牺牲层材料为聚酰亚胺或光阻剂时，采用灰化的方法去除。再比如当牺牲层材料为低温二氧化硅时，用氢氟酸溶剂和低温二氧化硅发生反应去除。需要注意的是，牺牲层去除后形成的第一空腔5的形状与牺牲层的形状相同。
执行步骤S06，在容腔7中形成导电材料，以形成叉指换能器。参考图8，其中，左图为沿图1A中A-A该步骤对应的剖面结构示意图，右图为沿图1A中B-B该步骤对应的剖面结构示意图。
当叉指换能器与介质层4、压电层2将第一空腔5围成密封的第一空腔5时，需要在形成叉指换能器之前，向第一空腔5中填充氮气、惰性气体或空气。
在本实施例中，叉指换能器包括：第一组叉指换能器和第二组叉指换能器。具体地，第一组叉指换能器至少包括一个第一导电叉指311，第二组叉指换能器至少包括一个第二导电叉指321，第一导电叉指311和第二导电叉指321互相平行。形成叉指换能器的方法包括：在容腔7中填充导电材料，形成导电材料层，再通过化学机械抛光工艺（CMP）对导电材料层的上表面进行平整，使得导电材料层的上表面与介质层4齐平，从而形成叉指换能器，其中第一子容腔71内形成为第一导电叉指311，第二子容腔72内形成第二导电叉指321。
需要说明的是，当第一腔体91和第二腔体92与容腔7同步形成时，或者，第一腔体91和第二腔体92在形成叉指换能器之前形成时，在形成叉指换能器过程中，在向容腔7中填充导电材料时，还向第一腔体91和第二腔体92中填充导电材料，从而在形成叉指换能器时，还形成第一导电体312和第二导电体322，第一导电体312形成于第一腔体91内，第二导电体322形成于第二腔体92内。由于第一腔体91与所有第一子容腔71连通，第二腔体92与所有第二子容腔72连通，因此第一导电体312与所有第一导电叉指311电连接，第二导电体322与所有第二导电叉指321电连接。
导电材料的选择可参照上文结构实施例中第一导电叉指311和第二导电叉指321的材料，此处不再赘述。填充导电材料的方式可以为磁控溅射、蒸镀等沉积或电镀，沉积的方式可以为化学气相沉积或物理气相沉积。在电镀过程中，需要在形成牺牲层之前或去除牺牲层后，在压电层2上与容腔相对的区域形成种子层，使得形成容腔7、去除牺牲层后，叉指换能器3形成于种子层上，种子层的材料可以由金属钛（Ti）形成。
形成叉指换能器后，叉指换能器将第一空腔5分割为多个第一子空腔，相邻第一子空腔之间相互隔离或相互连通，具体情形参照前文结构实施例中所述，此处不再赘述。
为了便于电信号的输入或输出，还包括形成第一导电凸块61和第二导电凸块62，参考图9，其中：左图为沿图1A中A-A该步骤对应的剖面结构示意图，右图为沿图1A中B-B该步骤对应的剖面结构示意图。
在本实施例中，第一导电凸块61和第二导电凸块62可以与第一导电叉指311、第二导电叉指321、第一导电叉指311和第二导电叉指321同步形成，具体为：形成凸块材料层，填充于第一腔体91和第二腔体92内并覆盖部分或全部第二介质层42；通过化学机械抛光（CMP）使凸块材料层表面保持平整；对凸块材料层进行刻蚀，去除位于第一导电体312及其相邻部分第二介质层42以外区域的凸块材料层，以及去除位于第二导电体322及其相邻部分第二介质层42以外区域的凸块材料层，使得位于第一腔体91内的凸块材料层形成第一导电体312，位于第二腔体92内的凸块材料层形成第二导电体322，位于第一导电体312及其相邻部分第二介质层322上的凸块材料层形成第一导电凸块61，位于第二导电体322及其相邻部分第二介质层322上的凸块材料层形成第二导电凸块62，位于第一子容腔71内的凸块材料层形成第一导电叉指311，位于第二子容腔72内的凸块材料层形成第二导电叉指321。
第一导电凸块位于第一导电体312上，第二导电凸块62位于第二导电体322上，以使第一导电凸块61与第一组叉指换能器电连接，第二导电凸块62与第二组叉指换能器电连接，从而通过第一导电凸块61和第二导电凸块62分别向第一组叉指换能器、第二组叉指换能器输入或输出信号。
第一导电凸块61和第二导电凸块62位于第一空腔5以外的区域。具体地，第一导电凸块61位于第一导电体312上或第一导电凸块61部分位于第一导电体312上、部分位于与上述第一导电体312相接的第二介质层42上；和/或，第二导电凸块62位于第二导电体322上或第二导电凸块62部分位于第二导电体322上、部分位于与上述第二导电体322相接的第二介质层42上。第一导电凸块61相对于第一导电体312、第一介质层41、第二介质层42的位置关系以及第二导电凸块62相对于第二导电体322、第一介质层41、第二介质层42的位置关系可参照前文结构实施例中所述，第一导电凸块61、第二导电凸块62的材料可参照前文结构实施例中所述，此处不再赘述。
在其他实施例中，第一导电凸块61和第二导电凸块62可以不与第一导电叉指311、第二导电叉指321、第一导电叉指311和第二导电叉指321同步形成，具体为，在形成第一导电叉指311、第二导电叉指321、第一导电叉指311和第二导电叉指321之后，在介质层4和叉指换能器的上表面形成凸块材料层；通过化学机械抛光工艺（CMP）对凸块材料层进行平整；刻蚀凸块材料层，分别形成至少部分位于第一导电体312上的第一导电凸块61和至少部分位于第二导电体322上的第二导电凸块62，第一导电凸块61与第一组叉指换能器电连接，第二导电凸块62与第二组叉指换能器电连接，第一导电凸块61和第二导电凸块62位于第一空腔5以外的区域。
本实施例中，压电层2为厚的压电晶圆，在形成叉指换能器3之后，还需要对压电层2减薄，参考图10，其中，左图为沿图1A中A-A该步骤对应的剖面结构示意图，右图为沿图1A中B-B该步骤对应的剖面结构示意图。具体地，对压电层2远离第一空腔5的一侧进行减薄；提供基板1，键合于压电层2被减薄的一侧。以使压电层2较薄，从而保证压电层2具有较好的压电效应。在其他实施例中，压电层2减薄的步骤可以在形成牺牲层7之前执行，具体步骤参照前述，不再赘述。在其他实施例中，当基板1为双层结构时，即基板1包括支撑层11和基底12时，将支撑层11和基板12依次键合于压电层2减薄一侧。键合的方式可参照前文结构实施例中所述，此处不再赘述。
综上所述，本发明提供的薄膜体声波谐振器的制造方法，通过在压电层上形成牺牲层的方式形成第一空腔，以便于形成微薄的第一空腔，从而有效释放牺牲层，并避免后续形成的插指电极宽度过于向外扩展；形成的第一空腔可以使位于叉指换能器间隙间的介质层悬空，从而将沿压电层表面传播的声波反射回去，进而降低声波能耗，此外，可以使叉指换能器临近压电层的边界与第一空腔中的气体接触，以便于有效消除边界杂波；通过先在介质层上形成容腔，再在容腔内形成叉指换能器，以避免传统叉指换能器形成过程对压电层的刻蚀，保证了压电层的平整，且通过形成的容腔来限制叉指换能器之间的间距，以解决传统刻蚀工艺无法实现较小间距的问题。
进一步地，牺牲层采用α-C材质，便于后续形成高度较小的微薄第一空腔。
进一步地，当压电层厚度较薄时，通过在压电层下键合基板，以支撑压电层，避免后续形成牺牲层、介质层、叉指换能器时压电层受压变形，从而保证压电层的结构强度；当压电层厚度较厚时，可以在后续形成牺牲层、介质层、叉指换能器时，避免压电层受压变形，在形成叉指换能器后，再对压电层进行减薄，以保证压电层具备良好的压电特性，从而提高谐振器的整体特性。
需要说明的是，本说明书中的各个实施例均采用相关的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于结构实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
上述描述仅是对本发明较佳实施例的描述，并非对本发明范围的任何限定，本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰，均属于权利要求书的保护范围。

Claims (26)

  1. 一种表声波谐振器，其特征在于，包括：基板及设置于所述基板上的压电层；叉指换能器，设置于所述压电层的上表面；所述叉指换能器的间隙之间设有第一介质层，至少部分所述第一介质层的下表面与所述压电层的上表面之间设有第一空腔。
  2. 根据权利要求1所述的表声波谐振器，其特征在于，所述叉指换能器将所述第一空腔分割为多个子第一空腔，相邻所述子第一空腔之间相互隔离或相互连通。
  3. 根据权利要求1所述的表声波谐振器，其特征在于，所有所述间隙之间的第一介质层均与所述压电层的上表面之间具有第一空腔。
  4. 根据权利要求1所述的表声波谐振器，其特征在于，所述叉指换能器外周具有第二介质层，沉积于所述基板上与所述第一介质层连接。
  5. 根据权利要求1所述的表声波谐振器，其特征在于，所述第一介质层、第二介质层为一体结构，材料相同。
  6. 根据权利要求1所述的表声波谐振器，其特征在于，所述第一空腔为密封的第一空腔或所述第一空腔与外界相通。
  7. 根据权利要求1所述的表声波谐振器，其特征在于，所述第一空腔为密封的第一空腔，所述第一空腔中填充有氮气、惰性气体或空气。
  8. 根据权利要求1所述的表声波谐振器，其特征在于，所述第一空腔的高度为0.05um~1um。
  9. 根据权利要求1所述的表声波谐振器，其特征在于，所述叉指换能器包括：第一组叉指换能器和第二组叉指换能器，所述第一组叉指换能器至少包括一个第一导电叉指，所述第二组叉指换能器至少包括一个第二导电叉指，所述第一导电叉指和所述第二导电叉指互相平行；还包括：第一导电凸块和第二导电凸块，所述第一导电凸块与所述第一组叉指换能器电连接，所述第二导电凸块与所述第二组叉指换能器电连接，所述第一导电凸块和所述第二导电凸块位于所述第一空腔以外。
  10. 根据权利要求1所述的表声波谐振器，其特征在于，所述第一介质层的材料包括碳化硅、氮化硅、蓝宝石、二氧化硅、氮化铝中的至少一种。
  11. 根据权利要求1所述的表声波谐振器，其特征在于，所述叉指换能器的材料包括金、银、钨、铂、铝、铜中的一种或多种。
  12. 根据权利要求1所述的表声波谐振器，其特征在于，所述基板内设有第二空腔，所述叉指式换能器位于所述第二空腔围成的区域上方。
  13. 根据权利要求1所述的表声波谐振器，其特征在于，所述基板内设有布拉格声波反射层，所述叉指式换能器位于所述布拉格声波反射层围成的区域上方。
  14. 一种表声波谐振器的制造方法，其特征在于，包括：提供压电层；形成牺牲层，覆盖所述压电层的第一区域；形成介质层，覆盖所述压电层、所述牺牲层；在所述牺牲层上方的所述介质层中形成多个纵向贯穿的容腔，至少部分所述容腔的底部延伸至所述牺牲层；去除所述牺牲层，形成第一空腔；在所述容腔中形成导电材料，以形成叉指换能器。
  15. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，通过在200度到400度，常压或低压条件下，利用化学气相沉积工艺在所述压电层上形成所述牺牲层。
  16. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述牺牲层的材料包括α-C。
  17. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述牺牲层的厚度为0.05um~1um。
  18. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，采用等离子气体烧除的方法去除所述牺牲层。
  19. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述牺牲层的边界设有与所述介质层的边界重合或超出所述介质层的边界与外界相通的部分，去除所述牺牲层后，所述第一空腔与外界相通；
    或，所述牺牲层的边界位于所述介质层的边界内部，去除所述牺牲层后，所述第一空腔为密封的第一空腔。
  20. 根据权利要求14所述的表声波谐振器的制造方法，形成所述叉指换能器后，所述叉指换能器将所述第一空腔分割为多个第一子空腔，当所述容腔的边界超出所述第一空腔的边界时，相邻所述第一子空腔之间相互隔离，当所述容腔的边界位于所述第一空腔的边界内时，相邻所述第一子空腔之间相互连通。
  21. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述叉指换能器与所述介质层、所述压电层将所述第一空腔围成密封的第一空腔，在形成所述叉指换能器之前，还包括向所述第一空腔中填充氮气或惰性气体。
  22. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述压电层的厚度小于20微米或所述压电层的厚度大于0.3微米，当所述压电层的厚度大于0.3微米时，所述制造方法还包括：对所述压电层远离所述第一空腔的一侧进行减薄；提供基板，键合于所述压电层被减薄的一侧。
  23. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，至少部分所述容腔的底部延伸至所述牺牲层包括：所述容腔的部分底部延伸至所述牺牲层、部分底部延伸至所述压电层的上表面，或所述容腔的全部底部延伸至所述牺牲层；所述容腔底部延伸至所述牺牲层包括：所述容腔的底部延伸至所述牺牲层的上表面或贯穿所述牺牲层以延伸至所述压电层的上表面或贯穿部分所述牺牲层以延伸至所述牺牲层中。
  24. 根据权利要求14所述的表声波谐振器的制造方法，其特征在于，所述叉指换能器包括：第一组叉指换能器和第二组叉指换能器，所述第一组叉指换能器至少包括一个第一导电叉指，所述第二组叉指换能器至少包括一个第二导电叉指，所述第一导电叉指和所述第二导电叉指互相平行；形成所述叉指换能器的方法包括：在所述容腔中填充导电材料，以形成所述叉指换能器，其中相邻的所述容腔中分别形成为所述第一导电叉指和所述第二导电叉指。
  25. 根据权利要求24所述的表声波谐振器的制造方法，其特征在于，所述方法还包括：形成第一导电凸块和第二导电凸块，所述第一导电凸块与所述第一组叉指换能器电连接，所述第二导电凸块与所述第二组叉指换能器电连接，所述第一导电凸块和所述第二导电凸块位于所述第一空腔围成区域的边界以外。
  26. 根据权利要求13所述的表声波谐振器的制造方法，其特征在于，所述介质层的材料包括碳化硅或氮化硅。
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