WO2021179729A1 - 一种薄膜体声波谐振器及其制造方法 - Google Patents

一种薄膜体声波谐振器及其制造方法 Download PDF

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Publication number
WO2021179729A1
WO2021179729A1 PCT/CN2020/137048 CN2020137048W WO2021179729A1 WO 2021179729 A1 WO2021179729 A1 WO 2021179729A1 CN 2020137048 W CN2020137048 W CN 2020137048W WO 2021179729 A1 WO2021179729 A1 WO 2021179729A1
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Prior art keywords
electrode
layer
protrusion
piezoelectric
bulk acoustic
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PCT/CN2020/137048
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English (en)
French (fr)
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黄河
罗海龙
李伟
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中芯集成电路(宁波)有限公司
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Publication of WO2021179729A1 publication Critical patent/WO2021179729A1/zh
Priority to US17/941,441 priority Critical patent/US20230006644A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/173Air-gaps
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H3/04Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/02007Details of bulk acoustic wave devices
    • H03H9/02015Characteristics of piezoelectric layers, e.g. cutting angles
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/02007Details of bulk acoustic wave devices
    • H03H9/02086Means for compensation or elimination of undesirable effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/02007Details of bulk acoustic wave devices
    • H03H9/02157Dimensional parameters, e.g. ratio between two dimension parameters, length, width or thickness
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0504Holders; Supports for bulk acoustic wave devices
    • H03H9/0514Holders; Supports for bulk acoustic wave devices consisting of mounting pads or bumps
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1007Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1035Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by two sealing substrates sandwiching the piezoelectric layer of the BAW device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/125Driving means, e.g. electrodes, coils
    • H03H9/13Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/174Membranes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/021Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the air-gap type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/023Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the membrane type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H3/04Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
    • H03H2003/0414Resonance frequency
    • H03H2003/0421Modification of the thickness of an element
    • H03H2003/0442Modification of the thickness of an element of a non-piezoelectric layer
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H2009/02165Tuning
    • H03H2009/02173Tuning of film bulk acoustic resonators [FBAR]

Definitions

  • the invention relates to the field of semiconductor device manufacturing, in particular to a thin-film bulk acoustic wave resonator and a manufacturing method thereof.
  • the radio frequency filter is an important part of the radio frequency system. It can filter out the interference and noise outside the communication spectrum to meet the requirements of the radio frequency system and the communication protocol for the signal-to-noise ratio. Taking a mobile phone as an example, since each frequency band needs a corresponding filter, dozens of filters may need to be set in a mobile phone.
  • the thin film bulk acoustic wave resonator includes two thin film electrodes, and a piezoelectric thin film layer is arranged between the two thin film electrodes. Its working principle is to use the piezoelectric thin film layer to generate vibration under an alternating electric field.
  • the bulk acoustic wave propagating in the thickness direction of the electric film layer is transmitted to the interface between the upper and lower electrodes and the air to be reflected back, and then reflected back and forth inside the film to form an oscillation.
  • a standing wave oscillation is formed.
  • the currently manufactured cavity-type thin-film bulk acoustic wave resonators suffer from transverse wave loss and insufficient structural strength, so that the quality factor (Q) cannot be further improved, and the yield is low. Therefore, they cannot meet the needs of high-performance radio frequency systems.
  • the invention discloses a thin film bulk acoustic wave resonator and a manufacturing method thereof, which can solve the problems of low quality factor and low structural strength caused by the transverse wave leakage of the thin film bulk acoustic wave resonator.
  • the present invention provides a thin film bulk acoustic wave resonator, including:
  • a protrusion is provided at the boundary of the effective resonance region, and the protrusion is provided on the upper surface or the lower surface of the piezoelectric laminate structure; or,
  • the protruding part is arranged on the upper surface of the piezoelectric laminated structure, and partly arranged on the lower surface of the piezoelectric laminated structure.
  • the present invention also provides a method for manufacturing the film bulk acoustic resonator, which includes:
  • the piezoelectric laminate structure including a second electrode, a piezoelectric layer, and a first electrode arranged in sequence from bottom to top;
  • a protrusion is formed on one of the first electrode, the second electrode, and the piezoelectric layer, or a part of protrusion is formed on one of them, and another part of protrusion is formed on the other.
  • the projection on the electrical layer is located at the boundary of the effective resonance zone;
  • the temporary substrate is removed.
  • Protrusions are arranged along the boundary of the effective resonance area to make the acoustic impedance mismatch between the interior of the effective resonance area and the area where the protrusions are located, effectively preventing the lateral leakage of sound waves and improving the quality factor of the resonator;
  • Protrusions are arranged along the boundary of the effective resonance area to make the acoustic impedance mismatch between the interior of the effective resonance area and the area where the protrusions are located, effectively preventing the lateral leakage of sound waves and improving the quality factor of the resonator;
  • the effective resonance area of the resonator is defined by the first groove and the second groove.
  • the first groove and the second groove respectively penetrate the first electrode and the second electrode, and the piezoelectric layer maintains a complete film layer. After etching, the structural strength of the resonator is ensured, and the yield of manufacturing the resonator is improved;
  • first electrode and the second electrode outside the effective resonance area are provided with overlapping regions in a direction perpendicular to the piezoelectric layer, and further include a conductive interconnection structure, which connects the outer portion of the effective resonance area.
  • the first electrode and the second electrode Short-circuit the first electrode and the second electrode outside the effective resonance area, so that there is no pressure difference between the piezoelectric layer of the piezoelectric laminate structure outside the effective resonance area, and no standing wave oscillation is generated outside the effective resonance area.
  • a frequency adjustment layer is provided in the effective resonance area, and the overall thickness of the effective resonance area is changed by setting the thickness of the frequency adjustment layer, thereby changing the frequency of the resonator.
  • FIG. 1 shows a schematic diagram of the structure of a thin film bulk acoustic resonator of Embodiment 1. As shown in FIG. 1
  • FIGS. 2 to 8 show schematic structural diagrams corresponding to different steps of a method of manufacturing a thin-film bulk acoustic resonator of the second embodiment.
  • FIGS. 9 to 15 show schematic structural diagrams corresponding to different steps of a method for manufacturing a thin-film bulk acoustic resonator of Embodiment 3.
  • first element, component, region, layer or section discussed below may be represented as a second element, component, region, layer or section.
  • Spatial relationship terms such as “under”, “below”, “below”, “below”, “above”, “above”, etc., in It can be used here for the convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatial relationship terms are intended to include different orientations of devices in use and operation. For example, if the device in the figure is turned over, then elements or features described as “under” or “below” or “under” other elements will be oriented “on” the other elements or features. Therefore, the exemplary terms “below” and “below” can include both an orientation of above and below. The device can be otherwise oriented (rotated by 90 degrees or other orientation) and the spatial descriptors used here are interpreted accordingly.
  • the method herein includes a series of steps, and the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some steps may be omitted and/or some other steps not described herein may be added to this method. If the components in a certain drawing are the same as those in other drawings, although these components can be easily identified in all the drawings, in order to make the description of the drawings more clear, this specification will not describe all the same components. The reference numbers are shown in each figure.
  • FIG. 1 shows a schematic structural diagram of a thin film piezoelectric acoustic resonator of Embodiment 1. Please refer to FIG. 1.
  • the thin film bulk acoustic wave resonator includes:
  • the supporting layer 102 is bonded to the supporting substrate 100, the supporting layer 102 encloses a first cavity 110a, and the first cavity 110a exposes the supporting substrate 100;
  • a piezoelectric laminate structure covering the first cavity 110a, and the piezoelectric laminate structure includes a first electrode 103, a piezoelectric layer 104, and a second electrode 105 that are sequentially stacked from bottom to top;
  • a protrusion 40 is provided at the boundary of the effective resonance region, and the protrusion 40 is provided on the upper surface or the lower surface of the piezoelectric laminate structure; or, the protrusion 40 is partially provided on the piezoelectric laminate structure The surface is partially arranged on the lower surface of the piezoelectric laminate structure.
  • all the protrusions 40 are located on the lower surface of the piezoelectric laminate structure. All are located on the side where the first cavity 110a is located.
  • the area surrounded by the protrusion 40 is an effective resonance area, and the outside of the protrusion 40 is an ineffective resonance area.
  • the first electrode 103, the piezoelectric layer 104, and the second electrode 105 in the effective resonance area overlap each other in a direction perpendicular to the carrier substrate 100.
  • the protrusions 40 may all be located on the upper surface of the piezoelectric laminate structure, away from the side where the first cavity 110a is located.
  • the protrusions 40 may also be partly arranged on the upper surface of the piezoelectric laminated structure and partly arranged on the lower surface of the piezoelectric laminated structure.
  • the projection of the protrusion 40 on the supporting substrate 100 forms a closed ring, such as a closed irregular polygon, a circle, or an ellipse.
  • the protrusion 40 causes the internal effective resonance area and the area where the protrusion 40 is located to mismatch the acoustic impedance, which can effectively prevent the lateral leakage of sound waves and improve the quality factor of the resonator.
  • the projection of the protrusion 40 on the carrier substrate 100 may not be a completely closed pattern. It should be understood that when the projection of the protrusion 40 on the carrier substrate 100 is a closed pattern, it is more beneficial to prevent the lateral leakage of sound waves.
  • the material of the protrusion 40 may be a conductive material or a dielectric material.
  • the material of the protrusion 40 is a conductive material, it may be the same as the material of the first electrode 103 or the second electrode 105.
  • the material of the protrusion 40 is In the case of the dielectric material, it can be any one of silicon oxide, silicon nitride, silicon oxynitride, or silicon carbonitride, but is not limited to the above materials.
  • the carrier substrate 100 may be at least one of the materials mentioned below: silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbon (SiC), silicon germanium (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP) or other III/V compound semiconductors, including multilayer structures composed of these semiconductors, etc., and can also be ceramic substrates such as alumina, quartz or glass substrates Wait.
  • the supporting layer 102 is bonded to the supporting substrate 100, and the supporting layer 102 encloses a first cavity 110 a, and the first cavity 110 a exposes the supporting substrate 100.
  • the first cavity 110a is a ring-shaped closed cavity, and the first cavity 110a may be formed by etching the support layer 102 through an etching process.
  • the technology of the present invention is not limited to this. It should be noted that the support layer 102 is combined with the carrier substrate 100 by bonding, and the bonding methods include: covalent bonding, adhesive bonding, or fusion bonding.
  • the support layer 102 and the carrier substrate 100 are bonded through the bonding layer 101, and the material of the bonding layer 101 includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, or ethyl silicate.
  • the shape of the bottom surface of the first cavity 110a is rectangular, but in other embodiments of the present invention, the shape of the first cavity 110a on the bottom surface of the first electrode 103 can also be a circle, an ellipse, or Polygons other than rectangles, such as pentagons, hexagons, etc.
  • the material of the support layer 102 can be any suitable dielectric material, including but not limited to one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, and the like.
  • the material of the support layer 102 and the bonding layer 101 may be the same.
  • a piezoelectric stack structure is provided above the first cavity 110a, and the piezoelectric stack structure includes a first electrode 103, a piezoelectric layer 104, and a second electrode 105 in order from bottom to top.
  • the first electrode 103 is located on the supporting layer 102
  • the piezoelectric layer 104 is located on the first electrode 103
  • the second electrode 105 is located on the piezoelectric layer 104.
  • the first electrode 103, the piezoelectric layer 104, and the second electrode 105 above the first cavity 110a are provided with an overlap area in a direction perpendicular to the carrier substrate 100, and the overlap area inside the protrusion 40 is an effective resonance area.
  • the piezoelectric layer 104 covers the first cavity 110a, and covering the first cavity 110a should be understood to mean that the piezoelectric layer 104 is a complete film layer and has not been etched. It does not mean that the piezoelectric layer 104 completely covers the first cavity 110a to form a sealed cavity. Of course, the piezoelectric layer 104 can completely cover the first cavity 110a to form a sealed cavity.
  • the piezoelectric layer is not etched to ensure that the piezoelectric laminated structure has a certain thickness, so that the resonator has a certain structural strength. Improve the yield of resonators.
  • an etch stop layer is further provided between the support layer 102 and the first electrode 103, and its material includes but is not limited to silicon nitride (Si3N4) and silicon oxynitride (SiON).
  • the etch stop layer can be used to increase the structural stability of the finally manufactured thin film bulk acoustic wave resonator.
  • the etch stop layer has a lower etching rate than the support layer 102 and can be used to etch the support The layer 102 prevents over-etching during the process of forming the first cavity 110a, and protects the surface of the first electrode 103 located thereunder from damage, thereby improving the performance and reliability of the device.
  • the surface of the piezoelectric laminate structure further includes a first groove 130a and a second groove 130b.
  • the first groove 130a is located on the lower surface of the piezoelectric laminate structure on the side where the first cavity 110a is located. , Penetrates the first electrode 103 and surrounds the outer circumference of the area where the protrusion 40 is located.
  • the second groove 130b is located on the upper surface of the piezoelectric laminate structure, penetrates the second electrode 105, and surrounds the outer circumference of the area where the protrusion 40 is located.
  • the two ends of the first groove 130a and the two ends of the second groove 130b are arranged opposite to each other, so that the projections of the first groove 130a and the second groove 130b on the carrier substrate 100 The two junctions meet or have a gap.
  • the projection of the protrusion 40 on the piezoelectric layer 104 is a closed polygon, and the inner edges of the first groove 130a and the second groove 130b are arranged along the outer boundary of the protrusion 40, that is, The outer boundary of the protrusion 40 coincides with the inner edges of the first groove 130a and the second groove 130b.
  • the projections of the first grooves 130a and the second grooves 130b on the carrier substrate 100 are closed patterns, consistent with the shape of the projections 40 projected on the carrier substrate 100, and are located on the outer periphery of the projections formed by the projections 40 .
  • the protrusions 40 are ring-shaped (when the protrusions 40 are all located on the lower or upper surface of the piezoelectric laminate structure, the protrusions 40 constitute a ring; when the protrusions 40 are located on both surfaces of the piezoelectric laminate structure, The projections of the two parts together form an overall ring).
  • the first groove 130a surrounds part of the outer circumference of the protrusion 40
  • the second groove 130b surrounds the outer circumference of the remaining part of the protrusion 40 (here When the second groove 130b surrounds the outer circumference of the protrusion 40 means that it surrounds the outer circumference of the surface of the piezoelectric laminate structure in the area of the protrusion 40, and does not directly surround the outer circumference of the protrusion 40).
  • the first groove 130a may surround the piezoelectric laminate structure.
  • the second groove 130b may surround the outer circumference of the protrusion 40 on the upper surface of the piezoelectric laminate structure.
  • the present invention is not limited to this, as long as the first groove 130a and the second groove 130b cooperate with each other to surround the outer circumference of the area where the protrusion 40 is located.
  • the protrusion 40 causes the acoustic impedance of the inner region of the protrusion to be mismatched with the acoustic impedance of the area where the protrusion is located, and defines the boundary of the effective resonance region of the resonator.
  • the first groove 130a and the second groove 130b separate the first electrode 103 and the second electrode 105, respectively, so that the resonator cannot meet the working conditions (the working condition is that the first electrode 103, the piezoelectric layer 104 and the second electrode 105 are in The thickness direction overlaps each other), which further defines the boundary of the effective resonance region of the resonator.
  • the protrusion 40 causes the acoustic impedance to be mismatched by the addition of the mass.
  • the first groove 130a and the second groove 130b make the electrode end face contact with the air to make the acoustic impedance mismatch, and both play a role in preventing the leakage of the transverse wave. Improve the Q value of the resonator.
  • only the first trench 130a or the second trench 130b may be provided separately. Since the first electrode 103 and the second electrode 105 need to introduce electrical signals, the first trench 130a or the second trench 130b is not suitable to form a closed ring, and at this time, the first groove 130a or the second groove 130b cannot completely surround the area where the protrusion 40 is located.
  • the first groove 130a or the second groove 130b may be formed into a nearly closed ring shape, and the non-closed area is used to introduce electrical signals. This arrangement can simplify the process flow and reduce the cost of the resonator.
  • a frequency adjustment layer 1010 is further included, which is disposed on the surface of the first electrode 103 in the effective resonance region. In another embodiment, it can also be arranged on the surface of the second electrode 105 in the effective resonance zone.
  • the frequency adjustment layer 1010 is used to adjust the frequency of the resonator.
  • the frequency of the resonator is related to the thickness of the effective resonance area.
  • the material of the frequency adjustment layer 1010 is ethyl silicate.
  • the material of the frequency adjustment layer 1010 may also be silicon oxide, silicon nitride, silicon oxynitride, or silicon carbonitride.
  • it further includes a bonding layer 106 disposed above the piezoelectric laminate structure, the bonding layer 106 encloses a second cavity 110b, and the second cavity 110b exposes the piezoelectric laminate
  • the bonding layer 106 encloses a second cavity 110b
  • the second cavity 110b exposes the piezoelectric laminate
  • the bonding layer 106 encloses a closed ring
  • the second cavity 110b is a closed cavity.
  • the bonding layer 106 can be made of conventional bonding materials, such as silicon oxide, silicon nitride, silicon oxynitride, ethyl silicate, etc., or a bonding agent such as a light-curing material or a heat-curing material, such as an adhesive film (DieAttachFilm, DAF) or dry film (DryFilm).
  • the material of the bonding layer and the material of the capping substrate 200 may be the same, and the two are an integral structure, and the second cavity 110b is formed by forming a space in the film layer (forming the bonding layer 106 and the capping substrate 200).
  • first electrical connection portion is used to introduce electrical signals into the first electrode 103 of the effective resonance region
  • second electrical connection portion is used to introduce electrical signals into the effective resonance region.
  • the effective resonance region also includes the area where the piezoelectric layer, the first electrode, and the second electrode overlap each other in the direction perpendicular to the piezoelectric layer.
  • the first electrode and the second electrode are energized, the pressure difference between the upper and lower surfaces of the piezoelectric layer outside the effective resonance region can also be generated, and standing wave oscillation is also generated.
  • the standing wave oscillation outside the effective resonance region is undesirable.
  • the first electrode and the second electrode outside the effective resonance area are short-circuited to make the upper and lower voltages of the piezoelectric layer outside the effective resonance area consistent, and no standing wave oscillation can be generated outside the effective resonance area, which improves the Q value of the resonator.
  • the specific structures of the first electrical connection portion, the second electrical connection portion and the conductive interconnection structure 120 are as follows:
  • the first electrical connection part includes:
  • a first through hole 140 which penetrates the lower layer structure of the first electrode 103 outside the effective resonance region, exposing the first electrode 103;
  • the first conductive interconnection layer 141 covers the inner surface of the first through hole 140 and a part of the surface of the carrier substrate 100 on the outer periphery of the first through hole 140, and is connected to the first electrode 103;
  • An insulating layer 160 covers the surface of the first conductive interconnection layer 141 and the carrier substrate 100;
  • the conductive bumps 142 are disposed on the surface of the carrier substrate 100 and are electrically connected to the first conductive interconnection layer 141.
  • the second electrical connection part includes:
  • a second through hole 150 which penetrates the lower structure of the first electrode 103 outside the effective resonance region, exposing the first electrode 103;
  • the second conductive interconnection layer 151 covers the inner surface of the second through hole 150 and a part of the surface of the carrier substrate 100 on the outer periphery of the second through hole 150, and is connected to the first electrode 103;
  • An insulating layer 160 covers the surface of the second conductive interconnection layer 151 and the carrier substrate 100;
  • the second conductive bump 152 is disposed on the surface of the carrier substrate 100 and is electrically connected to the second conductive interconnection layer 151.
  • the conductive interconnection structure 120 includes two parts, one part is disposed in the outer area of the second trench 130b, connects the first electrode 103 and the second electrode 105, and is electrically connected to the first electrical connection part through the first electrode 103 .
  • the other part of the conductive interconnect structure 120 is disposed in the outer area of the first trench 130a, connects the first electrode 103 and the second electrode 105, and is electrically connected to the second electrical connection portion through the first electrode 103.
  • Both parts of the conductive interconnection structure 120 are provided with a region covering part of the surface of the second electrode 105. This region increases the contact area with the second electrode 105, reduces the contact resistance, and can prevent local high temperature caused by excessive current.
  • the second electrical connection part is not directly electrically connected to the second electrode, but is connected to the first electrode outside the effective resonance region, and is electrically connected to the second electrode of the effective resonance region through the conductive interconnection structure 120.
  • the first electrical connection portion is electrically connected to the first electrode inside the effective resonance area, giving One electrode is powered
  • the first electrical connection part is electrically connected to the second electrode outside the effective resonant area through the first electrode outside the effective resonant area and the conductive interconnection structure 120, and is not connected to the second electrode inside the effective resonant area.
  • the second electrical connection part is connected to the first electrode outside the effective resonant area and the second electrode inside the effective resonant area to realize power supply to the second electrode inside the effective resonant area.
  • Embodiment 2 provides a method for manufacturing a thin film bulk acoustic resonator, including the following steps:
  • S02 forming a piezoelectric laminate structure on the temporary substrate, the piezoelectric laminate structure including a second electrode, a piezoelectric layer, and a first electrode arranged in sequence from bottom to top;
  • a protrusion is formed on one of the first electrode, the second electrode, and the piezoelectric layer, or a part of the protrusion is formed on one of them, and another part of the protrusion is formed on the other.
  • the projection on the piezoelectric layer is located at the boundary of the effective resonance zone;
  • FIGS. 2 to 8 show schematic diagrams of the structure at different stages of a method for manufacturing a thin film piezoelectric acoustic resonator according to Embodiment 2 of the present invention. Please refer to FIGS. 2 to 8 to describe each step in detail.
  • step S01 is performed: a temporary substrate 300 is provided.
  • the temporary substrate 300 may be at least one of the materials mentioned below: silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbon (SiC), silicon germanium (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP), or other III/V compound semiconductors, can also be ceramic substrates such as alumina, quartz or glass substrates, etc.
  • step S02 is performed: forming a piezoelectric laminate structure on the temporary substrate 300, the piezoelectric laminate structure including a second electrode 105, a piezoelectric layer 104, First electrode 103.
  • Step S03 is performed: forming a protrusion 40 on one of the first electrode 103, the second electrode 105, and the piezoelectric layer 104, or forming a part of protrusion on one of them, and forming another part of protrusion on the other, The projection of the protrusion 40 on the piezoelectric layer 104 coincides with the boundary of the effective resonance region of the resonator.
  • all the protrusions 40 are formed on the first electrode 103.
  • the projection of the formed protrusion 40 in the direction perpendicular to the piezoelectric layer 104 is an irregular polygon, such as a pentagon, a hexagon, or a circle or an ellipse.
  • the "upper” described in step S03 means that it is connected to the corresponding film layer, including the upper surface or the lower surface of the film layer.
  • the materials of the second electrode 105 and the first electrode 103 can use any suitable conductive material or semiconductor material well known to those skilled in the art, wherein the conductive material can be a metal material with conductive properties, for example, made of molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and other metals or laminates of the above metals, semiconductor materials such as Si, Ge, SiGe, SiC, SiGeC, etc.
  • the second electrode 105 and the first electrode 103 may be formed by physical vapor deposition or chemical vapor deposition methods such as magnetron sputtering, evaporation, or the like.
  • the material of the piezoelectric layer 104 can be aluminum nitride (AlN), zinc oxide (ZnO), lead zirconate titanate (PZT), lithium niobate (LiNbO3), quartz (Quartz), potassium niobate (KNbO3) or tantalic acid Piezoelectric materials with wurtzite crystal structure such as lithium (LiTaO3) and their combinations.
  • the piezoelectric layer 104 may further include rare earth metals, such as at least one of scandium (Sc), erbium (Er), yttrium (Y), and lanthanum (La).
  • the piezoelectric layer 104 may further include a transition metal, such as at least one of zirconium (Zr), titanium (Ti), manganese (Mn), and hafnium (Hf). kind.
  • the piezoelectric layer 104 can be deposited and formed by any suitable method known to those skilled in the art, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
  • the second electrode 105 and the first electrode 103 are made of metal molybdenum (Mo)
  • the piezoelectric layer 104 is made of aluminum nitride (AlN).
  • the method of forming the bump 40 in this embodiment is: after forming the second electrode 105 and the piezoelectric layer 104, a conductive material layer is formed on the piezoelectric layer 104, and the thickness of the conductive material layer formed at this time is the first electrode.
  • the classification of the materials for forming bumps includes the following two forms:
  • the first form forming a structural material layer on the temporary substrate, performing an etching process on the structural material layer to form the protrusions, and the structural material layer is used to form the first electrode or the second electrode. Two electrodes or the piezoelectric layer.
  • the method of forming the protrusion 40 is in this form.
  • the second form after forming the first electrode or the second electrode or the piezoelectric layer, a bump material layer is formed, and an etching process is performed on the bump material layer to form the bumps.
  • the protrusions and the structural material layer have the same material, and the structural material layer and the protrusion material layer can be formed through a single deposition process, reducing the number of process steps.
  • the bump material and the structural material layer are made of different materials and need to be formed by two deposition processes, but the choice of bump material is not limited to the same material as the first electrode or the second electrode or the piezoelectric layer. The choice of materials is wider.
  • the specific method for forming the piezoelectric laminate structure and the protrusion may include:
  • Method 1 A second electrode, a piezoelectric layer, and a first electrode are sequentially formed on the temporary substrate, and then the protrusion is formed on the first electrode.
  • the material of the protrusion and the material of the first electrode may be the same or different.
  • the materials of the two are the same, the conductive material layer is formed by a deposition process, and the first electrode and the protrusion are formed by an etching process.
  • the materials of the two are different, and the first electrode may be formed first, then the bump material layer is formed by a deposition process, and then the bump is formed by an etching process.
  • Method 2 forming the bumps on the temporary substrate, and sequentially forming a second electrode, a piezoelectric layer, and a first electrode on the temporary substrate on the bumps.
  • This method also includes two cases, one is that the material of the protrusion and the material of the second electrode are the same, and they are formed by a single deposition process.
  • a conductive material layer is formed on the temporary substrate, and the thickness of the conductive material layer is the sum of the height of the protrusion and the second electrode, and then the protrusion and the second electrode are formed by an etching process.
  • the other is to form the bump and the second electrode separately.
  • the bump material layer is formed, the bump is formed through an etching process, and then the second electrode is formed on the bump and on the temporary substrate, and then the piezoelectric layer is sequentially formed And the first electrode.
  • Method 3 forming a second electrode on the temporary substrate, forming the bump on the second electrode, forming the piezoelectric layer on the bump and the second electrode in sequence, and First electrode.
  • the difference between this method and method 2 is that the protrusions of method 2 are formed on the lower surface of the second electrode, and the protrusions of this method are formed on the upper surface of the second electrode.
  • Method 4 forming a second electrode and a piezoelectric layer on the temporary substrate in sequence, forming the protrusion on the piezoelectric layer, and forming a first electrode on the protrusion and the piezoelectric layer.
  • the bumps in this method are formed on the piezoelectric layer, and may be formed on the upper surface of the piezoelectric layer or on the lower surface of the piezoelectric layer.
  • the material of the protrusions may be the same as or different from the material of the piezoelectric layer.
  • the method of forming bumps on the surface of the first electrode or the second electrode can refer to the method 1, method 2 or method 3 for the method of forming bumps when the two materials are the same and different, which will not be repeated here.
  • Method 5 sequentially forming a second electrode, a piezoelectric layer, and a first electrode on the temporary substrate, and then forming a part of the protrusions on the first electrode, and after removing the temporary substrate, Another part of the protrusion is formed on the second electrode.
  • the bump is composed of two parts, which are respectively formed on the first electrode and the second electrode. The projections of the two protrusions perpendicular to the piezoelectric layer coincide with the boundary of the effective resonance region of the resonator.
  • Method 1, Method 2 or Method 3 which will not be repeated here.
  • the above only lists a few different methods for forming the bumps. It should be understood that there are other methods.
  • the bumps include two parts, one part can be formed on the piezoelectric layer and the other part is formed on the first electrode or the second electrode. Superior. As long as the bumps are formed on the piezoelectric laminate structure and are located at the boundary of the effective resonance region.
  • step S04 is performed: a support layer 102 is formed to cover the piezoelectric laminate structure.
  • the support layer 102 is formed by physical vapor deposition or chemical vapor deposition.
  • the material of the support layer 102 can be any suitable dielectric material, including but not limited to at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, and the like.
  • step S05 is performed: the support layer 102 is patterned to form a first cavity 110 a, and the first cavity 110 a penetrates the support layer 102.
  • the support layer 102 is etched by an etching process to form a first cavity 110a, and the first electrode layer 103 and the protrusion 40 at the bottom are exposed.
  • the etching process may be a wet etching process or a dry etching process. Dry etching includes but is not limited to reactive ion etching (RIE), ion beam etching, and plasma etching.
  • RIE reactive ion etching
  • the depth and shape of the first cavity 110a depend on the depth and shape of the cavity required for the bulk acoustic wave resonator to be manufactured, that is, the depth of the first cavity 110a can be determined by forming the thickness of the support layer 102.
  • the shape of the bottom surface of the first cavity 110a can be a rectangle or a polygon other than a rectangle, such as a pentagon, a hexagon, an octagon, etc., and can also be a circle or an ellipse.
  • step S06 is performed: bonding a carrier substrate 100 on the supporting layer 102, the carrier substrate covering the first cavity 110a.
  • the material of the carrier substrate 100 may refer to the material of the temporary substrate 300.
  • the bonding of the carrier substrate 100 and the supporting layer 102 can be achieved by thermocompression bonding, or the bonding of the carrier substrate 100 and the supporting layer 102 can be achieved by dry film bonding.
  • step S07 is performed: removing the temporary substrate.
  • the method of removing the temporary substrate can be mechanical grinding.
  • This embodiment provides another method for manufacturing a thin film piezoelectric acoustic resonator.
  • Figures 9 to 15 show corresponding structural schematic diagrams in different steps.
  • steps S01 to S05 in this embodiment are the same as those in the second embodiment.
  • the main difference from Embodiment 2 is that after step S05 is performed, before step S06 is performed, the method further includes: forming a first groove surrounding a portion of the protrusion 40 at the bottom of the first cavity 110a and on the periphery of the protrusion 40 The groove 130a, the first groove 130a penetrates the first electrode 103.
  • step S07 After performing step S07, it further includes: forming a second groove 130b on the second electrode 105 on the side opposite to the first groove 130a, and the second groove 130b surrounds another part of the protrusion 40, The second groove 130b penetrates the second electrode 105; the first groove 130a and the second groove 130b meet or have a gap at the two junctions of the projection of the carrier substrate 100 .
  • the first electrode layer 103 is etched to form a first trench 130a in the first cavity 110a and on the outer periphery of the protrusion 40.
  • the sidewalls of the first trench 130a may be inclined or vertical.
  • the sidewall of the first trench 130a and the plane of the piezoelectric layer 104 form an obtuse angle (the shape of the longitudinal section (the section along the thickness direction of the film) of the first trench 130a is a trapezoid).
  • the projection of the first groove 130a on the plane where the piezoelectric layer 104 is located is a half-ring or a half-ring-like polygon.
  • the first trench 130a after forming the first trench 130a, it further includes: forming a bonding layer 101 on the surface of the supporting layer 102, and the bonding layer 101 is used to bond the supporting layer 102 and The supporting substrate 100.
  • the bonding layer 101 is formed on the surface of the support layer 102, the first electrode 103, the protrusion 40, and the first trench 130a through a deposition process.
  • the material of the bonding layer includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, or ethyl silicate. It can be seen from the material of the support layer 102 described above that the material of the support layer 102 and the bonding layer 102 may be the same. In this embodiment, the material of the bonding layer 101 is ethyl silicate.
  • the bonding layer 101 after forming the bonding layer 101 in this embodiment, it further includes: forming a frequency adjustment layer 1010 on the surface of the first electrode 103 surrounded by the protrusion 40.
  • the bonding layer 102 may not be formed before the frequency adjustment layer 1010 is formed.
  • the material of the frequency adjustment layer 1010 may include silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, or ethyl silicate.
  • the material of the frequency adjustment layer 1010 and the material of the bonding layer 101 are the same as ethyl silicate.
  • the method of forming the bonding layer 101 and the frequency adjustment layer 1010 includes physical vapor deposition or chemical vapor deposition. For the function of the frequency adjustment layer 1010, refer to the description of Embodiment 1, and will not be repeated here.
  • step S06 is performed: bonding a carrier substrate 100 on the bonding layer 101, and the carrier substrate 100 covers the first cavity 110a.
  • the material of the carrier substrate 100 may refer to the material of the temporary substrate 300.
  • the carrier substrate 100 and the supporting layer 102 are bonded through the bonding layer 101.
  • step S07 removing the temporary substrate is performed.
  • a second trench 130b is formed on the second electrode 105 on the side opposite to the first trench 130a, and the second trench 130b surrounds another part of the trench.
  • the second groove 130b penetrates the second electrode 105.
  • the first trench 130 a and the second trench 130 b meet at two junctions of the projection of the carrier substrate 100. Form a closed irregular polygon.
  • the structure and forming method of the second trench 130b refer to the structure and forming method of the first trench 130a. In other embodiments, only the first trench 130a or the second trench 130b may be formed separately.
  • the structure and function of the first trench 130a and the second trench 130b are referred to Embodiment 1, and will not be repeated here.
  • the bonding layer 106 after removing the temporary substrate, it further includes: forming a bonding layer 106 on the piezoelectric laminate structure, the bonding layer 106 encloses a second cavity 110b, and the second cavity 110b
  • the cavity 110b is located above the first cavity 110a, and the protrusion 40 is located inside the second cavity 110b; a capping substrate 200 is bonded to the bonding layer 106, and the capping substrate 200 covers all The second cavity 110b.
  • It also includes forming a first electrical connection portion and a second electrical connection portion. The first electrical connection portion is used for electrical connection with the first electrode of the effective resonance area, and the second electrical connection portion is used for electrical connection with the second electrode of the effective resonance area.
  • forming the first electrical connection part includes:
  • a first through hole 140 penetrating the lower layer structure of the first electrode 103 is formed by an etching process, and the first through hole 140 exposes the first electrode 103.
  • an electroplating process or The first conductive interconnection layer 141 is formed by a physical vapor deposition process, and the first conductive interconnection layer 141 covers the inner surface of the first through hole 140 and the carrier substrate 100 on the outer periphery of the first through hole 140.
  • Part of the surface is connected to the first electrode 103; an insulating layer 160 is formed on the surface of the first conductive interconnection layer 141 by a deposition process; a first conductive bump 142 is formed on the surface of the carrier substrate 100, the The first conductive bump 142 is electrically connected to the first conductive interconnect layer 141.
  • Forming the second electrical connection part includes:
  • a second through hole 150 penetrating the lower layer structure of the first electrode 103 is formed by an etching process, and the second through hole 150 exposes the first electrode 103.
  • a deposition process or The electroplating process forms a second conductive interconnection layer 151 that covers the inner surface of the second through hole 150 and a part of the surface of the carrier substrate 100 on the outer periphery of the second through hole 150 , Connected to the first electrode 103; forming an insulating layer 160 on the surface of the second conductive interconnection layer 151 through a deposition process; forming a second conductive bump 152 on the surface of the carrier substrate 100, the second The conductive bump 152 is electrically connected to the second conductive interconnection layer 151.
  • the structure of the first electrical connection portion and the second electrical connection portion are the same, but the positions are different. Therefore, the first electrical connection portion and the second electrical connection portion can be formed at the same time, which saves process steps and shortens the manufacturing cycle.
  • the conductive interconnection structure 120 includes two parts.
  • the formation method of the two-part conductive interconnection structure 120 is the same. The method is: forming a through hole through an etching process outside the effective resonance region, and the through hole penetrates the second electrode 105 and the piezoelectric layer 104 to expose the first electrode 103.
  • the conductive interconnection structure 120 is formed in the through hole through an electroplating process.
  • the material of the conductive interconnection structure 120 is the same as that of the first conductive interconnection layer 141 and the second conductive interconnection layer 151, and both are copper. Refer to Embodiment 1 for the function of the conductive interconnection structure 120.
  • Example 1 for the materials of the cover substrate 200 and the bonding layer 106.

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Abstract

一种薄膜体声波谐振器及其制造方法,其中,薄膜体声波谐振器包括:承载衬底(100);支撑层(102),键合于所述承载衬底(100)上,所述支撑层(102)围成第一空腔(110a),所述第一空腔(110a)暴露出所述承载衬底(100);压电叠层结构,覆盖所述第一空腔(110a),所述压电叠层结构从下至上包括依次层叠的第一电极(103)、压电层(104)和第二电极(105);有效谐振区边界处设置有凸起(40),所述凸起(40)设置于所述压电叠层结构上表面或下表面;或,所述凸起(40)部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面。有益效果在于,能够解决薄膜体声波谐振器结构强度低和横波泄露导致的品质因数低的问题。

Description

一种薄膜体声波谐振器及其制造方法 技术领域
本发明涉及半导体器件制造领域,尤其涉及一种薄膜体声波谐振器及其制造方法。
背景技术
随着无线通讯技术的不断发展,为了满足各种无线通讯终端的多功能化需求,终端设备需要能够利用不同的载波频谱传输数据,同时,为了在有限的带宽内支持足够的数据传输率,对于射频系统也提出了严格的性能要求。射频滤波器是射频系统的重要组成部分,可以将通信频谱外的干扰和噪声滤出以满足射频系统和通信协议对于信噪比的需求。以手机为例,由于每一个频带需要有对应的滤波器,一台手机中可能需要设置数十个滤波器。
通常,薄膜体声波谐振器包括两个薄膜电极,并且两个薄膜电极之间设有压电薄膜层,其工作原理为利用压电薄膜层在交变电场下产生振动,该振动激励出沿压电薄膜层厚度方向传播的体声波,此声波传至上下电极与空气交界面被反射回来,进而在薄膜内部来回反射,形成震荡。当声波在压电薄膜层中传播正好是半波长的奇数倍时,形成驻波震荡。
技术问题
但是,目前制作出的空腔型薄膜体声波谐振器,存在横波损失,结构强度不够,使品质因子(Q)无法进一步提高、成品率低等问题,因此无法满足高性能的射频系统的需求。
技术解决方案
本发明揭示了一种薄膜体声波谐振器及其制造方法,能够解决薄膜体声波谐振器横波泄露造成品质因数不高,以及结构强度低的问题。
为解决上述技术问题,本发明提供了一种薄膜体声波谐振器,包括:
承载衬底;
支撑层,键合于所述承载衬底上,所述支撑层围成第一空腔,所述第一空腔暴露出所述承载衬底;
压电叠层结构,覆盖所述第一空腔,所述压电叠层结构从下至上包括依次层叠的第一电极、压电层和第二电极;
有效谐振区边界处设置有凸起,所述凸起设置于所述压电叠层结构上表面或下表面;或,
所述凸起部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面。
本发明还提供了一种薄膜体声波谐振器的制造方法,包括:
提供临时衬底;
在所述临时衬底上形成压电叠层结构,所述压电叠层结构包括由下至上依次设置的第二电极、压电层、第一电极;
在所述第一电极、第二电极、压电层其中之一上形成凸起,或者在其中之一上形成部分凸起,另一上形成另一部分凸起,所述凸起在所述压电层上的投影位于有效谐振区的边界处;
形成支撑层,覆盖所述压电叠层结构;
图形化所述支撑层,形成第一空腔,所述第一空腔贯穿所述支撑层;
在所述支撑层上键合承载衬底,所述承载衬底覆盖所述第一空腔;
去除所述临时衬底。
本发明的有益效果在于:
沿有效谐振区的边界设置凸起,使有效谐振区内部和凸起所在的区域声阻抗失配,有效防止声波的横向泄露,提高了谐振器的品质因数;
进一步地,通过第一沟槽和第二沟槽
有益效果
本发明的有益效果在于:
沿有效谐振区的边界设置凸起,使有效谐振区内部和凸起所在的区域声阻抗失配,有效防止声波的横向泄露,提高了谐振器的品质因数;
进一步地,通过第一沟槽和第二沟槽定义出谐振器的有效谐振区,第一沟槽和第二沟槽分别贯穿第一电极和第二电极,压电层保持完整的膜层未经过刻蚀,保证了谐振器的结构强度,提高了制造谐振器的成品率;
进一步地,有效谐振区外部的所述第一电极、所述第二电极在垂直于所述压电层方向设有重叠的区域,还包括导电互连结构,连接所述有效谐振区的外部的所述第一电极和所述第二电极。,使有效谐振区外部的第一电极和第二电极短接,使有效谐振区外部的压电叠层结构的压电层上下不存在压差,有效谐振区外部不产生驻波振荡。
进一步地,有效谐振区内设有频率调整层,通过设置频率调整层的厚度,改变有效谐振区的整体厚度,以此改变谐振器的频率。
附图说明
通过结合附图对本发明示例性实施例进行更详细的描述,本发明的上述以及其它目的、特征和优势将变得更加明显,在本发明示例性实施例中,相同的参考标号通常代表相同部件。
图1示出了实施例1的一种薄膜体声波谐振器的结构示意图。
图2至图8示出了实施例2的一种薄膜体声波谐振器的制造方法的不同步骤对应的结构示意图。
图9至图15示出了实施例3的一种薄膜体声波谐振器的制造方法的不同步骤对应的结构示意图。
附图标记说明:
100-承载衬底;101-键合层;102支撑层;103-第一电极;104-压电层;105-第二电极;106-接合层;110a-第一空腔;110b-第二空腔;120-导电互连结构;130a-第一沟槽;130b-第二沟槽;1010-频率调整层;140-第一通孔;141-第一导电互连层;142-第一导电凸起;151-第二导电互连层;150-第二通孔;152-第二导电凸起;160-绝缘层;200-封盖基板;40-凸起;300-临时衬底。
本发明的实施方式
以下结合附图和具体实施例对本发明作进一步详细说明。根据下面的说明和附图,本发明的优点和特征将更清楚,然而,需说明的是,本发明技术方案的构思可按照多种不同的形式实施,并不局限于在此阐述的特定实施例。附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。
应当明白,当元件或层被称为“在...上”、“与...相邻”、“连接到”或“耦合到”其它元件或层时,其可以直接地在其它元件或层上、与之相邻、连接或耦合到其它元件或层,或者可以存在居间的元件或层。相反,当元件被称为“直接在...上”、“与...直接相邻”、“直接连接到”或“直接耦合到”其它元件或层时,则不存在居间的元件或层。应当明白,尽管可使用术语第一、第二、第三等描述各种元件、部件、区、层和/或部分,这些元件、部件、区、层和/或部分不应当被这些术语限制。这些术语仅仅用来区分一个元件、部件、区、层或部分与另一个元件、部件、区、层或部分。因此,在不脱离本发明教导之下,下面讨论的第一元件、部件、区、层或部分可表示为第二元件、部件、区、层或部分。
空间关系术语例如“在...下”、“在...下面”、“下面的”、“在...之下”、“在...之上”、“上面的”等,在这里可为了方便描述而被使用从而描述图中所示的一个元件或特征与其它元件或特征的关系。应当明白,除了图中所示的取向以外,空间关系术语意图还包括使用和操作中的器件的不同取向。例如,如果附图中的器件翻转,然后,描述为“在其它元件下面”或“在其之下”或“在其下”元件或特征将取向为在其它元件或特征“上”。因此,示例性术语“在...下面”和“在...下”可包括上和下两个取向。器件可以另外地取向(旋转90度或其它取向)并且在此使用的空间描述语相应地被解释。
在此使用的术语的目的仅在于描述具体实施例并且不作为本发明的限制。在此使用时,单数形式的“一”、“一个”和“所述/该”也意图包括复数形式,除非上下文清楚指出另外的方式。还应明白术语“组成”和/或“包括”,当在该说明书中使用时,确定所述特征、整数、步骤、操作、元件和/或部件的存在,但不排除一个或更多其它的特征、整数、步骤、操作、元件、部件和/或组的存在或添加。在此使用时,术语“和/或”包括相关所列项目的任何及所有组合。
如果本文的方法包括一系列步骤,且本文所呈现的这些步骤的顺序并非必须是可执行这些步骤的唯一顺序,且一些的步骤可被省略和/或一些本文未描述的其他步骤可被添加到该方法。若某附图中的构件与其他附图中的构件相同,虽然在所有附图中都可轻易辨认出这些构件,但为了使附图的说明更为清楚,本说明书不会将所有相同构件的标号标于每一图中。
实施例1
本实施例提供了一种薄膜体声波谐振器,图1示出了实施例1的一种薄膜压电声波谐振器的结构示意图,请参考图1,所述薄膜体声波谐振器包括:
承载衬底100;
支撑层102,键合于所述承载衬底100上,所述支撑层102围成第一空腔110a,所述第一空腔110a暴露出所述承载衬底100;
压电叠层结构,覆盖所述第一空腔110a,所述压电叠层结构从下至上包括依次层叠的第一电极103、压电层104和第二电极105;
有效谐振区边界处设置有凸起40,所述凸起40设置于所述压电叠层结构上表面或下表面;或,所述凸起40部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面。
本实施例中,所述凸起40全部位于压电叠层结构的下表面。全部位于第一空腔110a所在的一侧。所述凸起40包围的区域为有效谐振区,凸起40外部为无效谐振区。所述有效谐振区内的所述第一电极103、压电层104和第二电极105在垂直于所述承载衬底100方向上相互重叠。在其他实施例中,所述凸起40可以全部位于压电叠层结构的上表面,背离第一空腔110a所在侧。所述凸起40还可以部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面。
本实施例中,所述凸起40在承载衬底100上的投影围成封闭的环形,如封闭的不规则多边形、圆形或椭圆形。所述凸起40使其内部有效谐振区和凸起40所在的区域声阻抗失配,可以有效防止声波的横向泄露,提高谐振器的品质因数。在其他实施例中,所述凸起40在承载衬底100上的投影可以不是完全封闭的图形。应当理解,当凸起40在承载衬底100上的投影为封闭图形时,更有利于防止声波的横向泄露。
所述凸起40的材料可以为导电材料也可以为介质材料,当凸起40的材料为导电材料时,可以和第一电极103或第二电极105的材料相同,当凸起40的材料为介质材料时,可以为氧化硅、氮化硅、氮氧化硅或碳氮化硅中的任意一种,但不限于以上材料。
承载衬底100可以为以下所提到的材料中的至少一种:硅(Si)、锗(Ge)、锗硅(SiGe)、碳硅(SiC)、碳锗硅(SiGeC)、砷化铟(InAs)、砷化镓(GaAs)、磷化铟(InP)或者其它III/V化合物半导体,还包括这些半导体构成的多层结构等,也可为氧化铝等的陶瓷基底、石英或玻璃基底等。
支撑层102键合于承载衬底100上,且支撑层102围成第一空腔110a,所述第一空腔110a暴露出所述承载衬底100。本实施例中,第一空腔110a为环形的封闭空腔,第一空腔110a可以通过刻蚀工艺刻蚀支撑层102形成。但本发明的技术不仅仅限定于此。需要说明的是,支撑层102是通过键合的方式与承载衬底100结合,键合的方式包括:共价键键合、粘结键合或熔融键合。本实施例中,支撑层102和承载衬底100通过键合层101实现键合,键合层101的材料包括氧化硅、氮化硅、氮氧化硅、碳氮化硅或硅酸乙酯。
本实施例中,第一空腔110a的底面的形状为矩形,但在本发明的其他实施例中,第一空腔110a在第一电极103底面的形状还可以是圆形、椭圆形或是矩形以外的多边形,例如五边形、六边形等。支撑层102的材料可以是任意适合的介电材料,包括但不限于氧化硅、氮化硅、氮氧化硅、碳氮化硅等材料中的一种。所述支撑层102与所述键合层101的材料可以相同。
第一空腔110a的上方设有压电叠层结构,压电叠层结构从下至上依次包括第一电极103、压电层104和第二电极105。第一电极103位于支撑层102上,压电层104位于第一电极103上,第二电极105位于压电层104上。第一空腔110a的上方的第一电极103、压电层104和第二电极105在垂直于承载衬底100的方向上设有重叠区域,位于凸起40内部的重叠区域为有效谐振区。
本实施例中,压电层104遮盖所述第一空腔110a,遮盖所述第一空腔110a应当理解为压电层104为完整的膜层,没有经过刻蚀。并不意味着压电层104将第一空腔110a全部遮盖,形成密封的空腔。当然,压电层104可以完全遮盖第一空腔110a,形成密封的空腔。压电层不经过刻蚀可以保证压电叠层结构具有一定的厚度,使谐振器具有一定的结构强度。提高制作谐振器的成品率。
在一个实施例中,支撑层102与第一电极103之间还设置有刻蚀停止层,其材质包括但不限于氮化硅(Si3N4)和氮氧化硅(SiON)。刻蚀停止层一方面可以用于增加最终制造的薄膜体声波谐振器的结构稳定性,另一方面,刻蚀停止层与支撑层102相比具有较低的刻蚀速率,可以在刻蚀支撑层102形成第一空腔110a的过程中防止过刻蚀,保护位于其下的第一电极103的表面不受到损伤,从而提高器件性能与可靠性。
本实施例中,压电叠层结构的表面还包括第一沟槽130a和第二沟槽130b,第一沟槽130a位于压电叠层结构的下表面、所述第一空腔110a所在侧,贯穿所述第一电极103,环绕于所述凸起40所在区域的外周。第二沟槽130b位于压电叠层结构的上表面,贯穿所述第二电极105,环绕于所述凸起40所在区域的外周。第一沟槽130a的两个端部与第二沟槽130b的两个端部相对设置,使所述第一沟槽130a与所述第二沟槽130b在所述承载衬底100的投影的两个交界处相接或设有间隙。本实施例中,所述凸起40在压电层104的投影为封闭的多边形,第一沟槽130a和第二沟槽130b的内边缘沿着所述凸起40的外边界设置,即所述凸起40的外边界与第一沟槽130a和所述第二沟槽130b的内边缘重合。第一沟槽130a与第二沟槽130b在所述承载衬底100的投影为封闭的图形,与凸起40在承载衬底100的投影的图形形状一致,位于凸起40形成的投影的外周。
应当理解,凸起40为环形(当凸起40全部位于压电叠层结构的下表面或上表面时,凸起40构成环形;当凸起40位于压电叠层结构的两个表面时,两部分凸起的投影共同构成一个整体环形)。当凸起40全部位于压电叠层结构的上表面或下表面,第一沟槽130a环绕于部分所述凸起40的外周,第二沟槽130b环绕于剩余部分凸起40的外周(此时第二沟槽130b环绕于凸起40的外周意思为环绕于凸起40所述区域的压电叠层结构表面的外周,并不直接环绕于凸起40的外周)。当所述凸起40部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面时,第一沟槽130a可以环绕于位于压电叠层结构下表面的凸起40的外周,第二沟槽130b可以环绕于位于压电叠层结构上表面的凸起40的外周。但本发明并不限于此,只要第一沟槽130a和第二沟槽130b相互配合环绕于凸起40所在区域的外周即可。
凸起40使凸起内部区域的声阻抗和凸起所在区域的声阻抗失配,界定了谐振器有效谐振区的边界。第一沟槽130a和第二沟槽130b分别将第一电极103和第二电极105隔断,使谐振器不能满足工作条件(工作条件为第一电极103、压电层104和第二电极105在厚度方向上相互重叠),进一步界定了谐振器的有效谐振区的边界。凸起40通过质量块的添加使声阻抗失配,第一沟槽130a和第二沟槽130b通过使电极端面和空气接触,使声阻抗失配,两者均起到阻止横波泄露的问题,提高了谐振器的Q值。当然,在其他实施例中,也可以只单独设置第一沟槽130a或第二沟槽130b,由于第一电极103和第二电极105需要引入电信号,第一沟槽130a或第二沟槽130b不适宜形成封闭的环形,此时第一沟槽130a或第二沟槽130b不能完全包围凸起40所在的区域。可以将第一沟槽130a或第二沟槽130b构成接近封闭的环形,非封闭的区域用于引入电信号。这种设置方式可以简化工艺流程,降低谐振器成本。
本实施例中,还包括频率调整层1010,设置于所述有效谐振区的所述第一电极103的表面。在另一个实施例中,还可以设置于所述有效谐振区的所述第二电极105的表面。频率调整层1010用于调整谐振器的频率,谐振器的频率和有效谐振区的厚度有关,在制作滤波器时,不同谐振器的第一电极103、第二电极105和压电层104的厚度相同,为了使不同谐振器的频率不同,可以设置不同厚度的频率调整层1010。本实施例中,频率调整层1010的材料为硅酸乙酯。频率调整层1010的材料还可以为:氧化硅、氮化硅、氮氧化硅或碳氮化硅。
本实施例中,还包括接合层106,设置于所述压电叠层结构上方、所述接合层106围成第二空腔110b,所述第二空腔110b暴露出所述压电叠层结构的上表面,所述第二空腔110b位于所述第一空腔110a上方,所述第一沟槽130a和所述第二沟槽130b位于所述第二空腔110b围成的区域内部。还包括封盖基板200,设置于所述接合层106上,并覆盖所述第二空腔110b。本实施例中,接合层106围成封闭的环形,第二空腔110b为封闭的空腔。接合层106的下表面一部分连接于有效谐振区外部的第二电极105,一部分连接于有效谐振区外部的第一电极103。接合层106可以采用常规的键合材料,例如氧化硅、氮化硅、氮氧化硅、硅酸乙酯等,也可以是光固化材料或热固化材料等黏结剂,例如粘片膜(DieAttachFilm,DAF)或干膜(DryFilm)。接合层的材料和封盖基板200的材料可以相同,两者为一体结构,第二空腔110b通过在膜层(形成接合层106和封盖基板200)中形成空间而形成。
本实施例中,还包括第一电连接部、第二电连接部和导电互连结构120,第一电连接部用于将电信号引入有效谐振区的第一电极103,第二电连接部用于将电信号引入有效谐振区的第二电极105。第一电极103和第二电极105通电后,压电层104上下表面产生压差,形成驻波振荡。导电互连结构120用于将有效谐振区外的第一电极和第二电极短接。由图可知,有效谐振区外也包含在垂直于压电层方向上压电层、第一电极、第二电极相互重叠的区域。当第一电极和第二电极通电,有效谐振区外部的压电层表面上下也能够产生压差,也产生了驻波振荡,然而有效谐振区外部的驻波振荡是不希望发生的,本实施例将有效谐振区外部的第一电极和第二电极短接,使有效谐振区外部的压电层上下电压一致,有效谐振区外部不能够产生驻波振荡,提高了谐振器的Q值。具体的第一电连接部、第二电连接部和导电互连结构120的结构如下:
第一电连接部包括:
第一通孔140,所述第一通孔140贯穿有效谐振区外部的所述第一电极103的下层结构,暴露出所述第一电极103;
第一导电互连层141,覆盖所述第一通孔140的内表面、及第一通孔140外周的所述承载衬底100的部分表面,与所述第一电极103连接;
绝缘层160,覆盖所述第一导电互连层141和所述承载衬底100的表面;
导电凸起142,设置于所述承载衬底100的表面、与所述第一导电互连层电141连接。
所述第二电连接部包括:
第二通孔150,所述第二通孔150贯穿有效谐振区外部的所述第一电极103的下层结构,暴露出所述第一电极103;
第二导电互连层151,覆盖所述第二通孔150的内表面、及第二通孔150外周的所述承载衬底100的部分表面,与所述第一电极103连接;
绝缘层160,覆盖所述第二导电互连层151和所述承载衬底100的表面;
第二导电凸起152,设置于所述承载衬底100的表面、与所述第二导电互连层电151连接。
本实施例中,导电互连结构120包括两部分,一部分设置于第二沟槽130b的外部区域,连接第一电极103和第二电极105,通过第一电极103与第一电连接部电连接。导电互连结构120的另一部分设置于第一沟槽130a的外部区域,连接第一电极103和第二电极105,通过第一电极103与第二电连接部电连接。两部分导电互连结构120均设有覆盖第二电极105部分表面的区域,此区域增大了与第二电极105的接触面积,减少了接触阻抗,能够防止电流过大引起的局部高温。
需要说明的是,第二电连接部并不直接与第二电极电连接,而是连接于有效谐振区外部的第一电极,通过导电互连结构120与有效谐振区的第二电极电连接。可以看出,第一电连接部和第二电连接部在结构上一致,只是设置的位置不同,第一电连接部与有效谐振区内部的第一电极电连接,给有效谐振区内部的第一电极供电,第一电连接部通过有效谐振区外部的第一电极和导电互连结构120与有效谐振区外部的第二电极电连接,并不连接于有效谐振区内部的第二电极。同理,第二电连接部连接于有效谐振区外部的第一电极和有效谐振区内部的第二电极,实现对有效谐振区内部的第二电极供电。
实施例2
实施例2提供了一种薄膜体声波谐振器的制造方法,包括以下步骤:
S01:提供临时衬底;
S02:在所述临时衬底上形成压电叠层结构,所述压电叠层结构包括由下至上依次设置的第二电极、压电层、第一电极;
S03:在所述第一电极、第二电极、压电层其中之一上形成凸起,或者在其中之一上形成部分凸起,另一上形成另一部分凸起,所述凸起在所述压电层上的投影位于有效谐振区的边界处;
S04:形成支撑层,覆盖所述压电叠层结构;
S05:图形化所述支撑层,形成第一空腔,所述第一空腔贯穿所述支撑层;
S06:在所述支撑层上键合承载衬底,所述承载衬底覆盖所述第一空腔;
S07:去除所述临时衬底。
图2至图8示出了根据本发明实施例2的一种薄膜压电声波谐振器的制造方法不同阶段的结构示意图,请参考图2至图8,详细说明各步骤。
参考图2,执行步骤S01:提供临时衬底300。
临时衬底300可以是以下所提到的材料中的至少一种:硅(Si)、锗(Ge)、锗硅(SiGe)、碳硅(SiC)、碳锗硅(SiGeC)、砷化铟(InAs)、砷化镓(GaAs)、磷化铟(InP)或者其它III/V化合物半导体,也可为氧化铝等的陶瓷基底、石英或玻璃基底等。
参考图3和图4,执行步骤S02:在所述临时衬底300上形成压电叠层结构,所述压电叠层结构包括由下至上依次设置的第二电极105、压电层104、第一电极103。执行步骤S03:在所述第一电极103、第二电极105、压电层104其中之一上形成凸起40,或者在其中之一上形成部分凸起,另一上形成另一部分凸起,所述凸起40在所述压电层104上的投影与所述谐振器的有效谐振区的边界吻合。
本实施例中,所述凸起40全部形成在所述第一电极103上。形成的所述凸起40在垂直于所述在压电层104方向上的投影为不规则多边形,如五边形、六边形,或者圆形、椭圆形。需要说明的是,步骤S03所描述的“上”表示与相应的膜层相连,包括位于膜层的上表面或下表面。当凸起位于第一电极上时,包括位于第一电极的上表面或下表面;位于第二电极上包括位于第二电极的上表面或下表面;位于压电层上包括位于压电层的上表面或下表面。
第二电极105和第一电极103的材料可以使用本领域技术人员熟知的任意合适的导电材料或半导体材料,其中,导电材料可以为具有导电性能的金属材料,例如,由钼(Mo)、铝(Al)、铜(Cu)、钨(W)、钽(Ta)、铂(Pt)、钌(Ru)、铑(Rh)、铱(Ir)、铬(Cr)、钛(Ti)、金(Au)、锇(Os)、铼(Re)、钯(Pd)等金属中一种制成或由上述金属形成的叠层制成,半导体材料例如是Si、Ge、SiGe、SiC、SiGeC等。可以通过磁控溅射、蒸镀等物理气相沉积或者化学气相沉积方法形成第二电极105和第一电极103。压电层104的材料可以使用氮化铝(AlN)、氧化锌(ZnO)、锆钛酸铅(PZT)、铌酸锂(LiNbO3)、石英(Quartz)、铌酸钾(KNbO3)或钽酸锂(LiTaO3)等具有纤锌矿型结晶结构的压电材料及它们的组合。当压电层104包括氮化铝(AlN)时,压电层104还可包括稀土金属,例如钪(Sc)、铒(Er)、钇(Y)和镧(La)中的至少一种。此外,当压电层104包括氮化铝(AlN)时,压电层104还可包括过渡金属,例如锆(Zr)、钛(Ti)、锰(Mn)和铪(Hf)中的至少一种。可以使用化学气相沉积、物理气相沉积或原子层沉积等本领域技术人员熟知的任何适合的方法沉积形成压电层104。可选的,本实施例中,第二电极105和第一电极103由金属钼(Mo)制成,压电层104由氮化铝(AlN)制成。
本实施例中形成所述凸起40的方法为:形成第二电极105、压电层104后,在压电层104上形成导电材料层,此时形成的导电材料层的厚度为第一电极103和凸起40的厚度的总和,形成导电材料层后,刻蚀设定厚度的导电材料层,形成凸起40和第一电极103。本发明形成凸起的方法有多种,从形成凸起的材料划分包括以下两种形式:
第一种形式:在所述临时衬底上形成结构材料层,对所述结构材料层进行刻蚀工艺形成所述凸起,所述结构材料层用于形成所述第一电极或所述第二电极或所述压电层。本实施例中,形成凸起40的方法为此种形式。
第二种形式:在形成所述第一电极或所述第二电极或所述压电层后,形成凸起材料层,对所述凸起材料层进行刻蚀工艺形成所述凸起。
第一种形式中,凸起和结构材料层的材料形同,可以通过一次沉积工艺形成结构材料层和凸起材料层,减少工艺步骤。第二种形式中,凸起材料和结构材料层的材料不同,需要通过两次沉积工艺形成,但凸起材料的选择不限于和第一电极或第二电极或压电层材料相同,凸起材料的选择范围更广。
针对以上任何一种形式,形成所述压电叠层结构及所述凸起具体方法可以包括:
方法1:在所述临时衬底上依次形成第二电极、压电层、第一电极,之后,在所述第一电极上形成所述凸起。此时所述凸起的材料和第一电极的材料可以相同也可以不同。本实施例中两者的材料相同,通过沉积工艺形成导电材料层,通过刻蚀工艺形成第一电极和凸起。在其他实施例中,两者材料不相同,可以先形成第一电极,之后通过沉积工艺形成凸起材料层,再通过刻蚀工艺形成凸起。
方法2,在所述临时衬底上形成所述凸起,在所述凸起上,所述临时衬底上依次形成第二电极、压电层、第一电极。此种方式也包括两种情况,一种为凸起的材料和第二电极的材料相同,并通过一次沉积工艺形成。此时,在临时衬底上形成导电材料层,导电材料层的厚度为凸起和第二电极高度的总和,之后通过刻蚀工艺形成形成凸起和第二电极。另一种为凸起和第二电极分别单独形成,首先形成凸起材料层,通过刻蚀工艺形成凸起,再在凸起上、临时衬底上形成第二电极,之后依次形成压电层和第一电极。
方法3,在所述临时衬底上形成第二电极,在所述第二电极上形成所述凸起,在所述凸起、所述第二电极上依次形成所述压电层,所述第一电极。此方法与方法2的区别在于,方法2的凸起形成在第二电极的下表面,此方法的凸起形成在第二电极的上表面,形成方法可以参照方法2,此处不在赘述。
方法4,在所述临时衬底上依次形成第二电极、压电层,在所述压电层上形成所述凸起,在所述凸起、所述压电层上形成第一电极。此方法的凸起形成在压电层上,可以形成在压电层的上表面也可以形成在压电层的下表面。凸起的材料可以和压电层的材料相同也可以和压电层的材料不同。两者材料相同和不同时的形成凸起的方法可以参照方法1、方法2或方法3在第一电极或第二电极表面形成凸起的方法,此处不在赘述。
方法5,在所述临时衬底上依次形成第二电极、压电层、第一电极,之后,在所述第一电极上形成一部分所述凸起,去除所述临时衬底后,在所述第二电极上形成另一部分所述凸起。此方法中,凸起由两部分组成,分别形成在第一电极和第二电极上。两部分凸起在垂直于压电层的投影与谐振器的有效谐振区的边界吻合。形成凸起的具体方法参照方法1、方法2或方法3,此处不再赘述。
以上仅列举了凸起形成的几种不同的方法,应当理解还有其他的方法,如当凸起包括两部分时,可以一部分形成在压电层上,一部分形成在第一电极或第二电极上。只要凸起形成在压电叠层结构上,位于有效谐振区的边界即可。
参考图5,执行步骤S04:形成支撑层102,覆盖所述压电叠层结构。
通过物理气相沉积或化学气相沉积形成支撑层102。支撑层102的材料可以是任意适合的介电材料,包括但不限于氧化硅、氮化硅、氮氧化硅、碳氮化硅等材料中的至少一种。
参考图6,执行步骤S05:图形化所述支撑层102,形成第一空腔110a,所述第一空腔110a贯穿所述支撑层102。
通过刻蚀工艺刻蚀支撑层102形成第一空腔110a,并暴露出底部的第一电极层103、凸起40。该刻蚀工艺可以是湿法刻蚀或者干法刻蚀工艺,干法刻蚀包括但不限于反应离子刻蚀(RIE)、离子束刻蚀、等离子体刻蚀。第一空腔110a的深度和形状均取决于待制造的体声波谐振器所需空腔的深度和形状,即可以通过形成支撑层102的厚度来确定第一空腔110a的深度。第一空腔110a底面的形状可以为矩形或是矩形以外的多边形,例如五边形、六边形、八边形等,也可以为圆形或椭圆形。
参考图7,执行步骤S06:在所述支撑层102上键合承载衬底100,所述承载衬底覆盖所述第一空腔110a。承载衬底100的材料可以参照临时衬底300的材料。可以通过热压键合的方式实现承载衬底100与支撑层102的键合,也可以通过干膜粘合的方式实现承载衬底100与支撑层102的键合。
参考图8,执行步骤S07:去除所述临时衬底。去除临时衬底的方法可以采用机械研磨。
实施例3
本实施例提供了另一种薄膜压电声波谐振器的制造方法。图9至图15示出了不同步骤中对应的结构示意图。
参考图9至图15,本实施例中步骤S01至S05与实施例2相同。与实施例2的主要区别在于执行完步骤S05之后,执行步骤S06之前还包括:在所述第一空腔110a底部、所述凸起40的外围形成环绕部分所述凸起40的第一沟槽130a,所述第一沟槽130a贯穿所述第一电极103。执行步骤S07之后还包括:在所述第二电极105上、所述第一沟槽130a相对的一侧形成第二沟槽130b,所述第二沟槽130b环绕另一部分所述凸起40,所述第二沟槽130b贯穿所述第二电极105;所述第一沟槽130a和所述第二沟槽130b在所述承载衬底100的投影的两个交界处相接或设有间隙。
具体地,参照图9,刻蚀第一电极层103以在第一空腔110a内、凸起40的外周形成第一沟槽130a,第一沟槽130a的侧壁可以是倾斜或者竖直的。本实施例中,第一沟槽130a的侧壁与压电层104所在平面构成一钝角(第一沟槽130a的纵向截面(沿膜层厚度方向的截面)形状为梯形)。第一沟槽130a在压电层104所在平面的投影为一半环形或类似半环形的多边形。
参考图10,本实施例中,形成第一沟槽130a后,还包括:在所述支撑层102的表面形成键合层101,所述键合层101用于键合所述支撑层102与所述承载衬底100。通过沉积工艺在支撑层102、第一电极103、凸起40以及第一沟槽130a的表面形成键合层101。键合层的材料包括氧化硅、氮化硅、氮氧化硅、碳氮化硅或硅酸乙酯。由上文表述的支撑层102的材料可知,所述支撑层102与所述键合层102的材料可以相同。本实施例中,键合层101的材料为硅酸乙酯。
参考图11,本实施例中形成所述键合层101后还包括:在所述凸起40包围的所述第一电极103的表面形成频率调整层1010。需要说明的是,形成所述频率调整层1010和键合层是两个独立的步骤。形成频率调整层1010之前可以不形成键合层102。频率调整层1010的材料可以包括氧化硅、氮化硅、氮氧化硅、碳氮化硅或硅酸乙酯。本实施例中,频率调整层1010的材料与键合层101的材料相同为硅酸乙酯。形成键合层101和频率调整层1010的方法包括物理气相沉积或化学气相沉积。频率调整层1010的作用参见实施例1的描述,此处不在赘述。
参考图12,执行步骤S06:在所述键合层101上键合承载衬底100,所述承载衬底100覆盖所述第一空腔110a。承载衬底100的材料可以参照临时衬底300的材料。通过键合层101将承载衬底100与支撑层102进行键合。
参考图13,执行步骤S07:去除所述临时衬底。
参考图14,去除所述临时衬底之后,在所述第二电极105上、所述第一沟槽130a相对的一侧形成第二沟槽130b,所述第二沟槽130b环绕另一部分所述凸起40,所述第二沟槽130b贯穿所述第二电极105。本实施例中,所述第一沟槽130a和所述第二沟槽130b在所述承载衬底100的投影的两个交界处相接。构成封闭的不规则多边形。第二沟槽130b的结构和形成方法参照第一沟槽130a的结构和形成方法。在其他实施例中,也可以只单独形成第一沟槽130a或第二沟槽130b。第一沟槽130a和第二沟槽130b的结构和作用参照实施例1,此处不再赘述。
参考图15,本实施例中,去除所述临时衬底后还包括:在所述压电叠层结构上形成接合层106,所述接合层106围成第二空腔110b,所述第二空腔110b位于所述第一空腔110a上方,所述凸起40位于所述第二空腔110b内部;在所述接合层106上键合封盖基板200,所述封盖基板200覆盖所述第二空腔110b。还包括形成第一电连接部和第二电连接部,第一电连接部用于和有效谐振区的第一电极电连接,第二电连接部用于和有效谐振区的第二电极电连接。还包括形成导电互连结构120,连接于所述有效谐振区外部的第一电极103和第二电极105。
其中形成所述第一电连接部包括:
通过刻蚀工艺形成贯穿所述第一电极103下层结构的第一通孔140,所述第一通孔140暴露出所述第一电极103,在所述第一通孔103中通过电镀工艺或物理气相沉积工艺形成第一导电互连层141,所述第一导电互连层141覆盖所述第一通孔140内表面、及所述第一通孔140外周的所述承载衬底100的部分表面,与所述第一电极103连接;在所述第一导电互连层141表面通过沉积工艺形成绝缘层160;在所述承载衬底100的表面形成第一导电凸起142,所述第一导电凸起142与所述第一导电互连层141电连接。
形成所述第二电连接部包括:
通过刻蚀工艺形成贯穿所述第一电极103下层结构的第二通孔150,所述第二通孔150暴露出所述第一电极103,在所述第二通孔150中通过沉积工艺或电镀工艺形成第二导电互连层151,所述第二导电互连层151覆盖所述第二通孔150内表面、及所述第二通孔150外周的所述承载衬底100的部分表面,与所述第一电极103连接;在所述第二导电互连层151表面通过沉积工艺形成绝缘层160;在所述承载衬底100的表面形成第二导电凸起152,所述第二导电凸起152与所述第二导电互连层151电连接。
第一电连接部和第二电连接部的结构相同,只是位置不同,因此第一电连接部和第二电连接部可以同时形成,节省工艺步骤,缩短制造周期。
本实施例中,导电互连结构120包括两部分,两部分导电互连结构的位置参照实施例1,两部分导电互连结构120的形成方法相同。所述方法为:在有效谐振区的外部通过刻蚀工艺形成通孔,所述通孔贯穿第二电极105和压电层104,暴露出第一电极103。通过电镀工艺在通孔中形成导电互连结构120。本实施例中,导电互连结构120的材质与第一导电互连层141、第二导电互连层151的材质相同,均为铜。导电互连结构120的作用参照实施例1。
封盖基板200和接合层106的材料参照实施例1。
需要说明的是,本说明书中的各个实施例均采用相关的方式描述,各个实施例之间相同相似的部分互相参见即可,每个实施例重点说明的都是与其他实施例的不同之处。尤其,对于方法实施例而言,由于其基本相似于结构实施例,所以描述的比较简单,相关之处参见方法实施例的部分说明即可。
上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。

Claims (23)

  1. 一种薄膜体声波谐振器,其特征在于,包括:
    承载衬底;
    支撑层,键合于所述承载衬底上,所述支撑层围成第一空腔,所述第一空腔暴露出所述承载衬底;
    压电叠层结构,覆盖所述第一空腔,所述压电叠层结构从下至上包括依次层叠的第一电极、压电层和第二电极;
    有效谐振区边界处设置有凸起,所述凸起设置于所述压电叠层结构上表面或下表面;或,
    所述凸起部分设置于所述压电叠层结构的上表面,部分设置于所述压电叠层结构的下表面。
  2. 如权利要求1所述的薄膜体声波谐振器,其特征在于,所述凸起在所述压电层方向上的投影为环形,所述环形内部为所述有效谐振区。
  3. 如权利要求1所述的薄膜体声波谐振器,其特征在于,所述压电层遮盖所述第一空腔。
  4. 如权利要求1所述的薄膜体声波谐振器,其特征在于,所述凸起的材料包括介质材料;
    或者,所述凸起与所述第一电极或所述第二电极的材料相同。
  5. 如权利要求1所述的薄膜体声波谐振器,其特征在于,还包括第一沟槽,位于所述第一空腔内部,贯穿所述第一电极,环绕于所述凸起所在区域的外周。
  6. 如权利要求5所述的薄膜体声波谐振器,其特征在于,还包括第二沟槽,与所述第一沟槽相对设置,贯穿所述第二电极,环绕于所述凸起所在区域的外周;
    所述第一沟槽与所述第二沟槽在所述承载衬底的投影的两个交界处相接或设有间隙。
  7. 如权利要求6所述的薄膜体声波谐振器,其特征在于,所述第一沟槽和所述第二沟槽的内边缘与所述凸起的外边界重合。
  8. 如权利要求6所述的薄膜体声波谐振器,其特征在于,还包括:
    接合层,设置于所述压电叠层结构上方、所述接合层围成第二空腔,所述第二空腔暴露出所述压电叠层结构的表面,所述第二空腔位于所述第一空腔上方,所述第一沟槽和所述第二沟槽位于所述第二空腔围成的区域内部;
    封盖基板,设置于所述接合层上,并覆盖所述第二空腔。
  9. 如权利要求1所述的薄膜体声波谐振器,其特征在于,还包括:
    频率调整层,设置于所述有效谐振区的所述第一电极或所述第二电极的表面。
  10. 如权利要求1所述的薄膜体声波谐振器,其特征在于,所述支撑层的材料包括氧化硅、氮化硅、氮氧化硅、碳氮化硅或硅酸乙酯。
  11. 如权利要求1所述的薄膜体声波谐振器,其特征在于,还包括键合层,设置于所述支撑层与所述承载衬底之间。
  12. 如权利要求11所述的薄膜体声波谐振器,其特征在于,所述支撑层与所述键合层的材料相同。
  13. 如权利要求1所述的薄膜体声波谐振器,其特征在于,所述有效谐振区外部的所述第一电极、所述第二电极在垂直于所述压电层方向设有重叠的部分,还包括导电互连结构,连接所述有效谐振区的外部的所述第一电极和所述第二电极。
  14. 一种薄膜体声波谐振器的制造方法,其特征在于,包括:
    提供临时衬底;
    在所述临时衬底上形成压电叠层结构,所述压电叠层结构包括由下至上依次设置的第二电极、压电层、第一电极;
    在所述第一电极、第二电极、压电层其中之一上形成凸起,或者在其中之一上形成部分凸起,另一上形成另一部分凸起,所述凸起在所述压电层上的投影位于有效谐振区的边界处;
    形成支撑层,覆盖所述压电叠层结构;
    图形化所述支撑层,形成第一空腔,所述第一空腔贯穿所述支撑层;
    在所述支撑层上键合承载衬底,所述承载衬底覆盖所述第一空腔;
    去除所述临时衬底。
  15. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,所述凸起在所述压电层方向上的投影为环形,所述环形内部为所述有效谐振区。
  16. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,形成所述凸起的方法包括:
    在所述临时衬底上形成结构材料层,对所述结构材料层进行刻蚀工艺形成所述凸起,所述结构材料层用于形成所述第一电极或所述第二电极或所述压电层;
    或者,在形成所述第一电极或所述第二电极或所述压电层后,形成凸起材料层,对所述凸起材料层进行刻蚀工艺形成所述凸起。
  17. 如权利要求16所述的薄膜体声波谐振器的制造方法,其特征在于,形成所述压电叠层结构及所述凸起包括:
    在所述临时衬底上依次形成第二电极、压电层、第一电极,之后,在所述第一电极上形成所述凸起;
    或者,在所述临时衬底上形成所述凸起,在所述凸起上,所述临时衬底上依次形成第二电极、压电层、第一电极;
    或者,在所述临时衬底上形成第二电极,在所述第二电极上形成所述凸起,在所述凸起、所述第二电极上依次形成所述压电层,所述第一电极;
    或者,在所述临时衬底上依次形成第二电极、压电层,在所述压电层上形成所述凸起,在所述凸起、所述压电层上形成第一电极;
    或者,在所述临时衬底上依次形成第二电极、压电层、第一电极,之后,在所述第一电极上形成一部分所述凸起,去除所述临时衬底后,在所述第二电极上形成另一部分所述凸起。
  18. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,所述凸起在所述承载衬底的投影的形状为不规则多边形。
  19. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,键合所述承载衬底前还包括:
    在所述第一空腔底部、所述凸起的外围形成至少环绕部分所述凸起的第一沟槽,所述第一沟槽贯穿所述第一电极。
  20. 如权利要求19所述的薄膜体声波谐振器的制造方法,其特征在于,所述第一沟槽环绕部分所述凸起,去除所述临时衬底后还包括:
    在所述第二电极上、所述第一沟槽相对的一侧形成第二沟槽,所述第二沟槽环绕另一部分所述凸起,所述第二沟槽贯穿所述第二电极;
    所述第一沟槽和所述第二沟槽在所述承载衬底的投影的两个交界处相接或设有间隙。
  21. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,在所述支撑层上键合所述承载衬底包括:
    在所述支撑层的表面形成键合层,通过所述键合层键合所述支撑层与所述承载衬底,所述支撑层与所述键合层的材料相同。
  22. 如权利要求21所述的薄膜体声波谐振器的制造方法,其特征在于,形成所述凸起后还包括:
    在所述凸起包围的所述第一电极或所述第二电极的表面形成频率调整层,所述频率调整层的材料与所述键合层的材料相同。
  23. 如权利要求14所述的薄膜体声波谐振器的制造方法,其特征在于,所述有效谐振区外部的所述第一电极、所述第二电极在垂直于所述压电层方向设有重叠的部分,还包括形成导电互连结构,连接于所述有效谐振区外部的所述第一电极和所述第二电极。
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