WO2022017330A1 - 图腾柱pfc电路及其控制方法、线路板、空调器、存储介质 - Google Patents

图腾柱pfc电路及其控制方法、线路板、空调器、存储介质 Download PDF

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Publication number
WO2022017330A1
WO2022017330A1 PCT/CN2021/107160 CN2021107160W WO2022017330A1 WO 2022017330 A1 WO2022017330 A1 WO 2022017330A1 CN 2021107160 W CN2021107160 W CN 2021107160W WO 2022017330 A1 WO2022017330 A1 WO 2022017330A1
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WIPO (PCT)
Prior art keywords
mos transistor
voltage
switching device
diode
voltage value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2021/107160
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English (en)
French (fr)
Inventor
曾贤杰
徐锦清
文先仕
张杰楠
胡斌
钟雄斌
黄招彬
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Midea Group Co Ltd
GD Midea Air Conditioning Equipment Co Ltd
Original Assignee
Midea Group Co Ltd
GD Midea Air Conditioning Equipment Co Ltd
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Publication date
Application filed by Midea Group Co Ltd, GD Midea Air Conditioning Equipment Co Ltd filed Critical Midea Group Co Ltd
Priority to JP2022580272A priority Critical patent/JP7478264B2/ja
Publication of WO2022017330A1 publication Critical patent/WO2022017330A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from AC input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to the field of PFC control, in particular to a totem pole PFC circuit and a control method thereof, a circuit board, an air conditioner and a storage medium.
  • the bridge circuit of the existing totem-pole PFC circuit is generally realized by switching tubes, but the existing totem-pole PFC circuit is working When the switch tube needs to operate frequently, the loss of the switch tube is large, and it is prone to failure, which affects the stability of the totem pole PFC circuit.
  • Embodiments of the present invention provide a totem-pole PFC circuit and a control method thereof, a circuit board, an air conditioner, and a storage medium, which can reduce the loss of switch components and switching devices and improve working stability.
  • an embodiment of the present invention provides a totem pole PFC circuit, including:
  • an electric bridge circuit including a switch component forming a bridge circuit, and an input end of the electric bridge circuit is connected to an AC power supply;
  • an energy storage component including a first energy storage device and a second energy storage device connected in series, the energy storage component is connected in parallel to the output end of the bridge circuit;
  • one end of the switching device is connected to the AC power supply, and the other end of the switching device is connected to the common terminal of the first energy storage device and the second energy storage device;
  • a controller which is respectively connected to the switch assembly and the switch device
  • the controller controls the on-off of the switch assembly and the switch device within a first period of time to increase the DC bus voltage value
  • the controller controls the switch assembly to remain off during the second period to reduce the DC bus voltage value.
  • a totem-pole PFC circuit provided by an embodiment of the present invention has at least the following beneficial effects: by setting a controller to control the on-off of the switch component and the switch device within a first period of time to increase the DC bus voltage value, and The switch assembly is controlled to be kept off during the second period to reduce the DC bus voltage value, so that the switch assembly and the switch device only operate within the first period, so that the switch assembly can be reduced without affecting the load operation. And the loss of switching devices, improve the working stability.
  • the switch component includes a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, and the first MOS transistor and the second MOS transistor are connected in series to form a first MOS transistor.
  • a bridge arm, the third MOS transistor and the fourth MOS transistor are connected in series to form a second bridge arm, the common end of the first MOS transistor and the second MOS transistor is connected to one end of the AC power supply through an inductance, and the The common terminal of the third MOS transistor and the fourth MOS transistor is connected to the other end of the AC power supply, and the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor are all reversed A diode is connected in parallel.
  • a bridge circuit is formed by using the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor.
  • the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor The operation loss can be shared, thereby prolonging the working life of the device and improving the stability of the circuit operation.
  • the totem pole PFC circuit further includes:
  • a voltage detection circuit is used to detect the DC bus voltage value, the voltage detection circuit is connected in parallel with the energy storage component, and the voltage detection circuit is connected to the controller.
  • the DC bus voltage can be detected, so that the first period and the second period can be determined according to the DC bus voltage.
  • the switching device includes one of the following:
  • a fifth MOS transistor, a sixth MOS transistor, a first diode and a second diode, the sources of the fifth MOS transistor and the sixth MOS transistor are connected to each other, and the cathode of the first diode connected to the drain of the fifth MOS transistor, the drain of the fifth MOS transistor is connected to the common terminal of the third MOS transistor and the fourth MOS transistor, and the cathode of the second diode is connected to the sixth MOS transistor
  • the drain of the MOS transistor, the drain of the sixth MOS transistor is connected to the common terminal of the first energy storage device and the second energy storage device, and the anodes of the first diode and the second diode are connected to the source of the fifth MOS transistor, and the gates of the fifth MOS transistor and the sixth MOS transistor are respectively connected to the controller;
  • the emitter of the first IGBT tube is connected to the collector of the second IGBT tube
  • the collector of the first IGBT tube is connected to the emitter of the second IGBT tube
  • the emitter of the first IGBT tube is connected to the common terminal of the third MOS tube and the fourth MOS tube
  • the collector of the first IGBT tube is connected to the common terminal of the first energy storage device and the second energy storage device terminals, the gates of the first IGBT tube and the second IGBT tube are respectively connected to the controller;
  • the third IGBT tube, the third diode, the fourth diode, the fifth diode and the sixth diode, the negative electrodes of the third diode and the fifth diode are all connected with the The collector of the third IGBT tube is connected, the anodes of the fourth diode and the sixth diode are both connected to the emitter of the third IGBT tube, and the anodes of the third diode are respectively connected
  • the cathode of the fourth diode, the common terminal of the third MOS transistor and the fourth MOS transistor, the anode of the fifth diode is respectively connected to the cathode of the sixth diode, the first The common terminal of the energy storage device and the second energy storage device, and the gate of the third IGBT tube is connected to the controller.
  • all three structures of the switching device can realize controllable bidirectional conduction, which facilitates the formation of loops in different directions between the positive half-wave and the negative half-wave of the AC voltage signal.
  • the totem pole PFC circuit further includes a seventh diode and an eighth diode, the anode of the seventh diode is connected to the third MOS transistor, and the cathode of the seventh diode is connected to the third MOS transistor.
  • An energy storage device the cathode of the eighth diode is connected to the fourth MOS transistor, and the anode of the eighth diode is connected to the second energy storage device.
  • the seventh diode and the eighth diode by arranging the seventh diode and the eighth diode, the control effect of one-way conduction can be achieved, the current inflow of the first energy storage device and the second energy storage device during discharge can be avoided, and the circuit operation can be improved. stability.
  • the switching device is a relay.
  • the seventh diode and the eighth diode Due to the existence of the seventh diode and the eighth diode, the current backflow of the first energy storage device and the second energy storage device can be avoided during discharge, so the switching device can be maintained in conduction during control, which is conducive to simplifying the switching process. device control.
  • an embodiment of the present invention further provides a method for controlling a totem-pole PFC circuit, which is applied to a totem-pole PFC circuit, where the totem-pole PFC circuit includes:
  • an electric bridge circuit including a switch component forming a bridge circuit, and an input end of the electric bridge circuit is connected to an AC power supply;
  • an energy storage component including a first energy storage device and a second energy storage device connected in series, the energy storage component is connected in parallel to the output end of the bridge circuit;
  • one end of the switching device is connected to the AC power supply, and the other end of the switching device is connected to the common terminal of the first energy storage device and the second energy storage device;
  • a controller which is respectively connected to the switch assembly and the switch device
  • the totem pole PFC circuit control method includes:
  • the switch assembly is controlled to remain off during the second period to reduce the DC bus voltage value.
  • a totem-pole PFC circuit control method provided by an embodiment of the present invention has at least the following beneficial effects: increasing the DC bus voltage value by controlling the on-off of the switch component and the switch device within a first period of time; In the second period of time, the switch assembly is controlled to be kept off to reduce the DC bus voltage value, so that the switch assembly and the switch device only operate in the first period of time, so that the switch assembly and the load can be reduced without affecting the load operation. The loss of the switching device is improved, and the working stability is improved.
  • the switch component includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor, and the first MOS and the second MOS transistor are connected in series to form a first MOS transistor.
  • the third MOS transistor and the fourth MOS transistor are connected in series to form a second bridge arm, the common end of the first MOS transistor and the second MOS transistor is connected to one end of the AC power supply through an inductance, the The common terminal of the three MOS transistors and the fourth MOS transistor is connected to the other end of the AC power supply, and the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor are all anti-parallel There is a diode, and the on-off of the switch assembly and the switch device is controlled within the first period to increase the DC bus voltage value, including:
  • the device sends a control signal to increase the DC bus voltage value.
  • a pulse signal is sent to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value, so as to achieve a boosting effect; to the third MOS transistor and the fourth MOS transistor
  • the MOS tube sends a pulse signal and sends a control signal to the switching device to increase the voltage value of the DC bus, so as to achieve a voltage doubling effect.
  • the totem-pole PFC circuit further includes a voltage detection circuit, the voltage detection circuit is connected in parallel with the energy storage component, the voltage detection circuit is connected to the controller, and the totem-pole PFC circuit
  • the circuit control method also includes:
  • the first period and/or the second period is determined according to the DC bus voltage value.
  • the first period of time and/or the second period of time is determined according to the DC bus voltage value, so that the normal operation of the load can be guaranteed to be maintained.
  • the determining of the first period and/or the second period according to the DC bus voltage value includes at least one of the following:
  • the first preset voltage value is smaller than the second preset voltage value.
  • the DC bus voltage can be increased in time to meet the needs of the load operation, and the DC bus voltage can be controlled to increase to the third Up to two preset voltage values, the reliability of the operation of the totem pole PFC circuit is improved.
  • the switch component includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor, and the first MOS and the second MOS transistor are connected in series to form a first MOS transistor.
  • the determining the first period and/or the second period according to the DC bus voltage value includes:
  • a pulse signal is sent to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value high; control the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor and the switching device to maintain OFF according to the DC bus voltage being higher than the second voltage threshold to reduce the DC bus voltage value;
  • a pulse signal is sent to the third MOS transistor and the fourth MOS transistor, and a pulse signal is sent to the switching device.
  • a control signal to increase the DC bus voltage; control the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor according to the DC bus voltage being higher than a fourth voltage threshold
  • the MOS tube remains off to reduce the DC bus voltage;
  • a pulse signal is sent to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value high; control the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor to keep off so that the DC bus is turned off according to the DC bus voltage being higher than the fourth voltage threshold The voltage value is reduced;
  • the first voltage threshold, the second voltage threshold, the third voltage threshold and the fourth voltage threshold increase sequentially.
  • the totem pole PFC circuit when the load is in the first load range, works in the boost mode in the first period and the second period; when the load is in the second load range, the first period and the second The totem-pole PFC circuits work in the voltage doubling mode in the two periods; when the load is in the third load range, the totem-pole PFC circuits work in the boost mode in the first period, and the totem-pole PFC circuits work in the voltage doubling mode in the second period.
  • the working mode of the totem-pole PFC circuit is controlled according to the load, and the first voltage threshold, the second voltage threshold, the third voltage threshold and the fourth voltage threshold are introduced for control, which can realize refined control and further improve the working efficiency of the totem-pole PFC circuit. reliability.
  • the sending a pulse signal to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value includes:
  • the third MOS transistor and the switching device are controlled to remain off, the fourth MOS transistor is controlled to remain on, and pulses are sent to the first MOS transistor and the second MOS transistor signal to make the first MOS transistor and the second MOS transistor conduct alternately;
  • the third MOS transistor is controlled to remain on
  • the fourth MOS transistor and the switching device are controlled to remain off
  • pulses are sent to the first MOS transistor and the second MOS transistor signal so that the first MOS transistor and the second MOS transistor are turned on alternately.
  • the duty cycle of the pulse signal received by the first MOS transistor gradually increases between the voltage zero-crossing point and the voltage peak value
  • the second The duty cycle of the pulse signal received by the MOS tube gradually decreases between the voltage zero-crossing point and the voltage peak value
  • the duty cycle of the pulse signal received by the first MOS transistor gradually decreases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the second MOS transistor The duty ratio increases gradually between the voltage zero crossing and the voltage peak.
  • the waveform of the input current can be made closer to the waveform of the AC voltage signal, thereby improving the harmonics and power factor of the input current. improvement effect.
  • the sending a pulse signal to the third MOS transistor and the fourth MOS transistor, and sending a control signal to the switching device to increase the DC bus voltage value includes:
  • the first MOS transistor is controlled to remain on
  • the second MOS transistor and the fourth MOS transistor are controlled to remain off
  • the third MOS transistor and the switching device are controlled to remain off. sending a pulse signal to turn on the third MOS transistor and the switching device alternately;
  • the second MOS transistor is controlled to remain on, the first MOS transistor and the third MOS transistor are controlled to remain off, and the fourth MOS transistor and the switching device are controlled to remain off. Sending a pulse signal to turn on the fourth MOS transistor and the switching device alternately.
  • the duty cycle of the pulse signal received by the switching device gradually increases between the voltage zero-crossing point and the voltage peak value, and the third MOS transistor The duty cycle of the received pulse signal gradually decreases between the voltage zero-crossing and the voltage peak;
  • the duty cycle of the pulse signal received by the switching device gradually increases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the fourth MOS transistor It gradually decreases between the voltage zero-crossing and the voltage peak.
  • the waveform of the input current can be made closer to the waveform of the AC voltage signal, thereby improving the harmonics and power factor of the input current. improvement effect.
  • the sending a pulse signal to the third MOS transistor and the fourth MOS transistor, and sending a control signal to the switching device to increase the DC bus voltage value includes:
  • a pulse signal is sent to the third MOS transistor during the positive half-wave of the AC voltage signal and to the fourth MOS transistor during the negative half-wave of the AC voltage signal, so as to control the switching device to maintain conduction.
  • the seventh diode and the eighth diode Due to the existence of the seventh diode and the eighth diode, the current backflow of the first energy storage device and the second energy storage device can be avoided during discharge, so the switching device can be maintained in conduction during control, which is conducive to simplifying the switching process. device control.
  • an embodiment of the present invention further provides a circuit board, including the totem-pole PFC circuit described in the first aspect.
  • the above-mentioned circuit board controls the on-off of the switch assembly and the switch device in the first period to increase the DC bus voltage value by setting the controller, and controls the switch assembly to keep off in the second period
  • the switching components and switching devices can only operate in the first period of time, so that the loss of the switching components and switching devices can be reduced and the working stability can be improved without affecting the load operation.
  • an embodiment of the present invention further provides an air conditioner, comprising the circuit board described in the third aspect,
  • the memory storing instructions executable by the at least one processor, the instructions being executed by the at least one processor to The at least one processor is enabled to execute the totem pole PFC circuit control method of the second aspect.
  • the above-mentioned air conditioner controls the on-off of the switch assembly and the switch device within a first period of time by setting the controller to increase the DC bus voltage value, and controls the switch assembly to keep off during the second period of time
  • the switching components and switching devices can only operate in the first period of time, so that the loss of the switching components and switching devices can be reduced and the working stability can be improved without affecting the load operation.
  • an embodiment of the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to cause a computer to execute the second aspect.
  • Totem pole PFC circuit control method is used to cause a computer to execute the second aspect.
  • FIG. 1 is a circuit schematic diagram of a totem pole PFC circuit provided by an embodiment of the present invention
  • FIG. 2 is a schematic circuit diagram of a structure of a switching device provided by an embodiment of the present invention.
  • FIG. 3 is a schematic circuit diagram of another structure of a switching device provided by an embodiment of the present invention.
  • FIG. 4 is a schematic circuit diagram of another structure of a switching device provided by an embodiment of the present invention.
  • FIG. 5 is a waveform diagram of an input voltage, an input current, and a DC bus voltage in a working state and an intermittent state of a totem-pole PFC circuit provided by an embodiment of the present invention
  • FIG. 6 is a control waveform diagram of a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a switching device when the totem pole PFC circuit provided by an embodiment of the present invention is in a boosted state;
  • FIG. 7 is a control waveform diagram of a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, and a switching device when the totem pole PFC circuit provided by the embodiment of the present invention is in a voltage doubling state;
  • FIG. 8 is a circuit schematic diagram of another totem pole PFC circuit provided by an embodiment of the present invention.
  • FIG. 9 is a flowchart of a method for controlling a totem pole PFC circuit provided by an embodiment of the present invention.
  • FIG. 10 is a flowchart of supplementary steps of a totem pole PFC circuit control method provided by an embodiment of the present invention.
  • FIG. 11 is a flowchart of specific steps for determining a first period of time and/or a second period of time according to a DC bus voltage value provided by an embodiment of the present invention
  • FIG. 13 is a flowchart of the specific steps of sending a pulse signal to the third MOS transistor, the fourth MOS transistor, and the switching device to increase the DC bus voltage value provided by an embodiment of the present invention
  • FIG. 14 is a schematic structural diagram of a circuit board provided by an embodiment of the present invention.
  • FIG. 15 is a schematic structural diagram of an air conditioner provided by an embodiment of the present invention.
  • FIG. 16 is another schematic structural diagram of an air conditioner provided by an embodiment of the present invention.
  • multiple means two or more, greater than, less than, exceeding, etc., are understood as not including this number, and above, below, within, etc., are understood as including this number. If there is a description of "first”, “second”, etc., it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance, or implicitly indicating the number of indicated technical features or implicitly indicating the indicated The sequence of technical characteristics.
  • an embodiment of the present invention provides a totem pole PFC circuit, including a bridge circuit, an energy storage component, a switching device, and a controller, wherein the bridge circuit includes a switching component forming a bridge circuit, and the The input end is connected to the AC power supply; the energy storage component includes a first energy storage device and a second energy storage device that are connected in series with each other, and the energy storage component is connected in parallel to the output end of the bridge circuit; one end of the switching device is connected to the AC power supply, and the other end of the switching device The common terminal of the first energy storage device and the second energy storage device is connected; the controller is respectively connected to the switch component and the switch device.
  • the first energy storage device includes a first capacitor C1
  • the second energy storage device includes a second capacitor C2
  • the inductance device includes an inductance L
  • the switch component includes a first MOS transistor Q1, a second MOS transistor Q2, a first MOS transistor Q1, and a second MOS transistor Q2.
  • the three MOS transistors Q3 and the fourth MOS transistor Q4, the first MOS transistor Q2 and the second MOS transistor Q2 are connected in series to form the first bridge arm
  • the third MOS transistor Q3 and the fourth MOS transistor Q4 are connected in series to form the second bridge arm
  • the first MOS transistor Q3 and the fourth MOS transistor Q4 are connected in series to form the second bridge arm.
  • the common terminal of the transistor Q1 and the second MOS transistor Q2 is connected to one end of the AC power supply AC through the inductor L
  • the common terminal of the third MOS transistor Q3 and the fourth MOS transistor Q4 is connected to the other end of the AC power supply AC
  • the first MOS transistor Q1, The second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 are all connected with diodes in anti-parallel.
  • the load of the above-mentioned PFC circuit is an inverter module.
  • the load of the above-mentioned PFC circuit may also be other devices, which is not limited in this embodiment.
  • the switching device K may have the following three structural forms:
  • the first type includes a fifth MOS transistor Q5, a sixth MOS transistor Q6, a first diode D1 and a second diode D2.
  • the sources of the fifth MOS transistor Q5 and the sixth MOS transistor Q6 are connected to each other.
  • the cathode of the diode D1 is connected to the drain of the fifth MOS transistor Q5, the drain of the fifth MOS transistor Q5 is connected to the common terminal of the third MOS transistor and the fourth MOS transistor, and the cathode of the second diode D2 is connected to the sixth MOS transistor
  • the drain of Q6, the drain of the sixth MOS transistor Q6 are connected to the common terminal of the first energy storage device and the second energy storage device, and the anodes of the first diode D1 and the second diode D2 are connected to the fifth MOS transistor
  • the source of Q5 is connected, and the gates of the fifth MOS transistor Q5 and the sixth MOS transistor Q6 are respectively connected to the controller.
  • the switching device K is turned off, that is, the fifth MOS transistor Q5 and the sixth MOS transistor Q6 are both turned off, and the switching device K is turned on at the positive half-wave of the AC voltage signal (ie, the input voltage Us), that is, the fifth MOS transistor Q5 is on
  • the positive half-wave of the AC voltage signal is turned on
  • the sixth MOS transistor Q6 is turned off at the positive half-wave of the AC voltage signal
  • the switching device K is turned on at the negative half-wave of the AC voltage signal, that is, the fifth MOS transistor Q5 is turned on at the negative half of the AC voltage signal.
  • the wave is turned off, and the sixth MOS transistor Q6 is turned on in the negative half-wave of the AC voltage signal.
  • the second type includes a first IGBT transistor Q7 and a second IGBT transistor Q8, the emitter of the first IGBT transistor Q7 is connected to the collector of the second IGBT transistor Q8, and the collector of the first IGBT transistor Q7 is connected to the emitter of the second IGBT transistor Q8.
  • the emitter of the first IGBT transistor Q7 is connected to the common terminal of the third MOS transistor and the fourth MOS transistor, the collector of the first IGBT transistor Q7 is connected to the common terminal of the first energy storage device and the second energy storage device, the first The gates of the IGBT transistor Q7 and the second IGBT transistor Q8 are respectively connected to the controller.
  • the switching device K is turned off, that is, both the first IGBT tube Q7 and the second IGBT tube Q8 are turned off, and the switching device K is turned on in the positive half-wave of the AC voltage signal, that is, the first IGBT tube Q7 is in the positive half of the AC voltage signal.
  • the wave is turned on, the second IGBT tube Q8 is turned off at the positive half-wave of the AC voltage signal, the switching device K is turned on at the negative half-wave of the AC voltage signal, that is, the first IGBT tube Q7 is turned off at the negative half-wave of the AC voltage signal, and the second IGBT tube Q7 is turned off at the negative half-wave of the AC voltage signal.
  • the IGBT tube Q8 is turned on in the negative half-wave of the AC voltage signal.
  • the third type includes the third IGBT transistor Q9, the third diode D3, the fourth diode D4, the fifth diode D5 and the sixth diode, the third diode D3 and the fifth diode D5
  • the negative poles are connected to the collector of the third IGBT tube Q9
  • the positive poles of the fourth diode D4 and the sixth diode are connected to the emitter of the third IGBT tube Q9
  • the positive poles of the third diode D3 are respectively connected
  • the cathode of the fourth diode D4, the common terminal of the third MOS transistor and the fourth MOS transistor, the anode of the fifth diode D5 is respectively connected to the cathode of the sixth diode, the first energy storage device and the second energy storage device
  • the common terminal of the device, the gate of the third IGBT transistor Q9 is connected to the controller.
  • the switching device K is turned off, that is, the third IGBT transistor Q9 is turned off, and the switching device K is turned on, that is, the third IGBT transistor Q9 is turned on.
  • the switching device K can realize controllable bidirectional conduction, which facilitates the formation of loops in different directions between the positive half-wave and the negative half-wave of the AC voltage signal.
  • the controller controls the switching components and the switching devices to be turned on and off during the first period to increase the DC bus voltage value, which is described as a working state here; the controller controls the switching components to keep off during the second period. off to reduce the DC bus voltage value, described here as an intermittent state.
  • the switching device K when the switching device K is turned off, the PFC circuit is in a boosting state, and the control processes of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 are as follows:
  • the third MOS transistor Q3 is controlled to be kept off, the fourth MOS transistor Q4 is controlled to be kept on, and a pulse signal is sent to the first MOS transistor Q1 and the second MOS transistor Q2 to make the first MOS transistor Q2 Q1 and the second MOS transistor Q2 are turned on alternately.
  • the first MOS transistor Q1 and the second MOS transistor Q2 are turned on alternately, and the inductor L is stored and discharged to achieve a boosting effect, thereby controlling the waveform of the input current Is, so that the waveform of the input current Is follows the input voltage Us changes, improving the input current Is harmonics and power factor.
  • the third MOS transistor Q3 is controlled to remain on
  • the fourth MOS transistor Q4 is controlled to remain off
  • a pulse signal is sent to the first MOS transistor Q1 and the second MOS transistor Q2 to make the first MOS transistor Q2 Q1 and the second MOS transistor Q2 are turned on alternately.
  • the inductor L When the first MOS transistor Q1 is turned on and the second MOS transistor Q2 is off, a loop is formed through the AC power supply AC, the inductor L, the first MOS transistor Q1, and the third MOS transistor Q3, the inductor L is stored for energy storage, and the input current Is rises; when the first MOS transistor Q1 is turned off and the second MOS transistor Q2 is turned on, the current of the inductor L passes through the third MOS transistor Q3, the first capacitor C1, the second capacitor C2 and the second MOS transistor Q2 to form a loop, That is, the inductor L, the first capacitor C1 and the second capacitor C2 form a first oscillation loop, the inductor L simultaneously charges the first capacitor C1 and the second capacitor C2, and the input current Is decreases at this time.
  • the first MOS transistor Q1 and the second MOS transistor Q2 are turned on alternately, and the inductor L is stored and discharged to achieve the boosting effect, that is, the first voltage is output, thereby controlling the waveform of the input current Is, so that the input current
  • the waveform of Is follows the change of the input voltage Us and improves the harmonics and power factor of the input current Is.
  • the duty cycle of the pulse signal received by the first MOS tube gradually increases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the second MOS tube It gradually decreases between the voltage zero-crossing and the voltage peak;
  • the duty cycle of the pulse signal received by the first MOS tube gradually decreases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the second MOS tube is in the voltage gradually increases between the zero crossing and the voltage peak.
  • the waveform of the input current Is can be made closer to the waveform of the AC voltage signal, thereby improving the harmonic and power factor improvement effects of the input current Is.
  • the PFC circuit when a pulse signal is sent to the switching device K, the PFC circuit is in a voltage doubling state, and the control of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 and the switching device K.
  • the process is as follows:
  • the first MOS transistor Q1 is controlled to be turned on, the second MOS transistor Q2 and the fourth MOS transistor Q4 are kept off, and a pulse signal is sent to the third MOS transistor Q3 and the switching device K to make the The third MOS transistor Q3 and the switching device K are turned on alternately.
  • the third MOS transistor Q3 When the third MOS transistor Q3 is turned on and the switching device K is turned off, a loop is formed through the AC power supply AC, the inductor L, the first MOS transistor Q1, and the third MOS transistor Q3, the inductor L is stored for energy, and the input current Is rises
  • the third MOS tube Q3 is turned off and the switching device K is turned off, the current of the inductor L forms a loop through the first MOS tube Q1, the first capacitor C1 and the switching device K, that is, the inductor L, the first capacitor C1 and the switching device K K forms a second oscillating loop in the positive half-wave of the AC voltage signal, the inductor L charges the first capacitor C1, and the input current Is decreases at this time.
  • the third MOS transistor Q3 and the switching device K are turned on alternately, and the inductor L is stored and discharged to achieve the voltage doubling effect, thereby controlling the waveform of the input current Is, so that the waveform of the input current Is changes with the input voltage Us, Improve input current Is harmonics and power factor.
  • the second MOS transistor Q2 is controlled to remain on, the first MOS transistor Q1 and the third MOS transistor Q3 are kept off, and a pulse signal is sent to the fourth MOS transistor Q4 and the switching device K to make the The fourth MOS transistor Q4 and the switching device K are alternately turned on.
  • the fourth MOS transistor Q4 When the fourth MOS transistor Q4 is turned on and the switching device K is turned off, a loop is formed through the AC power supply AC, the inductor L, the second MOS transistor Q2 and the fourth MOS transistor Q4, the inductor L is stored for energy, and the input current Is increases ;
  • the fourth MOS tube Q4 When the fourth MOS tube Q4 is turned off and the switching device K is turned on, the current of the inductor L forms a loop through the switching device K, the second capacitor C2 and the second MOS tube Q2, that is, the inductor L, the second capacitor C2 and the switching device K forms a third oscillation loop in the negative half-wave of the AC voltage signal, the inductor L charges the second capacitor C2, and the input current Is decreases at this time.
  • the fourth MOS transistor Q4 and the switching device K are turned on alternately, and the inductor L is stored and discharged to achieve the voltage doubling effect, that is, the second voltage is output, thereby controlling the waveform of the input current Is, so that the waveform of the input current Is is Following the change of the input voltage Us, the harmonics and power factor of the input current Is are improved.
  • the duty cycle of the pulse signal received by the switching device K gradually increases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the third MOS transistor is Gradually decrease between the voltage zero-crossing point and the voltage peak value;
  • the duty cycle of the pulse signal received by the switching device K gradually increases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the fourth MOS transistor is at the voltage crossing point. gradually decreases between the zero point and the voltage peak.
  • the waveform of the input current Is can be made closer to the waveform of the AC voltage signal, thereby improving the harmonic and power factor improvement effects of the input current Is.
  • the first voltage is slightly higher than the voltage peak value of the AC voltage signal, and the second voltage is about twice the voltage peak value of the AC voltage signal.
  • the boost is achieved.
  • the voltage doubling effect makes the DC bus voltage continue to rise; in the second period, in the intermittent state of the totem pole PFC circuit, the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 Keep it off, at this time, the first capacitor C1 and the second capacitor C2 supply power to the load, so that the DC bus voltage continues to decrease.
  • the totem-pole PFC circuit In the working state and the intermittent state of the totem-pole PFC circuit, the totem-pole PFC circuit is in a boosting state, which can be used in the case of a low load.
  • the intermittent state the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 and the switching device K are all kept off, at this time the DC bus voltage drops and the input current is 0 , when the DC bus voltage drops below the first voltage threshold, it switches to the working state, where the first voltage threshold is slightly higher than the voltage peak value of the input voltage; in the working state, the totem pole PFC circuit is in a boosting state, at this time The DC bus voltage rises, the input current follows the input voltage, and when the DC bus voltage rises above a second voltage threshold, the state is switched to an intermittent state, wherein the second voltage threshold is greater than the first voltage threshold.
  • the totem-pole PFC circuit is in a voltage doubling state, which can be used in the case of a high load.
  • the intermittent state the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 and the switching device K are all kept off, the switching device K remains on, and the DC bus is at this time.
  • the input current is 0.
  • the DC bus voltage drops below the third voltage threshold, it switches to the working state, where the third voltage threshold is slightly higher than twice the voltage peak of the input voltage; in the working state, the totem The column PFC circuit is in a voltage doubling state.
  • the DC bus voltage rises and the input current follows the input voltage.
  • the fourth voltage threshold is greater than the third voltage. threshold.
  • the totem-pole PFC circuit In the working state of the totem-pole PFC circuit, the totem-pole PFC circuit is in a voltage doubling state; in the intermittent state of the totem-pole PFC circuit, the totem-pole PFC circuit is in a boosting state, which can be used for moderate loads.
  • the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 and the switching device K are all kept off, at this time the DC bus voltage drops and the input current is 0 , when the DC bus voltage drops below the first voltage threshold, it switches to the working state, where the first voltage threshold is slightly higher than the voltage peak value of the input voltage; in the working state, the totem pole PFC circuit is in a voltage doubling state, at this time The DC bus voltage rises, and the input current follows the input voltage.
  • the DC bus voltage rises above a fourth voltage threshold, it switches to an intermittent state, where the fourth voltage threshold is greater than the third voltage threshold, and the third voltage threshold is greater than the second voltage threshold.
  • the working mode of the totem-pole PFC circuit is controlled according to the load, and the first voltage threshold, the second voltage threshold, the third voltage threshold and the fourth voltage threshold are introduced for control, which can realize refined control and further improve the working efficiency of the totem-pole PFC circuit. reliability.
  • the totem pole PFC circuit is further provided with a voltage detection circuit for detecting the DC bus voltage value, the voltage detection circuit is connected in parallel with the energy storage component, and the voltage detection circuit is connected to the controller.
  • the voltage detection circuit By setting the voltage detection circuit, the DC bus voltage can be detected, so that the first period and the second period can be determined according to the DC bus voltage.
  • the PFC circuit may further include a seventh diode D7 and an eighth diode D8, the anode of the seventh diode D7 is connected to the third MOS transistor Q3, and the seventh diode D7
  • the cathode of the eighth diode D8 is connected to the first capacitor C1
  • the cathode of the eighth diode D8 is connected to the fourth MOS transistor Q4, and the anode of the eighth diode D8 is connected to the second capacitor C2.
  • the seventh diode D7 and the eighth diode D8 By arranging the seventh diode D7 and the eighth diode D8, the control effect of unidirectional conduction can be achieved, the current backflow of the first energy storage device and the second energy storage device during discharge can be avoided, and the stability of the circuit operation can be improved.
  • the switching device K can also be a relay. Due to the existence of the seventh diode D7 and the eighth diode D8, the first energy storage device and the second energy storage device can be avoided. During discharge, the current is reversed, so the switching device K can be kept on during control, which is beneficial to simplify the control of the switching device K.
  • the switch assembly By setting the controller to control the on-off of the switch assembly and the switch device in the first period to increase the DC bus voltage value, and to control the switch assembly to keep off in the second period to reduce the DC bus voltage value, the switch assembly is made
  • the switching device and the switching device only operate in the first period of time, so that the loss of the switching component and the switching device can be reduced and the working stability can be improved on the premise of not affecting the operation of the load.
  • an embodiment of the present invention also provides a totem pole PFC circuit control method, including but not limited to the following steps:
  • Step 901 Control the on-off of the switch assembly and the switch device within the first period to increase the DC bus voltage value
  • Step 902 Control the switch assembly to keep off during the second period to reduce the DC bus voltage value.
  • the switch assembly and the switch device By controlling the on-off of the switch assembly and the switch device to increase the DC bus voltage value during the first period, and to control the switch assembly to keep off during the second period to decrease the DC bus voltage value, the switch assembly and the switch device are made The operation is only performed in the first period of time, so that the loss of the switching component and the switching device can be reduced and the working stability can be improved without affecting the operation of the load.
  • the on-off of the switch component and the switch device is controlled within the first period to increase the DC bus voltage value, which specifically includes:
  • the voltage value rises.
  • the pulse signal is sent to the first MOS tube and the second MOS tube to increase the DC bus voltage value to achieve the boosting effect; the pulse signal is sent to the third MOS tube and the fourth MOS tube, and sent to the switching device. Control the signal to increase the DC bus voltage value to achieve the voltage doubling effect.
  • the above-mentioned totem pole PFC circuit control method may further include the following steps:
  • Step 1001 Obtain the DC bus voltage value through a voltage detection circuit
  • Step 1002 Determine the first period and/or the second period according to the DC bus voltage value.
  • determining the first period and/or the second period according to the DC bus voltage value can ensure that the normal operation of the load is maintained.
  • the first period of time and/or the second period of time is determined according to the DC bus voltage value, which may be specifically:
  • the DC bus voltage value is lower than the first preset voltage value, controlling the on-off of the switch assembly and the switching device to increase the DC bus voltage value;
  • the first preset voltage value is smaller than the second preset voltage value.
  • the DC bus voltage can be increased in time to meet the needs of load operation, and the DC bus voltage can be controlled to increase to the second preset voltage value , which improves the reliability of the operation of the totem pole PFC circuit.
  • the first period of time and/or the second period of time is determined according to the DC bus voltage value, which may also be:
  • a pulse signal is sent to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value; the second voltage threshold, controlling the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, and the switching device to keep off to reduce the DC bus voltage value;
  • the first voltage threshold, the second voltage threshold, the third voltage threshold and the fourth voltage threshold increase sequentially.
  • the totem-pole PFC circuit When the load is in the first load range, the totem-pole PFC circuit works in the boost mode in the first and second time periods; when the load is in the second load range, the totem-pole PFC circuit in the first and second time periods The circuits all work in the voltage doubling mode; when the load is in the third load range, the totem-pole PFC circuit works in the boost mode in the first period, and the totem-pole PFC circuit works in the voltage doubling mode in the second period.
  • the working mode of the totem-pole PFC circuit is controlled according to the load, and the first voltage threshold, the second voltage threshold, the third voltage threshold and the fourth voltage threshold are introduced for control, which can realize refined control and further improve the working efficiency of the totem-pole PFC circuit. reliability.
  • the load amount can be obtained through a load amount detection circuit, where the load amount can be but not limited to load voltage, load power, load frequency, and the like.
  • first load interval represents a low load
  • second load interval represents a high load
  • third load interval represents a medium load
  • sending a pulse signal to the first MOS transistor and the second MOS transistor to increase the DC bus voltage value specifically includes:
  • Step 1201 During the positive half-wave of the AC voltage signal, control the third MOS tube and the switching device to keep off, control the fourth MOS tube to keep on, and send a pulse signal to the first MOS tube and the second MOS tube to make the first MOS tube turn off.
  • the MOS tube and the second MOS tube are turned on alternately;
  • Step 1202 During the negative half-wave of the AC voltage signal, control the third MOS transistor to keep on, control the fourth MOS transistor and the switching device to keep off, and send a pulse signal to the first MOS transistor and the second MOS transistor to make the first MOS transistor turn off.
  • the MOS transistor and the second MOS transistor are alternately turned on.
  • step 1201 to step 1202 it is only necessary to control the first MOS transistor and the second MOS transistor to perform frequent operations, and the third MOS transistor, the fourth MOS transistor and the fifth MOS transistor do not need to operate frequently, which is beneficial to reduce the third MOS transistor, the fourth MOS transistor and the fifth MOS transistor. Losses of the fourth MOS transistor and the fifth MOS transistor.
  • step 1201 in the positive half-wave of the AC voltage signal, the duty cycle of the pulse signal received by the first MOS tube gradually increases between the voltage zero-crossing point and the voltage peak value, and the pulse signal received by the second MOS tube is gradually increased.
  • the duty cycle of the signal gradually decreases between the voltage zero-crossing and the voltage peak;
  • step 1202 in the negative half-wave of the AC voltage signal, the duty cycle of the pulse signal received by the first MOS tube gradually decreases between the voltage zero-crossing point and the voltage peak value, and the pulse signal received by the second MOS tube is The duty cycle gradually increases between the voltage zero crossing and the voltage peak.
  • the waveform of the input current can be made closer to the waveform of the AC voltage signal, thereby improving the harmonic and power factor improvement effect of the input current.
  • sending a pulse signal to the third MOS transistor and the fourth MOS transistor and sending a control signal to the switching device to increase the DC bus voltage value specifically includes:
  • Step 1301 During the positive half-wave of the AC voltage signal, control the first MOS transistor to remain on, control the second MOS transistor and the fourth MOS transistor to remain off, and send a pulse signal to the third MOS transistor and the switching device to make the third MOS transistor and the switching device turn off.
  • the MOS tube and the switching device are turned on alternately;
  • Step 1302 During the negative half-wave of the AC voltage signal, control the second MOS transistor to remain on, control the first MOS transistor and the third MOS transistor to remain off, and send a pulse signal to the fourth MOS transistor and the switching device to make the fourth MOS transistor and the switching device turn off.
  • the MOS tube and the switching device are alternately turned on.
  • step 1301 to step 1302 it is only necessary to control the third MOS transistor, the fourth MOS transistor and the switching device to perform frequent operations, and the first MOS transistor and the second MOS transistor do not need to operate frequently, which is beneficial to reduce the frequency of the first MOS transistor and the second MOS transistor.
  • MOS tube loss is only necessary to control the third MOS transistor, the fourth MOS transistor and the switching device to perform frequent operations, and the first MOS transistor and the second MOS transistor do not need to operate frequently, which is beneficial to reduce the frequency of the first MOS transistor and the second MOS transistor.
  • step 1301 in the positive half-wave of the AC voltage signal, the duty cycle of the pulse signal received by the switching device gradually increases between the voltage zero-crossing point and the voltage peak value, and the pulse signal received by the third MOS transistor is The duty cycle gradually decreases between the voltage zero-crossing and the voltage peak;
  • step 1302 in the negative half-wave of the AC voltage signal, the duty cycle of the pulse signal received by the switching device gradually increases between the voltage zero-crossing point and the voltage peak value, and the duty cycle of the pulse signal received by the fourth MOS transistor The ratio gradually decreases between the voltage zero crossing and the voltage peak.
  • the waveform of the input current can be made closer to the waveform of the AC voltage signal, thereby improving the harmonic and power factor improvement effect of the input current.
  • a pulse signal is sent to the third MOS transistor and the fourth MOS transistor, and a control signal is sent to the switching device to increase the DC bus voltage value.
  • the positive half-wave of the AC voltage signal sends a pulse signal to the third MOS transistor, and the negative half-wave of the AC voltage signal sends a pulse signal to the fourth MOS transistor to control the switching device to maintain conduction.
  • the seventh diode and the eighth diode Due to the existence of the seventh diode and the eighth diode, the current backflow of the first energy storage device and the second energy storage device can be avoided during discharge, so the switching device can be maintained in conduction during control, which is conducive to simplifying the switching process. device control.
  • an embodiment of the present invention further provides a circuit board, the circuit board includes the totem-pole PFC circuit in the above-mentioned embodiment, therefore, the above-mentioned circuit board controls the switch components and The switching device is turned on and off to increase the DC bus voltage value, and in the second period of time, the switching component is controlled to keep off to reduce the DC bus voltage value, so that the switching component and the switching device are only operated within the first period of time, thereby On the premise of not affecting the load operation, the loss of switching components and switching devices can be reduced, and the working stability can be improved.
  • an embodiment of the present invention further provides an air conditioner
  • the air conditioner includes the circuit board in the above embodiment, therefore, the above air conditioner controls the switch assembly and the switch device in the first period of time by setting the controller
  • the on-off of the DC bus increases the voltage value of the DC bus, and controls the switch assembly to keep off during the second period to reduce the DC bus voltage value, so that the switch assembly and the switching device only operate within the first period of time, so that the On the premise of affecting the load operation, the loss of the switching components and switching devices can be reduced, and the working stability can be improved.
  • FIG. 16 shows an air conditioner 1600 provided by an embodiment of the present invention.
  • the air conditioner 1600 includes a memory 1601, a processor 1602, and a computer program stored in the memory 1601 and running on the processor 1602. , the computer program is used to execute the above-mentioned totem pole PFC circuit control method.
  • the processor 1602 and the memory 1601 may be connected by a bus or otherwise.
  • the memory 1601 can be used to store non-transitory software programs and non-transitory computer-executable programs, such as the totem-pole PFC circuit control method described in the embodiments of the present invention.
  • the processor 1602 implements the above-mentioned totem-pole PFC circuit control method by running the non-transitory software programs and instructions stored in the memory 1601 .
  • the memory 1601 may include a storage program area and a storage data area, wherein the storage program area may store an operating system and an application program required by at least one function; the storage data area may store and execute the above-mentioned totem pole PFC circuit control method.
  • memory 1601 may include high-speed random access memory 1601, and may also include non-transitory memory 1601, such as at least one piece of disk memory 1601, flash memory device, or other piece of non-transitory solid-state memory 1601.
  • the memory 1601 may optionally include memory 1601 located remotely from the processor 1602, and these remote memories 1601 may be connected to the air conditioner 1600 through a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • the non-transitory software programs and instructions required to implement the above-mentioned totem-pole PFC circuit control method are stored in the memory 1601, and when executed by one or more processors 1602, execute the above-mentioned totem-pole PFC circuit control method, for example, execute The method steps described in FIGS. 9 to 13 .
  • Embodiments of the present invention further provide a computer-readable storage medium storing computer-executable instructions, where the computer-executable instructions are used to execute the above-mentioned totem-pole PFC circuit control method.
  • the computer-readable storage medium stores computer-executable instructions that are executed by one or more control processors 1602, for example, by one of the processors 1602 in the air conditioner 1600 described above,
  • the above-mentioned one or more processors 1602 may be caused to perform the above-mentioned totem-pole PFC circuit control method, eg, to perform the method steps described in FIGS. 9-13 .
  • Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridges, magnetic tape, magnetic disk storage or other magnetic storage devices, or may Any other medium used to store desired information and which can be accessed by a computer.
  • communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and can include any information delivery media, as is well known to those of ordinary skill in the art .

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Abstract

一种图腾柱PFC电路及其控制方法、线路板、空调器、存储介质。该图腾柱PFC电路通过设置控制器在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，以及在第二时段内控制开关组件保持关断以使直流母线电压值降低。

Description

图腾柱PFC电路及其控制方法、线路板、空调器、存储介质
相关申请的交叉引用
本申请要求于2020年7月22日提交的申请号为202010712462.1、名称为“图腾柱PFC电路及其控制方法、线路板、空调器、存储介质”的中国专利申请的优先权，其全部内容通过引用并入本申请。
技术领域
本发明涉及PFC控制领域，特别是涉及一种图腾柱PFC电路及其控制方法、线路板、空调器、存储介质。
背景技术
目前连接到电网的设备，其输入侧都需要功率因数校正(Power Factor Correction，PFC)，现有的图腾柱PFC电路的电桥电路一般采用开关管实现，然而现有的图腾柱PFC电路在工作时，开关管需要频繁进行动作，因此开关管的损耗较大，容易出现故障，影响图腾柱PFC电路工作的稳定性。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供了一种图腾柱PFC电路及其控制方法、线路板、空调器、存储介质，能够降低开关组件和开关器件的损耗，提高工作稳定性。
第一方面，本发明实施例提供了一种图腾柱PFC电路，包括：
电桥电路，包括形成桥式电路的开关组件，所述电桥电路的输入端连接交流电源；
储能组件，包括相互串联的第一储能器件和第二储能器件，所述储能组件并联于所述电桥电路的输出端；
开关器件，所述开关器件的一端连接交流电源，所述开关器件的另一端连接所述第一储能器件和第二储能器件的公共端；
控制器，分别连接所述开关组件和所述开关器件；
所述控制器在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；
所述控制器在第二时段内控制所述开关组件保持关断以使直流母线电压值降低。
本发明实施例提供的一种图腾柱PFC电路至少具有以下有益效果：通过设置控制器在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，以及在第二时段内控制所述开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
在本发明的一些实施例中，所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS管和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管。
在上述技术方案中，利用第一MOS管、第二MOS管、第三MOS管、第四MOS管组成电桥电路，第一MOS管、第二MOS管、第三MOS管、第四MOS管能够分摊动作损耗，从而可以延长器件的工作寿命，提高电路工作的稳定性。
在本发明的一些实施例中，所述图腾柱PFC电路还包括：
电压检测电路，用于检测直流母线电压值，所述电压检测电路与所述储能组件并联，所述电压检测电路连接所述控制器。
在上述技术方案中，通过设置电压检测电路，能够检测直流母线电压，便于根据直流母线电压确定第一时段和第二时段。
在本发明的一些实施例中，所述开关器件包括以下之一：
第五MOS管、第六MOS管、第一二极管和第二二极管，所述第五MOS管和所述第六MOS管的源极相互连接，所述第一二极管的负极连接所述第五MOS管的漏极，所述第五MOS管的漏极连接所述第三MOS管和第四MOS管的公共端，所述第二二极管的负极连接所述第六MOS管的漏极，所述第六MOS管的漏极连接所述第一储能器件和第二储能器件的公共端，所述第一二极管和所述第二二极管的正极均与所述第五MOS管的源极连接，所述第五MOS管和所述第六MOS管的栅极分别连接所述控制器；
第一IGBT管和第二IGBT管，所述第一IGBT管的发射极连接所述第二IGBT管的集电极，所述第一IGBT管的集电极连接所述第二IGBT管的发射极，所述第一IGBT管的发射极连接所述第三MOS管和第四MOS管的公共端，所述第一IGBT管的集电极连接所述第一储能器件和第二储能器件的公共端，所述第一IGBT管和所述第二IGBT管的栅极分别连接所述控制器；
第三IGBT管、第三二极管、第四二极管、第五二极管和第六二极管，所述第三二极管和所述第五二极管的负极均与所述第三IGBT管的集电极连接，所述第四二极管和所述第六二极管的正极均与所述第三IGBT管的发射极连接，所述第三二极管的正极分别连接所述第四二极管的负极、所述第三MOS管和第四MOS管的公共端，所述第五二极管的正极分别连接所述第六二极管的负极、所述第一储能器件和第二储能器件的公共端，所述第三IGBT管的栅极连接所述控制器。
在上述技术方案中，开关器件的三种结构均可以实现可控制的双向导通，便于在交流电压信号的正半波和负半波形成不同方向的回路。
在本发明的一些实施例中，
所述图腾柱PFC电路还包括第七二极管和第八二极管，所述第七二极管的正极连接所述第三MOS管，所述第七二极管的负极连接所述第一储能器件，所述第八二极管的负极连接所述第四MOS管，所述第八二极管的正极连接所述第二储能器件。
在上述技术方案中，通过设置第七二极管和第八二极管，可以达到单向导通的控制效果，避免第一储能器件和第二储能器件在放电时电流倒灌，提高电路工作的稳定性。
在本发明的一些实施例中，所述开关器件为继电器。
由于第七二极管和第八二极管的存在，可以避免第一储能器件和第二储能器件在放电时电流倒灌，因此开关器件在控制时可以维持导通，有利于简化对开关器件的控制。
第二方面，本发明实施例还提供了一种图腾柱PFC电路控制方法，应用于图腾柱PFC电路，所述图腾柱PFC电路包括：
电桥电路，包括形成桥式电路的开关组件，所述电桥电路的输入端连接交流电源；
储能组件，包括相互串联的第一储能器件和第二储能器件，所述储能组件并联于所述电桥电路的输出端；
开关器件，所述开关器件的一端连接交流电源，所述开关器件的另一端连接所述第一储能器件和第二储能器件的公共端；
控制器，分别连接所述开关组件和所述开关器件；
所述图腾柱PFC电路控制方法包括：
在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；
在第二时段内控制所述开关组件保持关断以使直流母线电压值降低。
本发明实施例提供的一种图腾柱PFC电路控制方法至少具有以下有益效果：通过在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，以及在第二时段内控制所述开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
在本发明的一些实施例中，所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所 述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管，所述在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，包括：
向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高，或者，向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高。
在上述技术方案中，向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高，以实现升压效果；向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，以实现倍压效果。
在本发明的一些实施例中，所述图腾柱PFC电路还包括电压检测电路，所述电压检测电路与所述储能组件并联，所述电压检测电路连接所述控制器，所述图腾柱PFC电路控制方法还包括：
通过所述电压检测电路获取直流母线电压值；
根据所述直流母线电压值确定所述第一时段和/或所述第二时段。
在上述技术方案中，根据直流母线电压值确定第一时段和/或第二时段，能够保证维持负载的正常工作。
在本发明的一些实施例中，所述根据所述直流母线电压值确定所述第一时段和/或所述第二时段，包括以下至少之一：
根据所述直流母线电压值低于第一预设电压值，控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；
根据所述直流母线电压高于第二预设电压值，控制所述开关组件和所述开关器件保持关断以使直流母线电压值降低；
其中，所述第一预设电压值小于所述第二预设电压值。
在上述技术方案中，通过将直流母线电压与第一预设电压值和第二预设电压值对比，既能及时提高直流母线电压满足负载运行的需求，又能控制直流母线电压升高至第二预设电压值为止，提高了图腾柱PFC电路运行的可靠性。
在本发明的一些实施例中，所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管，所述根据所述直流母线电压值确定所述第一时段和/或所述第二时段，包括：
获取所述图腾柱PFC电路的负载量；
当所述负载量处于第一负载量区间，根据所述直流母线电压值低于第一电压阈值，向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高；根据所述直流母线电压高于第二电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管、所述第四MOS管和所述开关器件维持关断以使直流母线电压值降低；
当所述负载量处于第二负载量区间，根据所述直流母线电压值低于第三电压阈值，向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高；根据所述直流母线电压高于第四电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管维持关断以使直流母线电压值降低；
当所述负载量处于第三负载量区间，根据所述直流母线电压值低于第一电压阈值，向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高；根据所述直流母线电压高于第四电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管维持关断以使直流母线电压值降低；
其中，所述第一电压阈值、所述第二电压阈值、所述第三电压阈值和所述第四电压阈值依次增大。
在上述技术方案中，当负载量处于第一负载量区间，第一时段和第二时段内图腾柱PFC电路均工作在升压模式；当负载量处于第二负载量区间，第一时段和第二时段内图腾柱PFC电路均工作在倍压模式；当负载量处于第三负载 量区间，第一时段图腾柱PFC电路工作在升压模式，第二时段内图腾柱PFC电路工作在倍压模式。根据负载量控制图腾柱PFC电路的工作模式，并且引入第一电压阈值、第二电压阈值、第三电压阈值和第四电压阈值进行控制，能够实现精细化控制，进一步提高图腾柱PFC电路工作的可靠性。
在本发明的一些实施例中，所述向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高，包括：
在交流电压信号的正半波，控制所述第三MOS管、开关器件维持关断，控制所述第四MOS管维持导通，向所述第一MOS管和所述第二MOS管发送脉冲信号以使所述第一MOS管和所述第二MOS管交替导通；
在交流电压信号的负半波，控制所述第三MOS管维持导通，控制所述第四MOS管、开关器件维持关断，向所述第一MOS管和所述第二MOS管发送脉冲信号以使所述第一MOS管和所述第二MOS管交替导通。
在上述技术方案中，仅需控制第一MOS管和第二MOS管进行频繁动作，第三MOS管、第四MOS管和第五MOS管无须频繁动作，有利于降低第三MOS管、第四MOS管和第五MOS管的损耗。
在本发明的一些实施例中，在交流电压信号的正半波，所述第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在交流电压信号的负半波，所述第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小，所述第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大。
在上述技术方案中，通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流的波形更加接近交流电压信号的波形，从而提高输入电流谐波和功率因数的改善效果。
在本发明的一些实施例中，所述向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，包括：
在交流电压信号的正半波，控制所述第一MOS管维持导通，控制所述第二MOS管和所述第四MOS管维持关断，向所述第三MOS管和所述开关器件发送脉冲信号以使所述第三MOS管和所述开关器件交替导通；
在交流电压信号的负半波，控制所述第二MOS管维持导通，控制所述第一MOS管和所述第三MOS管维持关断，向所述第四MOS管和所述开关器件发送脉冲信号以使所述第四MOS管和所述开关器件交替导通。
在上述技术方案中，仅需控制第三MOS管、第四MOS管和开关器件进行频繁动作，第一MOS管和第二MOS管无须频繁动作，有利于降低第一MOS管和第二MOS管的损耗。
在本发明的一些实施例中，在交流电压信号的正半波，所述开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第三MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在交流电压信号的负半波，所述开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第四MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小。
在上述技术方案中，通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流的波形更加接近交流电压信号的波形，从而提高输入电流谐波和功率因数的改善效果。
在本发明的一些实施例中，所述向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，包括：
在交流电压信号的正半波向所述第三MOS管、在交流电压信号的负半波向所述第四MOS管发送脉冲信号，控制所述开关器件维持导通。
由于第七二极管和第八二极管的存在，可以避免第一储能器件和第二储能器件在放电时电流倒灌，因此开关器件在控制时可以维持导通，有利于简化对开关器件的控制。
第三方面，本发明实施例还提供了一种线路板，包括第一方面所述的图腾柱PFC电路。
因此，上述线路板通过设置控制器在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，以及在第二时段内控制所述开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
第四方面，本发明实施例还提供了一种空调器，包括第三方面所述的线路板，
或者，
包括至少一个处理器和用于与所述至少一个处理器通信连接的存储器；所述存储器存储有能够被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行第二方面所述的图腾柱PFC电路控制方法。
因此，上述空调器通过设置控制器在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，以及在第二时段内控制所述开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
第五方面，本发明实施例还提供了一种计算机可读存储介质，所述计算机可读存储介质存储有计算机可执行指令，所述计算机可执行指令用于使计算机执行第二方面所述的图腾柱PFC电路控制方法。
本发明的其他特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明技术方案的进一步理解，并且构成说明书的一部分，与本发明的实施例一起用于解释本发明的技术方案，并不构成对本发明技术方案的限制。
图1是本发明实施例提供的一种图腾柱PFC电路的电路原理图；
图2是本发明实施例提供的开关器件的一种结构的电路原理图；
图3是本发明实施例提供的开关器件的另一种结构的电路原理图；
图4是本发明实施例提供的开关器件的另一种结构的电路原理图；
图5是本发明实施例提供的图腾柱PFC电路工作状态和间歇状态的输入电压、输入电流和直流母线电压的波形图；
图6是本发明实施例提供的图腾柱PFC电路处于升压状态时第一MOS管、第二MOS管、第三MOS管、第四MOS管、开关器件的控制波形图；
图7是本发明实施例提供的图腾柱PFC电路处于倍压状态时第一MOS管、第二MOS管、第三MOS管、第四MOS管、开关器件的控制波形图；
图8是本发明实施例提供的另一种图腾柱PFC电路的电路原理图；
图9是本发明实施例提供的一种图腾柱PFC电路控制方法的流程图；
图10是本发明实施例提供的图腾柱PFC电路控制方法的补充步骤的流程图；
图11是本发明实施例提供的根据直流母线电压值确定第一时段和/或第二时段的具体步骤的流程图；
图12是本发明实施例提供的向第一MOS管和第二MOS管发送脉冲信号以使直流母线电压值升高的具体步骤的流程图；
图13是本发明实施例提供的向第三MOS管、第四MOS管和开关器件发送脉冲信号以使直流母线电压值升高的具体步骤的流程图；
图14是本发明实施例提供的线路板的结构示意图；
图15是本发明实施例提供的空调器的结构示意图；
图16是本发明实施例提供的空调器的另一种结构示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
应了解，在本发明实施例的描述中，多个(或多项)的含义是两个以上，大于、小于、超过等理解为不包括本数，以上、以下、以内等理解为包括本数。如果有描述到“第一”、“第二”等只是用于区分技术特征为目的，而不 能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。
参照图1，本发明实施例提供了一种图腾柱PFC电路，包括电桥电路、储能组件、开关器件和控制器，其中，电桥电路包括形成桥式电路的开关组件，电桥电路的输入端连接交流电源；储能组件包括相互串联的第一储能器件和第二储能器件，储能组件并联于电桥电路的输出端；开关器件的一端连接交流电源，开关器件的另一端连接第一储能器件和第二储能器件的公共端；控制器分别连接开关组件和开关器件。
在一实施例中，第一储能器件包括第一电容C1，第二储能器件包括第二电容C2，电感器件包括电感L,开关组件包括第一MOS管Q1、第二MOS管Q2、第三MOS管Q3和第四MOS管Q4，第一MOS管Q2和第二MOS管Q2串联成第一桥臂，第三MOS管Q3和第四MOS管Q4串联成第二桥臂，第一MOS管Q1和第二MOS管Q2的公共端通过电感L连接交流电源AC的一端，第三MOS管Q3和第四MOS管Q4的公共端连接交流电源AC的另一端，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3和第四MOS管Q4均反并联有二极管。
示例性地，上述PFC电路的负载为逆变模块，当然，上述PFC电路的负载还可以为其他器件，本实施例并不作出限定。
参照图2-图4，在一实施例中，开关器件K可以有以下三种结构形式：
第一种包括第五MOS管Q5、第六MOS管Q6、第一二极管D1和第二二极管D2，第五MOS管Q5和第六MOS管Q6的源极相互连接，第一二极管D1的负极连接第五MOS管Q5的漏极，第五MOS管Q5的漏极连接第三MOS管和第四MOS管的公共端，第二二极管D2的负极连接第六MOS管Q6的漏极，第六MOS管Q6的漏极连接第一储能器件和第二储能器件的公共端，第一二极管D1和第二二极管D2的正极均与第五MOS管Q5的源极连接，第五MOS管Q5和第六MOS管Q6的栅极分别连接控制器。
具体地，开关器件K关断即第五MOS管Q5和第六MOS管Q6均关断，开关器件K在在交流电压信号(即输入电压Us)的正半波导通即第五MOS管Q5在交流电压信号的正半波导通、第六MOS管Q6在交流电压信号的正半波关断，开关器件K在交流电压信号的负半波导通即第五MOS管Q5在交流电压信号的负半波关断、第六MOS管Q6在交流电压信号的负半波导通。
第二种包括第一IGBT管Q7和第二IGBT管Q8，第一IGBT管Q7的发射极连接第二IGBT管Q8的集电极，第一IGBT管Q7的集电极连接第二IGBT管Q8的发射极，第一IGBT管Q7的发射极连接第三MOS管和第四MOS管的公共端，第一IGBT管Q7的集电极连接第一储能器件和第二储能器件的公共端，第一IGBT管Q7和第二IGBT管Q8的栅极分别连接控制器。
具体地，开关器件K关断即第一IGBT管Q7和第二IGBT管Q8均关断，开关器件K在在交流电压信号的正半波导通即第一IGBT管Q7在交流电压信号的正半波导通、第二IGBT管Q8在交流电压信号的正半波关断，开关器件K在交流电压信号的负半波导通即第一IGBT管Q7在交流电压信号的负半波关断、第二IGBT管Q8在交流电压信号的负半波导通。
第三种包括第三IGBT管Q9、第三二极管D3、第四二极管D4、第五二极管D5和第六二极管，第三二极管D3和第五二极管D5的负极均与第三IGBT管Q9的集电极连接，第四二极管D4和第六二极管的正极均与第三IGBT管Q9的发射极连接，第三二极管D3的正极分别连接第四二极管D4的负极、第三MOS管和第四MOS管的公共端，第五二极管D5的正极分别连接第六二极管的负极、第一储能器件和第二储能器件的公共端，第三IGBT管Q9的栅极连接控制器。
具体地，开关器件K关断即第三IGBT管Q9关断，开关器件K导通即第三IGBT管Q9导通。
基于上述三种结构中的任意一种，开关器件K可以实现可控制的双向导通，便于在交流电压信号的正半波和负半波形成不同方向的回路。
其中，参照图5，控制器在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，此处描述为工作状态；控制器在第二时段内控制开关组件保持关断以使直流母线电压值降低，此处描述为间歇状态。
基于本实施例中的图腾柱PFC电路，在工作状态，直流母线电压值升高有两种方式：升压状态和倍压状态，具体原理如下：
具体地，参照图6，当开关器件K断开时，PFC电路处于升压状态，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3和第四MOS管Q4的控制过程如下：
在交流电压信号的正半波，控制第三MOS管Q3维持关断，控制第四MOS管Q4维持导通，向第一MOS管Q1和第二MOS管Q2发送脉冲信号以使第一MOS管Q1和第二MOS管Q2交替导通。当第一MOS管Q1关断、第二MOS管Q2导通时，形成经过交流电源AC、电感L、第二MOS管Q2、第四MOS管Q4的回路，对电感L进行储能，输入电流Is上升；当第一MOS管Q1导通、第二MOS管Q2关断时，电感L的电流通过第一MOS管Q1、第一电容C1、第二电容C2和第四MOS管Q4形成回路，即电感L、第一电容C1和第二电容C2形成第一振荡回路，电感L同时对第一电容C1和第二电容C2进行充电，此时输入电流Is下降。如此，使第一MOS管Q1和第二MOS管Q2交替导通，对电感L进行储能和放能，达到升压效果，从而控制输入电流Is的波形，使输入电流Is波形跟随输入电压Us变化，改善输入电流Is谐波和功率因数。
在交流电压信号的负半波，控制第三MOS管Q3维持导通，控制第四MOS管Q4维持关断，向第一MOS管Q1和第二MOS管Q2发送脉冲信号以使第一MOS管Q1和第二MOS管Q2交替导通。当第一MOS管Q1导通、第二MOS管Q2关断时，形成经过交流电源AC、电感L、第一MOS管Q1、第三MOS管Q3的回路，对电感L进行储能，输入电流Is上升；当第一MOS管Q1关断、第二MOS管Q2导通时，电感L的电流通过第三MOS管Q3、第一电容C1、第二电容C2和第二MOS管Q2形成回路，即电感L、第一电容C1和第二电容C2形成第一振荡回路，电感L同时对第一电容C1和第二电容C2进行充电，此时输入电流Is下降。如此，使第一MOS管Q1和第二MOS管Q2交替导通，对电感L进行储能和放能，达到升压效果，即输出第一电压，从而控制输入电流Is的波形，使输入电流Is波形跟随输入电压Us变化，改善输入电流Is谐波和功率因数。
其中，在交流电压信号的正半波，第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在交流电压信号的负半波，第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小，第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大。
通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流Is的波形更加接近交流电压信号的波形，从而提高输入电流Is谐波和功率因数的改善效果。
参照图7，当向开关器件K发送脉冲信号时，PFC电路处于倍压状态，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4和开关器件K的控制过程如下：
在交流电压信号的正半波，控制第一MOS管Q1维持导通、第二MOS管Q2和第四MOS管Q4维持关断，向第三MOS管Q3和开关器件K发送脉冲信号，以使第三MOS管Q3和开关器件K交替导通。当第三MOS管Q3导通、开关器件K关断时，形成经过交流电源AC、电感L、第一MOS管Q1、第三MOS管Q3的回路，对电感L进行储能，输入电流Is上升；当第三MOS管Q3关断、开关器件K关断时，电感L的电流通过第一MOS管Q1、第一电容C1和开关器件K形成回路，即电感L、第一电容C1和开关器件K在交流电压信号的正半波形成第二振荡回路，电感L对第一电容C1进行充电，此时输入电流Is下降。如此，使第三MOS管Q3和开关器件K交替导通，对电感L进行储能和放能，达到倍压效果，从而控制输入电流Is的波形，使输入电流Is波形跟随输入电压Us变化，改善输入电流Is谐波和功率因数。
在交流电压信号的负半波，控制第二MOS管Q2维持导通、第一MOS管Q1和第三MOS管Q3维持关断，向第四MOS管Q4和开关器件K发送脉冲信号，以使第四MOS管Q4和开关器件K交替导通。当第四MOS管Q4导通、开关器件K关断时，形成经过交流电源AC、电感L、第二MOS管Q2、第四MOS管Q4的回路，对电感L进行储能，输入电流Is上升；当第四MOS管Q4关断、开关器件K导通时，电感L的电流通过开关器件K、第二电容C2和第二MOS管Q2形成回路，即电感L、第二电容C2和开关器件K在交流电压信号的负半波形成第三振荡回路，电感L对第二 电容C2进行充电，此时输入电流Is下降。如此，使第四MOS管Q4和开关器件K交替导通，对电感L进行储能和放能，达到倍压效果，即输出第二电压，从而控制输入电流Is的波形，使输入电流Is波形跟随输入电压Us变化，改善输入电流Is谐波和功率因数。
其中，在交流电压信号的正半波，开关器件K接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第三MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在交流电压信号的负半波，开关器件K接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第四MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小。
通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流Is的波形更加接近交流电压信号的波形，从而提高输入电流Is谐波和功率因数的改善效果。
基于上述原理，第一电压比交流电压信号的电压峰值稍高，第二电压约为交流电压信号的电压峰值的两倍。
基于此，在第一时段，在图腾柱PFC电路的工作状态，通过控制第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4和开关器件K，达到升压或者倍压效果，使得直流母线电压持续上升；在第二时段，在图腾柱PFC电路的间歇状态，使第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4保持关断，此时靠第一电容C1和第二电容C2向负载供电，使得直流母线电压持续降低。
示例性地，有以下三种控制方式：
在图腾柱PFC电路的工作状态和间歇状态，图腾柱PFC电路均处于升压状态，此种方式可以用于负载量较低的情况。具体地，在间歇状态，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4和开关器件K均保持关断，此时直流母线电压下降，输入电流为0，当直流母线电压下降到低于第一电压阈值时，切换到工作状态，其中，第一电压阈值略高于输入电压的电压峰值；在工作状态，图腾柱PFC电路处于升压状态，此时直流母线电压上升，输入电流跟随输入电压，当直流母线电压上升到高于第二电压阈值时，切换到间歇状态，其中，第二电压阈值大于第一电压阈值。
在图腾柱PFC电路的工作状态和间歇状态，图腾柱PFC电路均处于倍压状态，此种方式可以用于负载量较高的情况。具体地，在间歇状态，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4和开关器件K均保持关断，开关器件K维持导通，此时直流母线电压下降，输入电流为0，当直流母线电压下降到低于第三电压阈值时，切换到工作状态，其中，第三电压阈值略高于输入电压的电压峰值的两倍；在工作状态，图腾柱PFC电路处于倍压状态，此时直流母线电压上升，输入电流跟随输入电压，当直流母线电压上升到高于第四电压阈值时，切换到间歇状态，其中，第四电压阈值大于第三电压阈值。
在图腾柱PFC电路的工作状态，图腾柱PFC电路处于倍压状态；在图腾柱PFC电路的间歇状态，图腾柱PFC电路处于升压状态，此种方式可以用于负载量适中的情况。具体地，在间歇状态，第一MOS管Q1、第二MOS管Q2、第三MOS管Q3、第四MOS管Q4和开关器件K均保持关断，此时直流母线电压下降，输入电流为0，当直流母线电压下降到低于第一电压阈值时，切换到工作状态，其中，第一电压阈值略高于输入电压的电压峰值；在工作状态，图腾柱PFC电路处于倍压状态，此时直流母线电压上升，输入电流跟随输入电压，当直流母线电压上升到高于第四电压阈值时，切换到间歇状态，其中，第四电压阈值大于第三电压阈值，第三电压阈值大于第二电压阈值。
根据负载量控制图腾柱PFC电路的工作模式，并且引入第一电压阈值、第二电压阈值、第三电压阈值和第四电压阈值进行控制，能够实现精细化控制，进一步提高图腾柱PFC电路工作的可靠性。
可以理解的是，上述的负载量较高、适中、较低仅为示意性描述，本领域技术人员可以根据实际情况进行判断与选择。
在一实施例中，图腾柱PFC电路还设置有电压检测电路，用于检测直流母线电压值，电压检测电路与储能组件并联，电压检测电路连接控制器。通过设置电压检测电路，能够检测直流母线电压，便于根据直流母线电压确定第一时段和第二时段。
在一实施例中，参照图8，PFC电路还可以包括第七二极管D7和第八二极管D8，第七二极管D7的正极连接第 三MOS管Q3，第七二极管D7的负极连接第一电容C1，第八二极管D8的负极连接第四MOS管Q4，第八二极管D8的正极连接第二电容C2。通过设置第七二极管D7和第八二极管D8，可以达到单向导通的控制效果，避免第一储能器件和第二储能器件在放电时电流倒灌，提高电路工作的稳定性。
在此基础上，开关器件K除了上述三种结构以外，还可以为继电器，由于第七二极管D7和第八二极管D8的存在，可以避免第一储能器件和第二储能器件在放电时电流倒灌，因此开关器件K在控制时可以维持导通，有利于简化对开关器件K的控制。
通过设置控制器在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，以及在第二时段内控制开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
参照图9，基于图1中的PFC电路，本发明实施例还提供了一种图腾柱PFC电路控制方法，包括但不限于以下步骤：
步骤901：在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高；
步骤902：在第二时段内控制开关组件保持关断以使直流母线电压值降低。
通过在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，以及在第二时段内控制开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
在一实施例中，上述步骤901中，在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，具体包括：
向第一MOS管和第二MOS管发送脉冲信号以使直流母线电压值升高，或者，向第三MOS管、第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高。
其中，向第一MOS管和第二MOS管发送脉冲信号以使直流母线电压值升高，以实现升压效果；向第三MOS管、第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，以实现倍压效果。
在一实施例中，上述图腾柱PFC电路控制方法还可以包括以下步骤：
步骤1001：通过电压检测电路获取直流母线电压值；
步骤1002：根据直流母线电压值确定第一时段和/或第二时段。
其中，根据直流母线电压值确定第一时段和/或第二时段，能够保证维持负载的正常工作。
其中，上述步骤1002中，根据直流母线电压值确定第一时段和/或第二时段，具体可以为：
根据直流母线电压值低于第一预设电压值，控制开关组件和开关器件的通断以使直流母线电压值升高；
根据直流母线电压高于第二预设电压值，控制开关组件和开关器件保持关断以使直流母线电压值降低；
其中，第一预设电压值小于第二预设电压值。
通过将直流母线电压与第一预设电压值和第二预设电压值对比，既能及时提高直流母线电压满足负载运行的需求，又能控制直流母线电压升高至第二预设电压值为止，提高了图腾柱PFC电路运行的可靠性。
另外，参照图11，上述步骤1002中，根据直流母线电压值确定第一时段和/或第二时段，还可以为：
获取图腾柱PFC电路的负载量；
当负载量处于第一负载量区间，根据直流母线电压值低于第一电压阈值，向第一MOS管和第二MOS管发送脉冲信号以使直流母线电压值升高；根据直流母线电压高于第二电压阈值，控制第一MOS管、第二MOS管、第三MOS管、第四MOS管和开关器件维持关断以使直流母线电压值降低；
当负载量处于第二负载量区间，根据直流母线电压值低于第三电压阈值，向第三MOS管、第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高；根据直流母线电压高于第四电压阈值，控制第一MOS管、第二MOS管、第三MOS管和第四MOS管维持关断以使直流母线电压值降低；
当负载量处于第三负载量区间，根据直流母线电压值低于第一电压阈值，向第一MOS管和第二MOS管发送脉冲 信号以使直流母线电压值升高；根据直流母线电压高于第四电压阈值，控制第一MOS管、第二MOS管、第三MOS管和第四MOS管维持关断以使直流母线电压值降低；
其中，第一电压阈值、第二电压阈值、第三电压阈值和第四电压阈值依次增大。
当负载量处于第一负载量区间，第一时段和第二时段内图腾柱PFC电路均工作在升压模式；当负载量处于第二负载量区间，第一时段和第二时段内图腾柱PFC电路均工作在倍压模式；当负载量处于第三负载量区间，第一时段图腾柱PFC电路工作在升压模式，第二时段内图腾柱PFC电路工作在倍压模式。根据负载量控制图腾柱PFC电路的工作模式，并且引入第一电压阈值、第二电压阈值、第三电压阈值和第四电压阈值进行控制，能够实现精细化控制，进一步提高图腾柱PFC电路工作的可靠性。
其中，参照图1或者图8，负载量可以通过负载量检测电路获得，其中，负载量可以为但不限于负载电压、负载功率、负载频率等。
可以理解的是，上述第一负载量区间、第二负载量区间、第三负载量区间指的是负载需求的电压值范围，可以根据实际情况对应选择。其中，第一负载量区间代表负载量较低，第二负载量区间代表负载量较高，第三负载量区间代表负载量中等。
在一实施例中，参照图12，向第一MOS管和第二MOS管发送脉冲信号以使直流母线电压值升高，具体包括：
步骤1201：在交流电压信号的正半波，控制第三MOS管、开关器件维持关断，控制第四MOS管维持导通，向第一MOS管和第二MOS管发送脉冲信号以使第一MOS管和第二MOS管交替导通；
步骤1202：在交流电压信号的负半波，控制第三MOS管维持导通，控制第四MOS管、开关器件维持关断，向第一MOS管和第二MOS管发送脉冲信号以使第一MOS管和第二MOS管交替导通。
在步骤1201至步骤1202中，仅需控制第一MOS管和第二MOS管进行频繁动作，第三MOS管、第四MOS管和第五MOS管无须频繁动作，有利于降低第三MOS管、第四MOS管和第五MOS管的损耗。
其中，在步骤1201中，在交流电压信号的正半波，第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在步骤1202中，在交流电压信号的负半波，第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小，第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大。
通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流的波形更加接近交流电压信号的波形，从而提高输入电流谐波和功率因数的改善效果。
在一实施例中，参照图13，向第三MOS管、第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，具体包括：
步骤1301：在交流电压信号的正半波，控制第一MOS管维持导通，控制第二MOS管和第四MOS管维持关断，向第三MOS管和开关器件发送脉冲信号以使第三MOS管和开关器件交替导通；
步骤1302：在交流电压信号的负半波，控制第二MOS管维持导通，控制第一MOS管和第三MOS管维持关断，向第四MOS管和开关器件发送脉冲信号以使第四MOS管和开关器件交替导通。
在步骤1301至步骤1302中，仅需控制第三MOS管、第四MOS管和开关器件进行频繁动作，第一MOS管和第二MOS管无须频繁动作，有利于降低第一MOS管和第二MOS管的损耗。
其中，在步骤1301中，在交流电压信号的正半波，开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第三MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
在步骤1302中，在交流电压信号的负半波，开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，第四MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小。
通过控制脉冲信号在交流电压信号的电压过零点和电压峰值处的占空比，可以使得输入电流的波形更加接近交流电压信号的波形，从而提高输入电流谐波和功率因数的改善效果。
在一实施例中，基于图8所示的电路结构，向第三MOS管、第四MOS管发送脉冲信号、向所述开关器件发送控 制信号以使直流母线电压值升高，还可以是在交流电压信号的正半波向所述第三MOS管、在交流电压信号的负半波向第四MOS管发送脉冲信号，控制开关器件维持导通。
由于第七二极管和第八二极管的存在，可以避免第一储能器件和第二储能器件在放电时电流倒灌，因此开关器件在控制时可以维持导通，有利于简化对开关器件的控制。
第一MOS管、第二MOS管、第三MOS管、第四MOS管和开关器件的控制原理在上述图腾柱PFC电路的实施例中已作出解释，在此不再赘述。
还应了解，本发明实施例提供的各种实施方式可以任意进行组合，以实现不同的技术效果。
参照图14，本发明一实施例还提供了一种线路板，该线路板包括有上述实施例中的图腾柱PFC电路，因此，上述线路板通过设置控制器在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，以及在第二时段内控制开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
参照图15，本发明一实施例还提供了一种空调器，该空调器包括有上述实施例中的线路板，因此，上述空调器通过设置控制器在第一时段内控制开关组件和开关器件的通断以使直流母线电压值升高，以及在第二时段内控制开关组件保持关断以使直流母线电压值降低，使得开关组件和开关器件仅在第一时段内进行动作，从而在不影响负载工作的前提下，能够降低开关组件和开关器件的损耗，提高工作稳定性。
图16示出了本发明实施例提供了本发明实施例提供的空调器1600，该空调器1600包括：存储器1601、处理器1602及存储在存储器1601上并可在处理器1602上运行的计算机程序，计算机程序运行时用于执行上述的图腾柱PFC电路控制方法。
处理器1602和存储器1601可以通过总线或者其他方式连接。
存储器1601作为一种非暂态计算机可读存储介质，可用于存储非暂态软件程序以及非暂态性计算机可执行程序，如本发明实施例描述的图腾柱PFC电路控制方法。处理器1602通过运行存储在存储器1601中的非暂态软件程序以及指令，从而实现上述的图腾柱PFC电路控制方法。
存储器1601可以包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需要的应用程序；存储数据区可存储执行上述的图腾柱PFC电路控制方法。此外，存储器1601可以包括高速随机存取存储器1601，还可以包括非暂态存储器1601，例如至少一个磁盘存储器1601件、闪存器件或其他非暂态固态存储器1601件。在一些实施方式中，存储器1601可选包括相对于处理器1602远程设置的存储器1601，这些远程存储器1601可以通过网络连接至该空调器1600。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
实现上述的图腾柱PFC电路控制方法所需的非暂态软件程序以及指令存储在存储器1601中，当被一个或者多个处理器1602执行时，执行上述的图腾柱PFC电路控制方法，例如，执行图9至图13中描述的方法步骤。
本发明实施例还提供了计算机可读存储介质，存储有计算机可执行指令，计算机可执行指令用于执行上述的图腾柱PFC电路控制方法。
在一实施例中，该计算机可读存储介质存储有计算机可执行指令，该计算机可执行指令被一个或多个控制处理器1602执行，例如，被上述空调器1600中的一个处理器1602执行，可使得上述一个或多个处理器1602执行上述的图腾柱PFC电路控制方法，例如，执行图9至图13中描述的方法步骤。
以上所描述的装置实施例仅仅是示意性的，其中作为分离部件说明的单元可以是或者也可以不是物理上分开的，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统可以被实施为软件、固件、硬件及其适当的组合。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读 介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包括计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。
以上是对本发明的较佳实施进行了具体说明，但本发明并不局限于上述实施方式，熟悉本领域的技术人员在不违背本发明精神的共享条件下还可做出种种等同的变形或替换，这些等同的变形或替换均包括在本发明权利要求所限定的范围内。

Claims (19)

  1. 一种图腾柱功率因数校正PFC电路，包括：
    电桥电路，包括形成桥式电路的开关组件，所述电桥电路的输入端连接交流电源；
    储能组件，包括相互串联的第一储能器件和第二储能器件，所述储能组件并联于所述电桥电路的输出端；
    开关器件，所述开关器件的一端连接交流电源，所述开关器件的另一端连接所述第一储能器件和第二储能器件的公共端；以及
    控制器，分别连接所述开关组件和所述开关器件；
    其中，所述控制器在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；以及
    所述控制器在第二时段内控制所述开关组件保持关断以使直流母线电压值降低。
  2. 根据权利要求1所述的图腾柱PFC电路，其中：
    所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS管和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管。
  3. 根据权利要求1所述的图腾柱PFC电路，还包括：
    电压检测电路，用于检测直流母线电压值，所述电压检测电路与所述储能组件并联，所述电压检测电路连接所述控制器。
  4. 根据权利要求2所述的图腾柱PFC电路，其中，所述开关器件包括以下之一：
    第五MOS管、第六MOS管、第一二极管和第二二极管，所述第五MOS管和所述第六MOS管的源极相互连接，所述第一二极管的负极连接所述第五MOS管的漏极，所述第五MOS管的漏极连接所述第三MOS管和第四MOS管的公共端，所述第二二极管的负极连接所述第六MOS管的漏极，所述第六MOS管的漏极连接所述第一储能器件和第二储能器件的公共端，所述第一二极管和所述第二二极管的正极均与所述第五MOS管的源极连接，所述第五MOS管和所述第六MOS管的栅极分别连接所述控制器；
    第一IGBT管和第二IGBT管，所述第一IGBT管的发射极连接所述第二IGBT管的集电极，所述第一IGBT管的集电极连接所述第二IGBT管的发射极，所述第一IGBT管的发射极连接所述第三MOS管和第四MOS管的公共端，所述第一IGBT管的集电极连接所述第一储能器件和第二储能器件的公共端，所述第一IGBT管和所述第二IGBT管的栅极分别连接所述控制器；
    第三IGBT管、第三二极管、第四二极管、第五二极管和第六二极管，所述第三二极管和所述第五二极管的负极均与所述第三IGBT管的集电极连接，所述第四二极管和所述第六二极管的正极均与所述第三IGBT管的发射极连接，所述第三二极管的正极分别连接所述第四二极管的负极、所述第三MOS管和第四MOS管的公共端，所述第五二极管的正极分别连接所述第六二极管的负极、所述第一储能器件和第二储能器件的公共端，所述第三IGBT管的栅极连接所述控制器。
  5. 根据权利要求2所述的图腾柱PFC电路，还包括第七二极管和第八二极管，其中，所述第七二极管的正极连接所述第三MOS管，所述第七二极管的负极连接所述第一储能器件，所述第八二极管的负极连接所述第四MOS管，以及所述第八二极管的正极连接所述第二储能器件。
  6. 根据权利要求5所述的图腾柱PFC电路，其中：
    所述开关器件为继电器。
  7. 一种图腾柱PFC电路控制方法，应用于图腾柱PFC电路，所述图腾柱PFC电路包括：
    电桥电路，包括形成桥式电路的开关组件，所述电桥电路的输入端连接交流电源；
    储能组件，包括相互串联的第一储能器件和第二储能器件，所述储能组件并联于所述电桥电路的输出端；
    开关器件，所述开关器件的一端连接交流电源，所述开关器件的另一端连接所述第一储能器件和第二储能器件的公共端；以及
    控制器，分别连接所述开关组件和所述开关器件；
    所述图腾柱PFC电路控制方法包括：
    在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；以及
    在第二时段内控制所述开关组件保持关断以使直流母线电压值降低。
  8. 根据权利要求7所述的图腾柱PFC电路控制方法，其中，所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管，所述在第一时段内控制所述开关组件和所述开关器件的通断以使直流母线电压值升高，包括：
    向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高，或者，向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高。
  9. 根据权利要求7所述的图腾柱PFC电路控制方法，其中，所述图腾柱PFC电路还包括电压检测电路，所述电压检测电路与所述储能组件并联，所述电压检测电路连接所述控制器，所述图腾柱PFC电路控制方法还包括：
    通过所述电压检测电路获取直流母线电压值；
    根据所述直流母线电压值确定所述第一时段和/或所述第二时段。
  10. 根据权利要求9所述的图腾柱PFC电路控制方法，其中，所述根据所述直流母线电压值确定所述第一时段和/或所述第二时段，包括以下至少之一：
    根据所述直流母线电压值低于第一预设电压值，控制所述开关组件和所述开关器件的通断以使直流母线电压值升高；
    根据所述直流母线电压高于第二预设电压值，控制所述开关组件和所述开关器件保持关断以使直流母线电压值降低；
    其中，所述第一预设电压值小于所述第二预设电压值。
  11. 根据权利要求9所述的图腾柱PFC电路控制方法，其中，所述开关组件包括第一MOS管、第二MOS管、第三MOS管和第四MOS管，所述第一MOS和所述第二MOS管串联成第一桥臂，所述第三MOS管和所述第四MOS管串联成第二桥臂，所述第一MOS管和所述第二MOS管的公共端通过电感连接交流电源的一端，所述第三MOS管和所述第四MOS管的公共端连接交流电源的另一端，所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管均反并联有二极管，所述根据所述直流母线电压值确定所述第一时段和/或所述第二时段，包括：
    获取所述图腾柱PFC电路的负载量；
    当所述负载量处于第一负载量区间，根据所述直流母线电压值低于第一电压阈值，向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高；根据所述直流母线电压高于第二电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管、所述第四MOS管和所述开关器件维持关断以使直流母线电压值降低；
    当所述负载量处于第二负载量区间，根据所述直流母线电压值低于第三电压阈值，向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高；根据所述直流母线电压高于第四电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管维持关断以使直流母线电压值降低；以及
    当所述负载量处于第三负载量区间，根据所述直流母线电压值低于第一电压阈值，向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高；根据所述直流母线电压高于第四电压阈值，控制所述第一MOS管、所述第二MOS管、所述第三MOS管和所述第四MOS管维持关断以使直流母线电压值降低；
    其中，所述第一电压阈值、所述第二电压阈值、所述第三电压阈值和所述第四电压阈值依次增大。
  12. 根据权利要求8所述的图腾柱PFC电路控制方法，其中，所述向所述第一MOS管和所述第二MOS管发送脉冲信号以使直流母线电压值升高，包括：
    在交流电压信号的正半波，控制所述第三MOS管、开关器件维持关断，控制所述第四MOS管维持导通，向所述第一MOS管和所述第二MOS管发送脉冲信号以使所述第一MOS管和所述第二MOS管交替导通；以及
    在交流电压信号的负半波，控制所述第三MOS管维持导通，控制所述第四MOS管、开关器件维持关断，向所述第一MOS管和所述第二MOS管发送脉冲信号以使所述第一MOS管和所述第二MOS管交替导通。
  13. 根据权利要求8或12所述的图腾柱PFC电路控制方法，其中：
    在交流电压信号的正半波，所述第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；以及
    在交流电压信号的负半波，所述第一MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小，所述第二MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大。
  14. 根据权利要求8所述的图腾柱PFC电路控制方法，其中，所述向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，包括：
    在交流电压信号的正半波，控制所述第一MOS管维持导通，控制所述第二MOS管和所述第四MOS管维持关断，向所述第三MOS管和所述开关器件发送脉冲信号以使所述第三MOS管和所述开关器件交替导通；
    在交流电压信号的负半波，控制所述第二MOS管维持导通，控制所述第一MOS管和所述第三MOS管维持关断，向所述第四MOS管和所述开关器件发送脉冲信号以使所述第四MOS管和所述开关器件交替导通。
  15. 根据权利要求8或14所述的图腾柱PFC电路控制方法，其中：
    在交流电压信号的正半波，所述开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第三MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小；
    在交流电压信号的负半波，所述开关器件接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐增大，所述第四MOS管接收到的脉冲信号的占空比在电压过零点和电压峰值之间逐渐减小。
  16. 根据权利要求8所述的图腾柱PFC电路控制方法，其中，所述向所述第三MOS管、所述第四MOS管发送脉冲信号、向所述开关器件发送控制信号以使直流母线电压值升高，包括：
    在交流电压信号的正半波向所述第三MOS管、在交流电压信号的负半波向所述第四MOS管发送脉冲信号，控制所述开关器件维持导通。
  17. 一种线路板，包括权利要求1至6任意一项所述的图腾柱PFC电路。
  18. 一种空调器，包括：
    权利要求17所述的图腾柱PFC电路；
    或者，
    至少一个处理器和用于与所述至少一个处理器通信连接的存储器；所述存储器存储有能够被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行如权利要求7至16中任意一项所述的图腾柱PFC电路控制方法。
  19. 一种计算机可读存储介质，其中，所述计算机可读存储介质存储有计算机可执行指令，所述计算机可执行指令用于使计算机执行如权利要求7至16中任意一项所述的图腾柱PFC电路控制方法。
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