WO2021254264A1 - Circuit et appareil de reconnaissance d'empreintes digitales, procédé de commande et appareil d'affichage - Google Patents

Circuit et appareil de reconnaissance d'empreintes digitales, procédé de commande et appareil d'affichage Download PDF

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Publication number
WO2021254264A1
WO2021254264A1 PCT/CN2021/099643 CN2021099643W WO2021254264A1 WO 2021254264 A1 WO2021254264 A1 WO 2021254264A1 CN 2021099643 W CN2021099643 W CN 2021099643W WO 2021254264 A1 WO2021254264 A1 WO 2021254264A1
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Prior art keywords
circuit
output
sub
fingerprint identification
voltage
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PCT/CN2021/099643
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English (en)
Chinese (zh)
Inventor
丁小梁
王雷
刘英明
王佳斌
王明东
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京东方科技集团股份有限公司
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Publication of WO2021254264A1 publication Critical patent/WO2021254264A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing

Definitions

  • the present disclosure relates to the field of displays, in particular to a fingerprint identification circuit, device, control method and display device.
  • the photodiode receives the light reflected by the user's finger, and outputs the electrical signal to an analog-to-digital converter (ADC) in an integrated circuit (IC) for analog-to-digital conversion.
  • ADC analog-to-digital converter
  • the embodiments of the present disclosure provide a fingerprint identification circuit, a device, a control method, and a display device.
  • the technical solution is as follows:
  • an embodiment of the present disclosure provides a fingerprint identification circuit, and the fingerprint identification circuit includes:
  • the photoelectric conversion sub-circuit has an output terminal, configured to convert an optical signal into an electric signal, and output the electric signal from the output terminal;
  • the output sub-circuit is configured to be connected to the output terminal and the analog-to-digital converter of the integrated circuit respectively, and is configured to output the electrical signal output from the output terminal to the analog-to-digital converter under the action of a conduction signal;
  • the charge storage sub-circuit is used to connect with the output sub-circuit and the voltage supply terminal respectively, and is configured to store a part of the charge in the electrical signal output by the output terminal, and the charge capacity of the charge storage sub-circuit and the The voltage level of the voltage signal provided by the voltage supply terminal is positively correlated.
  • the charge storage sub-circuit includes a capacitor, the first plate of the capacitor is connected to the output sub-circuit and the analog-to-digital converter respectively, and the second plate of the capacitor is connected to the voltage supply ⁇ End connection.
  • the output sub-circuit includes a thin film transistor and a read line, a first electrode of the thin film transistor is connected to the output terminal, and a second electrode of the thin film transistor is connected to the mold through the read line.
  • Digital converter connection a thin film transistor and a read line, a first electrode of the thin film transistor is connected to the output terminal, and a second electrode of the thin film transistor is connected to the mold through the read line.
  • the first plate of the capacitor multiplexes a part of the read line
  • the second plate of the capacitor is located in a transparent conductive layer on the thin film transistor.
  • the fingerprint identification circuit includes a plurality of the photoelectric conversion sub-circuits, and each of the photoelectric conversion sub-circuits is connected to one of the capacitors;
  • All the second plates of the capacitors form a surface electrode.
  • the output sub-circuit includes a thin film transistor and a read line, and the thin film transistor is connected to the analog-to-digital converter through the read line;
  • the first plate of the capacitor multiplexes a part of the read line, and the second plate of the capacitor is on the same layer as the gate of the thin film transistor.
  • the output sub-circuit further includes:
  • a gate line is connected to the control terminal of the thin film transistor, and the gate line and the read line are arranged crosswise;
  • a plurality of the gate lines and a plurality of the read lines define a plurality of regions, and each of the regions is arranged with one photoelectric conversion sub-circuit, one output sub-circuit, and one charge storage sub-circuit .
  • the charge storage sub-circuit further includes:
  • Lead one end of the lead is connected to the second plate of the capacitor, and the other end of the lead is connected to the voltage supply terminal;
  • the multiple regions are arranged in an array, and the multiple capacitors in the regions in a column are connected to the same lead.
  • the photoelectric conversion sub-circuit includes a photodiode.
  • an embodiment of the present disclosure provides a fingerprint identification device, and the fingerprint identification device includes:
  • the voltage output circuit is configured to output a voltage signal to the voltage supply terminal during fingerprint recognition to control the charge capacity of the charge storage sub-circuit, and the charge capacity of the charge storage sub-circuit and the voltage supply terminal provide The voltage of the voltage signal is positively correlated.
  • the voltage output circuit includes:
  • a digital-to-analog converter is connected to the charge storage sub-circuit, and the digital-to-analog converter is used to output a voltage signal to the voltage supply terminal.
  • the voltage output circuit further includes:
  • a switch respectively connected to the digital-to-analog converter and the charge storage sub-circuit
  • the control sub-circuit is configured to control the switch to be turned on when the photoelectric conversion sub-circuit charges the charge storage sub-circuit.
  • control sub-circuit is configured to control the magnitude of the voltage output by the digital-to-analog converter based on the intensity of ambient light, and the intensity of the ambient light is inversely related to the magnitude of the voltage output by the digital-to-analog converter.
  • an embodiment of the present disclosure provides a method for controlling a fingerprint identification device.
  • the method is used to control the aforementioned fingerprint identification device.
  • the method includes:
  • a voltage signal is output to the voltage supply terminal to control the charge capacity of the charge storage sub-circuit.
  • the charge capacity of the charge storage sub-circuit and the voltage signal provided by the voltage supply terminal are positive.
  • the outputting a voltage signal to the voltage providing terminal includes:
  • the voltage output by the digital-to-analog converter is controlled, and the intensity of the ambient light is negatively correlated with the voltage output by the digital-to-analog converter.
  • an embodiment of the present disclosure provides a display device that includes a power supply component, and the fingerprint identification device as described above, and the power supply component is used to supply power to the fingerprint identification device.
  • Figure 1 is a fingerprint identification circuit provided by an embodiment of the present disclosure
  • Figure 2 is a circuit diagram of a fingerprint identification circuit provided by an embodiment of the present disclosure
  • FIG. 3 is a connection circuit diagram of a fingerprint identification circuit and an integrated circuit provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic top view of a fingerprint identification circuit provided by an embodiment of the present disclosure.
  • Fig. 5 is a schematic cross-sectional view at A-A in Fig. 4;
  • Fig. 6 is another schematic cross-sectional view at A-A in Fig. 4;
  • FIG. 7 is a schematic diagram of a timing sequence provided by an embodiment of the present disclosure.
  • FIG. 8 is a flowchart of a method for controlling a fingerprint identification device according to an embodiment of the present disclosure
  • FIG. 9 is a flowchart of a method for controlling a fingerprint identification device according to an embodiment of the present disclosure.
  • the ADC has an integrating capacitor Cfb.
  • the charge capacity of the integrating capacitor Cfb needs to consider the maximum current output by the photodiode, and the size of the current output by the photodiode is affected by the intensity of the ambient light. For example, in a scene with strong ambient light, the current output by the photodiode is larger due to the influence of ambient light, and the charge capacity of the integrating capacitor Cfb can be set larger based on this scenario.
  • FIG. 1 is a schematic structural diagram of a fingerprint identification circuit provided by an embodiment of the present disclosure.
  • the fingerprint identification circuit is an optical fingerprint identification circuit.
  • the fingerprint identification circuit 10 includes: a photoelectric conversion sub-circuit 11, an output sub-circuit 12 and a charge storage sub-circuit 13.
  • the photoelectric conversion sub-circuit 11 has an output terminal, which is configured to convert an optical signal into an electric signal and output the electric signal from the output terminal.
  • the output sub-circuit 12 is used to connect between the output terminal of the photoelectric conversion sub-circuit 11 and the analog-to-digital converter (ADC) 21 of the integrated circuit (Integrated Circuit, IC) 20, that is, with the optoelectronic converter (ADC) 21.
  • ADC analog-to-digital converter
  • the output terminal of the conversion sub-circuit 11 is connected to the ADC 21 respectively, and is configured to output the electrical signal output from the output terminal to the analog-to-digital converter 21 under the action of the conduction signal.
  • the charge storage sub-circuit 13 is used to connect between the output sub-circuit 12 and the voltage supply terminal 13A, that is, to connect to the output sub-circuit 12 and the voltage supply terminal 13A respectively, and is configured to store the output of the photoelectric conversion sub-circuit 11 Part of the charge in the electrical signal, and the charge capacity of the charge storage sub-circuit 13 is positively correlated with the voltage level of the voltage signal provided by the voltage supply terminal 13A.
  • the positive correlation means that the greater the voltage provided by the voltage supply terminal 13A, the greater the charge capacity of the charge storage sub-circuit 13, and the smaller the voltage supplied by the voltage supply terminal 13A, the smaller the charge capacity of the charge storage sub-circuit 13 will be.
  • a charge storage sub-circuit is added to the fingerprint identification circuit, and the newly added charge storage sub-circuit and the integrating capacitor Cfb are both connected to the output sub-circuit.
  • the electrical signal output by the photoelectric conversion sub-circuit will simultaneously charge the charge storage sub-circuit and the integrating capacitor Cfb. Therefore, the ability of the charge storage sub-circuit to store charges will affect the amount of charge finally transferred to the integrating capacitor Cfb.
  • control voltage signals of different magnitudes are applied to the charge storage sub-circuit to control the charge storage capacity of the charge storage sub-circuit, so that the final amount of charge to the integrating capacitor Cfb will not exceed the charge capacity of the integrating capacitor Cfb.
  • the ADC output will not show that the amount of charge charged to the integrating capacitor Cfb is too small compared with the charge capacity of the integrating capacitor Cfb, resulting in low ADC accuracy.
  • the charge capacity of the integrating capacitor Cfb is controlled by controlling the charge capacity of the charge storage sub-circuit. Enough but not exceeding the upper limit to ensure high accuracy of ADC output.
  • the analog-to-digital converter can also be applied to the case where the photoelectric conversion sub-circuit outputs more charges when the capacity of the integrating capacitor Cfb is small. This is equivalent to expanding the processing capacity of the analog-to-digital converter.
  • the accuracy of the ADC is related to the maximum voltage that can be converted, and an 8-bit ADC is used as For example, when the maximum voltage that can be converted is the voltage corresponding to 1LUX (lux), the accuracy of the 8-bit ADC is the voltage value when outputting 00000001, assuming it is 1/256; then the maximum voltage that can be converted is 10LUX corresponding to the lighting The voltage of the 8-bit ADC, the accuracy of the 8-bit ADC is the voltage value at the time of output 00000001, which is 10/256.
  • the maximum voltage that the ADC can convert is related to the capacity of the integrating capacitor, that is, when the number of bits remains unchanged, the larger the capacity of the integrating capacitor, the lower the ADC accuracy.
  • the capacity requirement for the integrating capacitor will be reduced, that is, compared with the related technology, the capacity of the integrating capacitor will be smaller when the maximum voltage that can be converted is the same. It is equivalent to improving the accuracy of the ADC output, avoiding the need to use a high-precision ADC in the IC.
  • Fig. 2 is a circuit diagram of a fingerprint identification circuit provided by an embodiment of the present disclosure.
  • the charge storage sub-circuit 13 includes a capacitor 130, a first plate of the capacitor 130 is connected to the output sub-circuit 12, and a second plate is connected to a voltage supply terminal (not shown in Fig. 2).
  • Fig. 3 is a circuit diagram of a connection circuit between a fingerprint identification circuit and an integrated circuit provided by an embodiment of the present disclosure.
  • the output sub-circuit 12 includes a thin film transistor (Thin Film Transistor, TFT) 120 and a read line (Readline) 121, and the thin film transistor 120 is connected to the analog-to-digital converter 21 through the read line 121.
  • the thin film transistor 120 is turned on when it is actuated by the turn-on signal, and the electrical signal output by the photoelectric conversion sub-circuit 11 is output to the charge storage sub-circuit 13 and the analog-to-digital converter 21.
  • the read line 121 is provided to facilitate the connection of the thin film transistor 120 and the analog-to-digital converter.
  • the digital converter 21 is connected.
  • the thin film transistor 120 includes a first electrode, a second electrode, and a control electrode.
  • the first electrode of the thin film transistor 120 is connected to the output terminal, and the second electrode of the thin film transistor 120 is connected to the analog-to-digital converter through the read line 121. 21 is connected, and the control electrode of the thin film transistor 120 is used to receive a turn-on signal.
  • the first electrode is one of the source and the drain
  • the second electrode is the other of the source and the drain
  • the control electrode is the gate
  • the current output by the photoelectric conversion sub-circuit 11 charges the capacitor 130.
  • Qst is the charge capacity of the capacitor 130, that is, the amount of charge that the capacitor 130 can store
  • Cst is the capacitance of the capacitor 130
  • Vdac is the voltage of the plate connecting the capacitor 130 and the voltage supply terminal 13A
  • Vref is the capacitor 130 and the output
  • the voltage of the plate connected to the sub-circuit 12 is the voltage of the plate connected to the analog-to-digital converter 21 of the integrated circuit 20. As shown in FIG.
  • the voltage of the plate connected to the capacitor 130 and the output sub-circuit 12 is equal to the voltage at point P, and the voltage at point P in the analog-to-digital converter is equal to Vref.
  • the charge capacity of the capacitor 130 is controlled.
  • FIG. 4 is a schematic top view of a fingerprint identification circuit provided by an embodiment of the present disclosure.
  • the output sub-circuit 12 further includes: a gate line 122.
  • the gate line 122 is connected to the control terminal of the thin film transistor 120 to provide a turn-on signal, and the gate line 122 and the read line 121 are arranged crosswise.
  • a plurality of the gate lines 122 and a plurality of the read lines 121 define a plurality of regions 123, and each region 123 is provided with a photoelectric conversion sub-circuit 11, an output sub-circuit 12, and a charge storage sub-circuit 13.
  • the gate line 122 extends in the row direction, that is, the horizontal direction in the figure
  • the read line 121 extends in the column direction, that is, the vertical line in the figure.
  • Two adjacent gate lines 122 and two adjacent read lines 121 define a rectangular area.
  • the plurality of regions 123 are arranged in an array, and correspondingly, a plurality of thin film transistors 120 are arranged in an array, and a plurality of photoelectric conversion sub-circuits 11 are also arranged in an array.
  • the thin film transistors 120 located in the same column are connected to the analog-to-digital converter 21 through the same read line 121.
  • the analog-to-digital converter 21 connected to each read line 121 is different, that is, one analog-to-digital converter 21 is provided for each column of thin film transistors 120.
  • the thin film transistors 120 in the same row are connected to the same gate line 122.
  • the gate line 122 is connected to an integrated circuit (not shown in the figure). The electrical signal output from the output terminal is output to the analog-to-digital converter 21 under the action of the signal.
  • the photoelectric conversion sub-circuit 11 includes a photodiode 110.
  • a photodiode 110 and a thin film transistor 120 constitute a fingerprint sensor (Sensor), which is correspondingly arranged in the aforementioned area 123.
  • the light source irradiates the finger with different reflections, so that the light intensity reaching the photodiode changes and produces different photocurrents.
  • the thin film transistor is turned on, the current difference of each photodiode is read sequentially, and the fingerprint valley ridge can be detected.
  • Fig. 5 is a schematic cross-sectional view at A-A in Fig. 4.
  • the thin film transistor 120 includes a gate (Gate) layer 101, a gate insulation (GI) layer 102, an active (Active) layer 103, and a source and drain (Gate) layer 101, which are sequentially stacked and disposed on a base substrate 100.
  • Source Drain (SD) layer 104 Source Drain
  • the source and drain of the thin film transistor are both located in the source and drain layer 104.
  • the structure shown in FIG. 5 is only an example.
  • the thin film transistor may also adopt other film layer structures, as long as the function of the thin film transistor can be realized.
  • the structure shown in FIG. 5 is a bottom-gate thin film transistor.
  • the thin film transistor may also be a top-gate or double-gate thin film transistor.
  • the gate insulating layer 102 is located between the active layer 103 and the gate layer 101, and the active layer 103 is separated from the gate layer 101 by the gate insulating layer 102 to ensure that the active layer 103 and the gate layer 101 are separated from each other.
  • the gate layers 101 are separated from each other to independently transmit signals.
  • the base substrate 100 may be a transparent substrate, such as a glass substrate, a plastic substrate, or the like.
  • the gate layer 101 and the source/drain layer 104 may be a metal layer or an indium tin oxide layer. Ensure the stability of electrical signal transmission between the gate layer 101 and the source-drain layer 104.
  • the materials of the gate layer 101 and the source/drain layer 104 may be the same or different.
  • the gate insulating layer 102 may be an inorganic insulating layer, such as a silicon nitride layer or a silicon oxynitride layer, or an organic insulating layer, such as a ring-shaped resin insulating layer.
  • the active layer 103 may be a polysilicon or a single crystal silicon layer.
  • the fingerprint identification circuit further includes: a first insulating layer 105.
  • the first insulating layer 105 is located on the source and drain layer 104, and the first insulating layer 105 is provided with a first via 151; the photodiode 110 is disposed on the first insulating layer 105 and passes through the first via 151 and the thin film transistor 120 The source connection.
  • the first insulating layer 105 may be an inorganic insulating layer, such as a silicon nitride layer or a silicon oxynitride layer, or an organic insulating layer, such as a ring-shaped resin insulating layer.
  • an inorganic insulating layer such as a silicon nitride layer or a silicon oxynitride layer
  • an organic insulating layer such as a ring-shaped resin insulating layer.
  • the photodiode 110 may include a PIN junction structure.
  • the PIN junction is a common photoelectric conversion device with a simple structure and convenient manufacturing.
  • the photodiode 110 includes a first electrode 106 on the first insulating layer 105, a PIN junction 107 on the first electrode 106, and a second electrode 108 on the PIN junction.
  • the first electrode 106 is connected to the source of the thin film transistor 120 through the first via 151.
  • the first electrode 106 may be made of the same material as the source and drain layer.
  • the PIN junction 107 may include an electron (English: Negative, abbreviation: N) type semiconductor, an intrinsic (English: Intrinsic, abbreviation: I) type semiconductor and a hole (English: Positive, abbreviation: P) type semiconductor.
  • the second electrode 107 may be made of a thin-film conductive material, such as indium tin oxide.
  • the fingerprint recognition circuit further includes: a second insulating layer 109, a planarization layer 1010, and a bias voltage (Vbias) line 1011.
  • Vbias bias voltage
  • the second insulating layer 109 simultaneously covers the first insulating layer 105 and the second electrode 108, the planarizing layer 1010 covers the second insulating layer 109, and the second insulating layer 109 and the planarizing layer 1010 are provided with a second via 191,
  • the bias voltage line 1011 is disposed on the planarization layer 1010 and is connected to the second electrode 108 through the second via hole 191.
  • the second insulating layer 109 can be made of the same material as the first insulating layer 105, and the planarization layer 1010 can be a resin layer.
  • the bias voltage line 1011 can be made of metal or a transparent conductive film.
  • the fingerprint identification circuit further includes: a third insulating layer 1012.
  • the third insulating layer 1012 is located on the planarization layer 1010.
  • the third insulating layer 1012 can be made of the same material as the first insulating layer 105.
  • the read line 121 is located in the source and drain layer and is connected to the drain of the thin film transistor 120.
  • the first plate of the capacitor 130 multiplexes a part of the read line 121, and the second plate 132 of the capacitor 130 is located on the film Inside the transparent conductive layer 1013 on the transistor 120.
  • the transparent conductive layer 1013 may be an indium tin oxide layer.
  • the fingerprint recognition circuit includes a plurality of photoelectric conversion sub-circuits 11, and each of the photoelectric conversion sub-circuits 11 is connected to one capacitor 130.
  • all the second plates of the capacitor 130 form a surface electrode.
  • it can shield external noise and improve the accuracy of the fingerprint recognition circuit signal.
  • Fig. 6 is another schematic cross-sectional view at A-A in Fig. 4.
  • the capacitor 130 is set in a different manner.
  • the first plate of the capacitor 130 multiplexes a part of the read line 121, and the second plate 132 of the capacitor 130 is on the same layer as the gate of the thin film transistor 120, and both are located on the gate. Layer 101.
  • the charge storage sub-circuit 13 further includes: a lead 131.
  • One end of the lead 131 is connected to the second plate 132 of the capacitor 130, and the other end of the lead 131 is connected to the voltage supply terminal.
  • the lead 131 and the second plate 132 of the capacitor 130 may be located on different layers. As shown in FIG. 5, the lead 131 may be located under the second plate 132 of the capacitor 130. For example, a groove can be opened on the third insulating layer 1012, and then the lead 131 can be formed in the groove.
  • the lead 131 can be made of metal or a transparent conductive film.
  • the lead 131 and the second plate 132 of the capacitor 130 are arranged in the same layer. As shown in FIG. 6, the lead 131 and the second plate 132 of the capacitor 130 are both located on the gate layer 101.
  • a plurality of the capacitors 130 in a column area 123 are connected to the same lead 131, and the same lead 131 is connected to the integrated circuit 20.
  • analog-to-digital converter 21 is connected to the output sub-circuit 12;
  • the voltage output circuit 22 is configured to output a voltage signal to the voltage supply terminal during fingerprint recognition to control the charge capacity of the charge storage sub-circuit, the charge capacity of the charge storage sub-circuit 13 and the voltage supply The voltage level of the voltage signal provided by the terminal is positively correlated.
  • the voltage output circuit 22 includes a digital-to-analog converter (DAC) 221 connected to the charge storage sub-circuit 13.
  • DAC digital-to-analog converter
  • the digital-to-analog converter 221 is used to output a voltage signal to the voltage supply terminal, so as to provide a control voltage signal for the charge storage sub-circuit 13.
  • the digital-to-analog converter 221 converts the digital signal provided by the integrated circuit into an analog signal, and then outputs it to the charge storage sub-circuit 13.
  • the voltage output circuit 22 further includes: a switch 222 and a control sub-circuit 223.
  • the switch 222 is connected between the digital-to-analog converter 221 and the charge storage sub-circuit 13; the control sub-circuit 223 is configured to control the switch 222 to the charge storage sub-circuit in the photoelectric conversion sub-circuit 11 13 Turn on when charging.
  • FIG. 7 is a schematic diagram of a timing sequence provided by an embodiment of the present disclosure.
  • Figure 7 shows the time sequence of a working cycle of the fingerprint identification circuit.
  • the gate line Gate1 and the gate line Gate2 provide high levels (that is, turn-on signals) in turn.
  • the first row output sub-circuit 12 and the second row output sub-circuit 12 are sequentially driven to be turned on, and the two rows of photoelectric conversion sub-circuits 11 are reset.
  • This stage is a reset stage. After the reset stage, it enters the exposure stage, that is, the photoelectric conversion sub-circuit 11 receives the light reflected by the user's finger and converts it into an electrical signal.
  • the gate line Gate1 first controls the first row output sub-circuit 12 to be turned on.
  • the control signal S1 corresponding to each switch 222 is also at a high level, that is, each switch 222 is also turned on, thereby enabling the digital-to-analog conversion
  • the device 221 provides a control voltage signal to the charge storage sub-circuit 13.
  • the gate line Gate2 controls the second row output sub-circuit 12 to be turned on
  • the control signal S1 corresponding to each switch 222 is also at a high level.
  • control sub-circuit 223 is configured to control the magnitude of the voltage output by the digital-to-analog converter 221 based on the intensity of the ambient light.
  • the voltage is negatively correlated.
  • the negative correlation means that the greater the ambient light intensity, the smaller the voltage output by the digital-to-analog converter 221, and the smaller the ambient light intensity, the greater the voltage output by the digital-to-analog converter 221.
  • the fingerprint identification device may further include an ambient light sensor for detecting the intensity of ambient light, so that the integrated circuit can control the charge capacity of the charge storage sub-circuit 13 based on the intensity of the detected ambient light.
  • the fingerprint identification device can be integrated on a display panel, for example, on a liquid crystal display (English: Liquid Crystal Display, abbreviated as LCD) panel or an organic light emitting display (English: Organic Light Emitting Display, abbreviated as: OLED) panel.
  • a liquid crystal display English: Liquid Crystal Display, abbreviated as LCD
  • OLED Organic Light Emitting Display
  • the embodiment of the present disclosure also provides a display device, the display device includes a power supply component, and the fingerprint identification device of any one of the above, and the power supply component is used to supply power to the fingerprint identification device.
  • the display device may be any product or component with display function, such as a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, and so on.
  • FIG. 8 is a flowchart of a method for controlling a fingerprint identification device provided by an embodiment of the present disclosure. Referring to Figure 8, the method includes:
  • step 301 during fingerprint recognition, a voltage signal is output to the voltage supply terminal to control the charge capacity of the charge storage sub-circuit, the charge capacity of the charge storage sub-circuit and the voltage provided by the voltage supply terminal The voltage of the signal is positively correlated.
  • control voltage signals of different magnitudes are applied to the charge storage sub-circuit, thereby controlling the charge storage capacity of the charge storage sub-circuit, so that the final amount of charge to the integrating capacitor Cfb is equal, and the ADC output accuracy is high.
  • FIG. 9 is a flowchart of a method for controlling a fingerprint identification device according to an embodiment of the present disclosure. Referring to Figure 9, the method includes:
  • step 401 in the reset phase, each row of output sub-circuits is driven to be turned on in turn, the photoelectric conversion sub-circuits of each row are reset, and then the exposure phase is entered.
  • the gate line Gate1 and the gate line Gate2 sequentially provide high levels, and sequentially drive the first row output subcircuit 12 and the second row output subcircuit 12 Turn on to clear the two rows of photoelectric conversion sub-circuits 11.
  • the reset stage it enters the exposure stage, that is, the photoelectric conversion sub-circuit 11 receives the light reflected by the user's finger and converts it into an electrical signal.
  • each row output sub-circuit is controlled to be turned on in sequence, and the electric signal generated by the photoelectric conversion sub-circuit is used to charge the charge storage sub-circuit and the integrating capacitor.
  • step 403 when the photoelectric conversion sub-circuit charges the charge storage sub-circuit, the switch of the control voltage output circuit is turned on to provide a control voltage signal for the charge storage sub-circuit.
  • the gate line Gate1 first controls the first row output sub-circuit 12 to be turned on.
  • the control signal S1 corresponding to each switch 222 is also at a high level, that is, each switch 222 is also turned on.
  • the digital-to-analog converter 221 provides a control voltage signal to the charge storage sub-circuit 13 at this time.
  • the gate line Gate2 controls the second row output sub-circuit 12 to be turned on, the control signal S1 corresponding to each switch 222 is also at a high level.
  • the magnitude of the voltage output by the digital-to-analog converter may be controlled based on the intensity of the ambient light, and the intensity of the ambient light is negatively correlated with the magnitude of the voltage output by the digital-to-analog converter.
  • the intensity of the ambient light can be detected by the ambient light sensor, so that the integrated circuit can control the charge capacity of the charge storage sub-circuit 13 based on the intensity of the detected ambient light.
  • the conduction signals are all described by taking a high level as an example. In other implementation manners, the conduction signal may also be implemented at a low level. In addition to different turn-on signals, the two implementations also use different types of thin film transistors.

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Abstract

L'invention concerne un circuit et un appareil de reconnaissance d'empreintes digitales, ainsi qu'un procédé de commande et un appareil d'affichage, qui appartiennent au domaine des afficheurs. Le circuit de reconnaissance d'empreintes digitales (10) comprend : un sous-circuit de conversion photoélectrique (11) qui est pourvu d'une extrémité de sortie et configuré pour convertir un signal optique en signal électrique, et pour transmettre le signal électrique à partir de l'extrémité de sortie ; un sous-circuit de sortie (12) qui est utilisé pour se connecter respectivement à l'extrémité de sortie et à un convertisseur analogique-numérique (21) d'un circuit intégré (20), et qui est configuré pour transmettre le signal électrique, qui est émis à partir de l'extrémité de sortie, vers le convertisseur analogique-numérique (21) sous l'action d'un signal de mise sous tension ; et un sous-circuit de stockage de charge (13) qui est utilisé pour se connecter respectivement au sous-circuit de sortie (12) et à une extrémité de fourniture de tension, et configuré pour stocker une certaine charge dans le signal électrique émis par l'extrémité de sortie, la capacité de charge du sous-circuit de stockage de charge (13) étant corrélée positivement à l'amplitude d'une tension générée par l'extrémité de fourniture de tension.
PCT/CN2021/099643 2020-06-19 2021-06-11 Circuit et appareil de reconnaissance d'empreintes digitales, procédé de commande et appareil d'affichage WO2021254264A1 (fr)

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CN112510809B (zh) * 2020-12-01 2023-03-24 北京集创北方科技股份有限公司 电子装置、显示面板及电子设备
CN115943443B (zh) * 2021-06-18 2024-04-16 京东方科技集团股份有限公司 传感电路、检测控制方法、指纹识别模组和显示装置

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