WO2021254105A1 - 平板探测装置及系统 - Google Patents

平板探测装置及系统 Download PDF

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WO2021254105A1
WO2021254105A1 PCT/CN2021/095708 CN2021095708W WO2021254105A1 WO 2021254105 A1 WO2021254105 A1 WO 2021254105A1 CN 2021095708 W CN2021095708 W CN 2021095708W WO 2021254105 A1 WO2021254105 A1 WO 2021254105A1
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terminal
electrically connected
signal
compensation
transistor
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PCT/CN2021/095708
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English (en)
French (fr)
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张晔
徐帅
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京东方科技集团股份有限公司
北京京东方传感技术有限公司
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Publication of WO2021254105A1 publication Critical patent/WO2021254105A1/zh

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    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/44—Constructional features of apparatus for radiation diagnosis
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/42—Arrangements for detecting radiation specially adapted for radiation diagnosis
    • A61B6/4208—Arrangements for detecting radiation specially adapted for radiation diagnosis characterised by using a particular type of detector
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/42—Arrangements for detecting radiation specially adapted for radiation diagnosis
    • A61B6/4208—Arrangements for detecting radiation specially adapted for radiation diagnosis characterised by using a particular type of detector
    • A61B6/4233—Arrangements for detecting radiation specially adapted for radiation diagnosis characterised by using a particular type of detector using matrix detectors
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/42—Arrangements for detecting radiation specially adapted for radiation diagnosis
    • A61B6/4266—Arrangements for detecting radiation specially adapted for radiation diagnosis characterised by using a plurality of detector units

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  • the present disclosure relates to the field of medical electronics, and in particular to a flat panel detection device and system.
  • Digital Radiography is a new X-ray photography technology developed in the 1990s. With its significant advantages such as faster imaging speed, more convenient operation, and higher imaging resolution, it has become The leading direction of digital X-ray photography technology has been recognized by clinical institutions and imaging experts all over the world.
  • the core of DR technology is flat-panel detectors.
  • Flat-panel detectors are a kind of precise and valuable equipment, which plays a decisive role in imaging quality. Familiar with the performance indicators of detectors will help us improve imaging quality and reduce X-ray radiation dose.
  • the embodiment of the present disclosure provides a flat panel detection device, including:
  • a flat panel detector includes a plurality of photosensitive circuits
  • a plurality of sampling circuits one column of the photosensitive circuit is electrically connected to one of the sampling circuits, and the sampling circuit includes a sampling amplifier circuit and a compensation circuit;
  • the photosensitive circuit is configured to receive a light signal and convert the received light signal into a detection signal in the detection phase, and provide the detection signal to the detection signal under the control of the first signal at the scanning signal terminal
  • a sampling amplifier circuit in the reset stage, receiving the reset signal output by the sampling amplifier circuit and the compensation signal output by the compensation circuit under the control of the second signal of the scan signal terminal to reset;
  • the sampling and amplifying circuit is configured to process the received detection signal and provide it to a sampling output terminal in the detection phase, and output a reset signal to the photosensitive circuit in the reset phase;
  • the compensation circuit is configured to output a compensation signal to the photosensitive circuit in the reset phase.
  • the photosensitive circuit includes: a photodiode, a storage capacitor, and a control transistor;
  • the first end of the photodiode is electrically connected to the bias voltage end, and the second end of the photodiode is electrically connected to the first end of the control transistor;
  • the first end of the storage capacitor is electrically connected to the bias voltage end, and the second end of the storage capacitor is electrically connected to the second end of the photodiode;
  • the control terminal of the control transistor is electrically connected with the scan signal terminal, and the second terminal of the control transistor is electrically connected with the sampling amplifier circuit.
  • the compensation circuit includes a first compensation switch; a first end of the first compensation switch is electrically connected to a compensation signal end, a control end of the first compensation switch is electrically connected to a trigger signal end, and the second The second end of a compensation switch is electrically connected to the second end of the control transistor.
  • the first compensation switch includes a first transistor; the first terminal of the first transistor is electrically connected to the compensation signal terminal, and the control terminal of the first transistor is electrically connected to the trigger signal terminal, The second end of the first transistor is electrically connected to the second end of the control transistor.
  • the compensation circuit further includes a second compensation switch; the first terminal of the second compensation switch is electrically connected to the compensation signal terminal, and the control terminal of the second compensation switch is electrically connected to the trigger signal terminal. Connected, the second end of the second compensation switch is electrically connected to the second end of the control transistor.
  • the second compensation switch includes a second transistor; a first terminal of the second transistor is electrically connected to the compensation signal terminal, and a control terminal of the second transistor is electrically connected to the trigger signal terminal, The second end of the second transistor is electrically connected to the second end of the control transistor; the second transistor is of a different type from the first transistor.
  • the second transistor is an N-type field effect transistor
  • the first transistor is a P-type field effect transistor
  • the reset signal and the compensation signal are both fixed voltage signals, and the reset signal and the compensation signal have the same voltage.
  • the sampling and amplifying circuit includes a charge-sensitive preamplifier and a data selector;
  • the first input terminal of the charge-sensitive preamplifier is electrically connected with the photosensitive circuit, and the second input terminal of the charge-sensitive preamplifier is electrically connected with the output terminal of the data selector;
  • the first input terminal of the data selector is electrically connected with the reset signal terminal, and the second input terminal of the data selector is electrically connected with the first reference voltage terminal.
  • the charge-sensitive preamplifier includes an operational amplifier, a variable capacitor, and a reset switch;
  • the inverting input terminal of the operational amplifier is electrically connected with the second terminal of the control transistor, the non-inverting input terminal of the operational amplifier is electrically connected with the output terminal of the data selector, and the output terminal of the operational amplifier Electrically connected to the sampling output terminal;
  • the first terminal of the variable capacitor is electrically connected to the inverting input terminal of the operational amplifier, and the second terminal of the variable capacitor is electrically connected to the output terminal of the operational amplifier;
  • the first terminal of the reset switch is electrically connected with the inverting input terminal of the operational amplifier, and the second terminal of the reset switch is electrically connected with the output terminal of the operational amplifier.
  • the reset signal terminal and the compensation signal terminal are the same signal terminal.
  • the embodiment of the present disclosure provides a flat panel detection system, including: the above-mentioned flat panel detection device provided in the embodiment of the present disclosure.
  • FIG. 1 is a schematic structural diagram of a flat panel detection device and its sampling circuit in related technologies provided by an embodiment of the disclosure
  • FIG. 2 is a schematic diagram of a flat panel detection device provided by an embodiment of the disclosure.
  • FIG. 3 is a schematic structural diagram of a flat panel detection device provided by an embodiment of the disclosure.
  • FIG. 4 is a schematic structural diagram of yet another flat panel detection device provided by an embodiment of the disclosure.
  • FIG. 5 is a signal timing diagram of a flat panel detection device provided by an embodiment of the disclosure.
  • FIG. 1 it is a flat panel detector and its sampling circuit in the related art, including: multiple photodiodes PD, multiple capacitors Cst, multiple control switches K, data selector, operational amplifier, variable capacitor Cf And a reset switch T; a photodiode PD, a capacitor Cst, and a control switch K form a photosensitive circuit, and an operational amplifier, a variable capacitor Cf and a reset switch T form a charge-sensitive preamplifier.
  • the flat-panel detector will store charge in the capacitor Cst in the photosensitive circuit. Therefore, the flat-panel detector will continuously turn on the control switch K in each row of the photosensitive circuit before taking pictures, thereby emptying the charge stored in the capacitor Cst in the photosensitive circuit.
  • the flat panel detector ensures the accuracy of the gray value of each pixel in the image generated by the electrical signal collected by each photosensitive circuit.
  • the charge-sensitive preamplifier has insufficient charging capacity for the storage capacitor Cst in the photosensitive circuit when the control switch K is turned on, resulting in the potential of the capacitor Cst in each row of the photosensitive circuit being pulled down.
  • the lower the initial potential of the capacitor Cst the higher the gray value of the generated image.
  • the initial potential of the capacitor Cst in each row of photosensitive circuits from top to bottom will be lower and lower, which will cause the image generated by the flat panel detector to appear dark in the top and bright in the bottom.
  • a flat panel detection device provided by an embodiment of the present disclosure, as shown in FIGS. 2 to 4, includes a flat panel detector 100 and a plurality of sampling circuits 200;
  • the flat panel detector 100 includes a plurality of photosensitive circuits 110; among them, a row of photosensitive circuits 110 is electrically connected to a sampling circuit 200;
  • the sampling circuit 200 includes a compensation circuit 210 and a sampling amplifier circuit 220;
  • the photosensitive circuit 110 is configured to receive an optical signal and convert the received optical signal into a detection signal in the detection phase, and provide the detection signal to the sampling amplifier circuit 220 under the control of the first signal at the scanning signal terminals G1 to Gn; In the reset phase, receiving the reset signal output by the sampling amplifier circuit 220 and the compensation signal output by the compensation circuit 210 under the control of the second signal from the scanning signal terminals G1 to Gn to reset;
  • the sampling amplifier circuit 220 is configured to process the received detection signal and provide it to the sampling output terminal O in the detection phase; in the reset phase, output a reset signal to the photosensitive circuit 110;
  • the compensation circuit 210 is configured to output a compensation signal to the photosensitive circuit 110 in the reset phase.
  • the flat panel detection device provided by the embodiment of the present disclosure is provided with a compensation circuit, so that the photosensitive circuit not only receives the reset signal output by the sampling amplifier circuit during the reset phase, but also receives the compensation signal output by the compensation circuit, so as to detect the photosensitivity of each detector in the flat panel detector.
  • the circuits are fully reset, so that the initial potential of each photosensitive circuit before receiving the light signal in the detection stage is the same, and the problem of poor image uniformity generated by the flat panel detection device due to the different initial potential of each photosensitive circuit can be improved.
  • both the reset signal and the compensation signal can be set It is a fixed voltage signal, and the voltage of the reset signal and the compensation signal are the same.
  • an image processor that is electrically connected to the sampling output terminal O for generating an image according to the detection signal, and a driver that provides a signal to each signal terminal
  • the specific implementation may be It is the same as in the related art, and will not be repeated here.
  • the photosensitive circuit 110 may include: a photodiode PD, a storage capacitor Cst, and a control transistor K;
  • the first end of the photodiode PD is electrically connected to the bias voltage terminal VB, and the second end of the photodiode PD is electrically connected to the first end of the control transistor K;
  • the first end of the storage capacitor Cst is electrically connected to the bias voltage terminal VB, and the second end of the storage capacitor Cst is electrically connected to the second end of the photodiode PD;
  • the control terminal of the control transistor K is electrically connected to the scanning signal terminals G1 to Gn, and the second terminal of the control transistor K is electrically connected to the sampling amplifier circuit 220.
  • the compensation circuit 210 may include a first compensation switch; the first terminal of the first compensation switch is electrically connected to the compensation signal terminal VC, and the first compensation The control terminal of the switch is electrically connected to the trigger signal terminal STV, and the second terminal of the first compensation switch is electrically connected to the second terminal of the control transistor K.
  • the first compensation switch may include a first transistor TN; a first terminal of the first transistor TN is electrically connected to the compensation signal terminal VC, a control terminal of the first transistor TN is electrically connected to the trigger signal terminal STV, and the first transistor TN is electrically connected to the trigger signal terminal STV.
  • the second terminal is electrically connected to the second terminal of the control transistor K.
  • the compensation circuit 210 may further include a second compensation switch; the first terminal of the second compensation switch is electrically connected to the compensation signal terminal VC, and the second compensation switch The control terminal of the compensation switch is electrically connected with the trigger signal terminal STV, and the second terminal of the second compensation switch is electrically connected with the second terminal of the control transistor K.
  • the second compensation switch may include a second transistor TP; the first terminal of the second transistor TP is electrically connected to the compensation signal terminal VC, the control terminal of the second transistor TP is electrically connected to the trigger signal terminal STV, and the second terminal of the second transistor TP It is electrically connected to the second end of the control transistor K.
  • the first signal is applied to each scan signal terminal G1 to Gn, so that the control transistor K in each row of the photosensitive circuit 110 is turned on, so that the reset signal output by the sampling amplifier circuit 220 passes through the control transistor.
  • K is input to the storage capacitor Cst.
  • the trigger signal terminal STV is loaded with a turn-on signal to turn on at least one compensation switch in the compensation circuit 210, so that the compensation signal is input to the storage capacitor Cst through the compensation switch and the control transistor K, thereby emptying the storage capacitor Cst , And make the potential of the storage capacitor Cst in each row of the photosensitive circuit 110 the same.
  • the second transistor TP can be of a different type from the first transistor TN.
  • the first transistor TN can be an N-type field effect.
  • the second transistor TP is a P-type field effect transistor, or vice versa. Therefore, the compensation circuit 210 can sufficiently provide the compensation signal of the compensation signal terminal VC to the photosensitive circuit 110.
  • the first transistor TN may be an N-channel enhancement type field effect transistor
  • the second transistor TP may be a P-channel enhancement type field effect transistor
  • the first transistor TN is lined with The bottom is electrically connected to the ground terminal Gnd
  • the substrate of the second transistor TP is electrically connected to the power supply voltage terminal VDD.
  • the on and off of the first transistor TN and the second transistor TP can be controlled by controlling the signal loaded on the trigger signal terminal STV.
  • both the input and output of the first transistor TN and the second transistor TP are in a high impedance state, and the compensation circuit 210 is turned off.
  • the voltage of the signal at the trigger signal terminal STV is greater than the voltage VDD of the signal at the power supply voltage terminal, at least one of the first transistor TN and the second transistor TP will be turned on.
  • the first transistor TN When the signal voltage VDD and the threshold voltage VN of the first transistor TN satisfy 0 ⁇ V_com ⁇ VDD-VN, the first transistor TN is turned on; when the signal voltage V_com of the compensation signal terminal VC, the signal voltage VDD of the power supply voltage terminal, and the first transistor When the threshold voltage VP of the second transistor TP satisfies
  • the above-mentioned control transistor K may be a thin film transistor (TFT, Thin Film Transistor) or a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Scmiconductor).
  • TFT Thin Film Transistor
  • MOS Metal Oxide Scmiconductor
  • the above-mentioned first transistor and the second transistor may be metal oxide semiconductor field effect transistors.
  • the control terminal of each transistor is used as the gate, and the first terminal of the above-mentioned transistor can be used as the source and the second terminal as the drain, or The first end of the transistor is used as the drain, and the second end is used as the source, and no specific distinction is made here.
  • the sampling and amplifying circuit 220 may include a charge-sensitive preamplifier 221 and a data selector 222;
  • the first input terminal of the charge-sensitive preamplifier 221 is electrically connected with the photosensitive circuit 110, and the second input terminal of the charge-sensitive preamplifier 221 is electrically connected with the output terminal of the data selector 222;
  • the first input terminal of the data selector 222 is electrically connected to the reset signal terminal REF, and the second input terminal of the data selector 222 is electrically connected to the first reference voltage terminal VS.
  • the charge-sensitive preamplifier 21 may include an operational amplifier, a variable capacitor Cf and a reset switch T; wherein the inverting input terminal of the operational amplifier is electrically connected to the second terminal of the control transistor K, and the non-inverting input terminal of the operational amplifier is electrically connected to the second terminal of the control transistor K.
  • the output terminal of the data selector 222 is electrically connected, the output terminal of the operational amplifier is electrically connected with the sampling output terminal O; the first terminal of the variable capacitor Cf is electrically connected with the inverting input terminal of the operational amplifier, and the second terminal of the variable capacitor Cf It is electrically connected with the output terminal of the operational amplifier; the first terminal of the reset switch T is electrically connected with the inverting input terminal of the operational amplifier, and the second terminal of the reset switch T is electrically connected with the output terminal of the operational amplifier.
  • the reset signal terminal REF and the compensation signal terminal VC can be set to the same terminal.
  • the data selector 222 may also have more input terminals, such as a third input terminal and a fourth input terminal. These input terminals are respectively electrically connected to more reference voltage terminals, such as the third input terminal and the second input terminal.
  • the reference voltage terminal is electrically connected, and the fourth input terminal is electrically connected to the third reference voltage terminal.
  • different reference voltage terminals have different voltages, which enables the data selector to have more external access voltages to choose from.
  • embodiments of the present disclosure also provide a flat panel detector system, including any of the above flat panel detectors.
  • the flat panel detector Before resetting the first stage t1, the flat panel detector is in the standby stage, and the storage capacitor Cst in its photosensitive circuit will store negative charges.
  • the data selector 222 turns on the reset signal terminal REF and the non-inverting input terminal of the operational amplifier, and the voltage of the inverting input terminal of the operational amplifier is close to the reset signal voltage of the reset signal terminal REF.
  • the control transistor K is turned on.
  • the turned-on control transistor K provides the negative charge stored in the storage capacitor Cst to the first terminal of the variable capacitor Cf, so that the potential of the first terminal of the variable capacitor Cf is reduced, resulting in a voltage difference between the two ends of the variable capacitor Cf.
  • the data selector 222 turns on the reset voltage terminal REF and the non-inverting input terminal of the operational amplifier.
  • the voltage at the inverting input terminal of the operational amplifier will be pulled up to a voltage close to the reset signal terminal REF, which is a positive effect on the photosensitive circuit. 110 provides a reset signal to reset the storage capacitor Cst.
  • the control transistor K keeps conducting.
  • One of the sum control transistors K is provided to the storage capacitor Cst to further reset the storage capacitor Cst.
  • the working process of resetting the first stage t3 may be basically the same as the working procedure of resetting the first stage t1 corresponding to the first row of photosensitive circuits, and the working procedure of resetting the second stage t4 may be the same as that of the first row.
  • the working process of the second reset stage t2 corresponding to the photosensitive circuit is basically the same. The same is true for the photosensitive circuits of the third row to the nth row, and the specific working process will not be repeated here.
  • An embodiment of the present disclosure provides a flat panel detection device and system, including a flat panel detector and a plurality of sampling circuits, the flat panel detector includes a plurality of photosensitive circuits; wherein a column of photosensitive circuits is electrically connected to a sampling circuit; the sampling circuit includes a compensation circuit And sampling amplifier circuit.
  • the photosensitive circuit can receive not only the reset signal output by the sampling amplifier circuit but also the compensation signal output by the compensation circuit during the reset stage, so as to fully reset each photosensitive circuit in the flat panel detector, and then make each photosensitive circuit
  • the initial potential of the circuit before receiving the light signal in the detection stage is the same, which solves the problem of poor uniformity of the image generated by the flat panel detection device due to the different initial potential of each photosensitive circuit.

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Abstract

一种平板探测装置及系统，包括平板探测器（100）和多个采样电路（200），平板探测器（100）包括多个感光电路（110）；其中，一列感光电路（110）与一个采样电路（200）电连接；采样电路（200）包括补偿电路（210）和采样放大电路（220）。通过设置有补偿电路（210），使感光电路（110）在复位阶段中不仅接收采样放大电路（220）输出的复位信号还可以接收补偿电路（210）输出的补偿信号，从而对平板探测器（100）中各感光电路（110）均充分复位，进而可以使各感光电路（110）在探测阶段中接收光信号之前的初始电位均相同，改善由于各感光电路（110）的初始电位不同导致平板探测装置生成的图像均一性不良的问题。

Description

平板探测装置及系统
相关申请的交叉引用
本公开要求在2020年06月16日提交中国专利局、申请号为202010547190.4、申请名称为“一种平板探测装置及系统”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及医疗电子领域，特别涉及一种平板探测装置及系统。
背景技术
数字化X线摄影(Digital Radiography，简称DR)，是上世纪90年代发展起来的X线摄影新技术，以其更快的成像速度、更便捷的操作、更高的成像分辨率等显著优点，成为数字X线摄影技术的主导方向，并得到世界各国的临床机构和影像学专家认可。DR的技术核心是平板探测器，平板探测器是一种精密和贵重的设备，对成像质量起着决定性的作用，熟悉探测器的性能指标有助于我们提高成像质量和减少X线辐射剂量。
发明内容
本公开实施例提供了一种平板探测装置，包括：
平板探测器，所述平板探测器包括多个感光电路；
多个采样电路，一列所述感光电路与一个所述采样电路电连接，所述采样电路包括采样放大电路和补偿电路；
其中，所述感光电路被配置为在探测阶段中，接收光信号并将接收的所述光信号转换为探测信号，以及在扫描信号端的第一信号的控制下将所述探测信号提供给所述采样放大电路，在复位阶段中，在所述扫描信号端的第二信号的控制下接收所述采样放大电路输出的复位信号和所述补偿电路输出的 补偿信号进行复位；
所述采样放大电路被配置为在所述探测阶段中，将接收的所述探测信号处理后提供给采样输出端，在所述复位阶段中，向所述感光电路输出复位信号；
所述补偿电路被配置为在所述复位阶段中，向所述感光电路输出补偿信号。
可选地，所述感光电路包括：光电二极管、存储电容和控制晶体管；
其中，所述光电二极管的第一端与偏置电压端电连接，所述光电二极管的第二端与所述控制晶体管的第一端电连接；
所述存储电容的第一端与所述偏置电压端电连接，所述存储电容的第二端与所述光电二极管的第二端电连接；
所述控制晶体管的控制端与所述扫描信号端电连接，所述控制晶体管的第二端与所述采样放大电路电连接。
可选地，所述补偿电路包括第一补偿开关；所述第一补偿开关的第一端与补偿信号端电连接，所述第一补偿开关的控制端与触发信号端电连接，所述第一补偿开关的第二端与所述控制晶体管的第二端电连接。
可选地，所述第一补偿开关包括第一晶体管；所述第一晶体管的第一端与所述补偿信号端电连接，所述第一晶体管的控制端与所述触发信号端电连接，所述第一晶体管的第二端与所述控制晶体管的第二端电连接。
可选地，所述补偿电路还包括第二补偿开关；所述第二补偿开关的第一端与所述补偿信号端电连接，所述第二补偿开关的控制端与所述触发信号端电连接，所述第二补偿开关的第二端与所述控制晶体管的第二端电连接。
可选地，所述第二补偿开关包括第二晶体管；所述第二晶体管的第一端与所述补偿信号端电连接，所述第二晶体管的控制端与所述触发信号端电连接，所述第二晶体管的第二端与所述控制晶体管的第二端电连接；所述第二晶体管与所述第一晶体管的类型不同。
可选地，所述第二晶体管为N型场效应晶体管，所述第一晶体管为P型 场效应晶体管。
可选地，所述复位信号和所述补偿信号均为固定电压信号，且所述复位信号和所述补偿信号的电压相同。
可选地，所述采样放大电路包括电荷灵敏前置放大器和数据选择器；
其中，所述电荷灵敏前置放大器的第一输入端与所述感光电路电连接，所述电荷灵敏前置放大器的第二输入端与所述数据选择器的输出端电连接；
所述数据选择器的第一输入端与复位信号端电连接，所述数据选择器的第二输入端与第一参考电压端电连接。
可选地，所述电荷灵敏前置放大器包括运算放大器、可变电容和复位开关；
其中，所述运算放大器的反相输入端与所述控制晶体管的第二端电连接，所述运算放大器的同相输入端与所述数据选择器的输出端电连接，所述运算放大器的输出端与所述采样输出端电连接；
所述可变电容的第一端与所述运算放大器的反相输入端电连接，所述可变电容的第二端与所述运算放大器的输出端电连接；
所述复位开关的第一端与所述运算放大器的反相输入端电连接，所述复位开关的第二端与所述运算放大器的输出端电连接。
可选地，所述复位信号端和所述补偿信号端为同一信号端。
本公开实施例提供了一种平板探测系统，包括：本公开实施例提供的上述平板探测装置。
附图说明
图1为本公开实施例提供的相关技术中一种平板探测装置及其采样电路的结构示意图；
图2为本公开实施例提供的一种平板探测装置的示意图；
图3为本公开实施例提供的一种平板探测装置的结构示意图；
图4为本公开实施例提供的又一种平板探测装置的结构示意图；
图5为本公开实施例提供的一种平板探测装置的信号时序图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“电连接”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
如图1所示，为相关技术中一种平板探测器及其采样电路，包括：多个光电二极管PD、多个电容Cst、多个控制开关K、数据选择器、运算放大器、可变电容Cf以及复位开关T；其中一个光电二极管PD、一个电容Cst和一个控制开关K组成感光电路，运算放大器、可变电容Cf以及复位开关T组成电荷灵敏前置放大器。平板探测器在待机状态中感光电路中电容Cst中会存储电荷，因此平板探测器在采图之前会不断打开各行感光电路中的控制开关K，从而将感光电路中电容Cst中存储的电荷清空，进而使平板探测器确保根据各感光电路采集电信号生成的图像中各像素点的灰度值的准确性。然而，由于 电荷灵敏前置放大器的带负载能力不足，使得控制开关K导通时电荷灵敏前置放大器对于感光电路中存储电容Cst的充电能力不足，导致各行感光电路中电容Cst的电位被拉低。对于同样的光信号，电容Cst的初始电位越低，其对应生成的图像的灰度值就越高。具体地，从上到下各行感光电路中电容Cst的初始电位会越来越低，进而导致平板探测器采图生成的图像呈现上暗下亮的情况。
本公开实施例提供的一种平板探测装置，如图2-图4所示，包括平板探测器100和多个采样电路200；
平板探测器100包括多个感光电路110；其中，一列感光电路110与一个采样电路200电连接；
采样电路200包括补偿电路210和采样放大电路220；
感光电路110被配置为在探测阶段中，接收光信号并将接收的光信号转换为探测信号，以及在扫描信号端G1～Gn的第一信号的控制下将探测信号提供给采样放大电路220；在复位阶段中，在扫描信号端G1～Gn的第二信号的控制下接收采样放大电路220输出的复位信号和补偿电路210输出的补偿信号进行复位；
采样放大电路220被配置为在探测阶段中，将接收的探测信号处理后提供给采样输出端O；在复位阶段中，向感光电路110输出复位信号；
补偿电路210被配置为在复位阶段中，向感光电路110输出补偿信号。
本公开实施例提供的平板探测装置，设置有补偿电路，使感光电路在复位阶段中不仅接收采样放大电路输出的复位信号，还可以接收补偿电路输出的补偿信号，从而对平板探测器中各感光电路均充分复位，进而可以使各感光电路在探测阶段中接收光信号之前的初始电位均相同，改善由于各感光电路的初始电位不同导致平板探测装置生成的图像均一性不良的问题。
在具体实施时，在本公开实施例中，由于感光电路110在复位阶段中接收采样放大电路220输出的复位信号和补偿电路210输出的补偿信号进行复位，则可以将复位信号和补偿信号均设置为固定电压信号，且复位信号和补 偿信号的电压相同。
在具体实施时，对于平板探测装置所需要设置的其他结构，例如与采样输出端O电连接用于根据探测信号生成图像的图像处理器，对各信号端提供信号的驱动器，其具体实施方式可以与相关技术中相同，在此不做赘述。
在具体实施时，在本公开实施例中，如图3与图4所示，感光电路110可以包括：光电二极管PD、存储电容Cst和控制晶体管K；
其中，光电二极管PD的第一端与偏置电压端VB电连接，光电二极管PD的第二端与控制晶体管K的第一端电连接；
存储电容Cst的第一端与偏置电压端VB电连接，存储电容Cst的第二端与光电二极管PD的第二端电连接；
控制晶体管K的控制端与扫描信号端G1～Gn电连接，控制晶体管K的第二端与采样放大电路220电连接。
在具体实施时，在本公开实施例中，如图3与图4所示，补偿电路210可以包括第一补偿开关；第一补偿开关的第一端与补偿信号端VC电连接，第一补偿开关的控制端与触发信号端STV电连接，第一补偿开关的第二端与控制晶体管K的第二端电连接。具体地，第一补偿开关可以包括第一晶体管TN；第一晶体管TN的第一端与补偿信号端VC电连接，第一晶体管TN的控制端与触发信号端STV电连接，第一晶体管TN的第二端与控制晶体管K的第二端电连接。
在具体实施时，在本公开实施例中，如图3与图4所示，补偿电路210还可以包括第二补偿开关；第二补偿开关的第一端与补偿信号端VC电连接，第二补偿开关的控制端与触发信号端STV电连接，第二补偿开关的第二端与控制晶体管K的第二端电连接。第二补偿开关可以包括第二晶体管TP；第二晶体管TP的第一端与补偿信号端VC电连接，第二晶体管TP的控制端与触发信号端STV电连接，第二晶体管TP的第二端与控制晶体管K的第二端电连接。
在具体实施时，在复位阶段中，对各扫描信号端G1～Gn加载第一信号， 以使各行感光电路110中的控制晶体管K导通，以使采样放大电路220输出的复位信号通过控制晶体管K被输入到存储电容Cst。并且，通过对触发信号端STV加载导通信号，以使补偿电路210中至少一个补偿开关导通，以使补偿信号通过补偿开关和控制晶体管K被输入到存储电容Cst，从而清空存储电容Cst中的电荷，并使各行感光电路110中的存储电容Cst的电位均相同。
在具体实施时，在本公开实施例中，对于补偿电路210设置的两个补偿开关，可以使第二晶体管TP与第一晶体管TN的类型不同，例如可以使第一晶体管TN为N型场效应晶体管，第二晶体管TP为P型场效应晶体管，或者相反。从而可以使补偿电路210将补偿信号端VC的补偿信号充分地提供给感光电路110。
作为一个示例，如图3与图4所示，第一晶体管TN可以为N沟道增强型场效应管，第二晶体管TP可以为P沟道增强型场效应管，并且第一晶体管TN的衬底与接地端Gnd电连接，第二晶体管TP的衬底与电源电压端VDD电连接。在具体实施时，可以通过控制对触发信号端STV加载的信号来控制第一晶体管TN和第二晶体管TP的导通与截止。具体地，当触发信号端STV的信号的电压小于电源电压端的信号的电压VDD时，第一晶体管TN和第二晶体管TP输入与输出间都呈高阻态，补偿电路210截止。当触发信号端STV的信号的电压大于电源电压端的信号的电压VDD时，则第一晶体管TN和第二晶体管TP至少会有一个导通，当补偿信号端VC的信号的电压V_com、电源电压端的信号的电压VDD以及第一晶体管TN的阈值电压VN满足0<V_com<VDD-VN时，第一晶体管TN导通；当补偿信号端VC的信号的电压V_com、电源电压端的信号的电压VDD以及第二晶体管TP的阈值电压VP满足|VP|<V_com<VDD时，第二晶体管TP导通。
具体地，在本公开实施例提供的平板探测装置中，上述控制晶体管K可以是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Scmiconductor)，在此不作限定，上述第一晶体管和第二晶体管可以为金属氧化物半导体场效应管。并且根据上述各晶体管 的类型不同以及各晶体管的控制端的信号的不同，将各晶体管的控制端作为栅极，并可以将上述晶体管的第一端作为源极，第二端作为漏极，或者将晶体管的第一端作为漏极，第二端作为源极，在此不作具体区分。
在具体实施时，在本公开实施例中，如图3所示，采样放大电路220可以包括电荷灵敏前置放大器221和数据选择器222；
其中，电荷灵敏前置放大器221的第一输入端与感光电路110电连接，电荷灵敏前置放大器221的第二输入端与数据选择器222的输出端电连接；
数据选择器222的第一输入端与复位信号端REF电连接，数据选择器222的第二输入端与第一参考电压端VS电连接。
具体地，电荷灵敏前置放大器21可以包括运算放大器、可变电容Cf和复位开关T；其中，运算放大器的反相输入端与控制晶体管K的第二端电连接，运算放大器的同相输入端与数据选择器222的输出端电连接，运算放大器的输出端与采样输出端O电连接；可变电容Cf的第一端与运算放大器的反相输入端电连接，可变电容Cf的第二端与运算放大器的输出端电连接；复位开关T的第一端与运算放大器的反相输入端电连接，复位开关T的第二端与运算放大器的输出端电连接。
在具体实施时，由于复位信号和补偿信号均为固定电压信号，且复位信号和补偿信号的电压相同，如图4所示，则可以将复位信号端REF与补偿信号端VC设置为同一端。
在具体实施时，数据选择器222还可以具有更多输入端，例如第三输入端、第四输入端，这些输入端分别与更多的参考电压端电连接，例如第三输入端与第二参考电压端电连接，第四输入端与第三参考电压端电连接。并且，不同的参考电压端的电压不同，可以使数据选择器具有更多的可供选择的外部接入电压。
基于同一发明构思，本公开实施例还提供了一种平板探测器系统，包括上述任一种平板探测装置。
下面结合具体实施例，对本公开进行详细说明。需要说明的是，本实施 例中是为了更好的解释本公开，但不限制本公开。下面以图2所示的平板探测装置和图3所示的感光电路与采样电路为例，结合图5所示的信号时序图对本公开实施例提供的上述平板探测装置的工作过程进行描述，下述描述中以1表示高电平，0表示低电平。需要说明的是，1和0是逻辑电平，其仅是为了更好的解释本公开实施例的具体工作过程，而不是具体的电压值。需要说明的是，图5中G1～Gn表示第一行感光电路对应的扫描信号端的信号至第n行感光电路对应的扫描信号端的信号。具体地，选取第一行感光电路对应的复位第一阶段t1和复位第二阶段t2进行说明。
在复位第一阶段t1之前，平板探测器处于待机阶段，其感光电路中的存储电容Cst会存储负电荷。数据选择器222将复位信号端REF与运算放大器的同相输入端导通，则运算放大器的反相输入端的电压为接近复位信号端REF的复位信号电压。
在复位第一阶段t1，G1＝1，STV＝0。
G1＝1，则控制晶体管K导通。STV＝0，即触发信号端STV的电压小于电源电压端的电压VDD，第一晶体管TN和第二晶体管TP均截止。导通的控制晶体管K将存储电容Cst存储的负电荷提供至可变电容Cf的第一端，使可变电容Cf的第一端的电位降低，导致可变电容Cf两端存在电压差。数据选择器222将复位电压端REF与运算放大器的同相输入端导通，根据运算放大器特性，运算放大器的反相输入端的电压会被拉升恢复至接近复位信号端REF的电压，即对感光电路110提供复位信号，从而对存储电容Cst进行复位。
在复位第二阶段t2，G1＝1，STV＝1。
G1＝1，则控制晶体管K保持导通。STV＝1，即触发信号端STV的电压大于电源电压端的电压VDD，第一晶体管TN和第二晶体管TP至少一个导通，复位电压端REF的电压通过第一晶体管TN和第二晶体管TP至少其中之一和控制晶体管K被提供给存储电容Cst，以对存储电容Cst进一步复位。
对于第二行感光电路，其复位第一阶段t3的工作过程可以与第一行感光电路对应的复位第一阶段t1的工作过程基本相同，其复位第二阶段t4的工作 过程可以与第一行感光电路对应的复位第二阶段t2的工作过程基本相同。对于第三行感光电路至第n行感光电路同理，其具体工作过程在此不做赘述。
本公开实施例提供的一种平板探测装置及系统，包括平板探测器和多个采样电路，平板探测器包括多个感光电路；其中，一列感光电路与一个采样电路电连接；采样电路包括补偿电路和采样放大电路。通过设置有补偿电路，使感光电路在复位阶段中不仅接收采样放大电路输出的复位信号还可以接收补偿电路输出的补偿信号，从而对平板探测器中各感光电路均充分复位，进而可以使各感光电路在探测阶段中接收光信号之前的初始电位均相同，改善由于各感光电路的初始电位不同导致平板探测装置生成的图像均一性不良的问题。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (12)

  1. 一种平板探测装置，其中，包括：
    平板探测器，所述平板探测器包括多个感光电路；
    多个采样电路，一列所述感光电路与一个所述采样电路电连接，所述采样电路包括采样放大电路和补偿电路；
    其中，所述感光电路被配置为在探测阶段中，接收光信号并将接收的所述光信号转换为探测信号，以及在扫描信号端的第一信号的控制下将所述探测信号提供给所述采样放大电路，在复位阶段中，在所述扫描信号端的第二信号的控制下接收所述采样放大电路输出的复位信号和所述补偿电路输出的补偿信号进行复位；
    所述采样放大电路被配置为在所述探测阶段中，将接收的所述探测信号处理后提供给采样输出端，在所述复位阶段中，向所述感光电路输出复位信号；
    所述补偿电路被配置为在所述复位阶段中，向所述感光电路输出补偿信号。
  2. 如权利要求1所述的平板探测装置，其中，所述感光电路包括：光电二极管、存储电容和控制晶体管；
    其中，所述光电二极管的第一端与偏置电压端电连接，所述光电二极管的第二端与所述控制晶体管的第一端电连接；
    所述存储电容的第一端与所述偏置电压端电连接，所述存储电容的第二端与所述光电二极管的第二端电连接；
    所述控制晶体管的控制端与所述扫描信号端电连接，所述控制晶体管的第二端与所述采样放大电路电连接。
  3. 如权利要求2所述的平板探测装置，其中，所述补偿电路包括第一补偿开关；所述第一补偿开关的第一端与补偿信号端电连接，所述第一补偿开关的控制端与触发信号端电连接，所述第一补偿开关的第二端与所述控制晶 体管的第二端电连接。
  4. 如权利要求3所述的平板探测装置，其中，所述第一补偿开关包括第一晶体管；
    所述第一晶体管的第一端与所述补偿信号端电连接，所述第一晶体管的控制端与所述触发信号端电连接，所述第一晶体管的第二端与所述控制晶体管的第二端电连接。
  5. 如权利要求3所述的平板探测装置，其中，所述补偿电路还包括第二补偿开关；所述第二补偿开关的第一端与所述补偿信号端电连接，所述第二补偿开关的控制端与所述触发信号端电连接，所述第二补偿开关的第二端与所述控制晶体管的第二端电连接。
  6. 如权利要求5所述的平板探测装置，其中，所述第二补偿开关包括第二晶体管；
    所述第二晶体管的第一端与所述补偿信号端电连接，所述第二晶体管的控制端与所述触发信号端电连接，所述第二晶体管的第二端与所述控制晶体管的第二端电连接；所述第二晶体管与所述第一晶体管的类型不同。
  7. 如权利要求6所述的平板探测装置，其中，所述第二晶体管为N型场效应晶体管，所述第一晶体管为P型场效应晶体管。
  8. 如权利要求1-7任一项所述的平板探测装置，其中，所述复位信号和所述补偿信号均为固定电压信号，且所述复位信号和所述补偿信号的电压相同。
  9. 如权利要求3-7任一项所述的平板探测装置，其中，所述采样放大电路包括电荷灵敏前置放大器和数据选择器；
    所述电荷灵敏前置放大器的第一输入端与所述感光电路电连接，所述电荷灵敏前置放大器的第二输入端与所述数据选择器的输出端电连接；
    所述数据选择器的第一输入端与复位信号端电连接，所述数据选择器的第二输入端与第一参考电压端电连接。
  10. 如权利要求9所述的平板探测装置，其中，所述电荷灵敏前置放大 器包括运算放大器、可变电容和复位开关；
    所述运算放大器的反相输入端与所述控制晶体管的第二端电连接，所述运算放大器的同相输入端与所述数据选择器的输出端电连接，所述运算放大器的输出端与所述采样输出端电连接；
    所述可变电容的第一端与所述运算放大器的反相输入端电连接，所述可变电容的第二端与所述运算放大器的输出端电连接；
    所述复位开关的第一端与所述运算放大器的反相输入端电连接，所述复位开关的第二端与所述运算放大器的输出端电连接。
  11. 如权利要求9所述的平板探测装置，其中，所述复位信号端和所述补偿信号端为同一信号端。
  12. 一种平板探测器系统，其中，包括如权利要求1-11任一项所述的平板探测装置。
PCT/CN2021/095708 2020-06-16 2021-05-25 平板探测装置及系统 WO2021254105A1 (zh)

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