WO2021244497A1 - 一种支持不等调制的交织和子载波映射方法以及相关装置 - Google Patents

一种支持不等调制的交织和子载波映射方法以及相关装置 Download PDF

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Publication number
WO2021244497A1
WO2021244497A1 PCT/CN2021/097485 CN2021097485W WO2021244497A1 WO 2021244497 A1 WO2021244497 A1 WO 2021244497A1 CN 2021097485 W CN2021097485 W CN 2021097485W WO 2021244497 A1 WO2021244497 A1 WO 2021244497A1
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interleaver
information bits
unit
columns
rows
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PCT/CN2021/097485
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English (en)
French (fr)
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狐梦实
于健
淦明
林伟
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华为技术有限公司
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Priority to EP21817857.2A priority Critical patent/EP4152710A4/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0042—Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0008—Modulated-carrier systems arrangements for allowing a transmitter or receiver to use more than one type of modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/2604—Multiresolution systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H04L27/2627—Modulators
    • H04L27/2634—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H04L1/0058—Block-coded modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes

Definitions

  • This application relates to the field of communication technology, and in particular to a method and related devices for interleaving and subcarrier mapping that support unequal modulation.
  • an interleaver In a wireless local area network (Wireless Local Area Network, WLAN) communication system, if the BCC coding method is adopted, an interleaver will be used to interleave the information bits of the RU. At this stage, an interleaver can only support RUs that handle one modulation mode. In order to process the information bits of multiple RUs with different MCSs, the information bits of each RU in the multiple RUs will be interleaved using a separate interleaver. How to improve the information processing capability of the interleaver is an urgent problem to be solved by those skilled in the art.
  • This application provides an interleaving and sub-carrier mapping method and related devices that support unequal modulation, which can interleave information bits of multiple RUs with different modulation and coding strategies through a unified interleaver; or, through a unified sub-carrier
  • the carrier mapper maps the subcarriers of multiple RUs with different modulation and coding strategies.
  • this application provides an interleaver that supports unequal modulation.
  • the interleaver includes a first interleaver and a second interleaver.
  • the order of the information bits on the sub-carriers of the RU and the sub-carriers of the second RU, the modulation mode of the first RU is different from the modulation mode of the second RU, wherein: the first interleaver is used for row-by-row Input information bits, the number of columns of the first interleaver is M 1 + M 2 , and the number of rows of the first interleaver is the maximum of N 1 and N 2 ; wherein, the N 1 is determined by the the number of rows of the first RU number of subcarriers determined, the number of columns M 1 is determined by the number of sub-carriers of a first RU, the N 2 is determined by the number of subcarriers of the second row RU The M 2 is the number of columns determined by the number of subcarriers of the second RU, the N 1
  • the first interleaver is used to input the information bits of the first unit and the information bits of the second unit in rows, wherein: the effective information bits of the first unit are The number of columns is M 1 + M 2 , the number of rows of valid information bits in the first unit is the minimum of N 1 and N 2 , and the valid information bits are bits that contain information;
  • the number of columns of valid information bits of the second unit is the M 1 or the M 2 , and the number of rows of valid information bits of the second unit is the absolute value of the difference between the N 1 and the N 2;
  • the first row of information bits of the second unit is the N 2 +1th row of the first interleaver, and the first column of information bits of the second unit is the first column of the interleaver; or,
  • the first row of the information bits of the second unit is the N 1 +1th row of the first interleaver, and the first column of the information bits of the second unit is the M 1 +th row of the first interleaver.
  • the second interleaver is used to perform interleaving mapping between the information bits of the third unit and the information bits of the fourth unit.
  • the second interleaver uses The effective information bits of the third unit are interleaved and mapped according to the modulation order of the first RU; the number of columns of effective information bits of the third unit is the M 1 , and the effective information bits of the third unit are The number of rows of information bits is the N 1 ; the effective information bits are the bits containing the amount of information; the second interleaver is used to perform the processing of the fourth unit according to the modulation order of the second RU
  • the effective information bits are interleaved and mapped; the number of columns of effective information bits of the fourth unit is the M 2 , and the number of rows of effective information bits of the fourth unit is the N 2 ; the information of the fourth unit
  • the first column of bits is the M 1 +1th column of the second interleaver.
  • the second interleaver is connected to a bit parser, and the second interleaver is
  • the valid information bits output in columns are processed by the bit parser and carried on the subcarriers of the first RU and the subcarriers of the second RU, and the valid information bits are bits that contain information.
  • the interleaver further includes a third interleaver, and the third interleaver
  • the second interleaver and the bit parser are connected: the third interleaver is configured to receive valid information bits output by the second interleaver in columns, and divide the at least two spatial data streams
  • the spatial data stream other than the first spatial data stream is rotated in the frequency domain, and the first spatial data stream is one of the at least two spatial data streams;
  • the effective information bit contains the amount of information
  • the effective information bits output by the third interleaver in columns are processed by the bit parser and carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • first interleaver, the second interleaver, and the third interleaver may include a hardware structure and a software module, and the foregoing functions are implemented in the form of a hardware structure, a software module, or a hardware structure plus a software module.
  • One of the above-mentioned functions can be executed in a hardware structure, a software module, or a hardware structure plus a software module.
  • this application provides an interleaver that supports unequal modulation.
  • the interleaver includes a first interleaver and a second interleaver.
  • the order of the information bits on the sub-carriers of the RU and the sub-carriers of the second RU, the modulation mode of the first RU is different from the modulation mode of the second RU, wherein: the first interleaver is used for row-by-row Input information bits, the number of rows of the first interleaver is i ⁇ (n+m), and the number of columns of the first interleaver is j/i; wherein, the i is a positive integer, and the n is the first The modulation order of the RU, where m is the modulation order of the second RU, and j is the maximum value of the number of subcarriers of the first RU and the number of subcarriers of the second RU; the second The interleaver is configured to receive information bits output by the first interleaver in columns, and
  • the first interleaver is configured to input the i information bits of the first unit and the i information bits of the second unit in rows, wherein: the The number of columns of valid information bits of the first unit is less than or equal to the number of columns of the first interleaver, and the total number of rows of valid information bits of the i first units is n ⁇ i; the valid information bits are Bits containing information; the number of columns of valid information bits of the second unit is less than or equal to the number of columns of the first interleaver, and the total number of rows of valid information bits of the i second units is m ⁇ i; the first row of information bits of the a-th first unit, and the corresponding row number of the first interleaver is: (a-1) ⁇ n+(a-1) ⁇ m+1, where , Said a is a positive integer less than or equal to i; the first row of information bits of the b-th second unit, and the corresponding number of rows of the
  • the second interleaver is configured to perform interleaving mapping on the information bits of the i third units and the information bits of the i fourth units, specifically:
  • the second interleaver is configured to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU; the number of columns of effective information bits of the third unit is less than or equal to the The number of columns of the first interleaver, the total number of rows of valid information bits of the i third units is n ⁇ i; the valid information bits are bits containing information;
  • the second interleaver uses Performing interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU; the number of columns of effective information bits of the fourth unit is less than or equal to the number of columns of the first interleaver,
  • the total number of rows of valid information bits of the i fourth units is m ⁇ i; the first row of information bits of the c-th third unit corresponds to the number
  • the second interleaver is connected to a bit parser; the second interleaver is After the effective information bits output in columns are processed by the bit parser, they are sequentially output as the first information bits in the unit of n bits and the second information bits in the unit of m bits; An information bit is an information bit carried on a subcarrier of the first RU, and the second information bit is an information bit carried on a subcarrier of the second RU.
  • the interleaver further includes a third interleaver, and the third interleaver
  • the second interleaver is used to connect the second interleaver and the bit parser
  • the third interleaver is used to receive valid information bits output by the second interleaver in columns, and divide the at least two spatial data streams
  • the spatial data stream other than the first spatial data stream is rotated in the frequency domain, and the first spatial data stream is one of the at least two spatial data streams
  • the third interleaver outputs the data in columns
  • the valid information bits are processed by the bit parser, they are sequentially output as the first information bits in the unit of n bits and the second information bits in the unit of m bits
  • the first information bits are carried in The information bits on the subcarriers of the first RU
  • the second information bits are information bits carried on the subcarriers of the second RU.
  • first interleaver, the second interleaver, and the third interleaver may include a hardware structure and a software module, and the foregoing functions are implemented in the form of a hardware structure, a software module, or a hardware structure plus a software module.
  • One of the above-mentioned functions can be executed in a hardware structure, a software module, or a hardware structure plus a software module.
  • the present application provides a subcarrier mapper that supports unequal modulation.
  • the subcarrier mapper is used to map the subcarriers of the first RU, the second RU, and the third RU.
  • the first RU The modulation mode of is the same as the modulation mode of the second RU, the modulation mode of the first RU is different from the modulation mode of the third RU, and the subcarrier mapper includes a first unit and a second unit, wherein: The first unit is configured to map the sub-carriers of the first RU and the sub-carriers of the second RU according to the modulation mode of the first RU; the second unit is configured to map the sub-carriers of the second RU according to the first RU; The three-RU modulation scheme maps the sub-carriers of the third RU.
  • the sub-carrier mapper may include a hardware structure and a software module, and the above functions are implemented in the form of a hardware structure, a software module, or a hardware structure plus a software module.
  • One of the above-mentioned functions can be executed in a hardware structure, a software module, or a hardware structure plus a software module.
  • the present application provides an interleaving method that supports unequal modulation.
  • the method is applied to an interleaver.
  • the interleaver includes a first interleaver and a second interleaver.
  • the interleaver is used to perform unequal modulation on information bits. Interleaving to determine the order of information bits carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • the modulation mode of the first RU is different from the modulation mode of the second RU, and the method includes:
  • the first interleaver inputs information bits in rows, the number of columns of the first interleaver is M 1 + M 2 , and the number of rows of the first interleaver is the maximum value of N 1 and N 2; wherein, The N 1 is the number of rows determined by the number of subcarriers of the first RU, the M 1 is the number of columns determined by the number of subcarriers of the first RU, and the N 2 is the number of subcarriers determined by the second RU.
  • the number of rows determined by the number, the M 2 is the number of columns determined by the number of subcarriers of the second RU, and the N 1 , the M 1 , the N 2 and the M 2 are positive integers;
  • the second interleaver receives the information bits output by the first interleaver in columns, and performs interleaving mapping on the information bits.
  • the first interleaver inputting information bits in rows includes: the first interleaver inputting information bits in the first unit and information bits in the second unit in rows; wherein , The number of columns of effective information bits of the first unit is M 1 + M 2 , the number of rows of effective information bits of the first unit is the minimum of the N 1 and the N 2 , and the effective Information bits are bits that contain information; the number of columns of valid information bits of the second unit is the M 1 or the M 2 , and the number of rows of valid information bits of the second unit is the N 1 The absolute value of the difference with the N 2 ; the first row of the information bits of the second unit is the N 2 +1 row of the first interleaver, and the first column of the second unit is the interleaving Or, the first row of information bits of the second unit is the N 1 +1th row of the first interleaver, and the first column of the second unit is the first interleaver Column M 1 +1.
  • the second interleaver performs interleaving mapping on the information bits, including: the second interleaver performs interleaving mapping on the information bits of the third unit and the information bits of the fourth unit Interleaving mapping; wherein the second interleaver performing interleaving mapping of the information bits of the third unit includes: the second interleaver performing the effective information bits of the third unit according to the modulation order of the first RU Interleaving mapping; the number of columns of effective information bits of the third unit is the M 1 , the number of rows of effective information bits of the third unit is the N 1 ; the effective information bits are those that contain the amount of information Bit; the second interleaver performing interleaving mapping on the information bits of the fourth unit includes: the second interleaver performing interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU; The number of columns of valid information bits of the fourth unit is the M 2 , the number of rows of valid information bits of
  • the valid information bits output by the second interleaver in columns are processed by bit analysis and carried On the sub-carriers of the first RU and the sub-carriers of the second RU, the effective information bit is a bit containing an amount of information.
  • the interleaver further includes a third interleaver
  • the method further includes:
  • the third interleaver receives the effective information bits output by the second interleaver in columns, and performs frequency domain rotation on the spatial data streams other than the first spatial data stream among the at least two spatial data streams, so
  • the first spatial data stream is one of the at least two spatial data streams;
  • the valid information bits are bits that contain information;
  • the valid information bits output by the third interleaver in columns pass through the bits After the analysis process, it is carried on the subcarrier of the first RU and the subcarrier of the second RU.
  • the present application provides an interleaving method that supports unequal modulation.
  • the method is applied to an interleaver.
  • the interleaver includes a first interleaver and a second interleaver.
  • the interleaver is used to perform unequal modulation on information bits. Interleaving to determine the order of information bits carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • the modulation mode of the first RU is different from the modulation mode of the second RU, and the method includes:
  • the first interleaver inputs information bits in rows, the number of rows of the first interleaver is i ⁇ (n+m), and the number of columns of the first interleaver is j/i; where i is A positive integer, the n is the modulation order of the first RU, the m is the modulation order of the second RU, and the j is the number of subcarriers of the first RU and the number of subcarriers of the second RU
  • the maximum value in; the second interleaver receives the information bits output by the first interleaver in columns, and performs interleaving mapping on the information bits.
  • the first interleaver inputting information bits in rows includes: the first interleaver inputting information bits of the i first units by rows and the i information bits of the second unit; wherein the number of columns of valid information bits of the first unit is less than or equal to the number of columns of the first interleaver, and the number of valid information bits of the i first unit is The total number of rows is n ⁇ i; the effective information bits are bits that contain information; the number of columns of effective information bits of the second unit is less than or equal to the number of columns of the first interleaver, and the i The total number of rows of effective information bits of the second unit is m ⁇ i; the number of rows of the first interleaver corresponding to the first row of information bits of the a-th first unit is: (a-1) ⁇ n+(a-1) ⁇ m+1, where a is a positive integer less than or equal to i; the first row of information bits of the b-th second unit corresponds
  • the second interleaver performs interleaving mapping on the information bits, including: the second interleaver performs the interleaving mapping of the information bits of the i third units and the Performing interleaving mapping on the information bits of the i fourth units; wherein, performing the interleaving mapping on the information bits of the i third units by the second interleaver includes: the second interleaver according to the information bits of the first RU The modulation order performs interleaving mapping on the effective information bits of the third unit; the number of columns of effective information bits of the third unit is less than or equal to the number of columns of the first interleaver, and the i third unit The total number of rows of effective information bits of a unit is n ⁇ i; the effective information bits are bits that contain information; the second interleaver performs interleaving mapping on the information bits of the i fourth units, including: The second interleaver performs interleaving mapping on the effective information bits of the i fourth units, including: The second interleaving
  • the valid information bits output by the second interleaver in columns are processed by bit analysis , Sequentially outputting the first information bit in the unit of n bits and the second information bit in the unit of m bits; wherein the first information bit is carried on the subcarrier of the first RU
  • the second information bit is an information bit carried on a subcarrier of the second RU.
  • the method further includes: the third interleaver receives the first The two interleavers output valid information bits in columns, and perform frequency domain rotation on the spatial data streams other than the first spatial data stream among the at least two spatial data streams, and the first spatial data stream is the One of the at least two spatial data streams; the effective information bits output by the third interleaver in columns are processed by a bit parser, and then sequentially output as the first information bits and all the information bits in the unit of n bits.
  • the m bits are the second information bits in units; the first information bits are information bits carried on the subcarriers of the first RU, and the second information bits are subcarriers carried on the second RU. Information bits on the carrier.
  • the present application provides a subcarrier mapping method that supports unequal modulation.
  • the method is applied to the subcarrier mapper.
  • the subcarrier mapper includes a first unit and a second unit.
  • the carrier mapper is used to map the subcarriers of the first RU, the second RU, and the third RU.
  • the modulation mode of the first RU is the same as the modulation mode of the second RU, and the modulation mode of the first RU is the same as that of the second RU.
  • the modulation mode of the third RU is different, and the method includes: the first unit maps the subcarriers of the first RU and the subcarriers of the second RU according to the modulation mode of the first RU; The second unit maps the subcarriers of the third RU according to the modulation mode of the third RU.
  • the present application provides a computer-readable storage medium for storing instructions.
  • the fourth aspect or any one of the fourth aspect is possible
  • the method described in the implementation manner is implemented, or the method described in the fifth aspect or any possible implementation manner of the fifth aspect is implemented, or the method described in the sixth aspect or the sixth aspect is made possible
  • the described method is implemented.
  • the present application provides another computer-readable storage medium, which is used to store instructions.
  • the fourth aspect or any one of the fourth aspects is The method described in the possible implementation manner is implemented, or the method described in the fifth aspect or any possible implementation manner of the fifth aspect is implemented, or the method described in the sixth aspect or the sixth aspect is implemented. Possible implementations The described method is implemented.
  • the present application provides a chip system that includes at least one processor and an interface, and is used to support the interleaver to implement the functions involved in the fifth or sixth aspect, for example, to receive or process the aforementioned methods At least one of the data and information involved in.
  • the chip system further includes a memory, and the memory is used to store necessary program instructions and data for the interleaver.
  • the chip system can be composed of chips, and can also include chips and other discrete devices.
  • the present application provides another chip system.
  • the chip system includes at least one processor and an interface for supporting the subcarrier mapper to implement the functions involved in the seventh aspect, for example, receiving or processing At least one of the data and information involved.
  • the chip system further includes a memory, and the memory is used to store the necessary program instructions and data of the sub-carrier mapper.
  • the chip system can be composed of chips, or include chips and other discrete devices.
  • the information bits of multiple RUs with different modulation and coding strategies can be interleaved through a unified interleaver; or, the information bits of multiple RUs with different modulation and coding strategies can be interleaved through a unified subcarrier mapper.
  • the sub-carriers of each RU are mapped, thereby simplifying the hardware structure of the communication device and reducing the hardware cost.
  • FIG. 1 is a schematic diagram of the architecture of a data communication system provided by an embodiment of the present application
  • 2A is a schematic diagram of subcarrier distribution and RU distribution provided by an embodiment of the present application.
  • 2B is a schematic diagram of another subcarrier distribution and RU distribution provided by an embodiment of the present application.
  • 2C is a schematic diagram of yet another subcarrier distribution and RU distribution provided by an embodiment of the present application.
  • Fig. 3 is a schematic diagram of a system for implementing BICM provided by an embodiment of the present application.
  • Figure 4 is a schematic diagram of an interleaver provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of another interleaver provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of an interleaving system provided by an embodiment of the present application.
  • Figure 7 is a schematic diagram of yet another system for implementing BICM provided by an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a first interleaver provided by an embodiment of the present application.
  • FIG. 9 is a schematic diagram of still another first interleaver provided by an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a second interleaver provided by an embodiment of the present application.
  • FIG. 11 is a schematic diagram of yet another second interleaver provided by an embodiment of the present application.
  • FIG. 12 is a schematic diagram of still another first interleaver provided by an embodiment of the present application.
  • FIG. 13 is a schematic diagram of still another first interleaver provided by an embodiment of the present application.
  • FIG. 14 is a schematic diagram of yet another second interleaver provided by an embodiment of the present application.
  • FIG. 15 is a schematic diagram of still another second interleaver provided by an embodiment of the present application.
  • Figure 16 is a schematic diagram of yet another system for implementing BICM provided by an embodiment of the present application.
  • FIG. 17 is a schematic diagram of a processing system provided by an embodiment of the present application.
  • Figure 18 is a schematic diagram of yet another system for implementing BICM provided by an embodiment of the present application.
  • FIG. 19 is a schematic diagram of an LDPC subcarrier mapper provided by an embodiment of the present application.
  • FIG. 20 is a schematic diagram of another LDPC subcarrier mapper provided by an embodiment of the present application.
  • FIG. 21 is a flowchart of an interleaving method supporting unequal modulation provided by an embodiment of the present application.
  • FIG. 22 is a flowchart of a subcarrier mapping method supporting unequal modulation provided by an embodiment of the present application.
  • the technical solution of this application can be applied to a wireless local area network (Wireless Local Area Network, WLAN) network, can be applied to the Internet of Things (IOT) network, and can also be applied to the Internet of Vehicles (Vehicle-to-X, V2X)
  • WLAN Wireless Local Area Network
  • IOT Internet of Things
  • V2X Internet of Vehicles
  • the network can also be applied to other networks, etc., and this application is not specifically limited.
  • the application scenario of this application may be a WLAN network based on the Institute of Electrical and Electronics Engineers (IEEE) 802.11be standard, or an IoT network based on the IEEE802.11be standard, or an IEEE802.
  • the 11be standard car networking network, or other networks based on the IEEE802.11be standard can also be the next-generation WLAN network based on the IEEE802.11be, or the IoT network based on the IEEE802.11be next-generation standard, or based on the IEEE802.11be
  • the next-generation standard Internet of Vehicles network, or other networks based on the IEEE802.11be next-generation standard can also be other WLAN networks with future standard protocols.
  • the data communication system provided in the embodiments of the present application includes one or more access points (access points, AP) and one or more stations (station, STA).
  • FIG. 1 is a schematic diagram of the architecture of a data communication system provided by an embodiment of the present application.
  • the data communication system includes two APs and three STAs, where the two APs are a first AP (AP1) and a second AP (AP2), and the three STAs are a first STA (STA1) and one A second STA (STA2) and a third STA (STA3).
  • the data communication system includes at least two devices, which may include more or less devices than those shown in FIG.
  • the STA involved in the embodiment of this application is a device with wireless communication function, which can refer to user equipment, access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile equipment, user terminal, Terminal, wireless communication equipment, user agent or user device.
  • the site can also be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), and a wireless communication function Handheld devices, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, terminal devices in the future 5G network or terminals in the public land mobile network (PLMN) that will evolve in the future Devices, etc., are not limited in the embodiment of the present application.
  • SIP session initiation protocol
  • WLL wireless local loop
  • PDA personal digital assistant
  • PLMN public land mobile network
  • the AP involved in the embodiments of this application may be an access point for terminal equipment (such as a mobile phone) to enter a wired (or wireless) network. It is mainly deployed in homes, buildings, and parks. The typical coverage radius is from tens of meters to hundreds of meters, of course. , Can also be deployed outdoors.
  • the access point is equivalent to a bridge connecting the wired network and the wireless network. The main function is to connect each wireless network client together, and then connect the wireless network to the Ethernet.
  • the access point may be a terminal device (such as a mobile phone) or a network device (such as a router) with a wireless fidelity (Wi-Fi) chip.
  • the access point can be a device that supports the 802.11be standard.
  • the access point may also be a device supporting multiple wireless local area networks (WLAN) standards of the 802.11 family such as 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a.
  • WLAN wireless local area networks
  • the access point in this application may be a high-efficiency (HE) AP or an extremely high throughput (EHT) AP, or may be an access point that is applicable to a certain generation of Wi-Fi standards in the future.
  • HE high-efficiency
  • EHT extremely high throughput
  • the resource unit (rssource unit, RU) involved in the embodiment of the present application is a basic frequency resource unit for dividing frequency resources of a wireless network.
  • RU types mainly include 26-tone RU, 52-tone RU, 106-tone RU, 242-tone RU, 484-tone RU, 996-tone RU, 2*996-tone RU, and so on.
  • tone represents sub-carrier.
  • RU can be allocated to different users for uplink and downlink transmission of data. RUs of different sizes have different bandwidths and can also carry services of different rates.
  • the subcarriers of an RU include valid (or called data) subcarriers and pilot subcarriers.
  • the data subcarrier is used to carry information bits required for communication, and the pilot subcarrier is used to carry data known by both parties in the communication, so as to perform channel estimation.
  • 26-tone RU contains 24 data subcarriers and 2 pilot subcarriers; 52-tone RU contains 48 data subcarriers and 4 pilot subcarriers.
  • FIG. 2A is a schematic diagram of subcarrier distribution and RU distribution according to an embodiment of the present application.
  • the bandwidth is 20MHz
  • the entire bandwidth can be composed of an entire 242-tone RU, or can be composed of various combinations of 26-tone RU, 52-tone RU, and 106-tone RU.
  • the bandwidth also includes some guard (Guard) subcarriers, null subcarriers (the part shown by 1tone in FIG. 2A), or direct current (DC) subcarriers.
  • Guard guard
  • null subcarriers the part shown by 1tone in FIG. 2A
  • DC direct current
  • FIG. 2B is a schematic diagram of another subcarrier distribution and RU distribution provided by an embodiment of the present application.
  • the bandwidth is 40MHz
  • the entire bandwidth is roughly equivalent to a copy of 20MHz sub-carrier distribution.
  • the entire bandwidth can consist of a whole 484-tone RU, or 26-tone RU, 52-tone RU, 106-tone RU, 242 -Various combinations of tone RU.
  • the empty subcarriers include the parts shown in 1tone and 2tone as illustrated in FIG. 2B.
  • FIG. 2C is a schematic diagram of another subcarrier distribution and RU distribution provided by an embodiment of the present application.
  • the bandwidth is 80MHz
  • the entire bandwidth is composed of 4 resource units with 242-tone as the unit.
  • the entire bandwidth can be composed of the entire 996-tone RU, or can be composed of various combinations of 26-tone RU, 52-tone RU, 106-tone RU, 242-tone RU, and 484-tone RU.
  • the empty sub-carriers include the parts shown in 1tone and 2tone as illustrated in FIG. 2C.
  • the entire bandwidth when the bandwidth is 160MHz or 80+80MHz, the entire bandwidth can be regarded as a copy of the distribution of two 80MHz subcarriers.
  • the entire bandwidth can be composed of a whole 2*996-tone RU or a 26-tone RU. , 52-tone RU, 106-tone RU, 242-tone RU, 484-tone RU, 996-tone RU.
  • the difference between 160MHz and 80+80MHz is that the former is a continuous frequency band, while the two 80MHz frequency bands of the latter can be separated.
  • OFDM Orthogonal Frequency Division Multiplexing
  • FIG. 3 is a schematic diagram of a system for implementing BICM according to an embodiment of the present application.
  • the system includes encoder, stream parser, interleaver and constellation point mapper.
  • the encoder is used to compile and convert a bit stream or data into a signal form (for example, a data stream) that can be used for communication, transmission, and storage.
  • the encoder may be a Binary Convolution Code (BCC) encoder.
  • BCC Binary Convolution Code
  • the stream parser is used to distribute the encoded information bits to different data streams. For a data stream, the stream parser can intercept the information bits according to the number of subcarriers and modulation order corresponding to the allocated RU, and then input these information bits into the interleaver.
  • the interleaver is used to interleave the information bits in the data stream to determine the order of the information bits carried on the subcarriers of the RU.
  • the constellation point mapper is used to map the information bits output by the interleaver to subcarriers according to the modulation order of the RU. For example, if the modulation order of the RU is 6, the constellation point mapper maps 6 information bits to one point of the subcarrier. After that, cyclic shift diversity processing is performed on the sub-carriers. In the above-mentioned BICM system, the channel coding gain can be increased through the cascaded interleaver, thereby effectively improving the transmission reliability of the system.
  • FIG. 3 exemplarily shows a system framework diagram. In practical applications, there may be one or more devices shown in the figure. Taking the constellation point mapper as an example, a constellation point mapper is illustrated in FIG. 3, but in practical applications, the system may include multiple constellation point mappers to implement the functions implemented by the constellation point mapper.
  • the interleaver (can be understood as a traditional interleaver) is further introduced below.
  • the interleaver is serially cascaded between the BCC encoder and the constellation point mapper, and the interleaver is used to interleave the information bits of the OFDM symbol to obtain frequency domain coding diversity.
  • the interleaver can break up the bits of the OFDM symbol to avoid bit errors that occur in a string, thereby improving the reliability of information transmission.
  • the information bits processed by the interleaver will be carried on the subcarriers of one RU.
  • the interleaver has a corresponding relationship with one RU.
  • the number of rows and columns of the interleaver can be determined by the number of subcarriers of the RU corresponding to the interleaver.
  • N COL is the number of columns of the interleaver
  • N ROW is the number of rows of the interleaver.
  • N BPSCS is the modulation order of the RU corresponding to the interleaver
  • N SD Number of data subcarriers
  • the number of rows and columns of interleavers corresponding to RUs with different numbers of subcarriers can be specified in the protocol. See Table 1. Table 1 shows the BCC interleaver parameters (BCC interleaver parameters) specified in the IEEE802.11ax standard.
  • N ROT is a parameter for the frequency rotation.
  • the interleaver may be composed of three interleavers (e.g., interleaver 1, interleaver 2, and interleaver 3) cascaded in series. Next, these three interleavers will be further introduced. It should be noted that the number of rows and the number of columns of the three interleavers are the same, and they are all determined by the number of subcarriers of the RU corresponding to the interleaver.
  • interleavers e.g., interleaver 1, interleaver 2, and interleaver 3
  • FIG. 4 is a schematic diagram of an interleaver provided by an embodiment of the present application. Specifically, the left side of FIG. 4 shows that the interleaver 1 inputs information bits in rows, and the right side of FIG. 4 shows that the interleaver 1 outputs information bits in columns.
  • the interleaver 1 is used to shuffle the order of adjacent information bits in the manner listed in the progression.
  • a dot represents an information bit.
  • the interleaver 1 is used to input information bits in order by row, that is, in the order of the first row, second row, ..., Nth ROW row, one row is filled with information bits and then the next row is filled; and then press
  • the columns output information bits in sequence, that is, in the order of the first column, the second column, ..., the Nth COL column, read the next column after reading the information bits in one column.
  • adjacent information bits can be mapped to non-adjacent OFDM subcarriers.
  • the parameters of the interleaver 1 are (N ROW , N COL ).
  • the sequence before interleaving be X (x 0 , x 1 ..., x k , ...)
  • the sequence after interleaving is W, (W 0 , W 1 ..., W i , ...), and the bits before and after interleaving are x k ( That is, the k+1 information bit in the sequence X before interleaving) and w i (i.e. the i+1 information bit in the sequence W after interleaving), the interleaving formula of interleaver 1 is as shown in formula 1-1 Show. It can be understood that the interleaving formula can indicate the position relationship of the same information bit in the sequence before and after interleaving.
  • FIG. 5 is a schematic diagram of another interleaver provided by an embodiment of the present application.
  • the left side of FIG. 5 illustrates the order of the information bits before the information bits are processed by the interleaver 2; the right side of FIG. 5 illustrates the order of the information bits after the interleaver 2 processes the information bits.
  • the interleaver 2 is used to receive the information bits output by the interleaver 1 in columns, and perform interleaving mapping on the information bits; then, if there is an interleaver 3, the interleaver 2 inputs the processed information bits to the interleaver 3, if If there is no interleaver 3, the interleaver 2 inputs the processed information bits into the constellation point mapper.
  • the meaning of interleaving mapping is to disrupt the order of each information bit in every s adjacent information bits, and the specific method may be to perform downward cyclic shift in the latter column of the two adjacent columns of information bits.
  • adjacent information bits can be alternately mapped to the least significant bits (LSB) and most significant bits (MSB) in the constellation diagram, avoiding continuous mapping of information bits to the least significant bits.
  • Interleaver 2 is used to disrupt the order of each information bit in every 3 adjacent information bits.
  • a dot represents an information bit. It should be noted that different forms of small dots are only used to distinguish different information bits in every 3 adjacent information bits, and the same form of small dots does not represent information.
  • the bits are the same. Exemplarily, in the interleaving process, three adjacent information bits can be regarded as a small group. The first three information bits in the first row are compared with the first three information bits in the second row. The bit moves down one bit and becomes the second information bit. The second information bit moves down one bit and becomes the third information bit.
  • the third information bit moves down one bit. There is a fourth bit, which becomes the first information bit. Similarly, the other information bits in the first row are also processed in the same way. In addition, the information bits in the third row have undergone a similar downward cyclic shift compared to the second row.
  • the interleaving formula of interleaver 2 is as follows: Shown in 1-2.
  • N CBPSS is the number of coded bits of each spatial data stream.
  • the interleaver 3 will be introduced. Specifically, if there are at least two spatial data streams on the RU corresponding to the interleaver, then there is an interleaver 3, which is connected to the constellation point mapper; if there is only one spatial data stream on the RU corresponding to the interleaver, then the interleaver Only interleaver 1 and interleaver 2 are included, and interleaver 2 is connected to the constellation point mapper. Spatial data streams are different data streams generated by the stream parser dividing the information bits into multiple parallel data streams.
  • the interleaver 3 is configured to perform frequency domain rotation on spatial data streams other than the first spatial data stream in the at least two spatial data streams, where the first spatial data stream is one of the at least two spatial data streams Spatial data flow.
  • the first spatial data stream may be the spatial data stream A
  • the interleaver 3 performs frequency domain rotation on the spatial data stream B.
  • the interleaving formula of interleaver 3 can be as follows As shown in formula 1-3.
  • i SS represents the serial number of the current spatial data stream
  • N CBPSS is the number of coded bits of each spatial data stream.
  • multiple RUs of the same user can be configured with different Modulation and Coding Schemes (MCS).
  • MCS Modulation and Coding Schemes
  • UEQM Unequal Modulation
  • an interleaver can only support RUs that handle one modulation mode.
  • the information bits of each RU in the multiple RUs will be interleaved using a separate interleaver.
  • FIG. 6 is a schematic diagram of an interleaving system provided by an embodiment of the present application.
  • Figure 6 includes two-stage processing units.
  • the first-stage processing unit uses a bit decomposer to interleave information bits according to different RUs of users
  • the second-stage processing unit uses multiple RU-by-RU interleavers to interleave the information bits of each RU.
  • an RU-by-RU interleaver may refer to the above introduction, and may include interleaver 1 and interleaver 2, or may include interleaver 1, interleaver 2, and interleaver 3. In this way, multiple RU interleavers (per RU interleaver) need to be designed for different RUs allocated to a single user.
  • One RU-by-RU interleaver corresponds to one RU, and one RU-by-RU interleaver supports the MCS of the corresponding RU. , That is, UEQM with multiple RUs can be realized. For a user, this method requires the user equipment to support multiple RU interleavers in parallel, and the hardware cost is relatively high.
  • the following describes an interleaver that supports unequal modulation provided in an embodiment of the present application in conjunction with the data communication system, STA, and AP introduced in the foregoing content.
  • the method can be implemented based on the data communication system shown in FIG. 1, and the communication device using the interleaver may be the STA in the data communication system shown in FIG. 1, or the AP in the data communication system shown in FIG. .
  • the information processed by the interleaver can be transmitted between STA and STA, between AP and AP, and between STA and AP.
  • the interleaver described in the embodiments of this application can be used to process the information bits at the information sending end; correspondingly, the deinterleaver corresponding to the interleaver can be used at the information receiving end to parse the information bits and decipher the information bits.
  • the interleaving process will be the inverse of the interleaving operation.
  • the communication device using the interleaver may also be a multi-link device (MLD).
  • FIG. 7 is a schematic diagram of another system for implementing BICM provided by an embodiment of the present application.
  • the system includes an encoder, a stream parser, a bit distributor, an interleaver, a bit parser, and a constellation point mapper.
  • the stream parser is used to divide the data stream.
  • the bit allocator is used to select a certain number of information bits to input into the interleaver.
  • the bit parser is used to disperse the first-rate information bits on multiple RUs and input the constellation point mapper.
  • these modules all need to consider the different modulation modes of the RU. For example, for a constellation point mapper, when the modulation order is 4, every 4 bits are mapped as a constellation point, and when the modulation order is 6, every 6 bits are mapped as a constellation point.
  • the stream parser may intercept the information bits according to the number of subcarriers and the modulation order corresponding to the multiple RUs allocated.
  • it can also be a single constellation point mapper, that is, the parallel mapping in FIG. 7 is changed to serial mapping.
  • the interleaver provided in the embodiment of the present application will be further introduced. Specifically, taking the user equipment where the interleaver is located is allocated a first RU and a second RU as an example for introduction, the modulation mode of the first RU is different from the modulation mode of the second RU.
  • the interleaver is used to interleave the information bits to determine the order of the information bits carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • the interleaver provided in the embodiments of the present application may include a first interleaver and a second interleaver.
  • the function of the first interleaver can refer to the introduction of the interleaver 1 in the traditional interleaver in the above content.
  • the first interleaver is used to scramble the order of adjacent information bits in the manner listed in the progression.
  • the number of columns of the first interleaver is M 1 + M 2
  • the number of rows of the first interleaver is the maximum value of N 1 and N 2.
  • the N 1 is the number of rows determined by the number of subcarriers of the first RU
  • the M 1 is the number of columns determined by the number of subcarriers of the first RU
  • the N 2 is determined by the number of subcarriers of the first RU.
  • the number of rows determined by the number of subcarriers of the second RU, the M 2 is the number of columns determined by the number of subcarriers of the second RU, the N 1 , the M 1 , the N 2 and the M 2 is a positive integer.
  • M 1 is the number of columns of the traditional interleaver corresponding to the first RU described in the above content
  • N 1 is the number of rows of the traditional interleaver corresponding to the first RU described in the above content
  • M 2 is the number of columns of the traditional interleaver corresponding to the first RU described in the above content.
  • the number of columns of the traditional interleaver corresponding to the second RU introduced, and N 2 is the number of rows of the traditional interleaver corresponding to the second RU introduced in the above content.
  • the number of rows and columns of interleavers corresponding to RUs with different numbers of subcarriers can be specified in the protocol.
  • the first interleaver is used to input the information bits of the first unit and the information bits of the second unit in rows.
  • the number of columns of valid information bits of the first unit is M 1 +M 2
  • the number of rows of valid information bits of the first unit is the minimum value of N 1 and N 2.
  • the number of columns of valid information bits of the second unit is the M 1 or the M 2
  • the number of rows of valid information bits of the second unit is the absolute value of the difference between the N 1 and the N 2 .
  • the first row of information bits of the second unit is the N 2 +1th row of the first interleaver, and the first column of information bits of the second unit is the first column of the interleaver; or, The first row of the information bits of the second unit is the N 1 +1th row of the first interleaver, and the first column of the information bits of the second unit is the M 1 +th row of the first interleaver. 1 column.
  • the effective information bit is a bit containing an amount of information.
  • the first interleaver can implement the input and output of the information bits of the first unit and the information bits of the second unit in hardware or software, or a combination of software and hardware.
  • the first interleaver can be divided into a first part and a second part. The first part is used to input the information bits of the first unit, and the second part is used to input the second unit. Of information bits.
  • it is implemented in software.
  • the first interleaver determines the coordinates of each information bit that it can input in a matrix manner.
  • the first interleaver may determine the coordinates of each information bit in the first unit according to the row of information bits in the first unit.
  • the number and the number of columns determine the coordinate value of the information bit of the first unit; the coordinate value of the information bit of the second unit is determined according to the number of rows and columns of the information bit of the second unit.
  • FIG. 8 is a schematic diagram of a first interleaver provided by an embodiment of the present application.
  • RU number of subcarriers is greater than the first number of subcarriers of the second RU, N 1 is greater than N 2.
  • N PBSCS1 is the modulation order of the first RU, and N PBSCS2 is the modulation order of the second RU.
  • a dot in FIG. 8 can represent a valid information bit, and the part marked with 0 is an invalid information bit, and these bits can be 0; or, this part can be empty and does not contain any information bits. Similar symbols in the subsequent content can refer to the meanings here, and will not be repeated in the following.
  • the first unit and the second unit can be shown with reference to the dashed box in FIG. 8.
  • the first unit indicates the portion occupied by the information bits of the first unit, and the first unit indicates the portion occupied by the information bits of the second unit.
  • the number of columns of valid information bits in the first unit is M 1 +M 2
  • the number of rows of valid information bits in the first unit is N 2 .
  • the number of columns of valid information bits of the second unit is the M 1
  • the number of rows of valid information bits of the second unit is the N 1 -N 2 .
  • the first row of information bits of the second unit is the N 2 +1th row of the first interleaver
  • the first column of information bits of the second unit is the first column of the interleaver.
  • the second unit may be the part of the dashed frame where the second unit shown in FIG. 8 is located and the part marked as 0. Component part.
  • FIG. 9 is a schematic diagram of still another first interleaver provided by an embodiment of the present application.
  • the number of subcarriers of the first RU is smaller than the number of subcarriers of the second RU, and N 1 is smaller than N 2 .
  • N PBSCS1 is the modulation order of the first RU
  • N PBSCS2 is the modulation order of the second RU.
  • the number of columns of valid information bits in the first unit is M 1 +M 2
  • the number of rows of valid information bits in the first unit is N 1 .
  • the number of columns of valid information bits of the second unit is the M 2
  • the number of rows of valid information bits of the second unit is the N 2 -N 1 .
  • the first row of the information bits of the second unit is the N 1 +1th row of the first interleaver, and the first column of the information bits of the second unit is the M 1 +th row of the first interleaver. 1 column.
  • the second unit may be a part composed of the dashed frame part where the second unit shown in FIG. 9 is located and the part marked as 0.
  • the interleaver processing the information bits corresponding to the first RU and the second RU is taken as an example for introduction.
  • the number of rows of the interleaver can be the maximum of the number of rows of the multiple traditional interleavers corresponding to the N RU RUs, that is, x n ⁇ N PBSCSn
  • n is the index of RU
  • N RU is a positive integer greater than 1
  • N PBSCSn is the modulation order of the nth RU
  • the number of columns of the interleaver can be understood as N COLn is the number of columns of the traditional interleaver corresponding to the nth RU.
  • the sequence number i 1 output by the first RU may be as shown in formula 1-4 and formula 1-5.
  • the meaning of the letters in formula 1-4 and formula 1-5 can refer to the introduction in the above content.
  • the output sequence number i 2 of the first RU can be as shown in Formula 1-6 and Formula 1-7.
  • the meaning of the letters in Formula 1-6 and Formula 1-7 can refer to the introduction in the above content.
  • the function of the second interleaver can refer to the introduction of the interleaver 2 in the conventional interleaver in the above content.
  • the second interleaver is used for receiving valid information bits output by the first interleaver in columns, and performing interleaving mapping on these valid information bits. After that, if there is a third interleaver, the processed information bits are input to the third interleaver, and if there is no third interleaver, the processed information bits are input to the bit parser.
  • the second interleaver is used to perform interleaving mapping between the information bits of the third unit and the information bits of the fourth unit. Specifically: the second interleaver is used to perform interleaving mapping of the third unit according to the modulation order of the first RU.
  • the effective information bits of the unit are subjected to interleaving mapping; the number of columns of effective information bits of the third unit is the M 1 , and the number of rows of effective information bits of the third unit is the N 1 .
  • the second interleaver is further configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU; the number of columns of effective information bits of the fourth unit is the M 2.
  • the number of rows of effective information bits of the fourth unit is the N 2 .
  • the first column of information bits of the fourth unit is the M 1 +1th column of the second interleaver.
  • the second interleaver can implement the input and output of the information bits of the third unit and the information bits of the fourth unit in a hardware or software, or a combination of software and hardware.
  • the second interleaver can be divided into a first part and a second part. The first part is used to input the information bits of the third unit, and the second part is used to input the fourth unit. Of information bits.
  • the second interleaver determines the coordinates of each information bit that can be input by itself in a matrix manner, and the second interleaver can determine the coordinates of each information bit in the third unit according to the row of information bits in the third unit.
  • the number and the number of columns determine the coordinate value of the information bit of the third unit; the coordinate value of the information bit of the fourth unit is determined according to the row number and the number of columns of the information bit of the fourth unit.
  • the second interleaver is described as an example.
  • FIG. 10 is a schematic diagram of a second interleaver provided in an embodiment of the present application.
  • the third unit and the fourth unit can be shown with reference to the dashed box in FIG. 10.
  • the third unit indicates the portion occupied by the information bits of the third unit
  • the fourth unit indicates the portion occupied by the information bits of the fourth unit.
  • the second interleaver is used to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU.
  • the modulation order of the first RU is 6, and the second interleaver disrupts the order of each information bit in every 3 adjacent information bits in the third unit in a downward cyclic shift manner.
  • the fourth unit is configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU.
  • the modulation order of the second RU is 4, and the second interleaver disrupts the order of each information bit in every two adjacent information bits in the fourth unit in a downward cyclic shift manner.
  • FIG. 11 is a schematic diagram of still another second interleaver provided in an embodiment of the present application.
  • the third unit and the fourth unit can be shown with reference to the dashed box in FIG. 11.
  • the second interleaver is used to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU.
  • the modulation order of the first RU is 4, and the second interleaver disrupts the order of each information bit in every two adjacent information bits in the third unit in a downward cyclic shift manner.
  • the fourth unit is configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU.
  • the modulation order of the second RU is 6, and the second interleaver disrupts the order of each information bit in every 3 adjacent information bits in the fourth unit in a downward cyclic shift manner.
  • the second interleaver is connected to a bit parser.
  • the bit parser is configured to receive the effective information bits output by the second interleaver in columns, and output the information bits carried on the subcarriers of the first RU and the information bits carried on the subcarriers of the second RU.
  • Information bits are processed by the bit parser and then carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • the bit parser first receives the information bits of the third unit, and inputs these information bits into the constellation point mapper corresponding to the first RU; after that, the bit parser receives the information bits of the fourth unit and transfers these information bits. Enter the constellation point mapper corresponding to the second RU. It should be noted that invalid information bits should be discarded and will not be input to the constellation point mapper.
  • the interleaver further includes a third interleaver connected to the second interleaver and the bit parser.
  • the third interleaver is configured to receive valid information bits output by the second interleaver in columns, and perform frequency analysis on the spatial data streams of the at least two spatial data streams except for the first spatial data stream. Domain rotation, the first spatial data stream is one of the at least two spatial data streams.
  • the third interleaver may perform frequency domain rotation in the third unit corresponding to the first RU and the fourth unit corresponding to the second RU, respectively.
  • the third interleaver may also perform frequency rotation in units of a rectangle formed by the entire interleaver.
  • the bit parser is used to receive the effective information bits output by the third interleaver in columns, and output the information bits carried on the subcarriers of the first RU, and the information bits carried on the subcarriers of the second RU Information bits.
  • the effective information bits output by the third interleaver in columns are processed by the bit parser and then carried on the subcarriers of the first RU and the subcarriers of the second RU.
  • the execution mode of the bit parser please refer to the introduction in the above content, which will not be repeated here.
  • the embodiment of the present application also provides another interleaver that supports unequal modulation. This kind of interleaver is introduced below.
  • the interleaver may include a first interleaver and a second interleaver.
  • the user equipment processed by the interleaver is assigned a first RU and a second RU as an example for introduction, and the modulation mode of the first RU is different from the modulation mode of the second RU.
  • the interleaver is used to interleave the information bits to determine the order of the information bits carried on the subcarriers of the first RU and the subcarriers of the second RU. It should be noted that the functions of the first interleaver and the second interleaver can refer to the introduction of the first interleaver supporting unequal modulation in the above content.
  • the first interleaver is configured to input information bits in rows, the number of rows of the first interleaving is i ⁇ (n+m), and the number of columns of the first interleaver is j/i; wherein, the i is a positive integer, the n is the modulation order of the first RU, the m is the modulation order of the second RU, and the j is the number of subcarriers of the first RU and the number of subcarriers of the second RU The maximum value in the number of carriers.
  • the first interleaver is used to input the information bits of the i first unit and the information bits of the i second unit in rows, wherein: the number of columns of effective information bits of the first unit is less than or equal to The number of columns of the first interleaver, the total number of rows of the i effective information bits of the first unit is n ⁇ i; the effective information bits are bits that contain information.
  • the number of columns of valid information bits of the second unit is less than or equal to the number of columns of the first interleaver, and the total number of rows of valid information bits of the i second units is m ⁇ i.
  • a first unit and a second unit are adjacent to each other up and down.
  • the first unit indicates the portion occupied by the information bits of the first unit, and the first unit indicates the portion occupied by the information bits of the second unit.
  • the first row of information bits of the a-th first unit, and the corresponding number of rows of the first interleaver is: (a-1) ⁇ n+(a-1) ⁇ m+1, where the a It is a positive integer less than or equal to i.
  • the first row of information bits of the b-th second unit corresponds to the number of rows of the first interleaver: b ⁇ n+(b-1) ⁇ m+1, where b is less than or equal to The positive integer of i.
  • N PBSCS1 (example: 6) is the modulation order of the first RU
  • N PBSCS2 (example: 4) is the modulation order of the second RU.
  • the first unit and the second unit can be shown with reference to the dashed box in FIG. 12.
  • the number of columns of the first interleaver is N COL_MRU
  • the number of rows of the first interleaver is N ROW_MRU .
  • the first interleaver includes three first units and three second units, and one first unit and one second unit are adjacent to each other up and down.
  • the first row of the information bits of the first first unit is the first row of the first interleaver
  • the number of columns of information bits of the first first unit, the number of columns of information bits of the second first unit, and the number of columns of information bits of the third first unit are all the same as the number of columns of the first interleaver.
  • the first row of the information bits of the second second unit is the 2 ⁇ 6th row of the first interleaver.
  • +1 ⁇ 4+1 17 rows
  • the number of columns of valid information bits of the first second unit and the number of valid information bits of the second second unit is the same as the number of columns of the first interleaver, and the number of columns of valid information bits of the third first unit is less than The number of columns of the first interleaver.
  • the number of columns of effective information bits of the third first unit is less than the number of columns of the first interleaver because the number of subcarriers of the second RU is less than the number of subcarriers of the first RU.
  • the total number of valid information bits of the i first units is the total number of information bits included in the traditional interleaver corresponding to the first RU; the total number of valid information bits of the i second units It is the total number of information bits contained in the traditional interleaver corresponding to the second RU.
  • the part that cannot be filled in the first interleaver can be filled with invalid information bits. These bits can be 0.
  • the number of columns of information bits in the third first unit is equal to the number of columns in the first interleaver.
  • the number of columns of valid information bits of the three first units is less than the number of columns of the first interleaver; or, this part may be empty and does not contain any information bits.
  • the way shown in FIG. 12 is to correspond to the unused subcarriers in the form of rows, in other words, the information bits of the second unit fill up the rows preferentially.
  • the unused subcarriers can also be corresponded in the form of columns.
  • the information bits of the second unit fill up the columns first.
  • FIG. 13 is a schematic diagram of still another first interleaver provided by an embodiment of the present application.
  • the number of columns of valid information bits of the first second unit is the same as the number of columns of the first interleaver, and the number of columns of valid information bits of the second second unit and the third first unit Less than the number of columns of the first interleaver.
  • the second interleaver is configured to receive information bits output by the first interleaver in columns, and perform interleaving mapping on the information bits. After that, if there is a third interleaver, the processed information bits are input to the third interleaver, and if there is no third interleaver, the processed information bits are input to the bit parser.
  • the second interleaver is configured to perform interleaving mapping on the information bits of the i third units and the information bits of the i fourth units. Specifically: the second interleaver is configured to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU; the number of columns of effective information bits of the third unit is less than or It is equal to the number of columns of the first interleaver, and the total number of rows of valid information bits of the i third units is n ⁇ i; the valid information bits are bits containing information.
  • the second interleaver is configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU; the number of columns of effective information bits of the fourth unit is less than or equal to the The number of columns of the first interleaver, and the total number of rows of valid information bits of the i fourth units is m ⁇ i.
  • the second interleaver performs interleaving mapping, reference may be made to the introduction in the foregoing content.
  • a third unit is adjacent to a fourth unit up and down.
  • the third unit indicates the portion occupied by the information bits of the third unit
  • the fourth unit indicates the portion occupied by the information bits of the fourth unit.
  • the first row of information bits of the c-th third unit corresponds to the number of rows of the second interleaver: (c-1) ⁇ n+(c-1) ⁇ m+1, where , The c is a positive integer less than or equal to the i.
  • the number of rows corresponding to the second interleaver is: d ⁇ n+(d-1) ⁇ m+1, where d is less than or equal to The positive integer of i.
  • FIG. 14 is a schematic diagram of a second interleaver provided in an embodiment of the present application.
  • the third unit and the fourth unit can be shown with reference to the dashed box in FIG. 14.
  • the second interleaver is used to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU.
  • the second interleaver performs interleaving mapping, reference may be made to the introduction in the foregoing content.
  • the modulation order of the first RU is 6, and the second interleaver disrupts the order of each information bit in every 3 adjacent information bits in the third unit in a downward cyclic shift manner.
  • the fourth unit is configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU.
  • the modulation order of the second RU is 4, and the second interleaver disrupts the order of each information bit in every two adjacent information bits in the fourth unit in a downward cyclic shift manner.
  • FIG. 15 is a schematic diagram of another second interleaver provided in an embodiment of the present application.
  • the third unit and the fourth unit can be shown with reference to the dashed box in FIG. 15.
  • the second interleaver is used to perform interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU.
  • the modulation order of the first RU is 6, and the second interleaver disrupts the order of each information bit in every 3 adjacent information bits in the third unit in a downward cyclic shift manner.
  • the fourth unit is configured to perform interleaving mapping on the effective information bits of the fourth unit according to the modulation order of the second RU.
  • the modulation order of the second RU is 4, and the second interleaver disrupts the order of each information bit in every two adjacent information bits in the fourth unit in a downward cyclic shift manner.
  • the second interleaver is connected to a bit parser.
  • the bit parser is configured to receive valid information bits output by the second interleaver in columns, and sequentially output the first information bits in units of n bits and the second information in units of m bits Bits.
  • the effective information bits output by the second interleaver in columns are processed by the bit parser and then sequentially output as the first information bits in the unit of n bits and the unit of m bits.
  • the second information bit is configured to receive valid information bits output by the second interleaver in columns, and sequentially output the first information bits in units of n bits and the second information in units of m bits Bits.
  • the first information bit is an information bit carried on a subcarrier of the first RU
  • the second information bit is an information bit carried on a subcarrier of the second RU. Since the first unit and the second unit are in a positional relationship adjacent to each other from top to bottom, the bit parser will sequentially output the first information bits in units of n bits and the second information bits in units of m bits in turn. Specifically, the bit parser inputs the first information bits in units of n bits into the constellation point mapper corresponding to the first RU, and inputs the second information bits in units of m bits into the constellation point mapper corresponding to the second RU. It should be noted that invalid information bits should be discarded and will not be input to the constellation point mapper.
  • the interleaver further includes a third interleaver connected to the second interleaver and the bit parser.
  • the third interleaver is configured to receive valid information bits output by the second interleaver in columns, and perform frequency analysis on the spatial data streams of the at least two spatial data streams except for the first spatial data stream. Domain rotation, the first spatial data stream is one of the at least two spatial data streams.
  • the third interleaver may perform frequency domain rotation in the third unit corresponding to the first RU and the fourth unit corresponding to the second RU, respectively.
  • the third interleaver may also perform frequency rotation in units of a rectangle formed by the entire interleaver.
  • the bit parser is configured to receive valid information bits output by the third interleaver in columns, and sequentially output the first information bits in units of n bits and the second information in units of m bits Bits.
  • the effective information bits output by the third interleaver in columns are processed by the bit parser, and then sequentially output as the first information bits in the unit of n bits and the unit of m bits.
  • the second information bit For the execution mode of the bit parser, please refer to the introduction in the above content, which will not be repeated here.
  • the interleaver that supports unequal modulation has been introduced above.
  • the following introduces the sub-carrier mapper that supports unequal modulation.
  • the WLAN communication system may also support a Low Density Parity Code (LDPC) encoding method.
  • LDPC Low Density Parity Code
  • FIG. 16 is a schematic diagram of another system for implementing BICM provided by an embodiment of the present application.
  • the system includes an encoder, a stream parser, a constellation point mapper and an LDPC subcarrier mapper.
  • the encoder is used to compile and convert a bit stream or data into a signal form (for example, a data stream) that can be used for communication, transmission, and storage.
  • the encoder can be an LDPC encoder.
  • the stream parser is used to distribute the encoded information bits to different data streams.
  • the stream parser can intercept the information bits according to the number of subcarriers and modulation order corresponding to the allocated RU, and then input these information bits into the constellation point mapper.
  • the constellation point mapper is used to map information bits to sub-carriers according to the modulation order of the RU.
  • the LDPC sub-carrier mapper can break up the existing sub-carrier sequence, change its original distribution sequence, avoid bit errors that occur in series, and improve the reliability of information transmission.
  • space-time block coding and cyclic shift diversity processing are performed on the sub-carriers, and so on.
  • the LDPC sub-carrier mapper can be used to increase the diversity gain, thereby effectively improving the system transmission reliability.
  • each of the n OFDM symbols is composed of N SD effective (or called data) subcarriers
  • n is the index of the OFDM symbol (SYM)
  • l is the index of the N SS streams.
  • the input of the LDPC sub-carrier mapper is d k,l,n and the output is d′ k,l,n
  • the sub-carrier mapping mode of LDPC is shown in formula 1-8.
  • N SD Number of data subcarriers
  • D TM is an LDPC sub-carrier mapping distance parameter (LDPC tone-mapping distance parameter).
  • a user can be allocated multiple RUs
  • multiple RUs of the same user can be configured with different modulation and coding strategies.
  • an LDPC subcarrier mapper only supports RUs that handle one modulation mode.
  • a separate LDPC subcarrier mapper will be used to process the information bits of each RU in the multiple RUs.
  • FIG. 17 is a schematic diagram of a processing system provided by an embodiment of the present application.
  • the figure includes two-stage processing units.
  • the first-stage processing unit uses a bit splitter to interleave information bits according to different RUs of users, and the second-stage processing unit uses multiple constellation point mappers and LDPC subcarrier mappers to assign information bits to each RU.
  • the corresponding sub-carrier is processed.
  • multiple LDPC subcarrier mappers need to be designed for different RUs allocated to a single user.
  • One LDPC subcarrier mapper corresponds to one RU, and one LDPC subcarrier mapper supports the MCS of the corresponding RU, namely Multi-RU UEQM can be realized.
  • this method requires the user equipment to support multiple LDPC subcarrier mappers in parallel, and the hardware cost is relatively high.
  • the following describes an LDPC subcarrier mapper that supports unequal modulation provided by the embodiment of the present application in conjunction with the data communication system, STA, and AP introduced in the foregoing content.
  • the method can be implemented based on the data communication system shown in FIG. 1, and the communication device using the LDPC subcarrier mapper may be the STA in the data communication system shown in FIG. 1, or the data communication system shown in FIG. AP in.
  • the information processed by the LDPC subcarrier mapper can be transmitted between STA and STA, between AP and AP, and between STA and AP.
  • the communication device using the LDPC subcarrier mapper may also be a multi-link device (MLD).
  • MLD multi-link device
  • FIG. 18 is a schematic diagram of another system for implementing BICM provided by an embodiment of the present application.
  • the system includes an LDPC encoder, a stream parser, a bit parser, a constellation point mapper, and an LDPC subcarrier mapper.
  • the LDPC encoder is used to compile and convert a bit stream or data into a signal form (for example, a data stream) that can be used for communication, transmission, and storage by using the LDPC encoding method.
  • the stream parser is used to divide the data stream.
  • the bit parser is used to disperse the first-rate information bits on multiple RUs and input the constellation point mapper.
  • these modules all need to consider the different modulation modes of the RU.
  • the bit parser needs to consider the number of subcarriers and the modulation order of the RU; the constellation point mapper should also consider the change of the modulation order caused by different MCS. For example, when the modulation order is 4, every 4 information bits are mapped as a constellation point, and when the modulation order is 6, every 6 information bits are mapped as a constellation point.
  • the parallel constellation point mapper in the above figure can also be changed to a unified constellation point mapper to reduce device complexity.
  • the LDPC subcarrier mapper provided in the embodiment of the present application will be further introduced. Specifically, taking the user equipment where the LDPC subcarrier mapper is located is assigned a first RU, a second RU, and a third RU as an example, the modulation mode of the first RU is the same as the modulation mode of the second RU. , The modulation mode of the first RU is different from the modulation mode of the third RU.
  • the subcarrier mapper is used to map the subcarriers of the first RU, the second RU, and the third RU.
  • the LDPC subcarrier mapper includes a first unit and a second unit.
  • the first unit is configured to map the subcarriers of the first RU and the subcarriers of the second RU according to the modulation mode of the first RU.
  • the second unit is configured to map the subcarriers of the third RU according to the modulation mode of the third RU.
  • subcarrier mapping may be performed between the subcarrier of the first RU and the subcarrier of the second RU, and the subcarrier mapping may be performed inside the subcarrier of the third RU.
  • the mapping method can refer to the introduction in the above content.
  • the LDPC subcarrier mapper can implement the processing of the first unit and the second unit in hardware or software, or a combination of software and hardware.
  • the LDPC subcarrier mapper can be divided into a first unit and a second unit.
  • the subcarriers are mapped to the subcarriers of the second RU, and the second unit maps the subcarriers of the third RU according to the modulation mode of the third RU.
  • it is implemented in software.
  • the LDPC subcarrier mapper determines the coordinates of each subcarrier that it can input according to a matrix.
  • the first unit is based on the subcarriers of the first RU and the second RU.
  • the coordinate values of the subcarriers of the first RU are processed according to the modulation mode of the first RU, and the subcarriers of the second RU are processed according to the subcarriers of the third RU.
  • the coordinate value is to process the subcarrier of the third RU according to the modulation mode of the third RU.
  • the user equipment where the LDPC subcarrier mapper is located is assigned the fourth RU, the fifth RU, the sixth RU, and the seventh RU as an example.
  • the modulation method of the fourth RU is the same as that of the The modulation mode of the sixth RU is the same, the modulation mode of the fifth RU is the same as the modulation mode of the seventh RU, and the modulation mode of the fourth RU is different from the modulation mode of the fifth RU.
  • the subcarrier mapper is used to map the subcarriers of the fourth RU, the fifth RU, the sixth RU, and the seventh RU.
  • the LDPC subcarrier mapper includes a third unit and a fourth unit.
  • the third unit is used to map the subcarriers of the fourth RU and the subcarriers of the sixth RU according to the modulation mode of the fourth RU;
  • the fourth unit is used to map the subcarriers of the sixth RU according to the modulation mode of the fourth RU;
  • the modulation mode of the fifth RU maps the sub-carriers of the fifth RU and the sub-carriers of the seventh RU.
  • subcarrier mapping may be performed between the subcarriers of the fourth RU and the subcarriers of the sixth RU, and subcarrier mapping may be performed between the subcarriers of the fifth RU and the subcarriers of the seventh RU .
  • LDPC subcarrier mapping is performed between subcarriers of RUs of the same modulation mode, and subcarrier mapping is not performed between subcarriers of RUs of different modulation modes.
  • subcarrier mapping is performed between subcarriers of RUs with the same modulation mode, which can increase the range of subcarrier dispersion and improve the diversity gain. It should be noted that the subcarriers of two RUs with the same modulation mode but different code rates can still be combined together for subcarrier mapping. In other words, this method only limits the modulation method.
  • FIG. 21 is a flowchart of an interleaving method supporting unequal modulation according to an embodiment of the present application.
  • the method is applied to an interleaver.
  • the interleaver includes a first interleaver and a second interleaver.
  • the interleaver is used to interleave information bits to determine the subcarriers carried in the first RU and the subcarriers of the second RU.
  • the order of the information bits on the carrier, the modulation mode of the first RU is different from the modulation mode of the second RU, and the method includes:
  • the first interleaver inputs information bits in rows.
  • the second interleaver receives the information bits output by the first interleaver in columns, and performs interleaving mapping on the information bits.
  • the number of columns of the first interleaver is M 1 + M 2
  • the number of rows of the first interleaver is the maximum value of N 1 and N 2.
  • the N 1 is the number of rows determined by the number of subcarriers of the first RU
  • the M 1 is the number of columns determined by the number of subcarriers of the first RU
  • the N 2 is the number of rows determined by the second RU.
  • the M 2 is the number of columns determined by the number of subcarriers of the second RU
  • the N 1 , the M 1 , the N 2 and the M 2 are positive integers .
  • the first interleaver inputting information bits in rows includes: the first interleaver inputting information bits of a first unit and information bits of a second unit in rows; wherein, the first unit The number of columns of valid information bits is M 1 + M 2 , the number of rows of valid information bits in the first unit is the minimum of N 1 and N 2 , and the valid information bits contain information The amount of bits; the number of columns of effective information bits of the second unit is the M 1 or the M 2 , and the number of rows of effective information bits of the second unit is the number of the N 1 and the N 2 The absolute value of the difference; the first row of the information bits of the second unit is the N 2 +1th row of the first interleaver, and the first column of the second unit is the first column of the interleaver; Alternatively, the first row of the information bits of the second unit is the N 1 +1th row of the first interleaver, and the first column of the second unit is the M 1 +1th row of the first interleaver.
  • the second interleaver performing interleaving mapping on the information bits includes: performing interleaving mapping on the information bits of the third unit and the information bits of the fourth unit by the second interleaver; wherein, The second interleaver performing interleaving mapping on the information bits of the third unit includes: the second interleaver performing interleaving mapping on the effective information bits of the third unit according to the modulation order of the first RU; The number of columns of valid information bits of the three units is the M 1 , the number of rows of valid information bits of the third unit is the N 1 ; the valid information bits are bits containing information; the second The interleaver performing interleaving mapping of the information bits of the fourth unit includes: the second interleaver performing interleaving mapping of the effective information bits of the fourth unit according to the modulation order of the second RU; The number of columns of valid information bits is the M 2 , the number of rows of valid information bits of the fourth unit is the N 2 ; the first column of information bits of the fourth unit
  • the valid information bits output by the second interleaver in columns are carried on the first RU after bit parsing processing.
  • the effective information bits are bits that contain information.
  • the interleaver further includes a third interleaver
  • the method further includes: the third interleaver receives The second interleaver outputs valid information bits in columns, and performs frequency domain rotation on spatial data streams other than the first spatial data stream among the at least two spatial data streams, the first spatial data stream Is one of the at least two spatial data streams; the valid information bits are bits containing information; the valid information bits output by the third interleaver in columns are carried in the bit analysis process On the subcarrier of the first RU and the subcarrier of the second RU.
  • the valid information bits output by the third interleaver in columns may be processed by a bit parser connected to the third interleaver.
  • each step in this embodiment can refer to the introduction in the foregoing content.
  • the interleaver can refer to the introduction of the first interleaver in the above content.
  • the number of rows of the first interleaver is i ⁇ (n+m), and the number of columns of the first interleaver is j/i; wherein, i is a positive integer, and n is the modulation of the first RU
  • i is a positive integer
  • n is the modulation of the first RU
  • the order, the m is the modulation order of the second RU, and the j is the maximum value of the number of subcarriers of the first RU and the number of subcarriers of the second RU.
  • inputting information bits in rows by the first interleaver includes: inputting information bits in the i first units and information bits in the i second units by the first interleaver in rows
  • the number of columns of valid information bits of the first unit is less than or equal to the number of columns of the first interleaver, and the total number of rows of valid information bits of the i first units is n ⁇ i
  • the valid information bits are bits containing information
  • the number of columns of valid information bits of the second unit is less than or equal to the number of columns of the first interleaver, and the i valid information bits of the second unit
  • the total number of rows is m ⁇ i
  • the first row of the information bits of the a-th first unit, and the corresponding row number of the first interleaver is: (a-1) ⁇ n+(a-1) ⁇ m+1, where a is a positive integer less than or equal to i; the first row of information bits of the b-th second unit, and the corresponding number of rows of the first interle
  • the second interleaver performs interleaving mapping on the information bits, including: the second interleaver performs information bits on the i third units and information on the i fourth units Bit interleaving mapping; wherein the second interleaver performing interleaving mapping of the i third unit information bits includes: the second interleaver performs interleaving mapping on the third RU according to the modulation order of the first RU.
  • the effective information bits of the unit are subjected to interleaving mapping; the number of columns of effective information bits of the third unit is less than or equal to the number of columns of the first interleaver, and the total number of rows of effective information bits of the i third units Is n ⁇ i; the effective information bits are bits that contain information; the second interleaver performs interleaving mapping on the information bits of the i fourth units including: the second interleaver according to the first The modulation order of two RUs performs interleaving mapping on the effective information bits of the fourth unit; the number of columns of effective information bits of the fourth unit is less than or equal to the number of columns of the first interleaver, and the i The total number of rows of effective information bits of the fourth unit is m ⁇ i; the first row of information bits of the c-th third unit corresponds to the number of rows of the second interleaver: (c-1) ⁇ n+(c-1) ⁇ m+1, where the c is a positive integer less than or equal to
  • the valid information bits output by the second interleaver in columns are processed by bit parsing, and then sequentially output as the n
  • the first information bit in the unit of bit and the second information bit in the unit of m bits wherein, the first information bit is an information bit carried on a subcarrier of the first RU, and the second information bit is The information bit is the information bit carried on the subcarrier of the second RU.
  • the method further includes: the third interleaver receives valid columns output by the second interleaver.
  • the effective information bits output by the third interleaver in columns are processed by a bit parser, and then sequentially output as the first information bit in the unit of n bits and the first information bit in the unit of m bits.
  • Two information bits the first information bit is an information bit carried on a subcarrier of the first RU, and the second information bit is an information bit carried on a subcarrier of the second RU.
  • each step in this embodiment can refer to the introduction in the foregoing content.
  • the interleaver can refer to the introduction of the second type of interleaver in the above content.
  • the information bits of multiple RUs with different modulation and coding strategies can be interleaved through a unified interleaver, which simplifies the hardware structure of the communication device and reduces the hardware cost.
  • the method is applied to the subcarrier mapper.
  • the subcarrier mapper includes a first unit and a second unit.
  • the subcarrier mapper is used to perform subcarriers on the first RU, the second RU, and the third RU. Mapping, the modulation mode of the first RU is the same as the modulation mode of the second RU, and the modulation mode of the first RU is different from the modulation mode of the third RU.
  • the method includes:
  • the first unit maps the subcarriers of the first RU and the subcarriers of the second RU according to the modulation mode of the first RU.
  • the second unit maps the subcarriers of the third RU according to the modulation mode of the third RU.
  • each step in this embodiment can refer to the introduction in the foregoing content.
  • the subcarrier mapper can refer to the introduction of the subcarrier mapper in the above content.
  • the information bits of multiple RUs with different modulation and coding strategies can be interleaved through a unified subcarrier mapper, which simplifies the hardware structure of the communication device and reduces the hardware cost.
  • the present application also provides a computer-readable storage medium on which a computer program is stored, and the computer-readable storage medium implements the functions of any of the foregoing method embodiments when executed by a computer.
  • This application also provides a computer program product, which, when executed by a computer, realizes the functions of any of the foregoing method embodiments.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center integrated with one or more available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a high-density digital video disc (digital video disc, DVD)), or a semiconductor medium (for example, a solid state disk, SSD)) etc.
  • the corresponding relationships shown in the tables in this application can be configured or pre-defined.
  • the value of the information in each table is only an example, and can be configured to other values, which is not limited in this application.
  • the corresponding relationship shown in some rows may not be configured.
  • appropriate deformation adjustments can be made based on the above table, such as splitting, merging, and so on.
  • the names of the parameters shown in the titles in the above tables may also adopt other names that can be understood by the communication device, and the values or expressions of the parameters may also be other values or expressions that can be understood by the communication device.
  • other data structures can also be used, such as arrays, queues, containers, stacks, linear tables, pointers, linked lists, trees, graphs, structures, classes, heaps, hash tables, or hash tables. Wait.
  • the pre-definition in this application can be understood as definition, pre-definition, storage, pre-storage, pre-negotiation, pre-configuration, curing, or pre-fired.

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Abstract

本申请实施例公开了一种支持不等调制的交织和子载波映射方法以及相关装置，其中，交织器包括第一交织器，第二交织器，交织器用于确定承载在第一RU和第二RU的子载波上的信息比特的顺序，第一RU与第二RU的调制方式不同；第一交织器，用于按行输入信息比特，第一交织器的列数为M 1+M 2，行数为N 1和N 2中的最大值；N 1、M 1由所述第一RU的子载波数确定，N 2、M 2由所述第二RU的子载波数确定；第二交织器，用于接收所述第一交织器按列输出的信息比特，且对所述信息比特进行交错映射。通过本申请实施例提供的交织器，可以对具有不同的调制编码策略的多个RU的信息比特进行交织，从而简化通信装置的硬件结构。

Description

一种支持不等调制的交织和子载波映射方法以及相关装置
本申请要求于2020年6月2日提交中国国家知识产权局、申请号为202010490950.2、申请名称为“一种支持不等调制的交织和子载波映射方法以及相关装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种支持不等调制的交织和子载波映射方法以及相关装置。
背景技术
现代的无线通信业务对通信系统的信道容量和通信性能的需求始终在不断增长。为了提升无线通信系统的信道容量和通信性能，在电气和电子工程师协会(Institute of Electrical and Electronics Engineers，IEEE)802.11be协议标准中，允许同一个用户被分配有多个资源单元(resource unit，RU)。为了进一步提升无线通信系统的分配灵活性和频谱利用率，在一个用户可以被分配多个RU的情况下，同一用户的多个RU可以配置不同的调制编码策略(Modulation and Coding Scheme，MCS)，也即是说，这多个RU支持不等调制(Unequal Modulation，UEQM)。
无线局域网(Wireless Local Area Network，WLAN)通信系统中，若采用BCC编码方式，将利用交织器对RU的信息比特进行交织。现阶段，一个交织器仅支持处理一种调制方式的RU。为了处理具有不同MCS的多RU的信息比特，将分别对多RU中的每个RU的信息比特利用单独的交织器进行交织。如何提升交织器的信息处理能力是本领域技术人员亟待解决的问题。
发明内容
本申请提供一种支持不等调制的交织和子载波映射方法以及相关装置，可以通过一个统一的交织器对具有不同的调制编码策略的多个RU的信息比特进行交织；或者，通过一个统一的子载波映射器对具有不同的调制编码策略的多个RU的子载波进行映射。
第一方面，本申请提供了一种支持不等调制的交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，其中：所述第一交织器，用于按行输入信息比特，所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值；其中，所述N 1是由所述第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由所述第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数；所述第二交织器，用于接收所述第一交织器按列输出的所述信息比特，且对所述信息比特进行交错映射。通过这种交织器，可以对具有不同的调制编码策略的多个RU的信息比特进行交织，简化通信设备的硬件结构，降低硬件成 本。
结合第一方面，在一种可能的实现方式中，所述第一交织器用于按行输入第一单元的信息比特和第二单元的信息比特，其中：所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值，所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值；所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的信息比特的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的信息比特的第一列为所述第一交织器的第M 1+1列。
结合第一方面，在一种可能的实现方式中，所述第二交织器用于对第三单元的信息比特和第四单元的信息比特进行交错映射，具体的：所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1；所述有效信息比特为包含有信息量的比特；所述第二交织器，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2；所述第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
结合第一方面，在一种可能的实现方式中，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器与比特解析器连接，所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU的子载波上，所述有效信息比特为包含有信息量的比特。
结合第一方面，在一种可能的实现方式中，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述第三交织器与所述第二交织器和比特解析器连接：所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述有效信息比特为包含有信息量的比特；所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。
需要说明的是，第一交织器、第二交织器和第三交织器可以包括硬件结构、软件模块，以硬件结构、软件模块、或硬件结构加软件模块的形式来实现上述各功能。上述各功能中的某个功能可以以硬件结构、软件模块、或者硬件结构加软件模块的方式来执行。
第二方面，本申请提供了一种支持不等调制的交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，其中：所述第一交织器，用于按行输入信息比特，所述第一交织的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值；所述第二交织器，用于接收所述第一交织器按列输出的信息比特，且对所 述信息比特进行交错映射。通过这种交织器，可以对具有不同的调制编码策略的多个RU的信息比特进行交织，简化通信设备的硬件结构，降低硬件成本。
结合第二方面，在一种可能的实现方式中，所述第一交织器用于按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特，其中：所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i；第a个所述第一单元的信息比特的第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数；第b个所述第二单元的信息比特第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
结合第二方面，在一种可能的实现方式中，所述第二交织器用于对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射，具体的：所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二交织器，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i；第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数；第d个所述第四单元的信息比特第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
结合第二方面，在一种可能的实现方式中，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器与比特解析器连接；所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
结合第二方面，在一种可能的实现方式中，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述第三交织器用于连接所述第二交织器和比特解析器；所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
需要说明的是，第一交织器、第二交织器和第三交织器可以包括硬件结构、软件模块，以硬件结构、软件模块、或硬件结构加软件模块的形式来实现上述各功能。上述各功能中的某个功能可以以硬件结构、软件模块、或者硬件结构加软件模块的方式来执行。
第三方面，本申请提供了一种支持不等调制的子载波映射器，所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同，所述子载波映射器包括第一单元和第二单元，其中：所述第一单元，用于按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射；所述第二单元，用于按照所述第三RU的调制方式对所述第三RU的子载波进行映射。
需要说明的是，子载波映射器可以包括硬件结构、软件模块，以硬件结构、软件模块、或硬件结构加软件模块的形式来实现上述各功能。上述各功能中的某个功能可以以硬件结构、软件模块、或者硬件结构加软件模块的方式来执行。
第四方面，本申请提供了一种支持不等调制的交织方法，所述方法应用于交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，所述方法包括：所述第一交织器按行输入信息比特，所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值；其中，所述N 1是由第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数；所述第二交织器接收所述第一交织器按列输出的所述信息比特，且对所述信息比特进行交错映射。
结合第四方面，在一种实现方式中，所述第一交织器按行输入信息比特，包括：所述第一交织器按行输入第一单元的信息比特和第二单元的信息比特；其中，所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值，所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值；所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的第一列为所述第一交织器的第M 1+1列。
结合第四方面，在一种实现方式中，所述第二交织器对所述信息比特进行交错映射，包括：所述第二交织器对第三单元的信息比特和第四单元的信息比特进行交错映射；其中，所述第二交织器对第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1；所述有效信息比特为包含有信息量的比特；所述第二交织器对第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2；所述第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
结合第四方面，在一种实现方式中，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上，所述有效信息比特为包含有信息量的比特。
结合第四方面，在一种实现方式中，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述方法还包括：所述第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述有效信息比特为包含有信息量的比特；所述第三交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。
第五方面，本申请提供了一种支持不等调制的交织方法，所述方法应用于交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，所述方法包括：所述第一交织器按行输入信息比特，所述第一交织器的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值；所述第二交织器接收所述第一交织器按列输出的所述信息比特，并对所述信息比特进行交错映射。
结合第五方面，在一种可能的实现方式中，所述第一交织器按行输入信息比特，包括：所述第一交织器按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特；其中，所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i；第a个所述第一单元的信息比特的第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数；第b个所述第二单元的信息比特第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
结合第五方面，在一种可能的实现方式中，所述第二交织器对所述信息比特进行交错映射，包括：所述第二交织器对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射；其中，所述第二交织器对所述i个第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二交织器对所述i个第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i；第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数；第d个所述第四单元的信息比特第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
结合第五方面，在一种可能的实现方式中，所述第一RU和所述第二RU上只有一个 空间数据流；所述第二交织器按列输出的有效信息比特经由比特解析处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
结合第五方面，在一种可能的实现方式中，所述第一RU和所述第二RU上有至少两个空间数据流，所述方法还包括：所述第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述第三交织器按列输出的有效信息比特经由比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
第六方面，本申请提供了一种支持不等调制的子载波映射方法，所述方法应用于所述子载波映射器，所述子载波映射器包括第一单元和第二单元，所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同，所述方法包括：所述第一单元按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射；所述第二单元按照所述第三RU的调制方式对所述第三RU的子载波进行映射。
第七方面，本申请提供了一种计算机可读存储介质，所述计算机可读存储介质用于存储指令，当所述指令被执行时，使得如上述第四方面或者第四方面的任一可能的实现方式所描述的方法被实现，或者使得如上述第五方面或者第五方面的任一可能的实现方式所描述的方法被实现，或者使得如上述第六方面或者第六方面的任一可能的实现方式所描述的方法被实现。
第八方面，本申请提供了另一种计算机可读存储介质，所述计算机可读存储介质用于存储指令，当所述指令被执行时，使得如上述第四方面或者第四方面的任一可能的实现方式所描述的方法被实现，或者使得如上述第五方面或者第五方面的任一可能的实现方式所描述的方法被实现，或者使得如上述第六方面或者第六方面的任一可能的实现方式所描述的方法被实现。
第九方面，本申请提供了一种芯片系统，所述芯片系统包括至少一个处理器和接口，用于支持交织器实现第五方面或者第六方面所涉及的功能，例如，接收或处理上述方法中所涉及的数据和信息中的至少一种。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存交织器必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包括芯片和其他分立器件。
第十方面，本申请提供了另一种芯片系统，所述芯片系统包括至少一个处理器和接口，用于支持子载波映射器实现第七方面所涉及的功能，例如，接收或处理上述方法中所涉及的数据和信息中的至少一种。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存子载波映射器必要的程序指令和数据。该芯片系统，可以由芯片构成，也 可以包括芯片和其他分立器件。
在本申请实施例中，可以通过一个统一的交织器对具有不同的调制编码策略的多个RU的信息比特进行交织；或者，通过一个统一的子载波映射器对具有不同的调制编码策略的多个RU的子载波进行映射，从而简化通信设备的硬件结构，降低硬件成本。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍。
图1是本申请实施例提供的一种数据通信系统的架构的示意图；
图2A是本申请实施例提供的一种子载波分布及RU分布的示意图；
图2B是本申请实施例提供的又一种子载波分布及RU分布的示意图；
图2C是本申请实施例提供的又一种子载波分布及RU分布的示意图；
图3是本申请实施例提供的一种实现BICM的系统的示意图；
图4是本申请实施例提供的一种交织器的示意图；
图5是本申请实施例提供的又一种交织器的示意图；
图6是本申请实施例提供的一种交织系统的示意图；
图7是本申请实施例提供的又一种实现BICM的系统的示意图；
图8是本申请实施例提供的一种第一交织器的示意图；
图9是本申请实施例提供的又一种第一交织器的示意图；
图10是本申请实施例提供的一种第二交织器的示意图；
图11是本申请实施例提供的又一种第二交织器的示意图；
图12是本申请实施例提供的又一种第一交织器的示意图；
图13是本申请实施例提供的又一种第一交织器的示意图；
图14是本申请实施例提供的又一种第二交织器的示意图；
图15是本申请实施例提供的又一种第二交织器的示意图；
图16是本申请实施例提供的又一种实现BICM的系统的示意图；
图17是本申请实施例提供的一种处理系统的示意图；
图18是本申请实施例提供的又一种实现BICM的系统的示意图；
图19是本申请实施例提供的一种LDPC子载波映射器的示意图；
图20是本申请实施例提供的又一种LDPC子载波映射器的示意图；
图21是本申请实施例提供的一种支持不等调制的交织方法的流程图；
图22是本申请实施例提供的一种支持不等调制的子载波映射方法的流程图。
具体实施方式
下面对本申请实施例中的技术方案进行更详细地描述。
本申请的技术方案可以应用于无线局域网(Wireless Local Area Network，WLAN)网络，可以应用于物联网(The Internet of Things，IOT)网络，还可以应用于车联网(Vehicle-to-X，V2X)网络，还可以应用于其他网络等，本申请并不具体限定。举例来说，本申请的应用 场景可以是基于电气和电子工程师协会(Institute of Electrical and Electronics Engineers，IEEE)802.11be标准的WLAN网络，或者是基于IEEE802.11be标准的IoT网络，或者是基于IEEE802.11be标准的车联网网络，或者是基于IEEE802.11be标准的其它网络，还可以是基于IEEE802.11be的下一代WLAN网络，或者是基于IEEE802.11be下一代标准的IoT网络，或者是基于IEEE802.11be的下一代标准的车联网网络，或者是基于IEEE802.11be的下一代标准的其它网络，还可以是未来标准协议的其他WLAN网络。
本申请实施例提供的数据通信系统包括一个或者多个接入点(access point，AP)和一个或者多个站点(station，STA)。示例性的，参见图1，是本申请实施例提供的一种数据通信系统的架构的示意图。该数据通信系统包括两个AP和三个STA，其中，该两个AP为一个第一AP(AP1)和一个第二AP(AP2)，该三个STA为一个第一STA(STA1)、一个第二STA(STA2)和一个第三STA(STA3)。需要说明的是，该数据通信系统中至少包括两个设备，可以包含相比于图1更多或者更少的设备，此处不作限制，仅以图1作为示例。
以下对这两种设备进行进一步的介绍。
其中，本申请实施例涉及的STA为具有无线通信功能的装置，可以指用户设备、接入终端、用户单元、用户站、移动站、移动台、远方站、远程终端、移动设备、用户终端、终端、无线通信设备、用户代理或用户装置。站点还可以是蜂窝电话、无绳电话、会话启动协议(session initiation protocol，SIP)电话、无线本地环路(wireless local loop，WLL)站、个人数字处理(personal digital assistant，PDA)、具有无线通信功能的手持设备、计算设备或连接到无线调制解调器的其它处理设备、车载设备、可穿戴设备，未来5G网络中的终端设备或者未来演进的公用陆地移动通信网络(public land mobile network，PLMN)中的终端设备等，本申请实施例对此并不限定。
本申请实施例涉及的AP可以为终端设备(如手机)进入有线(或无线)网络的接入点，主要部署于家庭、大楼内部以及园区内部，典型覆盖半径为几十米至上百米，当然，也可以部署于户外。接入点相当于一个连接有线网和无线网的桥梁，主要作用是将各个无线网络客户端连接到一起，然后将无线网络接入以太网。具体的，接入点可以是带有无线保真(wreless-fidelity，Wi-Fi)芯片的终端设备(如手机)或者网络设备(如路由器)。接入点可以为支持802.11be制式的设备。接入点也可以为支持802.11be、802.11ax、802.11ac、802.11n、802.11g、802.11b及802.11a等802.11家族的多种无线局域网(wireless local area networks，WLAN)制式的设备。本申请中的接入点可以是高效(high efficient，HE)AP或极高吞吐量(extramely high throughput，EHT)AP，还可以是适用未来某代Wi-Fi标准的接入点。
本申请实施例涉及的资源单元(rssource unit，RU)，是一种划分无线网络的频率资源的基本频率资源单位。RU类型主要有26-tone RU，52-tone RU，106-tone RU，242-tone RU，484-tone RU，996-tone RU，2*996-tone RU，等等。其中，tone表示子载波。RU作为基本频率资源单位，可以分配给不同的用户进行上下行传输数据。不同大小的RU具有不同的带宽，也可以承载不同速率的业务。一个RU的子载波包括有效(或称为数据)子载波和导频子载波。数据子载波用于承载通信所需的信息比特，导频子载波用于承载通信双方已知的数据，从而进行信道估计。举例而言，26-tone RU中包含24个数据子载波，2个导频 子载波；52-tone RU中包含48个数据子载波，4个导频子载波。
以下对不同数据分组带宽下的子载波分布(Tone Plan)进行介绍。参见图2A，是本申请实施例提供的一种子载波分布及RU分布的示意图。当带宽为20MHz时，整个带宽可以由一整个242-tone RU组成，也可以由26-tone RU，52-tone RU，106-tone RU的各种组合组成。带宽中除了用于数据传输的RU，此外，还包括一些保护(Guard)子载波，空子载波(图2A中1tone所示的部分)，或者直流(Direct Current，DC)子载波。
参见图2B，是本申请实施例提供的又一种子载波分布及RU分布的示意图。当带宽为40MHz时，整个带宽大致相当于20MHz的子载波分布的复制，整个带宽可以由一整个484-tone RU组成，也可以由26-tone RU，52-tone RU，106-tone RU，242-tone RU的各种组合组成。其中，空子载波包括图2B中示例的1tone、2tone所示的部分。
参见图2C，是本申请实施例提供的又一种子载波分布及RU分布的示意图。当带宽为80MHz时，整个带宽由4个242-tone为单位的资源单元组成，特别的，在整个带宽的中间，还存在一个由两个13-tone子单元组成的中间26-tone RU。整个带宽可以由整个996-tone RU组成，也可以由26-tone RU，52-tone RU，106-tone RU，242-tone RU，484-tone RU的各种组合组成。其中，空子载波包括图2C中示例的1tone、2tone所示的部分。
按照上述规律，当带宽为160MHz或者80+80MHz时，整个带宽可以看成两个80MHz的子载波分布的复制，整个带宽可以由一整个2*996-tone RU组成，也可以由26-tone RU，52-tone RU，106-tone RU，242-tone RU，484-tone RU，996-tone RU的各种组合组成。其中，160MHz与80+80MHz的区别在于前者为连续频带，而后者的两个80MHz的频带可以分离。
现阶段，为了提高无线通信系统的频谱利用率和传输可靠度，WLAN标准(802.11a/n/ac等)已广泛采用了正交频分复用(Orthogonal Frequency Division Multiplexing，OFDM)技术。作为一种多载波技术，OFDM将信道分成若干正交子信道，将高速数据信号转换成并行的低速子数据流，调制到在每个子信道上进行传输。OFDM中的各个载波是相互正交的，每个载波在一个符号时间内有整数个子载波周期，每个载波的频谱零点和相邻载波的零点重叠，这样便减小了载波间的干扰。由于载波间有部分重叠，所以它比传统的频分复用技术提高了频带利用率，同时提供了相比传统单载波系统更优的抗频率选择性衰落性能。
另外，为了进一步提高系统的传输可靠度，很多无线通信标准(例如高速分组接入(high-speed packet access，HSPA)、长期演进(long term evolution，LTE)，IEEE 802.11a/g/n/ac等)结合了OFDM技术和比特交织编码调制(bit-interleaved coded modulation，BICM)技术。通过BICM技术，可以在OFDM调制之前对信息比特序列进行交织操作，从而在无线衰落信道下获得频域编码分集增益。参见图3，图3是本申请实施例提供的一种实现BICM的系统的示意图。该系统包括编码器、流解析器、交织器和星座点映射器。其中，编码器用于将比特流或数据进行编制、转换为可用以通讯、传输和存储的信号形式(例如，数据流)。示例来说，编码器可以为一个二进制卷积码(Binary Convolution Code，BCC)编码器。流解析器用于将编码后的信息比特分配到不同的数据流上。对于一条数据流而言，流解析器可以根据被分配的RU对应的子载波数与调制阶数对信息比特进行截取，再将这些信息比特输入交织器。交织器用于对数据流中的信息比特进行交织，以确定承载在RU的 子载波上的信息比特的顺序。星座点映射器用于根据RU的调制阶数，将交织器输出的信息比特映射到在子载波上。示例来说，若RU的调制阶数为6，则星座点映射器将6个信息比特映射到子载波的一个点上。之后，再对子载波进行循环移位分集处理。在上述BICM系统中，可以通过级联交织器增加信道编码增益，从而有效提高系统传输可靠度。需要说明的是，图3中示例性示出了系统框架图，在实际应用中，图中所示的器件可以是一个或者多个。以星座点映射器为例，图3中示例出了一个星座点映射器，但在实际应用中，该系统可以包括多个星座点映射器，来实现星座点映射器所实现的功能。
以下对交织器(可理解为传统交织器)进行进一步的介绍。如图3所示，交织器串行级联在BCC编码器和星座点映射器之间，交织器用于对OFDM符号的信息比特进行交织操作以获得频域编码分集。换句话说，交织器可以将OFDM符号的比特进行打散，避免成串出现的比特差错，从而提高信息传输可靠度。
由该交织器处理后的信息比特将承载在一个RU的子载波上，换句话说，该交织器与一个RU具有对应关系。交织器的行数和列数可以由该交织器对应的RU的子载波数目确定。示例性的，N COL为交织器的列数，N ROW为交织器的行数。具体的，N ROW＝x·N BPSCS，x·N COL＝N SD。其中，x为一个正整数，N BPSCS是交织器对应的RU的调制阶数，N SD(Number of data subcarriers)是交织器对应的RU的有效(或称为数据)子载波数目。在一种可能的实现方式中，协议中可以规定不同子载波数目的RU对应的交织器的行数和列数。可参见表1，表1示出了IEEE802.11ax标准中规定的BCC交织器参数(BCC interleaver parameters)。
表1
Figure PCTCN2021097485-appb-000001
Figure PCTCN2021097485-appb-000002
其中，N ROT是频率旋转的参数(parameter for the frequency rotation)。示例性的，26-tone RU对应的交织器的行数可以为3×N BPSCS、列数为8，x·N COL＝3×8＝24，24为26-tone RU的有效子载波数。52-tone RU对应的交织器的行数可以为3×N BPSCS、列数为16，x·N COL＝3×16＝48，48为52-tone RU的有效子载波数。
示例性的，该交织器可以由三个交织器(示例为交织器1、交织器2、交织器3)串行级联组成。接下来对这三个交织器进行进一步介绍。需要说明的是，这三个交织器的行数相同，列数相同，均由交织器对应的RU的子载波数目确定。
参见图4，是本申请实施例提供的一种交织器的示意图。具体的，图4左示意了交织器1按行输入信息比特，图4右示意了交织器1按列输出信息比特。交织器1用于按照行进列出的方式打乱相邻的信息比特的顺序。在图4中，一个圆点代表一个信息比特。具体的，交织器1用于按行依次输入信息比特，即，按照第一行、第二行、…、第N ROW行的顺序，一行填满信息比特之后再填入下一行；之后再按列依次输出信息比特，即，按照第一列、第二列、…、第N COL列的顺序，一列读取完信息比特之后再读取下一列。通过这种方式可以将相邻的信息比特映射到不相邻的OFDM子载波上。
示例性的，交织器1的参数为(N ROW,N COL)。令交织前的序列为X(x 0，x 1…，x k，…)交织后的序列为W，(W 0，W 1…，W i，…)，交织前后的比特分别为x k(即交织前的序列X中的第k+1个信息比特)和w i(即交织后的序列W中的第i+1个信息比特)，则交织器1的交织公式如公式1-1所示。可以理解为，交织公式可以指示同一个信息比特，在交织前后在序列中所处的位置关系。
Figure PCTCN2021097485-appb-000003
参见图5，是本申请实施例提供的又一种交织器的示意图。其中，图5左示意了交织器2未处理信息比特之前，各个信息比特的顺序；图5右示意了交织器2处理信息比特之后，各个信息比特的顺序。交织器2用于接收交织器1按列输出的信息比特，且对所述信息比特进行交错映射；之后，若存在交织器3，则交织器2将处理后的信息比特输入交织器3，若不存在交织器3，则交织器2将处理后的信息比特输入星座点映射器。其中，交错映射 的含义是打乱每s个相邻信息比特中各个信息比特的顺序，具体方式可以是在相邻两列信息比特中的后一列进行向下循环移位。其中，s＝max{1,m/2}，m＝log 2M，M为星座点调制阶数。通过这种方式，可以将相邻的信息比特交错地映射到星座图中低有效位(LSB)和高有效位(MSB)，避免信息比特连续映射于低有效位。
图5所示的示例中，m＝log 2M＝log 264＝6，s＝max{1,m/2}＝3。交织器2用于打乱每3个相邻信息比特中各个信息比特的顺序。在图5中，一个圆点代表一个信息比特，需要说明的是，不同形式的小圆点仅用于区分每3个相邻信息比特中的不同信息比特，相同形式的小圆点不代表信息比特相同。示例性的，在交织过程中，可以将相邻的3个信息比特视为一个小组，位于第一行的前三个信息比特与第二行的前三个信息比特相比，第一个信息比特向下移动了一位，成为了第二个信息比特，第二个信息比特向下移动了一位，成为了第三个信息比特，第三个信息比特向下移动了一位，由于不存在第四位，成为了第一个信息比特。相似的，第一行的其他信息比特也做了相同的处理。另外，第三行的信息比特相比于第二行进行了相似的向下循环移位。
示例性的，令交织前的序列为H(H 0，H 1…，H k，…)交织后的序列为Y，(Y 0，Y 1…，Y j，…)，交织前后的比特分别为H k(即交织前的序列H中的第k+1个信息比特)和Y j(即交织后的序列Y中的第j+1个信息比特)，则交织器2的交织公式如公式1-2所示。
Figure PCTCN2021097485-appb-000004
其中，N CBPSS为每个空间数据流的编码比特数。
接下来对交织器3进行介绍。具体的，若交织器对应的RU上有至少两个空间数据流，那么存在交织器3，交织器3连接星座点映射器；若交织器对应的RU上只有一个空间数据流，那么交织器中仅包含交织器1和交织器2，交织器2连接星座点映射器。空间数据流是流解析器将信息比特划分成多个并行后产生的不同数据流。
交织器3用于对至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流。示例性的， RU上有空间数据流A和空间数据流B，第一空间数据流可以为空间数据流A，交织器3对空间数据流B进行频域旋转。
示例性的，令交织前的序列为Q(Q 0，Q 1…，Q k，…)交织后的序列为Z，(Z 0，Z 1…，Z r，…)，交织前后的比特分别为Q k(即交织前的序列Q中的第k+1个信息比特)和Z r(即交织后的序列Z中的第r+1个信息比特)，则交织器3的交织公式可以如公式1-3所示。
Figure PCTCN2021097485-appb-000005
其中，i SS表示当前空间数据流的序号，N CBPSS为每个空间数据流的编码比特数。N ROT是频率旋转的参数。m＝log 2M，M为星座点调制阶数。
为了进一步提升无线通信系统的分配灵活性和频谱利用率，在一个用户可以被分配多个RU的情况下，同一用户的多个RU可以配置不同的调制编码策略(Modulation and Coding Scheme，MCS)，也即是说，这多个RU支持不等调制(Unequal Modulation，UEQM)。现阶段，一个交织器仅支持处理一种调制方式的RU。为了处理具有不同MCS的多RU的信息比特，将分别对多RU中的每个RU的信息比特利用单独的交织器进行交织。
参见图6，图6是本申请实施例提供的一种交织系统的示意图。图6中包括两级处理单元，第一级处理单元利用比特分解器根据用户的不同RU交错分配信息比特，第二级处理单元利用多个逐个RU交织器对各个RU的信息比特进行交织。其中，一个逐个RU交织器可以参照上述的介绍，可以包含交织器1和交织器2、或者可以包含交织器1、交织器2和交织器3。在这种方式中，需要针对分配给单个用户的不同RU设计多个逐个RU交织器(per RU interleaver)，一个逐个RU交织器与一个RU相对应，一个逐个RU交织器支持对应的RU的MCS，即可以实现多RU的UEQM。对于一个用户而言，这种方式需要该用户设备并行支持多个RU交织器，硬件成本较大。
下面结合上述内容中介绍的数据通信系统、STA以及AP，对本申请实施例提供的一种支持不等调制的交织器进行介绍。该方法可以基于图1所示的数据通信系统来实现，使用该交织器的通信设备可以是图1所示的数据通信系统中的STA，还可以是图1所示的数据通信系统中的AP。经过交织器处理之后的信息可以在STA与STA之间，AP与AP之间，以及STA与AP之间进行传输。需要说明的是，在信息发送端可以利用本申请实施例介绍的交织器对信息比特进行处理；对应的，在信息接收端可以利用与该交织器对应的解交织器对信息比特进行解析，解交织过程将是交织操作的逆操作。在另一种可能的实现方式中，使用该交织器的通信设备还可以是多链路设备(multi-link device，MLD)。
首先，对本申请实施例提供的交织器所应用的实现BICM的系统进行介绍。参见图7， 图7是本申请实施例提供的又一种实现BICM的系统的示意图。该系统包括编码器、流解析器、比特分配器、交织器、比特解析器以及星座点映射器等装置组成。其中，流解析器用于对数据流进行划分。比特分配器用于选取一定数目的信息比特输入交织器。比特解析器用于将一流信息比特分散在多个RU上输入星座点映射器。在支持UEQM的情境下，这些模块均需要考虑RU不同的调制方式。例如，对于星座点映射器而言，当调制阶数为4时，每4比特映射为一个星座点，当调制阶数为6时，每6比特映射为一个星座点。又例如，流解析器可以根据分配的多个RU对应的子载波数与调制阶数对信息比特进行截取。另外，在该示意图中，也可以是单一的星座点映射器，即将图7中的并行映射改为串行映射。
接下来，再对本申请实施例提供的交织器进行进一步介绍。具体的，以交织器所在的用户设备被分配了第一RU和第二RU为例进行介绍，所述第一RU的调制方式与所述第二RU的调制方式不同。交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序。
本申请实施例提供的交织器可以包括第一交织器和第二交织器。其中，所述第一交织器的作用可以参照上述内容中对传统交织器中的交织器1的介绍。第一交织器用于按照行进列出的方式打乱相邻的信息比特的顺序。在一些实施例中，所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值。其中，所述N 1是由所述第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由所述第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数。可以理解为，M 1是上述内容中介绍的第一RU对应的传统交织器的列数，N 1是上述内容中介绍的第一RU对应的传统交织器的行数；M 2是上述内容中介绍的第二RU对应的传统交织器的列数，N 2是上述内容中介绍的第二RU对应的传统交织器的行数。在一种可能的实现方式中，协议中可以规定不同子载波数目的RU对应的交织器的行数和列数。
具体的，所述第一交织器用于按行输入第一单元的信息比特和第二单元的信息比特。其中，所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值。所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值。所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的信息比特的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的信息比特的第一列为所述第一交织器的第M 1+1列。其中，所述有效信息比特为包含有信息量的比特。这些有效信息比特是经过编码器编码，实际输入交织器的信息比特，之后将承载在子载波上。
需要说明的是，在实际应用中，第一交织器可以硬件或者软件，或者软硬结合的方式实现对第一单元的信息比特和第二单元的信息比特的输入和输出。在一种可能的实现方式中，以硬件的方式实现，第一交织器可以分为第一部分和第二部分，第一部分用于输入第一单元的信息比特，第二部分用于输入第二单元的信息比特。在另一种可能的实现方式中，以软件的方式实现，第一交织器按照矩阵的方式确定自身可以输入的每个信息比特的坐标， 第一交织器可以根据第一单元的信息比特的行数和列数，确定第一单元的信息比特的坐标值；根据第二单元的信息比特的行数和列数确定第二单元的信息比特的坐标值。
参见图8，图8是本申请实施例提供的一种第一交织器的示意图。在图8的示例中，第一RU的子载波数大于第二RU的子载波数，N 1大于N 2。N PBSCS1是第一RU的调制阶数，N PBSCS2是第二RU的调制阶数。图8中的一个圆点可以代表一个有效信息比特，标注为0的部分为无效信息比特，这些比特可以为0；或者，这部分可以为空，不包含任何信息比特。后续内容中相似的符号可参照此处含义，后续不再赘述。第一单元和第二单元可以参照图8中虚线框所示。第一单元指示了第一单元的信息比特所占据的部分，第一单元指示了第二单元的信息比特所占据的部分。第一单元的有效信息比特的列数为M 1+M 2，第一单元的有效信息比特的行数为所述N 2。第二单元的有效信息比特的列数为所述M 1，第二单元的有效信息比特的行数为所述N 1-N 2。所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的信息比特的第一列为所述交织器的第一列。在一种可能的实现方式中，第二单元的信息比特中可以存在无效信息比特，那么，第二单元可以为图8中所示的第二单元所在的虚线框部分和标注为0的部分共同组成的部分。
参见图9，图9是本申请实施例提供的又一种第一交织器的示意图。在图9的示例中，第一RU的子载波数小于第二RU的子载波数，N 1小于N 2。N PBSCS1是第一RU的调制阶数，N PBSCS2是第二RU的调制阶数。第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1。第二单元的有效信息比特的列数为所述M 2，所述第二单元的有效信息比特的行数为所述N 2-N 1。所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的信息比特的第一列为所述第一交织器的第M 1+1列。相似的，第二单元的信息比特中可以存在无效信息比特，那么，第二单元可以为图9中所示的第二单元所在的虚线框部分和标注为0的部分共同组成的部分。
上述示例中，以交织器处理第一RU和第二RU对应的信息比特为例进行介绍。在实际应用过程中，若用户设备被分配有N RU个RU，那么交织器的行数可以为这N RU个RU对应的多个传统交织器的行数中最大值，即x n·N PBSCSn的最大值，此处，n为RU的索引，N RU为大于1的正整数，N PBSCSn为第n个RU的调制阶数；交织器的列数可以理解为
Figure PCTCN2021097485-appb-000006
N COLn为第n个RU对应的传统交织器的列数。
在一些实施例中，当为第一个RU时，也就是输入序列序号k位于左边矩阵块时，第一个RU输出的序号i 1可以如公式1-4和公式1-5所示。公式1-4和公式1-5中的字母的含义可参照上述内容中的介绍。
Figure PCTCN2021097485-appb-000007
Figure PCTCN2021097485-appb-000008
同理，当为第二个RU时，也就是输入序列序号k位于右边矩阵块时，第一个RU输出的序号i 2可以如公式1-6和公式1-7所示。公式1-6和公式1-7中的字母的含义可参照上述内容中的介绍。
Figure PCTCN2021097485-appb-000009
Figure PCTCN2021097485-appb-000010
接下来，对第二交织器进行介绍。第二交织器的作用可以参照上述内容中对传统交织器中的交织器2的介绍。第二交织器用于接收第一交织器按列输出的有效信息比特，且对这些有效信息比特进行交错映射。之后，若存在第三交织器，则将处理后的信息比特输入第三交织器，若不存在第三交织器，则将处理后的信息比特输入比特解析器。
第二交织器用于对第三单元的信息比特和第四单元的信息比特进行交错映射，具体的：所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1。所述第二交织器，还用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2。所述第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
需要说明的是，在实际应用中，第二交织器可以硬件或者软件，或者软硬结合的方式实现对第三单元的信息比特和第四单元的信息比特的输入和输出。在一种可能的实现方式中，以硬件的方式实现，第二交织器可以分为第一部分和第二部分，第一部分用于输入第三单元的信息比特，第二部分用于输入第四单元的信息比特。在另一种可能的实现方式中，以软件的方式实现，第二交织器按照矩阵的方式确定自身可以输入的每个信息比特的坐标，第二交织器可以根据第三单元的信息比特的行数和列数，确定第三单元的信息比特的坐标值；根据第四单元的信息比特的行数和列数确定第四单元的信息比特的坐标值。
对应于上述内容中介绍的第一交织器的示例，对第二交织器进行举例说明。对应于上述图8所示的第一交织器，可参照图10，图10是本申请实施例提供的一种第二交织器的示意图。第三单元和第四单元可以参照图10中的虚线框所示。第三单元指示了第三单元的信息比特所占据的部分，第四单元指示了第四单元的信息比特所占据的部分。该第二交织 器用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射。该第二交织器进行交错映射的方式可以参照上述内容中的介绍。在该示例中，第一RU的调制阶数为6，第二交织器按照向下循环移位的方式，打乱第三单元中每3个相邻信息比特中各个信息比特的顺序。所述第四单元，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射。在该示例中，第二RU的调制阶数为4，第二交织器按照向下循环移位的方式，打乱第四单元中每2个相邻信息比特中各个信息比特的顺序。
对应于上述图9所示的第一交织器，可参照图11，图11是本申请实施例提供的又一种第二交织器的示意图。第三单元和第四单元可以参照图11中的虚线框所示。该第二交织器用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射。在该示例中，第一RU的调制阶数为4，第二交织器按照向下循环移位的方式，打乱第三单元中每2个相邻信息比特中各个信息比特的顺序。所述第四单元，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射。在该示例中，第二RU的调制阶数为6，第二交织器按照向下循环移位的方式，打乱第四单元中每3个相邻信息比特中各个信息比特的顺序。
在一些实施例中，所述第一RU和所述第二RU上只有一个空间数据流。在这种情况下，所述第二交织器与比特解析器连接。所述比特解析器用于接收所述第二交织器按列输出的有效信息比特，并且输出承载在所述第一RU的子载波上的信息比特和承载在所述第二RU的子载波上的信息比特。换句话说，所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。具体的，比特解析器首先接收到第三单元的信息比特，将这些信息比特输入第一RU对应的星座点映射器；之后，比特解析器再接收到第四单元的信息比特，将这些信息比特输入第二RU对应的星座点映射器。需要说明的是，无效信息比特应该舍弃，不会输入星座点映射器。
在一些实施例中，所述第一RU和所述第二RU上有至少两个空间数据流。在这种情况下，所述交织器还包括第三交织器，所述第三交织器与所述第二交织器和比特解析器连接。所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流。在一种可能的实现方式中，第三交织器可以在第一RU对应的第三单元、第二RU对应的第四单元内部分别进行频域旋转。在另一种可能的实现方式中，第三交织器也可以以整个交织器构成的矩形为单位进行频率旋转。
比特解析器，用于接收所述第三交织器按列输出的有效信息比特，并且输出承载在所述第一RU的子载波上信息比特，和承载在所述第二RU的子载波上的信息比特。换句话说，所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。比特解析器所执行的方式可以参照上述内容中的介绍，此处不再赘述。
本申请实施例还提供了另一种支持不等调制的交织器。以下对这种交织器进行介绍。
交织器可以包括第一交织器和第二交织器。具体的，以交织器处理的用户设备被分配了第一RU和第二RU为例进行介绍，所述第一RU的调制方式与所述第二RU的调制方式不同。所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序。需要说明的是，第一交织器和第二交织器的功能可以参考上述内容中对第一种支持不等调制的交织器的介绍。
所述第一交织器，用于按行输入信息比特，所述第一交织的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值。
所述第一交织器用于按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特，其中：所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特。所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i。
一个第一单元与一个第二单元上下相邻。第一单元指示了第一单元的信息比特所占据的部分，第一单元指示了第二单元的信息比特所占据的部分。第a个所述第一单元的信息比特第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数。第b个所述第二单元的信息比特的第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
参见图12，图12是本申请实施例提供的又一种第一交织器的示意图。在图12的示例中，N PBSCS1(示例为6)是第一RU的调制阶数，N PBSCS2(示例为4)是第二RU的调制阶数。第一单元和第二单元可以参照图12中虚线框所示。第一交织器的列数为N COL_MRU，第一交织器的行数为N ROW_MRU。具体的，该第一交织器包括3个第一单元和3个第二单元，一个第一单元与一个第二单元上下相邻。第一个第一单元的信息比特的第一行为第一交织器的第一行，第二个第一单元的信息比特的第一行为第一交织器的第1×6+1×4+1＝11行，第三个第一单元的信息比特的第一行为第一交织器的第2×6+2×4+1＝21行。另外，第一个第一单元的信息比特、第二个第一单元的信息比特的列数和第三个第一单元的信息比特的列数均与第一交织器的列数相同。第一个第二单元的信息比特的第一行为第一交织器的第1×6+1＝7行，第二个第二单元的信息比特的第一行为第一交织器的第2×6+1×4+1＝17行，第三个第二单元的信息比特的第一行为第一交织器的第3×6+2×4+1＝27行。
另外，第一个第二单元的有效信息比特、第二个第二单元的有效信息比特的列数与第一交织器的列数相同，第三个第一单元的有效信息比特的列数小于第一交织器的列数。第三个第一单元的有效信息比特的列数小于第一交织器的列数，是由于第二RU的子载波数小于第一RU的子载波数。可以理解为，所述i个所述第一单元的有效信息比特的总数为第一RU对应的传统交织器包含的信息比特的总数；所述i个所述第二单元的有效信息比特的总数为第二RU对应的传统交织器包含的信息比特的总数。不能填充满第一交织器的部分可以填充无效信息比特，这些比特可以为0，在这种情况下，第三个第一单元的信息比特 的列数等于第一交织器的列数，但第三个第一单元的有效信息比特的列数小于第一交织器的列数；或者，这部分可以为空，不包含任何信息比特。图12所示意的方式为按照行的形式对应未使用的子载波，换句话说，第二单元的信息比特优先填满行。
在一些实施例中，还可以按照列的形式对应未使用的子载波，换句话说，第二单元的信息比特优先填满列。这种方式可参见图13，图13是本申请实施例提供的又一种第一交织器的示意图。在图13的示例中，第一个第二单元的有效信息比特的列数与第一交织器的列数相同，第二个第二单元和第三个第一单元的有效信息比特的列数小于第一交织器的列数。
接下来，对这种交织器中的第二交织器进行介绍。第二交织器用于接收所述第一交织器按列输出的信息比特，且对所述信息比特进行交错映射。之后，若存在第三交织器，则将处理后的信息比特输入第三交织器，若不存在第三交织器，则将处理后的信息比特输入比特解析器。
所述第二交织器用于对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射。具体的：所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特。所述第二交织器，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i。该第二交织器进行交错映射的方式可以参照上述内容中的介绍。
一个第三单元与一个第四单元上下相邻。第三单元指示了第三单元的信息比特所占据的部分，第四单元指示了第四单元的信息比特所占据的部分。具体的，第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数。第d个所述第四单元的信息比特的第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
对应于上述内容中介绍的第一交织器的示例，对第二交织器进行举例说明。对应于上述图12所示的第一交织器，可参照图14，图14是本申请实施例提供的一种第二交织器的示意图。第三单元和第四单元可以参照图14中的虚线框所示。该第二交织器用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射。该第二交织器进行交错映射的方式可以参照上述内容中的介绍。在该示例中，第一RU的调制阶数为6，第二交织器按照向下循环移位的方式，打乱第三单元中每3个相邻信息比特中各个信息比特的顺序。所述第四单元，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射。在该示例中，第二RU的调制阶数为4，第二交织器按照向下循环移位的方式，打乱第四单元中每2个相邻信息比特中各个信息比特的顺序。
对应于上述图13所示的第一交织器，可参照图15，图15是本申请实施例提供的又一种第二交织器的示意图。第三单元和第四单元可以参照图15中的虚线框所示。该第二交织 器用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射。在该示例中，第一RU的调制阶数为6，第二交织器按照向下循环移位的方式，打乱第三单元中每3个相邻信息比特中各个信息比特的顺序。所述第四单元，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射。在该示例中，第二RU的调制阶数为4，第二交织器按照向下循环移位的方式，打乱第四单元中每2个相邻信息比特中各个信息比特的顺序。
在一些实施例中，所述第一RU和所述第二RU上只有一个空间数据流。在这种情况下，所述第二交织器与比特解析器连接。所述比特解析器，用于接收所述第二交织器按列输出的有效信息比特，并且依次输出所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特。换句话说，所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特。其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。由于第一单元和第二单元是上下相邻的位置关系，比特解析器会依次循环输出n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特。具体的，比特解析器将n个比特为单位的第一信息比特输入第一RU对应的星座点映射器，将m个比特为单位的第二信息比特输入第二RU对应的星座点映射器。需要说明的是，无效信息比特应该舍弃，不会输入星座点映射器。
在另一些实施例中，所述第一RU和所述第二RU上有至少两个空间数据流。在这种情况下，所述交织器还包括第三交织器，所述第三交织器与所述第二交织器和比特解析器连接。所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流。在一种可能的实现方式中，第三交织器可以在第一RU对应的第三单元、第二RU对应的第四单元内部分别进行频域旋转。在另一种可能的实现方式中，第三交织器也可以以整个交织器构成的矩形为单位进行频率旋转。
所述比特解析器，用于接收所述第三交织器按列输出的有效信息比特，并且依次输出所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特。换句话说，所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特。比特解析器所执行的方式可以参照上述内容中的介绍，此处不再赘述。
以上介绍了支持不等调制的交织器。以下对支持不等调制的子载波映射器进行介绍。
在一种可能的实现方式中，WLAN通信系统还可以支持低密度奇偶校验码(Low Density Parity Code，LDPC)的编码方式。参见图16，图16是本申请实施例提供的又一种实现BICM的系统的示意图。该系统包括一个编码器、一个流解析器、一个星座点映射器和一个LDPC子载波映射器。其中，编码器用于将比特流或数据进行编制、转换为可用以通讯、传输和存储的信号形式(例如，数据流)。示例来说，编码器可以为一个LDPC编码 器。流解析器用于将编码后的信息比特分配到不同的数据流上。对于一条数据流而言，流解析器可以根据被分配的RU对应的子载波数与调制阶数对信息比特进行截取，再将这些信息比特输入星座点映射器。星座点映射器用于根据RU的调制阶数，将信息比特映射到在子载波上。之后，LDPC子载波映射器可以将已有的子载波顺序进行打散，改变其原有的分布顺序，避免成串出现的比特差错，从而提高信息传输可靠度。之后，再对子载波进行空时块编码、循环移位多样性处理，等等。在上述BICM系统中，可以通过LDPC子载波映射器增加分集增益，从而有效提高系统传输可靠度。
示例性的，设n个OFDM符号中的每个符号由N SD个有效(或称为数据)子载波组成，n为OFDM符号(SYM)的索引，l为N SS个流的索引。LDPC子载波映射器的输入为d k,l,n，输出为d′ k,l,n，LDPC的子载波映射方式如公式1-8所示。
d' k,l,n＝d t(k),l,n    1-8
其中，
Figure PCTCN2021097485-appb-000011
Figure PCTCN2021097485-appb-000012
N SD(Number of data subcarriers)是有效的子载波数。D TM为LDPC子载波映射距离参数(LDPC tone-mapping distance parameter)。
在一个用户可以被分配多个RU的情况下，同一用户的多个RU可以配置不同的调制编码策略。现阶段，一个LDPC子载波映射器仅支持处理一种调制方式的RU。为了处理具有不同MCS的多RU的信息比特，将分别对多RU中的每个RU的信息比特利用单独的LDPC子载波映射器进行处理。
参见图17，图17是本申请实施例提供的一种处理系统的示意图。图中包括分为两级处理单元，第一级处理单元利用比特分解器根据用户的不同RU交错分配信息比特，第二级处理单元利用多个星座点映射器和LDPC子载波映射器对各个RU对应的子载波进行处理。在这种方式中，需要针对分配给单个用户的不同RU设计多个LDPC子载波映射器，一个LDPC子载波映射器与一个RU相对应，一个LDPC子载波映射器支持对应的RU的MCS，即可以实现多RU的UEQM。对于一个用户而言，这种方式需要该用户设备并行支持多个LDPC子载波映射器，硬件成本较大。
下面结合上述内容中介绍的数据通信系统、STA以及AP，对本申请实施例提供的一种支持不等调制的LDPC子载波映射器进行介绍。该方法可以基于图1所示的数据通信系统来实现，使用该LDPC子载波映射器的通信设备可以是图1所示的数据通信系统中的STA，还可以是图1所示的数据通信系统中的AP。经过LDPC子载波映射器处理之后的信息可以在STA与STA之间，AP与AP之间，以及STA与AP之间进行传输。在另一种可能的实现方式中，使用该LDPC子载波映射器的通信设备还可以是多链路设备(multi-link device，MLD)。
首先，对本申请实施例提供的LDPC子载波映射器所应用的实现BICM的系统进行介绍。参见图18，图18是本申请实施例提供的又一种实现BICM的系统的示意图。该系统 包括LDPC编码器、流解析器、比特解析器、星座点映射器以及LDPC子载波映射器等装置组成。其中，LDPC编码器用于利用LDPC编码方式将比特流或数据进行编制、转换为可用以通讯、传输和存储的信号形式(例如，数据流)。流解析器用于对数据流进行划分。比特解析器用于将一流信息比特分散在多个RU上输入星座点映射器。在支持UEQM的情境下，这些模块均需要考虑RU不同的调制方式。例如，比特解析器需要考虑RU的子载波数以及调制阶数；星座点映射器也应当考虑不同MCS导致的调制阶数的变化。例如，当调制阶数为4时，每4个信息比特映射为一个星座点，当调制阶数为6时，每6个信息比特映射为一个星座点。另外，上图中的并行的星座点映射器也可以改为一个统一的星座点映射器，以减轻设备复杂度。
接下来，再对本申请实施例提供的LDPC子载波映射器进行进一步介绍。具体的，以LDPC子载波映射器所在的用户设备被分配了第一RU、第二RU以及第三RU为例进行介绍，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同。所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射。
参见图19，是本申请实施例提供的一种LDPC子载波映射器的示意图。所述LDPC子载波映射器包括第一单元和第二单元。其中，所述第一单元，用于按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射。所述第二单元，用于按照所述第三RU的调制方式对所述第三RU的子载波进行映射。需要说明的是，第一RU的子载波和所述第二RU的子载波之间可以进行子载波映射，第三RU的子载波内部进行子载波映射。映射的方式可以参照上述内容中的介绍。
需要说明的是，在实际应用中，LDPC子载波映射器可以硬件或者软件，或者软硬结合的方式实现第一单元和第二单元的处理。在一种可能的实现方式中，以硬件的方式实现，LDPC子载波映射器可以分为第一单元和第二单元，第一单元按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射，第二单元按照所述第三RU的调制方式对所述第三RU的子载波进行映射。在另一种可能的实现方式中，以软件的方式实现，LDPC子载波映射器按照矩阵的方式确定自身可以输入的每个子载波的坐标，第一单元根据第一RU的子载波和第二RU的子载波所处的坐标值，按照所述第一RU的调制方式对所述第一RU的子载波和第二RU的子载波进行处理；第二单元根据第三RU的子载波所处的坐标值，按照所述第三RU的调制方式对所述第三RU的子载波进行处理。
在另一示例中，以LDPC子载波映射器所在的用户设备被分配了第四RU、第五RU、第六RU以及第七RU为例进行介绍，所述第四RU的调制方式与所述第六RU的调制方式相同，所述第五RU的调制方式与所述第七RU的调制方式相同，且所述第四RU的调制方式与所述第五RU的调制方式不同。所述子载波映射器用于对第四RU、第五RU、第六RU和第七RU的子载波进行映射。
参见图20，是本申请实施例提供的又一种LDPC子载波映射器的示意图。所述LDPC子载波映射器包括第三单元和第四单元。其中，所述第三单元，用于按照所述第四RU的调制方式对所述第四RU的子载波和所述第六RU的子载波进行映射；所述第四单元，用于按照所述第五RU的调制方式对所述第五RU的子载波和所述第七RU的子载波进行映射。 需要说明的是，第四RU的子载波和所述第六RU的子载波之间可以进行子载波映射，第五RU的子载波和所述第七RU的子载波之间可以进行子载波映射。
也即是说，在LDPC子载波映射器中，在相同调制方式的RU的子载波之间进行LDPC子载波映射，而不同调制方式的RU的子载波之间不进行子载波映射。在该LDPC子载波映射器中，调制方式相同的RU的子载波之间进行子载波映射，可以增大子载波打散的范围，提升了分集增益。需要说明的是，调制方式相同但码率不同的两个RU的子载波仍可以合并在一起进行子载波映射。换而言之，该方式只对调制方式进行限定。
以下结合上述内容中介绍的各种装置，对本申请实施例提供的支持不等调制的交织方法以及子载波映射方法进行介绍。
参见图21，是本申请实施例提供的一种支持不等调制的交织方法的流程图。所述方法应用于交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，所述方法包括：
S101、所述第一交织器按行输入信息比特。
S102、所述第二交织器接收所述第一交织器按列输出的所述信息比特，且对所述信息比特进行交错映射。
在一种实施方式中：
所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值。其中，所述N 1是由第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数。
在一些实施例中，所述第一交织器按行输入信息比特，包括：所述第一交织器按行输入第一单元的信息比特和第二单元的信息比特；其中，所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值，所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值；所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的第一列为所述第一交织器的第M 1+1列。
在一些实施例中，所述第二交织器对所述信息比特进行交错映射，包括：所述第二交织器对第三单元的信息比特和第四单元的信息比特进行交错映射；其中，所述第二交织器对第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1；所述有效信息比特为包含有信息量的比特；所述第二交织器对第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2；所述 第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
在一些实施例中，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上，所述有效信息比特为包含有信息量的比特。
在一些实施例中，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述方法还包括：所述第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述有效信息比特为包含有信息量的比特；所述第三交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。可选的，所述第三交织器按列输出的有效信息比特可以由第三交织器相连接的比特解析器进行处理。
需要说明的是，这种实施例中各个步骤的实现方式可以参照上述内容中的介绍。交织器可以参照上述内容中对第一种交织器的介绍。
在另一种实施方式中：
所述第一交织器的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值。
在一些实施例中，所述第一交织器按行输入信息比特，包括：所述第一交织器按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特；其中，所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i；第a个所述第一单元的信息比特的第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数；第b个所述第二单元的信息比特第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
在一些实施例中，所述第二交织器对所述信息比特进行交错映射，包括：所述第二交织器对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射；其中，所述第二交织器对所述i个第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；所述第二交织器对所述i个第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i；第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数；第d个所述第四单元的信息比 特第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
在一些实施例中，所述第一RU和所述第二RU上只有一个空间数据流；所述第二交织器按列输出的有效信息比特经由比特解析处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
在一些实施例中，所述第一RU和所述第二RU上有至少两个空间数据流，所述方法还包括：所述第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述第三交织器按列输出的有效信息比特经由比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
需要说明的是，这种实施例中各个步骤的实现方式可以参照上述内容中的介绍。交织器可以参照上述内容中对第二种交织器的介绍。
通过图21所示的交织方法，可以通过一个统一的交织器对具有不同的调制编码策略的多个RU的信息比特进行交织，简化通信设备的硬件结构，降低硬件成本。
参见图22，图22是本申请实施例提供的一种支持不等调制的子载波映射方法。所述方法应用于所述子载波映射器，所述子载波映射器包括第一单元和第二单元，所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同。所述方法包括：
S201、所述第一单元按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射。
S202、所述第二单元按照所述第三RU的调制方式对所述第三RU的子载波进行映射。
需要说明的是，这种实施例中各个步骤的实现方式可以参照上述内容中的介绍。子载波映射器可以参照上述内容中对子载波映射器的介绍。
通过图22所示的子载波映射方法，可以通过一个统一的子载波映射器对具有不同的调制编码策略的多个RU的信息比特进行交织，简化通信设备的硬件结构，降低硬件成本。
本领域技术人员还可以了解到本申请实施例列出的各种说明性逻辑块(illustrative logical block)和步骤(step)可以通过电子硬件、电脑软件，或两者的结合进行实现。这样的功能是通过硬件还是软件来实现取决于特定的应用和整个系统的设计要求。本领域技术人员可以对于每种特定的应用，可以使用各种方法实现所述的功能，但这种实现不应被理解为超出本申请实施例保护的范围。
本申请还提供了一种计算机可读存储介质，其上存储有计算机程序，该计算机可读存 储介质被计算机执行时实现上述任一方法实施例的功能。
本申请还提供了一种计算机程序产品，该计算机程序产品被计算机执行时实现上述任一方法实施例的功能。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，高密度数字视频光盘(digital video disc，DVD))、或者半导体介质(例如，固态硬盘(solid state disk，SSD))等。
本领域普通技术人员可以理解：本申请中涉及的第一、第二等各种数字编号仅为描述方便进行的区分，并不用来限制本申请实施例的范围，先后顺序。
本申请中各表所示的对应关系可以被配置，也可以是预定义的。各表中的信息的取值仅仅是举例，可以配置为其他值，本申请并不限定。在配置信息与各参数的对应关系时，并不一定要求必须配置各表中示意出的所有对应关系。例如，本申请中的表格中，某些行示出的对应关系也可以不配置。又例如，可以基于上述表格做适当的变形调整，例如，拆分，合并等等。上述各表中标题示出参数的名称也可以采用通信装置可理解的其他名称，其参数的取值或表示方式也可以通信装置可理解的其他取值或表示方式。上述各表在实现时，也可以采用其他的数据结构，例如可以采用数组、队列、容器、栈、线性表、指针、链表、树、图、结构体、类、堆、散列表或哈希表等。
本申请中的预定义可以理解为定义、预先定义、存储、预存储、预协商、预配置、固化、或预烧制。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (24)

  1. 一种支持不等调制的交织器，其特征在于，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，其中：
    所述第一交织器，用于按行输入信息比特，所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值；其中，所述N 1是由所述第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由所述第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数；
    所述第二交织器，用于接收所述第一交织器按列输出的所述信息比特，且对所述信息比特进行交错映射。
  2. 根据权利要求1所述的交织器，其特征在于，所述第一交织器用于按行输入第一单元的信息比特和第二单元的信息比特，其中：
    所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值，所述有效信息比特为包含有信息量的比特；
    所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值；
    所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的信息比特的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的信息比特的第一列为所述第一交织器的第M 1+1列。
  3. 根据权利要求1或2所述的交织器，其特征在于，所述第二交织器用于对第三单元的信息比特和第四单元的信息比特进行交错映射，具体的：
    所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1；所述有效信息比特为包含有信息量的比特；
    所述第二交织器，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2；
    所述第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
  4. 根据权利要求1-3任一项所述的交织器，其特征在于，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器与比特解析器连接，所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU 的子载波上，所述有效信息比特为包含有信息量的比特。
  5. 根据权利要求1-3任一项所述的交织器，其特征在于，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述第三交织器与所述第二交织器和比特解析器连接：
    所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述有效信息比特为包含有信息量的比特；
    所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。
  6. 一种支持不等调制的交织器，其特征在于，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，其中：
    所述第一交织器，用于按行输入信息比特，所述第一交织的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值；
    所述第二交织器，用于接收所述第一交织器按列输出的信息比特，且对所述信息比特进行交错映射。
  7. 根据权利要求6所述的交织器，其特征在于，所述第一交织器用于按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特，其中：
    所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；
    所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i；
    第a个所述第一单元的信息比特的第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数；
    第b个所述第二单元的信息比特第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
  8. 根据权利要求6或7所述的交织器，其特征在于，所述第二交织器用于对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射，具体的：
    所述第二交织器，用于根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数， 所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；
    所述第二交织器，用于根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i；
    第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数；
    第d个所述第四单元的信息比特第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
  9. 根据权利要求6-8任一项所述的交织器，其特征在于，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器与比特解析器连接；
    所述第二交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
  10. 根据权利要求6-8任一项所述的交织器，其特征在于，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述第三交织器用于连接所述第二交织器和比特解析器；
    所述第三交织器，用于接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；
    所述第三交织器按列输出的有效信息比特经由所述比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
  11. 一种支持不等调制的子载波映射器，其特征在于，所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同，所述子载波映射器包括第一单元和第二单元，其中：
    所述第一单元，用于按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射；
    所述第二单元，用于按照所述第三RU的调制方式对所述第三RU的子载波进行映射。
  12. 一种支持不等调制的交织方法，其特征在于，所述方法应用于交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第 一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，所述方法包括：
    所述第一交织器按行输入信息比特，所述第一交织器的列数为M 1+M 2，所述第一交织器的行数为N 1和N 2中的最大值；其中，所述N 1是由第一RU的子载波数确定的行数，所述M 1是由所述第一RU的子载波数确定的列数，所述N 2是由第二RU的子载波数确定的行数，所述M 2是由所述第二RU的子载波数确定的列数，所述N 1、所述M 1、所述N 2和所述M 2为正整数；
    所述第二交织器接收所述第一交织器按列输出的所述信息比特，且对所述信息比特进行交错映射。
  13. 根据权利要求12所述的方法，其特征在于，所述第一交织器按行输入信息比特，包括：
    所述第一交织器按行输入第一单元的信息比特和第二单元的信息比特；
    其中，所述第一单元的有效信息比特的列数为M 1+M 2，所述第一单元的有效信息比特的行数为所述N 1和所述N 2中的最小值，所述有效信息比特为包含有信息量的比特；
    所述第二单元的有效信息比特的列数为所述M 1或者所述M 2，所述第二单元的有效信息比特的行数为所述N 1与所述N 2的差的绝对值；
    所述第二单元的信息比特的第一行为所述第一交织器的第N 2+1行，所述第二单元的第一列为所述交织器的第一列；或者，所述第二单元的信息比特的第一行为所述第一交织器的第N 1+1行，所述第二单元的第一列为所述第一交织器的第M 1+1列。
  14. 根据权利要求12或13所述的方法，其特征在于，所述第二交织器对所述信息比特进行交错映射，包括：
    所述第二交织器对第三单元的信息比特和第四单元的信息比特进行交错映射；
    其中，所述第二交织器对第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述第三单元的有效信息比特的列数为所述M 1，所述第三单元的有效信息比特的行数为所述N 1；所述有效信息比特为包含有信息量的比特；
    所述第二交织器对第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数为所述M 2，所述第四单元的有效信息比特的行数为所述N 2；
    所述第四单元的信息比特的第一列为所述第二交织器的第M 1+1列。
  15. 根据权利要求12-14任一项所述的方法，其特征在于，所述第一RU和所述第二RU上只有一个空间数据流，所述第二交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上，所述有效信息比特为包含有信息量的比特。
  16. 根据权利要求12-14任一项所述的方法，其特征在于，所述第一RU和所述第二RU上有至少两个空间数据流，所述交织器还包括第三交织器，所述方法还包括：
    所述第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；所述有效信息比特为包含有信息量的比特；
    所述第三交织器按列输出的有效信息比特经由比特解析处理后，承载在所述第一RU的子载波和所述第二RU的子载波上。
  17. 一种支持不等调制的交织方法，其特征在于，所述方法应用于交织器，所述交织器包括第一交织器，第二交织器，所述交织器用于对信息比特进行交织，以确定承载在第一RU的子载波和第二RU的子载波上的信息比特的顺序，所述第一RU的调制方式与所述第二RU的调制方式不同，所述方法包括：
    所述第一交织器按行输入信息比特，所述第一交织器的行数为i×(n+m)，所述第一交织器的列数为j/i；其中，所述i为正整数，所述n为第一RU的调制阶数，所述m为第二RU的调制阶数，所述j为所述第一RU的子载波数和所述第二RU的子载波数中的最大值；
    所述第二交织器接收所述第一交织器按列输出的所述信息比特，并对所述信息比特进行交错映射。
  18. 根据权利要求17所述的方法，其特征在于，所述第一交织器按行输入信息比特，包括：
    所述第一交织器按行输入所述i个第一单元的信息比特和所述i个第二单元的信息比特；
    其中，所述第一单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第一单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；
    所述第二单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第二单元的有效信息比特的总行数为m×i；
    第a个所述第一单元的信息比特的第一行，对应的所述第一交织器的行数为：(a-1)×n+(a-1)×m+1，其中，所述a为小于等于i的正整数；
    第b个所述第二单元的信息比特第一行，对应的所述第一交织器的行数为：b×n+(b-1)×m+1，其中，所述b为小于等于i的正整数。
  19. 根据权利要求17或18所述的方法，其特征在于，所述第二交织器对所述信息比特进行交错映射，包括：
    所述第二交织器对所述i个第三单元的信息比特和所述i个第四单元的信息比特进行交错映射；
    其中，所述第二交织器对所述i个第三单元的信息比特进行交错映射包括：所述第二交织器根据所述第一RU的调制阶数对所述第三单元的有效信息比特进行交错映射；所述 第三单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第三单元的有效信息比特的总行数为n×i；所述有效信息比特为包含有信息量的比特；
    所述第二交织器对所述i个第四单元的信息比特进行交错映射包括：所述第二交织器根据所述第二RU的调制阶数对所述第四单元的有效信息比特进行交错映射；所述第四单元的有效信息比特的列数小于或者等于所述第一交织器的列数，所述i个所述第四单元的有效信息比特的总行数为m×i；
    第c个所述第三单元的信息比特的第一行，对应的所述第二交织器的行数为：(c-1)×n+(c-1)×m+1，其中，所述c为小于等于所述i的正整数；
    第d个所述第四单元的信息比特第一行，对应的所述第二交织器的行数为：d×n+(d-1)×m+1，其中，所述d为小于等于所述i的正整数。
  20. 根据权利要求17-19任一项所述的方法，其特征在于，所述第一RU和所述第二RU上只有一个空间数据流；
    所述第二交织器按列输出的有效信息比特经由比特解析处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；其中，所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
  21. 根据权利要求17-19任一项所述的方法，其特征在于，所述第一RU和所述第二RU上有至少两个空间数据流，所述方法还包括：
    第三交织器接收所述第二交织器按列输出的有效信息比特，并且对所述至少两个空间数据流中除第一空间数据流的之外的空间数据流进行频域旋转，所述第一空间数据流为所述至少两个空间数据流中的一个空间数据流；
    所述第三交织器按列输出的有效信息比特经由比特解析器处理后，依次输出为所述n个比特为单位的第一信息比特和所述m个比特为单位的第二信息比特；所述第一信息比特为承载在所述第一RU的子载波上的信息比特，所述第二信息比特为承载在所述第二RU的子载波上的信息比特。
  22. 一种支持不等调制的子载波映射方法，其特征在于，所述方法应用于所述子载波映射器，所述子载波映射器包括第一单元和第二单元，所述子载波映射器用于对第一RU、第二RU和第三RU的子载波进行映射，所述第一RU的调制方式与所述第二RU的调制方式相同，所述第一RU的调制方式与所述第三RU的调制方式不同，所述方法包括：
    所述第一单元按照所述第一RU的调制方式对所述第一RU的子载波和所述第二RU的子载波进行映射；
    所述第二单元按照所述第三RU的调制方式对所述第三RU的子载波进行映射。
  23. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质用于存储指令，当所述指令被执行时，使得如权利要求12-21任一项所述的方法被实现。
  24. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质用于存储指令，当所述指令被执行时，使得如权利要求22所述的方法被实现。
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