WO2021244266A1 - 显示基板和显示装置 - Google Patents

显示基板和显示装置 Download PDF

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Publication number
WO2021244266A1
WO2021244266A1 PCT/CN2021/094014 CN2021094014W WO2021244266A1 WO 2021244266 A1 WO2021244266 A1 WO 2021244266A1 CN 2021094014 W CN2021094014 W CN 2021094014W WO 2021244266 A1 WO2021244266 A1 WO 2021244266A1
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WIPO (PCT)
Prior art keywords
display area
pixel repeating
repeating unit
display
pixel
Prior art date
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PCT/CN2021/094014
Other languages
English (en)
French (fr)
Inventor
黄耀
杨国波
蔡建畅
吴超
邱远游
王彬艳
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP21818238.4A priority Critical patent/EP4053906A4/en
Priority to JP2022533190A priority patent/JP2023529037A/ja
Priority to US17/771,338 priority patent/US20220376028A1/en
Publication of WO2021244266A1 publication Critical patent/WO2021244266A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/351—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels comprising more than three subpixels, e.g. red-green-blue-white [RGBW]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the embodiment of the present disclosure relates to a display substrate and a display device.
  • the industry has proposed a solution called "under-screen camera” that combines a camera and a display substrate into a display device.
  • the display device includes a display substrate and a camera located under the display substrate.
  • the area of the display device with the under-screen camera can emit light and display like other areas, and has a camera function at the same time.
  • At least one embodiment of the present disclosure provides a display substrate having a first side for display and a second side opposite to the first side, and including a first display area, a second display area, and a third display area;
  • the first display area includes a plurality of first pixel repeating units arranged in an array along a first direction and a second direction, each of the first pixel repeating units includes a first light-emitting element, and the first display area It includes a light transmissive area that allows light to be transmitted between the first side and the second side of the display substrate;
  • the second display area includes a plurality of first and second sides arrayed in the first direction and the second direction.
  • each of the second pixel repeating units includes a second pixel circuit and a second light-emitting element, the second pixel circuit and the second light-emitting element are electrically connected, each Each of the fourth pixel repeating units includes a first pixel circuit;
  • the third display area includes a plurality of third pixel repeating units arranged in an array along the first direction and the second direction, each of the first The three-pixel repeating unit includes a third pixel circuit and a third light-emitting element, the third pixel circuit and the third light-emitting element are electrically connected;
  • the third display area at least partially surrounds the second display area, and the first Two display areas at least partially surround the first display area, and the second display area is axisymmetric with respect to the center line of the first display area in the second direction;
  • each of the first pixel repeating units Corresponding to a fourth pixel repeating unit, the center line of each first pixel repeating unit and the corresponding fourth pixel
  • the pitch of the first pixel repeating unit in the first direction is a1, and the pitch of the second pixel repeating unit in the first direction is a1.
  • the pitch is a1
  • the size of the first display area in the second direction is substantially equal to the size of the first display area in the first direction.
  • the first display area includes a circular display area and an annular wiring area surrounding the circular display area;
  • the gate line of the first light-emitting element in the first pixel repeating unit in each row is electrically connected to the first pixel circuit in the fourth pixel repeating unit in the same row in the first direction.
  • At least a part of the gate line extends along the first direction, at least another part of the gate line is located in the circular wiring area, and the gate line does not pass through the circular display area;
  • the data line of the first light-emitting element in each column of the first pixel repeating unit in the second direction corresponds to the first pixel in a certain column of the fourth pixel repeating unit in the second direction.
  • the circuit is electrically connected, at least a part of the data line extends along the second direction, at least another part of the data line is located in the circular routing area, and the data line does not pass through the circular display area;
  • the gate line and the data line are located on different layers.
  • the number of gate lines corresponding to each third pixel repeating unit is the same as the number of gate lines corresponding to each first pixel repeating unit.
  • the number of the gate lines corresponding to each of the first pixel repeating units is x
  • the pitch of the gate lines in the ring-shaped wiring area is c1
  • the number of the gate lines in the ring-shaped wiring area is The total radial width of the gate line is approximately x*c1*Floor(L1/b2)/2
  • the number of the data lines corresponding to each first pixel repeating unit is y
  • the data lines are The pitch in the ring-shaped wiring area is c2
  • the total radial width of the data lines in the ring-shaped wiring area is approximately y*c2*s/2.
  • the orthographic projection of the circumferentially extending main body portion of the gate line in the ring-shaped wiring area on the display substrate and the ring-shaped wiring area does not overlap, and the radial width of the ring-shaped wiring area is approximately x*c1*Floor(L1/b2) /2+y*c2*s/2.
  • the diameter of the circular display area is approximately s*a1-x*c1*Floor(L1/b2)-y*c2*s/2.
  • the orthographic projection of the circumferentially extending main body portion of the gate line in the ring-shaped wiring area on the display substrate and the ring-shaped wiring area is approximately max(x*c1*Floor(L1 /b2)/2,y*c2*s/2), where max() is the maximum value function.
  • the diameter of the circular display area is approximately s*a1-max(x*c1*Floor(L1/b2), y*c2*s).
  • the size of the second display area in the second direction is substantially equal to the size of the first display area in the second direction.
  • the size of the second display area in the second direction is larger than the size of the first display area in the second direction, and the first display area
  • the difference between the size of the second display area in the second direction and the size of the first display area in the second direction is approximately equal to 4b1.
  • the pitch of the fourth pixel repeating unit in the first direction is equal to the pitch of the second pixel repeating unit in the first direction.
  • the number of gate lines corresponding to the repeating unit is 4, and the number of data lines corresponding to each of the first pixel repeating unit is 4.
  • the number of gate lines corresponding to the repeating unit is 2, and the number of data lines corresponding to each of the first pixel repeating unit is 6.
  • the first direction and the second direction are perpendicular to each other.
  • the display substrate includes an anode layer, a source/drain electrode layer, and a transparent connection wiring layer located between the anode layer and the source/drain electrode layer.
  • the anode of the first light-emitting element is located on the anode layer
  • the transparent connection wiring is located on the transparent connection wiring layer
  • the first pixel circuit includes a thin film transistor
  • the thin film transistor includes a source and a drain
  • the At least one of the source electrode and the drain electrode of the thin film transistor is located in the source-drain metal layer
  • the anode of the first light-emitting element is connected to the source electrode of the thin film transistor through the transparent connection wiring It is electrically connected to at least one of the drains.
  • the anode of the first light-emitting element is a transparent electrode.
  • At least one embodiment of the present disclosure further provides a display device, including the display substrate provided by any embodiment of the present disclosure.
  • the display device provided by some embodiments of the present disclosure further includes a sensor, wherein the sensor is disposed on the second side of the display substrate, and the orthographic projection of the sensor on the display substrate is similar to that of the first display.
  • the zones at least partially overlap, and the sensor is configured to receive light from the first side.
  • Fig. 1A is a schematic plan view of a display substrate
  • Fig. 1B is a partial enlarged schematic diagram of a display substrate
  • FIG. 2 is a schematic cross-sectional view of the display substrate in FIG. 1B along the line A-A;
  • FIG. 3 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 4 is a partial enlarged schematic diagram of a display substrate provided by at least one embodiment of the present disclosure.
  • 5A is a schematic plan view of a first pixel repeating unit provided by at least one embodiment of the present disclosure
  • 5B is a schematic plan view of another first pixel repeating unit provided by at least one embodiment of the present disclosure.
  • FIG. 6 is a schematic block diagram of a display device provided by at least one embodiment of the present disclosure.
  • FIG. 7 is a schematic cross-sectional view of a display device provided by at least one embodiment of the present disclosure.
  • the display substrate in order to allow more light to enter the camera located below the display substrate, can be designed to have a high pixel density area and a low pixel density area, and the camera is set to allow More light penetrates below the low pixel density area.
  • FIG. 1A shows a schematic plan view of a display substrate
  • FIG. 1B is a partial enlarged schematic diagram of the display substrate shown in FIG. 1A
  • FIG. 2 shows a schematic cross-sectional view of the display substrate in FIG. 1B along the line A-A.
  • the display area of the display substrate includes a light-transmitting display area 1, a transition display area 2 and a main body display area 3.
  • the main display area 3 is the main display area and has a higher resolution (PPI, Pixel Per Inch), that is, the main display area 3 is arranged with a higher density of sub-pixels for display.
  • Each sub-pixel includes a light-emitting element and a pixel circuit that drives the light-emitting element.
  • the light-transmitting display area 1 can allow light incident from the display side of the display substrate to pass through the display substrate to reach the back side of the display substrate, so as to be used for the normal operation of components such as sensors located on the back side of the display substrate.
  • the light-transmitting display area 1 may also allow light emitted from the back side of the display substrate to pass through the display substrate to display the display side of the substrate.
  • the light-transmitting display area 1 and the transition display area 2 also include a plurality of sub-pixels for display.
  • the pixel circuit of the sub-pixel usually does not transmit light
  • the light-emitting element of the sub-pixel of the light-transmitting display area 1 and the pixel circuit driving the light-emitting element can be physically located.
  • the pixel circuits of the sub-pixels in the light-transmitting display area 1 can be set in the transition display area 2, as indicated by the gray box in the transition display area 2.
  • each white box in the transition display area 2 represents a sub-pixel.
  • the sub-pixels in the transitional display area 2 (white boxes in FIG. 1B) and the pixel circuits of the sub-pixels in the light-transmitting display area 1 (gray boxes in FIG. 1B) are arranged in the transitional display area 2.
  • the resolution of the transparent display area 1 and the transition display area 2 is lower than the resolution of the main display area 3. That is, the density of the sub-pixels arranged in the transparent display area 1 and the transition display area 2 for display is less than Sub-pixel density of the main display area 3.
  • the light-emitting element 4 of a sub-pixel in the light-transmitting display area 1 includes an anode 4A, a cathode 4C, and a light-emitting layer 4B between the anode 4A and the cathode 4C.
  • the anode 4A is connected to the transition display through a wire 6 Pixel circuit 5 in zone 2.
  • the pixel circuit 5 includes structures such as thin film transistors (T) and capacitors (C).
  • the pixel circuit 5 can be implemented as commonly used 2T1C, 4T1C, 4T2C, 7T1C and other pixel driving circuits.
  • the above-mentioned wiring 6 is usually a transparent connection wiring, or, at least the part of the wiring 6 located in the light-transmitting display area 1 is transparent (in this case, even if the wiring is The rest of the wire 6 is opaque, and the wire 6 can also be regarded as a transparent connection wire in the present disclosure).
  • the transparent connection traces can be made of transparent conductive materials, such as transparent metal oxides, such as indium tin oxide (ITO), etc., to have good light transmittance.
  • transparent and “light-transmitting” only require a certain light transmittance, for example, the light transmittance is greater than 0, and the light transmittance is not required to be 100%.
  • the light transmittance of any structure or region is greater than a certain value (for example, 40%, 45%, 50%, etc.), it can be considered as “transparent” or “transparent”. .
  • the minimum width of the trace 6 is limited (for example, 1.5 ⁇ m ⁇ 2.5 ⁇ m); when multiple traces 6 are densely arranged, the minimum distance between adjacent traces 6 is also limited (For example, 1.5 ⁇ m to 2.5 ⁇ m); therefore, the pitch of the wiring 6 is also limited (for example, 3 ⁇ m to 5 ⁇ m). Due to the limitation of the pitch of the wiring 6, the size of the transparent display area 1 and the resolution of the transparent display area 1 are mutually restricted. It should be noted that in the present disclosure, “pitch” refers to the center distance between adjacent structures of the same type.
  • At least one embodiment of the present disclosure provides a display substrate.
  • the display substrate has a first side for display and a second side opposite to the first side, and includes a first display area, a second display area, and a third display area.
  • the first display area includes a plurality of first pixel repeating units arranged in an array along a first direction and a second direction.
  • Each first pixel repeating unit includes a first light-emitting element.
  • the light transmission area transmitted between one side and the second side; the second display area includes a plurality of second pixel repeating units and a plurality of fourth pixel repeating units arranged in an array along the first direction and the second direction.
  • the two-pixel repeating unit includes a second pixel circuit and a second light-emitting element.
  • Each fourth pixel repeating unit includes a first pixel circuit.
  • the third display area includes A plurality of third pixel repeating units arranged in an array in the second direction, each third pixel repeating unit includes a third pixel circuit and a third light-emitting element, the third pixel circuit and the third light-emitting element are electrically connected; the third display area is at least Partly surrounds the second display area, the second display area at least partially surrounds the first display area, and the second display area is axisymmetric with respect to the center line of the first display area in the second direction; each first pixel repeating unit corresponds to A fourth pixel repeating unit, the center line of each first pixel repeating unit and the corresponding fourth pixel repeating unit is approximately parallel to the first direction, and the first light-emitting element in each first pixel repeating unit is transparent through t strips
  • the connecting wire is electrically connected to the first pixel circuit in the corresponding fourth pixel repeating unit, t is
  • Some embodiments of the present disclosure also provide a display device corresponding to the above-mentioned display substrate.
  • the display substrate provided by the embodiments of the present disclosure can optimize the arrangement of the transparent connection traces and the arrangement of the first light-emitting elements in the first display area, thereby improving the display effect of the first display area and at the same time improving the first display area.
  • the light transmittance of the area helps to improve the performance of the full-screen display device.
  • FIG. 3 shows a schematic plan view of the display substrate.
  • the display substrate has a first side for display (i.e., a display side) and a second side (i.e., a non-display side) opposite to the first side.
  • the display substrate includes a display area, and the display area includes a first display area 10 (identified by a dashed frame), a second display area 20 and a third display area 30.
  • the third display area at least partially surrounds the second display area 20
  • the second display area 20 at least partially surrounds the first display area 10
  • the second display area 20 is in the second display area with respect to the first display area 10.
  • the center line in the direction Y is axisymmetric.
  • the second display area 20 is symmetrically distributed on both sides of the first display area 10 in the first direction X.
  • the first direction X and the second direction Y are perpendicular to each other. Including but not limited to this.
  • the first display area 10 may include a circular display area 10A and an annular wiring area 10B surrounding the circular display area 10A.
  • the circular wiring area 10B is identified by a black circle
  • the circular display area 10A is identified by a white circle in the circular wiring area 10B.
  • the first display area 10 allows light from the first side to be at least partially transmitted to the second side; for example, in some embodiments, at least the circular display area 10A allows light from the first side to be at least partially transmitted to the second side That is, at least the circular display area 10A is a transparent display area, and light can pass through the transparent display area from the display side of the display substrate to the non-display side.
  • the non-display side can be provided with sensors such as cameras and infrared sensing devices.
  • the light to the non-display side works.
  • the light emitted by the device on the non-display side of the display substrate may also be configured to be transmitted to the display side of the display substrate through the transparent display area (for example, the circular display area 10A).
  • FIG. 4 is a partial enlarged schematic diagram of the display substrate shown in FIG. 3.
  • the first display area 10 includes a plurality of first pixel repeating units Q1 arranged in an array along a first direction X and a second direction Y
  • the second display area 20 includes A plurality of second pixel repeating units Q2 and a plurality of fourth pixel repeating units Q4 arranged in a two-direction Y array
  • the third display area 30 includes a plurality of third pixels arranged in an array along the first direction X and the second direction Y Repeat unit Q3.
  • the first pixel repeating unit Q1 includes a first light-emitting element, but does not include a first pixel circuit for driving the first light-emitting element.
  • the first pixel circuit for driving the first light-emitting element is arranged in the second display area 20, so that the metal coverage area in the first display area 10 can be reduced, and the first display area 10 can be improved.
  • the second pixel repeating unit Q2 includes a second pixel circuit and a second light-emitting element, the second pixel circuit is electrically connected to the second light-emitting element, and the second pixel circuit is used to drive the second light-emitting element.
  • the second pixel circuit and the second light-emitting element in each pixel repeating unit Q2 have a one-to-one correspondence. It should be noted that the embodiment of the present disclosure does not limit the specific number of the second pixel circuit and the second light-emitting element included in each pixel repeating unit Q2.
  • the third pixel repeating unit Q3 includes a third pixel circuit and a third light-emitting element, the third pixel circuit is electrically connected to the third light-emitting element, and the third pixel circuit is used to drive the third light-emitting element.
  • the third pixel circuit and the third light-emitting element in each pixel repeating unit Q3 have a one-to-one correspondence. It should be noted that the embodiment of the present disclosure does not limit the specific number of the third pixel circuit and the third light-emitting element included in each pixel repeating unit Q3.
  • the fourth pixel repeating unit Q4 includes a first pixel circuit, and the first pixel circuit is used to drive the first light-emitting element.
  • each first pixel repeating unit Q1 corresponds to a fourth pixel repeating unit Q4, and the center line of each first pixel repeating unit Q1 and the corresponding fourth pixel repeating unit Q4 is approximately parallel to the first direction X, that is The light emitting elements in each row of the first pixel repeating unit Q1 in the first direction X are driven by the first pixel circuit in the fourth pixel repeating unit of the same row in the first direction X.
  • the first light-emitting element in each first pixel repeating unit Q1 is electrically connected to the first pixel circuit in the corresponding fourth pixel repeating unit Q4 through t transparent connection traces TL, where t is Positive integer and t ⁇ 1.
  • t is Positive integer and t ⁇ 1.
  • the number of first light-emitting elements in each first pixel repeating unit Q1 is t
  • the number of first pixel circuits in the corresponding fourth pixel repeating unit Q4 is also t, so that each first light-emitting element passes 1
  • a transparent connection trace TL is electrically connected to a corresponding first pixel circuit.
  • the above-mentioned t transparent connection traces TL are marked by a dotted line.
  • the first pixel repeating units Q1 in the first display area 10 are uniformly arranged, so that the first display area 10 can achieve uniform light emission and display.
  • the pitch of the first pixel repeating unit Q1 in the first direction X is a1
  • the pitch in the second direction Y is b1.
  • the second pixel repeating units Q2 in the second display area 20 are uniformly arranged, so that the second display area 20 can achieve uniform light emission and display.
  • the pitch of the second pixel repeating unit Q2 in the first direction X is a1
  • the pitch of the second pixel repeating unit Q2 in the second direction Y is b1
  • the second pixel repeating unit Q2 is evenly arranged in the first display area 10 and the second display area 20, so that the entire first display area 10 and the second display area 20 can emit light and display uniformly.
  • the fourth pixel repeating units Q4 in the second display area 20 are evenly arranged, so that wiring (including transparent connection wiring TL and subsequent gate lines GL and The arrangement of data lines DL, etc.).
  • the pitch of the fourth pixel repeating unit Q4 in the first direction X may be equal to the pitch of the second pixel repeating unit Q2 in the first direction X
  • the pitch in the second direction Y may be equal to the second pixel repeating.
  • the pitch of the unit Q2 in the second direction Y that is, the pitch of the fourth pixel repeating unit Q4 in the first direction X can also be a1, and the pitch in the second direction Y can also be b1.
  • the fourth pixel repeating unit Q4 may also be non-uniformly arranged in the second display area 20, which is not limited in the embodiment of the present disclosure.
  • the third pixel repeating units Q3 in the third display area 30 are uniformly arranged, so that the third display area 30 can achieve uniform light emission and display.
  • the pitch of the third pixel repeating unit Q3 in the first direction X is a2
  • the pitch in the second direction Y is b2.
  • the third display area 30 has a higher resolution, while the first display area 10 and the second display area 20 have a lower resolution.
  • the first display area 10 and the second display area 20 are equivalent to reducing a certain number of pixel repeating units (as shown by the gray box).
  • the main part of the transparent connection trace TL is approximately parallel to the first direction X for electrically connecting the first light-emitting elements (located in the first display area) in the same row in the first direction X. 10 in the first pixel repeating unit Q1) and the first pixel circuit (located in the fourth pixel repeating unit Q4 in the second display area 20).
  • the pitch of the main part of the transparent connection traces TL in the second direction Y is D, that is, the pitch of the transparent connection traces TL in the second direction Y It is D.
  • the value range of D is usually 3 ⁇ m to 5 ⁇ m, and the embodiments of the present disclosure include but are not limited to this.
  • the maximum number s of the first pixel repeating unit Q1 included in the first display area 10 in the first direction X satisfies:
  • the allowable size of the first display area 10 in the display substrate can be determined based on the above formula.
  • the number of first pixel repeating units Q1 included in the first display area 10 in the first direction X is 2*Floor(b1/(D*t)), so that the first display area 10
  • the size in the first direction X is the maximum allowable value.
  • the circular display area 10A described below may have the maximum area.
  • L1 max 2*Floor(b1/((D*t)))*a1.
  • the size of the first display area 10 in the second direction Y is approximately equal to the size L1 of the first display area 10 in the first direction X, that is, the shape of the first display area 10 is approximately square, so that the In the case where the rectangular display area 10A has as large an area as possible, the area of the first display area 10 is not too large.
  • the first pixel repeating unit Q1 in the first display area 10 can be controlled in a half-to-left manner, and the second pixel repeating unit Q1 is axisymmetric with respect to the center line of the first display area 10 in the second direction Y.
  • the fourth pixel repeating unit Q4 in the display area 20 is separately controlled.
  • the first pixel repeating unit Q1 in the left half of the first display area 10 is controlled by the fourth pixel repeating unit Q4 in the second display area 20 on the left side of the first display area 10.
  • the first pixel repeating unit Q1 in the right half area of the first display area 10 is controlled by the fourth pixel repeating unit Q4 in the second display area 20 on the right side of the first display area 10.
  • the first display area 10 includes a circular display area 10A (identified by a gray circle) and an annular wiring area 10B surrounding the circular display area 10A.
  • the wiring for driving the first light-emitting element in the circular display area 10A is arranged in a dense arrangement in the circular wiring area 10B, so that the circular display area 10A can be as large as possible. Area.
  • FIG. 5A is a schematic plan view of a first pixel repeating unit provided by at least one embodiment of the present disclosure.
  • each first pixel repeating unit 01 includes 8 first light-emitting elements arranged in a GGRB pixel arrangement, and correspondingly, each fourth pixel repeating unit includes 8 first pixel circuits to It is used to drive the above 8 first light-emitting elements correspondingly.
  • each first pixel repeating unit 01 includes two groups of first light-emitting elements, and each group of first light-emitting elements includes one red light-emitting element R, two green light-emitting elements G, and one blue light-emitting element B. .
  • the red light-emitting element R and the first green light-emitting element G may share a gate line, and the blue light-emitting element B and another green light-emitting element G may also share a gate line. Therefore, the number of gate lines corresponding to the first pixel repeating unit 01 shown in FIG.
  • FIG. 5B is a schematic plan view of another first pixel repeating unit provided by at least one embodiment of the present disclosure.
  • each first pixel repeating unit 01 includes 12 first light-emitting elements arranged in an RGB pixel arrangement, and correspondingly, each fourth pixel repeating unit includes 12 first pixel circuits to It is used to drive the 12 first light-emitting elements mentioned above.
  • the 12 first light-emitting elements in each first pixel repeating unit 01 include 4 red light-emitting elements R, 4 green light-emitting elements G, and 4 blue light-emitting elements B.
  • the 12 first light-emitting elements in each first pixel repeating unit 01 are arranged in 2 rows and 6 columns.
  • first pixel repeating unit shown in FIG. 5A and FIG. 5B are both exemplary.
  • the specific structure of the first pixel repeating unit that is, the first light-emitting unit included in the first pixel repeating unit
  • the type and number of components and the arrangement method, etc.) are not restricted.
  • the first pixel circuit in the fourth pixel repeating unit may adopt common pixel driving circuits such as 2T1C, 4T1C, 4T2C, 7T1C, but is not limited thereto.
  • the embodiment of the present disclosure does not limit the specific structure of the first pixel circuit.
  • the specific structure of the second pixel repeating unit (that is, the specific structure of the second pixel circuit, the type and number of second light-emitting elements, and the arrangement, etc.) are not limited in the embodiments of the present disclosure.
  • the embodiment of the present disclosure does not limit the specific structure of the third pixel repeating unit (that is, the specific structure of the third pixel circuit, the type and number of third light-emitting elements, and the arrangement, etc.).
  • the type, number and arrangement of the first light-emitting elements in the first pixel repeating unit can be the same as those of the second light-emitting element and the third pixel in the second pixel repeating unit.
  • the third light-emitting element in the repeating unit is the same, and the specific structure of the first pixel circuit in the fourth pixel repeating unit may be the same as the second pixel circuit in the second pixel repeating unit and the third pixel circuit in the third pixel repeating unit .
  • the gate line GL used to drive the first light-emitting element in each row of the first pixel repeating unit Q1 in the first direction X corresponds to the same row in the first direction X.
  • the first pixel circuit in the four-pixel repeating unit Q4 is electrically connected, at least a part of the gate line GL extends along the first direction X, at least another part of the gate line GL is located in the circular routing area, and the gate line GL does not pass through the circle ⁇ display area 10A.
  • the gate line GL may also be electrically connected to the second pixel circuit in the second pixel repeating unit and the third pixel circuit in the third pixel repeating unit in the same row in the first direction X.
  • the aforementioned gate line GL is used to provide drive control signals for each pixel circuit (for example, the first to third pixel circuits).
  • the drive control signal includes but is not limited to a reset control signal, a scan signal, and a light emission control signal.
  • the gate line GL may include, but is not limited to, a reset control line, a scan signal line (also commonly referred to as a “gate line”), a light emission control line, and the like.
  • the first pixel circuit is electrically connected, at least a part of the data line DL extends along the second direction Y, at least another part of the data line DL is located in the circular wiring area 10B, and the data line DL does not pass through the circular display area 10A.
  • the aforementioned data line GL may also be electrically connected to the third pixel circuit in the third pixel repeating unit in the same column as the first pixel repeating unit Q1 of each column in the second direction Y; for another example, in some examples, The second display area 20 completely surrounds the first display area 10.
  • the data line GL may also be in the second pixel repeating unit in the same column as the first pixel repeating unit Q1 in each column in the second direction Y.
  • the second pixel circuit is electrically connected.
  • the above-mentioned data line DL is used to provide data signals for each pixel circuit (for example, the first to third pixel circuits), and then to control the light-emitting brightness of each light-emitting element (for example, the first to third light-emitting element).
  • the gate line GL and the data line DL may be located in different layers.
  • the number of gate lines corresponding to each third pixel repeating unit Q3 is the same as the number of gate lines corresponding to each first pixel repeating unit Q1, and each first pixel repeating unit Q1 corresponds to
  • the number of gate lines GL is x; when the gate lines GL are densely arranged in the circular wiring area 10B, the pitch is c1, for example, the value of c1 can usually be about 3 ⁇ m; in the circular wiring area 10B
  • the total radial width R1 of the gate line GL is approximately x*c1*Floor(L1/b2)/2, where Floor(L1/b2) indicates that the size of the first display area 10 in the second direction Y corresponds to The maximum number of the third pixel repeating unit Q3.
  • half of the gate lines GL can be from The upper half of the ring-shaped wiring area 10B wraps around to bypass the circular display area 10A, and the other half of the gate lines GL may wrap around the lower half of the ring-shaped wiring area 10B to bypass the circular display area 10A.
  • the number of data lines DL corresponding to each first pixel repeating unit Q1 is y; when the data lines DL are densely arranged in the circular wiring area 10B, the pitch is c2, for example, c2
  • the value of is usually about 4 ⁇ m; since the first pixel repeating unit Q1 in the first display area 10 adopts a left-right half-control method, the total radial width R2 of the data line DL in the ring-shaped wiring area 10B is approximately y *c2*s/2.
  • the data lines DL corresponding to the first display area 10 half of the data lines DL can be looped from the left half of the circular wiring area 10B to bypass the circular display area.
  • the other half of the number of data lines DL can circulate from the right half of the circular routing area 10B to bypass the circle
  • the shape display area 10A is finally electrically connected to the first pixel circuit in the second display area 20 on the side of the first display area 10.
  • the orthographic projection of the circumferentially extending body portion of the gate line GL in the ring-shaped wiring area 10B on the display substrate is similar to the data line in the ring-shaped wiring area 10B.
  • the orthographic projection of the main body part of the DL extending in the circumferential direction on the display substrate does not overlap, so that the parasitic capacitance can be reduced.
  • the radial width R of the circular routing area 10B is approximately x*c1*Floor(L1/b2)/2+y*c2*s/2
  • the diameter of the circular display area 10A is approximately s*a1 -x*c1*Floor(L1/b2)-y*c2*s/2
  • the diameter of the above-mentioned circular display area 10A is the maximum allowable diameter of the circular display area 10A in this case.
  • the orthographic projection of the main body part of the gate line GL in the ring-shaped wiring area 10B extending in the circumferential direction on the display substrate is similar to that of the data line DL in the ring-shaped wiring area 10B along the circumferential direction.
  • the orthographic projection of the extended main body portion on the display substrate at least partially overlaps.
  • the radial width R of the circular routing area 10B is approximately max(x*c1*Floor(L1/b2)/2,y*c2*s/2), and the diameter of the circular display area 10A is approximately s*a1-max(x*c1*Floor(L1/b2), y*c2*s); the diameter of the above-mentioned circular display area 10A is the maximum allowable diameter of the circular display area 10A in this case.
  • the radial width R of the ring-shaped wiring area 10B is approximately (x*c1* n+y*c2)*s/2, the diameter of the circular display area 10A is approximately (a1-x*c1*ny*c2)*s; along the circumferential direction of the gate line GL in the circular routing area 10B
  • the circular routing area 10B The radial width R is approximately max(x*c1*n,y*c2)
  • the number of columns of the second pixel repeating unit Q2 in the second display area 20 is 2 more columns than the number of columns of the first pixel repeating unit Q1 in the first display area 10.
  • the column of second pixel repeating units Q2 are respectively located in the second display area 20 on the left and right sides of the first display area 10 and far away from the first display area 10.
  • the extra two columns of second pixel repeating units Q2 can be used to cope with The impact of the above differences.
  • the number of columns of the fourth pixel repeating unit Q4 in the second display area 20 is two more than the number of columns of the first pixel repeating unit Q1 in the first display area 10.
  • the fourth pixel repeating unit Q4 in the column is respectively located in the second display area 20 on the left and right sides of the first display area 10 and far away from the first display area 10.
  • the two extra columns of fourth pixel repeating units Q4 can be used as spares.
  • the size of the second display area 20 in the second direction Y is substantially equal to the size of the first display area 10 in the second direction 20.
  • the size of the second display area 20 in the second direction Y may be slightly larger than the size of the first display area 10 in the second direction Y.
  • the second display area 20 may be It completely surrounds the first display area 10.
  • the difference between the size of the second display area 20 in the second direction Y and the size of the first display area 10 in the second direction Y is approximately equal to 4b1, that is, there are two upper and lower sides of the first display area 10.
  • the display substrate provided by the embodiments of the present disclosure can reasonably determine the size of the first display area 10 and the second display area 20 on the premise that the area of the circular display area 10A is as large as possible.
  • the area of the first display area 10 outside the circular routing area 10B can be designed or manufactured to be consistent with the second display area 20.
  • the circular display area can be 10A is the only transparent display area. That is, the circular display area 10A in the embodiment of FIG. 4 can be regarded as the effective first display area, and the first display area other than the circular display area 10A in the embodiment of FIG. 4 can be regarded as the second display. Part of the district.
  • each light-emitting element includes an anode, a cathode, and a light-emitting layer between the anode and the cathode.
  • the anode may include an ITO/Ag/ITO three-layer structure, etc.
  • the cathode may be formed as a common cathode with an entire surface.
  • the material of the common cathode may include metal materials such as lithium (Li), aluminum (Al), magnesium (Mg), and silver (Ag).
  • the common cathode since the common cathode can be formed as a very thin layer, the common cathode has good light transmittance.
  • the display substrate provided by the embodiment of the present disclosure may be an organic light emitting diode (OLED) display substrate or a quantum dot light emitting diode (QLED) display substrate, etc.
  • OLED organic light emitting diode
  • QLED quantum dot light emitting diode
  • the embodiment of the present disclosure does not limit the specific type of the display substrate.
  • the light-emitting layer may include small molecular organic materials or polymer molecular organic materials, may be fluorescent light-emitting materials or phosphorescent light-emitting materials, and may emit red, green, blue, or Can emit white light and so on.
  • the light-emitting layer may further include functional layers such as an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.
  • the light-emitting layer may include quantum dot materials, such as silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride Quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, indium phosphide quantum dots, and indium arsenide quantum dots, etc.
  • the particle size of the quantum dots is, for example, 2-20 nm.
  • each pixel circuit has a thin film transistor (T), a capacitor (C), and other structures.
  • a thin film transistor includes an active layer, a gate, and source and drain electrodes (source and drain, as shown in the source and drain electrodes 7 in FIG. 2).
  • the display substrate may include an anode layer, a source and drain electrode layer, and a transparent connection wiring layer between the anode layer and the source and drain electrode layers; the anode of the first light-emitting element (Shown as anode 4A in Figure 2) is located at the anode layer, and the transparent connection trace (shown as trace 6 in Figure 2) is located on the transparent connection trace layer, and at least one of the source and drain of the thin film transistor (as shown in Figure 2) The source and drain electrodes 7 in 2) are located in the source and drain metal layers, and the anode of the first light-emitting element is electrically connected to at least one of the source and the drain of the thin film transistor through a transparent connecting wire.
  • an insulating layer is usually provided between the anode layer and the transparent connection wiring layer and between the source and drain electrode layer and the transparent connection wiring layer, and the insulating layer is usually provided with vias for forming electrical connections.
  • the anode of the first light-emitting element in order to improve the light transmittance of the first display area, may be a transparent electrode, and the anode of the first light-emitting element is connected to the first light-emitting element in the second display area through a transparent connection trace.
  • the pixel circuit is electrically connected.
  • the transparent connection trace may be made of a transparent conductive material, such as a transparent metal oxide, For example, indium tin oxide (ITO), etc., to have good light transmittance.
  • the display substrate provided by the embodiments of the present disclosure can optimize the arrangement of the transparent connection traces and the arrangement of the first light-emitting elements in the first display area, thereby improving the display effect of the first display area and at the same time improving the first display area.
  • the light transmittance of the area helps to improve the performance of the full-screen display device.
  • FIG. 6 is a schematic block diagram of a display device provided by at least one embodiment of the present disclosure.
  • the display device 100 includes a display substrate 110, which is a display substrate provided by any embodiment of the present disclosure, such as the display substrate shown in FIG. 3 or FIG.
  • the display device 100 can be any electronic device with a display function, such as a smart phone, a notebook computer, a tablet computer, a TV, and so on.
  • the smart phone or tablet computer may have a full-screen design, that is, there is no peripheral area surrounding the third display area 30.
  • the smart phone or tablet computer also has an under-screen sensor (such as a camera, an infrared sensor, etc.), which can perform operations such as image shooting, distance sensing, and light intensity sensing.
  • any applicable components can be used, and these are all those of ordinary skill in the art. It is understood that it will not be repeated here, nor should it be taken as a limitation to the embodiments of the present disclosure.
  • FIG. 7 is a schematic cross-sectional view of a display device provided by at least one embodiment of the present disclosure.
  • the display device 100 includes a display substrate 110, and the display substrate 110 is a display substrate provided by any embodiment of the present disclosure, such as the display substrate shown in FIG. 3 or FIG. 4.
  • the display device 100 further includes a sensor 120.
  • the display substrate 110 includes a first side F1 for display and a second side F2 opposite to the first side F1. That is, the first side F1 is the display side, and the second side F2 is the non-display side.
  • the display substrate 110 is configured to perform a display operation on the first side F1, that is, the first side F1 of the display substrate 110 is the light emitting side of the display substrate 110, and the first side F1 faces the user.
  • the first side F1 and the second side F2 are opposed to each other in the normal direction of the display surface of the display substrate 110.
  • the sensor 120 is disposed on the second side F2 of the display substrate 110, and the sensor 120 is configured to receive light from the first side F1.
  • the sensor 120 and the first display area 10 overlap in the normal direction of the display surface of the display substrate 110 (for example, the direction perpendicular to the display substrate 110), and the sensor 120 may receive and process the data passing through the first display area 10.
  • the optical signal may be visible light, infrared light, etc.
  • the first display area 10 allows light from the first side F1 to be at least partially transmitted to the second side F2.
  • the first display area 10 is not provided with a pixel circuit. In this case, the light transmittance of the first display area 11 can be improved.
  • the senor 120 and the circular display area 10A in the first display area 10 overlap in the normal direction of the display surface of the display substrate 110 (for example, the direction perpendicular to the display substrate 110), where In this case, the circular form area 10A can be regarded as an effective first display area.
  • the orthographic projection of the sensor 120 on the display substrate at least partially overlaps the first display area 10.
  • the orthographic projection of the sensor 120 on the display substrate 110 is located in the first display area 10.
  • the orthographic projection of the sensor 120 on the display substrate 110 is the same as the first display. Zone 10 partially overlaps. At this time, since the light can propagate to the sensor 120 laterally, it is not necessary that the sensor 120 is completely located at a position corresponding to the first display area 10.
  • the first display area 10 can be reduced.
  • the element in the shielding of the light signal incident to the first display area 10 and irradiated to the sensor 120 can improve the signal-to-noise ratio of the image output by the sensor 120.
  • the first display area 10 may be referred to as the high light transmission area of the low resolution area of the display substrate 110 (the second display area 20 may be referred to as the low light transmission area or the opaque area of the low resolution area of the display substrate 110). Light zone).
  • the senor 120 may be an image sensor, which may be used to collect an image of the external environment facing the light-collecting surface of the sensor 120, and may be, for example, a CMOS image sensor or a CCD image sensor.
  • the sensor 120 may also be an infrared sensor, a distance sensor, or the like.
  • the sensor 120 may be implemented as a camera of a mobile terminal such as a mobile phone, a notebook, etc., and may also include, for example, a lens, a mirror, or an optical waveguide as required.
  • the sensor 120 may include photosensitive pixels arranged in an array.
  • each photosensitive pixel may include a photosensitive detector (e.g., photodiode, phototransistor) and a switching transistor (e.g., thin film transistor).
  • a photosensitive detector e.g., photodiode, phototransistor
  • a switching transistor e.g., thin film transistor
  • the photodiode can convert the light signal irradiated on it into an electrical signal
  • the switching transistor can be electrically connected with the photodiode to control whether the photodiode is in the state of collecting the light signal and the time for collecting the light signal.
  • only the anode of the first light-emitting element may not transmit light, that is, the wiring for driving the first light-emitting element bypasses the first display area 11 or is set to be transparent. Traces. In this case, not only can the light transmittance of the first display area 11 be further improved, but also the diffraction caused by the elements in the first display area 10 can be reduced.
  • the anode of the first light-emitting element may be further configured as a transparent electrode.
  • the display device 100 may further include more components and structures, which are not limited in the embodiments of the present disclosure.
  • the technical effects and detailed description of the display device 100 reference may be made to the above description of the display substrate, which will not be repeated here.

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Abstract

一种显示基板和显示装置。该显示基板具有第一侧和第二侧，且包括第一至第三显示区。第一显示区包括第一像素重复单元，且允许来自第一侧的光至少部分透射至第二侧，第二显示区包括第二像素重复单元和第四像素重复单元，第三显示区包括第三像素重复单元。每个第一像素重复单元与对应的第四像素重复单元的中心连线大致平行于第一方向，每个第一像素重复单元通过t条透明连接走线与对应的第四像素重复单元电连接。第一和第二像素重复单元在第二方向上的节距均为b1，第三像素重复单元在第二方向上的节距为b2，透明连接走线在所述第二方向上的节距为D，第一显示区在第一方向上包括的第一像素重复单元的最大数量s满足s≤2*Floor(b1/((D*t)))。

Description

显示基板和显示装置
本申请要求于2020年6月4日递交的中国专利申请第202010498559.7号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开的实施例涉及一种显示基板和显示装置。
背景技术
随着手机等显示电子产品的发展，显示屏的屏占比的提升成为一种产品趋势，前置摄像头等手机必备的功能元件成为制约屏占比提升的一大因素。针对这个问题，业界提出了将摄像头与显示基板结合到一显示装置中的被称为“屏下摄像头”的方案。在这样的方案中，显示装置包括显示基板和位于该显示基板下方的摄像头。显示装置的具有屏下摄像头的区域可以与其他区域一样发光并进行显示，并同时具有摄像功能。
发明内容
本公开至少一个实施例提供一种显示基板，具有用于显示的第一侧和与所述第一侧相对的第二侧，且包括第一显示区、第二显示区和第三显示区；其中，所述第一显示区包括沿第一方向和第二方向阵列排布的多个第一像素重复单元，每个所述第一像素重复单元包括第一发光元件，所述第一显示区包括允许光在所述显示基板的第一侧和第二侧之间传输的光透射区域；所述第二显示区包括沿所述第一方向和所述第二方向阵列排布的多个第二像素重复单元和多个第四像素重复单元，每个所述第二像素重复单元包括第二像素电路和第二发光元件，所述第二像素电路和所述第二发光元件电连接，每个所述第四像素重复单元包括第一像素电路；所述第三显示区包括沿所述第一方向和所述第二方向阵列排布的多个第三像素重复单元，每个所述第三像素重复单元包括第三像素电路和第三发光元件，所述第三像素电路和所述第三发光元件电连接；所述第三显示区至少部分围绕所述第二显示区，所述第二显示区至少部分围绕所述第一显示区，且所述第二显示区关于所述第一显示区在所述第二方向上的中心线呈轴对称；每个所述第一像素重复单元对应于一个第四像素重复单元，每个所述第一像素重复单元与对应的所述第四像素重复单元的中心连线大致平行于所述第一方向，每个所述第一像素重复单元中的所述第一发光元件通过t条透明连接走线与对应的所述第四像素重复单元中的所述第一像素电路电连接，t为正整数且t≥1；所述第一像素重复单元在所述第二方向上的节距为b1，所述第二像素重复单元在所述第二方向上的节距为b1，所述第三像素重复单元在所述第二方向上的节距为b2，其中，b1＝n*b2，n为正整数且n≥2；其中，所述透明连接走线在所述第二方向上的节距为D，所述第一显示区在所述第一方向上包括的所述第一像素重复单元的最大数量s满足：s≤ 2*Floor(b1/((D*t)))，其中，Floor()表示向下取整函数。
例如，在本公开一些实施例提供的显示基板中，所述第一像素重复单元在所述第一方向上的节距为a1，所述第二像素重复单元在所述第一方向上的节距为a1，所述第三像素重复单元在所述第一方向上的节距为a2，其中，a1＝m*a2，m为正整数且m≥2，所述第一显示区在所述第一方向上的尺寸L1大致满足：L1＝s*a1。
例如，在本公开一些实施例提供的显示基板中，所述第一显示区在所述第二方向上的尺寸大致等于所述第一显示区在所述第一方向上的尺寸。
例如，在本公开一些实施例提供的显示基板中，所述第一显示区包括圆形显示区及围绕所述圆形显示区的环形走线区；用于驱动在所述第一方向上的每一行第一像素重复单元中的所述第一发光元件的选通线与对应的在所述第一方向上的同一行第四像素重复单元中的所述第一像素电路电连接，所述选通线的至少一部分沿所述第一方向延伸，所述选通线的至少另一部分位于所述环形走线区，所述选通线不穿过所述圆形显示区；用于驱动在所述第二方向上的每一列第一像素重复单元中的所述第一发光元件的数据线与对应的在所述第二方向上的某一列第四像素重复单元中的所述第一像素电路电连接，所述数据线的至少一部分沿所述第二方向延伸，所述数据线的至少另一部分位于所述环形走线区，所述数据线不穿过所述圆形显示区；所述选通线与所述数据线位于不同层。
例如，在本公开一些实施例提供的显示基板中，每个所述第三像素重复单元对应的选通线的数量与每个所述第一像素重复单元对应的选通线的数量相同，每个所述第一像素重复单元对应的所述选通线的条数为x，所述选通线在所述环形走线区中的节距为c1，所述环形走线区中的所述选通线的总径向宽度大致为x*c1*Floor(L1/b2)/2；每个所述第一像素重复单元对应的所述数据线的条数为y，所述数据线在所述环形走线区中的节距为c2，所述环形走线区中的所述数据线的总径向宽度大致为y*c2*s/2。
例如，在本公开一些实施例提供的显示基板中，所述环形走线区中的所述选通线的沿周向延伸的主体部分在所述显示基板上的正投影与所述环形走线区中的所述数据线的沿周向延伸的主体部分在所述显示基板上的正投影不交叠，所述环形走线区的径向宽度大致为x*c1*Floor(L1/b2)/2+y*c2*s/2。
例如，在本公开一些实施例提供的显示基板中，所述圆形显示区的直径大致为s*a1-x*c1*Floor(L1/b2)-y*c2*s/2。
例如，在本公开一些实施例提供的显示基板中，所述环形走线区中的所述选通线的沿周向延伸的主体部分在所述显示基板上的正投影与所述环形走线区中的所述数据线的沿周向延伸的主体部分在所述显示基板上的正投影至少部分交叠，所述环形走线区的径向宽度大致为max(x*c1*Floor(L1/b2)/2,y*c2*s/2)，其中max()为取最大值函数。
例如，在本公开一些实施例提供的显示基板中，所述圆形显示区的直径大致为s*a1-max(x*c1*Floor(L1/b2),y*c2*s)。
例如，在本公开一些实施例提供的显示基板中，所述第二显示区在所述第一方向上的 尺寸L2大致满足：L2＝(s+2)*a1。
例如，在本公开一些实施例提供的显示基板中，所述第二显示区在所述第二方向上的尺寸大致等于所述第一显示区在所述第二方向上的尺寸。
例如，在本公开一些实施例提供的显示基板中，所述第二显示区在所述第二方向上的尺寸大于所述第一显示区在所述第二方向上的尺寸，且所述第二显示区在所述第二方向上的尺寸与所述第一显示区在所述第二方向上的尺寸之差大致等于4b1。
例如，在本公开一些实施例提供的显示基板中，所述第四像素重复单元在所述第一方向上的节距等于所述第二像素重复单元在所述第一方向上的节距。
例如，在本公开一些实施例提供的显示基板中，每个所述第一像素重复单元包括按照GGRB像素排列方式进行排列的8个第一发光元件，t＝8，每个所述第一像素重复单元对应的选通线的条数为4，每个所述第一像素重复单元对应的数据线的条数为4。
例如，在本公开一些实施例提供的显示基板中，每个所述第一像素重复单元包括按照RGB像素排列方式进行排列的12个第一发光元件，t＝12，每个所述第一像素重复单元对应的选通线的条数为2，每个所述第一像素重复单元对应的数据线的条数为6。
例如，在本公开一些实施例提供的显示基板中，所述第一方向和所述第二方向相互垂直。
例如，在本公开一些实施例提供的显示基板中，所述显示基板包括阳极层、源漏电极层以及位于所述阳极层和所述源漏电极层之间的透明连接走线层，所述第一发光元件的阳极位于所述阳极层，所述透明连接走线位于所述透明连接走线层，所述第一像素电路包括薄膜晶体管，所述薄膜晶体管包括源极和漏极，所述薄膜晶体管的所述源极和所述漏极至少之一位于所述源漏金属层，所述第一发光元件的所述阳极通过所述透明连接走线与所述薄膜晶体管的所述源极和所述漏极至少之一电连接。
例如，在本公开一些实施例提供的显示基板中，所述第一发光元件的阳极为透明电极。
本公开至少一实施例还提供一种显示装置，包括本公开任一实施例提供的显示基板。
例如，本公开一些实施例提供的显示装置，还包括传感器，其中，所述传感器设置于所述显示基板的第二侧，所述传感器在所述显示基板上的正投影与所述第一显示区至少部分重叠，所述传感器配置为接收来自所述第一侧的光。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为一种显示基板的平面示意图；
图1B为一种显示基板的局部放大示意图；
图2为图1B中的显示基板沿A-A线的截面示意图；
图3为本公开至少一实施例提供的一种显示基板的平面示意图；
图4为本公开至少一实施例提供的一种显示基板的局部放大示意图；
图5A为本公开至少一实施例提供的一种第一像素重复单元的平面示意图；
图5B为本公开至少一实施例提供的另一种第一像素重复单元的平面示意图；
图6为本公开至少一实施例提供的一种显示装置的示意框图；以及
图7为本公开至少一实施例提供的一种显示装置的截面示意图。
具体实施方式
为了使得本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。为了保持本公开实施例的以下说明清楚且简明，本公开省略了部分已知功能和已知部件的详细说明。
在“屏下摄像头”的设计方案中，为了使得更多的光能够进入位于显示基板下方的摄像头中，可以将显示基板设计为具有高像素密度区域和低像素密度区域，摄像头则设置在能够允许更多的光透过的低像素密度区域下方。
例如，图1A示出了一种显示基板的平面示意图，图1B为图1A示出的显示基板的局部放大示意图，图2示出了图1B中的显示基板沿A-A线的截面示意图。如图1A、图1B和图2所示，该显示基板的显示区包括透光显示区1、过渡显示区2以及主体显示区3。
例如，主体显示区3为主要的显示区域，具有较高的分辨率(PPI，Pixel Per Inch)，即主体显示区3内排布有密度较高的用于显示的子像素。每个子像素包括发光元件以及驱动发光元件的像素电路。透光显示区1可以允许从显示基板显示侧射入的光透过显示基板而到达显示基板的背侧，从而用于位于显示基板背侧的传感器等部件的正常工作。当然，透光显示区1也可以允许从显示基板的背侧发出的光通过显示基板而显示基板的显示侧。透光显示区1和过渡显示区2也包括多个子像素，以用于显示。但是，由于子像素的像素电路通常不透光，为了提高透光显示区1的透光性，可以将透光显示区1的子像素的发光元件与驱动该发光元件的像素电路从物理位置上分离。例如，透光显示区1中的子像素(例如图1B中透光显示区1内的方框所示)的像素电路可以设置在过渡显示区2，如过渡显示 区2中的灰色方框所示，因此占据了过渡显示区2的部分空间；而过渡显示区2的剩余空间用于设置过渡显示区2的子像素，例如过渡显示区2中的每一个白色方框代表一个子像素。此时，过渡显示区2中的子像素(图1B中的白色方框)以及透光显示区1中的子像素的像素电路(图1B中的灰色方框)在过渡显示区2中排布为阵列。由此，透光显示区1和过渡显示区2的分辨率低于主体显示区3的分辨率，即透光显示区1和过渡显示区2内排布的用于显示的子像素的密度小于主体显示区3的子像素密度。
如图2所示，透光显示区1中的一个子像素的发光元件4包括阳极4A、阴极4C以及在阳极4A和阴极4C之间的发光层4B，阳极4A通过走线6连接至过渡显示区2中的像素电路5。例如，像素电路5包括薄膜晶体管(T)、电容(C)等结构，例如像素电路5可以实现为常用的2T1C、4T1C、4T2C、7T1C等像素驱动电路。
为了提高透光显示区1的透光性，上述走线6通常为透明连接走线，或者，走线6的至少位于透光显示区1中的部分是透明的(在此情况下，即使走线6的其余部分不透明，在本公开中也可认为走线6为透明连接走线)。例如，透明连接走线可以采用透明导电材料，例如透明金属氧化物，例如氧化铟锡(ITO)等，以具有良好的透光性。需要说明的是，在本公开中，“透明”、“透光”只要求具有一定的透光率即可，例如透光率大于0，而不要求透光率为100％。例如，一般地，若任一结构或区域等的透光率大于某一数值(例如，40％、45％、50％等)，即可认为该结构或区域等“透明”、“透光”。
在实际工艺中，走线6的最小宽度是有限制的(例如，1.5μm～2.5μm)；多条走线6密集排布时，相邻的走线6之间的最小间距也是有限制的(例如，1.5μm～2.5μm)；从而，走线6的节距也是有限制的(例如，3μm～5μm)。由于走线6的节距的限制，透光显示区1的尺寸大小与透光显示区1的分辨率是相互制约的。需要说明的是，在本公开中，“节距”是指相邻的同类结构之间的中心距离。
本公开至少一个实施例提供一种显示基板。该显示基板具有用于显示的第一侧和与所述第一侧相对的第二侧，且包括第一显示区、第二显示区和第三显示区。第一显示区包括沿第一方向和第二方向阵列排布的多个第一像素重复单元，每个第一像素重复单元包括第一发光元件，第一显示区包括允许光在显示基板的第一侧和第二侧之间传输的光透射区域；第二显示区包括沿第一方向和第二方向阵列排布的多个第二像素重复单元和多个第四像素重复单元，每个第二像素重复单元包括第二像素电路和第二发光元件，第二像素电路和第二发光元件电连接，每个第四像素重复单元包括第一像素电路；第三显示区包括沿第一方向和第二方向阵列排布的多个第三像素重复单元，每个第三像素重复单元包括第三像素电路和第三发光元件，第三像素电路和第三发光元件电连接；第三显示区至少部分围绕第二显示区，第二显示区至少部分围绕第一显示区，且第二显示区关于第一显示区在第二方向上的中心线呈轴对称；每个第一像素重复单元对应于一个第四像素重复单元，每个第一像素重复单元与对应的第四像素重复单元的中心连线大致平行于第一方向，每个第一像素重复单元中的第一发光元件通过t条透明连接走线与对应的第四像素重复单元中的第一像素 电路电连接，t为正整数且t≥1；第一像素重复单元在第二方向上的节距为b1，第二像素重复单元在第二方向上的节距为b1，第三像素重复单元在第二方向上的节距为b2，其中，b1＝n*b2，n为正整数且n≥2；透明连接走线在第二方向上的节距为D，第一显示区在第一方向上包括的第一像素重复单元的最大数量s满足：s≤2*Floor(b1/((D*t)))，其中，Floor()表示向下取整函数。
本公开的一些实施例还提供对应于上述显示基板的显示装置。
本公开的实施例提供的显示基板，可以优化透明连接走线的排布，优化第一显示区中的第一发光元件的排布，从而改善第一显示区的显示效果，同时提高第一显示区的透光性，进而有助于提高全面屏显示装置的性能。
下面结合附图对本公开的一些实施例及其示例进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本公开，并不用于限制本公开。
本公开至少一实施例提供一种显示基板，图3示出了该显示基板的平面示意图。如图3所示，该显示基板具有用于显示的第一侧(即显示侧)和与第一侧相对的第二侧(即非显示侧)。显示基板包括显示区域，显示区域包括第一显示区10(由虚线框标识)、第二显示区20和第三显示区30。
例如，如图3所示，第三显示区至少部分围绕第二显示区20，第二显示区20至少部分围绕第一显示区10，且第二显示区20关于第一显示区10在第二方向Y上的中心线呈轴对称。例如，如图3所示，第二显示区20对称分布于第一显示区10在第一方向X上的两侧，例如，第一方向X与第二方向Y相互垂直，本公开的实施例包括但不限于此。
例如，如图3所示，第一显示区10可以包括圆形显示区10A及围绕圆形显示区10A的环形走线区10B。在图3中，环形走线区10B由黑色圆环标识，圆形显示区10A由环形走线区10B中的白色圆形标识。例如，第一显示区10允许来自第一侧的光至少部分透射至第二侧；例如，在一些实施例中，至少圆形显示区10A允许来自第一侧的光至少部分透射至第二侧，也即至少圆形显示区10A为透明显示区域，光线可从显示基板的显示侧通过该透明显示区域到达非显示侧，非显示侧例如可以设置摄像头、红外感应装置等传感器，传感器可利用透射至非显示侧的光线进行工作。在一些实施例中，还可设置为显示基板的非显示侧的器件发出的光通过透明显示区域(例如，圆形显示区10A)透射到显示基板的显示侧。
图4为图3示出的显示基板的局部放大示意图。例如，如图4所示，第一显示区10包括沿第一方向X和第二方向Y阵列排布的多个第一像素重复单元Q1，第二显示区20包括沿第一方向X和第二方向Y阵列排布的多个第二像素重复单元Q2和多个第四像素重复单元Q4，第三显示区30包括沿第一方向X和第二方向Y阵列排布的多个第三像素重复单元Q3。
例如，第一像素重复单元Q1包括第一发光元件，而不包括用于驱动第一发光元件的第一像素电路。例如，第一显示区10中没有像素电路，用于驱动第一发光元件的第一像素电 路设置在第二显示区20中，从而可以减少第一显示区10中的金属覆盖面积，提高第一显示区10的透光率。
例如，第二像素重复单元Q2包括第二像素电路和第二发光元件，第二像素电路和第二发光元件电连接，第二像素电路用于驱动第二发光元件。例如，在一些示例中，每个像素重复单元Q2中的第二像素电路和第二发光元件是一一对应的。需要说明的是，本公开的实施例对每个像素重复单元Q2包括的第二像素电路和第二发光元件的具体数量不作限制。
例如，第三像素重复单元Q3包括第三像素电路和第三发光元件，第三像素电路和第三发光元件电连接，第三像素电路用于驱动第三发光元件。例如，在一些示例中，每个像素重复单元Q3中的第三像素电路和第三发光元件是一一对应的。需要说明的是，本公开的实施例对每个像素重复单元Q3包括的第三像素电路和第三发光元件的具体数量不作限制。
例如，第四像素重复单元Q4包括第一像素电路，第一像素电路用于驱动第一发光元件。例如，每个第一像素重复单元Q1对应于一个第四像素重复单元Q4，每个第一像素重复单元Q1与对应的第四像素重复单元Q4的中心连线大致平行于第一方向X，即在第一方向X上的每一行第一像素重复单元Q1中的发光元件由在第一方向X上的同一行第四像素重复单元中的第一像素电路进行驱动。
例如，如图4所示，每个第一像素重复单元Q1中的第一发光元件通过t条透明连接走线TL与对应的第四像素重复单元Q4中的第一像素电路电连接，t为正整数且t≥1。例如，每个第一像素重复单元Q1中的第一发光元件的数量为t，对应的第四像素重复单元Q4中的第一像素电路的数量也为t，从而每个第一发光元件通过1条透明连接走线TL与对应的一个第一像素电路电连接。为了方便和简洁，在图4中，上述t条透明连接走线TL由一条虚线标识。
例如，如图4所示，第一显示区10中的第一像素重复单元Q1均匀排布，从而第一显示区10可以实现均匀发光与显示。例如，如图4所示，第一像素重复单元Q1在第一方向X上的节距为a1，在第二方向Y上的节距为b1。
例如，如图4所示，第二显示区20中的第二像素重复单元Q2均匀排布，从而第二显示区20可以实现均匀发光与显示。例如，如图4所示，第二像素重复单元Q2在第一方向X上的节距为a1，在第二方向Y上的节距为b1，即整体而言，第一像素重复单元Q1和第二像素重复单元Q2在第一显示区10和第二显示区20中均匀排布，从而可以实现第一显示区10和第二显示区20整体均匀发光与显示。
例如，在一些示例中，如图4所示，第二显示区20中的第四像素重复单元Q4均匀排布，从而可以优化走线(包括透明连接走线TL及后续的选通线GL和数据线DL等)的排布。例如，第四像素重复单元Q4在第一方向X上的节距可以等于第二像素重复单元Q2在第一方向X上的节距，在第二方向Y上的节距可以等于第二像素重复单元Q2在第二方向Y上的节距，即第四像素重复单元Q4在第一方向X上的节距也可以为a1，在第二方向Y上的节距也可以为b1。需要说明的是，在另一些示例中，第四像素重复单元Q4在第二显 示区20中也可以是非均匀排布，本公开的实施例对此不作限制。
例如，如图4所示，第三显示区30中的第三像素重复单元Q3均匀排布，从而第三显示区30可以实现均匀发光与显示。例如，如图4所示，第三像素重复单元Q3在第一方向X上的节距为a2，在第二方向Y上的节距为b2。
例如，a1＝m*a2，m为正整数且m≥2；b1＝n*b2，n为正整数且n≥2。在此情况下，第三显示区30具有较高的分辨率，而第一显示区10和第二显示区20具有较低的分辨率。例如，如图所示，与第三显示区30相比，第一显示区10和第二显示区20中相当于减少了若干数量的像素重复单元(如灰色方框所示)。图4仅示出了m＝3且n＝3的情形，但不应视作对本公开的实施例的限制。
例如，如图4所示，透明连接走线TL的主体部分大致平行于第一方向X，以用于电连接在第一方向X上的同一行中的第一发光元件(位于第一显示区10中的第一像素重复单元Q1中)与第一像素电路(位于第二显示区20中的第四像素重复单元Q4中)。例如，在透明连接走线TL密集排布的情况下，透明连接走线TL的主体部分在第二方向Y上的节距为D，即透明连接走线TL在第二方向Y上的节距为D，例如，D的取值范围通常为3μm～5μm，本公开的实施例包括但不限于此。
例如，在本公开的实施例提供的显示基板中，第一显示区10在第一方向X上包括的第一像素重复单元Q1的最大数量s满足：
s≤2*Floor(b1/((D*t)))，
其中，Floor()表示向下取整函数。从而，在b1、D、t可以根据设计方案预先决定的情况下，该显示基板中的第一显示区10允许的尺寸大小可以基于上述公式确定。例如，在一些实施例中，第一显示区10在第一方向X上包括的第一像素重复单元Q1的数量为2*Floor(b1/(D*t))，从而第一显示区10子第一方向X上的尺寸为允许的最大值，在此情况下，下述的圆形显示区10A可以具有最大的面积。
例如，第一显示区10在第一方向X上的尺寸L1大致满足：L1＝s*a1。从而，第一显示区10在第一方向X上的尺寸L1的最大值大致为：
L1 max＝2*Floor(b1/((D*t)))*a1。
例如，第一显示区10在第二方向Y上的尺寸大致等于第一显示区10在第一方向X上的尺寸L1，即，第一显示区10的形状大致为正方形，从而可以使得在圆形显示区10A具有尽量大的面积的情况下，第一显示区10的面积不至于过大。
例如，如图4所示，第一显示区10中的第一像素重复单元Q1可以采用左右对半控制的方式，由关于第一显示区10在第二方向Y上的中心线轴对称的第二显示区20中的第四像素重复单元Q4分别进行控制。例如，如图4所示，第一显示区10的左半区域中的第一像素重复单元Q1由第一显示区10左侧的第二显示区20中的第四像素重复单元Q4进行控制，第一显示区10的右半区域中的第一像素重复单元Q1由第一显示区10右侧的第二显示区20中的第四像素重复单元Q4进行控制。例如，如图4所示，第一显示区10包括圆形显 示区10A(由灰色圆形标识)及围绕圆形显示区10A的环形走线区10B。例如，如图4所示，用于驱动圆形显示区10A中的第一发光元件的走线以密集排布的方式布置在环形走线区10B中，可以使圆形显示区10A具有尽量大的面积。
图5A为本公开至少一实施例提供的一种第一像素重复单元的平面示意图。例如，如图5A所示，每个第一像素重复单元01包括按照GGRB像素排列方式进行排列的8个第一发光元件，相应地，每个第四像素重复单元包括8个第一像素电路以用于对应驱动上述8个第一发光元件。每个第一发光元件通过一条透明连接走线TL与一个第一像素电路连接，从而，t＝8。
例如，如图5A所示，每个第一像素重复单元01包括两组第一发光元件，每组第一发光元件包括一个红色发光元件R、两个绿色发光元件G以及一个蓝色发光元件B。例如，在每组第一发光元件中，红色发光元件R和第一个绿色发光元件G可以共用一条选通线，蓝色发光元件B和另一个绿色发光元件G也可以共用一条选通线，从而，图5A所示的第一像素重复单元01对应的选通线的条数为x＝4；例如，在每组第一发光元件中，红色发光元件R和蓝色发光元件B可以共用一条数据线，两个绿色发光元件G也可以共用一条数据线，从而，图5A所示的第一像素重复单元01对应的数据线的条数为y＝4。
图5B为本公开至少一实施例提供的另一种第一像素重复单元的平面示意图。例如，如图5B所示，每个第一像素重复单元01包括按照RGB像素排列方式进行排列的12个第一发光元件，相应地，每个第四像素重复单元包括12个第一像素电路以用于对应驱动上述12个第一发光元件。每个第一发光元件通过一条透明连接走线TL与一个第一像素电路连接，从而，t＝12。
例如，如图5B所示，每个第一像素重复单元01中的12个第一发光元件包括4个红色发光元件R、4个绿色发光元件G以及4个蓝色发光元件B。例如，如图5B所示，每个第一像素重复单元01中的12个第一发光元件排列成2行6列。例如，每一行的6个第一发光元件可以共用一条选通线，从而，图5B所示的第一像素重复单元01对应的选通线的条数为x＝2；例如，每一列的2个第一发光元件可以共用一条数据线，从而，图5B所示的第一像素重复单元01对应的数据线的条数为y＝6。
需要说明的是，图5A和图5B所示的第一像素重复单元均是示例性的，本公开的实施例对第一像素重复单元的具体结构(即第一像素重复单元包括的第一发光元件的种类和数量以及排布方式等)不作限制。
例如，第四像素重复单元中的第一像素电路可以采用常见的2T1C、4T1C、4T2C、7T1C等像素驱动电路，但不限于此。本公开的实施例对第一像素电路的具体结构不作限制。
需要说明的是，本公开的实施例对第二像素重复单元的具体结构(即第二像素电路的具体结构及第二发光元件的种类和数量以及排布方式等)亦不作限制，同样地，本公开的实施例对第三像素重复单元的具体结构(即第三像素电路的具体结构及第三发光元件的种类和数量以及排布方式等)亦不作限制。还需要说明的是，为了简化设计和便于制造，第 一像素重复单元中的第一发光元件的种类和数量以及排布方式等可以与第二像素重复单元中的第二发光元件以及第三像素重复单元中的第三发光元件相同，第四像素重复单元中的第一像素电路的具体结构可以与第二像素重复单元中的第二像素电路以及第三像素重复单元中的第三像素电路相同。
例如，如图4所示，用于驱动在第一方向X上的每一行第一像素重复单元Q1中的第一发光元件的选通线GL与对应的在第一方向X上的同一行第四像素重复单元Q4中的第一像素电路电连接，选通线GL的至少一部分沿第一方向X延伸，选通线GL的至少另一部分位于环形走线区，选通线GL不穿过圆形显示区10A。通过将选通线GL的至少另一部分布置于环形走线区中，使得选通线GL绕过圆形显示区10A，可以提高圆形显示区10A的透光性。例如，上述选通线GL还可以与在第一方向X上的同一行的第二像素重复单元中的第二像素电路以及第三像素重复单元中的第三像素电路电连接。例如，上述选通线GL用于为各像素电路(例如，第一至第三像素电路)提供驱动控制信号，例如，所述驱动控制信号包括但不限于复位控制信号、扫描信号、发光控制信号等，对应地，选通线GL可以包括但不限于复位控制线、扫描信号线(通常也称为“栅线”)、发光控制线等。
例如，用于驱动在第二方向上Y的每一列第一像素重复单元Q1中的第一发光元件的数据线DL与对应的在第二方向Y上的某一列第四像素重复单元Q4中的第一像素电路电连接，数据线DL的至少一部分沿第二方向Y延伸，数据线DL的至少另一部分位于环形走线区10B，数据线DL不穿过圆形显示区10A。通过将数据线DL的至少另一部分布置于环形走线区中，使得数据线DL绕过圆形显示区10A，可以提高圆形显示区10A的透光性。例如，上述数据线GL还可以与在第二方向Y上与该每一列第一像素重复单元Q1同一列的第三像素重复单元中的第三像素电路电连接；又例如，在一些示例中，第二显示区20完全包围第一显示区10，在此情况下，上述数据线GL还可以与在第二方向Y上与该每一列第一像素重复单元Q1同一列的第二像素重复单元中的第二像素电路电连接。例如，上述数据线DL用于为各像素电路(例如，第一至第三像素电路)提供数据信号，进而控制各发光元件(例如，第一至第三发光元件)的发光亮度。
例如，在本公开的实施例提供的显示基板中，选通线GL与数据线DL可以位于不同层。
例如，在一些实施例中，每个第三像素重复单元Q3对应的选通线的数量与每个第一像素重复单元Q1对应的选通线的数量相同，每个第一像素重复单元Q1对应的选通线GL的条数为x；选通线GL在环形走线区10B中密集排布时的节距为c1，例如，c1的取值通常可以为3μm左右；环形走线区10B中的选通线GL的总径向宽度R1大致为x*c1*Floor(L1/b2)/2，其中，Floor(L1/b2)表示第一显示区10在第二方向Y上的尺寸对应的第三像素重复单元Q3的最大数量。需要说明的是，如图4所示，对于需要绕过(即不穿过)第一显示区10中的圆形显示区10A的选通线GL而言，一半数量的选通线GL可以从环形走线区10B的上半环绕行以绕过圆形显示区10A，另一半数量的选通线GL可以从环形走线区10B的下半环绕行以绕过圆形显示区10A。
例如，在一些实施例中，每个第一像素重复单元Q1对应的数据线DL的条数为y；数据线DL在环形走线区10B中密集排布时的节距为c2，例如，c2的取值通常可以为4μm左右；由于第一显示区10中的第一像素重复单元Q1采用左右对半控制的方式，环形走线区10B中的数据线DL的总径向宽度R2大致为y*c2*s/2。需要说明的是，如图4所示，对于第一显示区10对应的数据线DL而言，一半数量的数据线DL可以从环形走线区10B的左半环绕行以绕过圆形显示区10A，并最终与第一显示区10左侧的第二显示区20中的第一像素电路电连接，另一半数量的数据线DL可以从环形走线区10B的右半环绕行以绕过圆形显示区10A，并最终与第一显示区10由侧的第二显示区20中的第一像素电路电连接。
例如，在一些实施例中，如图4所示，环形走线区10B中的选通线GL的沿周向延伸的主体部分在显示基板上的正投影与环形走线区10B中的数据线DL的沿周向延伸的主体部分在显示基板上的正投影不交叠，从而可以减小寄生电容。在此情况下，环形走线区10B的径向宽度R大致为x*c1*Floor(L1/b2)/2+y*c2*s/2，圆形显示区10A的直径大致为s*a1-x*c1*Floor(L1/b2)-y*c2*s/2；上述圆形显示区10A的直径为在此情况下圆形显示区10A允许的最大直径。
例如，在另一些实施例中，环形走线区10B中的选通线GL的沿周向延伸的主体部分在显示基板上的正投影与环形走线区10B中的数据线DL的沿周向延伸的主体部分在显示基板上的正投影至少部分交叠。在此情况下，环形走线区10B的径向宽度R大致为max(x*c1*Floor(L1/b2)/2,y*c2*s/2)，圆形显示区10A的直径大致为s*a1-max(x*c1*Floor(L1/b2),y*c2*s)；上述圆形显示区10A的直径为在此情况下圆形显示区10A允许的最大直径。
例如，在一些实施例中，为了简化设计和方便制造，可以使得a1＝b1，从而，在环形走线区10B中的选通线GL的沿周向延伸的主体部分在显示基板上的正投影与环形走线区10B中的数据线DL的沿周向延伸的主体部分在显示基板上的正投影不交叠的情况下，环形走线区10B的径向宽度R大致为(x*c1*n+y*c2)*s/2，圆形显示区10A的直径大致为(a1-x*c1*n-y*c2)*s；在环形走线区10B中的选通线GL的沿周向延伸的主体部分在显示基板上的正投影与环形走线区10B中的数据线DL的沿周向延伸的主体部分在显示基板上的正投影至少部分交叠的情况下，环形走线区10B的径向宽度R大致为max(x*c1*n,y*c2)*s/2，圆形显示区10A的直径大致为(a1-max(x*c1*n,y*c2))*s。
例如，在一些实施例中，第二显示区20在第一方向X上的尺寸L2大致满足：L2＝(s+2)*a1。例如，如图4所示，第二显示区20中的第二像素重复单元Q2的列数比第一显示区10中的第一像素重复单元Q1的列数多2列，多出来的这2列第二像素重复单元Q2分别位于第一显示区10左右两侧的第二显示区20中，且远离第一显示区10。例如，考虑到第三显示区30(具有高分辨率)和第二显示区20(具有低分辨率)的边界发光算法的差异，多出来的这2列第二像素重复单元Q2可以用于应对上述差异产生的影响。例如，如图4所示，第二显示区20中的第四像素重复单元Q4的列数比第一显示区10中的第一像素重 复单元Q1的列数多2列，多出来的这2列第四像素重复单元Q4分别位于第一显示区10左右两侧的第二显示区20中，且远离第一显示区10。例如，多出来的这2列第四像素重复单元Q4可以作为备用。
例如，在一些实施例中，如图3和图4所示，第二显示区20在第二方向上Y的尺寸大致等于第一显示区10在第二方向20上的尺寸。例如，在另一些实施例中，第二显示区20在第二方向上Y的尺寸可以略大于第一显示区10在第二方向Y上的尺寸，在此情况下，第二显示区20可以完全围绕第一显示区10。例如，第二显示区20在第二方向Y上的尺寸与第一显示区10在第二方向Y上的尺寸之差大致等于4b1，即第一显示区10的上侧和下侧各有两行第二像素重复单元Q2，本公开的实施例包括但不限于此。综上所述，本公开的实施例提供的显示基板可以在圆形显示区10A的面积尽量大的前提下合理确定第一显示区10和第二显示区20的尺寸大小。需要说明的是，在实际应用中，可以将环形走线区10B之外的第一显示区10的区域设计或制造为与第二显示区20一致，在此情况下，可以将圆形显示区10A作为仅有的透光显示区域。也即，可以将图4实施例中的圆形显示区10A视作有效的第一显示区，而将图4实施例中的圆形显示区10A之外的第一显示区视作第二显示区的一部分。
例如，在一些实施例中，本公开的实施例提供的显示基板的局部截面结构图可以参考图2所示。例如，本公开的实施例提供的显示基板中的发光元件(例如，第一至第三发光元件)的结构均可以参考图2中的发光元件4。例如，在本公开的实施例提供的显示基板中，每个发光元件包括阳极、阴极以及在阳极和阴极之间的发光层。例如，在一些示例中，阳极可以包括ITO/Ag/ITO三层结构等，本公开的实施例对阳极的具体结构不作限制。例如，阴极可以形成为一整面的公共阴极，例如，公共阴极的材料可以包括锂(Li)、铝(Al)、镁(Mg)、银(Ag)等金属材料。例如，由于公共阴极可以形成为很薄的一层，因此公共阴极具有良好的透光性。
例如，本公开的实施例提供的显示基板可以为有机发光二极管(OLED)显示基板或者量子点发光二极管(QLED)显示基板等，本公开的实施例对显示基板的具体种类不作限制。
例如，在显示基板为有机发光二极管显示基板的情形，发光层可以包括小分子有机材料或聚合物分子有机材料，可以为荧光发光材料或磷光发光材料，可以发红光、绿光、蓝光，或可以发白光等。并且，根据实际不同需要，在不同的示例中，发光层还可以进一步包括电子注入层、电子传输层、空穴注入层、空穴传输层等功能层。
例如，在显示基板为量子点发光二极管(QLED)显示基板的情形，发光层可以包括量子点材料，例如，硅量子点、锗量子点、硫化镉量子点、硒化镉量子点、碲化镉量子点、硒化锌量子点、硫化铅量子点、硒化铅量子点、磷化铟量子点和砷化铟量子点等，量子点的粒径例如为2-20nm。
例如，本公开的实施例提供的显示基板中的像素电路(例如，第一至第三像素电路) 的结构均可以参考图2中的像素电路5。例如，在本公开的实施例提供的显示基板中，每个像素电路薄膜晶体管(T)、电容(C)等结构。例如，薄膜晶体管包括有源层、栅极以及源漏电极(源极和漏极，如图2中源漏电极7所示)。
例如，在一些实施例中，参考图2所示，该显示基板可以包括阳极层、源漏电极层以及位于阳极层和源漏电极层之间的透明连接走线层；第一发光元件的阳极(如图2中阳极4A所示)位于阳极层，透明连接走线(如图2中走线6所示)位于透明连接走线层，薄膜晶体管的源极和漏极至少之一(如图2中源漏电极7所示)位于源漏金属层，且第一发光元件的阳极通过透明连接走线与薄膜晶体管的源极和所述漏极至少之一电连接。应当理解的是，阳极层和透明连接走线层之间以及源漏电极层和透明连接走线层之间通常设置有绝缘层，且绝缘层中通常设置有用于形成电连接的过孔。
例如，在一些实施例中，为了提高第一显示区的透光性，第一发光元件的阳极可以为透明电极，第一发光元件的阳极通过透明连接走线与第二显示区中的第一像素电路电连接。需要说明的是，在本公开的实施例中，只要求透明连接走线位于透光显示区1中的部分是透明的；例如，透明连接走线可以采用透明导电材料，例如透明金属氧化物，例如氧化铟锡(ITO)等，以具有良好的透光性。
本公开的实施例提供的显示基板，可以优化透明连接走线的排布，优化第一显示区中的第一发光元件的排布，从而改善第一显示区的显示效果，同时提高第一显示区的透光性，进而有助于提高全面屏显示装置的性能。
本公开至少一实施例还提供一种显示装置。图6为本公开至少一实施例提供的一种显示装置的示意框图。例如，如图6所示，该显示装置100包括显示基板110，显示基板110为本公开任一实施例提供的显示基板，例如图3或图4所示的显示基板。该显示装置100可以为任何具有显示功能的电子装置，例如智能手机、笔记本电脑、平板电脑、电视等。例如，当显示装置100为智能手机或平板电脑时，该智能手机或平板电脑可以具有全面屏设计，也即是，没有围绕第三显示区域30的周边区域。并且，该智能手机或平板电脑还具有屏下传感器(例如摄像头、红外传感器等)，可以进行图像拍摄、距离感知、光强感知等操作。
需要说明的是，对于该显示基板110和显示装置100的其它组成部分(例如，图像数据编码/解码装置、时钟电路等)可以采用任意适用的部件，这些均是本领域的普通技术人员所应该理解的，在此不做赘述，也不应作为对本公开实施例的限制。
图7为本公开至少一实施例提供的一种显示装置的截面示意图。例如，如图7所示，该显示装置100包括显示基板110，显示基板110为本公开任一实施例提供的显示基板，例如图3或图4所示的显示基板。例如，该显示装置100还包括传感器120。
例如，如图7所示，该显示基板110包括用于显示的第一侧F1和与第一侧F1相对的第二侧F2。也即是，第一侧F1为显示侧，第二侧F2为非显示侧。显示基板110被配置为在第一侧F1执行显示操作，也即，显示基板110的第一侧F1为显示基板110的出光侧， 第一侧F1朝向用户。第一侧F1和第二侧F2在显示基板110的显示面的法线方向上对置。
例如，如图7所示，传感器120设置于显示基板110的第二侧F2，并且传感器120配置为接收来自第一侧F1的光。例如，传感器120与第一显示区10在显示基板110的显示面的法线方向(例如，垂直于显示基板110的方向)上叠置，传感器120可以接收并处理穿过第一显示区10的光信号，该光信号可以为可见光、红外光等。例如，第一显示区10允许来自第一侧F1的光至少部分透射至第二侧F2。例如，第一显示区10未设置像素电路，在此情况下，可以提升第一显示区11的透光率。例如，在一些示例中，传感器120与第一显示区10中的圆形显示区10A在显示基板110的显示面的法线方向(例如，垂直于显示基板110的方向)上叠置，在此情况下，可以将圆形形式区10A视作有效的第一显示区。
例如，传感器120在显示基板上的正投影与第一显示区10至少部分重叠。例如，在一些示例中，当采用直下式设置方式时，传感器120在显示基板110上的正投影位于第一显示区10内。例如，在另一些示例中，当采用其他导光元件(例如导光板、导光管等)以使光线从侧面入射至传感器320上时，传感器120在显示基板110上的正投影与第一显示区10部分重叠。此时，由于光线可以横向传播至传感器120，不需要传感器120完全位于对应于第一显示区10的位置处。
例如，通过使第一像素电路设置在第二显示区域20中，并使传感器120与第一显示区10在显示基板110的显示面的法线方向上叠置，可以减小第一显示区10中的元件对入射至第一显示区10并照射到传感器120的光信号的遮挡，由此可以提升传感器120输出的图像的信噪比。例如，第一显示区10可以被称为显示基板110的低分辨率区域的高透光区(第二显示区20可以被称为显示基板110的低分辨率区域的低透光区或不透光区)。
例如，传感器120可以是图像传感器，可以用于采集传感器120的集光面面对的外部环境的图像，例如可以为CMOS图像传感器或CCD图像传感器。该传感器120还可以是红外传感器、距离传感器等。例如，在该显示装置100为诸如手机、笔记本等移动终端的情形下，该传感器120可实现为诸如手机、笔记本等移动终端的摄像头，并且根据需要还可以包括例如透镜、反射镜或光波导等光学器件，以对光路进行调制。例如，该传感器120可以包括阵列排布感光像素。例如，每个感光像素可以包括光敏探测器(例如，光电二极管、光电晶体管)和开关晶体管(例如，薄膜晶体管)。例如，光电二极管可以将照射到其上的光信号转换为电信号，开关晶体管可以与光电二极管电连接，以控制光电二极管是否处于采集光信号的状态以及采集光信号的时间。
在一些示例中，在第一显示区10中，可以仅有第一发光元件的阳极不透光，也即，用于驱动第一发光元件的走线绕过第一显示区11或者设置为透明走线。此种情况下，不仅可以进一步地提升第一显示区11的透光率，还可以降低第一显示区10中的各个元件导致的衍射。例如，在另一些示例中，第一发光元件的阳极还可以进一步设置为透明电极。
需要说明的是，本公开的实施例中，显示装置100还可以包括更多的部件和结构，本公开的实施例对此不作限制。关于该显示装置100的技术效果和详细说明，可以参考上文 中关于显示基板的描述，此处不再赘述。
对于本公开，还有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本发明的实施例的附图中，层或结构的厚度和尺寸被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(3)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (20)

  1. 一种显示基板，具有用于显示的第一侧和与所述第一侧相对的第二侧，且包括第一显示区、第二显示区和第三显示区；其中，
    所述第一显示区包括沿第一方向和第二方向阵列排布的多个第一像素重复单元，每个所述第一像素重复单元包括第一发光元件，所述第一显示区包括允许光在所述显示基板的第一侧和第二侧之间传输的光透射区域；
    所述第二显示区包括沿所述第一方向和所述第二方向阵列排布的多个第二像素重复单元和多个第四像素重复单元，每个所述第二像素重复单元包括第二像素电路和第二发光元件，所述第二像素电路和所述第二发光元件电连接，每个所述第四像素重复单元包括第一像素电路；
    所述第三显示区包括沿所述第一方向和所述第二方向阵列排布的多个第三像素重复单元，每个所述第三像素重复单元包括第三像素电路和第三发光元件，所述第三像素电路和所述第三发光元件电连接；
    所述第三显示区至少部分围绕所述第二显示区，所述第二显示区至少部分围绕所述第一显示区，且所述第二显示区关于所述第一显示区在所述第二方向上的中心线呈轴对称；
    每个所述第一像素重复单元对应于一个第四像素重复单元，每个所述第一像素重复单元与对应的所述第四像素重复单元的中心连线大致平行于所述第一方向，每个所述第一像素重复单元中的所述第一发光元件通过t条透明连接走线与对应的所述第四像素重复单元中的所述第一像素电路电连接，t为正整数且t≥1；
    所述第一像素重复单元在所述第二方向上的节距为b1，所述第二像素重复单元在所述第二方向上的节距为b1，所述第三像素重复单元在所述第二方向上的节距为b2，其中，b1＝n*b2，n为正整数且n≥2；
    其中，所述透明连接走线在所述第二方向上的节距为D，所述第一显示区在所述第一方向上包括的所述第一像素重复单元的最大数量s满足：
    s≤2*Floor(b1/((D*t)))，其中，Floor()表示向下取整函数。
  2. 根据权利要求1所述的显示基板，其中，
    所述第一像素重复单元在所述第一方向上的节距为a1，所述第二像素重复单元在所述第一方向上的节距为a1，所述第三像素重复单元在所述第一方向上的节距为a2，其中，a1＝m*a2，m为正整数且m≥2，
    所述第一显示区在所述第一方向上的尺寸L1大致满足：L1＝s*a1。
  3. 根据权利要求2所述的显示基板，其中，所述第一显示区在所述第二方向上的尺寸大致等于所述第一显示区在所述第一方向上的尺寸。
  4. 根据权利要求3所述的显示基板，其中，所述第一显示区包括圆形显示区及围绕所述圆形显示区的环形走线区；
    用于驱动在所述第一方向上的每一行第一像素重复单元中的所述第一发光元件的选通线与对应的在所述第一方向上的同一行第四像素重复单元中的所述第一像素电路电连接，所述选通线的至少一部分沿所述第一方向延伸，所述选通线的至少另一部分位于所述环形走线区，所述选通线不穿过所述圆形显示区；
    用于驱动在所述第二方向上的每一列第一像素重复单元中的所述第一发光元件的数据线与对应的在所述第二方向上的某一列第四像素重复单元中的所述第一像素电路电连接，所述数据线的至少一部分沿所述第二方向延伸，所述数据线的至少另一部分位于所述环形走线区，所述数据线不穿过所述圆形显示区；
    所述选通线与所述数据线位于不同层。
  5. 根据权利要求4所述的显示基板，其中，
    每个所述第三像素重复单元对应的选通线的数量与每个所述第一像素重复单元对应的选通线的数量相同，每个所述第一像素重复单元对应的选通线的条数为x，所述选通线在所述环形走线区中的节距为c1，所述环形走线区中的所述选通线的总径向宽度大致为x*c1*Floor(L1/b2)/2；
    每个所述第一像素重复单元对应的所述数据线的条数为y，所述数据线在所述环形走线区中的节距为c2，所述环形走线区中的所述数据线的总径向宽度大致为y*c2*s/2。
  6. 根据权利要求5所述的显示基板，其中，所述环形走线区中的所述选通线的沿周向延伸的主体部分在所述显示基板上的正投影与所述环形走线区中的所述数据线的沿周向延伸的主体部分在所述显示基板上的正投影不交叠，
    所述环形走线区的径向宽度大致为x*c1*Floor(L1/b2)/2+y*c2*s/2。
  7. 根据权利要求6所述的显示基板，其中，所述圆形显示区的直径大致为s*a1-x*c1*Floor(L1/b2)-y*c2*s/2。
  8. 根据权利要求5所述的显示基板，其中，所述环形走线区中的所述选通线的沿周向延伸的主体部分在所述显示基板上的正投影与所述环形走线区中的所述数据线的沿周向延伸的主体部分在所述显示基板上的正投影至少部分交叠，
    所述环形走线区的径向宽度大致为max(x*c1*Floor(L1/b2)/2,y*c2*s/2)，其中max()为取最大值函数。
  9. 根据权利要求8所述的显示基板，其中，所述圆形显示区的直径大致为s*a1-max(x*c1*Floor(L1/b2),y*c2*s)。
  10. 根据权利要求1-9任一项所述的显示基板，其中，所述第二显示区在所述第一方向上的尺寸L2大致满足：L2＝(s+2)*a1。
  11. 根据权利要求1-10任一项所述的显示基板，其中，所述第二显示区在所述第二方向上的尺寸大致等于所述第一显示区在所述第二方向上的尺寸。
  12. 根据权利要求1-10任一项所述的显示基板，其中，所述第二显示区在所述第二方向上的尺寸大于所述第一显示区在所述第二方向上的尺寸，且所述第二显示区在所述第二 方向上的尺寸与所述第一显示区在所述第二方向上的尺寸之差大致等于4b1。
  13. 根据权利要求1-12任一项所述的显示基板，其中，所述第四像素重复单元在所述第一方向上的节距等于所述第二像素重复单元在所述第一方向上的节距。
  14. 根据权利要求1-13任一项所述的显示基板，其中，每个所述第一像素重复单元包括按照GGRB像素排列方式进行排列的8个第一发光元件，t＝8，每个所述第一像素重复单元对应的选通线的条数为4，每个所述第一像素重复单元对应的数据线的条数为4。
  15. 根据权利要求1-13任一项所述的显示基板，其中，每个所述第一像素重复单元包括按照RGB像素排列方式进行排列的12个第一发光元件，t＝12，每个所述第一像素重复单元对应的选通线的条数为2，每个所述第一像素重复单元对应的数据线的条数为6。
  16. 根据权利要求1-15任一项所述的显示基板，其中，所述第一方向和所述第二方向相互垂直。
  17. 根据权利要求1-16任一项所述的显示基板，其中，所述显示基板包括阳极层、源漏电极层以及位于所述阳极层和所述源漏电极层之间的透明连接走线层，
    所述第一发光元件的阳极位于所述阳极层，所述透明连接走线位于所述透明连接走线层，
    所述第一像素电路包括薄膜晶体管，所述薄膜晶体管包括源极和漏极，所述薄膜晶体管的所述源极和所述漏极至少之一位于所述源漏金属层，
    所述第一发光元件的所述阳极通过所述透明连接走线与所述薄膜晶体管的所述源极和所述漏极至少之一电连接。
  18. 根据权利要求1-17任一项所述的显示基板，其中，所述第一发光元件的阳极为透明电极。
  19. 一种显示装置，包括根据权利要求1-18任一项所述的显示基板。
  20. 根据权利要求19所述的显示装置，还包括传感器，其中，所述传感器设置于所述显示基板的第二侧，所述传感器在所述显示基板上的正投影与所述第一显示区至少部分重叠，所述传感器配置为接收来自所述第一侧的光。
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WO2023201537A1 (zh) * 2022-04-19 2023-10-26 京东方科技集团股份有限公司 显示基板及显示装置
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