WO2021237532A1

WO2021237532A1 - Deep cavity etching method

Info

Publication number: WO2021237532A1
Application number: PCT/CN2020/092703
Authority: WO
Inventors: 钟晓辉; 洪燕; 张睿; 黎家健; 屠兰兰
Original assignee: 瑞声声学科技(深圳)有限公司
Priority date: 2020-05-27
Filing date: 2020-05-27
Publication date: 2021-12-02

Abstract

A deep cavity etching method, the deep cavity comprising a large cavity (73) and a small cavity (74) forming a step with the large cavity (73). Said method comprises the following steps: providing a silicon substrate (30) at least containing an upper surface; forming an oxide layer (40) on the upper surface of the silicon substrate (30); the thickness of the oxide layer (40) being a, and spin coating a first photoresist on the side of the oxide layer (40) facing away from the silicon substrate (30) and patterning same; etching the oxide layer (40) by using the patterned first photoresist as a mask, to form a patterned oxide layer (41), the patterned oxide layer (41) comprising a first opening penetrating through the oxide layer (40) and having the same shape as the large cavity (73). By forming a patterned oxide layer (41) on an upper surface of a silicon substrate (30) as a mask used for etching the silicon substrate (30), a deep cavity having a step can be etched and formed by only two rounds of spin coating, thereby avoiding a photoresist spraying process which features a higher cost and a lower efficiency, reducing the process costs, and improving the production capacity.

Description

The name of the description of the invention: a deep cavity etching method technical field

[0001] The present invention relates to the field of etching technology, and in particular to a deep cavity etching method. Background technique

[0002] In the molding process of microelectromechanical systems (MEMS) devices, deep cavity etching with steps is required. Etching requires coating photoresist on the surface of the substrate. This kind of deep cavity has a step depth difference. If the photoresist is coated only by the spin coating process, the photoresist is affected by fluidity and gravity during the spin coating process, and tends to gather at the lowest point on the substrate surface, resulting in the substrate surface The glue coating is not uniform, so the deep cavity etching with steps in the prior art usually adopts a combination of spin coating and spray glue. Cavity. Although the spray coating method can ensure that the photoresist is uniformly coated on the surface with a height difference, it is low in efficiency and high in cost compared with spin coating. Therefore, in order to further reduce the etching cost and increase the productivity, it is necessary to propose a method for realizing stepped deep cavity etching only by spin coating. Summary of Invention Technical Problem

[0003] The object of the present invention is to provide a stepped deep cavity etching method only by spin coating glue.

[0004] The technical solution of the present invention is as follows: A deep cavity etching method, the deep cavity includes a large cavity and a small cavity forming a step with the large cavity, the method includes the following steps.

[0005] A silicon substrate including at least an upper surface is provided.

[0006] An oxide layer is formed on the upper surface of the silicon substrate; the thickness of the oxide layer is a and satisfies the relationship: a

[0007] The first photoresist is spin-coated and patterned on the side of the oxide layer away from the silicon substrate.

[0008] Using the patterned first photoresist as a mask to etch the oxide layer to form a patterned oxide layer, the patterned oxide layer includes a first patterned oxide layer penetrating through the oxide layer and having the same shape as the large cavity An opening.

[0009] A second photoresist is spin-coated and patterned on the side of the patterned oxide layer facing away from the silicon substrate. [0010] Using the patterned second photoresist as a mask to etch the silicon substrate to form the same cavity as the small cavity The shape of the second opening.

[0011] The silicon substrate is etched using the patterned oxide layer as a mask to deepen the first opening and the second opening to form the small cavity and the large cavity.

[0012] More preferably, the relationship is satisfied: 2um a 4um.

[0013] More preferably, the depth of the large cavity is T, which satisfies the relationship: 50um<T _o

[0014] More preferably, the silicon substrate further includes a lower surface disposed opposite to the upper surface, and a cut-off layer is formed on a side of the lower surface far from the upper surface.

[0015] More preferably, the silicon substrate is etched using the patterned oxide layer as a mask to deepen the first opening and the second opening until the stop layer stops, forming the small cavity and the Great cavity.

[0016] More preferably, a device structure layer is provided on the side of the cut-off layer facing away from the silicon substrate.

[0017] More preferably, the silicon substrate is polysilicon.

[0018] More preferably, the cut-off layer is formed by thermal oxidation of the lower surface.

[0019] More preferably, the number of the first opening and the large cavity is equal and the number is several.

[0020] More preferably, the number of the second opening and the small cavity is equal and the number is several.

[0021] The beneficial effects of the present invention are: by forming a patterned patterned oxide layer on the upper surface of the silicon substrate as a mask for etching the silicon substrate, only two spin coatings are needed to etch to form a stepped depth Cavity, avoiding the photoresist spraying process with higher cost and lower efficiency, reducing process cost and increasing productivity. Solution to the problem Beneficial effect of the invention Brief description of the drawings Description of the drawings

[0022] FIG. 1 is a flowchart of the method of the present invention.

[0023] FIG. 2 is a schematic cross-sectional structure diagram of step S10 of the present invention.

[0024] FIG. 3 is a schematic cross-sectional structure diagram of the present invention from step S20 to step S30.

4 is a schematic diagram of the cross-sectional structure of the first photoresist removed after step S30 of the present invention.

[0026] FIG. 5 is a schematic cross-sectional structure diagram of the present invention from step S40 to step S50.

[0027] FIG. 6 is a schematic cross-sectional structure diagram of step S60 of the present invention.

[0028] FIG. 7 is a schematic diagram of the cross-sectional structure of the patterned oxide layer removed after step S60 of the present invention. Specific implementation of invention embodiments

[0029] The present invention will be further described below in conjunction with the drawings and embodiments.

[0030] This embodiment provides a deep cavity etching method. The deep cavity includes a large cavity 73 and a small cavity 74 that forms a step 75 with the large cavity 73. The small cavity 74 is located in the large cavity 73. The step 75 is formed by the height difference between the large cavity 73 and the small cavity 74.

[0031] Referring to FIG. 1, the method includes the following steps: Step S10: Provide a silicon substrate 30 including at least an upper surface 31; and an oxide layer 40 is formed on the upper surface 31 of the silicon substrate 30.

[0032] More preferably, referring to FIG. 2, the silicon substrate 30 includes an upper surface 31 and a lower surface 32 opposite to the upper surface 31. The upper surface is the side facing upward in FIG. 2, and the lower surface 32 is The side facing downwards in Figure 2. In this embodiment, an oxide layer is formed on the upper surface 31 of the silicon substrate 30, a stop layer 20 is formed on the lower surface 32 of the silicon substrate 30, and the stop layer 20 is silicon dioxide formed by thermal oxidation on the lower surface 32. The side of the stop layer 20 facing away from the silicon substrate 30 is a device structure layer 10, and the device structure layer 10 is one of single crystal silicon or polysilicon. In this embodiment, the device structure layer 10 is a single crystal silicon. Crystalline silicon.

[0033] Specifically, a silicon base 30 is provided as a substrate. In this embodiment, the silicon base 30 adopts a polycrystalline silicon material, and the polycrystalline silicon material is a kind of crystalline silicon, but is not limited to crystalline silicon as the substrate. Material.

[0034] More preferably, the upper surface 31 and the lower surface 32 are flat, so that the upper surface 31 is subjected to a spin coating process.

[0035] Specifically, the oxide layer 40 is formed by thermal oxidation of silicon crystals on the upper surface 31 of the silicon substrate to form silicon dioxide.

[0036] More preferably, the thickness of the oxide layer 40 is defined as a, which satisfies the relational expression: 0um<a<10um, and more preferably, satisfies the relational expression: 2um^a^4um, so that the oxide layer 40 is used as a mask for engraving When etching the silicon substrate 30, it is avoided that the height difference between the oxide layer 40 and the silicon substrate 30 is too large, which would affect the uniformity of the spin-coated photoresist.

[0037] Step S20: Spin coating the first photoresist 50 on the side of the oxide layer 40 away from the silicon substrate 30, and pattern it.

[0038] More preferably, the side of the oxide layer 40 facing away from the silicon substrate 30 is a flat surface, so as to improve the uniformity of the spin-coating and coating of the first photoresist 50.

[0039] More preferably, referring to FIG. 3, the first photoresist 50 is coated on the side of the oxide layer 40 away from the silicon substrate 30 through a spin coating process. [0040] More preferably, referring to FIG. 3, the first photoresist 50 is patterned, and the thickness of the first photoresist 50 is defined as b, which satisfies the relationship: b<10um, which is used as a mask Used to etch the oxide layer 40.

[0041] It can be understood that the patterning is to transfer a preset pattern from the photolithography mask to the photoresist through a well-known exposure and development technique, and the specific process of the patterning is not expanded in this embodiment.

[0042] Specifically, the planar contour shape of the large cavity on the photolithography mask is transferred to the first photoresist by patterning, so that the patterned first photoresist 50 is used as a mask on the oxide layer 40 The first opening 71 corresponding to the planar contour shape of the large cavity 73 is etched.

[0043] Step S30: Use the patterned first photoresist 50 as a mask to etch the oxide layer 40 to form a patterned oxide layer 41. The large cavity 73 has a first opening 71 of the same shape.

[0044] Specifically, referring to FIG. 3, the oxide layer 40 is etched using the patterned first photoresist 50 as a mask, and the etching solution etches the oxide layer 40 in a direction close to the silicon substrate 30. With respect to the oxide layer 40, the oxide layer 40 is etched to form a patterned oxide layer 41.

[0045] More preferably, the patterned oxide layer 41 includes a first opening 71, the first opening 71 passes through the oxide layer 40, and the planar contour shape of the first opening 71 is the same as the plane of the large cavity 73 The contour shape is the same. In this embodiment, the etching solution uses an etching solution corresponding to the etching of the oxide layer 40, which has a higher etching selection ratio of silicon dioxide to silicon. When the etching solution etches through the oxide layer 40 to The silicon substrate 30 is stopped naturally to prevent the etching solution from etching the silicon substrate 30.

[0046] More preferably, referring to FIG. 4, the first photoresist 50 is removed after the first opening 71 is formed to obtain the patterned oxide layer 41 having the first opening 71 that has the same shape as the large cavity 73 .

[0047] Specifically, in this embodiment, the etching solution completely etches through the oxide layer, so that the depth of the first opening is equal to the thickness of the oxide layer. In this embodiment, since the thickness a of the oxide layer 40 is 2um<a^4um, the first opening 71 is a shallow cavity with a height difference between 2um and 4um. Since the height difference of the first opening 71 is small, in the subsequent photoresist coating, it is beneficial to improve the uniformity of spin coating.

[0048] Step S40: Spin-coating and patterning a second photoresist 60 on the side of the patterned oxide layer 41 facing away from the silicon substrate 30.

[0049] Specifically, referring to FIG. 5, the second photoresist 60 is coated on the patterned oxide layer 41 by a spin coating process, and a part of the second photoresist 60 covers the patterned oxide layer 41 and faces away from the patterned oxide layer 41. One side of the silicon substrate 30, the other The second photoresist 60 is coated on the silicon substrate 30 through the first opening 71.

[0050] More preferably, the second photoresist 60 is patterned, and the thickness of the second photoresist 60 is defined as c, then the relationship is satisfied: c<10um, which is used as a mask for engraving Etch the silicon substrate 30.

[0051] Specifically, the planar contour shape of the small cavity 74 on the photolithography mask is transferred to the second photoresist 60 by patterning, so that the patterned second photoresist 60 is used as a mask on the silicon substrate. A second opening 72 corresponding to the planar contour shape of the small cavity 74 is etched on 30.

[0052] Step S50: Use the patterned second photoresist 60 as a mask to etch the silicon substrate 30 to form a second opening 72 having the same shape as the small cavity 74.

[0053] More preferably, referring to FIG. 5, the silicon substrate 30 is etched using the patterned second photoresist 60 as a mask, and the etching solution etches in a direction close to the stop layer 20 The silicon substrate 30.

[0054] Specifically, the silicon substrate 30 is etched using the patterned second photoresist 60 as a mask, and the silicon substrate is etched by the etching solution through the patterned second photoresist 60 30. The etching solution etches the silicon substrate 30 to form a second opening 72, and the second opening 72 is located in the first opening 71. The second opening 72 does not penetrate the silicon substrate 30, and the planar contour shape of the second opening 72 is the same as the planar contour shape of the small cavity 74.

[0055] More preferably, referring to FIG. 6, after the second opening 72 is formed, the second photoresist 60 is removed to proceed to step S60.

[0056] Step S60: Use the patterned oxide layer 71 as a mask to etch the silicon substrate 30 to deepen the first opening 71 and the second opening 72 to form the small cavity 74 and the large cavity 74 Cavities 73.

[0057] Specifically, referring to FIG. 6, the silicon substrate 30 is etched using the patterned oxide layer 41 as a mask, and the etching solution etches the silicon through the first opening 71 and the second opening 72 The substrate 30, the etching solution etches the silicon substrate 30 under the constraints of the patterned oxide layer 41, etches the silicon substrate 30 on the basis of the first opening 71 to form a large cavity 73, and at the same time, The silicon substrate 30 is etched on the basis of the two openings 72 to form a small cavity 74

[0058] More preferably, in this embodiment, the etching solution etches the silicon substrate 30 until the stop layer 20 stops to form a large cavity 73 and a small cavity 74. At this time, the small cavity 74 penetrates the silicon Base 30. Of course, in other optional implementation manners, the stop layer 20 may not be provided, and the etching speed and stopping can be controlled only by controlling the etching solution concentration or etching time and other parameters.

[0059] More preferably, referring to FIG. 7, the patterned oxide layer 41 is removed after step 60 to obtain a step The large cavity 73 and the small cavity 74 are preset deep cavities.

[0060] More preferably, the depth of the large cavity is defined as T, and the relationship is satisfied: 50um<T, since the large cavity 73 and the small cavity 74 are simultaneously etched and formed, the large cavity is a deep cavity with a depth greater than 50um It will not affect the photoresist spin-coating process when forming small cavities. Therefore, the deep cavity etching including the large cavity 73 and the small cavity 74 forming a step 75 with the large cavity 73 can be realized by only two photoresist spin coating processes in steps S20 and S40. Since the photoresist spin coating process is used both times, the photoresist spraying process is avoided, the process cost is greatly reduced, and the process efficiency is improved.

[0061] More preferably, the number of the first opening 51 and the large cavity 73 is equal and the number is several; the number of the second opening 61 and the small cavity 74 is the same and the number is several. In this embodiment, the number of the first opening 61 and the large cavity 73 is one. The number of the second opening 61 and the small cavity 74 is two.

[0062] Accordingly, in the present invention, a patterned patterned oxide layer 41 is formed on the upper surface 31 of the silicon substrate 30 as a mask for etching the silicon substrate 30, and only two spin coatings are needed to etch to form steps with steps. The 75 deep cavity avoids the higher cost and lower efficiency photoresist spraying process, reduces the process cost and increases the productivity.

[0063] The above are only the embodiments of the present invention. It should be pointed out here that for those of ordinary skill in the art, improvements can be made without departing from the inventive concept of the present invention, but these are all It belongs to the protection scope of the present invention. Industrial applicability

[0064] Type a paragraph describing industrial applicability here. Sequence listing free content

[0065] Type the free content description paragraph of the sequence table here.

Claims

[Claim 1] A deep cavity etching method, the deep cavity comprising a large cavity and a small cavity forming a step with the large cavity, characterized in that the method comprises the following steps: providing a silicon containing at least an upper surface A substrate; an oxide layer is formed on the upper surface of the silicon substrate; the thickness of the oxide layer is a and satisfies the relationship: a^ 10um; the first side of the oxide layer facing away from the silicon substrate is spin-coated and coated And pattern the photoresist; use the patterned first photoresist as a mask to etch the oxide layer to form a patterned oxide layer; The cavity has a first opening with the same shape; a second photoresist is spin-coated and patterned on the side of the patterned oxide layer facing away from the silicon substrate; and the patterned second photoresist is used as a mask The silicon substrate is etched by the film to form a second opening having the same shape as the small cavity; the silicon substrate is etched using the patterned oxide layer as a mask to deepen the first opening and the second opening , Forming the small cavity and the large cavity.

[Claim 2] The deep cavity etching method according to claim 1, characterized in that it satisfies the relationship: 2um<a<4um

[Claim 3] The deep cavity etching method of claim 1, wherein the depth of the large cavity is T, which satisfies the relationship:

50um<T _o

[Claim 4] The deep cavity etching method according to claim 1, wherein the silicon substrate further comprises a lower surface disposed opposite to the upper surface, and the lower surface is far from the upper surface. A cut-off layer is formed on one side.

[Claim 5] The deep cavity etching method of claim 4, wherein the silicon substrate is etched using the patterned oxide layer as a mask to deepen the first opening and the second opening Until the stop layer stops, the small cavity and the large cavity are formed.

[Claim 6] The deep cavity etching method of claim 5, wherein the cutoff layer is provided with a device structure layer on a side facing away from the silicon substrate.

[Claim 7] The deep cavity etching method of claim 4, wherein the silicon substrate is polysilicon.

[Claim 8] The deep cavity etching method of claim 7, wherein the stop layer is formed by thermal oxidation of the lower surface.

[Claim 9] The deep cavity etching method according to claim 1, wherein the number of the first opening and the large cavity is equal and the number is several.

[Claim 10] The deep cavity etching method according to claim 1, wherein the number of the second opening and the small cavity is equal and the number is several.