WO2021227912A1

WO2021227912A1 - Silicon-based optoelectronic device based on silicon photonics interposer technology, and preparation method therefor

Info

Publication number: WO2021227912A1
Application number: PCT/CN2021/091839
Authority: WO
Inventors: 蔡艳; 涂芝娟; 汪巍; 余明斌
Original assignee: 上海新微技术研发中心有限公司
Priority date: 2020-05-14
Filing date: 2021-05-06
Publication date: 2021-11-18

Abstract

A silicon-based optoelectronic device based on silicon photonics interposer technology, and a preparation method therefor. The device comprises a silicon photonics device which comprises an active device structure and a passive device structure, wherein the active device structure is provided with extraction electrodes (108) and is covered with a dielectric layer (110); interposing holes (111) and through-silicon vias (111a) which penetrate to a silicon substrate (101), wherein insulating layers (112) and conductive layers (113) are formed on inner walls of the interposing holes and the through-silicon vias; contact holes which penetrate to the extraction electrodes (108); front rewiring layers (115), wherein the front rewiring layers (115) are used for realizing an electrical connection between the extraction electrodes (108) of the active device structure and the conductive layers (113); first bump layers (117) which are formed on the front rewiring layers (115); reverse rewiring layers (118) which are electrically connected to the conductive layers (113); and second bump layers (120) which are formed on the reverse rewiring layers (118). The preparation of a silicon photonics interposer has relatively high compatibility with a silicon photonics device, so that the cost of optoelectronic hybrid integration can be greatly reduced; and ultra-short-distance electrical interconnection is provided for a silicon photonics chip and a control chip therefor, such that the integration density of the device can be effectively improved.

Description

Silicon-based optoelectronic device based on silicon optical switch board technology and preparation method thereof

Technical field

The invention belongs to the field of silicon optical device design and manufacturing, and particularly relates to a silicon-based optoelectronic device based on silicon optical switch board technology and a preparation method thereof.

Background technique

Silicon photonics technology has the advantages of low power consumption, low cost, and easy large-scale integration. It is generally recognized by the optical communication industry as the core technology of the next generation of optical communication devices and module systems. Silicon optical modules generally include laser chips, silicon optical chips, and electrical chips (mainly including the drive of the photoelectric modulator, the amplifier of the photodetector, and other matching and control circuits, such as clock recovery, serial-to-parallel conversion and switching circuits, etc.) And optical fiber array, etc.

At present, 100G/400G silicon optical modules are mostly integrated on the substrate. The discrete optical chip and the corresponding electric chip are connected by wire bonding or flip chip. The optical chip and the electric chip are also connected to each other by wire bonding. The substrates are connected. However, wire bonding in high-frequency and high-speed systems is limited to high-speed applications due to the obvious defects of RC delay and inductance effects. It is necessary to shorten the length of the wire bonding gold wire as much as possible to reduce high-frequency transmission loss. The flip-chip method uses direct interconnection, which can largely avoid the loss of gold wires. Therefore, silicon optical chips and corresponding electrical chips can reduce high-frequency transmission loss through flip-chip methods.

With the increase in the integration of silicon optical modules and the increase in speed requirements, in order to achieve transmission rates above Tbit/s, the existing wire bonding/flip chip optoelectronic packaging methods have encountered great challenges. The 2.5D/3D silicon transfer board technology is combined to form a silicon optical transfer board, which can effectively solve the key technical problem of high-speed and high-density interconnection between silicon optical chips, electrical chips and substrates.

The preparation of the existing silicon optical switch board has poor compatibility with the silicon optical device, which leads to problems such as high manufacturing cost of the silicon optical switch board and larger device volume.

Summary of the invention

In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a silicon-based optoelectronic device based on silicon optical switch board technology and a preparation method, which is used to solve the problem of silicon optical switch board preparation and silicon The poor compatibility of optical devices leads to problems such as higher manufacturing costs of silicon optical switch boards and larger device volumes.

In order to achieve the above objectives and other related objectives, the present invention provides a method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology. The manufacturing method includes: 1) providing a silicon optical device, the silicon optical device including SOI A substrate and an active device structure and a passive device structure based on the SOI substrate, the active device structure has an extraction electrode, and the extraction electrode is covered with a dielectric layer; 2) formed from the dielectric layer through to The via hole of the silicon substrate of the SOI substrate and the silicon via extending into the silicon substrate, an insulating layer is formed on the inner wall of the via hole and the silicon via, and then the via hole and the silicon via A conductive layer is filled in the through-silicon via; 3) a contact hole is formed from the dielectric layer to the extraction electrode of the active device structure; 4) a front rewiring layer is formed on the dielectric layer, and the front rewiring layer The contact hole is also filled to realize the electrical connection between the lead electrode of the active device structure and the conductive layer; 5) a first bump layer is formed on the front rewiring layer; 6) the thinning The silicon substrate of the SOI substrate until the conductive layer is exposed; 7) a reverse rewiring layer is formed on the silicon substrate, and the reverse rewiring layer is electrically connected to the conductive layer; 8) A second bump layer is formed on the reverse rewiring layer.

Optionally, step 1) includes: step 1-1) provides an SOI substrate, the SOI substrate includes a silicon substrate, a buried oxide layer and a top layer of silicon, on which a passive region and an active region are defined, Forming a passive device structure in the passive region, and forming an active device structure in the active region; step 1-2) forming a lead hole on the active device structure; step 1-3) forming a coplanar metal layer, The coplanar metal layer is located on the lead-out hole and fills the lead-out hole to connect with the active device structure, the coplanar metal layer is used for metal interconnection, and is used to form the active device structure Coplanar waveguide transmission line structure to improve the high-frequency transmission performance of silicon-based optoelectronic devices.

Optionally, the passive device structure includes one or more of optical transmission waveguides, couplers, beam splitters, and polarization rotators.

Optionally, the active device structure includes a modulator and a detector.

Optionally, the diameter of the via hole is larger than the diameter of the silicon via.

Optionally, step 2) filling a conductive layer in the via hole and silicon via includes: a) forming a diffusion barrier layer on the surface of the insulating layer; b) forming a seed layer on the surface of the diffusion barrier layer; c) An electroplating method is used to fill a metal layer in the via hole and the silicon through hole.

Optionally, the first bump layer and the second bump layer include a Cu/Ni/Sn stack or a Ni/Au stack.

The present invention also provides a silicon-based optoelectronic device based on silicon optical switch board technology. The silicon-based optoelectronic device includes: a silicon optical device, and the silicon optical device includes an SOI substrate and an active substrate based on the SOI substrate. A device structure and a passive device structure, the active device structure has an extraction electrode, the extraction electrode is covered with a dielectric layer; via holes and silicon vias, the via holes penetrate from the dielectric layer to the SOI The silicon substrate of the substrate, the through-silicon via extends into the silicon substrate, the inner wall of the via hole and the through-silicon via is formed with an insulating layer, the via hole and the through-silicon via are filled with a conductive layer; a contact hole, The lead-out electrode that penetrates from the dielectric layer to the active device structure; a front rewiring layer is formed on the dielectric layer, and the front rewiring layer also fills the contact hole to realize the active device The lead electrode of the structure is electrically connected to the conductive layer; the first bump layer is formed on the front rewiring layer; the reverse rewiring layer is formed on the silicon substrate, and the reverse rewiring layer It is electrically connected to the conductive layer; a second bump layer is formed on the reverse rewiring layer.

Optionally, the active device structure includes a modulator and a detector.

Optionally, the conductive layer includes: a diffusion barrier layer on the surface of the insulating layer, a seed layer on the surface of the diffusion barrier layer, and a metal layer filled in the via holes and silicon vias.

Optionally, it further includes a coplanar metal layer, the coplanar metal layer is located on the lead-out hole and connected to the active device structure through the contact hole, and the coplanar metal layer is used for metal interconnection, And a coplanar waveguide transmission line structure used to form the active device structure to improve the high frequency transmission performance of the silicon-based optoelectronic device.

As mentioned above, the silicon-based optoelectronic device based on the silicon optical switch board technology and the preparation method of the present invention have the following beneficial effects:

The preparation of the silicon optical switch board of the present invention has higher compatibility with silicon optical devices, and can greatly reduce the cost of photoelectric hybrid integration.

The invention performs vertical interconnection and rewiring on the monolithic integrated active passive photonic device through the via hole, provides ultra-short-distance electrical interconnection for the silicon optical chip and its control chip, and can effectively improve the integration of the device Density, reduce the influence of interconnection lines on high frequency and high speed.

The invention can effectively increase the port density, improve the integration of the device, and facilitate the connection with other devices or substrates through the rewiring layer and metal bumps on the front and back sides, and has a very wide application prospect.

The present invention forms the coplanar waveguide transmission line structure of the active device structure through the coplanar metal layer, which can effectively improve the high frequency transmission performance of the silicon-based optoelectronic device.

Description of the drawings

Figures 1 to 12 show the schematic diagrams of the various steps of the manufacturing method of the silicon-based optoelectronic device based on the silicon optical switch board technology according to the embodiment of the present invention. Schematic diagram of the structure of silicon-based optoelectronic devices based on board technology.

Component label description

101 Silicon substrate

102 Buried oxygen layer

103 Top silicon

104 Waveguide for optical transmission

105 Modulator

106 Detector

107 Coupler

108 Lead electrode

109 Coplanar metal layer

110 Media layer

111 Adapter hole

111a Silicon through hole

112 Insulation layer

113 Conductive layer

114 Leading hole

115 Front rewiring layer

116 Media material layer

117 The first bump layer

118 Rewiring layer on the reverse side

119 Media material layer

120 The second bump layer

Detailed ways

The following describes the implementation of the present invention through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

For example, when describing the embodiments of the present invention in detail, for the convenience of description, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the scope of protection of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual production.

For the convenience of description, spatial relation words such as "below", "below", "below", "below", "above", "up", etc. may be used herein to describe an element or The relationship between a feature and other elements or features. It will be understood that these spatial relationship terms are intended to encompass directions other than those depicted in the drawings of the device in use or operation. In addition, when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present.

In the context of the present application, the described structure in which the first feature is "above" the second feature may include an embodiment in which the first and second features are formed in direct contact, or may include other features formed on the first and second features. The embodiment between the second feature, so that the first and second features may not be in direct contact.

It should be noted that the diagrams provided in this embodiment only illustrate the basic idea of the present invention in a schematic manner, so the diagrams only show the components related to the present invention instead of the number, shape, and shape of the components in actual implementation. For the size drawing, the type, quantity, and proportion of each component can be changed at will during actual implementation, and the component layout type may also be more complicated.

As shown in Figures 1 to 12, this embodiment provides a method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology. The manufacturing method includes the following steps:

As shown in Figures 1 to 4, step 1) is first performed to provide a silicon optical device. The silicon optical device includes an SOI substrate and an active device structure and a passive device structure based on the SOI substrate. The device structure has a lead-out electrode 108, and the lead-out electrode 108 is covered with a dielectric layer 110.

For example, the passive device structure includes one or more of a waveguide 104 for optical transmission, a coupler 107, a beam splitter, and a polarization rotator. The active device structure includes a modulator 105 and a detector 106.

Specifically, step 1) includes:

As shown in Figure 1, step 1-1) is first performed to provide an SOI substrate. The SOI substrate includes a silicon substrate 101, a buried oxide layer 102, and a top silicon 103. On the top silicon 103, passive regions and In the active area, a passive device structure is formed in the passive area, and an active device structure is formed in the active area; for example, a waveguide 104, a coupler 107, and a splitter for optical transmission may be formed in the top layer of silicon 103 Passive devices such as beamers and polarization rotators form the base of active devices such as the waveguide of the modulator 105 and the germanium epitaxial substrate. Then, the active devices are doped, for example, the waveguide of the modulator 105 is doped. Doping and doping the germanium epitaxial substrate, etc., then, epitaxial germanium on the germanium epitaxial substrate, and doping the germanium to form a germanium detector 106.

As shown in FIG. 2, then step 1-2) is performed to form a lead hole 114 on the active device structure; for example, the modulator 105 and the detector 106 form a lead hole 114 for metal contact interconnection, and the lead hole 114 is formed in the lead hole 114. During the deposition, the diffusion layer and the seed layer are blocked, and then the conductive metal is filled, and the conductive metal may be a metal such as tungsten.

As shown in FIG. 3, step 1-3) is then performed to form a coplanar metal layer 109, which is located on the lead hole 114 and fills the lead hole 114 to be compatible with the active device structure For connection, the coplanar metal layer 109 is used for metal interconnection and a coplanar waveguide transmission line structure for forming the active device structure to improve the high frequency transmission performance of the silicon-based optoelectronic device.

As shown in FIG. 4, finally, a dielectric layer is deposited on the surface of the above structure, and the dielectric layer may be silicon nitride or silicon dioxide.

As shown in Figures 5 to 6, then step 2) is performed to form via holes 111 penetrating from the dielectric layer 110 to the silicon substrate 101 of the SOI substrate, and the silicon substrate extending into the silicon substrate. Through hole 111a, an insulating layer 112 is formed on the inner wall of the via hole 111 and the silicon via 111a, and then a conductive layer is filled in the via hole 111 and the silicon via 111a.

The diameter of the silicon through hole is 5-30 microns, and the depth is 80-100 microns. In this embodiment, the diameter of the via hole 111 is selected to be larger than the diameter of the silicon via, for example, 15 to 50 microns. The via hole 111 used in this embodiment has a larger diameter, which can effectively improve subsequent insulation. The continuity of the layer 112, the diffusion barrier layer, and the seed layer during the deposition on the sidewall of the via hole 111, and at the same time, facilitates the filling of subsequent metal materials, avoids the generation of defects such as holes due to insufficient filling capacity, and greatly improves the device stability. At the same time, the via hole 111 with a larger diameter can effectively improve the electrical transmission capability of the device and reduce the impedance of the device.

Specifically, filling the conductive layer 113 in the via hole 111 and the silicon via 111a includes the following steps:

a) forming a diffusion barrier layer on the surface of the insulating layer 112;

b) forming a seed layer on the surface of the diffusion barrier layer;

c) Using an electroplating method to fill the via hole 111 and the silicon through hole 111a with a metal layer. Wherein, the insulating layer 112 may be a material such as silicon dioxide, the seed layer may be a material such as Ti, and the metal layer may be a material such as copper.

Further, after electroplating, the metal layer above the surface of the dielectric layer 110 can be polished or etched away using CMP or wet etching to obtain a flat surface and electrically independent via holes 111.

As shown in FIG. 7, step 3) is then performed to form a contact hole penetrating from the dielectric layer 110 to the lead electrode 108 of the active device structure through photolithography and etching processes.

As shown in FIG. 8, then proceed to step 4) to form a front rewiring layer 115 on the dielectric layer 110, and the front rewiring layer 115 also fills the contact holes to realize the extraction of the active device structure The electrode 108 is electrically connected to the conductive layer 113.

The front rewiring layer 115 includes alternately stacked insulating media and metal wiring layers. Two adjacent metal wiring layers have conductive vias penetrating the insulating media. The insulating media and metal wiring layers may be one or two layers. Layer, three-layer, four-layer or more, can be decided according to the specific I/O number.

As shown in FIG. 9, step 5) is then performed to form a first bump layer 117 on the front rewiring layer 115.

Specifically, a dielectric material layer 116, such as a photoresist layer, is first formed on the front rewiring layer 115, and then an opening is formed in the dielectric material layer 116, and the opening exposes the via hole 111. The conductive layer 113, and finally a first bump layer 117 is formed in the opening.

For example, the first bump layer 117 includes a Cu/Ni/Sn stack or a Ni/Au stack.

As shown in FIG. 10, step 6) is then performed to thin the silicon substrate 101 of the SOI substrate until the conductive layer 113 is exposed.

For example, the front surface of the above-mentioned SOI substrate can be temporarily bonded to the wafer carrier, and then the thickness is reduced from the back surface of the silicon substrate 101 of the SOI substrate until the conductive layer 113 in the via hole 111 is exposed. It may include grinding, cleaning, CMP, wet etching, dry etching, and so on.

As shown in FIG. 11, step 7) is then performed to form a reverse rewiring layer 118 on the silicon substrate 101, and the reverse rewiring layer 118 is electrically connected to the conductive layer 113.

The reverse rewiring layer 118 includes alternately stacked insulating media and metal wiring layers. Two adjacent metal wiring layers have conductive vias penetrating through the insulating media. The insulating media and metal wiring layers can be one or two layers. Layer, three-layer, four-layer or more, can be decided according to the specific I/O number.

As shown in FIG. 12, step 8) is finally performed to form a second bump layer 120 on the reverse rewiring layer 118.

Specifically, a dielectric material layer 119, such as a photoresist layer, is first formed on the reverse rewiring layer 118, and then an opening is formed in the dielectric material layer 119, and the opening exposes the through hole 111 The conductive layer 113 finally forms a second bump layer 120 in the opening.

For example, the second bump layer 120 includes a Cu/Ni/Sn stack or a Ni/Au stack.

As shown in FIG. 12, this embodiment also provides a silicon-based optoelectronic device based on silicon optical switch board technology. The silicon-based optoelectronic device includes: a silicon optical device, and the silicon optical device includes an SOI substrate and The active device structure and passive device structure of the SOI substrate are described. The active device structure has an extraction electrode 108, and the extraction electrode 108 is covered with a dielectric layer 110; via holes 111 and through silicon vias 111a, the transfer The contact hole 111 penetrates from the dielectric layer 110 to the silicon substrate 101 of the SOI substrate, the silicon through hole 111a extends into the silicon substrate, and an insulating layer is formed on the inner wall of the through hole 111 and the silicon through hole 111a 112. The via hole 111 and the silicon via 111a are filled with a conductive layer 113; a contact hole penetrates from the dielectric layer 110 to the lead electrode 108 of the active device structure; a front rewiring layer 115 is formed in the On the dielectric layer 110, the front rewiring layer 115 also fills the contact holes to realize the electrical connection between the lead electrode 108 of the active device structure and the conductive layer 113; the first bump layer 117, Is formed on the front rewiring layer 115; the reverse rewiring layer 118 is formed on the silicon substrate 101, and the reverse rewiring layer 118 is electrically connected to the conductive layer 113; the second bump layer 120 , Formed on the reverse rewiring layer 118.

The passive device structure includes one or more of a waveguide 104 for optical transmission, a coupler 107, a beam splitter, and a polarization rotator. Optionally, the active device structure includes a modulator 105 and a detector 106.

The conductive layer 113 includes: a diffusion barrier layer on the surface of the insulating layer 112, a seed layer on the surface of the diffusion barrier layer, and a metal layer filled in the via hole 111 and the silicon via 111a.

The first bump layer 117 and the second bump layer 120 include a Cu/Ni/Sn stack or a Ni/Au stack.

The silicon-based optoelectronic device further includes a coplanar metal layer 109, the coplanar metal layer 109 is located on the lead hole 114 and connected to the active device structure through the contact hole, the coplanar metal layer 109 Used for metal interconnection, and used for forming the coplanar waveguide transmission line structure of the active device structure, so as to improve the high frequency transmission performance of the silicon-based optoelectronic device.

Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial value.

The above-mentioned embodiments only exemplarily illustrate the principles and effects of the present invention, but are not used to limit the present invention. Anyone familiar with this technology can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.

Claims

A method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology, characterized in that, the manufacturing method includes:

1) A silicon optical device is provided. The silicon optical device includes an SOI substrate and an active device structure and a passive device structure based on the SOI substrate. The active device structure has an extraction electrode, and the extraction electrode is covered with There is a dielectric layer;

2) forming a via hole penetrating through the silicon substrate of the SOI substrate from the dielectric layer, and a silicon via extending into the silicon substrate, forming an insulating layer on the via hole and the inner wall of the silicon via, Then, a conductive layer is filled in the via hole and the silicon via;

3) forming a contact hole penetrating from the dielectric layer to the extraction electrode of the active device structure;

4) forming a front rewiring layer on the dielectric layer, and the front rewiring layer also fills the contact hole to realize electrical connection between the lead electrode of the active device structure and the conductive layer;

5) forming a first bump layer on the front rewiring layer;

6) Thin the silicon substrate of the SOI substrate until the conductive layer is exposed;

7) forming a reverse rewiring layer on the silicon substrate, and the reverse rewiring layer is electrically connected to the conductive layer;

8) A second bump layer is formed on the reverse rewiring layer.
The method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology according to claim 1, wherein step 1) comprises:

Step 1-1) Provide an SOI substrate. The SOI substrate includes a silicon substrate, a buried oxide layer and a top silicon. A passive region and an active region are defined on the top silicon, and a passive region is formed on the passive region. A device structure, forming an active device structure in the active region;

Step 1-2) forming lead holes on the active device structure;

Step 1-3) Form a coplanar metal layer, the coplanar metal layer is located on the lead-out hole and fills the lead-out hole to connect with the active device structure, and the coplanar metal layer is used for metal interconnection , And a coplanar waveguide transmission line structure used to form the active device structure to improve the high frequency transmission performance of the silicon-based optoelectronic device.
The method for manufacturing silicon-based optoelectronic devices based on silicon optical switch board technology according to claim 1, wherein the passive device structure includes optical transmission waveguides, couplers, beam splitters, and polarization rotators. One or more of.
The method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology according to claim 1, wherein the active device structure includes a modulator and a detector.
The method for manufacturing a silicon-based optoelectronic device based on the silicon photoelectric switch board technology according to claim 1, wherein the diameter of the through hole is larger than the diameter of the silicon through hole.
The method for manufacturing a silicon-based optoelectronic device based on silicon photoelectric switch board technology according to claim 1, characterized in that: step 2) filling a conductive layer in the via hole and the silicon via comprises:

a) forming a diffusion barrier layer on the surface of the insulating layer;

b) forming a seed layer on the surface of the diffusion barrier layer;

c) Using an electroplating method to fill a metal layer in the via hole and the silicon through hole.
The method for manufacturing a silicon-based optoelectronic device based on silicon optical switch board technology according to claim 1, wherein the first bump layer and the second bump layer comprise Cu/Ni/Sn stack or Ni /Au stack.
A silicon-based optoelectronic device based on silicon optical switch board technology, which is characterized in that it comprises:

A silicon optical device, the silicon optical device includes an SOI substrate and an active device structure and a passive device structure based on the SOI substrate, the active device structure has an extraction electrode, and the extraction electrode is covered with a dielectric layer ；

Via hole and silicon via, the via hole penetrates from the dielectric layer to the silicon substrate of the SOI substrate, the via silicon extends into the silicon substrate, the via hole and the inner wall of the silicon via An insulating layer is formed, and a conductive layer is filled in the via hole and the silicon through hole;

A contact hole, which penetrates from the dielectric layer to the lead-out electrode of the active device structure;

The front rewiring layer is formed on the dielectric layer, and the front rewiring layer also fills the contact hole to realize the electrical connection between the lead electrode of the active device structure and the conductive layer;

The first bump layer is formed on the front rewiring layer;

The reverse rewiring layer is formed on the silicon substrate, and the reverse rewiring layer is electrically connected to the conductive layer;

The second bump layer is formed on the reverse rewiring layer.
The silicon-based optoelectronic device based on silicon optical switch board technology according to claim 8, wherein the passive device structure includes one of a waveguide for optical transmission, a coupler, a beam splitter, and a polarization rotator Or multiple.
The silicon-based optoelectronic device based on silicon optical switch board technology according to claim 8, wherein the active device structure includes a modulator and a detector.
8. The silicon-based optoelectronic device based on the silicon optical switch board technology according to claim 8, wherein the diameter of the via hole is larger than the diameter of the silicon through hole.
The silicon-based optoelectronic device based on the silicon light switch board technology according to claim 8, wherein the conductive layer comprises: a diffusion barrier layer on the surface of the insulating layer, and a seed on the surface of the diffusion barrier layer. Layer and a metal layer filled in the via hole and silicon via.
The silicon-based optoelectronic device based on silicon optical switch board technology according to claim 8, wherein the first bump layer and the second bump layer comprise a Cu/Ni/Sn stack or a Ni/Au stack Floor.
The silicon-based optoelectronic device based on silicon optical switch board technology according to claim 8, characterized in that it further comprises a coplanar metal layer, the coplanar metal layer is located on the lead-out hole and passes through the contact hole. The active device structure is connected, the coplanar metal layer is used for metal interconnection, and the coplanar waveguide transmission line structure is used to form the active device structure, so as to improve the high frequency transmission performance of the silicon-based optoelectronic device.