WO2021208944A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2021208944A1
WO2021208944A1 PCT/CN2021/087152 CN2021087152W WO2021208944A1 WO 2021208944 A1 WO2021208944 A1 WO 2021208944A1 CN 2021087152 W CN2021087152 W CN 2021087152W WO 2021208944 A1 WO2021208944 A1 WO 2021208944A1
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WO
WIPO (PCT)
Prior art keywords
light
pixel driving
pixel
row
driving circuits
Prior art date
Application number
PCT/CN2021/087152
Other languages
English (en)
French (fr)
Inventor
孙世成
郭钟旭
史大为
张伟
石天雷
赵东升
刘杰
王培�
Original Assignee
京东方科技集团股份有限公司
重庆京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 重庆京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/780,388 priority Critical patent/US20230006015A1/en
Publication of WO2021208944A1 publication Critical patent/WO2021208944A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different

Definitions

  • the present invention relates to the field of display technology, and in particular to a display panel and a display device.
  • display devices have the advantages of thinner and lighter size, lower and lower power consumption, and larger and larger viewing angles, and their application scope is becoming wider and wider.
  • components with specific functions, such as optical sensors, can also be provided in the display device, so as to achieve more functions and further enhance the practicability.
  • a display panel has a display area and a peripheral area located at the periphery of the display area.
  • the display area includes a first area and a second area; the display panel includes a display area located in the first area.
  • the plurality of pixel driving circuits located in the first area are distributed in multiple rows and multiple columns; the number of pixel driving circuits in each row is smaller than the number of pixel driving circuits in the first area number.
  • each row of pixel drive circuits includes: a plurality of circuit groups, each circuit group includes m continuously distributed pixel drive circuits, m ⁇ 1, every two adjacent There is no pixel drive circuit in the consecutive n columns between the circuit groups, and n ⁇ 1.
  • a plurality of pixel driving circuits located in the same column are all distributed in odd or even rows.
  • the display panel further includes: at least one first signal line and/or at least one second signal line; a plurality of pixel driving circuits located in two adjacent rows pass through one first signal line in the row direction.
  • the signal lines are connected in sequence; the multiple pixel drive circuits located in two adjacent columns are sequentially connected through a second signal line; wherein, the multiple pixel drive circuits connected to the same second signal line are alternately distributed in odd rows And even rows.
  • the scan signal terminals of the plurality of pixel driving circuits in the i-th row and the (i+1)th row in the row direction are sequentially connected through a first signal line; i ⁇ 1.
  • the i+1-th strobe signal terminal is more than that of the i-th row.
  • the scanning signal terminals of the pixel driving circuits and the reset signal terminals of the plurality of pixel driving circuits in the (i+1)th row are sequentially connected through a first signal line; i ⁇ 1.
  • the enable signal terminals of the plurality of pixel driving circuits in the i-th row and the i+1-th row in the row direction are sequentially connected through a first signal line; i ⁇ 1.
  • the display panel further includes a plurality of control signal terminals; when i is an odd number, the enable signal terminal of the pixel driving circuit in the i-th row is connected to the (i+1)/2th The control signal terminal is connected; when i is an even number, the enable signal terminal of the pixel driving circuit in the i-th row is connected to the i/2-th control signal terminal; and/or, the display panel further includes an initialization voltage terminal (Vinit), the initialization voltage terminal is connected to each of the pixel driving circuits.
  • Vinit initialization voltage terminal
  • the power supply voltage terminals of the plurality of pixel driving circuits in the jth column and the j+1th column are sequentially connected through a second signal line; j ⁇ 1.
  • the display panel further includes a plurality of first voltage terminals; according to the arrangement sequence of the plurality of pixel driving circuits in the jth column and the j+1th column in the column direction, the first voltage terminal The power supply voltage terminals of the plurality of pixel driving circuits in the jth column and the power supply voltage terminals of the plurality of pixel driving circuits in the j+1th column are sequentially connected through a second signal line; j ⁇ 1. 13.
  • the display panel further includes a plurality of data signal terminals; according to the arrangement order of the plurality of pixel driving circuits in the jth column and the j+1th column in the column direction, the data signal terminal and the The data terminals of the plurality of pixel driving circuits in the j column and the data terminals of the plurality of pixel driving circuits in the j+1th column are sequentially connected by a second signal line; j ⁇ 1.
  • the display panel further includes a plurality of light-emitting devices; each light-emitting device is coupled to a pixel driving circuit to form a light-emitting sub-pixel.
  • the multiple light-emitting sub-pixels include a first-type light-emitting sub-pixel, a second-type light-emitting sub-pixel, and a third-type light-emitting sub-pixel; the light-emitting sub-pixels of the same type have the same light-emitting color, and the light-emitting sub-pixels of different types have different light-emitting colors.
  • the plurality of light-emitting sub-pixels located in odd-numbered columns among the plurality of light-emitting sub-pixels are the first-type light-emitting sub-pixels, and the plurality of light-emitting sub-pixels located in even-numbered columns among the plurality of light-emitting sub-pixels alternate in order according to the column direction.
  • the second type of light-emitting sub-pixel and the third type of light-emitting sub-pixel; or, the plurality of light-emitting sub-pixels located in even-numbered columns of the plurality of light-emitting sub-pixels are the first type light-emitting sub-pixels, and the plurality of light-emitting sub-pixels are located in odd numbers.
  • the plurality of light-emitting sub-pixels in the column alternate into the second-type light-emitting sub-pixels and the third-type light-emitting sub-pixels in sequence according to the column direction.
  • every three consecutive sub-pixels of different types constitute one pixel.
  • a display device in another aspect, includes the display panel according to any one of the above-mentioned embodiments.
  • the display device further includes an optical sensor, the optical sensor is arranged on a side of the display panel facing away from the light-emitting surface, and the optical sensor is arranged directly opposite to the first area.
  • FIG. 1 is a structural diagram of a display device provided by an embodiment of the disclosure
  • FIG. 2 is a structural diagram of a display panel provided by an embodiment of the disclosure.
  • FIG. 3 is a structural diagram of a light-emitting sub-pixel of a display panel provided by an embodiment of the disclosure
  • FIG. 4 is a structural diagram of a display panel provided in the related art
  • FIG. 5 is a structural diagram of another display panel provided by an embodiment of the disclosure.
  • FIG. 6 is a structural diagram of a pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 7 is a connection structure diagram of the pixel driving circuit shown in FIG. 6;
  • FIG. 8 is a structural diagram of another pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 9 is a connection structure diagram of the pixel driving circuit shown in FIG. 8.
  • FIG. 10 is a connection structure diagram of a pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 11 is a connection structure diagram of another pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 12 is a connection structure diagram of yet another pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 13 is a connection structure diagram of still another pixel driving circuit provided by an embodiment of the disclosure.
  • Fig. 14a is a connection structure diagram of a pixel driving circuit provided in the related art.
  • FIG. 14b is a connection structure diagram of another pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 15 is a connection structure diagram of yet another pixel driving circuit provided by an embodiment of the disclosure.
  • FIG. 16 is a timing diagram of a driving signal provided by an embodiment of the disclosure.
  • FIG. 17 is a light-emitting sub-pixel distribution diagram of a display panel provided in the related art.
  • FIG. 18 is a distribution diagram of light-emitting sub-pixels of a display panel provided by an embodiment of the present disclosure.
  • FIG. 19 is a light-emitting sub-pixel distribution diagram of another display panel provided by an embodiment of the present disclosure.
  • FIG. 20 is a structural diagram of a display device provided by an embodiment of the disclosure.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present disclosure, unless otherwise specified, “plurality” means two or more.
  • the expressions “coupled” and “connected” and their extensions may be used.
  • the term “connected” may be used when describing some embodiments to indicate that two or more components are in direct physical or electrical contact with each other.
  • the term “coupled” may be used when describing some embodiments to indicate that two or more components have direct physical or electrical contact.
  • the term “coupled” or “communicatively coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited to the content of this document.
  • At least one of A, B, and C has the same meaning as “at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, A and B The combination of A and C, the combination of B and C, and the combination of A, B and C.
  • a and/or B includes the following three combinations: A only, B only, and the combination of A and B.
  • the term “if” is optionally interpreted as meaning “when” or “when” or “in response to determination” or “in response to detection.”
  • the phrase “if it is determined" or “if [the stated condition or event] is detected” is optionally interpreted to mean “when determining" or “in response to determining" Or “when [stated condition or event] is detected” or “in response to detecting [stated condition or event]”.
  • the exemplary embodiments are described herein with reference to cross-sectional views and/or plan views as idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Therefore, variations in the shape with respect to the drawings due to, for example, manufacturing technology and/or tolerances can be envisaged. Therefore, the exemplary embodiments should not be construed as being limited to the shape of the area shown herein, but include shape deviations due to, for example, manufacturing.
  • an etched area shown as a rectangle will generally have curved features. Therefore, the areas shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the area of the device, and are not intended to limit the scope of the exemplary embodiments.
  • an optical sensor for example, a camera
  • the side of the screen (ie, display panel) of the display device away from the light-emitting surface that is, the optical sensor is placed on the display panel.
  • an under-screen optical sensor is formed to remove the space occupied by the optical sensor on the display panel. In this design, outside light needs to pass through the display panel to be transmitted to the under-screen optical sensor.
  • the light transmittance of the display panel is low, so that the under-screen optical sensor receives insufficient light, which affects the function of the under-screen optical sensor.
  • some embodiments of the present disclosure provide a display device, including: a display panel 10; And a housing 30 that protects the display panel 10 and the middle frame 20.
  • the display device can be a monitor, a TV, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital Cameras, portable camcorders, viewfinders, navigators, car display devices, large-area wall display devices, home appliances, information inquiry equipment (such as business inquiry equipment in e-government, banking, hospitals, electric power and other departments), monitors, etc. .
  • PDA personal digital assistant
  • a digital Cameras portable camcorders, viewfinders, navigators, car display devices, large-area wall display devices, home appliances, information inquiry equipment (such as business inquiry equipment in e-government, banking, hospitals, electric power and other departments), monitors, etc.
  • the display panel may be an OLED (Organic Light Emitting Diode) panel, a QLED (Quantum Dot Light Emitting Diode) panel, a micro LED (including miniLED or microLED) panel, and the like.
  • OLED Organic Light Emitting Diode
  • QLED Quadantum Dot Light Emitting Diode
  • micro LED including miniLED or microLED
  • the display panel is an OLED display panel as an example for related description.
  • the display panel 10 has a display area A and a peripheral area B located at the periphery of the display area, wherein the peripheral area B is located on at least one side of the display area A.
  • the peripheral area B may be arranged around the display area A in a circle.
  • the display panel includes a plurality of pixel driving circuits and a plurality of light-emitting devices L.
  • Each light-emitting device L is coupled to a pixel driving circuit to form a light-emitting sub-pixel, and the pixel driving circuit is configured to drive the light-emitting device L to emit light.
  • the plurality of light-emitting sub-pixels include a first-type light-emitting sub-pixel, a second-type light-emitting sub-pixel, and a third-type light-emitting sub-pixel.
  • the light-emitting sub-pixels of the same type have the same light-emitting color, and different types of light-emitting sub-pixels have different light-emitting colors. For example, referring to FIG.
  • each light-emitting sub-pixel 101 can emit light of one of the three primary colors, then the first-type light-emitting sub-pixel may be a red light-emitting sub-pixel 101-R, and the second-type light-emitting sub-pixel may be a green light-emitting sub-pixel. 101-G, the third type of light-emitting sub-pixel may be a blue light-emitting sub-pixel 101-B.
  • the light emitting device L may adopt a light emitting device including LED (Light Emitting Diode), OLED (Organic Light Emitting Diode), or QLED.
  • the display panel is an OLED display panel, so the light-emitting device L used is an OLED device.
  • a plurality of OLED devices can be provided in the display panel 10. Since the OLED devices can realize self-luminescence, there is no need to provide a backlight source in a display device with a plurality of OLED devices.
  • the display panel 10 may include a substrate 110, an anode 111, a hole transport layer (HTL) 112, a light emitting layer (for example, an organic light emitting layer) 113, and electrons arranged in sequence.
  • the anode 111, the hole transport layer 112, the light-emitting layer 113, the electron transport layer 114, and the cathode 115 are sequentially stacked on the substrate 110 to form a light-emitting device.
  • the substrate is configured to carry multiple film layers.
  • the substrate may be a rigid substrate; the rigid substrate may be, for example, a glass substrate or a PMMA (Polymethyl methacrylate) substrate or the like.
  • the substrate may be a flexible substrate; the flexible substrate may be, for example, a PET (Polyethylene terephthalate, polyethylene terephthalate) substrate, a PEN (Polyethylene naphthalate two formic acid glycol ester, polyethylene naphthalate) ) Substrate or PI (Polyimide, polyimide) substrate, etc.
  • a circuit layer may be formed on the substrate, the circuit layer may include a plurality of pixel driving circuits, and the substrate on which the circuit layer is formed may be referred to as a driving backplane. Multiple light-emitting devices may be arranged on the side of the circuit layer away from the substrate.
  • the anode may be formed of a transparent conductive material with a high work function
  • the electrode material may include indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium zinc oxide (GZO) oxide.
  • the cathode can be formed of materials with high conductivity and low work function, for example, and its electrode materials can include magnesium aluminum alloy (MgAl) and lithium Alloys such as aluminum alloy (LiAl) or simple metals such as magnesium (Mg), aluminum (Al), lithium (Li), and silver (Ag).
  • the material of the organic light-emitting layer can be selected according to the color of the emitted light.
  • the material of the organic light-emitting layer includes a fluorescent light-emitting material or a phosphorescent light-emitting material.
  • the organic light-emitting layer may adopt a doping system, that is, a dopant material is mixed into the host light-emitting material to obtain a usable light-emitting material.
  • the host light-emitting material may use metal compound materials, anthracene derivatives, aromatic diamine compounds, triphenylamine compounds, aromatic triamine compounds, benzidine diamine derivatives, and triarylamine polymers.
  • the material type of the organic light-emitting layer is different, the color of the emitted light is different, so that the corresponding sub-pixel emits different colors.
  • multiple (for example, three) light-emitting sub-pixels with different light-emitting colors may constitute one pixel.
  • the display panel may include a plurality of pixels in the display area, for example, the plurality of pixels may be distributed in multiple rows and multiple columns.
  • three adjacent light-emitting sub-pixels 101 with different light-emitting colors constitute one pixel 160.
  • one pixel 160 may be formed for the adjacent red light-emitting sub-pixel 101-R, green light-emitting sub-pixel 101-G, and blue light-emitting sub-pixel 101-B shown in FIG. 3.
  • a voltage is applied to the anode 111 and the cathode 115, the electrons in the cathode 115 move to the organic light-emitting layer 113 through the electron transport layer 114 under the action of the voltage, and the holes in the anode 111 are at the voltage Under the action of, the hole transport layer 112 moves to the organic light-emitting layer 113, and the electrons and holes combine in the organic light-emitting layer 113 to emit light, thereby realizing self-luminescence.
  • the luminous intensity of the OLED device can be changed, thereby realizing the display of a color screen.
  • the encapsulation layer can be used to ensure good internal sealing of the OLED device, reduce the contact of the OLED device with oxygen, water vapor, etc. in the external environment, and can maintain the stable performance of the OLED device and prolong the service life of the OLED device.
  • the substrate and the packaging layer may be sealed by packaging glue.
  • the encapsulation layer may include an inorganic encapsulation layer, an organic encapsulation layer, and an inorganic encapsulation layer stacked in sequence, which are fabricated on a substrate on which the pixel driving circuit and the light-emitting device are formed through a film layer preparation process to encapsulate the light-emitting device.
  • the film preparation process may include, for example, at least one of a vapor deposition process, a spin coating process, and the like.
  • the display area A has a first area A1 and a second area A2. There may be one or more first areas A1 in the display area A.
  • the display area A includes a first area A1 as an example for exemplary description, and the description is unified here, and details are not repeated below.
  • all areas in the display area A except for the first area A1 are the second area A2.
  • the second area A2 is only used to distinguish from the first area A1, and does not mean a special area in the display area A.
  • the first area A1 and the second area A2 in FIG. 2 are only for illustration, and the actual sizes of the first area A1 and the second area A2 are not limited.
  • the display panel includes multiple light-emitting sub-pixels 101A located in the first area A1 and multiple light-emitting sub-pixels 101A located in the second area A2, that is, the display panel 10 includes multiple pixels located in the first area A1
  • the driving circuit 300 and the plurality of pixel driving circuits located in the second area wherein the density of the pixel driving circuits in the first area is less than the density of the pixel driving circuits 300 in the second area A2.
  • the display area A of the display panel 10 includes a first area A1 and a second area A2.
  • the pixel drive circuits 300 are approximately evenly distributed in both the row direction and the column direction, that is, the distance d1 between every two adjacent pixel drive circuits 300 in each row (that is, a certain point on a pixel drive circuit).
  • the distance to the corresponding point on the adjacent pixel driving circuit may be the distance between the connection points for coupling the light-emitting devices in two adjacent pixel driving circuits) is approximately equal, and each adjacent pixel in each column
  • the distance d2 between the two pixel driving circuits 300 is approximately equal.
  • the density of the pixel driving circuit 300 in the second area A2 there are, for example, 7*7 positions in FIG. 2 where the pixel driving circuit 300 can be placed in the first area A1.
  • these 7*7 positions only some of the positions are provided with the pixel driving circuit 300, and the other positions are not provided with the pixel driving circuit 300, so that the density of the pixel driving circuit 300 in the first area A1 is less than that of the pixel driving circuit in the second area A2.
  • density For example, in FIG. 2, there are 9 locations (represented by squares filled with diagonal lines) where the pixel driving circuit 300 is not provided. In this embodiment, such a position where the pixel driving circuit is not provided can be referred to as a vacant position.
  • a pixel drive circuit is not provided in a part of the first region, and the location where the pixel drive circuit is not provided has a higher light transmittance than the location where the pixel drive circuit is provided.
  • the light transmittance of the first region is As the light transmittance of the display panel is improved, the first area A1 can also be referred to as the transmittance increase area. Through the transmittance increase area of the display panel 10, the amount of light that can be received by the under-screen optical sensor is increased, so that the realization of the under-screen optical sensor function can be ensured.
  • the plurality of pixel driving circuits 300 located in the first area A1 in the display panel 10 are distributed in multiple rows and multiple columns, and the number of pixel driving circuits 300 in each row is smaller than that in the first area A1.
  • the multi-row and multi-column distribution of the pixel driving circuit may be an array distribution or other distribution structure, which is not limited.
  • the plurality of pixel driving circuits 300 in the first area A1 are not arranged in an array, but are only arranged in the row direction and the column direction.
  • the plurality of pixel driving circuits 300 in the first area A1 are not arranged in an array, but are only arranged in the row direction and the column direction.
  • In at least one row there is at least one column without the pixel driving circuit 300; In at least one column, there is at least one row where the pixel driving circuit 300 is not provided.
  • the area where the pixel drive circuit is not provided has a higher light transmittance than the area where the pixel drive circuit is provided. Therefore, the area where at least one adjacent column of the pixel drive circuit is not provided in each row is called a circuit vacant area, which includes One vacant position, or at least two consecutive vacant positions. Since there is at least one (for example, multiple) circuit vacancies in each row, the circuit vacancies in the first area are more evenly distributed along the column direction, so that the first area can transmit light along the column direction. More evenly.
  • each row of pixel driving circuits 300 includes a plurality of circuit groups 42, and each circuit group 42 includes m continuously distributed pixel driving circuits 300, m ⁇ 1, each adjacent The pixel driving circuit 300 is not provided in the consecutive n columns between the two circuit groups 42, and n ⁇ 1. That is, each row includes a plurality of circuit vacant regions 41, and each circuit vacant region 41 is a region where the pixel driving circuit 300 is not provided in n adjacent columns in a row, and includes n adjacent vacant positions. Meanwhile, each row includes a plurality of circuit groups 42, and each circuit group 42 includes m adjacent pixel driving circuits 300.
  • each circuit void region 41 is adjacent to at least one (at most two) circuit groups 42. Therefore, in each row of the first area A1, a plurality of circuit vacancies 41 and a plurality of circuit groups 42 are arranged at intervals, so that the transmittance of the display panel 10 in the first area A1 has a higher increase, and the first area A1 transmits the light more evenly, so that the light received by the optical sensor under the screen is more and more uniform to achieve better results.
  • a plurality of pixel driving circuits 300 located in the same column are all distributed in odd-numbered rows or even-numbered rows. That is, in every two adjacent rows, the circuit vacancy area 41 and the circuit group 42 are arranged alternately. Specifically, in every two adjacent rows, the pixel driving circuit is provided in the first column to the mth column of the first row in the two adjacent rows, and the first column to the mth column in the second row of the two adjacent rows are not A pixel drive circuit is provided; or, no pixel drive circuit is provided in the first column to the m-th column of every two adjacent rows, and the pixel drive circuit is provided in the first column to the m-th column of the second row in every two adjacent rows.
  • the display panel 10 further includes a plurality of driving signal input terminals 31 for driving a plurality of pixel driving circuits 300 in the display panel 10.
  • the driving signal input terminal may include a gate signal terminal GOA, a control signal terminal EOA, a first voltage terminal VDD, a data signal terminal Vdata, and an initialization voltage terminal Vinit, etc.
  • the type of the driving signal input terminal is related to the type of the pixel driving circuit.
  • the pixel driving circuit 300 may be a 2T1C pixel driving circuit including two switching tubes (ie, a switching tube T10 and a switching tube T20) and a storage capacitor C as shown in FIG. 6.
  • the driving signal of the 2T1C pixel driving circuit may include a signal at the first voltage terminal VDD, a signal at the scan signal terminal Vgate, and a signal at the data signal terminal Vdata.
  • the working process of the 2T1C pixel driving circuit shown in FIG. 6 is roughly as follows: when the scan signal terminal Vgate inputs the turn-on signal, the switch tube T1 is turned on, and the signal driving the data signal terminal Vdata is written into the storage capacitor C to drive the switch tube T20 is turned on to make the OLED device emit light, and the driving current corresponds to Vdata, thereby adjusting the light-emitting brightness of the OLED device, that is, adjusting the light-emitting brightness of the light-emitting sub-pixel corresponding to the pixel driving circuit.
  • the driving signal input terminal may include a first voltage terminal VDD, a plurality of gate signal terminals GOA, and a plurality of data signal terminals Vdata.
  • the first voltage terminal VDD is connected to each pixel driving circuit 300, and is used to provide a power supply voltage signal for each pixel driving circuit 300.
  • each gate signal terminal GOA is connected to a row of pixel driving circuit 300.
  • the multiple gate signal terminals GOA can be used to provide signals for the scan signal terminals Vgate in the multiple pixel driving circuits 300.
  • the multiple data signal terminals Vdata may be used to provide data signals for multiple pixel driving circuits 300.
  • the pixel driving circuit 300 of the same column may be connected to the same data signal terminal Vdata.
  • the signals of the multiple gate signal terminals GOA may be provided by a gate scan driver (not shown in FIG. 7) arranged in the peripheral area B.
  • the signals of the multiple data signal terminals Vdata may be provided by an integrated circuit (IC) bound on the substrate 110.
  • the signal of the first voltage terminal VDD may be provided by a flexible printed circuit (FPC) connected to the IC.
  • the signal sources of the first voltage terminal VDD, the multiple gate signal terminals GOA, and the multiple data signal terminals Vdata are given above by way of example only. It is understandable that these drive signal input terminals may also have other signal source methods. This embodiment of the application does not limit this.
  • connection structure of the pixel driving circuit 300 in order to illustrate the connection structure of the pixel driving circuit 300 and each driving signal input terminal, the relevant parts of the connection structure are highlighted, and not It must conform to the true ratio of the pixel driving circuit 300, which is described here in a unified manner.
  • the pixel driving circuit 300 may be more complicated.
  • the pixel driving circuit 300 may be a 7T1C pixel driving circuit including 7 switching tubes (ie, switching tubes T1-switching tubes T7) and a storage capacitor C as shown in FIG. 8, wherein the switching tube T3 is a driving switching tube.
  • the driving signal of the 7T1C pixel driving circuit may also include a reset signal terminal Reset signal, an initialization voltage The signal of the terminal Vinit and the signal of the enable signal terminal EM, and the timing of each signal terminal outputting the driving signal are shown in FIG. 16.
  • the switching tubes T1 to T7 may be triodes, thin film transistors or field effect transistors.
  • the working process of the 7T1C pixel driving circuit shown in FIG. 8 can be roughly divided into three stages:
  • the first stage the reset signal terminal Reset inputs the turn-on signal, so that the switch tube T1 is turned on, so that the signal of the initialization voltage terminal Vinit is written through the turned-on switch tube T1, and the gate of the driving transistor (ie, the switch tube T3) is performed initialization.
  • the signal transmitted by the scan signal terminal Vgate and the reset signal terminal Reset is the homologous signal output by the gate signal terminal GOA.
  • the reset signal terminal Reset of a row of pixel drive circuit and the scan signal terminal Vgate of the previous row of pixel drive circuit are connected
  • the gate signal terminal GOA is connected.
  • the reset signal terminal Reset of the pixel driving circuit 300 in the second row is provided by the gate signal terminal GOA1.
  • the second stage the scanning signal terminal Vgate inputs the turn-on signal, the switch tube T2, the switch tube T4, and the switch tube T7 are turned on.
  • the switch tube T2 and the switch tube T3 that are turned on form a diode structure, and the signal of the data signal terminal Vdata is written into the first pole s of the switch tube T3 through the switch tube T4 that is turned on.
  • the storage capacitor C charges the gate g of the switch tube T3.
  • the turn-on signal of the scan signal terminal Vgate is provided by the gate signal terminal GOA 2, and the potential of the anode of the OLED device is reset by the signal of the initialization voltage terminal Vinit through the switch tube T7 that is turned on.
  • the third stage the enable signal terminal EM inputs an open signal, and the switch tube T5 and the switch tube T6 are turned on. At this time, the potential of the first pole s of the switch tube T3 is the potential of the first voltage terminal VDD; the driving current flows to the OLED device through the turned-on switch tube T6 to drive the OLED device to emit light.
  • the enable signal of the enable signal terminal EM is provided by the control signal terminal EOA2.
  • the driving signal input terminal in addition to the first voltage terminal VDD, multiple gate signal terminals GOA, and multiple data signal terminals Vdata, the driving signal input terminal also includes multiple control signal terminals EOA and an initialization voltage terminal Vinit.
  • the first voltage terminal VDD is connected to each pixel driving circuit 300, and is used to provide a power supply voltage signal for each pixel driving circuit 300.
  • the display panel further includes at least one first signal line and/or at least one second signal line.
  • Multiple pixel drive circuits located in two adjacent rows are sequentially connected through a first signal line according to the arrangement order in the row direction; multiple pixel drive circuits located in two adjacent columns are sequentially connected through a second signal line.
  • a plurality of pixel driving circuits connected to the same second signal line are alternately distributed in odd-numbered rows and even-numbered rows. That is, the first signal line sequentially connects a plurality of pixel driving circuits distributed along the row direction, and the second signal line sequentially connects a plurality of pixel driving circuits distributed along the column direction.
  • the first signal line can be used to connect the multiple gate signal terminals GOA and the multiple control signal terminals EOA in the display panel to the scan signal terminal Vgate and the reset signal terminal Reset in the pixel driving circuit correspondingly.
  • the energy signal terminal EM is connected;
  • the second signal line can be used to connect the multiple first voltage terminals VDD and the data signal terminal Vdata in the display panel to the power voltage terminal and the data terminal in the pixel driving circuit accordingly.
  • the i+1-th strobe signal terminal and the scanning signal terminals of the plurality of pixel driving circuits in the i-th row And the reset signal terminals of the plurality of pixel driving circuits in the i+1th row are sequentially connected through a first signal line; i ⁇ 1.
  • the i+1th gate signal terminal GOA is connected to the scan signal terminal Vgate of the i-th row pixel driving circuit 300 through a first signal line, and the i-th gate signal terminal GOA is connected through a first signal line.
  • a signal line is connected to the reset signal terminal Reset of the pixel driving circuit 300 in the i-th row, i ⁇ 1.
  • the gate signal terminal GOA is used to provide the reset signal of the reset signal terminal Reset and the scan signal of the scan signal terminal Vgate for the pixel driving circuit 300. Specifically, as shown in FIG.
  • the scan signal terminal Vgate of the pixel driving circuit 300 in the first row is connected to the second gate signal terminal GOA 1 through a first signal line
  • the reset signal terminal of the pixel driving circuit 300 in the first row Reset is connected to the first gate signal terminal GOA 0 through a first signal line
  • the scanning signal terminal Vgate of the pixel driving circuit 300 in the second row is connected to the third gate signal terminal GOA 2 through a first signal line
  • the reset signal terminal Reset of the pixel driving circuit 300 in the second row is connected to the second gate signal terminal GOA 1 through a first signal line; and so on, the details will not be described later.
  • each gate signal terminal GOA is connected to two adjacent rows of pixel drive circuits 300, and each gate signal terminal GOA may be the first row of the two adjacent rows of pixel drive circuits.
  • the pixel drive circuit provides the scan signal gate at the scan signal terminal Vgate, and can provide the reset signal reset at the reset signal terminal Reset for the second row of pixel drive circuits in two adjacent rows of pixel drive circuits, which is beneficial to simplify the circuit wiring design.
  • each gate signal terminal GOA indicated here is connected to two adjacent rows of pixel drive circuits 300, and it should be excluded that only the first row of pixel drive circuits provide the reset signal of the reset signal terminal Reset.
  • the gate signal terminal GOA (that is, corresponding to GOA 0 shown in FIG. 9) and the gate signal terminal GOA (that is, corresponding to the scanning signal of the scanning signal terminal Vgate only for the last row of pixel drive circuits) The GOA of the scan signal 12).
  • the enable signal terminal of the pixel driving circuit in the i-th row is connected to the (i+1)/2th control signal terminal; when i is an even number, the enable signal terminal of the i-th row is The enable signal terminal of the pixel drive circuit is connected to the i/2th control signal terminal.
  • the (i+1)/2th control signal terminal EOA is connected to the enable signal terminal EM of the pixel driving circuit in the i-th row through a first signal line; where i is an even number
  • the i/2th control signal terminal EOA is connected to the enable signal terminal EM of the i-th row of pixel driving circuit through a first signal line.
  • the control signal terminal EOA is used to provide the enable signal of the enable signal terminal EM for the pixel driving circuit 300.
  • the first control signal terminal EOA 1 is connected to the enable signal terminal EM of the pixel driving circuit of the first row through a first signal line; the first control signal terminal EOA 1 passes through a first signal line.
  • the signal line is connected to the enable signal terminal EM of the pixel drive circuit in the second row.
  • the second control signal terminal EOA 2 is connected to the enable signal terminal EM of the third row of pixel drive circuit through a first signal line; the second control signal terminal EOA 2 is connected to the fourth row of pixel drive circuit through a first signal line
  • the enable signal terminal EM is connected.
  • multiple data signal terminals Vdata can be used to provide data signals for multiple pixel driving circuits 300.
  • the pixel driving circuit 300 of the same column may be connected to the same data signal terminal Vdata.
  • the signals of the multiple gate signal terminals GOA can be provided by the gate scan driver (not shown in FIG. 9) arranged in the peripheral area B.
  • the signals of the multiple data signal terminals Vdata may be provided by an IC (not shown in FIG. 9) bound on the substrate 110.
  • the signal of the first voltage terminal VDD may be provided by an FPC (not shown in FIG. 9) connected to the IC.
  • the signals of the multiple control signal terminals EOA may be provided by the emission driver (not shown in FIG. 9) arranged in the peripheral area B.
  • the signal of the initialization voltage terminal Vinit may also be provided by an IC (not shown in FIG. 9) bound on the substrate 110.
  • the signal sources of the first voltage terminal VDD, the multiple gate signal terminals GOA, the multiple data signal terminals Vdata, the multiple control signal terminals EOA, and the initialization voltage terminal Vinit are only given by way of example above. It is understandable Yes, these driving signal input terminals may also have other signal source modes, which are not limited in the embodiment of the present application.
  • all the sub-pixels in the display area A are light-emitting sub-pixels, that is, all the sub-pixels include a pixel driving circuit.
  • FIGS. 7 and 9 a 2T1C pixel driving circuit and a 7T1C pixel driving circuit are used as examples to illustrate the structure of the pixel driving circuit in the related art.
  • the application scope of the embodiments of the present application is not limited to the 2T1C pixel drive circuit and the 7T1C pixel drive circuit, and other types of pixel drive circuits that use the signal from the above-mentioned drive signal input terminal to drive should also be included in the scope of the present application.
  • the following takes the 7T1C pixel driving circuit as an example to specifically describe the connection structure of the pixel driving circuit in the display panel provided by the embodiment of the present application.
  • connection structure between the driving signal input terminal and these pixel driving circuits may be similar to the connection structure between this part of the driving signal input terminal and the 7T1C pixel driving circuit. Therefore, only the connection structure of the 7T1C pixel driving circuit provided by the embodiments of the present disclosure will be described in detail below, and the connection structure of other pixel driving circuits can be referred to the connection structure of the 7T1C pixel driving circuit, so it will not be repeated.
  • the density of pixel driving circuits in A1 is less than the density of pixel driving circuits in the second area A2, that is, at least one circuit vacancy area is generated, so that the display panel can exhibit the pixel driving circuit distribution shown in FIG. 10.
  • the structure of the pixel drive circuit may be as shown in FIG. 10. It can be seen from FIG. 10 that the first area A1 includes at least one circuit vacancy area 41 so that the transmittance of the first area A1 is significantly improved.
  • part of the pixel driving circuit 300 in each row of sub-pixels in the first area A1 may be removed by the circuit group 42 as a unit, so that each row of pixel driving circuits includes a plurality of circuit groups 42
  • Each circuit group includes m continuously distributed pixel driving circuits 300, while the circuit group 42 is arranged at intervals, and the continuous n columns between two adjacent circuit groups 42 are not provided with pixel driving circuits. That is, in each row of sub-pixels, the circuit vacancy area and the circuit group are arranged at intervals, so that the display panel can exhibit the sub-pixel distribution shown in FIG. 5, so that the transmittance of the display panel in the first area A1 is improved. And the first area A1 transmits light more evenly.
  • the plurality of pixel driving circuits located in the same column in the first region are all distributed in odd rows or even rows.
  • the circuit groups 42 are arranged in a staggered manner.
  • FIG. 11 and subsequent drawings only describe the connection structure of the pixel driving circuit in the first area A1 (that is, the structure of the pixel driving circuit in the second area A2 is omitted).
  • the staggered arrangement structure of the circuit vacancy area 41 and the circuit group 42 can not only increase the transmittance of the first area A1 of the display area to a greater extent, but also, due to the circuit vacancy area 41 and the circuit group 42
  • the distribution of A1 is very uniform and does not cause large local differences in pixels in the first area A1 during display, thereby taking into account the display of the first area A1.
  • the vacant area 41 that is, the duty ratio of the pixel driving circuit 300 in the first area A1 is 50%, so that the transmittance of the first area A1 of the display area is further improved.
  • connection structure between the pixel driving circuits may be improved.
  • connection structure between pixel driving circuits connected to the same gate signal terminal GOA can be improved.
  • the scanning signal terminals of the plurality of pixel driving circuits in the i-th row and the plurality of pixels in the i+1-th row are connected sequentially through a first signal line; i ⁇ 1.
  • the i+1-th gate signal terminal GOA connects the segments through a plurality of first gate signals.
  • G1 and the plurality of second gate signal connection segments G2 connect the scan signal terminals Vgate of the plurality of pixel driving circuits 300 in the i-th row and the reset signal terminals Reset of the plurality of pixel driving circuits 300 in the i+1th row in sequence ,
  • the plurality of first gate signal connection sections G1 and the plurality of second gate signal connection sections G2 of the plurality of pixel driving circuits 300 in two adjacent rows are sequentially connected to form a first signal line.
  • the second gate signal terminal GOA 1 passes through a plurality of pixels in one first signal line.
  • the first gate signal connection section G1 and the plurality of second gate signal connection sections G2 are connected to the scanning signal terminal Vgate of the plurality of pixel driving circuits 300 in the first row and the reset signal terminal of the plurality of pixel driving circuits 300 in the second row Reset is connected in sequence.
  • the third gate signal terminal GOA 2 connects the segments G1 and G1 through a plurality of first gate signals in a first signal line.
  • the plurality of second gate signal connection segments G2 are sequentially connected to the scan signal terminal Vgate of the plurality of pixel driving circuits 300 in the second row and the reset signal terminal Reset of the plurality of pixel driving circuits 300 in the third row.
  • the first gate signal connection segment G1 includes: each gate signal terminal GOA drives each pixel of each circuit group 42 in the light-emitting sub-pixels in the i-th row and the i+1-th row.
  • the second gate signal connection section G2 includes: each gate signal terminal GOA emits light from the scan signal terminal Vgate of the first pixel driving circuit 300 in each circuit group 42 in the i-th row of sub-pixels
  • the connection section connected to the reset signal terminal Reset of the pixel driving circuit 300 adjacent to the first pixel driving circuit 300 in the row direction in the light-emitting sub-pixels in the i+1th row; and, each gate signal terminal GOA starts from the first pixel driving circuit 300
  • the scan signal terminal Vgate of the m-th pixel driving circuit 300 in each circuit group 42 in the i-th row of light-emitting sub-pixels is connected to the m-th pixel driving circuit 300 in the i+1-th row of light-emitting sub-pixels in a row direction.
  • each gate signal terminal GOA can provide the scanning signal gate of the scanning signal terminal Vgate for the first row of pixel drive circuits in the two adjacent rows of pixel drive circuits connected to it, and can be the second row connected to it.
  • the pixel driving circuit provides a reset signal reset at the reset signal terminal Reset. It can be seen from FIG. 12 that when multiple gate signal terminals GOA are connected to the pixel driving circuit 300 in the above manner, each gate signal terminal GOA connects each circuit group connected to it through the first gate signal connection section G1.
  • Each pixel driving circuit 300 in 42 is connected, and the two adjacent rows of pixel driving circuits are connected through the second gate signal connection section G2.
  • the multiple gate signal terminals GOA and the pixel drive circuit are connected in the above manner, the wiring space when the multiple gate signal terminals GOA are connected to the pixel drive circuit can be saved, that is, the reset signal terminal Reset of the pixel drive circuit can be saved.
  • the wiring space of the reset signal and the scan signal of the scan signal terminal Vgate further improves the transmittance of the first area A1.
  • connection structure between pixel driving circuits connected to the same control signal terminal EOA can be improved.
  • the enable signal terminals of the plurality of pixel driving circuits in the i-th row and the i+1-th row are sequentially connected through a first signal line; i ⁇ 1.
  • the i-th control signal terminal EOA connects the segment E1 and the multi-pixel drive circuit through a plurality of first control signals.
  • a second control signal connection segment E2 connects the enable signal terminals EM of the plurality of pixel driving circuits 300 in the 2i-1th row and the enable signal terminals EM of the plurality of pixel driving circuits 300 in the 2ith row in sequence,
  • the multiple first control signal connection segments E1 and the multiple second control signal connection segments E2 that connect the multiple pixel driving circuits 300 in two adjacent rows at a time constitute a first signal line.
  • the first control signal terminal EOA 1 passes through a plurality of first signal lines in a first signal line.
  • the control signal connection section E1 and the plurality of second control signal connection sections E2 are connected to the enable signal terminal EM of the plurality of pixel drive circuits 300 in the first row and the enable signal terminal EM of the plurality of pixel drive circuits 300 in the second row. Times to connect.
  • the second control signal terminal EOA 2 connects the segments through a plurality of first control signals in a first signal line
  • the E1 and the plurality of second control signal connection segments E2 are sequentially connected to the enable signal terminals EM of the plurality of pixel driving circuits 300 in the third row and the enable signal terminals EM of the plurality of pixel driving circuits 300 in the fourth row.
  • the first control signal connection section E1 includes: each control signal terminal EOA is in each pixel driving circuit 300 of each circuit group 42 in the 2i-1th row and the 2ith row of the light-emitting sub-pixels.
  • the second control signal connection section E2 includes: each control signal terminal EOA starts from the enable signal terminal of the first pixel driving circuit 300 in each circuit group 42 in the 2i-1th row of light-emitting sub-pixels 300 EM is connected to the connection section of the enable signal terminal EM of the light-emitting sub-pixel adjacent to the first pixel driving circuit 300 in the row direction in the 2i-th row of light-emitting sub-pixels, and each control signal terminal EOA starts from the 2i-th row.
  • the enable signal terminal EM of the m-th pixel driving circuit 300 in each circuit group 42 in the 1 row of light-emitting sub-pixels is connected to the 2i-th row of light-emitting sub-pixels adjacent to the m-th pixel driving circuit 300 in the row direction.
  • the enable signal terminal EM of the pixel driving circuit 300 is connected to the segment.
  • each control signal terminal EOA can provide the enable signal of the enable signal terminal EM for the adjacent two rows of pixel drive circuits connected to it. It can be seen from FIG. 12 that when multiple control signal terminals EOA are connected to the pixel drive circuit 300 in the above manner, each control signal terminal EOA connects each pixel drive circuit group 42 connected to it through the first control signal connection section E1. Each of the pixel driving circuits 300 is connected to each other, and the two adjacent rows of pixel driving circuits 300 are connected through the second control signal connection section E2.
  • the multiple control signal terminals EOA and the pixel drive circuit are connected in the above manner, which can save the wiring space when the multiple control signal terminals EOA are connected to the pixel drive circuit, that is, save the enable signal terminal EM of the pixel drive circuit.
  • the wiring space of the enable signal further improves the transmittance of the first area A1.
  • connection structure between the pixel driving circuits connected to the first voltage terminal VDD can be improved.
  • the first voltage terminal and the power supply voltage terminals of the plurality of pixel driving circuits in the jth column and the j+th column are arranged in the column direction.
  • the power supply voltage terminals of the multiple pixel drive circuits in a column are sequentially connected by a second signal line; the power supply voltage terminals of the multiple pixel drive circuits in the jth column and the power supply voltages of the multiple pixel drive circuits in the j+1th column
  • the terminals are connected sequentially through a second signal line; j ⁇ 1.
  • the first voltage terminal VDD is connected to each pixel driving circuit 300.
  • the first voltage terminal VDD is sequentially connected to the power supply voltage terminals of the plurality of pixel driving circuits 300 in the second column and the power supply voltage terminals of the plurality of pixel driving circuits 300 in the third column through a second signal line.
  • the first voltage terminal VDD passes through a second signal line and the power supply voltage terminals of the plurality of pixel driving circuits 300 in the fourth column and The power supply voltage terminals of the plurality of pixel driving circuits 300 in the fifth column are sequentially connected.
  • the above-mentioned structure of the first voltage terminal VDD and the pixel drive circuit connection 300 illustrates the connection structure of the first voltage terminal VDD and most of the pixel drive circuit 300 in the pixel drive circuit structure.
  • the first voltage terminal VDD is directly connected to each pixel driving circuit 300 at these edge positions (see FIG. 13, for example, the first column, the last column, and the last row).
  • connection structure between the same data signal terminal Vdata and the pixel driving circuit can be improved.
  • the data signal terminal and the data terminal of the plurality of pixel driving circuits in the jth column and the j+1th column are connected in sequence through a second signal line; the data terminals of the plurality of pixel drive circuits in the jth column and the data terminals of the plurality of pixel drive circuits in the j+1th column are connected through a second signal line.
  • the signal lines are connected in sequence; j ⁇ 1.
  • the data terminal of the second pixel driving circuit 300 of each circuit group 42 in the j-th column circuit group 42 and the first one of each circuit group 42 in the j+1-th column circuit group 42 The data terminal of the pixel driving circuit 300 is connected to the j+1th data signal terminal Vdata.
  • the data terminal of the second pixel driving circuit 300 of each circuit group 42 in the first column circuit group 42 and the first column of each circuit group 42 in the second column circuit group 42 The data terminal of each pixel driving circuit 300 is connected to the second data signal terminal Vdata n+2 through a second signal line.
  • the data terminal of the second pixel driving circuit 300 of each circuit group 42 in the second column circuit group 42 and the data terminal of the first pixel driving circuit 300 of each circuit group 42 in the third column circuit group 42 pass through A second signal line is connected to the third data signal terminal Vdata n+3.
  • the data terminal of the second pixel driving circuit 300 of each circuit group 42 in the third column circuit group 42 and the data terminal of the first pixel driving circuit 300 of each circuit group 42 in the fourth column circuit group 42 pass through A second signal line is connected to the fourth data signal terminal Vdata n+6. That is, according to the arrangement order of the pixel driving circuits 300 in the column direction, the data terminal of each pixel driving circuit 300 in the second column and the data terminal of each pixel driving circuit 300 in the third column pass a second signal.
  • the lines are sequentially connected; the data terminal of each pixel driving circuit 300 in the fourth column and the data terminal of each pixel driving circuit 300 in the fifth column are sequentially connected through a second signal line.
  • one data signal terminal Vdata connection can be used to connect two columns from different circuit groups adjacent to each other.
  • the pixel driving circuit 300 transmits the data signal, which saves the wiring space of the data signal of the data signal terminal Vdata of the pixel driving circuit 300, thereby further improving the transmittance of the first area A1.
  • the above structure in which the data signal terminal Vdata is connected to the pixel drive circuit 300 illustrates the connection structure of the data signal terminal Vdata and most of the pixel drive circuit 300 in the pixel drive circuit structure.
  • a data signal terminal Vdata can be connected to a column of pixel driving circuits 300.
  • the first data signal terminal Vdata n is connected to the first pixel driving circuit 300 of each circuit group in the first column circuit group.
  • the display panel further includes an initialization voltage terminal Vinit, which is connected to each pixel driving circuit.
  • FIG. 14a shows the connection structure between the initialization voltage terminal Vinit and the pixel driving circuit 300 in the related art.
  • the connection structure between the initialization voltage terminal Vinit and the pixel driving circuit 300 can be improved.
  • an embodiment of the present disclosure provides a pixel driving circuit structure in which part of the pixel driving circuit 300 is removed (that is, a circuit vacancy area is provided). That is, the connection between the removed pixel driving circuit 300 and the initialization voltage terminal Vinit is deleted, thereby further improving the transmittance of the first area A1.
  • connection structure between the pixel driving circuits and the pixel driving circuit and each driving signal input terminal in the embodiments of the present application.
  • design of the connection structure of the new pixel driving circuit and the driving signal input terminal provided by the embodiments of the present disclosure may be as shown in FIG. 15.
  • connection structure between the new pixel drive circuits and the pixel drive circuit and the drive signal input terminal significantly reduces the position of the removed pixel drive circuit (ie, the vacant position). Metal wiring, so that the transmittance of the first area A1 is further improved.
  • the display panel provided by the embodiment of the present disclosure includes the first area A1, and the sub-pixels in the first area A1 include at least one circuit vacancy area formed by removing the position of the pixel driving circuit (ie, the vacancy position), so that the first area The transmittance of an area A1 is improved.
  • the embodiments of the present disclosure also improve the connection structure between the pixel driving circuits remaining after removing part of the pixel driving circuit and the connection structure between the pixel driving circuit and the driving signal input terminal, so that the transmittance of the first area A1 is significantly improved. .
  • the display panel further includes a plurality of light-emitting devices.
  • the light-emitting sub-pixel includes a light-emitting device, and no light-emitting device is provided in the circuit vacancy area.
  • the circuit vacancy area not only removes the pixel driving circuit, but also removes the light-emitting device, so that the transmittance of the circuit vacancy area is further improved, that is, the transmittance of the first area A1 of the display panel is further improved .
  • the light-emitting device may be an OLED device, or may be another type of light-emitting device that can be driven by a pixel driving circuit, which is not limited in the embodiment of the present disclosure.
  • the size of the pixel driving circuits of different types of light-emitting sub-pixels is basically the same, and these pixel driving circuits of the same size can form a regular multi-row and multi-column distribution structure.
  • FIG. 17 shows a structure of a display panel in the related art, in which the pixel driving circuit 300 (ie, each rectangular block in FIG. 17) forms a regular multi-row and multi-column distribution structure .
  • the light-emitting devices in different types of light-emitting sub-pixels need to emit different colors of light, the luminous efficiency and service life of different types of light-emitting devices are different. Therefore, in different types of light-emitting sub-pixels, usually the light-emitting devices There will also be differences in shape and size. For example, light-emitting devices with lower luminous efficiency can be made larger, and light-emitting devices with higher luminous efficiency can be made smaller to balance the light-emitting conditions of different types of light-emitting devices, thereby completing normal display. For example, referring to FIG. 17, the sizes of the green light-emitting sub-pixel 101-G, the blue light-emitting sub-pixel 101-B, and the red light-emitting sub-pixel 101-R are different.
  • the arrangement of the light-emitting devices may not be an array arrangement.
  • the light-emitting device of the blue light-emitting sub-pixel 101-B is set to be larger, and the light-emitting device of the green light-emitting sub-pixel 101-G is set to be smaller.
  • the light-emitting device and the pixel drive circuit are in position There is no one-to-one correspondence.
  • one green light-emitting sub-pixel 101-G, one blue light-emitting sub-pixel 101-B, and one red light-emitting sub-pixel 101-R constitute one light-emitting pixel 160.
  • two light-emitting pixels 160 share a red light-emitting sub-pixel 101-R.
  • the multiple light-emitting sub-pixels located in odd-numbered columns among the multiple light-emitting sub-pixels are the first-type light-emitting sub-pixels, and the multiple light-emitting sub-pixels
  • the plurality of light-emitting sub-pixels located in the even-numbered columns alternate in the second-type light-emitting sub-pixels and the third-type light-emitting sub-pixels in sequence according to the column direction;
  • the multiple light-emitting sub-pixels located in odd-numbered columns among the multiple light-emitting sub-pixels are the first-type light-emitting sub-pixels, and the multiple light-emitting sub-pixels located in even-numbered columns alternate in sequence according to the column direction. It is the second type of light-emitting sub-pixel and the third type of light-emitting sub-pixel.
  • the first type of light-emitting sub-pixel, the second type of light-emitting sub-pixel, and the third type of light-emitting sub-pixel are green light-emitting sub-pixel 101-G, red light-emitting sub-pixel 101-R, and blue light-emitting sub-pixel 101-B, respectively.
  • the arrangement of the light-emitting sub-pixels in a region A1 may be as shown in FIG. 18.
  • one red light-emitting sub-pixel 101-R, one green light-emitting sub-pixel 101-G, and one blue light-emitting sub-pixel 101-B constitute one pixel 160.
  • the arrangement of the light-emitting sub-pixels in the second area is not too limited, and may be the same as the first area or different from the first area.
  • the plurality of light-emitting sub-pixels located in even-numbered columns among the plurality of light-emitting sub-pixels are the first-type light-emitting sub-pixels, and the multiple light-emitting sub-pixels located in odd-numbered columns among the plurality of light-emitting sub-pixels are arranged according to the column The directions alternate in sequence of the second type of light-emitting sub-pixels and the third type of light-emitting sub-pixels.
  • the first type of light-emitting sub-pixel, the second type of light-emitting sub-pixel, and the third type of light-emitting sub-pixel are the green light-emitting sub-pixel 101-G, the blue light-emitting sub-pixel 101-B, and the red light-emitting sub-pixel 101-R, respectively.
  • the red light-emitting sub-pixel 101-R, one green light-emitting sub-pixel 101-G, and one blue light-emitting sub-pixel 101-B constitute a pixel 160.
  • three consecutive sub-pixels of different types constitute one pixel.
  • one green light-emitting sub-pixel 101-G in the fourth row of light-emitting sub-pixels, and a red light-emitting sub-pixel 101-G adjacent to the green light-emitting sub-pixel 101-G in the third row of light-emitting sub-pixels The light-emitting sub-pixel 101 -R and the blue light-emitting sub-pixel 101 -B adjacent to the green light-emitting sub-pixel 101 -G in the column direction in the third row of light-emitting sub-pixels constitute one light-emitting pixel 160.
  • one green light-emitting sub-pixel 101-G in the second row of light-emitting sub-pixels, and a blue light-emitting sub-pixel 101-G adjacent to the green light-emitting sub-pixel 101-G in the first row of light-emitting sub-pixels The light-emitting sub-pixel 101 -B and the red light-emitting sub-pixel 101 -R adjacent to the green light-emitting sub-pixel 101 -G in the column direction in the third row of light-emitting sub-pixels constitute one pixel 160.
  • FIG. 1 For another example, referring to FIG.
  • one green light-emitting sub-pixel 101-G in the fifth row of light-emitting sub-pixels, and a red light-emitting sub-pixel adjacent to the green light-emitting sub-pixel 101-G in the column direction in the fourth row of light-emitting sub-pixels constitute one pixel 160.
  • each green light-emitting sub-pixel 101-G and The blue light-emitting sub-pixel 101-B and the red light-emitting sub-pixel 101-R in adjacent columns and two adjacent rows form one light-emitting pixel 160, and the blue light-emitting sub-pixel 101-B and the red light-emitting sub-pixel 101-R are simultaneously
  • the light-emitting pixel 160 can also be formed with the green light-emitting sub-pixels 101-G in other rows, that is, the blue light-emitting sub-pixel 101-B and the red light-emitting sub-pixel 101-R are shared.
  • the design of the embodiment of the present application can significantly improve the transmittance of the first area A1 of the display panel.
  • the duty cycle of the pixel driving circuit 300 is about 50%, that is, compared to the normal display area without the circuit vacancy area 41, the number of pixels per inch (PPI) is reduced by about 50%, so that the first The area A1 becomes a low PPI area, and the PPI is smaller than the second area.
  • Some embodiments of the present disclosure provide a display device including the display panel in any of the above-mentioned embodiments.
  • the display device 100 further includes an optical sensor 190.
  • the optical sensor 190 is disposed on a side of the display panel 10 facing away from the light-emitting surface, and the optical sensor 190 is connected to the first area A1. Set it right.
  • the arrangement of the optical sensor 190 and the first area A1 directly opposite means that the projection of the optical sensor 190 on the display panel 10 in the vertical direction falls within the first area A1. That is, the projection of the optical sensor 190 on the display panel 10 in the vertical direction may be less than or equal to the first area A1.
  • the optical sensor 190 is arranged on the side of the display panel 10 facing away from the light-emitting surface, that is, the optical sensor 190 is an under-screen optical sensor, which can pass through the low-PPI first area of the display area directly facing the display area. A1, get enough light to ensure the function of the optical sensor under the screen.

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Abstract

一种显示面板（10）及显示装置，所述显示面板（10）具有显示区（A）和位于显示区（A）外围的周边区（B），所述显示区（A）包括第一区域（A1）和第二区域（A2）；所述显示面板（10）包括位于所述第一区域（A1）的多个像素驱动电路（300）和位于所述第二区域（A2）的多个像素驱动电路（300）；其中，所述第一区域（A1）中像素驱动电路（300）的密度小于所述第二区域（A2）中像素驱动电路（300）的密度。

Description

显示面板及显示装置
本申请要求于2020年4月14日提交的、申请号为202010292453.1的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及显示技术领域，尤其涉及一种显示面板及显示装置。
背景技术
随着光学技术和半导体技术的发展，显示装置具有尺寸更加轻薄，功耗越来越低以及视角越来越大等优点，应用范围日益广泛。此外，显示装置内还可设置诸如光学传感器等具有特定功能的部件，从而实现更多功能，实用性进一步增强。
发明内容
一方面，提供了一种显示面板，显示面板具有显示区和位于显示区外围的周边区，所述显示区包括第一区域和第二区域；所述显示面板包括位于所述第一区域的多个像素驱动电路和位于所述第二区域的多个像素驱动电路；其中，所述第一区域中像素驱动电路的密度小于所述第二区域中像素驱动电路的密度。
在一些实施例中，其中，位于所述第一区域的多个像素驱动电路呈多行和多列分布；每行中像素驱动电路的数量小于所述第一区域中多个像素驱动电路的列数。
在一些实施例中，其中，所述第一区域中，每行像素驱动电路包括：多个电路组，每个电路组包括m个连续分布的像素驱动电路，m≥1，每相邻两个电路组之间的连续n列未设置像素驱动电路，n≥1。
在一些实施例中，其中，m＝n＝2。
在一些实施例中，其中，所述第一区域中，位于同一列的多个像素驱动电路均分布在奇数行或偶数行。
在一些实施例中，显示面板还包括：至少一条第一信号线和/或至少一条第二信号线；位于相邻两行的多个像素驱动电路，按照在行方向上的排列顺序通过一条第一信号线顺次连接；位于相邻两列的多个像素驱动电路通过一条第二信号线顺次连接；其中，与同一条所述第二信号线连接的多个像素驱动电路交替分布于奇数行和偶数行中。
在一些实施例中，其中，按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i行的多个所述像素驱动电路的扫描 信号端和第i+1行的多个所述像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。
在一些实施例中，其中，按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i+1个所述选通信号端与第i行的多个所述像素驱动电路的扫描信号端和第i+1行的多个所述像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。
在一些实施例中，其中，按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i行的多个所述像素驱动电路的使能信号端和第i+1行的多个所述像素驱动电路的使能信号端通过一条第一信号线顺次连接；i≥1。
在一些实施例中，所述的显示面板还包括多个控制信号端；在i为奇数时，第i行所述像素驱动电路的使能信号端与第(i+1)/2个所述控制信号端连接；在i为偶数时，第i行所述像素驱动电路的使能信号端与第i/2个所述控制信号端连接；和/或，所述显示面板还包括初始化电压端(Vinit)，所述初始化电压端与每个所述像素驱动电路连接。
在一些实施例中，其中，按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第j列的多个所述像素驱动电路的电源电压端和第j+1列的多个所述像素驱动电路的电源电压端通过一条第二信号线顺次连接；j≥1。
在一些实施例中，所述的显示面板还包括多个第一电压端；按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第一电压端与第j列的多个所述像素驱动电路的电源电压端和第j+1列的多个所述像素驱动电路的电源电压端通过一条第二信号线顺次连接；j≥1。13、根据权利要求6～12中任一项所述的显示面板，其中，按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第j列的多个所述像素驱动电路的数据端和第j+1列的多个所述像素驱动电路的数据端通过一条第二信号线顺次连接；j≥1。
在一些实施例中，所述的显示面板还包括多个数据信号端；按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，数据信号端与第j列的多个所述像素驱动电路的数据端和第j+1列的多个所述像素驱动电路的数据端通过一条第二信号线顺次连接；j≥1。
在一些实施例中，所述的显示面板还包括多个发光器件；每个发光器件与一个像素驱动电路耦接，构成一个发光亚像素。多个发光亚像素包括 第一类发光亚像素、第二类发光亚像素和第三类发光亚像素；同一类发光亚像素的发光颜色相同，不同类发光亚像素的发光颜色不同。所述多个发光亚像素中位于奇数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于偶数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素；或者，所述多个发光亚像素中位于偶数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于奇数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素。
在一些实施例中，其中，相邻两列发光亚像素中，按照列的方向，每连续三个不同类的亚像素构成一个像素。
另一方面，提供一种显示装置，所述显示装置包括如上述任一实施例的显示面板。
在一些实施例中，所述的显示装置还包括光学传感器，所述光学传感器设置在所述显示面板的背离出光面的一侧，并且所述光学传感器与第一区域正对设置。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施例提供的一种显示装置的结构图；
图2为本公开实施例提供的一种显示面板的结构图；
图3为本公开实施例提供的一种显示面板的发光亚像素的结构图；
图4为相关技术中提供的一种显示面板的结构图；
图5为本公开实施例提供的另一种显示面板的结构图；
图6为本公开实施例提供的一种像素驱动电路的结构图；
图7为图6所示的像素驱动电路的连接结构图；
图8为本公开实施例提供的另一种像素驱动电路的结构图；
图9为图8所示的像素驱动电路的连接结构图；
图10为本公开实施例提供的一种像素驱动电路的连接结构图；
图11为本公开实施例提供的另一种像素驱动电路的连接结构图；
图12为本公开实施例提供的又一种像素驱动电路的连接结构图；
图13为本公开实施例提供的再一种像素驱动电路的连接结构图；
图14a为相关技术中提供的一种像素驱动电路的连接结构图；
图14b为本公开实施例提供的另一种像素驱动电路的连接结构图；
图15为本公开实施例提供的又一种像素驱动电路的连接结构图；
图16为本公开实施例提供的一种驱动信号时序图；
图17为相关技术中提供的一种显示面板的发光亚像素分布图；
图18为本公开实施例提供的一种显示面板的发光亚像素分布图；
图19为本公开实施例提供的另一种显示面板的发光亚像素分布图；
图20为本公开实施例提供的一种显示装置的结构图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。又如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件有直接物理接触或电接触。然而，术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以 上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的如“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
目前，具有高屏占比的显示装置逐渐成为备受消费者青睐的产品。为了提高屏占比，相关技术中提出了一种将光学传感器(例如，摄像头)放置在显示装置的屏幕(即显示面板)背离出光面一侧的技术方案，即，将光学传感器设置在显示面板下方，形成屏下光学传感器，以去除光学传感器在显示面板上占用的空间。在这种设计中，外界的光线需要通过显示面板才能传递到该屏下光学传感器。
然而，显示面板对于光线的透过率较低，使得屏下光学传感器接收的光线不足，影响该屏下光学传感器的功能。
为了解决这一问题，如图1所示，本公开的一些实施例提供了一种显示装置，包括：显示面板10；还可以包括：用于承载显示面板10的中框20，以及用于固定和保护显示面板10和中框20的壳体30。
上述的显示装置可以应用于多种场景，例如该显示装置可以是显示器，电视，广告牌，数码相框，具有显示功能的激光打印机，电话，手机，个人数字助理(Personal Digital Assistant，PDA)，数码相机，便携式摄录机，取景器，导航仪，车用显示装置，大面积墙壁显示装置、家电、信息查询设备(如电子政务、银行、医院、电力等部门的业务查询设备)、监视器等。
示例性地，显示面板可以是OLED(Organic Light Emitting Diode，有机发光二极管)面板、QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)面板、微LED(包括：miniLED或microLED)面板等。为了表述清楚，本公开中以显示面板为OLED显示面板为例，进行相关说明。
在本公开的一些实施例中，参见图2，该显示面板10具有显示区A和位于显示区外围的周边区B，其中，周边区B位于显示区A的至少一侧。示例性地，周边区B可以围绕显示区A一圈设置。
示例性地，显示面板包括多个像素驱动电路和多个发光器件L每个发光器件L与一个像素驱动电路耦接，构成一个发光亚像素，像素驱动电路被配置为驱动发光器件L发光。
示例性地，多个发光亚像素包括第一类发光亚像素、第二类发光亚像素和第三类发光亚像素。同一类发光亚像素的发光颜色相同，不同类发光亚像素的发光颜色不同。例如，参见图3，每一个发光亚像素101可以发出三原色中的一种光线，那么第一类发光亚像素可以为红色发光亚像素101-R，第二类发光亚像素可以为绿色发光亚像素101-G，第三类发光亚像素可以为蓝色发光亚像素101-B。
示例性地，发光器件L可以采用包括LED(发光二极管，Light Emitting Diode)、OLED(有机电致发光二极管，Organic Light Emitting Diode)或QLED等发光器件。基于前述实施例，显示面板为OLED显示面板，因而采用的发光器件L为OLED器件。在显示面板10中可以设置多个OLED器件，由于OLED器件可以实现自发光，因此具有多个OLED器件的显示装置中无需设 置背光源。
示例性地，如图4所示，显示面板10可以包括依次设置的基板110、阳极111、空穴传输层(Hole Transporting Layer，HTL)112、发光层(例如可以是有机发光层)113、电子传输层(Election Transporting Layer，ETL)114、阴极115和封装层116。其中，阳极111、空穴传输层112、发光层113、电子传输层114、阴极115依次层叠设置在基板110上，构成一发光器件。
基板被配置为承载多个膜层。具体的，基板可以是刚性基板；该刚性基板例如可以为玻璃基板或PMMA(Polymethyl methacrylate，聚甲基丙烯酸甲酯)基板等。又如，基板可以为柔性基板；该柔性基板例如可以为PET(Polyethylene terephthalate，聚对苯二甲酸乙二醇酯)基板、PEN(Polyethylene naphthalate two formic acid glycol ester，聚萘二甲酸乙二醇酯)基板或PI(Polyimide，聚酰亚胺)基板等。
在基板上可以形成电路层，电路层可以包括多个像素驱动电路，形成有电路层的基板可以称为驱动背板。多个发光器件，可以设置于电路层远离基板的一侧。
示例性地，阳极例如可由具有高功函数的透明导电材料形成，其电极材料可以包括氧化铟锡(ITO)、氧化铟锌(IZO)、氧化铟镓(IGO)、氧化镓锌(GZO)氧化锌(ZnO)、氧化铟(In2O3)、氧化铝锌(AZO)和碳纳米管等；阴极例如可由高导电性和低功函数的材料形成，其电极材料可以包括镁铝合金(MgAl)和锂铝合金(LiAl)等合金或者镁(Mg)、铝(Al)、锂(Li)和银(Ag)等金属单质。
示例性地，有机发光层的材料可以根据其发射光颜色的不同进行选择。例如，有机发光层的材料包括荧光发光材料或磷光发光材料。又例如，在本公开的至少一个实施例中，有机发光层可以采用掺杂体系，即在主体发光材料中混入掺杂材料来得到可用的发光材料。例如，主体发光材料可以采用金属化合物材料、蒽的衍生物、芳香族二胺类化合物、三苯胺化合物、芳香族三胺类化合物、联苯二胺衍生物和三芳胺聚合物等。有机发光层的材料类型不同时，发出光线的颜色不同，从而相应的亚像素发光颜色不同。
示例性地，多个(例如，可以是三个)发光颜色不同的发光亚像素可以构成一个像素。显示面板可以包括在显示区的多个像素，例如多个像素可以呈多行和多列分布。示例性地，参见图3，显示面板中，三个相邻且发光颜色不同的发光亚像素101构成一个像素160。例如，可以为图3所示相邻的红色发光亚像素101-R、绿色发光亚像素101-G和蓝色发光亚像素101-B 构成一个像素160。
示例性地，继续参见图4，在阳极111和阴极115施加电压，处于阴极115中的电子在电压的作用下通过电子传输层114向有机发光层113移动，处于阳极111中的空穴在电压的作用下通过空穴传输层112向有机发光层113移动，电子和空穴在有机发光层113结合发出光线，从而实现自发光。此外，通过调整显示面板中不同位置的OLED器件的阳极111和阴极115所施加的电压，就可以改变OLED器件的发光强度，从而实现彩色画面的显示。
封装层可以用于保证OLED器件内部良好的密封性，减少OLED器件与外部环境中氧气、水汽等的接触，可以保持OLED器件的性能稳定，延长OLED器件的使用寿命。
示例性地，基板与封装层之间可以通过封装胶进行密封。又示例性地，封装层可以包括依次层叠设置的无机封装层、有机封装层和无机封装层，通过膜层制备工艺制作在形成有像素驱动电路和发光器件的基板上，以将发光器件封装。膜层制备工艺例如可以包括：气相沉积工艺、旋涂工艺等至少一种。
在本公开的一些实施例中，参见图2，显示区A具有第一区域A1和第二区域A2。其中，显示区A中的第一区域A1可以有一个或多个。为了便于说明，本公开实施例中均以显示区A包括一个第一区域A1为例来进行示例性描述，在此统一说明，以下不再赘述。
另外，显示区A中除了第一区域A1以外的区域均为第二区域A2。也就是说，第二区域A2仅用于与第一区域A1区分，并非意指显示区A中的某个特殊区域。并且，图2中的第一区域A1和第二区域A2仅用于示意，并不限定第一区域A1和第二区域A2的实际大小。
示例性地，显示面板包括位于第一区域A1的多个发光亚像素101A和位于第二区域A2的多个发光亚像素101A，也即显示面板10包括位于所述第一区域A1的多个像素驱动电路300和位于第二区域的多个像素驱动电路，其中，第一区域中像素驱动电路的密度小于第二区域A2中像素驱动电路300的密度。
作为一种具体实现，继续参见图2，显示面板10的显示区A包括第一区域A1和第二区域A2。在第二区域A2中，像素驱动电路300在行方向和列方向上都大致均匀分布，即各行中每相邻两个像素驱动电路300之间的距离d1(即一个像素驱动电路上的某一点到相邻像素驱动电路上的相应一点之间的距离，例如，可以是相邻两个像素驱动电路中用于耦接 发光器件的连接点之间的距离)大致相等，各列中每相邻两个像素驱动电路300之间的距离d2大致相等。若是按照第二区域A2中像素驱动电路300的密度，那么在第一区域A1中具有例如图2中7*7个能够放置像素驱动电路300的位置。这7*7个位置中，只有部分位置设置了像素驱动电路300，其他位置未设置像素驱动电路300，从而使得第一区域A1中像素驱动电路300的密度小于第二区域A2中像素驱动电路的密度。例如图2中，有9个位置(用斜线填充的方块表示)未设置像素驱动电路300。在本实施例中，这种一个未设置像素驱动电路的位置可以称为一个空缺位置。
由于像素驱动电路中存在很多金属线，这些金属线对于光线的透过率较差，使得外界光线经过显示面板传递至屏下光学传感器的光量较小，屏下光学传感器接收的光线不足，最终影响该屏下光学传感器的功能。示例性地，第一区域的部分位置不设置像素驱动电路，未设置像素驱动电路的位置相比于设置有像素驱动电路的位置具有更高的光线透过率，第一区域的光线透过率得到提升，显示面板对光线的透过率提升，故而，第一区域A1也可以称为透过率提升区。通过显示面板10的透过率提升区，屏下光学传感器能够接收到的光量增大，从而能够保证屏下光学传感器功能的实现。
在一些实施例中，参见图2，显示面板10中位于第一区域A1的多个像素驱动电路300呈多行和多列分布，每行中像素驱动电路300的数量小于第一区域A1中多个像素驱动电路300的列数。即在第一区域A1中，每行中均有至少一列未设置像素驱动电路300。
可以理解的是，像素驱动电路的多行和多列分布可以是阵列分布，也可以为其他分布结构，对此不作限定。
示例性地，参见图2，第一区域A1中的多个像素驱动电路300不进行阵列分布，仅沿行方向、列方向排布，在至少一行中，存在至少一列未设置像素驱动电路300；在至少一列中，存在至少一行未设置像素驱动电路300。
未设置像素驱动电路的区域比设置有像素驱动电路的区域具有更高的光线透过率，因而将每行中相邻的至少一列未设置像素驱动电路的区域称为一个电路空缺区，即包括一个空缺位置，或者，至少两个连续的空缺位置。由于每行中均存在至少一个(例如，可以是多个)电路空缺区，使得第一区域中电路空缺区沿列的方向分布更均匀，从而使得第一区域沿列的方向对光线透过得更均匀。
示例性地，参见图5，第一区域A1中，每行像素驱动电路300包括多个电路组42，每个电路组42包括m个连续分布的像素驱动电路300，m≥1，每相邻两个电路组42之间的连续n列未设置像素驱动电路300，n≥1。即每行包括多个电路空缺区41，每个电路空缺区41为一行中相邻n列未设置像素驱动电路300的区域，包括n个相邻的空缺位置。同时，每行包括多个电路组42，每个电路组42包括m个相邻的像素驱动电路300。例如，m可以为3，n可以为2；又例如，m可以为4，n可以为1；再例如，m和n可以均为2，对此不做过多限制。可以理解的是，对于不同电路组而言，其包括的像素驱动电路的个数可以相同，也可以不同；对于不同电路空缺区而言，其包括的空缺位置的个数可以相同，也可以不同。为了便于说明，以下均以m＝n＝2为例对上述像素驱动电路300进行详细描述。
通过上述设置，在同一行中，多个电路空缺区41和多个电路组42交替排布，即每个电路空缺区41均与至少一个(最多两个)电路组42相邻。从而，在第一区域A1的每一行中，多个电路空缺区41和多个电路组42间隔设置，使得显示面板10在第一区域A1的透过率有较高的提升，并且第一区域A1对光线透过得更均匀，从而使得屏下光学传感器接收到的光线较多且较为均匀，以达到更好的效果。
示例性地，参见图12，第一区域A1中，位于同一列的多个像素驱动电路300均分布在奇数行或偶数行。即每相邻两行中，电路空缺区41和电路组42交错排布。具体是指：每相邻两行中，相邻两行中第一行的第1列到第m列设置有像素驱动电路，相邻两行中第二行的第1列到第m列未设置像素驱动电路；或者，每相邻两行中的的第1列到第m列未设置像素驱动电路，相邻两行中第二行的第1列到第m列设置有像素驱动电路。从而，不仅在每行中，多个电路空缺区和多个电路组交替排布，在每列中多个电路空缺区和多个电路组也交替排布。从而进一步提升第一区域的透过率，同时使第一区域光线透过得更均匀，不会使第一区域在显示时像素出现大的局部差异，兼顾了第一区域的显示。
在本公开的一些实施例中，参见图2，显示面板10还包括多个驱动信号输入端31，用于驱动显示面板10中的多个像素驱动电路300。具体的，驱动信号输入端可以包括选通信号端GOA、控制信号端EOA、第一电压端VDD、数据信号端Vdata和初始化电压端Vinit等，驱动信号输入端的类型与像素驱动电路的类型有关。
示例性地，像素驱动电路300可以为图6所示的包括两个开关管(即， 开关管T10和开关管T20)和一个存储电容C的2T1C像素驱动电路。参见图6，该2T1C像素驱动电路的驱动信号可以包括第一电压端VDD的信号、扫描信号端Vgate的信号和数据信号端Vdata的信号。
其中，图6所示的2T1C像素驱动电路的工作过程大致为：在扫描信号端Vgate输入开启信号时，开关管T1导通，驱动数据信号端Vdata的信号写入存储电容C中，驱动开关管T20导通，使OLED器件发光，驱动电流与Vdata对应，从而对OLED器件的发光亮度进行调节，也就是，对该像素驱动电路所对应的发光亚像素的发光亮度进行调节。
在像素驱动电路300为图6所示的2T1C像素驱动电路时，相关技术中显示面板中的像素驱动电路的连接结构可以如图7所示。参见图7，驱动信号输入端可以包括第一电压端VDD、多个选通信号端GOA和多个数据信号端Vdata。
其中，第一电压端VDD与每个像素驱动电路300连接，用于为每个像素驱动电路300提供电源电压信号。参见图7，每个选通信号端GOA与一行像素驱动电路300连接。
多个选通信号端GOA可以用于为多个像素驱动电路300中的扫描信号端Vgate提供信号。多个数据信号端Vdata可以用于为多个像素驱动电路300提供数据信号。其中，参见图7，同一列像素驱动电路300可以连接同一条数据信号端Vdata。
其中，多个选通信号端GOA的信号可以由设置在周边区B中的栅极扫描驱动器(图7中未示出)提供。另外，多个数据信号端Vdata的信号可以由绑定在基板110上的集成电路(integrated circuit，IC)提供。第一电压端VDD的信号可以由与IC连接的柔性电路板(flexible printed circuit，FPC)提供。
以上仅以示例方式给出了第一电压端VDD、多个选通信号端GOA和多个数据信号端Vdata的信号来源，可以理解的是，这些驱动信号输入端还可以具有其他的信号来源方式，本申请实施例对此不作限定。
另外，需要说明的是，在图7及后续有关像素驱动电路300的连接结构的附图中，为了说明像素驱动电路300与各个驱动信号输入端的连接结构，着重示出了连接结构相关部分，不一定符合像素驱动电路300的真实比例，在此统一说明。
在另一些实现方式中，像素驱动电路300可以更为复杂。例如，像素驱动电路300可以为图8所示的包括7个开关管(即，开关管T1-开关管T7)和一个存储电容C的7T1C像素驱动电路，其中，开关管T3为驱动开关管。 参见图8，除了前述的第一电压端VDD的信号、扫描信号端Vgate的信号和数据信号端Vdata的信号以外，该7T1C像素驱动电路的驱动信号还可以包括复位信号端Reset的信号、初始化电压端Vinit的信号和使能信号端EM的信号，各信号端输出驱动信号的时序如图16所示。
其中，开关管T1～开关管T7可以是三极管、也可以是薄膜晶体管或场效应管。
参见图9，以第二行像素驱动电路300为例，图8所示的7T1C像素驱动电路的工作过程大致可以分为三个阶段：
第一阶段：复位信号端Reset输入开启信号，使得开关管T1导通，从而，初始化电压端Vinit的信号通过导通的开关管T1写入，对驱动晶体管(即开关管T3)的栅极进行初始化。其中，扫描信号端Vgate和复位信号端Reset传输的信号为由选通信号端GOA输出的同源信号，一行像素驱动电路的复位信号端Reset和与前一行像素驱动电路的扫描信号端Vgate连接的选通信号端GOA连接。例如，第二行像素驱动电路300的复位信号端Reset由选通信号端GOA 1提供。
第二阶段：扫描信号端Vgate输入开启信号，开关管T2、开关管T4、开关管T7导通。其中，导通的开关管T2与开关管T3形成二极管结构，数据信号端Vdata的信号经由导通的开关管T4写入开关管T3的第一极s。通过所述二极管结构，存储电容C对开关管T3的栅极g充电。另外，扫描信号端Vgate的开启信号由选通信号端GOA 2提供，OLED器件的阳极的电位通过导通的开关管T7被初始化电压端Vinit的信号复位。
第三阶段：使能信号端EM输入开启信号，开关管T5、开关管T6导通。此时，开关管T3的第一极s的电位为第一电压端VDD的电位；驱动电流经由导通的开关管T6流向OLED器件，驱动OLED器件发光。具体的，使能信号端EM的开启信号由控制信号端EOA 2提供。
示例性地，在像素驱动电路300为图8所示的7T1C像素驱动电路时，相关技术中显示面板中的像素驱动电路的连接结构可以如图9所示，显示面板的驱动信号时序如图16所示。参见图9，除了第一电压端VDD、多个选通信号端GOA和多个数据信号端Vdata以外，驱动信号输入端还包括多个控制信号端EOA和初始化电压端Vinit。
其中，第一电压端VDD与每个像素驱动电路300连接，用于为每个像素驱动电路300提供电源电压信号。
在一些实施例中，显示面板还包括至少一条第一信号线和/或至少一 条第二信号线。位于相邻两行的多个像素驱动电路，按照在行方向上的排列顺序通过一条第一信号线顺次连接；位于相邻两列的多个像素驱动电路通过一条第二信号线顺次连接。其中，与同一条所述第二信号线连接的多个像素驱动电路交替分布于奇数行和偶数行中。即第一信号线顺次连接沿行方向分布的多个像素驱动电路，第二信号线顺次连接沿列方向分布的多个像素驱动电路。结合前述实施例，第一信号线可以用于将显示面板中的多个选通信号端GOA和多个控制信号端EOA相应地与像素驱动电路中的扫描信号端Vgate和复位信号端Reset、使能信号端EM连接起来；第二信号线可以用于将显示面板中的多个第一电压端VDD、数据信号端Vdata相应地与像素驱动电路中的电源电压端、数据端连接起来。
示例性地，按照第i行和第i+1行的多个像素驱动电路在行方向上的排列顺序，第i+1个选通信号端与第i行的多个像素驱动电路的扫描信号端和第i+1行的多个像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。例如，参见图9，第i+1个选通信号端GOA通过一条第一信号线与第i行像素驱动电路300的扫描信号端Vgate连接，第i个所述选通信号端GOA通过一条第一信号线与第i行像素驱动电路300的复位信号端Reset连接，i≥1。其中，选通信号端GOA用于为像素驱动电路300提供复位信号端Reset的复位信号和扫描信号端Vgate的扫描信号。具体的，如图9所示，第1行像素驱动电路300的扫描信号端Vgate通过一条第一信号线与第2个选通信号端GOA 1连接，第1行像素驱动电路300的复位信号端Reset过一条第一信号线与第1个所述选通信号端GOA 0连接；第2行像素驱动电路300的扫描信号端Vgate通过一条第一信号线与第3个选通信号端GOA 2连接，第2行像素驱动电路300的复位信号端Reset通过一条第一信号线与第2个所述选通信号端GOA 1连接；以此类推，后面不再赘述。
也就是说，如图9所示，每个选通信号端GOA与相邻的两行像素驱动电路300连接，每个选通信号端GOA可以为相邻两行像素驱动电路中的第一行像素驱动电路提供扫描信号端Vgate的扫描信号gate，并且可以为相邻两行像素驱动电路中的第二行像素驱动电路提供复位信号端Reset的复位信号reset，有利于简化电路走线设计。
另外，需要说明的是，参见图9，此处指出的每个选通信号端GOA与相邻的两行像素驱动电路300连接，应当排除仅为首行像素驱动电路提供复位信号端Reset的复位信号的选通信号端GOA(即，对应于图9所示的GOA 0)以及仅为末行像素驱动电路提供扫描信号端Vgate的扫描信号的选通信号端 GOA(即，对应于图9所示的扫描信号的GOA 12)。
示例性地，在i为奇数时，第i行所述像素驱动电路的使能信号端与第(i+1)/2个所述控制信号端连接；在i为偶数时，第i行所述像素驱动电路的使能信号端与第i/2个所述控制信号端连接。例如，参见图9，在i为奇数时，第(i+1)/2个控制信号端EOA通过一条第一信号线与第i行像素驱动电路的使能信号端EM连接；在i为偶数时，第i/2个控制信号端EOA通过一条第一信号线与第i行像素驱动电路的使能信号端EM连接。其中，控制信号端EOA用于为像素驱动电路300提供使能信号端EM的使能信号。具体的，如图9所示，第1个控制信号端EOA 1通过一条第一信号线与第1行像素驱动电路的使能信号端EM连接；第1个控制信号端EOA 1通过一条第一信号线与第2行像素驱动电路的使能信号端EM连接。第2个控制信号端EOA 2通过一条第一信号线与第3行像素驱动电路的使能信号端EM连接；第2个控制信号端EOA 2通过一条第一信号线与第4行像素驱动电路的使能信号端EM连接。以此类推，后面不再赘述。
另外，多个数据信号端Vdata可以用于为多个像素驱动电路300提供数据信号。其中，参见图9，同一列像素驱动电路300可以连接同一条数据信号端Vdata。
其中，如前所述，多个选通信号端GOA的信号可以由设置在周边区B中的栅极扫描驱动器(图9中未示出)提供。多个数据信号端Vdata的信号可以由绑定在基板110上的IC(图9中未示出)提供。第一电压端VDD的信号可以由与IC连接的FPC(图9中未示出)提供。
另外，多个控制信号端EOA的信号可以由设置在周边区B中的发射驱动器(图9中未示出)提供。初始化电压端Vinit的信号也可以由绑定在基板110上的IC(图9中未示出)提供。
类似地，以上仅以示例方式给出了第一电压端VDD、多个选通信号端GOA、多个数据信号端Vdata、多个控制信号端EOA和初始化电压端Vinit的信号来源，可以理解的是，这些驱动信号输入端还可以具有其他的信号来源方式，本申请实施例对此不作限定。
在图7和图9所示的相关技术中，显示区A中的所有亚像素均为发光亚像素，即，所有亚像素均包括像素驱动电路。
另外，需要说明的是，本申请出于示例性目的，在图7和图9中，分别以2T1C像素驱动电路和7T1C像素驱动电路为例对相关技术中的像素驱动电路的结构进行了说明。但是，本申请实施例的应用范围并不限于2T1C像素驱 动电路和7T1C像素驱动电路，利用上述驱动信号输入端的信号来进行驱动的其他类型的像素驱动电路也应当涵盖在本申请的范围内。
由于用于7T1C像素驱动电路的驱动所涉及的驱动信号输入端较多，因此，下面以7T1C像素驱动电路为例，对本申请实施例提供的显示面板中的像素驱动电路的连接结构进行具体说明。
可以理解的是，在驱动涉及的驱动信号输入端较少的2T1C像素驱动电路或其他类型的像素驱动电路中，可能包含7T1C像素驱动电路的驱动所涉及的驱动信号输入端中的一部分，这部分驱动信号输入端与这些像素驱动电路的之间的连接结构可以和这部分驱动信号输入端与7T1C像素驱动电路之间的连接结构类似。因此，下面只对本公开实施例提供的7T1C像素驱动电路的连接结构进行具体说明，其他像素驱动电路的连接结构可以参考该7T1C像素驱动电路的连接结构，故而不再赘述。
为了提高显示面板对光的透过率，在图9所示的像素驱动电路的结构的基础上，可以去除显示区A的第一区域A1中的部分亚像素的像素驱动电路，使得第一区域A1中像素驱动电路的密度小于第二区域A2中像素驱动电路的密度，即产生至少一个电路空缺区，从而使得显示面板可以呈现图10所示的像素驱动电路分布。
去除显示区A的第一区域A1中的部分亚像素的像素驱动电路(即，第一区域A1包括至少一个电路空缺区)后，像素驱动电路的结构可以如图10所示。根据图10可知，第一区域A1包括至少一个电路空缺区41使得第一区域A1的透过率有了明显提升。
为了进一步提升第一区域A1的透过率，可以以电路组42为单位去除第一区域A1中的每行亚像素中的部分像素驱动电路300，使得每行像素驱动电路包括多个电路组42，每个电路组包括m个连续分布的像素驱动电路300，同时电路组42间隔设置，相邻两个电路组42之间的连续n列不设置像素驱动电路。即，每行亚像素中，电路空缺区和电路组间隔设置，从而，显示面板可以呈现图5所示的亚像素分布，使得显示面板在第一区域A1的透过率有较高的提升，并且第一区域A1对光线透过得更均匀。
再进一步地，在一些实施例中，第一区域中位于同一列的多个像素驱动电路均分布在奇数行或偶数行。例如，参见图11，每相邻两行中，电路组42交错排布。
为了便于说明，图11及后续附图仅针对第一区域A1的像素驱动电路的连接结构进行描述(即，省略了第二区域A2的像素驱动电路的结构)。
如图11所示，电路空缺区41和电路组42的交错排布结构不仅能够在更大程度上提升显示区的第一区域A1的透过率，而且，由于电路空缺区41和电路组42的分布非常均匀，也不会使第一区域A1在显示时像素出现大的局部差异，从而兼顾了第一区域A1的显示。
由于图11以m＝n＝2为例示出了像素驱动电路300的结构，因此，在图11中，电路空缺区41和电路组42交错排布，意味着第一区域A1中的一半为电路空缺区41，也就是，第一区域A1中的像素驱动电路300的占空比为50％，使得显示区的第一区域A1的透过率进一步提升。
参见图11可知，在去除显示区A的第一区域A1中的部分亚像素的像素驱动电路后，在被去除的像素驱动电路的位置仍然存在一些金属布线。
在本公开的一些实施例中，为了进一步提升第一区域A1的透过率，可以对像素驱动电路之间的连接结构进行改进。
示例性地，可以对与同一个选通信号端GOA连接的像素驱动电路之间的连接结构进行改进。
示例性地，按照第i行和第i+1行的多个像素驱动电路在行方向上的排列顺序，第i行的多个像素驱动电路的扫描信号端和第i+1行的多个像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。
例如，参见图12，按照第i行和第i+1行的多个像素驱动电路300在行方向上的排列顺序，第i+1个选通信号端GOA通过多个第一选通信号连接段G1和多个第二选通信号连接段G2，将第i行的多个像素驱动电路300的扫描信号端Vgate和第i+1行的多个像素驱动电路300的复位信号端Reset顺次连接，顺次连接相邻两行中多个像素驱动电路300的多个第一选通信号连接段G1和多个第二选通信号连接段G2构成一条第一信号线。
具体的，如图12所示，按照第1行和第2行的多个像素驱动电路300在行方向上的排列顺序，第2个选通信号端GOA 1通过一条第一信号线中的多个第一选通信号连接段G1和多个第二选通信号连接段G2与第1行的多个像素驱动电路300的扫描信号端Vgate和第2行的多个像素驱动电路300的复位信号端Reset顺次连接。按照第2行和第3行的多个像素驱动电路300在行方向上的排列顺序，第3个选通信号端GOA 2通过一条第一信号线中的多个第一选通信号连接段G1和多个第二选通信号连接段G2与第2行的多个像素驱动电路300的扫描信号端Vgate和第3行的多个像素驱动电路300的复位信号端Reset顺次连接。以此类推，后面不再赘述。
其中，参见图12，第一选通信号连接段G1，包括：每个选通信号端GOA 在第i行和第i+1行的发光亚像素中的每个电路组42的每个像素驱动电路300之间的连接段。
参见图12，第二选通信号连接段G2，包括：每个选通信号端GOA从第i行发光亚像素中的每个电路组42中的第一个像素驱动电路300的扫描信号端Vgate连接到第i+1行发光亚像素中按照行的方向与第一个像素驱动电路300相邻的像素驱动电路300的复位信号端Reset的连接段；以及，每个选通信号端GOA从第i行发光亚像素中的每个电路组42中的第m个像素驱动电路300的扫描信号端Vgate连接到第i+1行发光亚像素中按照行的方向与第m个像素驱动电路300相邻的像素驱动电路300的复位信号端Reset的连接段。其中，图12以m＝n＝2示出了第一区域A1的多个选通信号端GOA与像素驱动电路300的连接结构。
也就是说，每个选通信号端GOA可以为与其连接的相邻两行像素驱动电路中的第一行像素驱动电路提供扫描信号端Vgate的扫描信号gate，并且可以为与其连接的第二行像素驱动电路提供复位信号端Reset的复位信号reset。结合图12可以看出，在多个选通信号端GOA通过上述方式与像素驱动电路300连接时，每个选通信号端GOA通过第一选通信号连接段G1将与其连接的每个电路组42中的每个像素驱动电路300之间进行了连接，并且，通过第二选通信号连接段G2将这相邻的两行像素驱动电路连接。
因此，使多个选通信号端GOA与像素驱动电路通过上述方式连接，可以节省多个选通信号端GOA与像素驱动电路连接时的布线空间，即，节省了像素驱动电路的复位信号端Reset的复位信号和扫描信号端Vgate的扫描信号的布线空间，从而进一步提升了第一区域A1的透过率。
示例性地，可以对与同一个控制信号端EOA连接的像素驱动电路之间的连接结构进行改进。
示例性地，按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i行的多个所述像素驱动电路的使能信号端和第i+1行的多个所述像素驱动电路的使能信号端通过一条第一信号线顺次连接；i≥1。
具体地，参见图12，按照第2i-1行和第2i行的多个像素驱动电路300在行方向上的排列顺序，第i个控制信号端EOA通过多个第一控制信号连接段E1和多个第二控制信号连接段E2，将第2i-1行的多个像素驱动电路300的使能信号端EM和第2i行的多个像素驱动电路300的使能信号端EM顺次连接，顺次连接相邻两行中多个像素驱动电路300的多个第一控制信号连接段E1和 多个第二控制信号连接段E2构成一条第一信号线。
例如，如图12所示，按照第1行和第2行的多个像素驱动电路300在行方向上的排列顺序，第1个控制信号端EOA 1通过一条第一信号线中的多个第一控制信号连接段E1和多个第二控制信号连接段E2与第1行的多个像素驱动电路300的使能信号端EM和第2行的多个像素驱动电路300的使能信号端EM顺次连接。按照第3行和第4行的电路组中的多个像素驱动电路300在行方向上的排列顺序，第2个控制信号端EOA 2通过一条第一信号线中的多个第一控制信号连接段E1和多个第二控制信号连接段E2与第3行的多个像素驱动电路300的使能信号端EM和第4行的多个像素驱动电路300的使能信号端EM顺次连接。以此类推，后面不再赘述。
其中，参见图12，第一控制信号连接段E1,包括：每个控制信号端EOA在第2i-1行和第2i行的发光亚像素中的每个电路组42的每个像素驱动电路300之间的连接段。
参见图12，第二控制信号连接段E2包括：每个控制信号端EOA从第2i-1行发光亚像素300中的每个电路组42中的第一个像素驱动电路300的使能信号端EM连接到第2i行发光亚像素中按照行的方向与第一个像素驱动电路300相邻的发光亚像素的使能信号端EM的连接段，以及，每个控制信号端EOA从第2i-1行发光亚像素中的每个电路组42中的第m个像素驱动电路300的使能信号端EM连接到第2i行发光亚像素中按照行的方向与第m个像素驱动电路300相邻的像素驱动电路300的使能信号端EM连接段。其中，图12以m＝n＝2示出了第一区域A1的多个控制信号端EOA与像素驱动电路300的连接结构。
也就是说，每个控制信号端EOA可以为与其连接的相邻的两行像素驱动电路提供使能信号端EM的使能信号。结合图12可以看出，在多个控制信号端EOA通过上述方式与像素驱动电路300连接时，每个控制信号端EOA通过第一控制信号连接段E1将与其连接的每个像素驱动电路组42中的每个像素驱动电路300之间进行了连接，并且，通过第二控制信号连接段E2将这相邻的两行像素驱动电路300连接。
因此，使多个控制信号端EOA与像素驱动电路通过上述方式连接，可以节省多个控制信号端EOA与像素驱动电路连接时的布线空间，即，节省了像素驱动电路的使能信号端EM的使能信号的布线空间，从而进一步提升了第一区域A1的透过率。
示例性地，可以对与第一电压端VDD连接的像素驱动电路之间的连接结 构进行改进。
示例性地，按照第j列和第j+1列的多个像素驱动电路在列方向上的排列顺序，第一电压端与第j列的多个像素驱动电路的电源电压端和第j+1列的多个像素驱动电路的电源电压端通过一条第二信号线顺次连接；第j列的多个像素驱动电路的电源电压端和第j+1列的多个像素驱动电路的电源电压端通过一条第二信号线顺次连接；j≥1。
例如，如图13所示，在m＝n＝2时，第一电压端VDD与每个像素驱动电路300连接，按照第2列和第3列的多个像素驱动电路300在列方向上的排列顺序，第一电压端VDD通过一条第二信号线与第2列的多个像素驱动电路300的电源电压端和第3列的多个像素驱动电路300的电源电压端顺次连接。按照第4列和第5列的多个像素驱动电路300在列方向上的排列顺序，第一电压端VDD通过一条第二信号线与第4列的多个像素驱动电路300的电源电压端和第5列的多个像素驱动电路300的电源电压端顺次连接。以此类推，后面不再赘述。
结合图13可以看出，在相邻两列的像素驱动电路300的电源电压端通过上述方式连接时，利用一根第二信号线就可以为两列相邻的像素驱动电路300传输电源电压信号，节省了像素驱动电路的第一电压端VDD的电源电压信号的布线空间，从而进一步提升了第一区域A1的透过率。
另外，根据图13可知，第一电压端VDD与像素驱动电路连接300的上述结构说明了第一电压端VDD与像素驱动电路结构中的大部分像素驱动电路300的连接结构，在像素驱动电路结构的边缘位置(参见图13，例如，首列、末列、末行)，第一电压端VDD与处于这些边缘位置的每个像素驱动电路300直接连接。
示例性地，可以对与同一个数据信号端Vdata与像素驱动电路之间的连接结构进行改进。
示例性地，按照第j列和第j+1列的多个像素驱动电路在列方向上的排列顺序，数据信号端与第j列的多个像素驱动电路的数据端和第j+1列的多个像素驱动电路的数据端通过一条第二信号线顺次连接；第j列的多个像素驱动电路的数据端和第j+1列的多个像素驱动电路的数据端通过一条第二信号线顺次连接；j≥1。
例如，参见图13，第j列电路组42中的每个电路组42的第二个像素驱动电路300的数据端以及第j+1列电路组42中的每个电路组42的第一个像素驱动电路300的数据端连接第j+1个数据信号端Vdata。
具体的，如图13所示，第1列电路组42中的每个电路组42的第二个像素驱动电路300的数据端以及第2列电路组42中的每个电路组42的第一个像素驱动电路300的数据端通过一条第二信号线与第2个数据信号端Vdata n+2连接。第2列电路组42中的每个电路组42的第二个像素驱动电路300的数据端以及第3列电路组42中的每个电路组42的第一个像素驱动电路300的数据端通过一条第二信号线与第3个数据信号端Vdata n+3连接。第3列电路组42中的每个电路组42的第二个像素驱动电路300的数据端以及第4列电路组42中的每个电路组42的第一个像素驱动电路300的数据端通过一条第二信号线与第4个数据信号端Vdata n+6连接。也即，按照像素驱动电路300在列方向上的排列顺序，第2列中的每个像素驱动电路300的数据端和第3列中的每个像素驱动电路300的数据端通过一条第二信号线顺次连接；第4列中的每个像素驱动电路300的数据端和第5列中的每个像素驱动电路300的数据端通过一条第二信号线顺次连接。以此类推，后面不再赘述。
结合图13可以看出，在多个数据信号端Vdata通过上述方式与像素驱动电路300连接时，利用一根数据信号端Vdata的连线，就可以为来自不同的电路组中的两列相邻的像素驱动电路300传输数据信号，节省了像素驱动电路300的数据信号端Vdata的数据信号的布线空间，从而进一步提升了第一区域A1的透过率。
另外，根据图13可知，数据信号端Vdata与像素驱动电路300连接的上述结构说明了数据信号端Vdata与像素驱动电路结构中的大部分像素驱动电路300的连接结构，在像素驱动电路结构的边缘位置(参见图13，例如，首列、末列)，一个数据信号端Vdata可以连接一列像素驱动电路300。例如，在图13中，第1个数据信号端Vdata n连接第1列电路组中的每个电路组的第一个像素驱动电路300。
在本公开的一些实施例中，显示面板还包括初始化电压端Vinit，初始化电压端与每个像素驱动电路连接。
示例性地，参见图14a，其示出了相关技术中初始化电压端Vinit与像素驱动电路300的连接结构。在图14a的基础上，可以对初始化电压端Vinit与像素驱动电路300的连接结构进行改进。例如，如图14b所示，本公开实施例提供的去掉了部分像素驱动电路300(即，设置了电路空缺区)的像素驱动电路结构。即，将去掉的像素驱动电路300中与初始化电压端Vinit的连线删除，从而进一步提升了第一区域A1的透过率。
上述示例分别描述了本申请实施例对像素驱动电路之间以及像素驱动电 路与各个驱动信号输入端的连接结构的改进。综合以上描述，本公开实施例提供的新的像素驱动电路及驱动信号输入端的连接结构的设计可以如图15所示。
根据前述及图15可知，通过本公开提供的新的像素驱动电路之间以及及像素驱动电路与驱动信号输入端的连接结构的设计，显著减少了去除的像素驱动电路的位置(即空缺位置)的金属布线，从而使得第一区域A1的透过率得到的进一步的提升。
从而，本公开实施例提供的显示面板中包括第一区域A1，第一区域A1中的亚像素包括至少一个去除了像素驱动电路的位置(即空缺位置)所形成的电路空缺区，从而使得第一区域A1的透过率得到提升。并且，本公开实施例还对去除了部分像素驱动电路后留存的像素驱动电路之间以及像素驱动电路与驱动信号输入端的连接结构进行了上述改进，使得第一区域A1的透过率得到显著提升。
此外，在一些实施例中，显示面板还包括多个发光器件，具体的，发光亚像素中包括发光器件，电路空缺区中未设置发光器件。
也就是说，电路空缺区不仅去除了像素驱动电路，而且还去除了发光器件，从而使得电路空缺区的透过率进一步提升，即，使得显示面板的第一区域A1的透过率得到进一步提升。
其中，发光器件可以为OLED器件，也可以为能够通过像素驱动电路驱动的其他类型的发光器件，本公开实施例对此不作限定。
示例性地，在一个显示面板中，不同类型的发光亚像素的像素驱动电路的大小是基本相同的，这些大小基本相同的像素驱动电路可以形成规整的多行和多列分布结构。例如，参见图17，图17示出了相关技术中的一种显示面板的结构，其中，像素驱动电路300(即，图17中的每个矩形块)形成规整的多行和多列分布结构。
此外，由于不同类型发光亚像素中的发光器件需要发出不同颜色的光，不同类型的发光器件的发光效率和使用寿命等均存在差异，因此，在不同类型的发光亚像素中，通常发光器件的形状和大小也会存在差异。例如，可以将发光效率较低的发光器件做得大一些，将发光效率较高的发光器件做得小一些，以平衡不同类型发光器件的发光情况，从而完成正常显示。比如，参见图17，绿色发光亚像素101-G、蓝色发光亚像素101-B和红色发光亚像素101-R的大小不同。
而且，由于不同像素驱动电路300所驱动的发光器件的大小和形状可能 不同，因此，发光器件的排布可能并非阵列排布。如图17所示，蓝色发光亚像素101-B的发光器件设置得较大，绿色发光亚像素101-G的发光器件设置得较小。在此基础上，为了合理布局发光器件，尽可能提高分辨率(即，对应于单位面积的像素数量)，如图17所示，每个发光亚像素中，发光器件和像素驱动电路在位置上并非一一对应。其中，一个绿色发光亚像素101-G、一个蓝色发光亚像素101-B和一个红色发光亚像素101-R构成一个发光像素160。并且，两个发光像素160共用了一个红色发光亚像素101-R。
示例性地，在电路空缺区和电路组交错排布并且m＝n＝2时，多个发光亚像素中位于奇数列的多个发光亚像素为第一类发光亚像素，多个发光亚像素中位于偶数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素；或者，多个发光亚像素中位于偶数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于奇数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素。例如，参见图18，多个发光亚像素中位于奇数列的多个发光亚像素为第一类发光亚像素，多个发光亚像素中位于偶数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素。其中，第一类发光亚像素、第二类发光亚像素和第三类发光亚像素分别为绿色发光亚像素101-G、红色发光亚像素101-R和蓝色发光亚像素101-B，第一区域A1发光亚像素的排布可以如图18所示。其中，一个红色发光亚像素101-R、一个绿色发光亚像素101-G和一个蓝色发光亚像素101-B构成一个像素160。对第二区域发光亚像素的排布方式不做过多限制，可以与第一区域一致，也可以不同于第一区域。
又例如，参见图19，多个发光亚像素中位于偶数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于奇数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素。其中，第一类发光亚像素、第二类发光亚像素和第三类发光亚像素分别为绿色发光亚像素101-G、蓝色发光亚像素101-B和红色发光亚像素101-R，一个红色发光亚像素101-R、一个绿色发光亚像素101-G和一个蓝色发光亚像素101-B构成一个像素160。
示例性地，相邻两列发光亚像素中，按照列的方向，每连续三个不同类的亚像素构成一个像素。
例如，每一行发光亚像素中的每个第一类发光亚像素、上一行发光亚像素中的在列的方向上与该第一类发光亚像素相邻的第二类发光亚像素、以及 下一行发光亚像素中的在列的方向上与该第一类发光亚像素相邻的第三类发光亚像素构成一个像素。具体的，参见图18，第四行发光亚像素中的一个绿色发光亚像素101-G、第三行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的红色发光亚像素101-R、以及第三行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的蓝色发光亚像素101-B构成一个发光像素160。
或者，每一行发光亚像素中的每个第一类发光亚像素、上一行发光亚像素中的在列的方向上与该第一类发光亚像素相邻的第三类发光亚像素、以及下一行发光亚像素中的在列的方向上与该第一类发光亚像素相邻的第二类发光亚像素构成一个像素。例如，参见图18，第二行发光亚像素中的一个绿色发光亚像素101-G、第一行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的蓝色发光亚像素101-B、以及第三行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的红色发光亚像素101-R构成一个像素160。再例如，参见图19，第五行发光亚像素中的一个绿色发光亚像素101-G、第四行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的红色发光亚像素101-R、以及第六行发光亚像素中的在列的方向上与该绿色发光亚像素101-G相邻的蓝色发光亚像素101-B构成一个像素160。
在电路空缺区和所述电路组交错排布并且m＝n＝2时，通过本申请提供的图18和图19所示的发光亚像素排布方式，每个绿色发光亚像素101-G与相邻列、相邻上下两行的蓝色发光亚像素101-B和红色发光亚像素101-R构成一个发光像素160，并且蓝色发光亚像素101-B和红色发光亚像素101-R同时还可以与其他行的绿色发光亚像素101-G构成发光像素160，即共用了蓝色发光亚像素101-B和红色发光亚像素101-R。将图18与图19及图17进行对比可知，本申请实施例的这种设计能够显著提升显示面板的第一区域A1的透过率，在第一区域A1中，存在多个电路空缺区41，像素驱动电路300的占空比约为50％，即，相对于未设置电路空缺区41的正常显示区，每英寸像素数(pixels per inch，PPI)降低了约50％，从而该第一区域A1成为低PPI区域，PPI小于第二区域。
本公开的一些实施例提供一种显示装置，该显示装置包括上述任一实施例中的显示面板。
示例性地，参见图20，除了上述显示面板10以外，该显示装置100还包括光学传感器190，光学传感器190设置在显示面板10的背离出光面的一侧，并且光学传感器190与第一区域A1正对设置。
其中，光学传感器190与第一区域A1正对设置是指，光学传感器190沿竖直方向在显示面板10上的投影落在第一区域A1内。也就是说，光学传感器190沿竖直方向在显示面板10上的投影可以小于或者等于第一区域A1。
其中，光学传感器190设置在显示面板10的背离出光面的一侧，即，该光学传感器190为屏下光学传感器，该屏下光学传感器能够通过正对设置的显示区的低PPI的第一区域A1，获得充足的光线，从而能够保证该屏下光学传感器的功能。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种显示面板，具有显示区和位于显示区外围的周边区，所述显示区包括第一区域和第二区域；
    所述显示面板包括位于所述第一区域的多个像素驱动电路和位于所述第二区域的多个像素驱动电路；
    其中，所述第一区域中像素驱动电路的密度小于所述第二区域中像素驱动电路的密度。
  2. 根据权利要求1所述的显示面板，其中，位于所述第一区域的多个像素驱动电路呈多行和多列分布；每行中像素驱动电路的数量小于所述第一区域中多个像素驱动电路的列数。
  3. 根据权利要求2所述的显示面板，其中，
    所述第一区域中，每行像素驱动电路包括：多个电路组，每个电路组包括m个连续分布的像素驱动电路，m≥1，每相邻两个电路组之间的连续n列未设置像素驱动电路，n≥1。
  4. 根据权利要求3所述的显示面板，其中，m＝n＝2。
  5. 根据权利要求2～4中任一项所述的显示面板，其中，
    所述第一区域中，位于同一列的多个像素驱动电路均分布在奇数行或偶数行。
  6. 根据权利要求4～5中任一项所述的显示面板，还包括：至少一条第一信号线和/或至少一条第二信号线；
    位于相邻两行的多个像素驱动电路，按照在行方向上的排列顺序通过一条第一信号线顺次连接；
    位于相邻两列的多个像素驱动电路通过一条第二信号线顺次连接；其中，与同一条所述第二信号线连接的多个像素驱动电路交替分布于奇数行和偶数行中。
  7. 根据权利要求4～6中任一项所述的显示面板，其中，
    按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i行的多个所述像素驱动电路的扫描信号端和第i+1行的多个所述像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。
  8. 根据权利要求7所述的显示面板，其中，
    按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i+1个所述选通信号端与第i行的多个所述像素驱动电路的扫描信号端和第i+1行的多个所述像素驱动电路的复位信号端通过一条第一信号线顺次连接；i≥1。
  9. 根据权利要求6～8中任一项所述的显示面板，其中，
    按照第i行和第i+1行的多个所述像素驱动电路在行方向上的排列顺序，第i行的多个所述像素驱动电路的使能信号端和第i+1行的多个所述像素驱动电路的使能信号端通过一条第一信号线顺次连接；i≥1。
  10. 根据权利要求9所述的显示面板，还包括多个控制信号端；
    在i为奇数时，第i行所述像素驱动电路的使能信号端与第(i+1)/2个所述控制信号端连接；在i为偶数时，第i行所述像素驱动电路的使能信号端与第i/2个所述控制信号端连接；
    和/或，
    所述显示面板还包括初始化电压端，所述初始化电压端与每个所述像素驱动电路连接。
  11. 根据权利要求6～10中任一项所述的显示面板，其中，
    按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第j列的多个所述像素驱动电路的电源电压端和第j+1列的多个所述像素驱动电路的电源电压端通过一条第二信号线顺次连接；j≥1。
  12. 根据权利要求11所述的显示面板，还包括多个第一电压端；
    按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第一电压端与第j列的多个所述像素驱动电路的电源电压端和第j+1列的多个所述像素驱动电路的电源电压端通过一条第二信号线顺次连接；j≥1。
  13. 根据权利要求6～12中任一项所述的显示面板，其中，
    按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，第j列的多个所述像素驱动电路的数据端和第j+1列的多个所述像素驱动电路的数据端通过一条第二信号线顺次连接；j≥1。
  14. 根据权利要求13所述的显示面板，还包括多个数据信号端；
    按照第j列和第j+1列的多个所述像素驱动电路在列方向上的排列顺序，数据信号端与第j列的多个所述像素驱动电路的数据端和第j+1列的多个所述像素驱动电路的数据端通过一条第二信号线顺次连接；j≥1。
  15. 根据权利要求5所述的显示面板，还包括多个发光器件；
    每个发光器件与一个像素驱动电路耦接，构成一个发光亚像素；
    多个发光亚像素包括第一类发光亚像素、第二类发光亚像素和第三类发光亚像素；同一类发光亚像素的发光颜色相同，不同类发光亚像素的发光颜色不同；
    所述多个发光亚像素中位于奇数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于偶数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素；
    或者，
    所述多个发光亚像素中位于偶数列的多个发光亚像素为第一类发光亚像素，所述多个发光亚像素中位于奇数列的多个发光亚像素按照列的方向依次交替为第二类发光亚像素和第三类发光亚像素。
  16. 根据权利要求15所述的显示面板，其中，
    相邻两列发光亚像素中，按照列的方向，每连续三个不同类的亚像素构成一个像素。
  17. 一种显示装置，包括如权利要求1～16中任一项所述的显示面板。
  18. 根据权利要求17所述的显示装置，还包括光学传感器，所述光学传感器设置在所述显示面板的背离出光面的一侧，并且所述光学传感器与第一区域正对设置。
PCT/CN2021/087152 2020-04-14 2021-04-14 显示面板及显示装置 WO2021208944A1 (zh)

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CN112289203B (zh) 2020-10-29 2022-09-02 合肥维信诺科技有限公司 显示面板和显示装置
CN112951106A (zh) * 2021-02-26 2021-06-11 武汉华星光电半导体显示技术有限公司 显示装置
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