WO2021197108A1 - 应用于半导体工艺的腔室 - Google Patents

应用于半导体工艺的腔室 Download PDF

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Publication number
WO2021197108A1
WO2021197108A1 PCT/CN2021/082014 CN2021082014W WO2021197108A1 WO 2021197108 A1 WO2021197108 A1 WO 2021197108A1 CN 2021082014 W CN2021082014 W CN 2021082014W WO 2021197108 A1 WO2021197108 A1 WO 2021197108A1
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WO
WIPO (PCT)
Prior art keywords
heat
chamber
housing
area
conducting member
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PCT/CN2021/082014
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English (en)
French (fr)
Inventor
陈炳汎
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长鑫存储技术有限公司
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Application filed by 长鑫存储技术有限公司 filed Critical 长鑫存储技术有限公司
Priority to US17/475,697 priority Critical patent/US20220005676A1/en
Publication of WO2021197108A1 publication Critical patent/WO2021197108A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32458—Vessel
    • H01J37/32522—Temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/54—Controlling or regulating the coating process
    • C23C14/541—Heating or cooling of the substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere

Definitions

  • This application relates to the field of semiconductor manufacturing, and in particular to a chamber applied to semiconductor processing.
  • the preclean process is mainly used to remove oxides on the chip surface to reduce the contact surface impedance. Temperature is an important control parameter to control the uniformity of the precleaning process. If the temperature does not meet the requirements, the precleaning process may not be complete. The oxide on the surface of the chip is removed, so that the contact surface impedance cannot be effectively reduced.
  • the technical problem to be solved by the present application is to provide a chamber applied to a semiconductor process, which can balance the temperature change of the chamber.
  • the present application provides a chamber applied to semiconductor processing, which includes a shell, the shell is closed to form a reaction chamber, and a heat-conducting element is provided on the outer side wall of the shell, the heat-conducting element It has a first surface and a second surface that are opposed to each other. The first surface is in contact with the outer side wall of the housing, and the second surface is used to contact an external device to connect the housing and the external device. A heat conduction channel is formed between.
  • thermal conductivity of the heat-conducting element is greater than the thermal conductivity of the area of the housing in contact with the heat-conducting element.
  • the housing includes an upper housing and a lower housing, and the upper housing and the lower housing are closed to form the reaction chamber.
  • the heat conducting member is arranged on the outer side wall of the lower casing.
  • the heat-conducting member surrounds the outer side wall of the casing one round.
  • the heat conducting element includes a first area and a second area, and the thermal conductivity of the first area is smaller than the thermal conductivity of the second area.
  • the second area is a metal strip.
  • a hollow part is provided on the heat conducting member, and the hollow part exposes the outer side wall of the casing.
  • the hollow portion is composed of a plurality of openings arranged at intervals along the circumferential direction of the casing, and the openings penetrate the heat conducting member.
  • the diameter of the opening is 5-10 cm.
  • the distance between adjacent openings is 2 to 3 cm.
  • the thickness of the heat conducting member is 0.2-0.3 cm.
  • the advantage of the present application is that the heat conduction element is used to establish a heat conduction channel between the housing and the external device, so that the heat conduction rate is accelerated, and thus the heat in the reaction chamber can be quickly released to balance the temperature in the reaction chamber.
  • Fig. 1 is a schematic diagram of the heat flow inside the chamber after a continuous process in the prior art
  • FIG. 2 is a schematic cross-sectional view of the first embodiment of the chamber used in the semiconductor process of the present application
  • FIG. 3 is a schematic diagram of a three-dimensional structure of the heat conducting element of the first embodiment of the chamber used in the semiconductor process of the present application;
  • FIG. 5 is a perspective schematic view of the heat conducting element of the second embodiment of the chamber used in the semiconductor process of the present application.
  • FIG. 6 is a perspective schematic view of the heat conducting element of the third embodiment of the chamber used in the semiconductor process of the present application.
  • FIG. 7 is a three-dimensional schematic diagram of the heat conducting element of the fourth embodiment of the chamber used in the semiconductor process of the present application.
  • FIG. 8A shows the temperature distribution of the chamber in the prior art after a continuous process
  • 8B is the temperature distribution of the chamber of the fourth embodiment of the present application after a continuous process
  • Figure 9 is a trend diagram of the film uniformity U% on the wafer.
  • the chamber can be used in a physical vapor deposition (PVD, Physical Vapor Deposition) process.
  • PVD physical vapor deposition
  • ICP inductively coupled plasma
  • FIG. 1 is a schematic diagram of the heat flow inside the chamber after successive multiple processes in the prior art.
  • the heat in the chamber 10 shown by the arrow in FIG. 1
  • the heat accumulation in the chamber is increasing, which causes the temperature in the deposition chamber 10 to rise, making the temperature of the chamber 10 higher than that of subsequent semiconductor manufacturing processes. Requires temperature, which in turn affects the quality of subsequent semiconductor processes.
  • the applicant provides a chamber applied to the semiconductor process, which can accelerate the release of heat in the chamber, thereby avoiding the continuous increase of the temperature in the chamber, and providing a good temperature basis for the subsequent process.
  • FIG. 2 is a schematic cross-sectional view of a first embodiment of a chamber applied to a semiconductor process in this application.
  • the chamber 2 includes a housing 21.
  • the shell 21 is closed to form a reaction chamber 22.
  • the reaction chamber 22 serves as a reaction chamber for semiconductor processing.
  • the bottom of the casing 21 has an opening 23, through which a conventional device for semiconductor processing (such as a heating plate) is exposed to the reaction chamber 22.
  • the housing 21 includes an upper housing 21A and a lower housing 21B disposed oppositely, and the upper housing 21A and the lower housing 21B are closed to form the reaction chamber 22.
  • a conventional semiconductor process device such as a heating plate is exposed to the reaction chamber 22 through the opening 23.
  • a heat conducting element 24 is provided on the outer side wall of the housing 21.
  • FIG. 3 is a schematic diagram of the three-dimensional structure of the heat-conducting element 24.
  • the heat-conducting element 24 has a first surface 241 and a second surface 242 opposite to each other.
  • the first surface 241 and the outer side of the housing 21 In contact with the wall, the second surface 242 is used for contact with an external device (not shown in the drawings).
  • the heat-conducting member 24 forms a heat-conducting channel between the housing 21 and the external device, and the heat in the reaction chamber 22 is conducted to the external device through the housing 21 and the heat-conducting member 24, thereby realizing the cavity Heat dissipation of room 2. There is no contact between the housing 21 and the external device.
  • the heat conducting member 24 is used to establish a heat conduction channel between the two, and the heat conduction rate is accelerated, so that the heat in the reaction chamber 22 can be released quickly, and the temperature in the reaction chamber 22 can be balanced.
  • the thermal conductivity of the heat conducting element 24 is greater than the thermal conductivity of the area of the housing contacting the heat conducting element 24, so as to prevent the heat conducting element 24 from affecting the heat transfer and further accelerate the heat transfer rate.
  • the heat conducting member 24 surrounds the outer side wall of the casing 21 for a week to establish a heat conduction channel on the circumference of the casing 21 to further accelerate the heat transfer rate, so that the heat in the reaction chamber 22 is removed Fully release to avoid heat accumulation.
  • the heat conducting member 24 is arranged on the outer side wall of the lower housing 21B, and the heat conducting member 24 Surround the outer side wall of the lower housing 21B to accelerate the release of heat in the lower part of the reaction chamber 22.
  • the thermal conductivity of the heat conducting member 24 may be greater than the thermal conductivity of the lower housing 21B.
  • the thickness of the heat conducting member 24 is 0.2-0.3 cm, so that it can be set between the lower housing 21B and the external device, and contact with both, forming Heat conduction channel.
  • FIG. 4 is a schematic diagram of the heat flow in the reaction chamber after the continuous manufacturing process of the chamber of the first embodiment of the present application. It can be seen from FIG. 4 that the heat in the reaction chamber 22 is conducted through the heat conduction channel formed by the lower shell 21B and the heat conduction member 24 To an external device, thereby accelerating the heat transfer rate.
  • the present application also provides a second embodiment.
  • FIG. 5 is a three-dimensional schematic view of the heat conducting element of the second embodiment of the chamber used in the semiconductor process of this application.
  • the heat conducting element 24 includes a first area 24A and a second area 24B.
  • the first area 24A The thermal conductivity of is smaller than the thermal conductivity of the second region 24B.
  • the first area 24A and the second area 24B may both be loops surrounding the outer side wall of the housing. Further, in this embodiment, the first area 24A is separately provided on both sides of the second area 24B.
  • the position of the second area 24B is set according to the difference in thermal conductivity of different areas of the housing 21 or the difference in heat accumulation in different areas of the reaction chamber 22. For example, at a position 3 cm away from the bottom of the housing 21, the reaction chamber 22 accumulates a lot of heat, and the second area 24B is set corresponding to this area to enhance the heat conduction in this area.
  • the second area 24B is a metal strip. Specifically, in the second embodiment, the second region 24B is a metal copper tape.
  • the chamber used in the semiconductor process of the present application also provides a third embodiment. Please refer to FIG. 6, which is a three-dimensional schematic diagram of the heat conducting element of the third embodiment of the chamber used in the semiconductor process of this application.
  • the difference between the third embodiment and the first embodiment is that the heat conducting element 24 A hollow part 25 is provided thereon, and the hollow part 25 exposes the outer side wall of the housing 21.
  • the hollow portion 25 is composed of a plurality of openings 251 arranged at intervals along the circumferential direction of the casing, and the openings 251 penetrate the heat conducting member 24.
  • the hollow portion 25 may also be in other forms, such as a band-shaped or wave-shaped structure extending along the circumferential direction of the casing.
  • the position of the hollow portion 25 is set according to the difference of heat accumulation in different regions of the reaction chamber 22. For example, at a position 3 cm away from the top of the housing 21, the reaction cavity 22 has less heat accumulation, and the hollow portion 25 is set to correspond to this area to reduce the heat conduction in this area, thereby balancing the reaction cavity
  • the heat distribution in 22 avoids large temperature changes in the reaction chamber 22.
  • the diameter of the opening 251 is 5 to 10 cm, and the distance between adjacent openings 251 is 2 to 3 cm, which can further reduce the area corresponding to the hollow portion 25. Heat conduction to further balance the heat distribution in the reaction chamber 22.
  • the present application also provides a fourth embodiment.
  • FIG. 7 is a perspective view of the heat conducting element of the fourth embodiment of the chamber used in the semiconductor process of this application.
  • the heat conducting element 24 It includes a first region 24A and a second region 24B.
  • the thermal conductivity of the first region 24A is smaller than the thermal conductivity of the second region 24B.
  • the first area 24A and the second area 24B may both be loops surrounding the outer side wall of the housing. Further, in this embodiment, the first area 24A is separately provided on both sides of the second area 24B.
  • the position of the second area 24B is set according to the difference in thermal conductivity of different areas of the housing 21 or the difference in heat accumulation in different areas of the reaction chamber 22. For example, at a position 3 cm away from the bottom of the housing 21, the reaction chamber 22 accumulates a lot of heat, and the second area 24B is set corresponding to this area to enhance the heat conduction in this area.
  • the second area 24B is a metal strip.
  • the second region 24B is a metal copper tape.
  • the chamber used in the semiconductor process of the present application can balance the heat distribution in the reaction chamber and avoid large fluctuations in the temperature in the reaction chamber.
  • Fig. 8A is the temperature distribution of the chamber of the prior art after the continuous process
  • Fig. 8B is the temperature distribution of the chamber of the fourth embodiment of the present application after the continuous process.
  • the temperature of the chamber in the prior art fluctuates greatly, which will greatly affect the quality of the film on the chip.
  • the temperature of the chamber in the present application does not change much and basically maintains the same temperature, which will not affect the film on the chip. quality.
  • Figure 9 is a trend diagram of the film uniformity U% on the wafer, in which area A is the trend diagram of the film uniformity U% on the wafer obtained by using the chamber of the prior art, and area B is the chamber using the present application
  • area A is the trend diagram of the film uniformity U% on the wafer obtained by using the chamber of the prior art
  • area B is the chamber using the present application
  • the uniformity U% of the film on the wafer obtained by the chamber of the prior art is up to and down 4.6%, while the chamber of this application is used to obtain
  • the uniformity U% of the film on the wafer is 3.6% up and down, and the average improvement is about 1.03% or more.

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Abstract

一种应用于半导体工艺的腔室（10），其包括壳体（21），所述壳体（21）闭合形成反应腔（22），在所述壳体（21）的外侧壁设置有导热件（24），所述导热件（24）具有相对设置的第一表面（241）及第二表面（242），所述第一表面（241）与所述壳体（21）的外侧壁接触，所述第二表面（242）用于与外部装置接触，以在所述壳体（21）及所述外部装置之间形成导热通道。所述腔室（10）利用导热件（24）在壳体（21）与外部装置之间建立导热通道，使得热传导速率加快，进而能够快速地将所述反应腔（22）内的热量的释放，平衡反应腔（22）内的温度。

Description

应用于半导体工艺的腔室
相关申请引用说明
本申请要求于2020年03月31日递交的中国专利申请号202010243117.8，申请名为“应用于半导体工艺的腔室”的优先权，其全部内容以引用的形式附录于此。
技术领域
本申请涉及半导体制造领域，尤其涉及一种应用于半导体工艺的腔室。
背景技术
在半导体制程中，许多道制程均是通过沉积腔室来完成。而该些制程对工艺温度均有一定要求。过高或过低的工艺温度都可能会让芯片表面的薄膜的品质产生变异。例如，预清洗(Pre clean)工艺主要应用于清除芯片表面氧化物来达到降低接触面阻抗，温度是控制预清洗工艺均匀度的重要控制参数，若温度不符合要求，可能导致预清洗工艺不能完全清除芯片表面氧化物，从而不能够有效地降低接触面阻抗。
因此，如何平衡沉积腔室内的温度，成为目前亟需解决的问题。
申请内容
本申请所要解决的技术问题是，提供一种应用于半导体工艺的腔室，其能够平衡腔室的温度变化。
为了解决上述问题，本申请提供了一种应用于半导体工艺的腔室，其包括壳体，所述壳体闭合形成反应腔，在所述壳体的外侧壁设置有导热件，所述导热件具有相对设置的第一表面及第二表面，所述第一表面与所述壳体的外侧壁接触，所述第二表面用于与外部装置接触，以在所述壳体及所述外部装置之间形成导热通道。
进一步，所述导热件的导热系数大于与所述导热件接触的壳体区域的导热系数。
进一步，所述壳体包括上壳体及下壳体，所述上壳体与所述下壳体闭合形成所述反应腔。
进一步，所述导热件设置在所述下壳体的外侧壁。
进一步，所述导热件环绕所述壳体外侧壁一周。
进一步，所述导热件包括第一区域及第二区域，所述第一区域的导热系数小于所述第二区域的导热系数。
进一步，所述第二区域为金属条带。
进一步，所述导热件上设置有镂空部，所述镂空部暴露出所述壳体的外侧壁。
进一步，所述镂空部由多个沿所述壳体圆周方向间隔设置的开口组成，所述开口贯穿所述导热件。
进一步，所述开口的直径为5～10厘米。
进一步，相邻的所述开口之间的间距为2～3厘米。
进一步，所述导热件的厚度为0.2～0.3厘米。
本申请的优点在于，利用导热件在壳体与外部装置之间建立导热通道，使得热传导速率加快，进而能够快速地将所述反应腔内的热量的释放，平衡反应腔内的温度。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对本申请实施例中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下， 还可以根据这些附图获得其他的附图。
图1是现有技术中经连续制程后腔室内部热量流动示意图；
图2是本申请用于半导体工艺的腔室的第一实施例的截面示意图；
图3是本申请用于半导体工艺的腔室的第一实施例的导热件的立体结构示意图；
图4是本申请第一实施例的腔室经连续制程后反应腔内热量流动示意图；
图5是本申请用于半导体工艺的腔室的第二实施例的导热件的立体示意图；
图6是本申请用于半导体工艺的腔室的第三实施例的导热件的立体示意图；
图7是本申请用于半导体工艺的腔室的第四实施例的导热件的立体示意图；
图8A为现有技术的腔室经过连续制程后的温度分布；
图8B是本申请第四实施例的腔室经过连续制程后的温度分布；
图9是晶圆上膜层均匀度U％的趋势图。
具体实施方式
为了使本申请的目的、技术手段及其效果更加清楚明确，以下将结合附图对本申请作进一步地阐述。应当理解，此处所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例，并不用于限定本申请。基于本申请中的实施例，本领域技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
所述腔室可用于物理气相沉积(PVD，Physical Vapor Deposition)工艺中。例如，所述腔室为电感耦合等离子体(ICP)的腔体。
在连续进行多个制程的情况下，腔室内的等离子体不会中断，其会持续加热腔室，则会使得腔室的温度变化始终为升高的趋势，导致腔室的温度不能满足后续制程的要求。申请人研究发现，造成上述情况的原因在于，腔室内的热量无法及时散出，热量堆积使得温度持续升高。具体地说，请参阅图1，其为现有技术中连续经过多个制程后腔室内部热量流动示意图，随着半导体制程的进行，腔室10内的热量(如图1中箭头所示)大部分只能在腔室内循环流动，而无法被有效释放，腔室内的热量堆积越来越多，这导致沉积腔室10内的温度升高，使得腔室10的温度高于后续半导体制程所需温度，进而影响后续半导体工艺的品质。
鉴于上述原因，申请人提供一种应用于半导体工艺的腔室，其能够加快腔室内的热量的释放，从而避免腔室内的温度持续升高，为后续制程提供良好的温度基础。
请参阅图2，其为本申请应用于半导体工艺的腔室的第一实施例的截面示意图，所述腔室2包括壳体21。所述壳体21闭合形成反应腔22。所述反应腔22作为半导体工艺的反应腔室。所述壳体21底部具有开口23，半导体工艺常规的装置(例如加热盘)通过所述开口23暴露于所述反应腔22。
在本实施例中，所述壳体21包括相对设置的上壳体21A及下壳体21B，所述上壳体21A与所述下壳体21B闭合形成所述反应腔22。在所述下壳体21B底部具有开口23，半导体工艺常规的装置(例如加热盘)通过所述开口23暴露于所述反应腔22。
在所述壳体21的外侧壁设置有导热件24。请参阅图3，其为所述导热件24的立体结构示意图，所述导热件24具有相对设置的第一表面241及第二表面242，所述第一表面241与所述壳体21的外侧壁接触，所述第二表面242 用于与外部装置(附图中未绘示)接触。所述导热件24在所述壳体21及所述外部装置之间形成导热通道，所述反应腔22内的热量通过所述壳体21、导热件24传导至外部装置，进而实现所述腔室2的散热。所述壳体21与所述外部装置之间并不接触，两者之间为真空或者空气，热传导慢，所述腔室2的热量不能充分释放，导致所述反应腔22内的热量积累，进而使所述反应腔22内温度变化较大。而本申请利用导热件24在两者之间建立导热通道，热传导速率加快，进而能够快速地将所述反应腔22内的热量的释放，平衡所述反应腔22内的温度。
进一步，所述导热件24的导热系数大于与所述导热件24接触的壳体区域的导热系数，从而能够避免所述导热件24影响热量的传输，进一步加快热传导速率。
在本实施例中，所述导热件24环绕所述壳体21外侧壁一周，以在所述壳体21的一周均建立导热通道，进一步加速热传导速率，使得所述反应腔22内的热量被充分释放，避免热量堆积。
进一步，申请人发现，所述反应腔22下部热量积累较多，不易释放，因此，在本实施例中，所述导热件24设置在所述下壳体21B的外侧壁，所述导热件24环绕所述下壳体21B的外侧壁一周，以加快所述反应腔22下部的热量的释放。其中，所述导热件24的导热系数可大于所述下壳体21B的导热系数。
进一步，在第一实施例中，所述导热件24的厚度为0.2～0.3厘米，以使其恰好能够设置在所述下壳体21B与所述外部装置之间，并与两者接触，形成导热通道。
图4是本申请第一实施例的腔室经连续制程后反应腔内热量流动示意图，从图4可以看出，反应腔22内的热量经下壳体21B及导热件24形成的导热通 道传导至外部装置，从而加快了热量传导速率。
为了进一步增加所述导热件24的导热性能，本申请还提供第二实施例。请参阅图5，其为本申请用于半导体工艺的腔室的第二实施例的导热件的立体示意图，所述导热件24包括第一区域24A及第二区域24B，所述第一区域24A的导热系数小于所述第二区域24B的导热系数。其中，所述第一区域24A及所述第二区域24B可均为环绕所述壳体外侧壁的环带。进一步，在本实施例中，所述第一区域24A分设在所述第二区域24B的两侧。
在第二实施例中，根据所述壳体21不同区域导热性能的不同，或者所述反应腔22不同区域热量积累的不同设置所述第二区域24B的位置。例如，在距离所述壳体21底部3厘米的位置，所述反应腔22热量积累较多，则将所述第二区域24B设置在与该区域对应，以加强该区域的热传导。
所述第二区域24B为金属条带。具体地说，在本第二实施例中，所述第二区域24B为金属铜带。
申请人发现，在所述反应腔22内，不同区域的热量积累不同，有些区域热量积累较多，有些区域热量积累较少，若是在全部区域均采用导热件24形成导热通道，则不同区域的导热量相同，其会导致热量积累较少的区域剩余热量小于热量积累较多的区域剩余的热量，反应腔22内热量分布不均匀，也会影响反应腔22内的温度。因此，本申请用于半导体工艺的腔室还提供第三实施例。请参阅图6，其为本申请用于半导体工艺的腔室的第三实施例的导热件的立体示意图，所述第三实施例与所述第一实施例的区别在于，所述导热件24上设置有镂空部25，所述镂空部25暴露出所述壳体21的外侧壁。
在第三实施例中，所述镂空部25由多个沿所述壳体圆周方向间隔设置的开口251组成，所述开口251贯穿所述导热件24。在本申请其他实施例中，所 述镂空部25也可为其他形式，例如沿所述壳体圆周方向延伸的带状或波浪状结构等。
在第三实施例中，根据所述反应腔22不同区域热量积累的不同设置所述镂空部25的位置。例如，在距离所述壳体21顶部3厘米的位置，所述反应腔22热量积累较少，则将所述镂空部25设置为与该区域对应，以减少该区域的热传导，进而平衡反应腔22内的热量分布，避免反应腔22内发生较大的温度变化。
进一步，在第三实施例中，所述开口251的直径为5～10厘米，相邻的所述开口251之间的间距为2～3厘米，其能够进一步降低所述镂空部25对应区域的热传导，以进一步平衡所述反应腔22内的热量分布。
为了进一步平衡所述反应腔22内的热量分布，本申请还提供第四实施例。请参阅图7，其为本申请用于半导体工艺的腔室的第四实施例的导热件的立体示意图，相较于第三实施例，在所述第四实施例中，所述导热件24包括第一区域24A及第二区域24B，所述第一区域24A的导热系数小于所述第二区域24B的导热系数。其中，所述第一区域24A及所述第二区域24B可均为环绕所述壳体外侧壁的环带。进一步，在本实施例中，所述第一区域24A分设在所述第二区域24B的两侧。
在第四实施例中，根据所述壳体21不同区域导热性能的不同，或者所述反应腔22不同区域热量积累的不同设置所述第二区域24B的位置。例如，在距离所述壳体21底部3厘米的位置，所述反应腔22热量积累较多，则将所述第二区域24B设置在与该区域对应，以加强该区域的热传导。所述第二区域24B为金属条带。具体地说，在本第四实施例中，所述第二区域24B为金属铜带。
本申请用于半导体工艺的腔室能够平衡所述反应腔内的热量分布，避免反应腔内的温度发生较大的起伏。图8A为现有技术的腔室经过连续制程后的温度分布，图8B是本申请第四实施例的腔室经过连续制程后的温度分布，从图8A及图8B可以看出，在经过连续制程后，现有技术的腔室温度起伏较大，其会大大影响芯片上的薄膜的品质，而本申请腔室的温度变化不大，基本保持同一温度，其不会影响芯片上的薄膜的品质。
图9是晶圆上膜层均匀度U％的趋势图，其中A区域为采用现有技术的腔室获得的晶圆上膜层均匀度U％的趋势图，B区域为采用本申请腔室获得的晶圆上膜层均匀度U％的趋势图，请参阅图9，采用现有技术的腔室获得的晶圆上膜层均匀度U％为4.6％上下，而采用本申请腔室获得的晶圆上膜层均匀度U％为3.6％上下，平均约改善1.03％以上。
以上所述仅是本申请的实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (12)

  1. 一种应用于半导体工艺的腔室，其中，包括壳体，所述壳体闭合形成反应腔，在所述壳体的外侧壁设置有导热件，所述导热件具有相对设置的第一表面及第二表面，所述第一表面与所述壳体的外侧壁接触，所述第二表面用于与外部装置接触，以在所述壳体及所述外部装置之间形成导热通道。
  2. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述导热件的导热系数大于与所述导热件接触的壳体区域的导热系数。
  3. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述壳体包括上壳体及下壳体，所述上壳体与所述下壳体闭合形成所述反应腔。
  4. 根据权利要求3所述的应用于半导体工艺的腔室，其中，所述导热件设置在所述下壳体的外侧壁。
  5. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述导热件环绕所述壳体外侧壁一周。
  6. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述导热件包括第一区域及第二区域，所述第一区域的导热系数小于所述第二区域的导热系数。
  7. 根据权利要求6所述的应用于半导体工艺的腔室，其中，所述第二区域为金属条带。
  8. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述导热件上设置有镂空部，所述镂空部暴露出所述壳体的外侧壁。
  9. 根据权利要求8所述的应用于半导体工艺的腔室，其中，所述镂空部由多个沿所述壳体圆周方向间隔设置的开口组成，所述开口贯穿所述导热件。
  10. 根据权利要求9所述的应用于半导体工艺的腔室，其中，所述开口的直径为5～10厘米。
  11. 根据权利要求9所述的应用于半导体工艺的腔室，其中，相邻的所述开口之间的间距为2～3厘米。
  12. 根据权利要求1所述的应用于半导体工艺的腔室，其中，所述导热件的厚度为0.2～0.3厘米。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383266A (zh) * 2007-09-03 2009-03-11 北京北方微电子基地设备工艺研究中心有限责任公司 反应腔室
US20140256129A1 (en) * 2013-03-11 2014-09-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor film deposition apparatus and method with improved heater cooling efficiency
US20160172220A1 (en) * 2014-12-10 2016-06-16 National Chung Shan Institute Of Science And Technology Selenization process apparatus for glass substrate
CN106783490A (zh) * 2015-11-23 2017-05-31 北京北方微电子基地设备工艺研究中心有限责任公司 内衬接地组件、反应腔室及半导体加工设备
CN207503996U (zh) * 2017-11-30 2018-06-15 米亚索乐装备集成（福建）有限公司 柔性光伏组件层压托板

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09171967A (ja) * 1995-12-20 1997-06-30 Toshiba Corp 半導体製造装置
JP2001023890A (ja) * 1999-07-09 2001-01-26 Canon Inc 露光装置およびこれを用いたデバイス製造方法
JP2004319858A (ja) * 2003-04-18 2004-11-11 Thermodigm Llc 均一な温度の加工物ホルダ
JP2005150606A (ja) * 2003-11-19 2005-06-09 Hitachi High-Technologies Corp プラズマ処理装置
JP4409373B2 (ja) * 2004-06-29 2010-02-03 日本碍子株式会社 基板載置装置及び基板温度調整方法
CN201396621Y (zh) * 2009-05-25 2010-02-03 福建蓝蓝高科技发展有限公司 一种大功率led光源结构
CN102925873A (zh) * 2011-08-09 2013-02-13 北京北方微电子基地设备工艺研究中心有限责任公司 反应腔室控温装置及应用该控温装置的半导体处理设备
TWI628689B (zh) * 2013-05-09 2018-07-01 瑪森科技公司 用於保護電漿處理系統中之真空密封的系統與方法
US9453688B2 (en) * 2013-09-24 2016-09-27 Asia Vital Components Co., Ltd. Heat dissipation unit
US20150132486A1 (en) * 2013-11-12 2015-05-14 Chung-Shan Institute of Science and Technology, Armaments Bureau, Ministry of National Defence Vapor deposition apparatus and method using the same
TWI512259B (zh) * 2013-12-17 2015-12-11 Quanta Comp Inc 散熱組件的製造方法
CN104934345B (zh) * 2014-03-21 2018-05-08 北京北方华创微电子装备有限公司 一种等离子体装置
CN109309035A (zh) * 2018-11-08 2019-02-05 德淮半导体有限公司 半导体工艺腔室及其形成方法、半导体工艺装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383266A (zh) * 2007-09-03 2009-03-11 北京北方微电子基地设备工艺研究中心有限责任公司 反应腔室
US20140256129A1 (en) * 2013-03-11 2014-09-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor film deposition apparatus and method with improved heater cooling efficiency
US20160172220A1 (en) * 2014-12-10 2016-06-16 National Chung Shan Institute Of Science And Technology Selenization process apparatus for glass substrate
CN106783490A (zh) * 2015-11-23 2017-05-31 北京北方微电子基地设备工艺研究中心有限责任公司 内衬接地组件、反应腔室及半导体加工设备
CN207503996U (zh) * 2017-11-30 2018-06-15 米亚索乐装备集成（福建）有限公司 柔性光伏组件层压托板

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