WO2021189573A1

WO2021189573A1 - Array substrate and display panel

Info

Publication number: WO2021189573A1
Application number: PCT/CN2020/085906
Authority: WO
Inventors: 方少茂; 金一坤; 赵斌; 张鑫; 赵军
Original assignee: 深圳市华星光电半导体显示技术有限公司
Priority date: 2020-03-22
Filing date: 2020-04-21
Publication date: 2021-09-30
Also published as: US20220121075A1; CN111090204A; US11415853B2; CN211669479U

Abstract

An array substrate (100) and a display panel (1000). In the array substrate (100), a first data line (121) is electrically connected to a blue pixel electrode (141); a second data line (122) is electrically connected to a non-blue pixel electrode; a first horizontal distance (D1) exists between the blue pixel electrode (141) and the first data line (121) electrically connected thereto, and a second horizontal distance (D2) exists both between the non-blue pixel electrode and the data line (12) adjacent thereto and between the blue pixel electrode (141) and the adjacent second data line (122). The first horizontal distance (D1) is greater than the second horizontal distance (D2).

Description

Array substrate and display panel

Technical field

The present application relates to the field of display technology, in particular to an array substrate and a display panel.

Background technique

In the existing 1Gate 1Data (the same row of sub-pixels are connected to the same scan line, the same column of sub-pixels are connected to the same data line) architecture 8K (resolution 7680*4320) display panel, the limited space makes the data lines and pixels The distance between the electrodes is very close, resulting in a larger coupling capacitance between the data line and the pixel electrode. While the panel needs to turn on the white balance during the debugging phase, most of the blue pixels need to be chopped. Therefore, when the white frame on the gray background is displayed, it will cause the asymmetry of the coupling between the left and right data lines and cause vertical crosstalk. The data line and the pixel electrode The larger the capacitance, the more serious the impact.

technical problem

The embodiments of the present application provide an array substrate and a display panel to solve the technical problem of vertical crosstalk caused by the asymmetry of the coupling between the left and right data lines when the blue pixels are chopped during the white balance adjustment stage of the existing display panel.

Technical solutions

An embodiment of the present application provides an array substrate, which includes:

Base

A plurality of data lines, the plurality of data lines are disposed on the substrate, the plurality of data lines include a first data line and a second data line; and

A plurality of pixel electrodes, the plurality of pixel electrodes are arranged on the plurality of data lines, the data lines and the pixel electrodes are alternately arranged, and the plurality of pixel electrodes include blue pixel electrodes and non-blue pixel electrodes ；

The first data line is electrically connected to the blue pixel electrode; the second data line is electrically connected to the non-blue pixel electrode;

There is a first horizontal distance between the blue pixel electrode and the first data line that is electrically connected, between the non-blue pixel electrode and its adjacent data line, and between the blue pixel electrode and the adjacent data line. There is a second horizontal distance between the second data lines; the first horizontal distance is greater than the second horizontal distance;

The non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further includes a third data line, and the second data line is electrically connected to one of the red pixel electrode or the green pixel electrode , The third data line is electrically connected to the other of the green pixel electrode or the red pixel electrode;

The distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer.

In the array substrate of the embodiment of the present application, the material of the data line is one of metal, metal alloy or metal oxide.

In the array substrate of the embodiment of the present application, the array substrate further includes an interlayer dielectric layer, and the interlayer dielectric layer is disposed between the plurality of data lines and the plurality of pixel electrodes.

An embodiment of the present application also provides an array substrate, which includes:

Base

There is a first horizontal distance between the blue pixel electrode and the first data line that is electrically connected, between the non-blue pixel electrode and its adjacent data line, and between the blue pixel electrode and the adjacent data line. There is a second horizontal distance between the second data lines; the first horizontal distance is greater than the second horizontal distance.

In the array substrate of the embodiment of the present application, the non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further include a third data line, and the second data line is electrically connected to the One of the red pixel electrode or the green pixel electrode, and the third data line is electrically connected to the other one of the green pixel electrode or the red pixel electrode.

In the array substrate of the embodiment of the present application, the distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer.

The present application also relates to a display panel, including an array substrate, a color filter substrate, and liquid crystals arranged between the array substrate and the color filter substrate, the array substrate including:

Base

In the display panel of the embodiment of the present application, the non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further include a third data line, and the second data line is electrically connected to the One of the red pixel electrode or the green pixel electrode, and the third data line is electrically connected to the other one of the green pixel electrode or the red pixel electrode.

In the display panel of the embodiment of the present application, the distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer.

In the display panel of the embodiment of the present application, the material of the data line is one of metal, metal alloy or metal oxide.

In the display panel of the embodiment of the present application, the array substrate further includes an interlayer dielectric layer, and the interlayer dielectric layer is disposed between the plurality of data lines and the plurality of pixel electrodes.

Beneficial effect

In the array substrate and display panel of the present application, the first horizontal distance between the blue pixel electrode corresponding to the blue pixel and the first data line electrically connected to itself is set to be greater than the first horizontal distance between the non-blue pixel electrode and the adjacent data line. Two horizontal distances; when the pixel is on the initial side of the scan, assuming that the blue pixel is in the positive frame, the voltage of the blue pixel will be brightened by its first data line coupling, and will be coupled by the second data line (negative frame) Brighter, the blue pixel is farther away from its first data line, the capacitance is smaller, and the coupling is proportional to the capacitance, so the brightness of its blue pixel is reduced, and the white balance itself will reduce the first data of the blue pixel itself. The voltage of the line reduces its brightness to adjust the color temperature. Therefore, the present application reduces the blue brightness without changing the voltage of the first data line of the blue pixel itself, and ensures that the voltages of all data lines are consistent, which not only achieves the effect of self-white balance, but also does not cause vertical crosstalk due to inconsistent voltages of the data lines.

Description of the drawings

In order to explain the embodiments of the present application or the technical solutions in the prior art more clearly, the following briefly introduces the drawings that need to be used in the embodiments. The drawings in the following description are only part of the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

FIG. 1 is a schematic top view of the structure of an array substrate according to an embodiment of the application;

2 is a schematic diagram of a cross-sectional structure of an array substrate according to an embodiment of the application;

FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the application.

Embodiments of the present invention

The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative work shall fall within the protection scope of this application.

In the description of this application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " "Back", "Left", "Right", "Vertical", "Horizontal", "Top", "Bottom", "Inner", "Outer", "Clockwise", "Counterclockwise" and other directions or The positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, Therefore, it cannot be understood as a restriction on this application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present application, "multiple" means two or more than two, unless otherwise specifically defined.

In the description of this application, it should be noted that the terms "installation", "connection", and "connection" should be understood in a broad sense, unless otherwise clearly specified and limited. For example, it can be a fixed connection or a detachable connection. Connected or integrally connected; it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two components or the interaction of two components relation. For those of ordinary skill in the art, the specific meanings of the above-mentioned terms in this application can be understood according to specific circumstances.

In this application, unless expressly stipulated and defined otherwise, the "above" or "below" of the first feature of the second feature may include direct contact between the first and second features, or may include the first and second features Not in direct contact but through other features between them. Moreover, the "above", "above" and "above" of the first feature on the second feature include the first feature directly above and obliquely above the second feature, or it simply means that the first feature is higher in level than the second feature. The “below”, “below” and “below” of the second feature of the first feature include the first feature directly below and obliquely below the second feature, or it simply means that the level of the first feature is smaller than the second feature.

The following disclosure provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples, and are not intended to limit the application. In addition, the present application may repeat reference numerals and/or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and/or settings discussed. In addition, this application provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and/or the use of other materials.

Please refer to FIGS. 1 and 2. FIG. 1 is a schematic diagram of a top view of an array substrate according to an embodiment of the application; FIG. 2 is a schematic diagram of a cross-sectional structure of an array substrate according to an embodiment of the application.

An embodiment of the present application provides an array substrate 100, which includes a substrate 11, a plurality of data lines 12, an interlayer dielectric layer 13, and a pixel electrode 14 arranged in sequence.

Specifically, the base 11 may be a substrate, such as a glass substrate, a plastic substrate, or a device board composed of a substrate, a thin film transistor, a scanning line, an insulating layer, and the like. A plurality of data lines 12 are disposed on the substrate 11, and the plurality of data lines 12 include a first data line 121 and a second data line 122. The plurality of pixel electrodes 14 are provided on the plurality of data lines 12. The data lines 12 and the pixel electrodes 14 are alternately arranged. The plurality of pixel electrodes 14 include blue pixel electrodes 141 and non-blue pixel electrodes.

The non-blue pixel electrode is the red pixel electrode 142 or the green pixel electrode 143. The plurality of data lines 12 further includes a plurality of third data lines 123. The second data line 122 is electrically connected to one of the red pixel electrode 142 or the green pixel electrode 143, and the third data line 123 is electrically connected to the green pixel electrode. 143 or the other of the red pixel electrode 142. That is, when the second data line 122 is electrically connected to the red pixel electrode 142, the third data line 123 is electrically connected to the green pixel electrode 143.

The first data line 121 is electrically connected to the blue pixel electrode 141. There is a first horizontal distance D1 between the blue pixel electrode 141 and the first data line 121 electrically connected to it. There is a second horizontal distance D2 between the non-blue pixel electrode and its adjacent data line 12. There is also a second horizontal distance D2 between the blue pixel electrode 141 and the adjacent second data line 121. The first horizontal distance D1 is greater than the second horizontal distance D2.

Among them, in the first embodiment, there are three situations in which there is a second horizontal distance D2 between the non-blue pixel electrode and its adjacent data line 12, namely: the non-blue pixel electrode and the adjacent first data line 12 There is a second horizontal distance D2 between the lines 121, a second horizontal distance D2 between the non-blue pixel electrode and the adjacent second data line 122, and between the non-blue pixel electrode and the adjacent third data line 123 There is a second horizontal distance D2.

In addition, capacitive coupling means that under the premise that there is no power exchange, the voltage at one end changes, and the voltage at the other end increases accordingly. The increased voltage is proportional to the capacitance of the two.

In the array substrate 100 of the first embodiment of the present application, the first horizontal distance D1 between the blue pixel electrode 141 corresponding to the blue pixel and the first data line 121 electrically connected to itself is set to be greater than the non-blue pixel electrode and the adjacent The second horizontal distance D2 of the data line 12. With this arrangement, when the pixel is on the initial side of the scan, assuming that the blue pixel is in the positive frame, the voltage of the blue pixel electrode 141 will be coupled to brighter by its own first data line 121, and will be coupled by the second data line 122 (negative frame). Brighter, the blue pixel electrode 141 is farther away from its first data line 121, the capacitance is smaller, and the coupling is proportional to the capacitance, so the brightness of its blue pixel is reduced, and the white balance itself will reduce the blue pixel electrode 141 The voltage of its own first data line 121 reduces its brightness to adjust the color temperature.

Therefore, the design of the present application to reduce the blue brightness does not need to change the voltage of the first data line 121 of the blue pixel electrode 141 itself, and ensures that the voltages of all the data lines 12 are consistent. Inconsistent voltages cause vertical crosstalk.

Optionally, the distance difference between the first horizontal distance D1 and the second horizontal distance D2 is between 0.1 micrometer (including 0.1 micrometer) and 1 micrometer (including 1 micrometer). Further, the distance difference between the first horizontal distance D1 and the second horizontal distance D2 is one of 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, and 0.9 micrometers.

Optionally, the material of the data line 12 is one or a combination of metal, metal alloy, or metal oxide. Further, the data line 12 has a multi-layer structure. Specifically, the data line 12 includes a metal layer and a metal alloy layer arranged in sequence, wherein the activity of the metal alloy layer is greater than that of the metal layer. When the data line 12 is subjected to wet etching, It is ensured that the etching speed of the metal alloy layer is greater than the etching speed of the metal layer, thereby avoiding the undercut phenomenon of the data line 12.

In the array substrate 100 of the embodiment of the present application, the area of the side of the first data line 121 facing the pixel electrode 14 is smaller than the area of the side of the second data line 122 facing the pixel electrode 14. Such an arrangement further reduces the capacitance value between the blue pixel electrode 141 and the first data line 121.

3, this application also relates to a display panel 1000, including an array substrate 100, a color filter substrate 200, and a liquid crystal 300 disposed between the array substrate 100 and the color filter substrate 200, the array substrate 100 includes:

Base

A plurality of data lines, the plurality of data lines are disposed on the substrate, and the plurality of data lines include a first data line; and

The first data line is electrically connected to the blue pixel electrode; there is a first horizontal distance between the blue pixel electrode and the first data line to which it is electrically connected, and the non-blue pixel electrode is adjacent to it. There is a second horizontal distance between the data lines; the first horizontal distance is greater than the second horizontal distance.

The structure of the array substrate of the display panel in the embodiment of the present application is the same or similar to the structure of the array substrate 100 of the foregoing embodiment, and will not be repeated here.

The above describes in detail an array substrate and a display panel provided by the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementations of the present application. The descriptions of the above embodiments are only used to help understand the present application. The technical solutions and their core ideas; those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or equivalently replace some of the technical features; and these modifications or replacements, and The essence of the corresponding technical solutions is not deviated from the scope of the technical solutions of the embodiments of the present application.

Claims

An array substrate, which includes:

Base

A plurality of data lines, the plurality of data lines are disposed on the substrate, the plurality of data lines include a first data line and a second data line; and

A plurality of pixel electrodes, the plurality of pixel electrodes are arranged on the plurality of data lines, the data lines and the pixel electrodes are alternately arranged, and the plurality of pixel electrodes include blue pixel electrodes and non-blue pixel electrodes ；

The first data line is electrically connected to the blue pixel electrode; the second data line is electrically connected to the non-blue pixel electrode;

There is a first horizontal distance between the blue pixel electrode and the first data line that is electrically connected, between the non-blue pixel electrode and its adjacent data line, and between the blue pixel electrode and the adjacent data line. There is a second horizontal distance between the second data lines; the first horizontal distance is greater than the second horizontal distance;

The distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer;

The non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further includes a third data line, and the second data line is electrically connected to one of the red pixel electrode or the green pixel electrode , The third data line is electrically connected to the other of the green pixel electrode or the red pixel electrode.
The array substrate according to claim 1, wherein the material of the data line is one of metal, metal alloy or metal oxide.
The array substrate according to claim 1, wherein the array substrate further comprises an interlayer dielectric layer, the interlayer dielectric layer being disposed between the plurality of data lines and the plurality of pixel electrodes.
An array substrate, which includes:

Base

A plurality of data lines, the plurality of data lines are disposed on the substrate, the plurality of data lines include a first data line and a second data line; and

A plurality of pixel electrodes, the plurality of pixel electrodes are arranged on the plurality of data lines, the data lines and the pixel electrodes are alternately arranged, and the plurality of pixel electrodes include blue pixel electrodes and non-blue pixel electrodes ；

The first data line is electrically connected to the blue pixel electrode; the second data line is electrically connected to the non-blue pixel electrode;

There is a first horizontal distance between the blue pixel electrode and the first data line that is electrically connected, between the non-blue pixel electrode and its adjacent data line, and between the blue pixel electrode and the adjacent data line. There is a second horizontal distance between the second data lines; the first horizontal distance is greater than the second horizontal distance.
4. The array substrate of claim 4, wherein the distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer.
The array substrate according to claim 4, wherein the non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further include a third data line, and the second data line is electrically connected to the One of the red pixel electrode or the green pixel electrode, and the third data line is electrically connected to the other one of the green pixel electrode or the red pixel electrode.
4. The array substrate according to claim 4, wherein the material of the data line is one of metal, metal alloy or metal oxide.
4. The array substrate according to claim 4, wherein the array substrate further comprises an interlayer dielectric layer disposed between the plurality of data lines and the plurality of pixel electrodes.
A display panel includes an array substrate, a color filter substrate, and liquid crystals arranged between the array substrate and the color filter substrate, the array substrate including:

Base

A plurality of data lines, the plurality of data lines are disposed on the substrate, the plurality of data lines include a first data line and a second data line; and

A plurality of pixel electrodes, the plurality of pixel electrodes are arranged on the plurality of data lines, the data lines and the pixel electrodes are alternately arranged, and the plurality of pixel electrodes include blue pixel electrodes and non-blue pixel electrodes ；

The first data line is electrically connected to the blue pixel electrode; the second data line is electrically connected to the non-blue pixel electrode;

There is a first horizontal distance between the blue pixel electrode and the first data line that is electrically connected, between the non-blue pixel electrode and its adjacent data line, and between the blue pixel electrode and the adjacent data line. There is a second horizontal distance between the second data lines; the first horizontal distance is greater than the second horizontal distance.
9. The display panel of claim 9, wherein the distance difference between the first horizontal distance and the second horizontal distance is between 0.1 micrometer and 1 micrometer.
The display panel according to claim 9, wherein the non-blue pixel electrode is a red pixel electrode or a green pixel electrode; the plurality of data lines further comprises a third data line, and the second data line is electrically connected to the One of the red pixel electrode or the green pixel electrode, and the third data line is electrically connected to the other one of the green pixel electrode or the red pixel electrode.
9. The display panel of claim 9, wherein the material of the data line is one of metal, metal alloy, or metal oxide.
9. The display panel of claim 9, wherein the array substrate further comprises an interlayer dielectric layer disposed between the plurality of data lines and the plurality of pixel electrodes.