CN213581686U - Pixel structure, array substrate and liquid crystal display panel - Google Patents
Pixel structure, array substrate and liquid crystal display panel Download PDFInfo
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- CN213581686U CN213581686U CN202121152609.2U CN202121152609U CN213581686U CN 213581686 U CN213581686 U CN 213581686U CN 202121152609 U CN202121152609 U CN 202121152609U CN 213581686 U CN213581686 U CN 213581686U
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Abstract
The utility model discloses a pixel structure, array substrate and liquid crystal display panel, each pixel unit of this pixel structure include the pixel electrode and with at least one electric capacity compensation unit that the pixel electrode links to each other, each electric capacity compensation unit includes first electric capacity compensation portion and second electric capacity compensation portion, the overlapping area of first electric capacity compensation portion and first data line increases progressively along the skew direction of pixel electrode, the overlapping area of second electric capacity compensation portion and second data line decreases progressively along the skew direction of pixel electrode; or the overlapping area of the first capacitance compensation part and the first data line is decreased progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line is increased progressively along the offset direction of the pixel electrode. The utility model discloses the coupling capacitance difference that causes the left and right sides when the skew appears owing to the technology processing procedure factor of the capacitance compensation unit that the utilization was add effectively compensates the pixel electrode has improved the LCD panel and has crosstalked the colour cast phenomenon perpendicularly.
Description
Technical Field
The utility model relates to a show technical field, especially relate to a pixel structure, array substrate and liquid crystal display panel.
Background
The vertical crosstalk is a phenomenon that when a liquid crystal display panel displays a vertical picture, brightness abnormality and color cast are generated, wherein the main reason for the brightness abnormality is that the coupling capacitance between a pixel electrode and a data line is too large, so that the potential of the pixel electrode is influenced by a data signal to generate brightness change. The main reason for color shift is that the coupling capacitances of the sub-pixels of the respective colors are not uniform, for example, when the coupling capacitance of the G pixel is large, the partial region is shifted to green and the partial region is shifted to red.
With the higher resolution of the panel, the smaller and smaller pixel size, the liquid crystal display panel is prone to cause the pixel electrodes to shift due to process deviation, which leads to the increasing of the coupling difference between the data lines and the pixel electrodes on the left and right sides, thus aggravating the inconsistency of the coupling capacitance of the sub-pixels of each color, leading to the more prominent phenomenon of vertical crosstalk color shift, and affecting the picture display effect and the product yield.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a pixel structure, array substrate and liquid crystal display panel to solve current liquid crystal display panel and cause the pixel electrode to take place the skew because of process deviation easily, lead to the coupling difference continuous increase of the pixel electrode of data line and the left and right sides, lead to appearing the colour cast technical problem of vertical crosstalk.
In order to solve the above problem, the utility model provides a technical scheme as follows:
the utility model provides a pixel structure, which comprises a substrate, a plurality of grid lines and a plurality of data lines, wherein the grid lines and the data lines define a plurality of pixel units;
each pixel unit comprises at least one capacitance compensation unit, wherein the pixel electrode is connected with the pixel electrode, each capacitance compensation unit comprises a first capacitance compensation part and a second capacitance compensation part, the first capacitance compensation part is partially overlapped with the adjacent first data line, and the second capacitance compensation part is partially overlapped with the adjacent second data line;
the overlapping area of the first capacitance compensation part and the first data line increases progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line decreases progressively along the offset direction of the pixel electrode; or, an overlapping area of the first capacitance compensation portion and the first data line decreases in the shift direction of the pixel electrode, and an overlapping area of the second capacitance compensation portion and the second data line increases in the shift direction of the pixel electrode.
According to the utility model provides a pixel structure, the cross sectional area of first capacitance compensation portion is followed first data line orientation the direction of second data line is steadilyd decrease, the cross sectional area of second capacitance compensation portion is followed first data line orientation the direction of second data line increases progressively.
According to the utility model provides a pixel structure, first capacitance compensation portion with second capacitance compensation portion is in orthographic projection's on the base plate shape is trapezoidal or triangle-shaped.
According to the pixel structure provided by the present invention, when the pixel electrode has no offset, the overlapping area of the first capacitance compensation portion and the first data line is a, and the overlapping area of the second capacitance compensation portion and the second data line is B; wherein, a = B.
According to the pixel structure provided by the present invention, each capacitance compensation unit further includes a connection portion for connecting the first capacitance compensation portion, the second capacitance compensation portion and the pixel electrode; the pixel structure comprises a through hole for connecting the pixel electrode and the thin film transistor, and the connecting part passes through the through hole.
According to the utility model provides a pixel structure, pixel structure is including locating the first black matrix district of both sides about the pixel electrode, the gate line with the capacitance compensation unit is located first black matrix district.
According to the utility model provides a pixel structure, pixel structure is still including locating the second black matrix district of the pixel electrode left and right sides, the data line with the capacitance compensation unit is located the second black matrix district.
According to the utility model provides a pixel structure, it is same the pixel unit first capacitance compensation portion with second capacitance compensation portion is diagonal setting, and is a plurality of the pixel unit is a plurality of first capacitance compensation portion level sets up, and is a plurality of the pixel unit is a plurality of second capacitance compensation portion level sets up.
The utility model provides an array substrate, which comprises the pixel structure; and
and the driving circuit is arranged on the substrate and is connected with the pixel structure.
The utility model provides a liquid crystal display panel, which comprises the array substrate;
the color film substrate is arranged opposite to the array substrate; and
and the liquid crystal layer is arranged between the array substrate and the color film substrate.
The utility model has the advantages that: the utility model provides a pixel structure, array substrate and liquid crystal display panel, each the pixel unit include the pixel electrode and with at least one electric capacity compensation unit that the pixel electrode links to each other, each electric capacity compensation unit includes first electric capacity compensation portion and second electric capacity compensation portion, first electric capacity compensation portion overlaps with the first data line part of neighbouring, second electric capacity compensation portion overlaps with the second data line part of neighbouring; the overlapping area of the first capacitance compensation part and the first data line is increased progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line is decreased progressively along the offset direction of the pixel electrode; or the overlapping area of the first capacitance compensation part and the first data line is decreased progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line is increased progressively along the offset direction of the pixel electrode. The utility model discloses the coupling capacitance difference that causes the left and right sides when skew appears in the technology process factor can effectively compensate pixel electrode by the capacitance compensation unit who adds has improved the LCD panel and has crosstalked the colour cast phenomenon perpendicularly, is favorable to promoting LCD panel's production yield and display effect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic top view of a pixel structure according to an embodiment of the present invention;
FIG. 2 is a schematic top view of the pixel structure of FIG. 1 with the pixel electrode shifted to the right;
FIG. 3 is a schematic top view of the pixel structure of FIG. 1 with the pixel electrode shifted to the left;
fig. 4 is a schematic top view of another pixel structure according to an embodiment of the present invention;
fig. 5 is a schematic top view of another pixel structure according to an embodiment of the present invention.
Description of reference numerals:
10. a pixel structure; 11. a substrate; 12. a gate line; 13. a data line; 131. a first data line; 132. a second data line; 14. a pixel unit; 15. a pixel electrode; 151. a via hole; 16. a capacitance compensation unit; 161. a first capacitance compensation section; 162. a second capacitance compensation section; 163. a connecting portion; 17. a first black matrix region; 18. and a second black matrix region.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention. Furthermore, it is to be understood that the description herein of specific embodiments is for purposes of illustration and explanation only and is not intended to limit the present disclosure. In the present invention, unless otherwise specified, the use of directional terms such as "upper" and "lower" generally means upper and lower in the actual use or operation of the device, and specifically, the direction of the drawing in the drawings; while "inner" and "outer" are with respect to the outline of the device.
Referring to fig. 1, fig. 1 is a schematic top view of a pixel structure according to an embodiment of the present invention. The embodiment of the present invention provides a pixel structure 10, including substrate 11 and locating many gate lines 12 and many data lines 13 on substrate 11, many gate lines 12 and many data lines 13 define out a plurality of pixel units 14.
Each pixel unit 14 includes a pixel electrode 15 and at least one capacitance compensation unit 16 connected to the pixel electrode 15, each capacitance compensation unit 16 includes a first capacitance compensation portion 161 and a second capacitance compensation portion 162, the first capacitance compensation portion 161 partially overlaps the adjacent first data line 131, and the second capacitance compensation portion 162 partially overlaps the adjacent second data line 132. The overlapping area of the first capacitance compensation part 161 and the first data line 131 increases along the shifting direction of the pixel electrode 15, and the overlapping area of the second capacitance compensation part 162 and the second data line 132 decreases along the shifting direction of the pixel electrode 15; alternatively, the overlapping area of the first capacitance compensation part 161 and the first data line 131 decreases in the shifting direction of the pixel electrode 15, and the overlapping area of the second capacitance compensation part 162 and the second data line 132 increases in the shifting direction of the pixel electrode 15. By using the overlapping capacitance between the capacitance compensation unit 16 and the data line 13 to match the coupling capacitance difference generated by the shift of the pixel electrode 15, the coupling capacitance difference caused by the shift of the pixel electrode 15 is compensated, so that the color shift defect of vertical crosstalk can be effectively improved, and the production yield and the display effect of the liquid crystal display panel using the pixel structure 10 can be improved.
Specifically, the capacitance compensation unit 16 and the pixel electrode 15 are disposed on the same layer, and may be made of the same material and by the same process.
In the embodiment of the present invention, the first data line 131 and the second data line 132 are respectively located at the left and right sides of the pixel electrode 15, and it should be noted that the offset direction of the pixel electrode 15 may be left or right. The shift direction of the pixel electrode 15 is shifted to the left, that is, the pixel electrode 15 is shifted to the direction approaching the first data line 131, and the shift direction of the pixel electrode 15 is shifted to the right, that is, the pixel electrode 15 is shifted to the direction approaching the second data line 132.
In order to facilitate understanding, it is below right when the pixel electrode 15 is deviated along the above two deviation directions, in the embodiment of the present invention, the capacitance compensation unit 16 effectively compensates the coupling capacitance difference of the left and right sides when the deviation occurs due to the process factor of the pixel electrode 15, and the principle of improving the color deviation of the vertical crosstalk is briefly described.
It should be noted that, a plurality of capacitance compensation units 16 may be disposed in each of the pixel units 14, and for convenience of description, the embodiment of the present invention is described by taking one capacitance compensation unit 16 disposed in each of the pixel units 14 as an example.
With reference to fig. 1, the first capacitance compensation unit 161 and the second capacitance compensation unit 162 are symmetrically disposed, and when the pixel electrode 15 is not shifted, the distance d1 between the pixel electrode 15 and the first data line 131 is equal to the distance d2 between the pixel electrode 15 and the second data line 132, so that the coupling capacitance Cpd1 between the pixel electrode 15 and the first data line 131 is equal to the coupling capacitance Cpd2 between the pixel electrode 15 and the second data line 132. At this time, an overlapping area of the first capacitance compensation part 161 and the first data line 131 is a, and an overlapping area of the second capacitance compensation part 162 and the second data line 132 is B; wherein, a = B.
Referring to fig. 2, fig. 2 is a schematic top view illustrating a pixel electrode of the pixel structure shown in fig. 1 shifted to the right. When the pixel electrode 15 is shifted to the right, the distances between the pixel electrode 15 and the first data line 131 and the second data line 132 are changed, one is increased, and the other is decreased, at which time, the coupling capacitance Cpd1 between the pixel electrode 15 and the first data line 131 and the coupling capacitance Cpd2 between the pixel electrode 15 and the second data line 132 are different. Specifically, the distance d1 between the pixel electrode 15 and the first data line 131 increases, which results in a decrease in the coupling capacitance Cpd1 between the pixel electrode 15 and the first data line 131; the distance d2 between the pixel electrode 15 and the second data line 132 decreases, resulting in an increase in the coupling capacitance Cpd2 between the pixel electrode 15 and the second data line 132.
Since the pixel electrode 15 is connected to the capacitance compensation unit 16, the rightward shift of the pixel electrode 15 will drive the rightward shift of the capacitance compensation unit 16. At this time, the overlapping area of the first capacitance compensation part 161 and the first data line 131 increases in the shift direction of the pixel electrode 15, so that the overlapping capacitance of the first capacitance compensation part 161 and the first data line 131 increases, and thus it is possible to compensate for the amount of change in the decrease in the coupling capacitance Cpd1 due to the increase in the distance between the pixel electrode 15 and the first data line 131. Meanwhile, the overlapping area of the second capacitance compensation part 162 and the second data line 132 decreases in the shifting direction of the pixel electrode 15, so that the overlapping capacitance of the second capacitance compensation part 162 and the second data line 132 decreases, and thus, the amount of change in the increase of the coupling capacitance Cpd2 due to the decrease in the distance between the pixel electrode 15 and the second data line 132 can be compensated.
Similarly, referring to fig. 3, fig. 3 is a schematic top view illustrating the pixel structure of fig. 1 with the pixel electrode shifted to the left. When the pixel electrode 15 is shifted to the left, the distances between the pixel electrode 15 and the first data line 131 and the second data line 132 are changed, one is increased, and the other is decreased, so that the coupling capacitance Cpd1 between the pixel electrode 15 and the first data line 131 and the coupling capacitance Cpd2 between the pixel electrode 15 and the second data line 132 are different. Specifically, the distance d1 between the pixel electrode 15 and the first data line 131 is decreased, resulting in an increase in the coupling capacitance Cpd1 between the pixel electrode 15 and the first data line 131; the distance d2 between the pixel electrode 15 and the second data line 132 increases, resulting in a decrease in the coupling capacitance Cpd2 between the pixel electrode 15 and the second data line 132.
Since the pixel electrode 15 is connected to the capacitance compensation unit 16, the leftward shift of the pixel electrode 15 will drive the leftward shift of the capacitance compensation unit 16. At this time, the overlapping area of the first capacitance compensation part 161 and the first data line 131 decreases in the shift direction of the pixel electrode 15, so that the overlapping capacitance of the first capacitance compensation part 161 and the first data line 131 decreases, and thus the amount of change in the increase of the coupling capacitance Cpd1 due to the increase of the distance between the pixel electrode 15 and the first data line 131 can be compensated. Meanwhile, the overlapping area of the second capacitance compensation part 162 and the second data line 132 increases in the shift direction of the pixel electrode 15, so that the overlapping capacitance of the second capacitance compensation part 162 and the second data line 132 increases, and thus, the amount of change in the decrease in the coupling capacitance Cpd2 due to the decrease in the distance between the pixel electrode 15 and the second data line 132 can be compensated.
In the embodiment of the present invention, the cross-sectional area of the first capacitance compensation portion 161 decreases progressively along the direction of the first data line 131 toward the second data line 132, and the cross-sectional area of the second capacitance compensation portion 162 increases progressively along the direction of the first data line 131 toward the second data line 132.
Specifically, the shapes of orthographic projections of the first capacitance compensation part 161 and the second capacitance compensation part 162 on the substrate 11 are trapezoids or triangles, the trapezoids may be right-angled trapezoids or isosceles trapezoids, and the triangles may be right-angled triangles or equilateral triangles.
Generally, the sizes of the first capacitance compensation part 161 and the second capacitance compensation part 162 can be adjusted according to the actual process offset, for example, when the actual process offset is 2um, it is required to ensure that the size of the left and right boundaries of the first capacitance compensation part 161 exceeding the edge of the first data line 131 is greater than 2um, and the size of the left and right boundaries of the second capacitance compensation part 162 exceeding the edge of the second data line 132 is greater than 2um, so as to ensure that the coupling capacitance difference between the left and right sides is effectively compensated.
Specifically, in an actual manufacturing process, the first capacitance compensation part 161 and the second capacitance compensation part 162 may be designed by simulating a variation of coupling capacitance on the right side under a maximum offset, for example, if the pixel electrode 15 is offset to the right by 2um, the coupling capacitance between the pixel electrode 15 and the first data line 131 is reduced to δ C1, the overlapping capacitance between the first capacitance compensation part 161 and the first data line 131 is increased to δ C2, and δ C2 may be close to δ C1 and finally equal to δ C1 by adjusting a slope of a sloping side of the first capacitance compensation part 161. The pixel electrode 15 is shifted to the left similarly, and will not be described in detail here.
Further, each capacitance compensation unit 16 further includes a connection portion 163 for connecting the first capacitance compensation portion 161, the second capacitance compensation portion 162 and the pixel electrode 15. The first capacitance compensation part 161 and the second capacitance compensation part 162 may be connected to the pixel electrode 15 through one of the connection parts 163, and the first capacitance compensation part 161 and the second capacitance compensation part 162 may be adjacent to each other through one of the connection parts 163 and then connected to the pixel electrode 15 through the connection part 163.
In order to effectively improve the vertical crosstalk defect when not influencing the pixel light effect, the embodiment of the present invention is to provide that the capacitance compensation unit 16 corresponds to the black matrix region of the pixel structure 10.
In one embodiment, referring to fig. 1 to 3, the pixel structure 10 includes first black matrix regions 17 disposed on upper and lower sides of the pixel electrode 15, and the gate line 12 and the capacitance compensation unit 16 are disposed in the first black matrix regions 17. That is, the capacitance compensation unit 16 is located at the upper and lower sides of the pixel electrode 15, the area is wide, and the length of the capacitance compensation unit 16 can be set to be large. The pixel structure 10 includes a via hole 151 for connecting the pixel electrode 15 and a thin film transistor (not shown in the figure), the pixel electrode 15 is connected to the thin film transistor through the via hole 151 disposed in the first black matrix region 17, in an embodiment of the present invention, the connecting portion 163 may pass through the via hole 151 and the pixel electrode 15.
In an embodiment, please refer to fig. 4, wherein fig. 4 is a schematic top view of another pixel structure according to an embodiment of the present invention. The pixel structure 10 further includes second black matrix regions 18 disposed on left and right sides of the pixel electrode 15, and the data line and the capacitance compensation unit 16 are disposed in the second black matrix regions 18. That is, the capacitance compensation units 16 are located at the left and right sides of the pixel electrode 15, the area is narrow, the length of the capacitance compensation units 16 is small, and compensation requirements can be met by arranging multiple sets of capacitance compensation units 16. The connection part 163 may be directly connected to the pixel electrode 15.
Further, referring to fig. 5, fig. 5 is a schematic top view of another pixel structure according to an embodiment of the present invention. The pixel structure 10 includes a plurality of pixel units 14, the plurality of pixel units 14 may include a red pixel unit R, a green pixel unit G, and a blue pixel unit B, and the capacitance compensation unit 16 is disposed in each pixel unit 14. In order to effectively utilize the space, taking fig. 2 as an example, in the embodiment of the present invention, the first capacitance compensation portion 161 and the second capacitance compensation portion 162 of the same pixel unit 14 are diagonally arranged, and a plurality of the first capacitance compensation portions 161 and a plurality of the second capacitance compensation portions 162 of the pixel unit 14 are horizontally arranged. For example, the first and second capacitance compensation parts R1 and R2 of the red pixel cell R are diagonally disposed, the first and second capacitance compensation parts G1 and G2 of the green pixel cell G are diagonally disposed, the first and second capacitance compensation parts B1 and B2 of the blue pixel cell B are diagonally disposed, the first capacitance compensation part R1 of the red pixel cell R, the first capacitance compensation part G1 of the green pixel cell G, and the first capacitance compensation part B1 of the blue pixel cell B are horizontally disposed, and the second capacitance compensation part R2 of the red pixel cell R, the second capacitance compensation part G2 of the green pixel cell G, and the second capacitance compensation part B2 of the blue pixel cell B are horizontally disposed.
An embodiment of the present invention further provides an array substrate, the array substrate includes in the above-mentioned embodiment pixel structure 10 and drive circuit, drive circuit set up in on the base plate 11, drive circuit with pixel structure 10 links to each other. In the process of manufacturing the pixel electrode 15 of the pixel structure 10, the alignment precision of the pixel electrode 15 can be properly reduced, so that the manufacturing difficulty of the array substrate can be reduced, and the production yield of the array substrate can be improved.
The embodiment of the utility model provides a still provide a liquid crystal display panel, liquid crystal display panel includes in above-mentioned embodiment array substrate, various membrane base plate and liquid crystal layer, various membrane base plate with array substrate sets up relatively, the liquid crystal layer set up in array substrate with between the various membrane base plate. The liquid crystal display panel has all the features and advantages of the array substrate, and the description is omitted here. In general, the liquid crystal display panel has high display quality and high production yield.
The beneficial effects are that: the embodiment of the utility model provides a pixel structure, array substrate and liquid crystal display panel, each include the pixel electrode in the pixel unit and with at least one electric capacity compensation unit that the pixel electrode links to each other, each electric capacity compensation unit includes first electric capacity compensation portion and second electric capacity compensation portion, first electric capacity compensation portion overlaps with the first data line part of neighbouring, second electric capacity compensation portion overlaps with the second data line part of neighbouring; the overlapping area of the first capacitance compensation part and the first data line is increased progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line is decreased progressively along the offset direction of the pixel electrode; or the overlapping area of the first capacitance compensation part and the first data line is decreased progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line is increased progressively along the offset direction of the pixel electrode. The utility model discloses the coupling capacitance difference that causes the left and right sides when skew appears in the technology process factor can effectively compensate pixel electrode by the capacitance compensation unit who adds has improved the LCD panel and has crosstalked the colour cast phenomenon perpendicularly, is favorable to promoting LCD panel's production yield and display effect.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, so that the scope of the present invention shall be determined by the scope of the appended claims.
Claims (10)
1. A pixel structure is characterized by comprising a substrate, a plurality of gate lines and a plurality of data lines, wherein the gate lines and the data lines are arranged on the substrate and define a plurality of pixel units;
each pixel unit comprises a pixel electrode and at least one capacitance compensation unit connected with the pixel electrode, each capacitance compensation unit comprises a first capacitance compensation part and a second capacitance compensation part, the first capacitance compensation part is partially overlapped with the adjacent first data line, and the second capacitance compensation part is partially overlapped with the adjacent second data line;
the overlapping area of the first capacitance compensation part and the first data line increases progressively along the offset direction of the pixel electrode, and the overlapping area of the second capacitance compensation part and the second data line decreases progressively along the offset direction of the pixel electrode; or, an overlapping area of the first capacitance compensation portion and the first data line decreases in the shift direction of the pixel electrode, and an overlapping area of the second capacitance compensation portion and the second data line increases in the shift direction of the pixel electrode.
2. The pixel structure according to claim 1, wherein a cross-sectional area of the first capacitive compensation portion decreases in a direction along the first data line toward the second data line, and a cross-sectional area of the second capacitive compensation portion increases in a direction along the first data line toward the second data line.
3. The pixel structure according to claim 2, wherein orthographic projections of the first capacitance compensation portion and the second capacitance compensation portion on the substrate are trapezoidal or triangular in shape.
4. The pixel structure according to claim 1, wherein when the pixel electrode is not shifted, an overlapping area of the first capacitance compensation portion with the first data line is a, and an overlapping area of the second capacitance compensation portion with the second data line is B; wherein, a = B.
5. The pixel structure according to claim 1, wherein each capacitance compensation unit further comprises a connection portion for connecting the first capacitance compensation portion, the second capacitance compensation portion and the pixel electrode; the pixel structure comprises a through hole for connecting the pixel electrode and the thin film transistor, and the connecting part passes through the through hole.
6. The pixel structure of claim 1, wherein the pixel structure comprises a first black matrix region disposed on upper and lower sides of the pixel electrode, and the gate line and the capacitance compensation unit are disposed in the first black matrix region.
7. The pixel structure according to claim 1, further comprising a second black matrix region disposed on both left and right sides of the pixel electrode, wherein the data line and the capacitance compensation unit are disposed in the second black matrix region.
8. The pixel structure according to claim 1, wherein the first capacitance compensation portion and the second capacitance compensation portion of the same pixel unit are diagonally arranged, a plurality of the first capacitance compensation portions of a plurality of the pixel units are horizontally arranged, and a plurality of the second capacitance compensation portions of a plurality of the pixel units are horizontally arranged.
9. An array substrate comprising the pixel structure of any one of claims 1 to 8; and
and the driving circuit is arranged on the substrate and is connected with the pixel structure.
10. A liquid crystal display panel comprising the array substrate according to claim 9;
the color film substrate is arranged opposite to the array substrate; and
and the liquid crystal layer is arranged between the array substrate and the color film substrate.
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| CN202121152609.2U CN213581686U (en) | 2021-05-27 | 2021-05-27 | Pixel structure, array substrate and liquid crystal display panel |
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| CN202121152609.2U CN213581686U (en) | 2021-05-27 | 2021-05-27 | Pixel structure, array substrate and liquid crystal display panel |
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Effective date of registration: 20231108 Address after: 9-2 Tangming Avenue, Gongming street, Guangming New District, Shenzhen City, Guangdong Province Patentee after: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY Co.,Ltd. Address before: No. 338, Fangzhou Road, Suzhou Industrial Park, Suzhou, Jiangsu 215000 Patentee before: Suzhou Huaxing Optoelectronic Technology Co.,Ltd. |
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