WO2021174524A1

WO2021174524A1 - Overcurrent protection circuit of gallium nitride power device and method for improving response speed

Info

Publication number: WO2021174524A1
Application number: PCT/CN2020/078174
Authority: WO
Inventors: 陈敬; 徐涵; 唐高飞
Original assignee: 香港科技大学深圳研究院
Priority date: 2020-03-06
Filing date: 2020-03-06
Publication date: 2021-09-10

Abstract

The present invention relates to an overcurrent protection circuit of a gallium nitride power device and a method for improving a response speed. The overcurrent protection circuit based on an integrated gallium nitride power device comprises a monitoring circuit, a shielding signal generation circuit and a logical control module. The monitoring circuit is electrically connected to the shielding signal generation circuit and a gate driver by means of the logical control module, respectively. The gate driver is electrically connected to a high-electron-mobility power transistor, and the high-electron-mobility power transistor is sequentially connected to the monitoring circuit and a load.

Description

Overcurrent protection circuit of gallium nitride power device and method for improving reaction speed

Technical field

The invention relates to a protection circuit in a power conversion system, in particular to an overcurrent protection circuit based on an integrated gallium nitride power device, a method for improving the response speed of the overcurrent protection circuit and reducing the probability of false triggering. For example, a similar protection circuit is required in devices for power conversion such as chargers.

Background technique

Figure 1 is a schematic diagram of three common overcurrent protections in traditional silicon power devices.

Please refer to Figure 1a. Figure 1a is a precision resistance test method. A precision resistance needs to be placed in the power circuit. By monitoring the voltage value on the resistance, it can be monitored in real time whether the current in the main circuit exceeds the limit value. However, this method will add some additional parasitic parameters to the main loop, limiting the high-frequency characteristics of the circuit and increasing power consumption. Therefore, it is not suitable for high-speed and high-power circuits.

Please refer to Figure 1b. Figure 1b is the current mirror monitoring method. By integrating an auxiliary device near the power device, under the same voltage bias condition, the current in the power device will be proportional to the circuit in the auxiliary device . In this way, the main loop current can be monitored without increasing parasitic parameters. However, when the accuracy requirements are higher, the size of the auxiliary device will also become larger, which will result in a larger chip area and power loss.

Please refer to Figure 1c, Figure 1c is a "desaturation" circuit, which uses a diode to monitor the drain voltage value of the power device to monitor the current in the open state in real time. Taking into account the on-resistance in the on-state, when the current is too high, the drain voltage will increase to trigger the protection mechanism. This method does not introduce parasitic inductance in the main loop and consumes very little power. However, when the power device is in the off state, the drain terminal voltage is also very high. This method requires a shielding signal to normally turn on the power device. The conventional method is to bind the shielding signal to the monitoring signal of the drain terminal. This reduces the response speed of the protection circuit and is not suitable for direct application to high-speed gallium nitride power devices.

technical problem

The purpose of the present invention is to provide a gallium nitride device with a smaller volume and current density under the same on-resistance. But at the same time, it is more prone to damage due to high current. Therefore, in the gallium nitride power system, the overcurrent protection circuit must have a very high response speed, which can turn off the device in a very short time to prevent circuit damage. At the same time, in order not to affect the excellent high-frequency characteristics of gallium nitride, the protection circuit should minimize the impact on the main circuit and affect the overcurrent protection circuit based on integrated gallium nitride power devices. Another object of the present invention is to provide a monitoring signal that can be directly transmitted to the control circuit without passing through the capacitor in the shielding circuit when the current in the power switch exceeds the limit, thereby turning off the power switch and improving the response speed. The logic of the loop is simpler and does not need to use comparators, operational amplifiers and other modules to improve the response speed of the over-current protection circuit and reduce the probability of false triggering.

Technical solutions

The first technical solution of the present invention is the overcurrent protection circuit based on the integrated gallium nitride power device. Its special feature is that it includes a monitoring circuit (1), a shielding signal generating circuit (2) and a logic control module ( 3) The monitoring circuit (1) is electrically connected to the shielding signal generating circuit (2) and the gate driver through the logic control module (3), and the gate driver is electrically connected to the high electron mobility power transistor M ₁ , The high electron mobility power transistor M _{1 is} sequentially connected to the monitoring circuit (1) and the load; under normal circumstances, the control signal V _DR _{is low at time t 0} , the power device is in the off state, and V _DS is high. , The monitoring circuit (1) feeds back a high level V _S , due to _{the shielding effect of the shielding branch V blank} , the logic control module (3) generates a low level, which will not trigger the protection; at t ₁ , the control signal V _DR From low to high, but due to the delay effect of the RC loop, the V _{blank of the} shielding branch is still low, making _{the V OCE} of the logic control module (3) _{low during the period from t 1} to t ₂ , The power device will be turned on normally, the V _{DS at} the load end will drop to a stable value; when t ₂ is reached, the V _DS at the load end has dropped to a stable value, and the V _{blank of the} shielding branch has also become a high level. At this time, if the current in the power device is lower than the limit value, the V _{DS at the} load side does not exceed the threshold, so that V _S changes from high to low, so that the power device works normally; on the contrary, if the power device in the When the current is higher than the limit value, the V _{DS at the} load end will exceed the threshold to keep V _S at a high level. When the masking time is over, the V _{blank of the} masking branch becomes high and the device will be forcibly turned off.

Preferably, the monitoring circuit (1) includes a first inverter, a second inverter, and a diode D _S connected in series, and _{the connection between the diode D S} and the second inverter and the operating voltage VDD of the unipolar device electrically connected between the resistor R _1, the first inverter and the second inverter respectively connected the operating voltage VDD and a ground terminal unipolar devices; when the power switch is in normal operation, due to the inductive load, the power The current in the device will gradually increase; and as the current increases, the drain voltage will increase until it reaches the set threshold. At this time, the monitoring signal will transmit a high level to the logic control module to trigger the overcurrent protection.

Preferably, the logic control module (3) is composed of a first AND gate and a second AND gate connected in series.

Preferably, the shielding signal generating circuit (2) includes a resistor R ₂ and a capacitor C, one end of _{the resistor R 2} _{is connected to the common terminal of V DR} (PWM) and the gate driver, and the other end of _{the resistor R 2 is connected} The input terminal of the first AND gate and the capacitor C, and the capacitor C is grounded.

Preferably, the gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver, the source of the high electron mobility power transistor is grounded, and the drain of the high electron mobility power transistor is grounded. and a cathode respectively connected to the diode D _S of the load load.

The second technical solution of the present invention is the monitoring circuit based on the integrated gallium nitride power device, which is special in that it includes a first inverter, a second inverter, and a diode D _S connected in series, and a diode _{The resistor R 1} is electrically connected between the connection line of D _S and the second inverter and the operating voltage VDD of the unipolar device. The first inverter and the second inverter are respectively connected to the operating voltage VDD of the unipolar device and Ground terminal.

The third technical solution of the present invention is the shielding signal generation circuit based on the integrated gallium nitride power device. Its special feature is that it includes a resistor R ₂ and a capacitor C. _{One end of the resistor R 2} is connected to V _DR ( PWM) and the common end of the gate driver, the _{other end of the resistor R 2} is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.

The fourth technical solution of the present invention is the method for improving the response speed of the overcurrent protection circuit and reducing the probability of false triggering. Its special feature is that it includes the following steps:

(1) Under normal circumstances, the control signal V _DR _{is low at t 0} , the power device is in the off state, V _DS is high, and the monitoring circuit (1) feeds back a high level V _S , due to the shielding support With _{the shielding effect of V blank} , the logic control module (3) generates a low level, which will not trigger the protection;

(2) At the _{time t 1} , the control signal V _DR changes from low to high, but due to the delay effect of the RC loop, the V _{blank of the} shielding branch is still low, making the logic in the time period _{from t 1} to t ₂ _{The V OCE} of the control module (3) is low, the power device will be turned on normally, and the V _{DS of} the load will drop to a stable value;

(3) when reaching t _2, V _DS load side has dropped to a stable value, and the shield branch V _blank has become high, then when the current in the power device below the limit, the load terminal If V _DS does not exceed the threshold, V _S changes from a high level to a low level, so that the power device works normally;

(4) On the contrary, if the current in the power device is higher than the limit value at this time, the V _{DS at the} load end will exceed the threshold to keep V _S at a high level. When the masking time is over, the V _{blank of the} shielding branch will become high. Level, the device will be forcibly turned off.

Beneficial effect

(1) The present invention is based on the "desaturation" overcurrent protection circuit, and integrates the new circuit, gallium nitride power device and drive circuit all on one chip.

(2) The present invention reduces the oscillation and delay caused by parasitic parameters. At the same time, the new protection circuit separates the required shielding signal from the voltage monitoring signal.

(3) The present invention divides the monitoring circuit and the shielding signal generation circuit. On the one hand, the monitoring signal does not need to pass through the capacitor in the shielding circuit, but can be directly connected to the control circuit, which increases the overall response speed of the circuit. The length can be adjusted according to the specific needs of the circuit by changing the size of the capacitor and resistance, and there is no need to consider the issue of circuit response speed.

(4) By optimizing the logic circuits of the monitoring loop and the control loop, the present invention avoids the use of more complicated circuits such as comparators, amplifiers, and reference voltages, thereby reducing the area of the entire integrated circuit and improving the response speed of the circuit.

(5) When the current in the power switch exceeds the limit, the monitoring signal can be directly transmitted to the control circuit without passing through the capacitor in the shielding circuit, thereby turning off the power switch to improve the response speed, because the logic of the monitoring circuit and the control loop are simpler , Do not need to use comparators, operational amplifiers and other modules, and the response speed is also improved.

Description of the drawings

Figure 1a is a resistance monitoring circuit diagram of a traditional overcurrent protection circuit;

Figure 1b is a current mirror circuit diagram of a traditional overcurrent protection circuit;

Figure 1c is a circuit diagram of a traditional "desaturation" protection circuit;

2A is a circuit diagram of the overcurrent protection circuit of the present invention;

2B is a schematic diagram of the working principle of the monitoring circuit of the present invention;

3A is a schematic diagram of waveforms of the over-current protection circuit of the present invention in a normal working state;

3B is a schematic diagram of waveforms when the overcurrent protection of the overcurrent protection circuit of the present invention is triggered;

Fig. 4A is a photo of the integrated chip for verifying the basic functions of the protection circuit of the present invention;

4B is an equivalent circuit diagram of the integrated chip for verifying the basic functions of the protection circuit of the present invention;

FIG. 5A is a coordinate diagram of the feedback result of the driving circuit drain-source saturation voltage and the feedback result when the basic function verification of the protection circuit of the present invention provides a driving voltage of 6V; FIG.

5B is a coordinate diagram of the basic function verification time and feedback result of the protection circuit of the present invention;

6A is a schematic diagram of a fully integrated chip for circuit verification of the protection circuit of the present invention;

6B is a photo of the circuit verification chip of the protection circuit of the present invention mounted on the PCB board;

6C is a test circuit diagram of the double pulse test for circuit verification of the protection circuit of the present invention;

Fig. 7A is a waveform diagram of the normal condition of the switch under the resistance load of the present invention;

Fig. 7B is a waveform diagram of a switch over-current condition under a resistive load of the present invention;

FIG. 8A is a waveform diagram of the enlarged turn-on transient normal condition of the present invention; FIG.

FIG. 8B is a waveform diagram of an enlarged transient overcurrent situation at turn-on of the present invention; FIG.

FIG. 9A is a multi-pulse waveform test chart of the present invention in which the current gradually increases with the increase of the waveform under the condition of _{lower V DS under the inductive load;}

FIG. 9B is a multi-pulse waveform test diagram of the present invention under inductive load and when V _{DS is} high, the protection mechanism can also be triggered when the device is turned on.

The best mode of the present invention

The present invention will be described in further detail below in conjunction with the accompanying drawings:

Please refer to Figure 2A, the overcurrent protection circuit based on the integrated gallium nitride power device includes a monitoring circuit (1), a shielding signal generating circuit (2) and a logic control module (3). The monitoring circuit (1) ) The shielding signal generating circuit (2) and the gate driver are respectively electrically connected through the logic control module (3), the gate driver is electrically connected to the high electron mobility power transistor M ₁ , and the high electron mobility power transistor M ₁ Connect the monitoring circuit (1) and the load in sequence.

Please refer to FIG. 2A, the monitoring circuit (1) includes a first inverter, a second inverter, and a diode D _S connected in series, and _{the connection between the diode D S} and the second inverter and a unipolar device _{The resistor R 1} is electrically connected between the working voltage VDD, and the first inverter and the second inverter are respectively connected to the working voltage VDD of the unipolar device and the ground terminal.

Please refer to FIG. 2A, the logic control module (3) is composed of a first AND gate and a second AND gate connected in series.

2A, the shielding signal generating circuit (2) includes a resistor R ₂ and a capacitor C. One end of _{the resistor R 2} _{is connected to the common terminal of V DR} (PWM) and the gate driver. The resistor R ₂ The other end of is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.

Please refer to FIG. 2A, the gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver, the source of the high electron mobility power transistor is grounded, and the high electron mobility power drain of the transistor are respectively connected to the cathode and the diode D _S of the load load.

Please refer to FIG. 2A, the monitoring circuit based on the integrated gallium nitride power device includes a first inverter, a second inverter, and a diode D _S connected in series, and the diode D _S and the second inverter are connected in series. _{The resistor R 1} electrically connected between the wire and the operating voltage VDD of the unipolar device, the first inverter and the second inverter are respectively connected to the operating voltage VDD of the unipolar device and the ground terminal.

Please refer to FIG. 2A. The shielding signal generation circuit based on the integrated gallium nitride power device includes a resistor R ₂ and a capacitor C. One end of _{the resistor R 2} _{is connected to the common terminal of V DR} (PWM) and the gate driver. , The other end of the resistor R ₂ is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.

3A and 3B are schematic diagrams of voltages of all important nodes in the entire circuit. The method for improving the response speed of the overcurrent protection circuit and reducing the probability of false triggering includes the following steps:

Please refer to FIG. 2B, the basic working principle of the monitoring circuit: when the power switch is in a normal working state, the current in the device will gradually increase due to the presence of the inductive load. As the current increases, the drain terminal voltage will increase until it reaches the set threshold (for VA, the inverter threshold), then the monitoring signal will transmit a high level to the logic control module to trigger the overcurrent protection .

Please refer to Figures 4A to 4C, Figure 4A is a screenshot of the overcurrent protection circuit chip of the present invention, which includes a monitoring module (1), a shielding signal generation module (2), a control logic module (3), and a switch Drive module (this chip does not contain power switch). The equivalent circuit diagram of the illustrated chip is shown in Figure 4B.

Figure 5 shows the test results of the module protection circuit shown in Figure 4. Please refer to FIG. 5A. When V _DD and V _{DR are} fixed at a high level, a scan signal is added to the _{V DS} _{port. When V DS} reaches the threshold voltage of 1V, the voltage of the gate is forced to be pulled down to 0V. Please refer to FIG. 5B. When V _{DD is} still at a high level and the control signal V _DR is a PWM wave, similarly, when V _DS increases to about 1V, the gate signal can no longer follow the control signal.

Compared with the protection circuit in Figure 4, Figure 6 is a complete overcurrent protection circuit (including power switches). Fig. 6A is a photo of the overall circuit chip, and Fig. 6B is a photo of the chip mounted on the PCB. Figure 6C is a schematic diagram of the circuit after the chip is mounted.

Figure 7 shows the waveform of a single pulse test under resistive load. Among them, the current size of the power device is adjusted by the size of the resistive load, and the circuit diagram can refer to Figure 6. Please refer to Figure 7A, when the current is small (1A ~ 3A), the power device can normally switch, and it can be seen that the V _DS rises with the increase of the current. Please refer to Figure 7B. When the current reaches 4A or more, the power device will be turned off quickly after the masking time is over.

Figure 8 is the waveform scaling during the process of Figure 7, which more directly shows the effect of the shielding time, and also shows that the overall response speed of the device is about 40ns. Please refer to FIG. 8A. During the masking time, even if the parameter generated by the oscillation exceeds the threshold, the device can still switch normally. Please refer to FIG. 8B. After the masking time is over, the overall response time (including the masking time) is about 40 ns.

Figure 9 is the waveform test chart of multiple pulses under inductive load. Please refer to Figure 9A. In the _{case of a lower V DS} , as the waveform increases, the current gradually increases. It can be seen that when the V _{DS is} close to the threshold, the next pulse only turns on the device for a moment. It's triggered. Please refer to Figure 9B. Similarly, when V _{DS is} high, the protection mechanism can also be triggered when the device is turned on.

Industrial applicability

The foregoing descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made in accordance with the scope of the claims of the present invention shall fall within the scope of the claims of the present invention.

Claims

An overcurrent protection circuit based on an integrated gallium nitride power device, which is characterized in that it comprises a monitoring circuit (1), a shielding signal generating circuit (2) and a logic control module (3). The monitoring circuit (1) passes The logic control module (3) is electrically connected to the shielding signal generating circuit (2) and the gate driver respectively, and the gate driver is electrically connected to the high electron mobility power transistor M 1 , and the high electron mobility power transistor M 1 sequentially Connect the monitoring circuit (1) and the load; under normal circumstances, the control signal V DR at t 0 is low, the power device is in the off state, V DS is high, and the monitoring circuit (1) feeds back a high level V S , due to the shielding effect of the shielding branch V blank , the logic control module (3) generates a low level and will not trigger the protection; at t 1 , the control signal V DR changes from low to high, but due to the delay of the RC loop Time effect, the V blank of the shielding branch is still low, so that the V OCE of the logic control module (3) is low during the time period from t 1 to t 2 , the power device will be turned on normally, and the V DS of the load end Will drop to a stable value; when t 2 is reached, the V DS of the load has dropped to a stable value, and the V blank of the shielding branch has also become a high level. At this time, if the current in the power device is lower than the limit If the V DS at the load end does not exceed the threshold, the V S changes from a high level to a low level, which makes the power device work normally; on the contrary, if the current in the power device is higher than the limit value at this time, the V DS at the load end is The threshold will be exceeded to keep V S at a high level. When the masking time is over, the V blank of the masking branch becomes high and the device will be forcibly turned off.
The overcurrent protection circuit according to a gallium nitride-based integrated power device as claimed in claim, wherein the monitoring circuit (1) comprises a first series of inverters, the second inverter and the diode D S, and a resistor R between the operating voltage VDD and the diode D S of the second inverter is electrically connected to a connection with a unipolar device 1, the first inverter and the second inverter respectively connected unipolar devices operating voltage VDD and ground terminal.
The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, wherein the logic control module (3) is composed of a first AND gate and a second AND gate connected in series.
1 according to the gallium nitride-based integrated power device overcurrent protection circuit as claimed in claim, wherein the mask signal generating circuit (2) comprises a resistor R 2 and capacitor C, the resistor R 2 is connected to one end of the V The common end of DR (PWM) and the gate driver, the other end of the resistor R 2 is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.
The overcurrent protection circuit based on an integrated gallium nitride power device according to claim 1, wherein the gate of the high electron mobility power transistor is electrically coupled to the output terminal of the gate driver, and the high power source electron mobility transistor is grounded, a drain of the high electron mobility transistors are respectively connected to power and load load cathode of the diode D S.
A monitoring circuit based on an integrated gallium nitride power device, which is characterized in that it includes a first inverter, a second inverter, and a diode D S connected in series, and the connection between the diode D S and the second inverter The resistor R 1 is electrically connected to the operating voltage V DD of the unipolar device. The first inverter and the second inverter are respectively connected to the operating voltage V DD of the unipolar device and the ground terminal; when the power switch is in normal operation In the state, due to the presence of the inductive load, the current in the power device will gradually increase; and as the current increases, the drain terminal voltage will increase until it reaches the set threshold, at which time the monitoring signal will be transmitted to the logic control module. The level thus triggers the overcurrent protection.
A shielding signal generation circuit based on an integrated gallium nitride power device, which is characterized in that it comprises a resistor R 2 and a capacitor C. One end of the resistor R 2 is connected to the common terminal of V DR (PWM) and the gate driver, so The other end of the resistor R 2 is connected to the input end of the first AND gate and the capacitor C, and the capacitor C is grounded.
A method for improving the response speed of an overcurrent protection circuit and reducing the probability of false triggering is characterized in that it includes the following steps:

(1) Under normal circumstances, the control signal V DR is low at t 0 , the power device is in the off state, V DS is high, and the monitoring circuit (1) feeds back a high level V S , due to the shielding support With the shielding effect of V blank , the logic control module (3) generates a low level, which will not trigger the protection;

(2) At the time t 1 , the control signal V DR changes from low to high, but due to the delay effect of the RC loop, the V blank of the shielding branch is still low, making the logic in the time period from t 1 to t 2 The V OCE of the control module (3) is low, the power device will be turned on normally, and the V DS of the load will drop to a stable value;

(3) when reaching t 2, V DS load side has dropped to a stable value, and the shield branch V blank has become high, then when the current in the power device below the limit, the load terminal If V DS does not exceed the threshold, V S changes from a high level to a low level, so that the power device works normally;

(4) On the contrary, if the current in the power device is higher than the limit value at this time, the V DS at the load end will exceed the threshold to keep V S at a high level. When the masking time is over, the V blank of the shielding branch will become high. Level, the device will be forcibly turned off.