WO2021169961A1 - Packaging structure, packaging method, and electronic device - Google Patents

Packaging structure, packaging method, and electronic device Download PDF

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Publication number
WO2021169961A1
WO2021169961A1 PCT/CN2021/077493 CN2021077493W WO2021169961A1 WO 2021169961 A1 WO2021169961 A1 WO 2021169961A1 CN 2021077493 W CN2021077493 W CN 2021077493W WO 2021169961 A1 WO2021169961 A1 WO 2021169961A1
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WO
WIPO (PCT)
Prior art keywords
insulating layer
via hole
metal connecting
base
pad
Prior art date
Application number
PCT/CN2021/077493
Other languages
French (fr)
Chinese (zh)
Inventor
佘勇
张立
叶润清
姚明军
龙浩晖
Original Assignee
华为技术有限公司
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Filing date
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2021169961A1 publication Critical patent/WO2021169961A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Definitions

  • This application relates to the field of semiconductor packaging technology, and in particular to a packaging structure, packaging method, and electronic equipment.
  • an insulating layer 11 is formed on the surface of a base body 10, and the insulating layer 11 exposes a pad 12. Then, an electroplating process is used to form the hole-filling metal 13 to complete the signal transmission between the base 10 and the solder balls 14, and the base 10 is packaged.
  • the embodiments of the present application provide a packaging structure, a packaging method, and an electronic device, which overcome the problem that the performance of the substrate cannot be tested due to short circuits between pads during the manufacturing process.
  • a package structure including: a base, the base includes a pad; the pad is arranged on a first surface of the base; a metal connecting pillar is arranged on the surface of the pad and is connected to the pad; and a first insulating layer , Covering the first surface of the substrate, the first insulating layer has a first via hole, the first via hole penetrates the first insulating layer; part or all of the metal connecting pillars are arranged in the first via hole; wherein, the metal connecting pillar The side surface is curved, and the metal connecting post is used to transmit the electrical signal of the substrate.
  • the multiple pads on the surface of the base are independent, there is no electroplating bridge required by the electroplating process, the structure is simple, and the structure of the package structure is also simplified. Moreover, there is no need to cut the plating bridge after the packaging is completed, which can simplify the process flow. Furthermore, the pads on the surface of the substrate in the package structure provided by the present application exist independently. Therefore, before encapsulating the substrate, the substrate can be directly screened for good products (such as leakage current detection), and waste substrates can be directly eliminated. There is no need to wait for good product screening after the packaging is completed, which can avoid process waste and reduce costs.
  • the metal connecting post is prepared by a wire bonding process. No electroplating process is required, so there is no need to set the electroplating bridge required by the electroplating process, the process is simple, and the cost is low.
  • the side surface of the metal connecting column is a spherical surface.
  • the metal connecting pillar is prepared by the electroplating process, the first via is prepared first, and the shape of the metal connecting pillar needs to be matched with the first via; and the metal connecting pillar through the wire bonding process is prepared first
  • the metal connecting column is then formed with a matching first via hole according to the shape of the metal connecting column.
  • the side surface of the metal connecting column obtained by the wire bonding process is curved or spherical or other shapes, the preparation method is simple, and the cost is saved.
  • the thickness of the metal connecting pillar in the first direction is greater than the thickness of the first insulating layer in the first direction; wherein, the first direction is a direction perpendicular to the substrate. In this way, there is no need to accurately set the metal connecting pillars to be flush with the first insulating layer, allowing appropriate process errors, and reducing the difficulty of preparing the metal connecting pillars.
  • the thickness of the metal connecting pillar in the first direction is smaller than the thickness of the first insulating layer in the first direction; wherein, the first direction is a direction perpendicular to the substrate.
  • the first direction is a direction perpendicular to the substrate.
  • the substrate is a chip.
  • the base body further includes an interdigital transducer, which is arranged on the first surface of the base body; the first insulating layer further has a second via hole, and the second via hole penetrates the first insulating layer; the interdigital transducer The energy device is arranged in the second via hole. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
  • the package structure further includes: a second insulating layer; the second insulating layer is disposed on the surface of the first insulating layer, the second insulating layer has a third via, and the third via penetrates the second insulating layer and is connected to the first insulating layer.
  • the via holes are connected; part of the metal connecting posts are arranged in the third via holes.
  • a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
  • the sum of the thickness of the pad and the thickness of the metal connecting pillar is greater than or less than the sum of the thickness of the first insulating layer and the thickness of the second insulating layer. In this way, there is no need to accurately set the metal connecting pillars to be flush with the second insulating layer, allowing appropriate process errors, and reducing the difficulty of preparing the metal connecting pillars.
  • the thickness of the metal connecting pillar in the first direction is h1
  • the thickness of the first insulating layer in the first direction is h2
  • the size of the metal connecting pillar along the first direction is too small, and the processing process is complicated when the first insulating layer exposes the metal connecting pillar.
  • the second insulating layer covers the metal connecting pillars thickly, the second insulating layer exposes the metal connecting pillars, and the processing time is longer.
  • the second insulating layer includes a first sub-insulating layer and a second sub-insulating layer; the first sub-insulating layer is in direct contact with the first insulating layer, and the first sub-insulating layer, the first insulating layer and the substrate constitute a protective cavity. It can reduce the requirements for the process when preparing the second insulating layer, and broaden the application range of the process.
  • the first insulating layer includes an organic insulating material.
  • the preparation process of the organic insulating material is simple, the performance is stable, and the cost is low.
  • the second insulating layer includes an organic insulating material.
  • the preparation process of the organic insulating material is simple, the performance is stable, and the cost is low.
  • the metal connecting post includes gold or silver.
  • the resistance of the metal connecting column can be reduced, and the ductility of the metal connecting column can be improved.
  • the package structure further includes a solder ball; the pad is disposed at one end of the metal connection post, the solder ball is disposed at the other end of the metal connection post relative to the pad, and the solder ball is connected to the metal connection post to transmit electricity from the substrate Signal.
  • the external components of the package structure can be connected with the metal connection posts through solder balls, and the signals on the substrate can be transmitted to the components connected with the solder balls through the solder balls.
  • the substrate is a chip, and an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on the first surface of the substrate; the first insulating layer further has a second via hole through which the second via hole penetrates The first insulating layer; the interdigital transducer is arranged in the second via; the package structure further includes: a second insulating layer; the second insulating layer is arranged on the surface of the first insulating layer, and the second insulating layer has a third via , The third via hole penetrates the second insulating layer and communicates with the first via; part of the metal connecting pillar is arranged in the third via; a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and Means that the transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface
  • an electronic device including a PCB board, and further including the packaging structure of any one of the first aspects, and the packaging structure is electrically connected to the PCB board.
  • the structure of the electronic device can be simplified, and the cost of the electronic device can be reduced.
  • the electronic device further includes a display module, a middle frame and a cover plate; the light emitting surface of the display module faces the cover plate, and the back of the display module faces the middle frame; the PCB board is arranged on the surface of the middle frame away from the display module.
  • the packaging structure can be applied to electronic devices for display, and the cost of electronic devices for display can be reduced.
  • a packaging method of a packaging structure includes a base, the base includes a pad, and the pad is disposed on a first surface of the base; the packaging method includes: forming a metal connecting pillar on the surface of the pad; It is formed by wire bonding process; the side of the metal connecting pillar is curved, and the metal connecting pillar is connected to the pad.
  • the metal connecting pillar is used to transmit the electrical signal of the base; the first insulating layer is formed on the first surface of the base; the first insulating layer There is a first via hole, the first via hole penetrates the first insulating layer; part or all of the metal connection pillars are arranged in the first via hole.
  • the packaging method provided by the embodiments of the present application uses a wire bonding process to form a metal connecting column with a curved side surface. Compared with the electroplating process used to form the hole-filling metal, it is necessary to form a barrier layer and a seed layer on the surface of the pad.
  • the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar and has a low cost.
  • the metal connecting pillars are in direct contact with the pads, and other film layers (such as seed layers or barrier layers) are not interposed therebetween, which can reduce the risk of unstable connections between the metal connecting pillars and the pads due to film layer fracture.
  • the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads on the surface of the substrate exist independently, and there is no electroplating bridge. Therefore, there is no need to cut the plating bridge after the packaging is completed, which can simplify the process flow.
  • a first insulating layer is formed on the first surface of the base body.
  • the metal connecting pillar is prepared by the electroplating process
  • the first via is prepared first, and the shape of the metal connecting pillar needs to be matched with the first via; and the metal connecting pillar through the wire bonding process is
  • the metal connecting pillar is prepared first, and then the matching first via hole is formed according to the shape of the metal connecting pillar.
  • the side surface of the metal connecting column obtained by the wire bonding process is curved or spherical or other shapes, the preparation method is simple, and the cost is saved.
  • the substrate is a chip, and the substrate further includes an interdigital transducer; the interdigital transducer is arranged on the first surface of the substrate; the first insulating layer formed on the first surface of the substrate further has a second via hole.
  • the two via holes penetrate the first insulating layer, and the interdigital transducer is located in the second via hole. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
  • the packaging method further includes: forming a second insulating layer on a side of the first insulating layer away from the base; the second insulating layer has a third via hole, the third via hole penetrates the second insulating layer, and the third via hole is connected to The first via hole communicates; part of the metal connection pillars are arranged in the third via hole.
  • a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
  • forming the second insulating layer on the side of the first insulating layer away from the base includes: forming a second insulating film layer on the surface of the first insulating layer away from the base, the second insulating film layer being formed by a lamination process; A third via hole is formed on the second insulating film layer to form a second insulating layer.
  • the packaging method further includes: forming a third insulating layer on a side of the second insulating layer away from the base; the third insulating layer has a fourth via, the fourth via penetrates the third insulating layer, and the fourth via is connected to the The third via hole is connected; part of the metal connecting pillar is arranged in the fourth via hole.
  • forming the third insulating layer on the side of the second insulating layer away from the base includes: forming a third insulating film layer on the surface of the second insulating layer away from the base, the third insulating film layer being formed by a lamination process; A fourth via hole is formed on the third insulating film layer to form a third insulating layer.
  • the third insulating layer can be formed in a relatively simple and mature process.
  • forming the first insulating layer on the first surface of the base includes: forming a first insulating film layer on the first surface of the base; and forming a first via hole and a second via hole on the first insulating film layer.
  • the first insulating layer can be formed in a relatively simple and mature process.
  • the packaging method further includes: forming a solder ball on one end of the metal connection post; the solder ball is disposed at the other end of the metal connection post relative to the pad, and the solder ball is connected to the metal connection post for transmitting electrical signals of the substrate.
  • the external components of the package structure can be connected with the metal connection posts through solder balls, and the signals on the substrate can be transmitted to the components connected with the solder balls through the solder balls.
  • the substrate is a chip, and an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on a first surface of the substrate; forming a first insulating layer on the first surface of the substrate includes: A first insulating film layer is formed on the first surface; a first via hole and a second via hole are formed on the first insulating film layer to form a first insulating layer; the second via hole penetrates the first insulating layer, interdigitated The device is located in the second via hole; wherein, after the metal connecting pillar is formed on the surface of the pad, a first insulating layer is formed on the first surface of the base; the packaging method further includes: forming a second insulating layer on the surface of the first insulating layer away from the base.
  • FIG. 1a is a schematic diagram of a packaging method of a packaging structure provided by related technologies
  • FIG. 1b is a schematic diagram of the structure of the substrate in the package structure provided by the related technology
  • FIG. 2 is a schematic structural diagram of an electronic device provided by an embodiment of this application.
  • FIG. 3 is a flowchart of a packaging method provided by an embodiment of the application.
  • 4a is a structural relationship diagram between metal connecting pillars and pads in a package structure provided by an embodiment of the application;
  • 4b is a structural relationship diagram between metal connecting pillars and pads in another package structure provided by an embodiment of the application;
  • 5a-5e are schematic diagrams of the packaging process of a packaging structure provided by an embodiment of the application.
  • FIG. 6a is a schematic structural diagram of another package structure provided by an embodiment of the application.
  • Fig. 6b is a schematic diagram of the connection between a package structure and a PCB provided by an embodiment of the application;
  • FIG. 6c is a schematic diagram of the connection between another package structure and the PCB provided by an embodiment of the application.
  • FIG. 7 is a schematic structural diagram of a substrate in a package structure provided by an embodiment of the application.
  • FIG. 8 is a flowchart of another packaging method provided by an embodiment of the application.
  • 9-11b are schematic diagrams of the packaging process of another packaging structure provided by an embodiment of the application.
  • FIG. 11c is a structural relationship diagram between a metal connecting pillar and a second insulating layer provided by an embodiment of the application.
  • 11d is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • FIG. 11e is a structural diagram of a second insulating layer in a package structure provided by an embodiment of the application.
  • FIG. 12 is a schematic structural diagram of another package structure provided by an embodiment of the application.
  • FIG. 13a is a schematic structural diagram of a package structure in another related technology provided by an embodiment of the application.
  • FIG. 13b is a schematic structural diagram of a substrate in another package structure provided by an embodiment of the application.
  • FIG. 14 is a flowchart of yet another packaging method provided by an embodiment of the application.
  • 15a is a schematic diagram of a preparation process of a first insulating layer provided by an embodiment of the application.
  • 15b is a schematic diagram of a preparation process of a first insulating layer provided by an embodiment of the application.
  • 15c is a structural relationship diagram between a metal connecting pillar and a first insulating layer provided by an embodiment of the application;
  • 15d is a structural relationship diagram between another metal connecting pillar and the first insulating layer provided by an embodiment of the application;
  • 15e is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • 15f is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • 15g is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • 15h is a schematic structural diagram of yet another package structure provided by an embodiment of the application.
  • FIG. 16 is a flowchart of yet another packaging method provided by an embodiment of the application.
  • FIG. 17a is a schematic diagram of a preparation process of a first insulating layer and a second insulating layer according to an embodiment of the application;
  • FIG. 17b is a structural relationship diagram between a metal connecting pillar and a first insulating layer and a second insulating layer according to an embodiment of the application;
  • FIG. 17c is a structural relationship diagram between another metal connecting pillar and the first insulating layer and the second insulating layer according to an embodiment of the application;
  • FIG. 17d is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • FIG. 17e is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application.
  • FIG. 17f is a schematic structural diagram of yet another packaging structure provided by an embodiment of the application.
  • first”, “second”, etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first”, “second”, etc. may explicitly or implicitly include one or more of these features.
  • azimuthal terms such as “upper”, “lower”, “left” and “right” are defined relative to the schematic placement of the components in the drawings. It should be understood that these directional terms are Relative concepts, they are used for relative description and clarification, which can be changed correspondingly according to the changes in the orientation of the components in the drawings.
  • the embodiment of the application provides an electronic device, which can be a terminal device with a display interface such as a mobile phone, a TV, a monitor, a tablet computer, a car computer, etc., or a smart display wearable device such as a smart watch, a smart bracelet, or Communication equipment such as servers, storages, base stations, or smart cars, etc.
  • a terminal device with a display interface such as a mobile phone, a TV, a monitor, a tablet computer, a car computer, etc.
  • a smart display wearable device such as a smart watch, a smart bracelet, or Communication equipment such as servers, storages, base stations, or smart cars, etc.
  • the following embodiments take the electronic device as a mobile phone as an example for description.
  • the electronic device 1 mainly includes a display module 2, a middle frame 3, a casing (also called a battery cover, a rear casing) 4 and a cover 5.
  • the display module 2 has a light-emitting side where the display screen can be seen and a back surface opposite to the above-mentioned light-emitting side.
  • the above-mentioned display module 2 includes a display panel (DP).
  • the display module 2 is a liquid crystal display module.
  • the above-mentioned display screen is a liquid crystal display (LCD).
  • the display module 2 also includes a backlight unit (BLU) located on the back of the liquid crystal display screen (a side away from the side of the LCD for displaying images).
  • BLU backlight unit
  • the backlight module can provide a light source to the liquid crystal display, so that each sub-pixel in the liquid crystal display can emit light to realize image display.
  • the display module 2 is an organic light emitting diode display module.
  • the above-mentioned display screen is an organic light emitting diode (OLED) display screen. Since each sub-pixel in the OLED display screen is provided with an electroluminescent layer, the OLED display screen can realize self-luminescence after receiving the working voltage. In this case, the above-mentioned backlight module does not need to be provided in the display module 2 with the OLED display screen.
  • the cover plate 5 is located on the side of the display module 2 away from the middle frame 3, and the cover plate 5 may be, for example, cover glass (CG), which may have a certain degree of toughness.
  • CG cover glass
  • the middle frame 3 is located between the display module 2 and the housing 4, and the surface of the middle frame 3 away from the display module 2 is used to install internal components such as batteries, printed circuit boards (PCB), cameras, antennas, etc. . After the casing 4 and the middle frame 3 are closed, the above-mentioned internal elements are located between the casing 4 and the middle frame 3.
  • internal components such as batteries, printed circuit boards (PCB), cameras, antennas, etc.
  • the above-mentioned electronic device 1 also includes electronic devices such as a motherboard, a system-on-chip (SOC), and a packaging structure arranged on a PCB board.
  • the PCB board is used to carry the above-mentioned electronic devices and complete signal interaction with the above-mentioned electronic devices.
  • the electronic device 1 is any of the above-mentioned terminal devices, smart display wearable devices (such as AR or VR), communication equipment, car machines, smart cars, etc.
  • the PCB board in the electronic device 1 is used for Carry the electronic device (such as a package structure), and complete signal interaction with the electronic device to provide a driving signal to the electronic device 1.
  • FIG. 2 only takes the electronic device 1 as a mobile phone as an example, showing the location of the PCB board for carrying the electronic device, but it is not limited to the PCB board for carrying the electronic device only for the mobile phone.
  • the preparation cost of each component in the electronic device 1 is closely related to the cost of the electronic device 1. Based on this, the embodiment of the present application provides a packaging method that reduces the cost.
  • the package structure includes a base 10, the base 10 includes a pad 12, and the pad 12 is disposed on the first surface A of the base 10.
  • a packaging method of a packaging structure including:
  • a wire bonding (WB) process is used to form a metal connecting pillar 20 on the surface of the pad 12, the side surface of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 and the pad 12
  • the metal connection post 20 is used to transmit electrical signals in the pad 12 and/or the base 10.
  • the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
  • the wire bonding process is a process that uses thin metal wires and uses heat, pressure, and ultrasonic energy to make the metal leads and the substrate pad 12 tightly welded.
  • the first surface A of the base 10 has a pad 12, and the metal connection pillar 20 formed in step S1 is disposed on the first surface A of the base 10 and on the surface of the pad 12. Therefore, the metal connecting pillar 20 and the pad 12 are in direct contact and electrically connected, and the signal in the pad 12 can be transmitted to the component connected to the other end of the metal connecting pillar 20.
  • the process of forming the metal connecting post 20 by using the wire bonding process is as follows: first, a metal wire is placed in a bonding tool (for example, a capillary capillary knife), and a free air ball is formed through the "electronic flame extinguishing" process of the ionized air gap. Then the bonding tool is moved to the position of the bonding pad 12, and a circular solder joint is formed on the surface of the bonding pad 12 through the combined action of heat and ultrasonic energy (thermosonic welding). Then, the bonding tool raises and cuts the circular solder joints to form the metal connection pillar 20.
  • a bonding tool for example, a capillary capillary knife
  • the metal connecting pillar 20 is formed on the bonding pad 12 by the wire bonding process, the side surface of the metal connecting pillar 20 is curved, and the shape of the side surface of the metal connecting pillar 20 is related to the wire bonding process, which is related to the related art
  • the hole-filling metal 13 is formed by an electroplating process, the shape of the hole-filling metal 13 is different from the shape of the hole.
  • the side surface of the metal connecting column 20 is a spherical surface as an example for illustration.
  • the shape of the metal connecting column 20 is a drum; the side surface of the metal connecting column 20 may also be Other shapes such as ellipsoid surface and water drop surface are not limited in this application.
  • the contact area between the metal connecting pillar 20 and the pad 12 is smaller than the area of the pad 12. Or, optionally, as shown in FIG. 4 b, the contact area between the metal connecting pillar 20 and the pad 12 is equal to the area of the pad 12.
  • the shape of the pad 12 is not limited in the embodiment of the present application, and the shape of the pad 12 may be a closed pattern of any shape.
  • the shape of the pad 12 is a regular pattern such as a circle, a rectangle, and a triangle.
  • the metal connection post 20 has the characteristic of electrical conduction (or understood as the function of conducting electrical signals or electrical conduction), and the metal connection post 20 conducts the signal of the base 10 through itself to the components connected to the package structure.
  • the material of the metal connecting column 20 is not limited in this application, and it can be any metal material, alloy or metal mixture.
  • the material of the metal connecting column 20 can be, for example, aluminum, tin, titanium, or alloys and mixtures of the foregoing metals.
  • the material of the metal connecting pillar 20 may be, for example, copper (Cu) or a copper-containing metal mixture or a copper-containing alloy.
  • the material of the metal connection post 20 may be, for example, gold (Au), silver (Ag), and a metal mixture containing gold.
  • Au gold
  • Ag silver
  • silver-containing metal mixtures gold-containing alloys or silver-containing alloys.
  • the base 10 in the package structure may be, for example, a chip, a redistribution layer, a substrate, a PCB board, etc., or other substrates that perform the same or similar functions, which is not limited in the present application.
  • a first insulating layer 30 is formed on the first surface of the base 10, the first insulating layer 30 has a first via 32, and the first via 32 penetrates the first insulating layer 30, partially or All the metal connecting pillars 20 are located in the first via hole 32.
  • the first insulating layer 30 in the package structure covers the first surface (the surface with the pad 12) of the base 10, and the metal connecting pillars 20 are located on the first insulating layer 30.
  • the first insulating layer 30 surrounds the metal connection pillar 20 and exposes the end of the metal connection pillar 20. Since the side surface of the metal connecting pillar 20 is curved, the contour shape of the contact between the first insulating layer 30 and the metal connecting pillar 20 is determined by the shape of the metal connecting pillar 20, and it is also curved (for example, the concave surface in FIG. 5a).
  • the first insulating layer 30 may be formed by a patterning process.
  • a patterning process usually includes one or more of the processes of film formation, photoresist coating, exposure, development, etching, photoresist stripping, etc. Therefore, as shown in FIG. A first insulating film layer 31 is formed on a surface; then, through a photolithography process (including one or more of photoresist coating, exposure, development, etching, and photoresist stripping processes), the first insulating film A first via 32 is formed on the layer 31, and the first via 32 exposes the metal connecting pillar 20 to form the first insulating layer 30.
  • the first insulating layer 30 may be formed by a laser opening process. As shown in FIG. 5b, a first insulating film layer 31 may be formed on the first surface of the substrate 10; then a first via hole 32 is formed on the first insulating film layer 31 by laser opening. The metal connecting pillar 20 is exposed to form the first insulating layer 30.
  • the first insulating film layer 31 may be formed on the base body 10 on which the metal connecting pillars 20 are formed through a lamination process. Alternatively, the first insulating film layer 31 may be formed on the base 10 on which the metal connecting pillars 20 are formed by a spin coating process.
  • first insulating film layer 31 is formed on the base 10 on which the metal connecting pillars 20 are formed, as shown in FIG.
  • a first via 32 is formed on the first insulating film layer 31, and the metal connecting post 20 is located in the first via 32.
  • the first via 32 exposes the end of the metal connecting post 20.
  • the end of the metal connecting post 20 may be To connect to other components (such as a PCB board), since the material of the metal connection post 20 has the characteristics of electrical conduction, the metal connection post 20 can conduct the signal in the base 10 to other components connected to the end of the metal connection post 20 ( Such as PCB board).
  • the metal connecting post 20 When the metal connecting post 20 is connected to other components (such as a PCB board), it can be connected directly, or through solder balls, or through other components with electrical conductivity. This application is not limited, and solder balls will be used later. 14 for illustration, see Figure 5e for details.
  • the material constituting the first insulating layer 30 may be, for example, polyimide (PI), epoxy resin or the like.
  • the surface a3 of the first insulating layer 30 is parallel to the first surface A of the base 10.
  • the thickness of the first insulating layer 30 and the metal connecting pillar 20 in some embodiments, as shown in FIG. Alignment, that is, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the thickness of the first insulating layer 30; in this case, all the metal connecting pillars 20 are disposed in the first via hole.
  • the process accuracy requirements are relatively high. Therefore, in some embodiments, as shown in FIG. 5a, the first insulating layer The surface a3 of the layer 30 away from the base 10 is not flush with the surface a1 of the metal connecting post 20 away from the base 10.
  • the surface a3 of the first insulating layer 30 away from the base 10 is lower than the surface a1 of the metal connecting pillar 20 away from the base 10 (that is, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20, Greater than the thickness of the first insulating layer 30; in this case, part of the metal connecting pillars 20 are disposed in the first via 32), or, as shown in FIG.
  • the first insulating layer 30 is far away from the surface a3 of the base 10
  • the surface a1 that is higher than the metal connection post 20 away from the base 10 that is, the sum of the thickness of the pad 12 and the thickness of the metal connection post 20 is less than the thickness of the first insulating layer 30; in this case, all the metal connections
  • the pillar 20 is disposed in the first via hole 32).
  • the packaging method further includes S3: as shown in FIG. 5e, a solder ball 14 is formed at one end of the metal connection pillar 20; the solder ball 14 is disposed at the other end of the metal connection pillar 20 relative to the pad 12, and the solder ball 14 is connected to the metal connecting post 20 for transmitting the electrical signal of the base body 10.
  • solder ball 14 in this application is not limited to a spherical shape.
  • the solder ball 14 can be spherical or other irregular shapes. It can also be a pad or a solder joint. There is no restriction on this.
  • the solder ball 14 is located on the surface of the metal connecting column 20 and is electrically connected to the metal connecting column 20, the pad 12 is located at one end of the metal connecting column 20, and the solder ball 14 is located opposite to the pad 12
  • the other end of the metal connection post 20 realizes the signal transmission between the solder ball 14 and the base 10, and completes the packaging of the base 10; at the same time, realizes that the electric signal in the base 10 is passed through the pad 12, the metal connection post 20 and the welding
  • the ball 14 is conducted to the parts outside the package structure.
  • the metal connecting pillar 20 is directly formed on the surface of the pad 12 by using a wire bonding process, and the metal connecting pillar 20 is connected to the pad 12 to realize the electrical signal in the substrate 10 through the pad 12, metal
  • the connecting pillars 20 are conducted to components outside the package structure.
  • the metal connection formed by the packaging method provided in the embodiment of the present application is The pillar 20 ensures that the electrical signals in the base 10 are transmitted to the external components of the package structure, and at the same time, the process is simple and the cost is low.
  • other functional components 17 are stacked and packaged on the substrate 10, and the functional components 17 may be, for example, storage units, processing units, resistors, capacitors, radio frequency units, and other components.
  • the first insulating layer 30 covers the functional component 17.
  • the packaging structure shown in FIG. 6a needs to be electrically connected to the PCB board (component outside the packaging structure) in the above electronic device 1 to complete signal transmission, in order to enable the base 10 to complete the signal transfer with the PCB, the base needs to be The signal of 10 leads.
  • an electroplating process may be used to form a through molding via (TMV) on the pad 12 of the base 10.
  • TSV through molding via
  • a first insulating layer 30 is formed on the first surface of the base 10.
  • the material of the first insulating layer 30 is a plastic encapsulating material, and the material of the first insulating layer 30 is, for example, epoxy molding compound (EMC).
  • EMC epoxy molding compound
  • Solder balls 14 are formed thereon to form a package structure. Then the solder balls 14 in the package structure are soldered to the PCB board to complete the signal transmission between the base body 10 and the PCB board.
  • the metal connecting post 20 and the solder ball 14 can be formed through the above steps S1-S3, and the metal connecting post 20 is equivalent to TMV , To form a package structure. Then the solder balls 14 in the package structure are connected to the PCB board to complete the signal transmission between the base 10 and the PCB board.
  • the packaging method provided by the embodiment of the present application uses a wire bonding process to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used to form the filling metal 13 or TMV, it is necessary to form a barrier on the surface of the pad 12 first. In the barrier layer and seed layer methods, the packaging method provided in the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost. In addition, the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers (such as a seed layer or a barrier layer) in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film layer fracture.
  • film layers such as a seed layer or a barrier layer
  • the packaging method provided by the embodiment of the present application when used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no plating bridge 15 shown in FIG. 1b. . Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
  • an electroplating process is used to form the via-filling metal 13 for packaging.
  • Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, the base body 10 cannot be screened in advance. Only after the packaging is completed, the plating bridge 15 is etched to insulate the pads 12, before the packaging structure is a good product can be screened, resulting in waste of the packaging process for the waste sheet. .
  • the pads 12 on the surface of the base body 10 exist independently before the packaging. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products (such as leakage current detection), and the waste substrate 10 can be directly eliminated, thereby avoiding process waste and improving output.
  • WLPSAW wafer level packaging surface acoustic wave
  • the packaging method of WLPSAW filter includes:
  • a metal connecting pillar 20 is formed on the surface of the pad 12, the side of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 is connected to the pad 12, and the metal connecting pillar 20 is used in the transmission substrate 10. Electrical signal.
  • the pad 12 is provided on the first surface A of the base 10.
  • a wire bonding process is used to form a metal connection pillar 20 on the surface of the bonding pad 12.
  • the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
  • the base 10 is a chip, and the first surface A of the base 10 is also provided with an interdigital transducer 16.
  • the side surface of the metal connecting pillar 20 formed by the wire bonding process is curved, and the metal connecting pillar 20 is located on the surface of the pad 12 and is electrically connected to the pad 12.
  • the so-called interdigital transducer 16 is formed on the surface of the substrate 10 with a metal pattern shaped like the fingers of two hands, and its function is to realize acoustic-electric transduction.
  • FIGS. 10a and 10c a first insulating layer 30 is formed on the first surface of the base body 10.
  • the first insulating layer 30 has a first via 32 and a second via 33, and the first via 32 and the second Both via holes 33 penetrate the first insulating layer 30.
  • FIG. 10a is a schematic structural diagram of a first insulating layer provided by an embodiment of the present application. Wherein, the metal connecting post 20 is disposed in the first via hole 32, and the interdigital transducer 16 is disposed in the second via hole 33.
  • a first via 32 and a second via 33 are formed on the first insulating layer 30.
  • the first via 32 penetrates the first insulating layer 30.
  • the first via hole 32 is used for accommodating the pad 12 and the metal connecting pillar 20, that is, the first via hole 32 is a space on the first insulating layer 30 for accommodating the pad 12 and the metal connecting pillar 20.
  • the second via 33 penetrates the first insulating layer 30.
  • the second via hole 33 is used for accommodating the interdigital transducer 16, that is, on the first insulating layer 30, the second via hole 33 is a space for accommodating the interdigital transducer 16.
  • the first via 32 and the second via 33 may be formed in the same patterning process, or may be formed separately.
  • the first insulating layer 30 covers the first surface of the base 10, the first insulating layer 30 exposes the metal connecting pillars 20 and the interdigital transducer 16, and the metal connecting pillars 20 and the second
  • the side surface contacted by an insulating layer 30 is a curved surface.
  • the first insulating layer 30 is equivalent to a wall serving as a protective cavity for placing the interdigital transducer 16, and no other components are provided on the surface of the interdigital transducer 16 (as shown in FIG. 10a).
  • the material constituting the first insulating layer 30 may be, for example, polyimide (PI), epoxy resin or the like.
  • the first insulating layer 30 may be formed by a patterning process.
  • a first insulating film layer 31 may be formed on the first surface of the base 10 through a lamination process; then, through a photolithography process (including photoresist coating, exposure, development, One or more of the etching and photoresist stripping process), the first via hole and the second via hole 33 are formed on the first insulating film layer 31 to form the first insulating layer 30.
  • a first insulating film layer 31 may be formed on the first surface of the substrate 10 through a spin coating process, and the first insulating film layer 31 exposes the metal connecting pillars 20;
  • a second via hole 33 is formed on the first insulating film layer 31, and the second via hole 33 exposes the interdigital transducer 16 to form the first insulating layer 30.
  • the thickness of the first insulating layer 30 is less than or equal to 30 microns.
  • the thickness of the metal connecting pillar 20 is less than or equal to 50 microns.
  • the thickness difference between the metal connecting pillar 20 and the first insulating layer is less than or equal to 50, further, the thickness difference is less than or equal to 40, and further, the thickness difference is less than or equal to 30.
  • the first insulating film layer 31 formed by the spin coating process can directly expose the metal connecting pillars 20, and the formed first insulating film layer 31 directly has the first via 31, which is equivalent to eliminating the need for a photolithography process or laser
  • the step of forming the first via hole 32 on the first insulating film layer 31 by the hole-opening process can save materials when forming the first insulating layer 30 and simplify the process difficulty.
  • the first insulating layer 30 may be formed by a laser opening process.
  • the first insulating film 31 is first formed by the above-mentioned lamination process or the spin coating process, and then the first via 32 and the second via 33 are formed by the laser opening process, which will not be repeated here.
  • a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates through the second insulating layer.
  • the insulating layer 40 is connected to the first via hole; a part of the metal connecting pillar 20 is disposed in the first via hole, and another part of the metal connecting pillar 20 is disposed in the third via hole 42.
  • a third via 42 is formed on the second insulating layer 40.
  • the third via hole 42 is formed through the second insulating layer 40, and the third via hole 42 is used to accommodate the metal connecting pillar 20, that is, the third via hole 42 is the second insulating layer 40.
  • the upper space is used for accommodating the metal connecting column 20.
  • the third via hole 42 and the first via hole may be formed in the same patterning process, or may be formed separately.
  • the second insulating layer 40 covers the first insulating layer 30, the metal connecting pillars 20 penetrate the first insulating layer 30 and the second insulating layer 40, and the metal connecting pillars 20 are arranged in the first insulating layer.
  • the hole 32 and the third via hole 33 form a communicating hole, and the second insulating layer 40 exposes the end of the metal connecting pillar 20. Since the shape of the metal connecting column 20 has been fixed (the side surface is a curved surface), the side surface of the metal connecting column 20 in contact with the second insulating layer 40 is a curved surface.
  • a protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q.
  • the second insulating layer 40 is equivalent to the roof of the protective cavity Q for placing the interdigital transducer 16, and the second insulating layer 40 is not in contact with the surface of the interdigital transducer 16.
  • a protection cavity Q is formed between the second insulating film layer 41, the second via 33 on the first insulating layer 30 and the base 10. Then, a patterning process or a laser opening process is used to form a third via hole 42 on the second insulating film layer 41, and the third via hole 42 exposes the metal connecting pillar 20 to form the second insulating layer 40.
  • the metal connecting pillars 20 in the first direction X (the first direction X is a direction perpendicular to the base 10, or understood as the direction in which the base 10, the first insulating layer 30, and the second insulating layer 40 are stacked in sequence), the metal connecting pillars 20 and The size (thickness) relationship between the first insulating layer 30 and the second insulating layer 40.
  • the surface a2 is flush. That is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the process requirements for forming the metal connecting pillar 20 are relatively high.
  • the post 20, the first insulating layer 30 and the second insulating layer 40 require process accuracy to reduce the process difficulty.
  • the surface a2 of the base 10, that is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the process requirements for forming the metal connecting pillar 20 are relatively high.
  • the post 20, the first insulating layer 30 and the second insulating layer 40 require process accuracy to reduce the process difficulty.
  • the surface a2 of the base 10, that is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the thickness of the metal connecting pillar 20 along the first direction X is too small, when the first insulating layer 30 exposes the metal connecting pillar 20, the processing process is complicated.
  • the second insulating layer 30 covers the metal connecting pillars 20 thickly, the second insulating layer 30 will expose the metal connecting pillars 20, and the processing time will be longer.
  • the thickness of the metal connecting pillar 20 along the first direction X is too large, and when the second insulating layer 40 exposes the metal connecting pillar 20, the processing process is complicated. As shown in FIG.
  • the thickness of the metal connecting pillar 20 along the first direction X is h1
  • the thickness of the first insulating layer 30 along the first direction X is h2
  • the second insulating layer The thickness of 40 along the first direction X is h3, the thickness h1 of the metal connecting pillar 20 along the first direction X ranges from the value range of the thickness h2 of the first insulating layer 30 along the first direction X to the second insulating layer 40.
  • h1 ((h2+h3)-5 ⁇ m) ⁇ ((h2+h3)+5 ⁇ m), that is, the metal connecting post 20 is along the first
  • the thickness h1 in the direction X ranges between ((h2+h3)-5 ⁇ m) and ((h2+h3)+5 ⁇ m), that is, the minimum value of h1 is (h2+h3)-5 ⁇ m, The maximum value is (h2+h3)+5 ⁇ m.
  • the WLPSAW filter provided in FIG. 11a to FIG. 11d is illustrated by using the second insulating layer 40 as a single-layer film, which has fewer process steps, simple structure, and high preparation efficiency.
  • the thickness h3 of the second insulating layer 40 along the first direction X can be about 10-40 ⁇ m. As shown in FIG. The first sub-insulating layer 43 and the first sub-insulating layer 43 expose the metal connecting pillars 20. If the thickness h4 of the first sub-insulating layer 43 in the first direction X is too small due to the limitation of the lamination process or due to other factors, the thickness h1 of the metal connecting pillar 20 in the first direction X is not in the range of (h2 Within +h4)-5 ⁇ (h2+h4)+5 ⁇ m, at least one second sub-insulating layer 44 may be formed on the side of the first sub-insulating layer 43 away from the first insulating layer 30.
  • At least one second sub-insulating layer 44 may be formed on the side of the first sub-insulating layer 43 away from the first insulating layer 30, the first sub-insulating layer 43 and at least one layer
  • the second sub-insulating layer 44 serves as the second insulating layer 40
  • the sum of the thicknesses of the first sub-insulating layer 43 and at least one layer of the second sub-insulating layer 44 along the first direction X serves as the second insulating layer 40 along the first direction.
  • the thickness on X is h3.
  • the thicknesses of the first sub-insulating layer 43 and the second sub-insulating layer 44 in the first direction X may be equal, or both may be different, and some may be equal or some may be unequal, which is not limited in this application.
  • the thickness of the finally formed second insulating layer 40 can meet the requirements, and the requirements for the thickness of each layer of the first sub-insulating layer 43 and the second sub-insulating layer 44 can be reduced. Reduce the application difficulty of the process.
  • the first sub-insulating film layer in order to form the accommodating cavity Q between the first sub-insulating layer 43 and the first insulating layer 30, can be formed by a lamination process, and a lamination process or spin coating can be used.
  • the second sub-insulating film layer is formed by a film process; then, a photolithography process or a laser opening process is used to form a third via hole 42 penetrating the first sub-insulating film layer and the second sub-insulating film layer to form the first sub-insulating layer and The second sub-insulating layer; wherein the second insulating layer 40 includes a first sub-insulating layer 43 and a second sub-insulating layer 44.
  • the second insulating layer 40 further includes a third sub-insulating layer, a fourth sub-insulating layer, ... the Nth sub-insulating layer, where N is a positive integer.
  • the third sub-insulating layer, the fourth sub-insulating layer, ... the Nth sub-insulating layer are formed using the same method as described above.
  • the first sub-insulating thin film layer in order to form the accommodating cavity Q between the first sub-insulating layer 43 and the first insulating layer 30, can be formed by a lamination process, and then a photolithography process or laser opening can be used.
  • the hole process forms part of the third via hole 42 penetrating the first sub-insulating film layer to form the first sub-insulating layer 43;
  • the second sub-insulating film layer can be formed by a lamination process or a spin coating process, and then a photolithography process is used
  • the laser drilling process forms another part of the third via 42 penetrating the second sub-insulating film layer to form the second sub-insulating layer 44; wherein the second insulating layer 40 includes the first sub-insulating layer 43 and the second sub-insulating layer 44 .
  • the second insulating layer 40 further includes a third sub-insulating layer, a fourth sub-insulating layer,... An Nth sub-insulating layer, where N is a positive integer.
  • the third sub-insulating layer, the fourth sub-insulating layer, ... the Nth sub-insulating layer are formed using the same method as described above.
  • the first sub-insulating layer 43, the first insulating layer 30 and the base 10 constitute the protection cavity Q.
  • first sub-insulating layer 43, the second sub-insulating layer 44, ... the Nth sub-insulating layer are only a name for explaining the structure of the package structure, that is, the first insulating layer 30 is far away
  • Multiple insulating layers can be provided on one side of the base 10.
  • the first sub-insulating layer 43 and the second sub-insulating layer 44 can also be referred to as the second insulating layer and the third insulating layer.
  • the third insulating layer has a fourth via, the fourth via penetrates the third insulating layer, and the fourth via The hole communicates with the third via hole; part of the metal connecting pillar 20 is disposed in the fourth via hole.
  • the formation method of the third insulating layer may be the same as the formation method of the second insulating layer 40, which will not be repeated here.
  • step S14 may be performed. Step S14 is not essential and can be replaced with other steps.
  • solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
  • the solder ball 14 is located on the surface of the metal connection pillar 20 and is electrically connected to the metal connection pillar 20, the pad 12 is located at one end of the metal connection pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, components outside the package structure are connected to the metal connecting pillar 40 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
  • WLPSAW filters are generally used in system-in-a-package (SIP) modules of the RF front-end.
  • SIP system-in-a-package
  • a patterning process is required.
  • a wall 51 and a roof 52 are formed on the first surface.
  • the wall 51 and the roof 52 form a protective cavity Q for accommodating the interdigital transducer 16 and expose the pad 12.
  • an electroplating process is used to form a metal connector 53 electrically connected to the pad 12 to realize signal transmission between the base 10 and the solder balls 14.
  • the dimensions of the surrounding wall layer 51 and the roof layer 52 along the first direction X are both about 10-40 um.
  • deep hole electroplating is required, which increases the difficulty of electroplating and increases the processing cost.
  • a wire bonding process is first used to form the metal connecting pillar 20, and then the first insulating layer 30 and the second insulating layer 40 are formed.
  • the first insulating film covering the metal connecting pillar 20 is The thin film 31 and the second insulating film 41 are relatively thin, and etching them to expose the metal connecting pillars 20 can increase the processing speed.
  • the embodiment of the present application adopts a wire bonding process to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used in the related art to form the filling metal 13, it is necessary to form a barrier layer and a barrier layer on the surface of the pad 12 first.
  • the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost.
  • the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
  • the packaging method provided by the embodiment of the present application when used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no electroplating bridge 15 shown in FIG. 1b. . Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
  • an electroplating process is used to form the via-filling metal 13 for packaging.
  • Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the electroplating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, resulting in waste of the packaging process for the waste chips.
  • the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
  • the third embodiment also illustrates the packaging method of the WLPSAW filter, but the difference between the third embodiment and the second embodiment is that the packaging steps are different.
  • the first insulating layer 30 is formed first, then the metal connecting pillar 20 is formed, and then the second insulating layer is formed. ⁇ 40.
  • the packaging method of WLPSAW filter includes:
  • a first insulating layer 30 is formed on the first surface of the substrate 10.
  • the first insulating layer 30 has a first via 32 and a second via 33, and a first via 32 and a second via The holes 33 all penetrate the first insulating layer 30.
  • the base 10 includes a pad 12 and an interdigital transducer 16, and both the pad 12 and the interdigital transducer 16 are disposed on the first surface A of the base 10.
  • the first insulating layer 30 covers the first surface of the base 10, and both the first via 32 and the second via 33 penetrate the first insulating layer 30.
  • the metal connecting pillar 20 to be formed is in contact with the entire pad 12, as shown in FIG. 15a, the pad 12 is disposed in the first via 32, and the first via 32 exposes the entire pad 12.
  • the first via 32 exposes the pad 12, but the first via 32 only exposes a part of the pad 12.
  • the interdigital transducer 16 is disposed in the second via hole 33 and the second via hole 33 exposes the interdigital transducer 16.
  • the shapes of the first via 32 and the second via 33 are merely illustrative, and are not limited in any way.
  • the first insulating layer 30 may be formed by a patterning process or a laser opening process.
  • a wire bonding process is used to form a metal connecting pillar 20 on the surface of the pad 12, the side of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 is connected to the pad 12, and the metal connecting pillar 20 It is used to transmit the electrical signal of the base 10.
  • the first insulating layer 30 formed in step S21 exposes the pad 12. Therefore, after step S22 is performed, the metal connecting pillar 20 is located in the first via 32 of the first insulating layer 30, and the first insulating layer 30 still exposes the metal. Connect the column 20. Based on this, after performing step S22, as shown in FIG. 15c, the metal connecting pillar 20 is located on the surface of the pad 12 and is electrically connected to the pad 12, the first insulating layer 20 covers the first surface of the base 10, and the first The insulating layer 30 exposes the metal connection pillar 20.
  • the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
  • the side surface of the metal connecting pillar 20 formed by the wire bonding process is curved (for example, a spherical surface), because when the metal connecting pillar 20 is formed, the molten metal is dropped onto the surface of the pad 12, Then cool quickly.
  • the fluidity of the metal in the molten state is relatively small. Therefore, the shape of the metal connecting pillar 20 after cooling is affected by the wire bonding process, and is not affected by the shape of the first via 32.
  • the pad 12 in order to reduce the possibility of water and oxygen entering from the gap between the side surface of the metal connecting pillar 20 and the hole wall of the first via 32, the pad 12 is corroded. As shown in FIG. 15c, the side surface of the metal connecting pillar 20 is in contact with the hole wall of the first via hole 32. It can be understood that, in this case, the metal connecting pillar 20 and the first via 32 may be completely attached to each other, or may be partly in contact with each other, depending on the shape of the first via 32.
  • the metal connecting column 20 in order to reduce the requirements on the process accuracy of the size of the metal connecting column 20, it is avoided that the metal connecting column 20 cannot be placed in the first via 32 due to a slight size error. As shown in FIG. 15d, there is a gap between the side surface of the metal connecting column 20 and the hole wall of the first via hole 32.
  • a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates the second insulating layer 40 And it communicates with the first via hole 32; a part of the metal connecting column 20 is disposed in the first via hole, and a part is disposed in the third via hole 42.
  • the second insulating layer 40 covers the first insulating layer 30, the metal connecting post 20 is disposed in the communicating hole formed by the first via 32 and the third via 42, and the second insulating The layer 40 exposes the metal connecting pillar 20, a protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q.
  • the metal connecting pillar 20 is formed first, then the second insulating layer 40 is formed. Therefore, the shape of the side surface of the metal connecting pillar 20 in contact with the second insulating layer 40 is determined by the shape of the metal connecting pillar 20.
  • the method of forming the second insulating layer 40 can be the same as the method of forming the second insulating layer 40 in the second embodiment.
  • the second insulating film 41 is formed by a lamination process, and then the third via 42 is formed by a photolithography process or a laser opening process to form the second insulating layer 40.
  • the second insulating film 41 is formed by the lamination process, since the insulating film is away from the first insulating layer 30, there is a carrier film with greater hardness.
  • the third via 42 in this embodiment is the same as the third via 43 in the second embodiment, and will not be repeated here.
  • the metal connecting pillar 20 is far away from the base 10
  • the surface a1 is flush with the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 The total thickness of the second insulating layer 40.
  • FIG. 15f the metal connecting pillar 20 is far away from the base 10
  • the surface a1 is flush with the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 The total thickness of the second insulating layer 40.
  • the surface a1 of the metal connecting pillar 20 away from the base 10 is higher than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12
  • the sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the surface a1 of the metal connecting pillar 20 away from the base 10 is lower than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12
  • the sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the thickness of the metal connecting pillar 20 along the first direction X is h1
  • the thickness of the first insulating layer 30 along the first direction X is h2
  • the thickness of the second insulating layer 30 along the first direction X is h2.
  • the thickness of the insulating layer 40 along the first direction X is h3, and the thickness h1 of the metal connecting pillar 20 along the first direction X ranges from ((h2+h3)-5 ⁇ m) and ((h2+h3)+5 ⁇ m ), that is, the minimum value of h1 is (h2+h3)-5 ⁇ m, and the maximum value is (h2+h3)+5 ⁇ m.
  • step S24 may be performed, or this step may not be performed, and the completed packaged structure is directly connected to external components.
  • solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
  • the solder ball 14 is located on the surface of the metal connection pillar 20 and is electrically connected to the metal connection pillar 20, the pad 12 is located at one end of the metal connection pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, the external components of the package structure are connected to the metal connecting pillar 20 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
  • a wire bonding process is used to form the metal connecting post 20 with a curved side surface.
  • a barrier layer and a seed layer need to be formed on the surface of the pad 12 first.
  • the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost.
  • the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
  • the second insulating film 41 covering the metal connecting pillar 20 is relatively thin, and the etching speed to expose the metal connecting pillar 20 can increase the processing speed.
  • the packaging method provided by the embodiment of the present application is used for packaging, the multiple pads 12 on the surface of the base body 10 exist independently before the packaging, and there is no electroplating bridge 15 shown in FIG. 1b. Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
  • an electroplating process is used to form the via-filling metal 13 for packaging.
  • Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the plating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, which results in waste of the packaging process for the waste chips.
  • the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
  • the fourth embodiment also illustrates the packaging method of the WLPSAW filter, but the difference between the fourth embodiment and the second embodiment is that the packaging steps are different.
  • the first insulating layer 30 is formed first, then the second insulating layer 40 is formed, and then the metal connection is formed. ⁇ 20 ⁇ Post 20.
  • the packaging method of the WLPSAW filter includes:
  • a first insulating layer 30 is formed on the first surface of the substrate 10.
  • the first insulating layer 30 has a first via 32 and a second via 33, and the first via 32 and a second via The holes 33 all penetrate the first insulating layer 30.
  • the base 10 includes a pad 12 and an interdigital transducer 16, and both the pad 12 and the interdigital transducer 16 are disposed on the first surface A of the base 10.
  • the first insulating layer 30 covers the first surface of the base 10, and both the first via 32 and the second via 33 penetrate the first insulating layer 30.
  • the metal connecting pillar 20 to be formed is in contact with the entire pad 12, as shown in FIG. 15a, the pad 12 is disposed in the first via 32, and the first via 32 exposes the entire pad 12.
  • the first via 32 exposes the pad 12, but the first via 32 only exposes a part of the pad 12.
  • the interdigital transducer 16 is disposed in the second via hole 33, and the second via hole 33 exposes the interdigital transducer 16.
  • the first insulating layer 30 may be formed through a patterning process or a laser opening process.
  • the shapes of the first via 32 and the second via 33 are merely illustrative, and are not limited in any way.
  • a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates the second insulating layer 40 And it communicates with the first via hole 32.
  • a protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q.
  • a wire bonding process is used to form a metal connection post 20 on the surface of the pad 12, the side of the metal connection post 20 is curved, and the metal connection post 20 is connected to the pad 12, and the metal connection post 20 It is used to transmit the electrical signal of the base 10.
  • a part of the metal connecting post 20 is disposed in the first via 32, a part is disposed in the third via 42, and the metal connecting post 20 is disposed in the first via 32 and the third via 42.
  • the communicating hole In the communicating hole.
  • the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
  • the side surface of the metal connecting pillar 20 formed by the wire bonding process is curved (for example, a spherical surface), because when the metal connecting pillar 20 is formed, the molten metal is dropped onto the surface of the pad 12, Then cool quickly. The fluidity of the metal in the molten state is relatively small. Therefore, the shape of the cooled metal connecting pillar 20 is affected by the wire bonding process, and is not affected by the shape of the first via 32 and the third via 42.
  • the pad 12 in order to reduce the possibility of water and oxygen entering from the gap between the side surface of the metal connecting pillar 20 and the hole wall of the first via 32, the pad 12 is corroded. As shown in FIG. 17b, the side surface of the metal connecting post 20 is in contact with at least one of the hole wall of the first via 32 and the hole wall of the second via 42.
  • the metal connecting pillar 20 is far away from the base 10
  • the surface a1 is flush with the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 The total thickness of the second insulating layer 40.
  • the surface a1 of the metal connecting pillar 20 away from the base 10 is higher than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12
  • the sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the surface a1 of the metal connecting pillar 20 away from the base 10 is lower than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12 and the thickness of the metal connecting pillar 20
  • the sum of the thicknesses is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
  • the thickness of the metal connecting pillar 20 along the first direction X is h1
  • the thickness of the first insulating layer 30 along the first direction X is h2
  • the thickness of the second insulating layer 30 along the first direction X is h2.
  • the thickness of the insulating layer 40 along the first direction X is h3, and the thickness h1 of the metal connecting pillar 20 along the first direction X ranges between (h2+h3)-5 ⁇ m and (h2+h3)+5 ⁇ m, That is, the minimum value of h1 is (h2+h3)-5 ⁇ m, and the maximum value is (h2+h3)+5 ⁇ m.
  • step S34 may be performed, or this step may not be performed, and the completed packaged structure is directly connected to external components.
  • solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
  • the solder ball 14 is located on the surface of the metal connecting pillar 20 and is electrically connected to the metal connecting pillar 20, the pad 12 is located at one end of the metal connecting pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, the external components of the package structure are connected to the metal connecting pillar 20 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
  • a wire bonding process is used to form the metal connecting post 20 with a curved side surface.
  • a barrier layer and a seed layer need to be formed on the surface of the pad 12 first.
  • the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost.
  • the metal connecting pillar 20 is in direct contact with the pad 12 without any other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
  • the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no electroplating bridge 15 shown in FIG. 1b. Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
  • an electroplating process is used to form the via-filling metal 13 for packaging.
  • Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the electroplating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, resulting in waste of the packaging process for the waste chips.
  • the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
  • the packaging structure can be electrically connected to the PCB board in the electronic device 1.
  • the PCB board is used to carry the above-mentioned packaging structure and complete signal interaction with the packaging structure to provide driving signals to the electronic device 1.
  • the packaging structure is not limited to be only applicable to the electronic device 1 shown in FIG. 2.

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Abstract

Disclosed are a packaging structure, a packaging method and an electronic device, relating to the technical field of semiconductor packaging. The packaging structure comprises: a substrate comprising a bonding pad, with the bonding pad being arranged on the first surface of the substrate; a metal connecting column arranged on the surface of the bonding pad and connected to the bonding pad; and a first insulating layer covering the first surface of the substrate, wherein the first insulating layer is provided with a first via hole penetrating the first insulating layer; part or all of the metal connecting column is arranged inside the first via hole; the side surface of the metal connecting column is a curved surface; and the metal connecting column is used for transmitting an electric signal of the substrate. The packaging structure, the packaging method and the electronic device can overcome the problem that it is impossible to carry out substrate performance detection due to short circuiting between pads during the preparation process.

Description

封装结构、封装方法及电子设备Packaging structure, packaging method and electronic equipment
本申请要求于2020年2月25日提交国家知识产权局、申请号为202010117628.5、申请名称为“封装结构、封装方法及电子设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of a Chinese patent application filed with the State Intellectual Property Office on February 25, 2020, the application number is 202010117628.5, and the application name is "encapsulation structure, packaging method, and electronic equipment". The entire content is incorporated into this by reference. Applying.
技术领域Technical field
本申请涉及半导体封装技术领域,尤其涉及一种封装结构、封装方法及电子设备。This application relates to the field of semiconductor packaging technology, and in particular to a packaging structure, packaging method, and electronic equipment.
背景技术Background technique
随着半导体技术的发展,低成本、高连接效果的封装结构成为封装技术的发展趋势。现有的封装结构,如图1a所示,在基体10表面形成绝缘层11,绝缘层11露出焊盘(pad)12。然后采用电镀工艺形成填孔金属13,以完成基体10与焊球14之间的信号传输,对基体10进行封装。With the development of semiconductor technology, low-cost, high-connectivity packaging structures have become the development trend of packaging technology. In the existing packaging structure, as shown in FIG. 1 a, an insulating layer 11 is formed on the surface of a base body 10, and the insulating layer 11 exposes a pad 12. Then, an electroplating process is used to form the hole-filling metal 13 to complete the signal transmission between the base 10 and the solder balls 14, and the base 10 is packaged.
然而,电镀工艺成本较高,导致生产成本较高。此外,如图1b所示,为了采用电镀工艺制备多个填孔金属,需要预留电镀桥15,并使基体10表面的各个焊盘12相连接,一起连接电镀槽的阴极18。然而,由于基体10表面的各个焊盘12相连接,使得多个焊盘12之间处于短路状态,与焊盘12电连接的导电部件之间也处于短路状态。从而导致在最终刻蚀电镀桥15以使各个焊盘12之间绝缘之前,由于焊盘12之间短路的原因无法进行基体10性能检测,造成废片工艺浪费。However, the high cost of the electroplating process leads to high production costs. In addition, as shown in FIG. 1b, in order to prepare a plurality of hole-filling metals by an electroplating process, it is necessary to reserve a plating bridge 15 and connect each pad 12 on the surface of the substrate 10 to connect the cathode 18 of the electroplating tank together. However, since the pads 12 on the surface of the base body 10 are connected, the plurality of pads 12 are in a short-circuit state, and the conductive components electrically connected to the pads 12 are also in a short-circuit state. As a result, before the plating bridge 15 is finally etched to insulate the bonding pads 12, the performance test of the substrate 10 cannot be performed due to the short circuit between the bonding pads 12, which results in waste of scrap process.
发明内容Summary of the invention
本申请实施例提供一种封装结构、封装方法及电子设备,克服制备过程中焊盘之间由于短路的原因,无法进行基体性能检测的问题。The embodiments of the present application provide a packaging structure, a packaging method, and an electronic device, which overcome the problem that the performance of the substrate cannot be tested due to short circuits between pads during the manufacturing process.
为达到上述目的,本实施例采用如下技术方案:In order to achieve the above objective, this embodiment adopts the following technical solutions:
第一方面,提供一种封装结构,包括:基体,基体包括焊盘;焊盘设置于基体的第一表面;金属连接柱,设置于焊盘的表面,并与焊盘连接;第一绝缘层,覆盖在基体的第一表面,第一绝缘层具有第一过孔,第一过孔贯穿第一绝缘层;部分的或者全部的金属连接柱设置于第一过孔内;其中,金属连接柱的侧面为曲面,金属连接柱用于传输基体的电信号。In a first aspect, a package structure is provided, including: a base, the base includes a pad; the pad is arranged on a first surface of the base; a metal connecting pillar is arranged on the surface of the pad and is connected to the pad; and a first insulating layer , Covering the first surface of the substrate, the first insulating layer has a first via hole, the first via hole penetrates the first insulating layer; part or all of the metal connecting pillars are arranged in the first via hole; wherein, the metal connecting pillar The side surface is curved, and the metal connecting post is used to transmit the electrical signal of the substrate.
此处,封装结构的基体中,位于基体表面的多个焊盘是独立存在的,没有电镀工艺所需的电镀桥,结构简单,也简化了封装结构的结构。而且,在封装完成后无需切断电镀桥,可简化工艺流程。再者,本申请提供的封装结构中的基体表面的焊盘独立存在。因此,在对基体进行封装之前,可以直接对基体进行良品筛选(如漏电流检测),直接淘汰废品的基体,无需等到封装完成后再进行良品筛选,可避免工艺浪费,能够降低成本。Here, in the base of the package structure, the multiple pads on the surface of the base are independent, there is no electroplating bridge required by the electroplating process, the structure is simple, and the structure of the package structure is also simplified. Moreover, there is no need to cut the plating bridge after the packaging is completed, which can simplify the process flow. Furthermore, the pads on the surface of the substrate in the package structure provided by the present application exist independently. Therefore, before encapsulating the substrate, the substrate can be directly screened for good products (such as leakage current detection), and waste substrates can be directly eliminated. There is no need to wait for good product screening after the packaging is completed, which can avoid process waste and reduce costs.
可选的,金属连接柱采用引线键合工艺制备而成。无需进行电镀工艺,故不需要设置电镀工艺所需要的电镀桥,工艺简单,成本低。Optionally, the metal connecting post is prepared by a wire bonding process. No electroplating process is required, so there is no need to set the electroplating bridge required by the electroplating process, the process is simple, and the cost is low.
可选的,金属连接柱的侧面为球面。通过电镀工艺制备金属连接柱时,先制备获得第一过孔,而金属连接柱的形状,是需要与第一过孔进行匹配的;而通过引线键合 工艺金属连接柱的过程,是先制备金属连接柱,再根据金属连接柱的形状形成匹配的第一过孔。通过引线键合工艺所得的金属连接柱的侧面是曲面或者球面或者其他形状,制备方法简单,节省成本。可选的,金属连接柱沿第一方向上的厚度大于第一绝缘层沿第一方向上的厚度;其中,第一方向为垂直于基体的方向。这样一来,无需将金属连接柱精准的设置为与第一绝缘层平齐,允许适当的工艺误差,可降低金属连接柱的制备难度。Optionally, the side surface of the metal connecting column is a spherical surface. When the metal connecting pillar is prepared by the electroplating process, the first via is prepared first, and the shape of the metal connecting pillar needs to be matched with the first via; and the metal connecting pillar through the wire bonding process is prepared first The metal connecting column is then formed with a matching first via hole according to the shape of the metal connecting column. The side surface of the metal connecting column obtained by the wire bonding process is curved or spherical or other shapes, the preparation method is simple, and the cost is saved. Optionally, the thickness of the metal connecting pillar in the first direction is greater than the thickness of the first insulating layer in the first direction; wherein, the first direction is a direction perpendicular to the substrate. In this way, there is no need to accurately set the metal connecting pillars to be flush with the first insulating layer, allowing appropriate process errors, and reducing the difficulty of preparing the metal connecting pillars.
可选的,金属连接柱沿第一方向上的厚度小于第一绝缘层沿第一方向上的厚度;其中,第一方向为垂直于基体的方向。这样一来,无需将金属连接柱精准的设置为与第一绝缘层平齐,允许适当的工艺误差,可降低金属连接柱的制备难度。Optionally, the thickness of the metal connecting pillar in the first direction is smaller than the thickness of the first insulating layer in the first direction; wherein, the first direction is a direction perpendicular to the substrate. In this way, there is no need to accurately set the metal connecting pillars to be flush with the first insulating layer, allowing appropriate process errors, and reducing the difficulty of preparing the metal connecting pillars.
可选的,基体为芯片。Optionally, the substrate is a chip.
可选的,基体还包括叉指换能器,叉指换能器设置于基体的第一表面;第一绝缘层还具有第二过孔,第二过孔贯穿第一绝缘层;叉指换能器设置于第二过孔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, the base body further includes an interdigital transducer, which is arranged on the first surface of the base body; the first insulating layer further has a second via hole, and the second via hole penetrates the first insulating layer; the interdigital transducer The energy device is arranged in the second via hole. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
可选的,封装结构还包括:第二绝缘层;第二绝缘层设置于第一绝缘层的表面,第二绝缘层具有第三过孔,第三过孔贯穿第二绝缘层且与第一过孔连通;部分的金属连接柱设置于第三过孔内。可适用于包括多层绝缘层的封装结构,适用范围广。Optionally, the package structure further includes: a second insulating layer; the second insulating layer is disposed on the surface of the first insulating layer, the second insulating layer has a third via, and the third via penetrates the second insulating layer and is connected to the first insulating layer. The via holes are connected; part of the metal connecting posts are arranged in the third via holes. It can be applied to packaging structures including multiple insulating layers and has a wide range of applications.
可选的,第二绝缘层、第一绝缘层和基体之间形成有保护腔,叉指换能器位于保护腔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
可选的,焊盘的厚度和金属连接柱的厚度的总和,大于或小于第一绝缘层的厚度和第二绝缘层的厚度的总和。这样一来,无需将金属连接柱精准的设置为与第二绝缘层平齐,允许适当的工艺误差,可降低金属连接柱的制备难度。Optionally, the sum of the thickness of the pad and the thickness of the metal connecting pillar is greater than or less than the sum of the thickness of the first insulating layer and the thickness of the second insulating layer. In this way, there is no need to accurately set the metal connecting pillars to be flush with the second insulating layer, allowing appropriate process errors, and reducing the difficulty of preparing the metal connecting pillars.
可选的,金属连接柱沿第一方向上的厚度为h1,第一绝缘层沿第一方向上的厚度为h2,第二绝缘层沿第一方向上的厚度为h3,其中,h1=((h2+h3)-5μm)~((h2+h3)+5μm);其中,第一方向为垂直于基体的方向。金属连接柱沿第一方向上的尺寸太小,第一绝缘层要露出金属连接柱时,加工工艺复杂。并且,第二绝缘层对金属连接柱覆盖较厚时,第二绝缘层要露出金属连接柱,加工时长较长。通过限定金属连接柱与第一绝缘层和第二绝缘层的厚度之和的差值,降低加工时长,降低加工工艺的复杂度。Optionally, the thickness of the metal connecting pillar in the first direction is h1, the thickness of the first insulating layer in the first direction is h2, and the thickness of the second insulating layer in the first direction is h3, where h1=( (h2+h3)-5μm)~((h2+h3)+5μm); wherein, the first direction is a direction perpendicular to the substrate. The size of the metal connecting pillar along the first direction is too small, and the processing process is complicated when the first insulating layer exposes the metal connecting pillar. In addition, when the second insulating layer covers the metal connecting pillars thickly, the second insulating layer exposes the metal connecting pillars, and the processing time is longer. By limiting the difference between the thickness of the metal connecting column and the sum of the thickness of the first insulating layer and the second insulating layer, the processing time is reduced and the complexity of the processing process is reduced.
可选的,第二绝缘层包括第一子绝缘层和第二子绝缘层;第一子绝缘层与第一绝缘层直接接触,第一子绝缘层、第一绝缘层和基体构成保护腔。可降低对制备第二绝缘层时工艺的要求,扩宽工艺的适用范围。Optionally, the second insulating layer includes a first sub-insulating layer and a second sub-insulating layer; the first sub-insulating layer is in direct contact with the first insulating layer, and the first sub-insulating layer, the first insulating layer and the substrate constitute a protective cavity. It can reduce the requirements for the process when preparing the second insulating layer, and broaden the application range of the process.
可选的,第一绝缘层包括有机绝缘材料。有机绝缘材料的制备工艺简单,且性能稳定,成本低。Optionally, the first insulating layer includes an organic insulating material. The preparation process of the organic insulating material is simple, the performance is stable, and the cost is low.
可选的,第二绝缘层包括有机绝缘材料。有机绝缘材料的制备工艺简单,且性能稳定,成本低。Optionally, the second insulating layer includes an organic insulating material. The preparation process of the organic insulating material is simple, the performance is stable, and the cost is low.
可选的,金属连接柱包括金或银。可降低金属连接柱的电阻,提高金属连接柱的延展性。Optionally, the metal connecting post includes gold or silver. The resistance of the metal connecting column can be reduced, and the ductility of the metal connecting column can be improved.
可选的,封装结构还包括焊球;焊盘设置于金属连接柱的一端,焊球相对于焊盘 设置于金属连接柱的另一端,焊球与金属连接柱连接,用于传输基体的电信号。封装结构外部的部件可以通过焊球与金属连接柱进行连接,可将基体上的信号通过焊球传输至与焊球连接的部件。Optionally, the package structure further includes a solder ball; the pad is disposed at one end of the metal connection post, the solder ball is disposed at the other end of the metal connection post relative to the pad, and the solder ball is connected to the metal connection post to transmit electricity from the substrate Signal. The external components of the package structure can be connected with the metal connection posts through solder balls, and the signals on the substrate can be transmitted to the components connected with the solder balls through the solder balls.
可选的,所述基体为芯片,基体上还设置有叉指换能器,叉指换能器设置于基体的第一表面;第一绝缘层还具有第二过孔,第二过孔贯穿第一绝缘层;叉指换能器设置于第二过孔内;封装结构还包括:第二绝缘层;第二绝缘层设置于第一绝缘层的表面,第二绝缘层具有第三过孔,第三过孔贯穿第二绝缘层且与第一过孔连通;部分的金属连接柱设置于第三过孔内;第二绝缘层、第一绝缘层和基体之间形成有保护腔,叉指换能器位于保护腔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, the substrate is a chip, and an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on the first surface of the substrate; the first insulating layer further has a second via hole through which the second via hole penetrates The first insulating layer; the interdigital transducer is arranged in the second via; the package structure further includes: a second insulating layer; the second insulating layer is arranged on the surface of the first insulating layer, and the second insulating layer has a third via , The third via hole penetrates the second insulating layer and communicates with the first via; part of the metal connecting pillar is arranged in the third via; a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and Means that the transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
第二方面,提供一种电子设备,包括PCB板,还包括第一方面任一项的封装结构,封装结构与PCB板电连接。可简化电子设备的结构,降低电子设备的成本。In a second aspect, an electronic device is provided, including a PCB board, and further including the packaging structure of any one of the first aspects, and the packaging structure is electrically connected to the PCB board. The structure of the electronic device can be simplified, and the cost of the electronic device can be reduced.
可选的,电子设备还包括显示模组、中框以及盖板;显示模组的出光面朝向盖板,显示模组的背面朝向中框;PCB板设置于中框远离显示模组的表面。封装结构可适用于显示用电子设备,可降低显示用电子设备的成本。Optionally, the electronic device further includes a display module, a middle frame and a cover plate; the light emitting surface of the display module faces the cover plate, and the back of the display module faces the middle frame; the PCB board is arranged on the surface of the middle frame away from the display module. The packaging structure can be applied to electronic devices for display, and the cost of electronic devices for display can be reduced.
第三方面,提供一种封装结构的封装方法,封装结构包括基体,基体包括焊盘,焊盘设置于基体的第一表面;封装方法包括:在焊盘的表面形成金属连接柱;金属连接柱采用引线键合工艺形成;金属连接柱的侧面为曲面,金属连接柱与焊盘连接,金属连接柱用于传输基体的电信号;在基体的第一表面形成第一绝缘层;第一绝缘层具有第一过孔,第一过孔贯穿第一绝缘层;部分的或者全部的金属连接柱设置于第一过孔内。本申请实施例提供的封装方法,是采用引线键合工艺形成侧面为曲面的金属连接柱,相比于采用的电镀工艺形成填孔金属时,需要先在焊盘表面形成阻挡层和种子层的方法,本申请实施例提供的封装方法形成金属连接柱的工艺简单,成本较低。并且,金属连接柱与焊盘直接接触,中间不夹杂其他膜层(例如种子层或阻挡层),可降低因膜层断裂导致金属连接柱与焊盘连接不稳定的风险。此外,采用本申请实施例提供的封装方法进行封装时,在封装之前,位于基体表面的多个焊盘是独立存在的,没有电镀桥。因此,在封装完成后无需切断电镀桥,可简化工艺流程。In a third aspect, a packaging method of a packaging structure is provided. The packaging structure includes a base, the base includes a pad, and the pad is disposed on a first surface of the base; the packaging method includes: forming a metal connecting pillar on the surface of the pad; It is formed by wire bonding process; the side of the metal connecting pillar is curved, and the metal connecting pillar is connected to the pad. The metal connecting pillar is used to transmit the electrical signal of the base; the first insulating layer is formed on the first surface of the base; the first insulating layer There is a first via hole, the first via hole penetrates the first insulating layer; part or all of the metal connection pillars are arranged in the first via hole. The packaging method provided by the embodiments of the present application uses a wire bonding process to form a metal connecting column with a curved side surface. Compared with the electroplating process used to form the hole-filling metal, it is necessary to form a barrier layer and a seed layer on the surface of the pad. In the method, the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar and has a low cost. In addition, the metal connecting pillars are in direct contact with the pads, and other film layers (such as seed layers or barrier layers) are not interposed therebetween, which can reduce the risk of unstable connections between the metal connecting pillars and the pads due to film layer fracture. In addition, when the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads on the surface of the substrate exist independently, and there is no electroplating bridge. Therefore, there is no need to cut the plating bridge after the packaging is completed, which can simplify the process flow.
可选的,在焊盘的表面形成金属连接柱之后,在基体的第一表面形成第一绝缘层。这样一来,无需要求金属连接柱精准的形成在第一绝缘层上的第一过孔中,可降低对形成金属连接柱时的对位精度的要求。并且,通过电镀工艺制备金属连接柱时,先制备获得第一过孔,而金属连接柱的形状,是需要与第一过孔进行匹配的;而通过引线键合工艺金属连接柱的过程,是先制备金属连接柱,再根据金属连接柱的形状形成匹配的第一过孔。通过引线键合工艺所得的金属连接柱的侧面是曲面或者球面或者其他形状,制备方法简单,节省成本。Optionally, after forming the metal connecting pillar on the surface of the pad, a first insulating layer is formed on the first surface of the base body. In this way, there is no need to accurately form the metal connecting pillars in the first via holes on the first insulating layer, which can reduce the requirement on the alignment accuracy when forming the metal connecting pillars. In addition, when the metal connecting pillar is prepared by the electroplating process, the first via is prepared first, and the shape of the metal connecting pillar needs to be matched with the first via; and the metal connecting pillar through the wire bonding process is The metal connecting pillar is prepared first, and then the matching first via hole is formed according to the shape of the metal connecting pillar. The side surface of the metal connecting column obtained by the wire bonding process is curved or spherical or other shapes, the preparation method is simple, and the cost is saved.
可选的,基体为芯片,基体还包括叉指换能器;叉指换能器设置于基体的第一表面;在基体的第一表面形成的第一绝缘层还具有第二过孔,第二过孔贯穿第一绝缘层,叉指换能器位于第二过孔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, the substrate is a chip, and the substrate further includes an interdigital transducer; the interdigital transducer is arranged on the first surface of the substrate; the first insulating layer formed on the first surface of the substrate further has a second via hole. The two via holes penetrate the first insulating layer, and the interdigital transducer is located in the second via hole. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
可选的,封装方法还包括:在第一绝缘层远离基体的一侧形成第二绝缘层;第二 绝缘层具有第三过孔,第三过孔贯穿第二绝缘层,第三过孔与第一过孔连通;部分的金属连接柱设置于第三过孔内。可适用于包括多层绝缘层的封装结构,适用范围广。Optionally, the packaging method further includes: forming a second insulating layer on a side of the first insulating layer away from the base; the second insulating layer has a third via hole, the third via hole penetrates the second insulating layer, and the third via hole is connected to The first via hole communicates; part of the metal connection pillars are arranged in the third via hole. It can be applied to packaging structures including multiple insulating layers and has a wide range of applications.
可选的,第二绝缘层、第一绝缘层和基体之间形成有保护腔,叉指换能器位于保护腔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
可选的,在第一绝缘层远离基体的一侧形成第二绝缘层,包括:在第一绝缘层远离基体的表面形成第二绝缘薄膜层,第二绝缘薄膜层采用层压工艺形成;在第二绝缘薄膜层上形成第三过孔,以形成第二绝缘层。采用层压工艺形成第二绝缘薄膜层,可以一种较为简单成熟的工艺形成用于放置叉指换能器的保护腔。Optionally, forming the second insulating layer on the side of the first insulating layer away from the base includes: forming a second insulating film layer on the surface of the first insulating layer away from the base, the second insulating film layer being formed by a lamination process; A third via hole is formed on the second insulating film layer to form a second insulating layer. By adopting a lamination process to form the second insulating film layer, a relatively simple and mature process can be used to form a protective cavity for placing the interdigital transducer.
可选的,封装方法还包括:在第二绝缘层远离基体的一侧形成第三绝缘层;第三绝缘层具有第四过孔,第四过孔贯穿第三绝缘层,第四过孔与第三过孔连通;部分的金属连接柱设置于第四过孔内。这样一来,无需限定第二绝缘层的厚度,因此,无需限定形成第二绝缘层所采用的工艺,可提高工艺的适用范围。Optionally, the packaging method further includes: forming a third insulating layer on a side of the second insulating layer away from the base; the third insulating layer has a fourth via, the fourth via penetrates the third insulating layer, and the fourth via is connected to the The third via hole is connected; part of the metal connecting pillar is arranged in the fourth via hole. In this way, there is no need to limit the thickness of the second insulating layer, and therefore, there is no need to limit the process used to form the second insulating layer, which can improve the applicable range of the process.
可选的,在第二绝缘层远离基体的一侧形成第三绝缘层,包括:在第二绝缘层远离基体的表面形成第三绝缘薄膜层,第三绝缘薄膜层采用层压工艺形成;在第三绝缘薄膜层上形成第四过孔,以形成第三绝缘层。可以一种较为简单成熟的工艺形成第三绝缘层。Optionally, forming the third insulating layer on the side of the second insulating layer away from the base includes: forming a third insulating film layer on the surface of the second insulating layer away from the base, the third insulating film layer being formed by a lamination process; A fourth via hole is formed on the third insulating film layer to form a third insulating layer. The third insulating layer can be formed in a relatively simple and mature process.
可选的,在基体的第一表面形成第一绝缘层,包括:在基体的第一表面形成第一绝缘薄膜层;在第一绝缘薄膜层上形成第一过孔和第二过孔。可以一种较为简单成熟的工艺形成第一绝缘层。Optionally, forming the first insulating layer on the first surface of the base includes: forming a first insulating film layer on the first surface of the base; and forming a first via hole and a second via hole on the first insulating film layer. The first insulating layer can be formed in a relatively simple and mature process.
可选的,封装方法还包括:在金属连接柱的一端形成焊球;焊球相对于焊盘设置于金属连接柱的另一端,焊球与金属连接柱连接,用于传输基体的电信号。封装结构外部的部件可以通过焊球与金属连接柱进行连接,可将基体上的信号通过焊球传输至与焊球连接的部件。Optionally, the packaging method further includes: forming a solder ball on one end of the metal connection post; the solder ball is disposed at the other end of the metal connection post relative to the pad, and the solder ball is connected to the metal connection post for transmitting electrical signals of the substrate. The external components of the package structure can be connected with the metal connection posts through solder balls, and the signals on the substrate can be transmitted to the components connected with the solder balls through the solder balls.
可选的,所述基体为芯片,基体上还设置有叉指换能器,叉指换能器设置于基体的第一表面;在基体的第一表面形成第一绝缘层,包括:在基体的第一表面形成第一绝缘薄膜层;在第一绝缘薄膜层上形成第一过孔和第二过孔,以形成第一绝缘层;第二过孔贯穿第一绝缘层,叉指换能器位于第二过孔内;其中,在焊盘的表面形成金属连接柱之后,在基体的第一表面形成第一绝缘层;封装方法还包括:在第一绝缘层远离基体的表面形成第二绝缘薄膜层;在第二绝缘薄膜层上形成第三过孔,以形成第二绝缘层;第三过孔贯穿第二绝缘层,第三过孔与第一过孔连通;部分的金属连接柱设置于第三过孔内;第二绝缘层、第一绝缘层和基体之间形成有保护腔,叉指换能器位于保护腔内。可适用于晶圆级封装声表面波滤波器,以提高晶圆级封装声表面波滤波器的产率,简化晶圆级封装声表面波滤波器的结构。Optionally, the substrate is a chip, and an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on a first surface of the substrate; forming a first insulating layer on the first surface of the substrate includes: A first insulating film layer is formed on the first surface; a first via hole and a second via hole are formed on the first insulating film layer to form a first insulating layer; the second via hole penetrates the first insulating layer, interdigitated The device is located in the second via hole; wherein, after the metal connecting pillar is formed on the surface of the pad, a first insulating layer is formed on the first surface of the base; the packaging method further includes: forming a second insulating layer on the surface of the first insulating layer away from the base. Insulating film layer; forming a third via hole on the second insulating film layer to form a second insulating layer; the third via hole penetrates the second insulating layer, and the third via hole communicates with the first via hole; part of the metal connecting pillar It is arranged in the third via hole; a protection cavity is formed between the second insulation layer, the first insulation layer and the base, and the interdigital transducer is located in the protection cavity. It can be applied to wafer-level packaged surface acoustic wave filters to increase the yield of wafer-level packaged surface acoustic wave filters and simplify the structure of wafer-level packaged surface acoustic wave filters.
附图说明Description of the drawings
图1a为相关技术提供的一种封装结构的封装方法示意图;FIG. 1a is a schematic diagram of a packaging method of a packaging structure provided by related technologies;
图1b为相关技术提供的封装结构中基体的结构示意图;FIG. 1b is a schematic diagram of the structure of the substrate in the package structure provided by the related technology;
图2为本申请实施例提供的一种电子设备的结构示意图;FIG. 2 is a schematic structural diagram of an electronic device provided by an embodiment of this application;
图3为本申请实施例提供的一种封装方法的流程图;FIG. 3 is a flowchart of a packaging method provided by an embodiment of the application;
图4a为本申请实施例提供的一种封装结构中金属连接柱与焊盘的结构关系图;4a is a structural relationship diagram between metal connecting pillars and pads in a package structure provided by an embodiment of the application;
图4b为本申请实施例提供的另一种封装结构中金属连接柱与焊盘的结构关系图;4b is a structural relationship diagram between metal connecting pillars and pads in another package structure provided by an embodiment of the application;
图5a-图5e为本申请实施例提供的一种封装结构的封装过程示意图;5a-5e are schematic diagrams of the packaging process of a packaging structure provided by an embodiment of the application;
图6a为本申请实施例提供的另一种封装结构的结构示意图;FIG. 6a is a schematic structural diagram of another package structure provided by an embodiment of the application;
图6b为本申请实施例提供的一种封装结构与PCB的连接示意图;Fig. 6b is a schematic diagram of the connection between a package structure and a PCB provided by an embodiment of the application;
图6c为本申请实施例提供的另一种封装结构与PCB的连接示意图;FIG. 6c is a schematic diagram of the connection between another package structure and the PCB provided by an embodiment of the application;
图7为本申请实施例提供的一种封装结构中基体的结构示意图;FIG. 7 is a schematic structural diagram of a substrate in a package structure provided by an embodiment of the application; FIG.
图8为本申请实施例提供的另一种封装方法的流程图;FIG. 8 is a flowchart of another packaging method provided by an embodiment of the application;
图9-图11b为本申请实施例提供的另一种封装结构的封装过程示意图;9-11b are schematic diagrams of the packaging process of another packaging structure provided by an embodiment of the application;
图11c为本申请实施例提供的一种金属连接柱与第二绝缘层的结构关系图;FIG. 11c is a structural relationship diagram between a metal connecting pillar and a second insulating layer provided by an embodiment of the application; FIG.
图11d为本申请实施例提供的另一种金属连接柱与第二绝缘层的结构关系图;11d is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application;
图11e为本申请实施例提供的一种封装结构中第二绝缘层的结构图;FIG. 11e is a structural diagram of a second insulating layer in a package structure provided by an embodiment of the application; FIG.
图12为本申请实施例提供的另一种封装结构的结构示意图;FIG. 12 is a schematic structural diagram of another package structure provided by an embodiment of the application;
图13a为本申请实施例提供的另一种相关技术中封装结构的结构示意图;FIG. 13a is a schematic structural diagram of a package structure in another related technology provided by an embodiment of the application; FIG.
图13b为本申请实施例提供的另一种封装结构中基体的结构示意图;FIG. 13b is a schematic structural diagram of a substrate in another package structure provided by an embodiment of the application; FIG.
图14为本申请实施例提供的又一种封装方法的流程图;FIG. 14 is a flowchart of yet another packaging method provided by an embodiment of the application;
图15a为本申请实施例提供的一种第一绝缘层的制备过程示意图;15a is a schematic diagram of a preparation process of a first insulating layer provided by an embodiment of the application;
图15b为本申请实施例提供的一种第一绝缘层的制备过程示意图;15b is a schematic diagram of a preparation process of a first insulating layer provided by an embodiment of the application;
图15c为本申请实施例提供的一种金属连接柱与第一绝缘层的结构关系图;15c is a structural relationship diagram between a metal connecting pillar and a first insulating layer provided by an embodiment of the application;
图15d为本申请实施例提供的另一种金属连接柱与第一绝缘层的结构关系图;15d is a structural relationship diagram between another metal connecting pillar and the first insulating layer provided by an embodiment of the application;
图15e为本申请实施例提供的又一种金属连接柱与第二绝缘层的结构关系图;15e is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application;
图15f为本申请实施例提供的又一种金属连接柱与第二绝缘层的结构关系图;15f is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application;
图15g为本申请实施例提供的又一种金属连接柱与第二绝缘层的结构关系图;15g is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application;
图15h为本申请实施例提供的又一种封装结构的结构示意图;15h is a schematic structural diagram of yet another package structure provided by an embodiment of the application;
图16为本申请实施例提供的又一种封装方法的流程图;FIG. 16 is a flowchart of yet another packaging method provided by an embodiment of the application;
图17a为本申请实施例提供的一种第一绝缘层和第二绝缘层的制备过程示意图;FIG. 17a is a schematic diagram of a preparation process of a first insulating layer and a second insulating layer according to an embodiment of the application;
图17b为本申请实施例提供的一种金属连接柱与第一绝缘层和第二绝缘层的结构关系图;FIG. 17b is a structural relationship diagram between a metal connecting pillar and a first insulating layer and a second insulating layer according to an embodiment of the application;
图17c为本申请实施例提供的另一种金属连接柱与第一绝缘层和第二绝缘层的结构关系图;FIG. 17c is a structural relationship diagram between another metal connecting pillar and the first insulating layer and the second insulating layer according to an embodiment of the application;
图17d为本申请实施例提供的又一种金属连接柱与第二绝缘层的结构关系图;FIG. 17d is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application; FIG.
图17e为本申请实施例提供的又一种金属连接柱与第二绝缘层的结构关系图;FIG. 17e is a structural relationship diagram between another metal connecting pillar and the second insulating layer provided by an embodiment of the application; FIG.
图17f为本申请实施例提供的又一种封装结构的结构示意图。FIG. 17f is a schematic structural diagram of yet another packaging structure provided by an embodiment of the application.
附图标记:Reference signs:
1-电子设备;2-显示模组;3-中框;4-壳体;5-盖板;10-基体;11-绝缘层;12-焊盘;13-填孔金属;14-焊球;15-电镀桥;16-叉指换能器;17-功能部件;18-阴极;20-金属连接柱;30-第一绝缘层;31-第一绝缘薄膜层;32-第一过孔;33-第二过孔;40-第二绝缘层;41-第二绝缘薄膜层;42-第三过孔;43-第一子绝缘层;44-第二子绝缘层;51-围墙层;52-屋顶层;53-金属连接件。1-electronic equipment; 2-display module; 3-middle frame; 4-shell; 5-cover plate; 10-substrate; 11-insulation layer; 12-pad; 13-filling metal; 14-solder ball 15-plating bridge; 16-interdigital transducer; 17-functional component; 18-cathode; 20-metal connecting column; 30-first insulating layer; 31-first insulating film layer; 32-first via ; 33-second via; 40-second insulating layer; 41-second insulating film layer; 42-third via; 43-first sub-insulating layer; 44-second sub-insulating layer; 51-wall layer ; 52-roof layer; 53-metal connector.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.
以下,术语“第一”、“第二”等仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。Hereinafter, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of these features.
此外,本申请中,“上”、“下”、“左”以及“右”等方位术语是相对于附图中的部件示意置放的方位来定义的,应当理解到,这些方向性术语是相对的概念,它们用于相对于的描述和澄清,其可以根据附图中部件所放置的方位的变化而相应地发生变化。In addition, in this application, the azimuthal terms such as "upper", "lower", "left" and "right" are defined relative to the schematic placement of the components in the drawings. It should be understood that these directional terms are Relative concepts, they are used for relative description and clarification, which can be changed correspondingly according to the changes in the orientation of the components in the drawings.
本申请实施例提供一种电子设备,该电子设备可以为手机、电视、显示器、平板电脑、车载电脑等具有显示界面的终端设备,或者为智能手表、智能手环等智能显示穿戴设备,或者为服务器、存储器、基站等通信设备,或者为智能汽车等。本申请实施例对上述电子设备的具体形式不做特殊限制。The embodiment of the application provides an electronic device, which can be a terminal device with a display interface such as a mobile phone, a TV, a monitor, a tablet computer, a car computer, etc., or a smart display wearable device such as a smart watch, a smart bracelet, or Communication equipment such as servers, storages, base stations, or smart cars, etc. The embodiments of the present application do not impose special restrictions on the specific form of the above-mentioned electronic device.
以下实施例为了方便说明,以电子设备为手机为例进行举例说明。For convenience of description, the following embodiments take the electronic device as a mobile phone as an example for description.
如图2所示,电子设备1主要包括显示模组2、中框3、壳体(或者称为电池盖、后壳)4以及盖板5。As shown in FIG. 2, the electronic device 1 mainly includes a display module 2, a middle frame 3, a casing (also called a battery cover, a rear casing) 4 and a cover 5.
显示模组2具有能够看到显示画面的出光侧和与上述出光侧相对设置的背面,显示模组2的背面靠近中框3,盖板5设置在显示模组2的出光侧。The display module 2 has a light-emitting side where the display screen can be seen and a back surface opposite to the above-mentioned light-emitting side.
上述显示模组2,包括显示屏(display panel,DP)。The above-mentioned display module 2 includes a display panel (DP).
在本申请的一种可能的实施例中,显示模组2为液晶显示模组。在此情况下,上述显示屏为液晶显示屏(liquid crystal display,LCD)。基于此,显示模组2还包括位于液晶显示屏背面(远离LCD用于显示画面的一侧面)的背光模组(back light unit,BLU)。In a possible embodiment of the present application, the display module 2 is a liquid crystal display module. In this case, the above-mentioned display screen is a liquid crystal display (LCD). Based on this, the display module 2 also includes a backlight unit (BLU) located on the back of the liquid crystal display screen (a side away from the side of the LCD for displaying images).
背光模组可以向液晶显示屏提供光源,以使得液晶显示屏中的各个亚像素(sub pixel)能够发光以实现图像显示。The backlight module can provide a light source to the liquid crystal display, so that each sub-pixel in the liquid crystal display can emit light to realize image display.
或者,在本申请的另一种可能的实施例中,显示模组2为有机发光二极管显示模组。在此情况下,上述显示屏为有机发光二极管(organic lightemitting diode,OLED)显示屏。由于OLED显示屏中每个亚像素内设置有电致发光层,所以可以使得OLED显示屏在接收到工作电压后,实现自发光。在此情况下,具有OLED显示屏的显示模组2中无需再设置上述背光模组。Or, in another possible embodiment of the present application, the display module 2 is an organic light emitting diode display module. In this case, the above-mentioned display screen is an organic light emitting diode (OLED) display screen. Since each sub-pixel in the OLED display screen is provided with an electroluminescent layer, the OLED display screen can realize self-luminescence after receiving the working voltage. In this case, the above-mentioned backlight module does not need to be provided in the display module 2 with the OLED display screen.
盖板5位于显示模组2远离中框3一侧,盖板5例如可以是盖板玻璃(cover glass,CG),该盖板玻璃可以具有一定的韧性。The cover plate 5 is located on the side of the display module 2 away from the middle frame 3, and the cover plate 5 may be, for example, cover glass (CG), which may have a certain degree of toughness.
中框3位于显示模组2和壳体4之间,中框3远离显示模组2的表面用于安装电池、印刷电路板(printed circuit board,PCB)、摄像头(camera)、天线等内部元件。壳体4与中框3盖合后,上述内部元件位于壳体4与中框3之间。The middle frame 3 is located between the display module 2 and the housing 4, and the surface of the middle frame 3 away from the display module 2 is used to install internal components such as batteries, printed circuit boards (PCB), cameras, antennas, etc. . After the casing 4 and the middle frame 3 are closed, the above-mentioned internal elements are located between the casing 4 and the middle frame 3.
上述电子设备1还包括设置于PCB板上的主板、系统级芯片(system on chip,SOC)、封装结构等电子器件,PCB板用于承载上述电子器件,并与上述电子器件完成信号交互。The above-mentioned electronic device 1 also includes electronic devices such as a motherboard, a system-on-chip (SOC), and a packaging structure arranged on a PCB board. The PCB board is used to carry the above-mentioned electronic devices and complete signal interaction with the above-mentioned electronic devices.
需要说明的是,无论电子设备1是上述终端设备、智能显示穿戴设备(例如:AR或者VR)、通信设备、车机、智能汽车等中的任一种,电子设备1中的PCB板用于承载电子器件(例如封装结构),并与电子器件完成信号交互,以向电子设备1提供驱动用信号。图2中仅是以电子设备1为手机为例,示意出了用于承载电子器件的PCB板的设置位置,但并不限定为用于承载电子器件的PCB板仅适用于手机。It should be noted that regardless of whether the electronic device 1 is any of the above-mentioned terminal devices, smart display wearable devices (such as AR or VR), communication equipment, car machines, smart cars, etc., the PCB board in the electronic device 1 is used for Carry the electronic device (such as a package structure), and complete signal interaction with the electronic device to provide a driving signal to the electronic device 1. FIG. 2 only takes the electronic device 1 as a mobile phone as an example, showing the location of the PCB board for carrying the electronic device, but it is not limited to the PCB board for carrying the electronic device only for the mobile phone.
电子设备1中每个部件的制备成本,与电子设备1的成本息息相关。基于此,本申请实施例提供一种降低成本的封装方法。The preparation cost of each component in the electronic device 1 is closely related to the cost of the electronic device 1. Based on this, the embodiment of the present application provides a packaging method that reduces the cost.
实施例一Example one
如图4a所示,封装结构包括基体10,基体10包括焊盘12,焊盘12设置于基体10的第一表面A。As shown in FIG. 4 a, the package structure includes a base 10, the base 10 includes a pad 12, and the pad 12 is disposed on the first surface A of the base 10.
如图3所示,提供一种封装结构的封装方法,包括:As shown in FIG. 3, a packaging method of a packaging structure is provided, including:
S1:如图4a所示,采用引线键合(wire bonding,WB)工艺,在焊盘12的表面形成金属连接柱20,金属连接柱20的侧面为曲面,且金属连接柱20与焊盘12连接,金属连接柱20用于传输焊盘12和/或者基体10中的电信号。S1: As shown in FIG. 4a, a wire bonding (WB) process is used to form a metal connecting pillar 20 on the surface of the pad 12, the side surface of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 and the pad 12 For connection, the metal connection post 20 is used to transmit electrical signals in the pad 12 and/or the base 10.
可选的,金属连接柱20起到导线的作用,具有电导通性,也就是,基体10中的电信号,通过焊盘10和金属连接柱10,将电信号传送到封装结构以外的部件。Optionally, the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
引线键合工艺,是一种使用细金属线,利用热、压力、超声波能量为使金属引线与基板焊盘12紧密焊合的工艺。The wire bonding process is a process that uses thin metal wires and uses heat, pressure, and ultrasonic energy to make the metal leads and the substrate pad 12 tightly welded.
如图4a所示,基体10的第一表面A具有焊盘12,步骤S1形成的金属连接柱20设置于基体10的第一表面A上,且设置于焊盘12的表面。因此,金属连接柱20与焊盘12直接接触且电连接,可将焊盘12中的信号传导至与金属连接柱20的另一端连接的部件中。As shown in FIG. 4 a, the first surface A of the base 10 has a pad 12, and the metal connection pillar 20 formed in step S1 is disposed on the first surface A of the base 10 and on the surface of the pad 12. Therefore, the metal connecting pillar 20 and the pad 12 are in direct contact and electrically connected, and the signal in the pad 12 can be transmitted to the component connected to the other end of the metal connecting pillar 20.
采用引线键合工艺形成金属连接柱20的过程如下:首先键合工具(例如,毛细管劈刀)内放置金属丝线,通过离子化空气间隙的“电子火焰熄灭”过程形成自由空气球。接着键合工具移动到焊盘12的位置处,通过热和超声能量共同作用(热超声焊),在焊盘12表面形成一个圆形焊点。然后,键合工具升高切断圆形焊点,以形成金属连接柱20。因此可知,采用引线键合工艺,在焊盘12上形成金属连接柱20时,金属连接柱20的侧面为曲面,且金属连接柱20的侧面的形状与引线键合工艺相关,与相关技术中采用电镀工艺形成填孔金属13时,填孔金属13的形状由孔的形状限定不同。The process of forming the metal connecting post 20 by using the wire bonding process is as follows: first, a metal wire is placed in a bonding tool (for example, a capillary capillary knife), and a free air ball is formed through the "electronic flame extinguishing" process of the ionized air gap. Then the bonding tool is moved to the position of the bonding pad 12, and a circular solder joint is formed on the surface of the bonding pad 12 through the combined action of heat and ultrasonic energy (thermosonic welding). Then, the bonding tool raises and cuts the circular solder joints to form the metal connection pillar 20. Therefore, it can be seen that when the metal connecting pillar 20 is formed on the bonding pad 12 by the wire bonding process, the side surface of the metal connecting pillar 20 is curved, and the shape of the side surface of the metal connecting pillar 20 is related to the wire bonding process, which is related to the related art When the hole-filling metal 13 is formed by an electroplating process, the shape of the hole-filling metal 13 is different from the shape of the hole.
为了便于说明,如图4a所示,本申请实施例中以金属连接柱20的侧面为球面为例进行示意,例如,金属连接柱20的形状为鼓状;金属连接柱20的侧面还可以是椭球面,水滴面等其他形状,本申请不进行限定。For ease of description, as shown in FIG. 4a, in the embodiment of the present application, the side surface of the metal connecting column 20 is a spherical surface as an example for illustration. For example, the shape of the metal connecting column 20 is a drum; the side surface of the metal connecting column 20 may also be Other shapes such as ellipsoid surface and water drop surface are not limited in this application.
关于金属连接柱20与焊盘12的接触面积,可选的,如图4a所示,金属连接柱20与焊盘12的接触面积小于焊盘12的面积。或者,可选的,如图4b所示,金属连接柱20与焊盘12的接触面积等于焊盘12的面积。其中,本申请实施例中不对焊盘12的形状进行限定,焊盘12的形状可以是任意形状的封闭图形。例如,焊盘12的形状为圆形,矩形,三角形等规则图形。Regarding the contact area between the metal connecting pillar 20 and the pad 12, optionally, as shown in FIG. 4a, the contact area between the metal connecting pillar 20 and the pad 12 is smaller than the area of the pad 12. Or, optionally, as shown in FIG. 4 b, the contact area between the metal connecting pillar 20 and the pad 12 is equal to the area of the pad 12. Among them, the shape of the pad 12 is not limited in the embodiment of the present application, and the shape of the pad 12 may be a closed pattern of any shape. For example, the shape of the pad 12 is a regular pattern such as a circle, a rectangle, and a triangle.
需要说明的是,金属连接柱20具有电传导(或者理解为传导电信号或者电导通的功能)的特性,金属连接柱20将基体10的信号,通过自身,传导至与封装结构连接 的部件。关于金属连接柱20的材料本申请不进行限定,可以是任意金属材料、合金或者金属混合物,金属连接柱20的材料例如可以是铝、锡、钛或者上述金属的合金以及混合物等。It should be noted that the metal connection post 20 has the characteristic of electrical conduction (or understood as the function of conducting electrical signals or electrical conduction), and the metal connection post 20 conducts the signal of the base 10 through itself to the components connected to the package structure. The material of the metal connecting column 20 is not limited in this application, and it can be any metal material, alloy or metal mixture. The material of the metal connecting column 20 can be, for example, aluminum, tin, titanium, or alloys and mixtures of the foregoing metals.
在一些实施例中,为了降低金属连接柱20的成本,金属连接柱20的材料,例如可以是铜(Cu)或含铜的金属混合物或者含铜合金。在另一些实施例中,为了降低金属连接柱20的电阻,提高金属连接柱20的延展性,金属连接柱20的材料,例如可以是金(Au)、银(Ag)、含金的金属混合物、含银的金属混合物、含金的合金或者含银的合金。In some embodiments, in order to reduce the cost of the metal connecting pillar 20, the material of the metal connecting pillar 20 may be, for example, copper (Cu) or a copper-containing metal mixture or a copper-containing alloy. In some other embodiments, in order to reduce the resistance of the metal connection post 20 and improve the ductility of the metal connection post 20, the material of the metal connection post 20 may be, for example, gold (Au), silver (Ag), and a metal mixture containing gold. , Silver-containing metal mixtures, gold-containing alloys or silver-containing alloys.
本申请实施例中,封装结构中的基体10例如可以是芯片、重布线层、基板、PCB板等,或者其他起着相同或者相似功能的基板,本申请对此不作限定。In the embodiment of the present application, the base 10 in the package structure may be, for example, a chip, a redistribution layer, a substrate, a PCB board, etc., or other substrates that perform the same or similar functions, which is not limited in the present application.
S2:如图5a所示,在基体10的第一表面上形成第一绝缘层30,第一绝缘层30具有第一过孔32,第一过孔32贯穿第一绝缘层30,部分的或者全部的金属连接柱20位于第一过孔32内。S2: As shown in FIG. 5a, a first insulating layer 30 is formed on the first surface of the base 10, the first insulating layer 30 has a first via 32, and the first via 32 penetrates the first insulating layer 30, partially or All the metal connecting pillars 20 are located in the first via hole 32.
执行步骤S2后,如图5a所示,封装结构中的第一绝缘层30覆盖在基体10的第一表面(有焊盘12的表面)上,金属连接柱20位于第一绝缘层30上的第一过孔32内,第一绝缘层30包围金属连接柱20,并露出金属连接柱20的端部。由于金属连接柱20的侧面为曲面,因此,第一绝缘层30与金属连接柱20接触处的轮廓形状由金属连接柱20的形状决定,也为曲面(例如,图5a中的凹面)。After performing step S2, as shown in FIG. 5a, the first insulating layer 30 in the package structure covers the first surface (the surface with the pad 12) of the base 10, and the metal connecting pillars 20 are located on the first insulating layer 30. In the first via 32, the first insulating layer 30 surrounds the metal connection pillar 20 and exposes the end of the metal connection pillar 20. Since the side surface of the metal connecting pillar 20 is curved, the contour shape of the contact between the first insulating layer 30 and the metal connecting pillar 20 is determined by the shape of the metal connecting pillar 20, and it is also curved (for example, the concave surface in FIG. 5a).
关于第一绝缘层30的形成方式,在一种可能的实施例中,可以通过构图工艺形成第一绝缘层30。一次构图工艺通常包括成膜、光刻胶涂覆、曝光、显影、刻蚀、光刻胶剥离等工序中的一种或者几种,因此,如图5b所示,可以先在基体10的第一表面上形成第一绝缘薄膜层31;然后通过光刻工艺(包括光刻胶涂覆、曝光、显影、刻蚀、光刻胶剥离工序中的一种或者几种),在第一绝缘薄膜层31上形成第一过孔32,第一过孔32露出金属连接柱20,以形成第一绝缘层30。关于第一绝缘层30的形成方式,在另一种可能的实施例中,可以通过激光开孔工艺形成第一绝缘层30。如图5b所示,可以先在基体10的第一表面上形成第一绝缘薄膜层31;然后通过激光开孔,在第一绝缘薄膜层31上形成第一过孔32,第一过孔32露出金属连接柱20,以形成第一绝缘层30。Regarding the method of forming the first insulating layer 30, in a possible embodiment, the first insulating layer 30 may be formed by a patterning process. A patterning process usually includes one or more of the processes of film formation, photoresist coating, exposure, development, etching, photoresist stripping, etc. Therefore, as shown in FIG. A first insulating film layer 31 is formed on a surface; then, through a photolithography process (including one or more of photoresist coating, exposure, development, etching, and photoresist stripping processes), the first insulating film A first via 32 is formed on the layer 31, and the first via 32 exposes the metal connecting pillar 20 to form the first insulating layer 30. Regarding the method of forming the first insulating layer 30, in another possible embodiment, the first insulating layer 30 may be formed by a laser opening process. As shown in FIG. 5b, a first insulating film layer 31 may be formed on the first surface of the substrate 10; then a first via hole 32 is formed on the first insulating film layer 31 by laser opening. The metal connecting pillar 20 is exposed to form the first insulating layer 30.
其中,可以通过层压工艺,在形成有金属连接柱20的基体10上形成第一绝缘薄膜层31。或者,可以通过旋涂成膜工艺,在形成有金属连接柱20的基体10上形成第一绝缘薄膜层31。Wherein, the first insulating film layer 31 may be formed on the base body 10 on which the metal connecting pillars 20 are formed through a lamination process. Alternatively, the first insulating film layer 31 may be formed on the base 10 on which the metal connecting pillars 20 are formed by a spin coating process.
此外,由于是在形成有金属连接柱20的基体10上形成第一绝缘薄膜层31,因此,如图5b所示,第一绝缘薄膜层31包裹在金属连接柱20的外围。在第一绝缘薄膜层31上形成第一过孔32,金属连接柱20位于第一过孔32内,第一过孔32露出金属连接柱20的端部,该金属连接柱20的端部可以连接其他部件(如PCB板),由于金属连接柱20的材质具有电传导的特性,金属连接柱20可以将基体10中的信号传导至与所述金属连接柱20的端部连接的其他部件(如PCB板)上。金属连接柱20与其他部件(如PCB板)连接时,可以直接连接,也可以通过焊球进行连接,还可以通过其他具有电传导特性的部件进行连接,本申请不进行限定,后续以焊球14进行举例说明, 具体参见图5e。In addition, since the first insulating film layer 31 is formed on the base 10 on which the metal connecting pillars 20 are formed, as shown in FIG. A first via 32 is formed on the first insulating film layer 31, and the metal connecting post 20 is located in the first via 32. The first via 32 exposes the end of the metal connecting post 20. The end of the metal connecting post 20 may be To connect to other components (such as a PCB board), since the material of the metal connection post 20 has the characteristics of electrical conduction, the metal connection post 20 can conduct the signal in the base 10 to other components connected to the end of the metal connection post 20 ( Such as PCB board). When the metal connecting post 20 is connected to other components (such as a PCB board), it can be connected directly, or through solder balls, or through other components with electrical conductivity. This application is not limited, and solder balls will be used later. 14 for illustration, see Figure 5e for details.
此处,构成第一绝缘层30的材料,例如可以为聚酰亚胺(Polyimide,PI)、环氧树脂等材料。可选的,第一绝缘层30的表面a3与基体10的第一表面A平行。Here, the material constituting the first insulating layer 30 may be, for example, polyimide (PI), epoxy resin or the like. Optionally, the surface a3 of the first insulating layer 30 is parallel to the first surface A of the base 10.
关于第一绝缘层30与金属连接柱20厚度的关系,在一些实施例中,如图5c所示,第一绝缘层30远离基体10的表面a3与金属连接柱20远离基体10的表面a1平齐,也就是,焊盘12的厚度和金属连接柱20的厚度之和,等于第一绝缘层30的厚度;在这种情况下,全部的金属连接柱20设置于第一过孔内。Regarding the relationship between the thickness of the first insulating layer 30 and the metal connecting pillar 20, in some embodiments, as shown in FIG. Alignment, that is, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the thickness of the first insulating layer 30; in this case, all the metal connecting pillars 20 are disposed in the first via hole.
由于第一绝缘层30远离基体10的表面a3与金属连接柱20远离基体10的表面a1平齐时,工艺精度要求比较高,因此,在一些实施例中,如图5a所示,第一绝缘层30远离基体10的表面a3与金属连接柱20远离基体10的表面a1不平齐。Since the surface a3 of the first insulating layer 30 away from the base 10 is flush with the surface a1 of the metal connecting post 20 away from the base 10, the process accuracy requirements are relatively high. Therefore, in some embodiments, as shown in FIG. 5a, the first insulating layer The surface a3 of the layer 30 away from the base 10 is not flush with the surface a1 of the metal connecting post 20 away from the base 10.
即,如图5a所示,第一绝缘层30远离基体10的表面a3低于金属连接柱20远离基体10的表面a1(也就是,焊盘12的厚度和金属连接柱20的厚度之和,大于第一绝缘层30的厚度;在这种情况下,部分的金属连接柱20设置于第一过孔32内),或者,如图5d所示,第一绝缘层30远离基体10的表面a3高出金属连接柱20远离基体10的表面a1(也就是,焊盘12的厚度和金属连接柱20的厚度之和,小于第一绝缘层30的厚度;在这种情况下,全部的金属连接柱20设置于第一过孔32内)。That is, as shown in FIG. 5a, the surface a3 of the first insulating layer 30 away from the base 10 is lower than the surface a1 of the metal connecting pillar 20 away from the base 10 (that is, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20, Greater than the thickness of the first insulating layer 30; in this case, part of the metal connecting pillars 20 are disposed in the first via 32), or, as shown in FIG. 5d, the first insulating layer 30 is far away from the surface a3 of the base 10 The surface a1 that is higher than the metal connection post 20 away from the base 10 (that is, the sum of the thickness of the pad 12 and the thickness of the metal connection post 20 is less than the thickness of the first insulating layer 30; in this case, all the metal connections The pillar 20 is disposed in the first via hole 32).
在一些实施例中,封装方法还包括S3:如图5e所示,在金属连接柱20的一端形成焊球14;焊球14相对于焊盘12设置于金属连接柱20的另一端,焊球14与金属连接柱20连接,用于传输基体10的电信号。In some embodiments, the packaging method further includes S3: as shown in FIG. 5e, a solder ball 14 is formed at one end of the metal connection pillar 20; the solder ball 14 is disposed at the other end of the metal connection pillar 20 relative to the pad 12, and the solder ball 14 is connected to the metal connecting post 20 for transmitting the electrical signal of the base body 10.
其中需要说明的是,本申请中的焊球14,并不限定为球状,焊球14可以是球状,也可以是其他无规则的形状,还可以是焊盘,也可以是焊点,本申请对此不进行限定。It should be noted that the solder ball 14 in this application is not limited to a spherical shape. The solder ball 14 can be spherical or other irregular shapes. It can also be a pad or a solder joint. There is no restriction on this.
执行步骤S3后,如图5e所示,焊球14位于金属连接柱20的表面,并与金属连接柱20电连接,焊盘12位于金属连接柱20的一端,焊球14相对焊盘12位于金属连接柱20的另一端,从而实现焊球14与基体10之间的信号传输,完成对基体10的封装;同时实现将基体10中的电信号,通过焊盘12、金属连接柱20和焊球14,传导至封装结构外部的部件。After performing step S3, as shown in FIG. 5e, the solder ball 14 is located on the surface of the metal connecting column 20 and is electrically connected to the metal connecting column 20, the pad 12 is located at one end of the metal connecting column 20, and the solder ball 14 is located opposite to the pad 12 The other end of the metal connection post 20 realizes the signal transmission between the solder ball 14 and the base 10, and completes the packaging of the base 10; at the same time, realizes that the electric signal in the base 10 is passed through the pad 12, the metal connection post 20 and the welding The ball 14 is conducted to the parts outside the package structure.
本申请实施例中,通过采用引线键合工艺直接在焊盘12的表面形成金属连接柱20,金属连接柱20与焊盘12连接,实现将基体10中的电信号,通过焊盘12、金属连接柱20,传导至封装结构外部的部件。相比于采用的电镀工艺形成填孔金属13时,需要先在焊盘12表面形成阻挡层(barrier layer)和种子层(seed layer)的方法,本申请实施例提供的封装方法形成的金属连接柱20,在保证将基体10中的电信号传输至封装结构外部的部件的同时,工艺简单,成本较低。In the embodiment of the present application, the metal connecting pillar 20 is directly formed on the surface of the pad 12 by using a wire bonding process, and the metal connecting pillar 20 is connected to the pad 12 to realize the electrical signal in the substrate 10 through the pad 12, metal The connecting pillars 20 are conducted to components outside the package structure. Compared with the method of forming the via-filling metal 13 by the electroplating process, it is necessary to form a barrier layer and a seed layer on the surface of the pad 12 first, the metal connection formed by the packaging method provided in the embodiment of the present application is The pillar 20 ensures that the electrical signals in the base 10 are transmitted to the external components of the package structure, and at the same time, the process is simple and the cost is low.
在一些实施例中,如图6a所示,基体10上堆叠封装有其他功能部件17,功能部件17例如可以是存储单元、处理单元、电阻、电容、射频单元等部件。第一绝缘层30覆盖功能部件17。In some embodiments, as shown in FIG. 6a, other functional components 17 are stacked and packaged on the substrate 10, and the functional components 17 may be, for example, storage units, processing units, resistors, capacitors, radio frequency units, and other components. The first insulating layer 30 covers the functional component 17.
在需要将图6a所示的封装结构与上述电子设备1中的PCB板(封装结构外部的部件)电连接以完成信号传输时,为使基体10能与PCB板完成信号转接,需要将基体10的信号引出。When the packaging structure shown in FIG. 6a needs to be electrically connected to the PCB board (component outside the packaging structure) in the above electronic device 1 to complete signal transmission, in order to enable the base 10 to complete the signal transfer with the PCB, the base needs to be The signal of 10 leads.
在一种可能的实施例中,如图6b所示,在基体10上封装有功能部件17后,可以 在基体10的焊盘12上采用电镀工艺形成塑封通孔(through molding via,TMV),然后再基体10的第一表面形成第一绝缘层30,第一绝缘层30的材料为塑封材料,第一绝缘层30的材料例如为环氧树脂胶粘剂(epoxy molding compound,EMC),然后在TMV上形成焊球14,以形成封装结构。然后将封装结构中的焊球14与PCB板焊接,以完成基体10与PCB板之间的信号传输。In a possible embodiment, as shown in FIG. 6b, after the functional component 17 is encapsulated on the base 10, an electroplating process may be used to form a through molding via (TMV) on the pad 12 of the base 10. Then, a first insulating layer 30 is formed on the first surface of the base 10. The material of the first insulating layer 30 is a plastic encapsulating material, and the material of the first insulating layer 30 is, for example, epoxy molding compound (EMC). Solder balls 14 are formed thereon to form a package structure. Then the solder balls 14 in the package structure are soldered to the PCB board to complete the signal transmission between the base body 10 and the PCB board.
在一种可能的实施例中,如图6c所示,在基体10上封装有功能部件17后,可以通过上述步骤S1-S3形成金属连接柱20和焊球14,金属连接柱20相当于TMV,以形成封装结构。然后将封装结构中的焊球14与PCB板连接,以完成基体10与PCB板之间的信号传输。In a possible embodiment, as shown in FIG. 6c, after the functional component 17 is encapsulated on the base 10, the metal connecting post 20 and the solder ball 14 can be formed through the above steps S1-S3, and the metal connecting post 20 is equivalent to TMV , To form a package structure. Then the solder balls 14 in the package structure are connected to the PCB board to complete the signal transmission between the base 10 and the PCB board.
本申请实施例提供的封装方法,是采用引线键合工艺形成侧面为曲面的金属连接柱20,相比于采用的电镀工艺形成填孔金属13或者TMV时,需要先在焊盘12表面形成阻挡层(barrier layer)和种子层(seed layer)的方法,本申请实施例提供的封装方法形成金属连接柱20的工艺简单,成本较低。并且,金属连接柱20与焊盘12直接接触,中间不夹杂其他膜层(例如种子层或阻挡层),可降低因膜层断裂导致金属连接柱20与焊盘12连接不稳定的风险。The packaging method provided by the embodiment of the present application uses a wire bonding process to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used to form the filling metal 13 or TMV, it is necessary to form a barrier on the surface of the pad 12 first. In the barrier layer and seed layer methods, the packaging method provided in the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost. In addition, the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers (such as a seed layer or a barrier layer) in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film layer fracture.
此外,如图7所示,采用本申请实施例提供的封装方法进行封装时,在封装之前,位于基体10表面的多个焊盘12是独立存在的,没有图1b中所示的电镀桥15。因此,基体10的结构简单,从而简化封装结构的结构。而且,在封装完成后无需切断电镀桥15,可简化工艺流程。In addition, as shown in FIG. 7, when the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no plating bridge 15 shown in FIG. 1b. . Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
再者,若如图1a所示的,采用电镀工艺形成填孔金属13的方法进行封装,如图1b所示,由于基体10表面的焊盘12与电镀桥15相互电连接,使得基体10表面的各个焊盘12相连接,导致多个焊盘12之间处于短路状态。因此,无法提前对基体10进行良品筛选,只有在封装完成后,刻蚀电镀桥15以使各个焊盘12之间绝缘后,才能筛选封装结构是否为良品,造成对废片进行封装的工艺浪费。而采用本申请实施例提供的封装方法进行封装时,由于在封装之前,基体10表面的焊盘12独立存在。因此,在对基体10进行封装之前,可以直接对基体10进行良品筛选(如漏电流检测),直接淘汰废品的基体10,可避免工艺浪费,提高产出。Furthermore, if as shown in FIG. 1a, an electroplating process is used to form the via-filling metal 13 for packaging. As shown in FIG. Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, the base body 10 cannot be screened in advance. Only after the packaging is completed, the plating bridge 15 is etched to insulate the pads 12, before the packaging structure is a good product can be screened, resulting in waste of the packaging process for the waste sheet. . When the packaging method provided by the embodiment of the present application is used for packaging, the pads 12 on the surface of the base body 10 exist independently before the packaging. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products (such as leakage current detection), and the waste substrate 10 can be directly eliminated, thereby avoiding process waste and improving output.
实施例二Example two
以封装结构为晶圆级封装声表面波(wafer level packaging surface acoustic wave,WLPSAW)滤波器为例进行示意。Take the packaging structure as a wafer level packaging surface acoustic wave (WLPSAW) filter as an example for illustration.
如图8所示,WLPSAW滤波器的封装方法包括:As shown in Figure 8, the packaging method of WLPSAW filter includes:
S11、如图9所示,在焊盘12的表面形成金属连接柱20,金属连接柱20的侧面为曲面,且金属连接柱20与焊盘12连接,金属连接柱20用于传输基体10中的电信号。其中,焊盘12设置在基体10的第一表面A。S11. As shown in FIG. 9, a metal connecting pillar 20 is formed on the surface of the pad 12, the side of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 is connected to the pad 12, and the metal connecting pillar 20 is used in the transmission substrate 10. Electrical signal. Wherein, the pad 12 is provided on the first surface A of the base 10.
可选的,采用引线键合工艺,在焊盘12的表面形成金属连接柱20。Optionally, a wire bonding process is used to form a metal connection pillar 20 on the surface of the bonding pad 12.
可选的,金属连接柱20起到导线的作用,具有电导通性,也就是,基体10中的电信号,通过焊盘10和金属连接柱10,将电信号传送到封装结构以外的部件。Optionally, the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
可选的,如图9所示,WLPSAW滤波器的封装结构中,基体10为芯片,基体10的第一表面A也设置有叉指换能器16。采用引线键合工艺形成的金属连接柱20的侧 面为曲面,金属连接柱20位于焊盘12表面且与焊盘12电连接。Optionally, as shown in FIG. 9, in the packaging structure of the WLPSAW filter, the base 10 is a chip, and the first surface A of the base 10 is also provided with an interdigital transducer 16. The side surface of the metal connecting pillar 20 formed by the wire bonding process is curved, and the metal connecting pillar 20 is located on the surface of the pad 12 and is electrically connected to the pad 12.
所谓叉指换能器16,就是在基体10表面上形成形状像两只手的手指交叉状的金属图案,它的作用是实现声-电换能。The so-called interdigital transducer 16 is formed on the surface of the substrate 10 with a metal pattern shaped like the fingers of two hands, and its function is to realize acoustic-electric transduction.
S12、如图10a和图10c所示,在基体10的第一表面形成第一绝缘层30,第一绝缘层30具有第一过孔32和第二过孔33,第一过孔32和第二过孔33均贯穿第一绝缘层30。图10a是本申请实施例提供的一种第一绝缘层的结构示意图。其中,金属连接柱20设置于第一过孔32内,叉指换能器16设置于第二过孔33内。S12. As shown in FIGS. 10a and 10c, a first insulating layer 30 is formed on the first surface of the base body 10. The first insulating layer 30 has a first via 32 and a second via 33, and the first via 32 and the second Both via holes 33 penetrate the first insulating layer 30. FIG. 10a is a schematic structural diagram of a first insulating layer provided by an embodiment of the present application. Wherein, the metal connecting post 20 is disposed in the first via hole 32, and the interdigital transducer 16 is disposed in the second via hole 33.
可选的,参见图10c所示,在形成第一绝缘层30的过程中,在第一绝缘层30上形成第一过孔32和第二过孔33。其中,第一过孔32贯穿设置于第一绝缘层30。该第一过孔32用于容纳焊盘12和金属连接柱20,也就是,第一过孔32是第一绝缘层30上用于容纳焊盘12和金属连接柱20的空间。参见图10c所示,第二过孔33贯穿设置于第一绝缘层30。该第二过孔33用于容纳叉指换能器16,也就是,在第一绝缘层30上,第二过孔33是用于容纳叉指换能器16的空间。其中,第一过孔32和第二过孔33可以在同一次构图工艺中形成,也可以是分开形成。Optionally, referring to FIG. 10c, in the process of forming the first insulating layer 30, a first via 32 and a second via 33 are formed on the first insulating layer 30. Wherein, the first via 32 penetrates the first insulating layer 30. The first via hole 32 is used for accommodating the pad 12 and the metal connecting pillar 20, that is, the first via hole 32 is a space on the first insulating layer 30 for accommodating the pad 12 and the metal connecting pillar 20. As shown in FIG. 10c, the second via 33 penetrates the first insulating layer 30. The second via hole 33 is used for accommodating the interdigital transducer 16, that is, on the first insulating layer 30, the second via hole 33 is a space for accommodating the interdigital transducer 16. Wherein, the first via 32 and the second via 33 may be formed in the same patterning process, or may be formed separately.
执行步骤S12后,如图10a所示,第一绝缘层30覆盖在基体10的第一表面上,第一绝缘层30露出金属连接柱20和叉指换能器16,金属连接柱20与第一绝缘层30接触的侧面为曲面。此时,第一绝缘层30相当于作为用于放置叉指换能器16的保护腔的围墙(wall),叉指换能器16的表面未设置其他部件(如图10a所示)。After performing step S12, as shown in FIG. 10a, the first insulating layer 30 covers the first surface of the base 10, the first insulating layer 30 exposes the metal connecting pillars 20 and the interdigital transducer 16, and the metal connecting pillars 20 and the second The side surface contacted by an insulating layer 30 is a curved surface. At this time, the first insulating layer 30 is equivalent to a wall serving as a protective cavity for placing the interdigital transducer 16, and no other components are provided on the surface of the interdigital transducer 16 (as shown in FIG. 10a).
此处,构成第一绝缘层30的材料,例如可以为聚酰亚胺(Polyimide,PI)、环氧树脂等材料。Here, the material constituting the first insulating layer 30 may be, for example, polyimide (PI), epoxy resin or the like.
关于第一绝缘层30的形成方式,在一种可能的实施例中,可以通过构图工艺形成第一绝缘层30。Regarding the method of forming the first insulating layer 30, in a possible embodiment, the first insulating layer 30 may be formed by a patterning process.
可选的,如图10b所示,可以先通过层压工艺,在基体10的第一表面上形成第一绝缘薄膜层31;然后通过光刻工艺(包括光刻胶涂覆、曝光、显影、刻蚀、光刻胶剥离工序中的一种或者几种),在第一绝缘薄膜层31上形成第一过孔和第二过孔33,以形成第一绝缘层30。Optionally, as shown in FIG. 10b, a first insulating film layer 31 may be formed on the first surface of the base 10 through a lamination process; then, through a photolithography process (including photoresist coating, exposure, development, One or more of the etching and photoresist stripping process), the first via hole and the second via hole 33 are formed on the first insulating film layer 31 to form the first insulating layer 30.
可选的,如图10d所示,可以先通过旋涂成膜工艺,在基体10的第一表面上形成第一绝缘薄膜层31,第一绝缘薄膜层31露出金属连接柱20;然后通过光刻工艺,在第一绝缘薄膜层31上形成第二过孔33,第二过孔33露出叉指换能器16,以形成第一绝缘层30。Optionally, as shown in FIG. 10d, a first insulating film layer 31 may be formed on the first surface of the substrate 10 through a spin coating process, and the first insulating film layer 31 exposes the metal connecting pillars 20; In the engraving process, a second via hole 33 is formed on the first insulating film layer 31, and the second via hole 33 exposes the interdigital transducer 16 to form the first insulating layer 30.
可选的,第一绝缘层30的厚度小于等于30微米。可选的,金属连接柱20的厚度小于等于50微米。可选的,金属连接柱20和第一绝缘层的厚度差小于等于50,进一步,厚度差小于等于40,进一步,厚度差小于等于30。Optionally, the thickness of the first insulating layer 30 is less than or equal to 30 microns. Optionally, the thickness of the metal connecting pillar 20 is less than or equal to 50 microns. Optionally, the thickness difference between the metal connecting pillar 20 and the first insulating layer is less than or equal to 50, further, the thickness difference is less than or equal to 40, and further, the thickness difference is less than or equal to 30.
采用旋涂成膜工艺形成的第一绝缘薄膜层31可直接露出金属连接柱20,形成的第一绝缘薄膜层31上直接具有第一过孔31,相当于省去了采用光刻工艺或激光开孔工艺在第一绝缘薄膜层31上形成第一过孔32的步骤,可节省形成第一绝缘层30时的耗材,并且简化工艺难度。The first insulating film layer 31 formed by the spin coating process can directly expose the metal connecting pillars 20, and the formed first insulating film layer 31 directly has the first via 31, which is equivalent to eliminating the need for a photolithography process or laser The step of forming the first via hole 32 on the first insulating film layer 31 by the hole-opening process can save materials when forming the first insulating layer 30 and simplify the process difficulty.
关于第一绝缘层30的形成方式,在另一种可能的实施例中,可以通过激光开孔工艺形成第一绝缘层30。例如,先通过上述层压工艺或旋涂成膜工艺形成第一绝缘薄膜 31,然后通过激光开孔工艺形成第一过孔32和第二过孔33,此处不再赘述。Regarding the method of forming the first insulating layer 30, in another possible embodiment, the first insulating layer 30 may be formed by a laser opening process. For example, the first insulating film 31 is first formed by the above-mentioned lamination process or the spin coating process, and then the first via 32 and the second via 33 are formed by the laser opening process, which will not be repeated here.
S13、如图11a和图11b所示,在第一绝缘层30远离基体10的一侧形成第二绝缘层40,第二绝缘层40具有第三过孔42,第三过孔42贯穿第二绝缘层40且与第一过孔连通;金属连接柱20的一部分设置于第一过孔,金属连接柱20的另一部分设置于第三过孔42内。S13. As shown in FIGS. 11a and 11b, a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates through the second insulating layer. The insulating layer 40 is connected to the first via hole; a part of the metal connecting pillar 20 is disposed in the first via hole, and another part of the metal connecting pillar 20 is disposed in the third via hole 42.
有关第一过孔和第二过孔的解释参见前述实施例,在此不进行赘述。For the explanation of the first via hole and the second via hole, refer to the foregoing embodiment, which will not be repeated here.
可选的,在形成第二绝缘层40的过程中,在第二绝缘层40上形成第三过孔42。其中,参见图11b所示,第三过孔42贯穿设置于第二绝缘层40,该第三过孔42用于容纳金属连接柱20,也就是,第三过孔42是第二绝缘层40上用于容纳金属连接柱20的空间。其中,第三过孔42与第一过孔可以在同一次构图工艺中形成,也可以是分开形成。Optionally, in the process of forming the second insulating layer 40, a third via 42 is formed on the second insulating layer 40. Wherein, referring to FIG. 11b, the third via hole 42 is formed through the second insulating layer 40, and the third via hole 42 is used to accommodate the metal connecting pillar 20, that is, the third via hole 42 is the second insulating layer 40. The upper space is used for accommodating the metal connecting column 20. Wherein, the third via hole 42 and the first via hole may be formed in the same patterning process, or may be formed separately.
执行步骤S13后,如图11a所示,第二绝缘层40覆盖第一绝缘层30,金属连接柱20贯穿第一绝缘层30和第二绝缘层40,金属连接柱20设置于由第一过孔32和第三过孔33形成的连通孔内,且第二绝缘层40露出金属连接柱20的端部。由于金属连接柱20的形状已经固定(侧面为曲面),因此,金属连接柱20与第二绝缘层40接触的侧面为曲面。After performing step S13, as shown in FIG. 11a, the second insulating layer 40 covers the first insulating layer 30, the metal connecting pillars 20 penetrate the first insulating layer 30 and the second insulating layer 40, and the metal connecting pillars 20 are arranged in the first insulating layer. The hole 32 and the third via hole 33 form a communicating hole, and the second insulating layer 40 exposes the end of the metal connecting pillar 20. Since the shape of the metal connecting column 20 has been fixed (the side surface is a curved surface), the side surface of the metal connecting column 20 in contact with the second insulating layer 40 is a curved surface.
第二绝缘层40、第一绝缘层30和基体10之间形成有保护腔Q,叉指换能器16位于保护腔Q内。此时,第二绝缘层40相当于作为用于放置叉指换能器16的保护腔Q的屋顶(roof),第二绝缘层40未与叉指换能器16的表面接触。A protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q. At this time, the second insulating layer 40 is equivalent to the roof of the protective cavity Q for placing the interdigital transducer 16, and the second insulating layer 40 is not in contact with the surface of the interdigital transducer 16.
关于第二绝缘层40的形成方式,在一种可能的实施例中,如图11b所示,采用层压工艺,在第一绝缘层30远离基体10的一侧形成第二绝缘薄膜层41,第二绝缘薄膜层41、第一绝缘层30上的第二过孔33和基体10之间形成有保护腔Q。然后,采用构图工艺或激光开孔工艺,在第二绝缘薄膜层41上形成第三过孔42,第三过孔42露出金属连接柱20,以形成第二绝缘层40。Regarding the method of forming the second insulating layer 40, in a possible embodiment, as shown in FIG. A protection cavity Q is formed between the second insulating film layer 41, the second via 33 on the first insulating layer 30 and the base 10. Then, a patterning process or a laser opening process is used to form a third via hole 42 on the second insulating film layer 41, and the third via hole 42 exposes the metal connecting pillar 20 to form the second insulating layer 40.
其中,关于沿第一方向X(第一方向X为垂直于基体10的方向,或者理解为基体10、第一绝缘层30以及第二绝缘层40依次层叠的方向)上,金属连接柱20与第一绝缘层30和第二绝缘层40的尺寸(厚度)关系,在一些实施例中,如图11c所示,金属连接柱20远离基体10的表面a1与第二绝缘层40远离基体10的表面a2平齐。也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,等于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。这样一来,后续在金属连接柱20表面制备焊球时,即使焊球与金属连接柱20对位稍微有偏差,也不影响焊球与金属连接柱20的连接效果,从而可降低对焊球对位精度的要求。Among them, in the first direction X (the first direction X is a direction perpendicular to the base 10, or understood as the direction in which the base 10, the first insulating layer 30, and the second insulating layer 40 are stacked in sequence), the metal connecting pillars 20 and The size (thickness) relationship between the first insulating layer 30 and the second insulating layer 40. In some embodiments, as shown in FIG. The surface a2 is flush. That is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40. In this way, when solder balls are subsequently prepared on the surface of the metal connecting pillars 20, even if the solder balls and the metal connecting pillars 20 are slightly offset, the connection effect between the solder balls and the metal connecting pillars 20 will not be affected, thereby reducing the need for solder balls. Requirement of bit accuracy.
在一些实施例中,金属连接柱20远离基体10的表面a1与第二绝缘层40远离基体10的表面a2平齐时,对形成金属连接柱20的工艺要求较高,为了降低对形成金属连接柱20、第一绝缘层30和第二绝缘层40时对工艺精度的要求,以降低工艺难度,如图11d所示,金属连接柱20远离基体10的表面a1高于第二绝缘层40远离基体10的表面a2,也就是说,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,大于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。In some embodiments, when the surface a1 of the metal connecting pillar 20 away from the base 10 is flush with the surface a2 of the second insulating layer 40 away from the base 10, the process requirements for forming the metal connecting pillar 20 are relatively high. The post 20, the first insulating layer 30 and the second insulating layer 40 require process accuracy to reduce the process difficulty. As shown in FIG. The surface a2 of the base 10, that is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
在一些实施例中,金属连接柱20远离基体10的表面a1与第二绝缘层40远离基 体10的表面a2平齐时,对形成金属连接柱20的工艺要求较高,为了降低对形成金属连接柱20、第一绝缘层30和第二绝缘层40时对工艺精度的要求,以降低工艺难度,如图11a所示,金属连接柱20远离基体10的表面a1低于第二绝缘层40远离基体10的表面a2,也就是说,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,小于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。In some embodiments, when the surface a1 of the metal connecting pillar 20 away from the base 10 is flush with the surface a2 of the second insulating layer 40 away from the base 10, the process requirements for forming the metal connecting pillar 20 are relatively high. The post 20, the first insulating layer 30 and the second insulating layer 40 require process accuracy to reduce the process difficulty. As shown in FIG. The surface a2 of the base 10, that is, in the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
考虑到金属连接柱20沿第一方向X上的厚度太小,第一绝缘层30要露出金属连接柱20时,加工工艺复杂。并且,第二绝缘层30对金属连接柱20覆盖较厚时,第二绝缘层30要露出金属连接柱20,加工时长较长。而金属连接柱20沿第一方向X上的厚度太大,第二绝缘层40露出金属连接柱20时,加工工艺复杂。如图11a所示,在一种可能的实施例中,金属连接柱20沿第一方向X上的厚度为h1,第一绝缘层30沿第一方向X上的厚度为h2,第二绝缘层40沿第一方向X上的厚度为h3,金属连接柱20沿第一方向X上的厚度h1的取值范围,在第一绝缘层30沿第一方向X上的厚度h2与第二绝缘层40沿第一方向X上的厚度h3之和加减5μm的范围内,h1=((h2+h3)-5μm)~((h2+h3)+5μm),即,金属连接柱20沿第一方向X上的厚度h1的取值范围在((h2+h3)-5μm)和((h2+h3)+5μm)之间,也就是,h1的最小取值是(h2+h3)-5μm,最大取值是(h2+h3)+5μm。Considering that the thickness of the metal connecting pillar 20 along the first direction X is too small, when the first insulating layer 30 exposes the metal connecting pillar 20, the processing process is complicated. In addition, when the second insulating layer 30 covers the metal connecting pillars 20 thickly, the second insulating layer 30 will expose the metal connecting pillars 20, and the processing time will be longer. However, the thickness of the metal connecting pillar 20 along the first direction X is too large, and when the second insulating layer 40 exposes the metal connecting pillar 20, the processing process is complicated. As shown in FIG. 11a, in a possible embodiment, the thickness of the metal connecting pillar 20 along the first direction X is h1, the thickness of the first insulating layer 30 along the first direction X is h2, and the second insulating layer The thickness of 40 along the first direction X is h3, the thickness h1 of the metal connecting pillar 20 along the first direction X ranges from the value range of the thickness h2 of the first insulating layer 30 along the first direction X to the second insulating layer 40. Within the range of plus or minus 5 μm for the sum of the thickness h3 along the first direction X, h1=((h2+h3)-5μm)~((h2+h3)+5μm), that is, the metal connecting post 20 is along the first The thickness h1 in the direction X ranges between ((h2+h3)-5μm) and ((h2+h3)+5μm), that is, the minimum value of h1 is (h2+h3)-5μm, The maximum value is (h2+h3)+5μm.
图11a-图11d中提供的WLPSAW滤波器以第二绝缘层40为单层膜层进行示意,工艺步骤少,结构简单,制备效率高。The WLPSAW filter provided in FIG. 11a to FIG. 11d is illustrated by using the second insulating layer 40 as a single-layer film, which has fewer process steps, simple structure, and high preparation efficiency.
需要说明的是,第二绝缘层40沿第一方向X上的厚度h3可以在10~40μm左右,如图11e所示,采用层压工艺,在第一绝缘层30远离基体10的一侧形成第一子绝缘层43,第一子绝缘层43露出金属连接柱20。若受层压工艺限制或因其他因素,导致第一子绝缘层43沿第一方向X上的厚度h4太小,金属连接柱20沿第一方向X上的厚度h1的取值范围不在(h2+h4)-5~(h2+h4)+5μm之内,可在第一子绝缘层43远离第一绝缘层30一侧形成至少一层第二子绝缘层44。It should be noted that the thickness h3 of the second insulating layer 40 along the first direction X can be about 10-40 μm. As shown in FIG. The first sub-insulating layer 43 and the first sub-insulating layer 43 expose the metal connecting pillars 20. If the thickness h4 of the first sub-insulating layer 43 in the first direction X is too small due to the limitation of the lamination process or due to other factors, the thickness h1 of the metal connecting pillar 20 in the first direction X is not in the range of (h2 Within +h4)-5~(h2+h4)+5 μm, at least one second sub-insulating layer 44 may be formed on the side of the first sub-insulating layer 43 away from the first insulating layer 30.
在一些实施例中,如图11e所示,可以再在第一子绝缘层43远离第一绝缘层30一侧形成至少一层第二子绝缘层44,第一子绝缘层43和至少一层第二子绝缘层44作为第二绝缘层40,第一子绝缘层43和至少一层第二子绝缘层44沿第一方向X上的厚度之和作为上述第二绝缘层40沿第一方向X上的厚度为h3。当然,第一子绝缘层43和第二子绝缘层44沿第一方向X上的厚度可以相等,也可以均不相等,也可以有的相等有的不相等,本申请在此不进行限定。In some embodiments, as shown in FIG. 11e, at least one second sub-insulating layer 44 may be formed on the side of the first sub-insulating layer 43 away from the first insulating layer 30, the first sub-insulating layer 43 and at least one layer The second sub-insulating layer 44 serves as the second insulating layer 40, and the sum of the thicknesses of the first sub-insulating layer 43 and at least one layer of the second sub-insulating layer 44 along the first direction X serves as the second insulating layer 40 along the first direction. The thickness on X is h3. Of course, the thicknesses of the first sub-insulating layer 43 and the second sub-insulating layer 44 in the first direction X may be equal, or both may be different, and some may be equal or some may be unequal, which is not limited in this application.
此处,通过增加第二子绝缘层44的方式,使最终形成的第二绝缘层40的厚度满足需求,可以降低对每层第一子绝缘层43和第二子绝缘层44厚度的要求,降低工艺的适用难度。Here, by adding the second sub-insulating layer 44, the thickness of the finally formed second insulating layer 40 can meet the requirements, and the requirements for the thickness of each layer of the first sub-insulating layer 43 and the second sub-insulating layer 44 can be reduced. Reduce the application difficulty of the process.
在一种实施例中,为了使第一子绝缘层43与第一绝缘层30之间可以形成容纳腔Q,可以采用层压工艺形成第一子绝缘薄膜层,采用层压工艺或者旋涂成膜工艺形成第二子绝缘薄膜层;然后采用光刻工艺或激光开孔工艺形成贯穿第一子绝缘薄膜层和第二子绝缘薄膜层的第三过孔42,分别形成第一子绝缘层和第二子绝缘层;其中第二绝缘层40包括第一子绝缘层43和第二子绝缘层44。In one embodiment, in order to form the accommodating cavity Q between the first sub-insulating layer 43 and the first insulating layer 30, the first sub-insulating film layer can be formed by a lamination process, and a lamination process or spin coating can be used. The second sub-insulating film layer is formed by a film process; then, a photolithography process or a laser opening process is used to form a third via hole 42 penetrating the first sub-insulating film layer and the second sub-insulating film layer to form the first sub-insulating layer and The second sub-insulating layer; wherein the second insulating layer 40 includes a first sub-insulating layer 43 and a second sub-insulating layer 44.
可选的,第二绝缘层40还包括第三子绝缘层、第四子绝缘层、……第N子绝缘 层,所述N为正整数。类似的,采用上述相同的方法形成第三子绝缘层、第四子绝缘层、……第N子绝缘层。Optionally, the second insulating layer 40 further includes a third sub-insulating layer, a fourth sub-insulating layer, ... the Nth sub-insulating layer, where N is a positive integer. Similarly, the third sub-insulating layer, the fourth sub-insulating layer, ... the Nth sub-insulating layer are formed using the same method as described above.
在一种实施例中,为了使第一子绝缘层43与第一绝缘层30之间可以形成容纳腔Q,可以采用层压工艺形成第一子绝缘薄膜层,然后采用光刻工艺或激光开孔工艺形成贯穿第一子绝缘薄膜层的部分第三过孔42,形成第一子绝缘层43;可以采用层压工艺或者旋涂成膜工艺形成第二子绝缘薄膜层,然后采用光刻工艺或激光开孔工艺形成贯穿第二子绝缘薄膜层的另一部分第三过孔42,形成第二子绝缘层44;其中第二绝缘层40包括第一子绝缘层43和第二子绝缘层44。In an embodiment, in order to form the accommodating cavity Q between the first sub-insulating layer 43 and the first insulating layer 30, the first sub-insulating thin film layer can be formed by a lamination process, and then a photolithography process or laser opening can be used. The hole process forms part of the third via hole 42 penetrating the first sub-insulating film layer to form the first sub-insulating layer 43; the second sub-insulating film layer can be formed by a lamination process or a spin coating process, and then a photolithography process is used Or the laser drilling process forms another part of the third via 42 penetrating the second sub-insulating film layer to form the second sub-insulating layer 44; wherein the second insulating layer 40 includes the first sub-insulating layer 43 and the second sub-insulating layer 44 .
可选的,第二绝缘层40还包括第三子绝缘层、第四子绝缘层、……第N子绝缘层,所述N为正整数。类似的,采用上述相同的方法形成第三子绝缘层、第四子绝缘层、……第N子绝缘层。Optionally, the second insulating layer 40 further includes a third sub-insulating layer, a fourth sub-insulating layer,... An Nth sub-insulating layer, where N is a positive integer. Similarly, the third sub-insulating layer, the fourth sub-insulating layer, ... the Nth sub-insulating layer are formed using the same method as described above.
其中,第一子绝缘层43、第一绝缘层30和基体10构成所述保护腔Q。Wherein, the first sub-insulating layer 43, the first insulating layer 30 and the base 10 constitute the protection cavity Q.
采用层压工艺形成最靠近第一绝缘层30的第一子绝缘薄膜层,可以以一种较为简单的方式确保第一绝缘层30上的第二过孔33不被填满,以形成容纳腔Q。应当明白的是,第一子绝缘层43、第二子绝缘层44、……第N子绝缘层仅是一种命名,用于对封装结构的结构进行说明,即,第一绝缘层30远离基体10一侧可以设置多层绝缘层。第一子绝缘层43和第二子绝缘层44也可以称为第二绝缘层和第三绝缘层,第三绝缘层具有第四过孔,第四过孔贯穿第三绝缘层,第四过孔与第三过孔连通;部分的金属连接柱20设置于第四过孔内。第三绝缘层的形成方式可以和第二绝缘层40的形成方式相同,此处不再赘述。Using a lamination process to form the first sub-insulating film layer closest to the first insulating layer 30 can ensure that the second via 33 on the first insulating layer 30 is not filled up in a relatively simple manner to form a receiving cavity Q. It should be understood that the first sub-insulating layer 43, the second sub-insulating layer 44, ... the Nth sub-insulating layer are only a name for explaining the structure of the package structure, that is, the first insulating layer 30 is far away Multiple insulating layers can be provided on one side of the base 10. The first sub-insulating layer 43 and the second sub-insulating layer 44 can also be referred to as the second insulating layer and the third insulating layer. The third insulating layer has a fourth via, the fourth via penetrates the third insulating layer, and the fourth via The hole communicates with the third via hole; part of the metal connecting pillar 20 is disposed in the fourth via hole. The formation method of the third insulating layer may be the same as the formation method of the second insulating layer 40, which will not be repeated here.
需要说明的是,在步骤S13形成封装结构后,可选的,可以执行步骤S14。步骤S14不是必需的,也可以替换为其他的步骤。It should be noted that after the packaging structure is formed in step S13, optionally, step S14 may be performed. Step S14 is not essential and can be replaced with other steps.
S14、如图12所示,在金属连接柱20的一端形成焊球14;焊球14相对于焊盘12设置于金属连接柱20的另一端,焊球14与金属连接柱20连接,用于传输基体10的电信号。S14. As shown in FIG. 12, a solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
执行完步骤S14后,如图12所示,焊球14位于金属连接柱20的表面,并与金属连接柱20电连接,焊盘12位于金属连接柱20的一端,焊球14相对焊盘12位于金属连接柱20的另一端,封装结构外部的部件通过焊球14与金属连接柱40进行连接。在完成对基体10的封装的同时,实现将基体10中的电信号,通过焊盘12、金属连接柱20和焊球14,传导至封装结构外部的部件。After performing step S14, as shown in FIG. 12, the solder ball 14 is located on the surface of the metal connection pillar 20 and is electrically connected to the metal connection pillar 20, the pad 12 is located at one end of the metal connection pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, components outside the package structure are connected to the metal connecting pillar 40 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
WLPSAW滤波器一般应用于射频前端的系统级封装(system in a package,SIP)模组中,相关技术中对基体10进行封装时,如图13a所示,需要先采用构图工艺,在基体10的第一表面上形成围墙层(wall)51和屋顶层(roof)52,围墙层51和屋顶层52形成容纳叉指换能器16的保护腔Q,并露出焊盘12。然后采用电镀工艺,形成与焊盘12电连接的金属连接件53,以实现基体10与焊球14之间的信号传输。根据需要,围墙层51和屋顶层52沿第一方向X上的尺寸均在10~40um左右。这就导致围墙层51和屋顶层52露出焊盘12后,需要进行深孔电镀,增加了电镀难度,提升了加工成本。WLPSAW filters are generally used in system-in-a-package (SIP) modules of the RF front-end. When the substrate 10 is packaged in related technologies, as shown in Figure 13a, a patterning process is required. A wall 51 and a roof 52 are formed on the first surface. The wall 51 and the roof 52 form a protective cavity Q for accommodating the interdigital transducer 16 and expose the pad 12. Then, an electroplating process is used to form a metal connector 53 electrically connected to the pad 12 to realize signal transmission between the base 10 and the solder balls 14. According to needs, the dimensions of the surrounding wall layer 51 and the roof layer 52 along the first direction X are both about 10-40 um. As a result, after the surrounding wall layer 51 and the roof layer 52 expose the pad 12, deep hole electroplating is required, which increases the difficulty of electroplating and increases the processing cost.
而本实施例中,先采用引线键合工艺形成金属连接柱20,然后再形成第一绝缘层 30和第二绝缘层40。这样一来,不仅形成金属连接柱20的工艺比形成金属连接件53的工艺成本低,而且在形成第一绝缘薄膜31和第二绝缘薄膜41时,覆盖在金属连接柱20上的第一绝缘薄膜31和第二绝缘薄膜41比较薄,对其进行刻蚀以露出金属连接柱20的速度快,可提升加工速率。In this embodiment, a wire bonding process is first used to form the metal connecting pillar 20, and then the first insulating layer 30 and the second insulating layer 40 are formed. In this way, not only is the process cost of forming the metal connecting pillar 20 lower than that of forming the metal connecting member 53, but also when forming the first insulating film 31 and the second insulating film 41, the first insulating film covering the metal connecting pillar 20 is The thin film 31 and the second insulating film 41 are relatively thin, and etching them to expose the metal connecting pillars 20 can increase the processing speed.
并且,本申请实施例是采用引线键合工艺形成侧面为曲面的金属连接柱20,相比于相关技术中采用的电镀工艺形成填孔金属13时,需要先在焊盘12表面形成阻挡层和种子层的方法,本申请实施例提供的封装方法形成金属连接柱20的工艺简单,成本较低。并且,金属连接柱20与焊盘12直接接触,中间不夹杂其他膜层,可降低因膜层断裂导致金属连接柱20与焊盘12连接不稳定的风险。In addition, the embodiment of the present application adopts a wire bonding process to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used in the related art to form the filling metal 13, it is necessary to form a barrier layer and a barrier layer on the surface of the pad 12 first. In the seed layer method, the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost. In addition, the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
此外,如图13b所示,采用本申请实施例提供的封装方法进行封装时,在封装之前,位于基体10表面的多个焊盘12是独立存在的,没有图1b中所示的电镀桥15。因此,基体10的结构简单,从而简化封装结构的结构。而且,在封装完成后无需切断电镀桥15,可简化工艺流程。In addition, as shown in FIG. 13b, when the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no electroplating bridge 15 shown in FIG. 1b. . Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
再者,若如图1a所示的,采用电镀工艺形成填孔金属13的方法进行封装,如图1b所示,由于基体10表面的焊盘12与电镀桥15相互电连接,使得基体10表面的各个焊盘12相连接,导致多个焊盘12之间处于短路状态。因此,无法对基体10提前进行良品筛选,只有在封装完成后,刻蚀电镀桥15以使各个焊盘12之间绝缘后,才能进行良品筛选,造成对废片进行封装的工艺浪费。而采用本申请实施例提供的封装方法进行封装时,由于在封装之前,如图13b所示,基体10表面的焊盘12独立存在。因此,在对基体10进行封装之前,可以直接对基体10进行良品筛选,直接淘汰废品的基体10,可避免工艺浪费,提高产出。Furthermore, if as shown in FIG. 1a, an electroplating process is used to form the via-filling metal 13 for packaging. As shown in FIG. Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the electroplating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, resulting in waste of the packaging process for the waste chips. When the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
实施例三Example three
实施例三也是对WLPSAW滤波器的封装方法进行示意,但实施例三与实施例二的不同在于,封装步骤不同,先形成第一绝缘层30,再形成金属连接柱20,然后形成第二绝缘层40。The third embodiment also illustrates the packaging method of the WLPSAW filter, but the difference between the third embodiment and the second embodiment is that the packaging steps are different. The first insulating layer 30 is formed first, then the metal connecting pillar 20 is formed, and then the second insulating layer is formed.层40.
如图14所示,WLPSAW滤波器的封装方法包括:As shown in Figure 14, the packaging method of WLPSAW filter includes:
S21:如图15a所示,在基体10的第一表面上形成第一绝缘层30,第一绝缘层30具有第一过孔32和第二过孔33,第一过孔32和第二过孔33均贯穿第一绝缘层30。S21: As shown in FIG. 15a, a first insulating layer 30 is formed on the first surface of the substrate 10. The first insulating layer 30 has a first via 32 and a second via 33, and a first via 32 and a second via The holes 33 all penetrate the first insulating layer 30.
其中,基体10包括焊盘12和叉指换能器16,焊盘12和叉指换能器16均设置于基体10的第一表面A。The base 10 includes a pad 12 and an interdigital transducer 16, and both the pad 12 and the interdigital transducer 16 are disposed on the first surface A of the base 10.
执行步骤S21后,如图15a所示,第一绝缘层30覆盖在基体10的第一表面上,第一过孔32和第二过孔33均贯穿第一绝缘层30。在待形成的金属连接柱20与整个焊盘12接触的情况下,如图15a所示,焊盘12设置于第一过孔32内,第一过孔32露出整个焊盘12。在待形成的金属连接柱20与焊盘12的部分接触的情况下,如图15b所示,第一过孔32露出焊盘12,但第一过孔32仅露出部分焊盘12。叉指换能器16设置于第二过孔33内且第二过孔33露出叉指换能器16。After performing step S21, as shown in FIG. 15a, the first insulating layer 30 covers the first surface of the base 10, and both the first via 32 and the second via 33 penetrate the first insulating layer 30. When the metal connecting pillar 20 to be formed is in contact with the entire pad 12, as shown in FIG. 15a, the pad 12 is disposed in the first via 32, and the first via 32 exposes the entire pad 12. In the case where the metal connection pillar 20 to be formed is in contact with part of the pad 12, as shown in FIG. 15b, the first via 32 exposes the pad 12, but the first via 32 only exposes a part of the pad 12. The interdigital transducer 16 is disposed in the second via hole 33 and the second via hole 33 exposes the interdigital transducer 16.
其中,第一过孔32和第二过孔33的形状仅为一种示意,不做任何限定。例如可以通过构图工艺或者激光开孔工艺形成第一绝缘层30。Among them, the shapes of the first via 32 and the second via 33 are merely illustrative, and are not limited in any way. For example, the first insulating layer 30 may be formed by a patterning process or a laser opening process.
S22:如图15c所示,采用引线键合工艺,在焊盘12的表面形成金属连接柱20, 金属连接柱20的侧面为曲面,且金属连接柱20与焊盘12连接,金属连接柱20用于传输基体10的电信号。S22: As shown in FIG. 15c, a wire bonding process is used to form a metal connecting pillar 20 on the surface of the pad 12, the side of the metal connecting pillar 20 is curved, and the metal connecting pillar 20 is connected to the pad 12, and the metal connecting pillar 20 It is used to transmit the electrical signal of the base 10.
其中,步骤S21中形成的第一绝缘层30露出焊盘12,因此,执行步骤S22后,金属连接柱20位于第一绝缘层30的第一过孔32内,第一绝缘层30依然露出金属连接柱20。基于此,执行完步骤S22后,如图15c所示,金属连接柱20位于焊盘12表面且与焊盘12电连接,第一绝缘层20覆盖在基体10的第一表面上,并且第一绝缘层30露出金属连接柱20。The first insulating layer 30 formed in step S21 exposes the pad 12. Therefore, after step S22 is performed, the metal connecting pillar 20 is located in the first via 32 of the first insulating layer 30, and the first insulating layer 30 still exposes the metal. Connect the column 20. Based on this, after performing step S22, as shown in FIG. 15c, the metal connecting pillar 20 is located on the surface of the pad 12 and is electrically connected to the pad 12, the first insulating layer 20 covers the first surface of the base 10, and the first The insulating layer 30 exposes the metal connection pillar 20.
可选的,金属连接柱20起到导线的作用,具有电导通性,也就是,基体10中的电信号,通过焊盘10和金属连接柱10,将电信号传送到封装结构以外的部件。Optionally, the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
需要说明的是,采用引线键合工艺形成的金属连接柱20的侧面为曲面(例如为球面),由于在形成金属连接柱20时,是将熔融状态下的金属滴到焊盘12的表面,然后迅速冷却。而熔融状态下的金属的流动性比较小,因此,冷却后的金属连接柱20的形状受引线键合工艺影响,不受第一过孔32的形状的影响。It should be noted that the side surface of the metal connecting pillar 20 formed by the wire bonding process is curved (for example, a spherical surface), because when the metal connecting pillar 20 is formed, the molten metal is dropped onto the surface of the pad 12, Then cool quickly. However, the fluidity of the metal in the molten state is relatively small. Therefore, the shape of the metal connecting pillar 20 after cooling is affected by the wire bonding process, and is not affected by the shape of the first via 32.
基于此,在一种可能的实施中,为了降低水氧从金属连接柱20的侧面与第一过孔32的孔壁之间的间隙处进入,对焊盘12进行腐蚀的可能性。如图15c所示,金属连接柱20的侧面与第一过孔32的孔壁相接触。可以理解的是,在这种情况下,金属连接柱20与第一过孔32可以完全贴合,也可以部分接触,与第一过孔32的形状有关。Based on this, in a possible implementation, in order to reduce the possibility of water and oxygen entering from the gap between the side surface of the metal connecting pillar 20 and the hole wall of the first via 32, the pad 12 is corroded. As shown in FIG. 15c, the side surface of the metal connecting pillar 20 is in contact with the hole wall of the first via hole 32. It can be understood that, in this case, the metal connecting pillar 20 and the first via 32 may be completely attached to each other, or may be partly in contact with each other, depending on the shape of the first via 32.
在另一种可能的实施例中,为了降低对金属连接柱20的尺寸的工艺精度的要求,避免金属连接柱20因微小的尺寸误差而无法放入第一过孔32中。如图15d所示,金属连接柱20的侧面与第一过孔32的孔壁之间具有间隙。In another possible embodiment, in order to reduce the requirements on the process accuracy of the size of the metal connecting column 20, it is avoided that the metal connecting column 20 cannot be placed in the first via 32 due to a slight size error. As shown in FIG. 15d, there is a gap between the side surface of the metal connecting column 20 and the hole wall of the first via hole 32.
S23:如图15e所示,在第一绝缘层30远离基体10的一侧形成第二绝缘层40,第二绝缘层40具有第三过孔42,第三过孔42贯穿第二绝缘层40且与第一过孔32连通;金属连接柱20的一部分设置于第一过孔内,一部分设置于第三过孔42内。执行步骤S23后,如图15e所示,第二绝缘层40覆盖第一绝缘层30,金属连接柱20设置于第一过孔32和第三过孔42形成的连通孔内,且第二绝缘层40露出金属连接柱20,第二绝缘层40、第一绝缘层30和基体10之间形成有保护腔Q,叉指换能器16位于保护腔Q内。此处,由于先形成金属连接柱20,然后形成第二绝缘层40。因此,金属连接柱20与第二绝缘层40接触的侧面的形状由金属连接柱20的形状决定。S23: As shown in FIG. 15e, a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates the second insulating layer 40 And it communicates with the first via hole 32; a part of the metal connecting column 20 is disposed in the first via hole, and a part is disposed in the third via hole 42. After performing step S23, as shown in FIG. 15e, the second insulating layer 40 covers the first insulating layer 30, the metal connecting post 20 is disposed in the communicating hole formed by the first via 32 and the third via 42, and the second insulating The layer 40 exposes the metal connecting pillar 20, a protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q. Here, since the metal connecting pillar 20 is formed first, then the second insulating layer 40 is formed. Therefore, the shape of the side surface of the metal connecting pillar 20 in contact with the second insulating layer 40 is determined by the shape of the metal connecting pillar 20.
关于形成第二绝缘层40的方式,可以与实施例二中形成第二绝缘层40的方式相同。如图15e所示,例如,通过层压工艺形成第二绝缘薄膜41,然后通过光刻工艺或激光开孔工艺形成第三过孔42,以形成第二绝缘层40。此时,层压工艺形成第二绝缘薄膜41时,由于绝缘薄膜远离第一绝缘层30一侧有硬度较大的承载膜,因此,在将绝缘薄膜层压至第一绝缘层30表面时,不会填充金属连接柱20与第一过孔32之间的间隙,也不会填充第二过孔33,最终形成的第二绝缘层40如图15e所示。需要说明的是,本实施例中的第三过孔42与实施例二中的第三过孔43是相同的,在此不进行赘述。The method of forming the second insulating layer 40 can be the same as the method of forming the second insulating layer 40 in the second embodiment. As shown in FIG. 15e, for example, the second insulating film 41 is formed by a lamination process, and then the third via 42 is formed by a photolithography process or a laser opening process to form the second insulating layer 40. At this time, when the second insulating film 41 is formed by the lamination process, since the insulating film is away from the first insulating layer 30, there is a carrier film with greater hardness. Therefore, when the insulating film is laminated to the surface of the first insulating layer 30, The gap between the metal connecting pillar 20 and the first via hole 32 will not be filled, and the second via hole 33 will not be filled, and the finally formed second insulating layer 40 is as shown in FIG. 15e. It should be noted that the third via 42 in this embodiment is the same as the third via 43 in the second embodiment, and will not be repeated here.
其中,关于沿第一方向X上,金属连接柱20与第一绝缘层30和第二绝缘层40的尺寸关系,在一些实施例中,如图15f所示,金属连接柱20远离基体10的表面a1与第二绝缘层40远离基体10的表面a2平齐,也就是,沿第一方向X,焊盘12的厚 度和金属连接柱20的厚度的总和,等于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。在一些实施例中,如图15g所示,金属连接柱20远离基体10的表面a1高于第二绝缘层40远离基体10的表面a2,也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,大于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。Wherein, regarding the size relationship between the metal connecting pillar 20 and the first insulating layer 30 and the second insulating layer 40 along the first direction X, in some embodiments, as shown in FIG. 15f, the metal connecting pillar 20 is far away from the base 10 The surface a1 is flush with the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 The total thickness of the second insulating layer 40. In some embodiments, as shown in FIG. 15g, the surface a1 of the metal connecting pillar 20 away from the base 10 is higher than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12 The sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
在一些实施例中,如图15e所示,金属连接柱20远离基体10的表面a1低于第二绝缘层40远离基体10的表面a2,也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,小于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。In some embodiments, as shown in FIG. 15e, the surface a1 of the metal connecting pillar 20 away from the base 10 is lower than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12 The sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
例如,在一种可能的实施例中,如图15e所示,金属连接柱20沿第一方向X上的厚度为h1,第一绝缘层30沿第一方向X上的厚度为h2,第二绝缘层40沿第一方向X上的厚度为h3,金属连接柱20沿第一方向X上的厚度h1的取值范围在((h2+h3)-5μm)和((h2+h3)+5μm)之间,也就是,h1的最小取值是(h2+h3)-5μm,最大取值是(h2+h3)+5μm。For example, in a possible embodiment, as shown in FIG. 15e, the thickness of the metal connecting pillar 20 along the first direction X is h1, the thickness of the first insulating layer 30 along the first direction X is h2, and the thickness of the second insulating layer 30 along the first direction X is h2. The thickness of the insulating layer 40 along the first direction X is h3, and the thickness h1 of the metal connecting pillar 20 along the first direction X ranges from ((h2+h3)-5μm) and ((h2+h3)+5μm ), that is, the minimum value of h1 is (h2+h3)-5μm, and the maximum value is (h2+h3)+5μm.
可选的,与步骤S14类似,在完成步骤S23后,可以进行步骤S24,也可以不进行该步骤,将完成封装的结构直接与外部的部件进行连接。Optionally, similar to step S14, after step S23 is completed, step S24 may be performed, or this step may not be performed, and the completed packaged structure is directly connected to external components.
S24、如图15h所示,在金属连接柱20的一端形成焊球14;焊球14相对于焊盘12设置于金属连接柱20的另一端,焊球14与金属连接柱20连接,用于传输基体10的电信号。S24. As shown in FIG. 15h, a solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
执行完步骤S24后,如图15h所示,焊球14位于金属连接柱20的表面,并与金属连接柱20电连接,焊盘12位于金属连接柱20的一端,焊球14相对焊盘12位于金属连接柱20的另一端,封装结构外部的部件通过焊球14与金属连接柱20进行连接。在完成对基体10的封装的同时,实现将基体10中的电信号,通过焊盘12、金属连接柱20和焊球14,传导至封装结构外部的部件。After performing step S24, as shown in FIG. 15h, the solder ball 14 is located on the surface of the metal connection pillar 20 and is electrically connected to the metal connection pillar 20, the pad 12 is located at one end of the metal connection pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, the external components of the package structure are connected to the metal connecting pillar 20 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
需要说明的是,其他没有进行具体说明的部件,与实施例二中相同,在此不进行赘述。It should be noted that other components that are not specifically described are the same as those in the second embodiment, and will not be repeated here.
本实施例中,采用引线键合工艺形成侧面为曲面的金属连接柱20,相比于相关技术中采用的电镀工艺形成填孔金属13时,需要先在焊盘12表面形成阻挡层和种子层的方法,本申请实施例提供的封装方法形成金属连接柱20的工艺简单,成本较低。并且,金属连接柱20与焊盘12直接接触,中间不夹杂其他膜层,可降低因膜层断裂导致金属连接柱20与焊盘12连接不稳定的风险。In this embodiment, a wire bonding process is used to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used in the related art to form the filling metal 13, a barrier layer and a seed layer need to be formed on the surface of the pad 12 first. According to the method, the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost. In addition, the metal connecting pillar 20 is in direct contact with the pad 12 without other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
而且,在形成第二绝缘薄膜41时,覆盖在金属连接柱20上的第二绝缘薄膜41比较薄,对其进行刻蚀以露出金属连接柱20的速度快,可提升加工速率。Moreover, when the second insulating film 41 is formed, the second insulating film 41 covering the metal connecting pillar 20 is relatively thin, and the etching speed to expose the metal connecting pillar 20 can increase the processing speed.
此外,采用本申请实施例提供的封装方法进行封装时,在封装之前,位于基体10表面的多个焊盘12是独立存在的,没有图1b中所示的电镀桥15。因此,基体10的结构简单,从而简化封装结构的结构。而且,在封装完成后无需切断电镀桥15,可简化工艺流程。In addition, when the packaging method provided by the embodiment of the present application is used for packaging, the multiple pads 12 on the surface of the base body 10 exist independently before the packaging, and there is no electroplating bridge 15 shown in FIG. 1b. Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
再者,若如图1a所示的,采用电镀工艺形成填孔金属13的方法进行封装,如图1b所示,由于基体10表面的焊盘12与电镀桥15相互电连接,使得基体10表面的各个焊盘12相连接,导致多个焊盘12之间处于短路状态。因此,无法对基体10提前进行良品筛选,只有在封装完成后,刻蚀电镀桥15以使各个焊盘12之间绝缘后,才能 进行良品筛选,造成对废片进行封装的工艺浪费。而采用本申请实施例提供的封装方法进行封装时,由于在封装之前,如图13b所示,基体10表面的焊盘12独立存在。因此,在对基体10进行封装之前,可以直接对基体10进行良品筛选,直接淘汰废品的基体10,可避免工艺浪费,提高产出。Furthermore, if as shown in FIG. 1a, an electroplating process is used to form the via-filling metal 13 for packaging. As shown in FIG. Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the plating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, which results in waste of the packaging process for the waste chips. When the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
实施例四Example four
实施例四也是对WLPSAW滤波器的封装方法进行示意,但实施例四与实施例二的不同在于,封装步骤不同,先形成第一绝缘层30,再形成第二绝缘层40,然后形成金属连接柱20。如图16所示,WLPSAW滤波器的封装方法包括:The fourth embodiment also illustrates the packaging method of the WLPSAW filter, but the difference between the fourth embodiment and the second embodiment is that the packaging steps are different. The first insulating layer 30 is formed first, then the second insulating layer 40 is formed, and then the metal connection is formed.柱20。 Post 20. As shown in Figure 16, the packaging method of the WLPSAW filter includes:
S31:如图15a所示,在基体10的第一表面上形成第一绝缘层30,第一绝缘层30具有第一过孔32和第二过孔33,第一过孔32和第二过孔33均贯穿第一绝缘层30。S31: As shown in FIG. 15a, a first insulating layer 30 is formed on the first surface of the substrate 10. The first insulating layer 30 has a first via 32 and a second via 33, and the first via 32 and a second via The holes 33 all penetrate the first insulating layer 30.
其中,基体10包括焊盘12和叉指换能器16,焊盘12和叉指换能器16均设置于基体10的第一表面A。The base 10 includes a pad 12 and an interdigital transducer 16, and both the pad 12 and the interdigital transducer 16 are disposed on the first surface A of the base 10.
执行步骤S31后,如图15a所示,第一绝缘层30覆盖在基体10的第一表面上,第一过孔32和第二过孔33均贯穿第一绝缘层30。在待形成的金属连接柱20与整个焊盘12接触的情况下,如图15a所示,焊盘12设置于第一过孔32内,且第一过孔32露出整个焊盘12。在待形成的金属连接柱20与焊盘12的部分接触的情况下,如图15b所示,第一过孔32露出焊盘12,但第一过孔32仅露出部分焊盘12。叉指换能器16设置于第二过孔33内,且第二过孔33露出叉指换能器16。After performing step S31, as shown in FIG. 15a, the first insulating layer 30 covers the first surface of the base 10, and both the first via 32 and the second via 33 penetrate the first insulating layer 30. When the metal connecting pillar 20 to be formed is in contact with the entire pad 12, as shown in FIG. 15a, the pad 12 is disposed in the first via 32, and the first via 32 exposes the entire pad 12. In the case where the metal connection pillar 20 to be formed is in contact with part of the pad 12, as shown in FIG. 15b, the first via 32 exposes the pad 12, but the first via 32 only exposes a part of the pad 12. The interdigital transducer 16 is disposed in the second via hole 33, and the second via hole 33 exposes the interdigital transducer 16.
例如,可以通过构图工艺或者激光开孔工艺形成第一绝缘层30。其中,第一过孔32和第二过孔33的形状仅为一种示意,不做任何限定。For example, the first insulating layer 30 may be formed through a patterning process or a laser opening process. Among them, the shapes of the first via 32 and the second via 33 are merely illustrative, and are not limited in any way.
S32:如图17a所示,在第一绝缘层30远离基体10的一侧形成第二绝缘层40,第二绝缘层40具有第三过孔42,第三过孔42贯穿第二绝缘层40且与第一过孔32连通。S32: As shown in FIG. 17a, a second insulating layer 40 is formed on the side of the first insulating layer 30 away from the base 10, the second insulating layer 40 has a third via 42, and the third via 42 penetrates the second insulating layer 40 And it communicates with the first via hole 32.
其中,第二绝缘层40、第一绝缘层30和基体10之间形成有保护腔Q,叉指换能器16位于保护腔Q内。Wherein, a protective cavity Q is formed between the second insulating layer 40, the first insulating layer 30 and the base 10, and the interdigital transducer 16 is located in the protective cavity Q.
S33:如图17b所示,采用引线键合工艺,在焊盘12的表面形成金属连接柱20,金属连接柱20的侧面为曲面,且金属连接柱20与焊盘12连接,金属连接柱20用于传输基体10的电信号。S33: As shown in FIG. 17b, a wire bonding process is used to form a metal connection post 20 on the surface of the pad 12, the side of the metal connection post 20 is curved, and the metal connection post 20 is connected to the pad 12, and the metal connection post 20 It is used to transmit the electrical signal of the base 10.
在这种情况下,金属连接柱20的一部分设置于第一过孔32内,一部分设置于第三过孔42内,金属连接柱20设置于第一过孔32和第三过孔42形成的连通孔内。In this case, a part of the metal connecting post 20 is disposed in the first via 32, a part is disposed in the third via 42, and the metal connecting post 20 is disposed in the first via 32 and the third via 42. In the communicating hole.
可选的,金属连接柱20起到导线的作用,具有电导通性,也就是,基体10中的电信号,通过焊盘10和金属连接柱10,将电信号传送到封装结构以外的部件。Optionally, the metal connection post 20 functions as a wire and has electrical conductivity, that is, the electrical signal in the base 10 transmits the electrical signal to the components outside the package structure through the pad 10 and the metal connection post 10.
需要说明的是,采用引线键合工艺形成的金属连接柱20的侧面为曲面(例如为球面),由于在形成金属连接柱20时,是将熔融状态下的金属滴到焊盘12的表面,然后迅速冷却。而熔融状态下的金属的流动性比较小,因此,冷却后的金属连接柱20的形状受引线键合工艺影响,不受第一过孔32和第三过孔42的形状的影响。It should be noted that the side surface of the metal connecting pillar 20 formed by the wire bonding process is curved (for example, a spherical surface), because when the metal connecting pillar 20 is formed, the molten metal is dropped onto the surface of the pad 12, Then cool quickly. The fluidity of the metal in the molten state is relatively small. Therefore, the shape of the cooled metal connecting pillar 20 is affected by the wire bonding process, and is not affected by the shape of the first via 32 and the third via 42.
基于此,在一种可能的实施中,为了降低水氧从金属连接柱20的侧面与第一过孔32的孔壁之间的间隙处进入,对焊盘12进行腐蚀的可能性。如图17b所示,金属连接柱20的侧面与第一过孔32的孔壁和第二过孔42的孔壁中的至少一个相接触。Based on this, in a possible implementation, in order to reduce the possibility of water and oxygen entering from the gap between the side surface of the metal connecting pillar 20 and the hole wall of the first via 32, the pad 12 is corroded. As shown in FIG. 17b, the side surface of the metal connecting post 20 is in contact with at least one of the hole wall of the first via 32 and the hole wall of the second via 42.
在另一种可能的实施例中,为了降低对金属连接柱20的尺寸的工艺精度的要求,避免金属连接柱20因微小的尺寸误差而无法放入第一过孔32和第二过孔42中。如图17c所示,金属连接柱20的侧面与第一过孔32的孔壁和第二过孔42的孔壁之间具有间隙。此处,虽然金属连接柱20的侧面与第一过孔32的孔壁和第二过孔42的孔壁之间具有间隙,但在后续进行其他封装步骤时,会进一步进行封装,不会影响产品的性能。In another possible embodiment, in order to reduce the requirements on the process accuracy of the size of the metal connecting column 20, it is avoided that the metal connecting column 20 cannot be placed in the first via 32 and the second via 42 due to a slight size error. middle. As shown in FIG. 17c, there is a gap between the side surface of the metal connecting column 20 and the hole wall of the first via hole 32 and the hole wall of the second via hole 42. Here, although there is a gap between the side surface of the metal connecting column 20 and the wall of the first via 32 and the wall of the second via 42, when other packaging steps are subsequently performed, further packaging will be performed without affecting Product performance.
其中,关于沿第一方向X上,金属连接柱20与第一绝缘层30和第二绝缘层40的尺寸关系,在一些实施例中,如图17d所示,金属连接柱20远离基体10的表面a1与第二绝缘层40远离基体10的表面a2平齐,也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,等于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。Wherein, regarding the dimensional relationship between the metal connecting pillar 20 and the first insulating layer 30 and the second insulating layer 40 along the first direction X, in some embodiments, as shown in FIG. 17d, the metal connecting pillar 20 is far away from the base 10 The surface a1 is flush with the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the sum of the thickness of the pad 12 and the thickness of the metal connecting pillar 20 is equal to the sum of the thickness of the first insulating layer 30 The total thickness of the second insulating layer 40.
在一些实施例中,如图17e所示,金属连接柱20远离基体10的表面a1高于第二绝缘层40远离基体10的表面a2,也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,大于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。In some embodiments, as shown in FIG. 17e, the surface a1 of the metal connecting pillar 20 away from the base 10 is higher than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12 The sum of the thickness of the metal connecting pillar 20 and the thickness of the metal connecting pillar 20 is greater than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
在一些实施例中,为了能够形成表面平整的第二绝缘膜层42,以便于形成第三过孔42。如图17c所示,金属连接柱20远离基体10的表面a1低于第二绝缘层40远离基体10的表面a2,也就是,沿第一方向X,焊盘12的厚度和金属连接柱20的厚度的总和,小于第一绝缘层30的厚度和第二绝缘层40的厚度的总和。In some embodiments, in order to be able to form the second insulating film layer 42 with a flat surface, so as to facilitate the formation of the third via hole 42. As shown in FIG. 17c, the surface a1 of the metal connecting pillar 20 away from the base 10 is lower than the surface a2 of the second insulating layer 40 away from the base 10, that is, along the first direction X, the thickness of the pad 12 and the thickness of the metal connecting pillar 20 The sum of the thicknesses is smaller than the sum of the thickness of the first insulating layer 30 and the thickness of the second insulating layer 40.
例如,在一种可能的实施例中,如图17c所示,金属连接柱20沿第一方向X上的厚度为h1,第一绝缘层30沿第一方向X上的厚度为h2,第二绝缘层40沿第一方向X上的厚度为h3,金属连接柱20沿第一方向X上的厚度h1的取值范围在(h2+h3)-5μm和(h2+h3)+5μm之间,也就是,h1的最小取值是(h2+h3)-5μm,最大取值是(h2+h3)+5μm。For example, in a possible embodiment, as shown in FIG. 17c, the thickness of the metal connecting pillar 20 along the first direction X is h1, the thickness of the first insulating layer 30 along the first direction X is h2, and the thickness of the second insulating layer 30 along the first direction X is h2. The thickness of the insulating layer 40 along the first direction X is h3, and the thickness h1 of the metal connecting pillar 20 along the first direction X ranges between (h2+h3)-5μm and (h2+h3)+5μm, That is, the minimum value of h1 is (h2+h3)-5μm, and the maximum value is (h2+h3)+5μm.
可选的,与步骤S14类似,在完成步骤S33后,可以进行步骤S34,也可以不进行该步骤,将完成封装的结构直接与外部的部件进行连接。Optionally, similar to step S14, after step S33 is completed, step S34 may be performed, or this step may not be performed, and the completed packaged structure is directly connected to external components.
S34、如图17f所示,在金属连接柱20的一端形成焊球14;焊球14相对于焊盘12设置于金属连接柱20的另一端,焊球14与金属连接柱20连接,用于传输基体10的电信号。S34. As shown in FIG. 17f, a solder ball 14 is formed at one end of the metal connection post 20; the solder ball 14 is disposed at the other end of the metal connection post 20 relative to the pad 12, and the solder ball 14 is connected to the metal connection post 20 for The electrical signal of the base 10 is transmitted.
执行完步骤S34后,如图17f所示,焊球14位于金属连接柱20的表面,并与金属连接柱20电连接,焊盘12位于金属连接柱20的一端,焊球14相对焊盘12位于金属连接柱20的另一端,封装结构外部的部件通过焊球14与金属连接柱20进行连接。在完成对基体10的封装的同时,实现将基体10中的电信号,通过焊盘12、金属连接柱20和焊球14,传导至封装结构外部的部件。After performing step S34, as shown in FIG. 17f, the solder ball 14 is located on the surface of the metal connecting pillar 20 and is electrically connected to the metal connecting pillar 20, the pad 12 is located at one end of the metal connecting pillar 20, and the solder ball 14 is opposite to the pad 12 Located at the other end of the metal connecting pillar 20, the external components of the package structure are connected to the metal connecting pillar 20 through solder balls 14. While the packaging of the base 10 is completed, it is realized that the electrical signals in the base 10 are transmitted to the external components of the packaging structure through the pad 12, the metal connecting pillar 20 and the solder ball 14.
需要说明的是,其他没有进行具体说明的部件,与实施例二中相同,在此不进行赘述。It should be noted that other components that are not specifically described are the same as those in the second embodiment, and will not be repeated here.
本实施例中,采用引线键合工艺形成侧面为曲面的金属连接柱20,相比于相关技术中采用的电镀工艺形成填孔金属13时,需要先在焊盘12表面形成阻挡层和种子层的方法,本申请实施例提供的封装方法形成金属连接柱20的工艺简单,成本较低。并且,金属连接柱20与焊盘12直接接触,中间不夹杂其他膜层,可降低因膜层断裂导 致金属连接柱20与焊盘12连接不稳定的风险。In this embodiment, a wire bonding process is used to form the metal connecting post 20 with a curved side surface. Compared with the electroplating process used in the related art to form the filling metal 13, a barrier layer and a seed layer need to be formed on the surface of the pad 12 first. According to the method, the packaging method provided by the embodiment of the present application has a simple process for forming the metal connecting pillar 20 and lower cost. In addition, the metal connecting pillar 20 is in direct contact with the pad 12 without any other film layers in between, which can reduce the risk of unstable connection between the metal connecting pillar 20 and the pad 12 due to film fracture.
此外,采用本申请实施例提供的封装方法进行封装时,在封装之前,位于基体10表面的多个焊盘12是独立存在的,没有图1b中所示的电镀桥15。因此,基体10的结构简单,从而简化封装结构的结构。而且,在封装完成后无需切断电镀桥15,可简化工艺流程。In addition, when the packaging method provided by the embodiment of the present application is used for packaging, before the packaging, the multiple pads 12 on the surface of the base body 10 exist independently, and there is no electroplating bridge 15 shown in FIG. 1b. Therefore, the structure of the base body 10 is simple, thereby simplifying the structure of the packaging structure. Moreover, there is no need to cut off the plating bridge 15 after the packaging is completed, which can simplify the process flow.
再者,若如图1a所示的,采用电镀工艺形成填孔金属13的方法进行封装,如图1b所示,由于基体10表面的焊盘12与电镀桥15相互电连接,使得基体10表面的各个焊盘12相连接,导致多个焊盘12之间处于短路状态。因此,无法对基体10提前进行良品筛选,只有在封装完成后,刻蚀电镀桥15以使各个焊盘12之间绝缘后,才能进行良品筛选,造成对废片进行封装的工艺浪费。而采用本申请实施例提供的封装方法进行封装时,由于在封装之前,如图13b所示,基体10表面的焊盘12独立存在。因此,在对基体10进行封装之前,可以直接对基体10进行良品筛选,直接淘汰废品的基体10,可避免工艺浪费,提高产出。Furthermore, if as shown in FIG. 1a, an electroplating process is used to form the via-filling metal 13 for packaging. As shown in FIG. Each of the pads 12 is connected, resulting in a short circuit state between the plurality of pads 12. Therefore, good product screening cannot be performed on the substrate 10 in advance. Only after the packaging is completed, the electroplating bridge 15 is etched to insulate the pads 12, and then the good product screening can be performed, resulting in waste of the packaging process for the waste chips. When the packaging method provided by the embodiment of the present application is used for packaging, since before the packaging, as shown in FIG. 13b, the pads 12 on the surface of the substrate 10 exist independently. Therefore, before the substrate 10 is packaged, the substrate 10 can be directly screened for good products, and the waste substrate 10 can be directly eliminated, which can avoid process waste and increase the output.
以上,需要说明的是,无论电子设备1是终端设备、智能显示穿戴设备(例如AR或者VR)、通信设备、车机、智能汽车等中的任一种,上述实施例一至实施例四所示的封装结构,可与电子设备1中的PCB板电连接,PCB板用于承载上述封装结构,并与封装结构完成信号交互,以向电子设备1提供驱动用信号。封装结构并不限定为仅适用于图2所示的电子设备1。Above, it should be noted that, regardless of whether the electronic device 1 is a terminal device, a smart display wearable device (such as AR or VR), a communication device, a car machine, a smart car, etc., the foregoing embodiment 1 to embodiment 4 are shown in The packaging structure can be electrically connected to the PCB board in the electronic device 1. The PCB board is used to carry the above-mentioned packaging structure and complete signal interaction with the packaging structure to provide driving signals to the electronic device 1. The packaging structure is not limited to be only applicable to the electronic device 1 shown in FIG. 2.
以上,仅为本申请的具体实施方式,但申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。The above are only specific implementations of this application, but the scope of protection of the application is not limited to this. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in this application, and they should all be covered Within the scope of protection of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

Claims (23)

  1. 一种封装结构,其特征在于,包括:A packaging structure, characterized in that it comprises:
    基体,所述基体包括焊盘;所述焊盘设置于所述基体的第一表面;A base, the base includes a pad; the pad is disposed on the first surface of the base;
    金属连接柱,设置于所述焊盘的表面,并与所述焊盘连接;The metal connecting pillar is arranged on the surface of the pad and is connected to the pad;
    第一绝缘层,覆盖在所述基体的所述第一表面,所述第一绝缘层具有第一过孔,所述第一过孔贯穿所述第一绝缘层;部分的或者全部的所述金属连接柱设置于所述第一过孔内;The first insulating layer covers the first surface of the base, the first insulating layer has a first via hole, and the first via hole penetrates the first insulating layer; part or all of the The metal connecting post is arranged in the first via hole;
    其中,所述金属连接柱的侧面为曲面,所述金属连接柱用于传输所述基体的电信号。Wherein, the side surface of the metal connecting column is a curved surface, and the metal connecting column is used to transmit the electrical signal of the base body.
  2. 根据权利要求1所述的封装结构,其特征在于,所述金属连接柱采用引线键合工艺制备而成。The package structure according to claim 1, wherein the metal connecting post is prepared by a wire bonding process.
  3. 根据权利要求1所述的封装结构,其特征在于,所述金属连接柱的侧面为球面。The package structure according to claim 1, wherein the side surface of the metal connecting pillar is a spherical surface.
  4. 根据权利要求1所述的封装结构,其特征在于,所述基体还包括叉指换能器,所述叉指换能器设置于所述基体的所述第一表面;The package structure of claim 1, wherein the base further comprises an interdigital transducer, and the interdigital transducer is disposed on the first surface of the base;
    所述第一绝缘层还具有第二过孔,所述第二过孔贯穿所述第一绝缘层;所述叉指换能器设置于所述第二过孔内。The first insulating layer further has a second via hole, and the second via hole penetrates the first insulating layer; the interdigital transducer is disposed in the second via hole.
  5. 根据权利要求1所述的封装结构,其特征在于,所述封装结构还包括:第二绝缘层;The package structure according to claim 1, wherein the package structure further comprises: a second insulating layer;
    所述第二绝缘层设置于所述第一绝缘层的表面,所述第二绝缘层具有第三过孔,所述第三过孔贯穿所述第二绝缘层且与所述第一过孔连通;部分的所述金属连接柱设置于所述第三过孔内。The second insulating layer is disposed on the surface of the first insulating layer, the second insulating layer has a third via hole, and the third via hole penetrates the second insulating layer and is connected to the first via hole. Connected; part of the metal connecting column is arranged in the third via.
  6. 根据权利要求5所述的封装结构,其特征在于,所述第二绝缘层、所述第一绝缘层和所述基体之间形成有保护腔,叉指换能器位于所述保护腔内。The package structure according to claim 5, wherein a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity.
  7. 根据权利要求5所述的封装结构,其特征在于,所述金属连接柱沿第一方向上的厚度为h1,所述第一绝缘层沿所述第一方向上的厚度为h2,所述第二绝缘层沿所述第一方向上的厚度为h3,其中,h1=((h2+h3)-5μm)~((h2+h3)+5μm);The package structure of claim 5, wherein the thickness of the metal connecting pillar in the first direction is h1, the thickness of the first insulating layer in the first direction is h2, and the thickness of the first insulating layer in the first direction is h2. The thickness of the second insulating layer along the first direction is h3, where h1=((h2+h3)-5μm)~((h2+h3)+5μm);
    其中,所述第一方向为垂直于所述基体的方向。Wherein, the first direction is a direction perpendicular to the substrate.
  8. 根据权利要求5所述的封装结构,其特征在于,所述第二绝缘层包括第一子绝缘层和第二子绝缘层;The package structure according to claim 5, wherein the second insulating layer comprises a first sub-insulating layer and a second sub-insulating layer;
    所述第一子绝缘层与所述第一绝缘层直接接触,所述第一子绝缘层、所述第一绝缘层和所述基体构成保护腔。The first sub-insulating layer is in direct contact with the first insulating layer, and the first sub-insulating layer, the first insulating layer and the base constitute a protection cavity.
  9. 根据权利要求1所述的封装结构,其特征在于,所述封装结构还包括焊球;The package structure according to claim 1, wherein the package structure further comprises solder balls;
    所述焊盘设置于所述金属连接柱的一端,所述焊球相对于所述焊盘设置于所述金属连接柱的另一端,所述焊球与所述金属连接柱连接,用于传输所述基体的电信号。The pad is arranged at one end of the metal connection pillar, the solder ball is arranged at the other end of the metal connection pillar relative to the pad, and the solder ball is connected to the metal connection pillar for transmission The electrical signal of the substrate.
  10. 根据权利要求1所述的封装结构,其特征在于,所述基体为芯片,所述基体上还设置有叉指换能器,所述叉指换能器设置于所述基体的所述第一表面;所述第一绝缘层还具有第二过孔,所述第二过孔贯穿所述第一绝缘层;所述叉指换能器设置于所述第二过孔内;The package structure according to claim 1, wherein the substrate is a chip, an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on the first of the substrate. Surface; the first insulating layer also has a second via hole, the second via hole penetrates the first insulating layer; the interdigital transducer is disposed in the second via hole;
    所述封装结构还包括:第二绝缘层;所述第二绝缘层设置于所述第一绝缘层的表 面,所述第二绝缘层具有第三过孔,所述第三过孔贯穿所述第二绝缘层且与所述第一过孔连通;部分的所述金属连接柱设置于所述第三过孔内;The package structure further includes: a second insulating layer; the second insulating layer is disposed on the surface of the first insulating layer, the second insulating layer has a third via hole, and the third via hole penetrates the The second insulating layer is in communication with the first via; part of the metal connecting pillar is disposed in the third via;
    所述第二绝缘层、所述第一绝缘层和所述基体之间形成有保护腔,所述叉指换能器位于所述保护腔内。A protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity.
  11. 一种电子设备,包括PCB板,其特征在于,所述电子设备还包括权利要求1-10任一项所述的封装结构,所述封装结构与所述PCB板电连接。An electronic device, comprising a PCB board, characterized in that the electronic device further comprises the packaging structure according to any one of claims 1-10, and the packaging structure is electrically connected to the PCB board.
  12. 根据权利要求11所述的电子设备,其特征在于,所述电子设备还包括显示模组、中框以及盖板;The electronic device according to claim 11, wherein the electronic device further comprises a display module, a middle frame and a cover plate;
    所述显示模组的出光面朝向所述盖板,所述显示模组的背面朝向所述中框;The light emitting surface of the display module faces the cover plate, and the back of the display module faces the middle frame;
    所述PCB板设置于所述中框远离所述显示模组的表面。The PCB board is arranged on the surface of the middle frame away from the display module.
  13. 一种封装结构的封装方法,其特征在于,所述封装结构包括基体,所述基体包括焊盘,所述焊盘设置于所述基体的第一表面;A method for packaging a package structure, wherein the package structure includes a base, the base includes a pad, and the pad is disposed on a first surface of the base;
    所述封装方法包括:The packaging method includes:
    在所述焊盘的表面形成金属连接柱;所述金属连接柱采用引线键合工艺形成;所述金属连接柱的侧面为曲面,所述金属连接柱与所述焊盘连接,所述金属连接柱用于传输所述基体的电信号;A metal connecting pillar is formed on the surface of the pad; the metal connecting pillar is formed by a wire bonding process; the side surface of the metal connecting pillar is a curved surface, the metal connecting pillar is connected to the pad, and the metal connecting The column is used to transmit the electrical signal of the substrate;
    在所述基体的所述第一表面形成第一绝缘层;所述第一绝缘层具有第一过孔,所述第一过孔贯穿所述第一绝缘层;部分的或者全部的所述金属连接柱设置于所述第一过孔内。A first insulating layer is formed on the first surface of the substrate; the first insulating layer has a first via hole, and the first via hole penetrates the first insulating layer; part or all of the metal The connecting column is arranged in the first via hole.
  14. 根据权利要求13所述的封装方法,其特征在于,在所述焊盘的表面形成金属连接柱之后,在所述基体的所述第一表面形成第一绝缘层。15. The packaging method of claim 13, wherein after forming a metal connection post on the surface of the pad, a first insulating layer is formed on the first surface of the base.
  15. 根据权利要求13所述的封装方法,其特征在于,所述基体为芯片,所述基体还包括叉指换能器;所述叉指换能器设置于所述基体的所述第一表面;The packaging method of claim 13, wherein the base is a chip, and the base further comprises an interdigital transducer; the interdigital transducer is disposed on the first surface of the base;
    在所述基体的所述第一表面形成的所述第一绝缘层还具有第二过孔,所述第二过孔贯穿所述第一绝缘层,所述叉指换能器位于所述第二过孔内。The first insulating layer formed on the first surface of the substrate further has a second via hole, the second via hole penetrates the first insulating layer, and the interdigital transducer is located on the first insulating layer. Within the second via hole.
  16. 根据权利要求15所述的封装方法,其特征在于,所述封装方法还包括:The packaging method according to claim 15, wherein the packaging method further comprises:
    在所述第一绝缘层远离所述基体的一侧形成第二绝缘层;所述第二绝缘层具有第三过孔,所述第三过孔贯穿所述第二绝缘层,所述第三过孔与所述第一过孔连通;部分的所述金属连接柱设置于所述第三过孔内。A second insulating layer is formed on the side of the first insulating layer away from the base; the second insulating layer has a third via, the third via penetrates the second insulating layer, and the third The via hole is communicated with the first via hole; part of the metal connecting post is arranged in the third via hole.
  17. 根据权利要求16所述的封装方法,其特征在于,所述第二绝缘层、所述第一绝缘层和所述基体之间形成有保护腔,所述叉指换能器位于所述保护腔内。The packaging method of claim 16, wherein a protective cavity is formed between the second insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity. Inside.
  18. 根据权利要求16所述的封装方法,其特征在于,所述在所述第一绝缘层远离所述基体的一侧形成第二绝缘层,包括:The packaging method according to claim 16, wherein the forming a second insulating layer on a side of the first insulating layer away from the substrate comprises:
    在所述第一绝缘层远离所述基体的表面形成第二绝缘薄膜层,所述第二绝缘薄膜层采用层压工艺形成;Forming a second insulating film layer on the surface of the first insulating layer away from the substrate, and the second insulating film layer is formed by a lamination process;
    在所述第二绝缘薄膜层上形成所述第三过孔,以形成所述第二绝缘层。The third via hole is formed on the second insulating film layer to form the second insulating layer.
  19. 根据权利要求16所述的封装方法,其特征在于,所述封装方法还包括:The packaging method of claim 16, wherein the packaging method further comprises:
    在所述第二绝缘层远离所述基体的一侧形成第三绝缘层;所述第三绝缘层具有第四过孔,所述第四过孔贯穿所述第三绝缘层,所述第四过孔与所述第三过孔连通;部 分的所述金属连接柱设置于所述第四过孔内。A third insulating layer is formed on the side of the second insulating layer away from the base; the third insulating layer has a fourth via, the fourth via penetrates the third insulating layer, and the fourth The via hole is communicated with the third via hole; part of the metal connecting post is arranged in the fourth via hole.
  20. 根据权利要求19所述的封装方法,其特征在于,在所述第二绝缘层远离所述基体的一侧形成第三绝缘层,包括:18. The packaging method of claim 19, wherein forming a third insulating layer on a side of the second insulating layer away from the substrate comprises:
    在所述第二绝缘层远离所述基体的表面形成第三绝缘薄膜层,所述第三绝缘薄膜层采用层压工艺形成;Forming a third insulating film layer on the surface of the second insulating layer away from the substrate, and the third insulating film layer is formed by a lamination process;
    在所述第三绝缘薄膜层上形成所述第四过孔,以形成所述第三绝缘层。The fourth via hole is formed on the third insulating film layer to form the third insulating layer.
  21. 根据权利要求15所述的封装方法,其特征在于,所述在所述基体的所述第一表面形成第一绝缘层,包括:15. The packaging method of claim 15, wherein the forming a first insulating layer on the first surface of the substrate comprises:
    在所述基体的所述第一表面形成第一绝缘薄膜层;Forming a first insulating film layer on the first surface of the substrate;
    在所述第一绝缘薄膜层上形成所述第一过孔和所述第二过孔。The first via hole and the second via hole are formed on the first insulating film layer.
  22. 根据权利要求13-21任一项所述的封装方法,其特征在于,所述封装方法还包括:The packaging method according to any one of claims 13-21, wherein the packaging method further comprises:
    在所述金属连接柱的一端形成焊球;所述焊球相对于所述焊盘设置于所述金属连接柱的另一端,所述焊球与所述金属连接柱连接,用于传输所述基体的电信号。A solder ball is formed at one end of the metal connection column; the solder ball is disposed at the other end of the metal connection column relative to the pad, and the solder ball is connected to the metal connection column for transmitting the The electrical signal of the substrate.
  23. 根据权利要求13所述的封装方法,其特征在于,所述基体为芯片,所述基体上还设置有叉指换能器,所述叉指换能器设置于所述基体的所述第一表面;The packaging method of claim 13, wherein the substrate is a chip, an interdigital transducer is further provided on the substrate, and the interdigital transducer is provided on the first of the substrate. surface;
    在所述基体的所述第一表面形成第一绝缘层,包括:Forming a first insulating layer on the first surface of the base includes:
    在所述基体的所述第一表面形成第一绝缘薄膜层;在所述第一绝缘薄膜层上形成所述第一过孔和第二过孔,以形成第一绝缘层;所述第二过孔贯穿所述第一绝缘层,所述叉指换能器位于所述第二过孔内;A first insulating film layer is formed on the first surface of the substrate; the first via hole and the second via hole are formed on the first insulating film layer to form a first insulating layer; the second The via hole penetrates the first insulating layer, and the interdigital transducer is located in the second via hole;
    其中,在所述焊盘的表面形成所述金属连接柱之后,在所述基体的所述第一表面形成所述第一绝缘层;Wherein, after forming the metal connecting pillar on the surface of the pad, forming the first insulating layer on the first surface of the base body;
    所述封装方法还包括:The packaging method further includes:
    在所述第一绝缘层远离所述基体的表面形成第二绝缘薄膜层;在所述第二绝缘薄膜层上形成第三过孔,以形成第二绝缘层;Forming a second insulating film layer on the surface of the first insulating layer away from the substrate; forming a third via hole on the second insulating film layer to form a second insulating layer;
    所述第三过孔贯穿所述第二绝缘层,所述第三过孔与所述第一过孔连通;部分的所述金属连接柱设置于所述第三过孔内;所述第二绝缘层、所述第一绝缘层和所述基体之间形成有保护腔,所述叉指换能器位于所述保护腔内。The third via hole penetrates the second insulating layer, and the third via hole communicates with the first via hole; part of the metal connecting pillar is disposed in the third via hole; the second A protective cavity is formed between the insulating layer, the first insulating layer and the base, and the interdigital transducer is located in the protective cavity.
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CN111403353A (en) * 2020-02-25 2020-07-10 华为技术有限公司 Packaging structure, packaging method and electronic equipment

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