WO2021159342A1 - Detection substrate, fabrication method therefor and flat panel detector - Google Patents

Abstract

A detection substrate, a fabrication method therefor and a flat panel detector. The detection substrate comprises: a base substrate (101); a drive circuit (102) located above the base substrate (101); a photoelectric conversion device (103) located above the base substrate (101), a bottom electrode (1031) of the photoelectric conversion device (103) being electrically connected to the drive circuit (102); a bias line (104) located on the side of the photoelectric conversion device (103) away from the base substrate (101), the bias line (104) and the photoelectric conversion device (103) not overlapping each other in a direction perpendicular to the base substrate (101); and a transparent lap part (105) located on the side of the photoelectric conversion device (103) away from the base substrate (101), a top electrode (1032) of the photoelectric conversion device (103) being electrically connected to the bias line (104) by means of the transparent lap part (105).

Description

Detecting substrate, its manufacturing method and flat panel detector Technical field

The present disclosure relates to the field of photoelectric detection technology, and in particular to a detection substrate, a manufacturing method thereof, and a flat panel detector.

Background technique

X-ray inspection technology is widely used in industrial non-destructive inspection, container scanning, circuit board inspection, medical treatment, security, industry and other fields, and has broad application prospects. Traditional X-Ray imaging technology belongs to analog signal imaging, with low resolution and poor image quality. The X-ray digital imaging technology (Digital Radio Graphy, DR) that appeared in the late 1990s uses X-ray flat-panel detectors to directly convert X images into digital images, because the converted digital images are clear, high-resolution, and easy to save and Transmission has become a focus of current research. According to different structures, X-ray flat panel detectors are divided into direct conversion type (Direct DR) and indirect conversion type (Indirect DR). Among them, the indirect conversion type X-ray flat panel detector technology is relatively mature, the cost is relatively low, the detection quantum efficiency (Detective Quantum Efficiency, DQE) is high, and the reliability is good, and other advantages have been extensively developed and applied.

X-ray flat panel detectors mainly include Thin Film Transistor (TFT) and photoelectric conversion devices. Under X-ray irradiation, the scintillator layer or phosphor layer of the indirect conversion type X-ray flat panel detector converts X-ray photons into visible light, and then converts the visible light into electrical signals under the action of photoelectric conversion devices, and finally reads them through a transistor The electrical signal is output and the electrical signal is output to obtain a display image.

Summary of the invention

The embodiments of the present disclosure provide a detection substrate, which includes:

Base substrate

The driving circuit is located on the base substrate;

The photoelectric conversion device is located on the base substrate, and the bottom electrode of the photoelectric conversion device is electrically connected to the driving circuit;

The bias line is located on the side of the photoelectric conversion device away from the base substrate, and in a direction perpendicular to the base substrate, the bias line and the photoelectric conversion device do not overlap each other;

The transparent overlap portion is located on the side of the photoelectric conversion device away from the base substrate, and the top electrode of the photoelectric conversion device is electrically connected to the bias line through the transparent overlap portion.

Optionally, in the detection substrate provided by the embodiment of the present disclosure, each of the bias lines is electrically connected to the photoelectric conversion devices on both sides of the bias line through the same transparent lap portion.

Optionally, in the above-mentioned detection substrate provided by the embodiment of the present disclosure, the transparent lap portion is located on a side of the bias line away from the base substrate, and is in direct contact with the bias line.

Optionally, the detection substrate provided by the embodiment of the present disclosure further includes: an insulating layer located between the layer where the bias line is located and the layer where the photoelectric conversion device is located;

The transparent lap portion is electrically connected to the top electrode of the photoelectric conversion device through a via hole penetrating the insulating layer.

Optionally, in the aforementioned detection substrate provided by the embodiment of the present disclosure, the insulating layer includes: a buffer layer, a flattening layer, and a passivation layer that are sequentially located on a side of the layer where the photoelectric conversion device is located away from the base substrate.

Optionally, the detection substrate provided by the embodiment of the present disclosure further includes: a plurality of gate lines and data lines whose extension directions cross each other;

In the extending direction of the data line, there are two gate lines between adjacent photoelectric conversion devices.

Optionally, in the detection substrate provided by the embodiment of the present disclosure, the extension direction of the bias line is the same as the extension direction of the data line, and in the extension direction of the gate line, the data line is The bias lines are alternately arranged between the photoelectric conversion devices.

Optionally, in the above-mentioned detection substrate provided by the embodiment of the present disclosure, it further includes: a plurality of light-shielding parts provided in the same layer as the bias line;

Each of the light-shielding parts is arranged in a one-to-one correspondence with the transistors in each of the driving circuits, and the light-shielding parts cover the channel regions of the corresponding transistors.

Based on the same inventive concept, an embodiment of the present invention also provides a flat-panel detector, including the detection substrate described above.

Based on the same inventive concept, an embodiment of the present invention also provides a method for manufacturing a detection substrate, including:

Provide a base substrate;

Sequentially forming a driving circuit, a photoelectric conversion device, a bias line and a transparent lap on the base substrate;

Wherein, the bottom electrode of the photoelectric conversion device is electrically connected to the driving circuit;

In a direction perpendicular to the base substrate, the bias line and the photoelectric conversion device do not overlap each other, and are electrically connected to the top electrode of the photoelectric conversion device through a transparent overlap portion.

Optionally, in the foregoing manufacturing method provided by the embodiment of the present disclosure, after forming the photoelectric conversion device and before forming the bias line, the method further includes:

On the layer where each of the photoelectric conversion devices is located, a buffer layer, a flat layer with a hollow pattern, and a passivation layer are sequentially formed;

The passivation layer and the buffer layer in the hollow pattern area are etched to obtain an insulating layer having via holes and composed of the buffer layer, the flat layer and the passivation layer.

Description of the drawings

FIG. 1 is a schematic structural diagram of a detection substrate provided by an embodiment of the disclosure;

2 is a schematic diagram of the structure of a detection pixel unit on the detection substrate shown in FIG. 1;

Fig. 3 is a schematic cross-sectional structure view along line AB in Fig. 1;

4 is a schematic diagram of a first structure for detecting a binding area of a substrate provided by an embodiment of the disclosure;

5 is a schematic diagram of a second structure for detecting a binding area of a substrate provided by an embodiment of the present disclosure;

FIG. 6 is a flowchart of a manufacturing method of a detection substrate provided by an embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely in conjunction with the accompanying drawings of the embodiments of the present disclosure. The thickness and shape of each film layer in the drawings do not reflect the true ratio, and the purpose is only to illustrate the present disclosure schematically. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the protection scope of the present disclosure.

Unless otherwise defined, the technical terms or scientific terms used herein shall be the ordinary meanings understood by those with ordinary skills in the field to which this disclosure belongs. The "first", "second" and similar words used in the specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "include" and other similar words mean that the elements or items appearing before the word cover the elements or items listed after the word and their equivalents, but do not exclude other elements or items. "Inner", "Outer", "Up", "Down", etc. are only used to indicate the relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

In the related art, the source and drain metal layers contained in the transistors are provided with bias lines, and at the same time, an indium tin oxide layer provided on the entire surface and electrically connected to the top electrode of the photoelectric conversion device is provided above the photoelectric conversion device. The via hole from the metal layer to the indium tin oxide layer, and the bias line is electrically connected to the indium tin oxide layer, so as to load a bias voltage to the top electrode of the photoelectric conversion device. The via will cause a reduction in the area of the photoelectric conversion device, resulting in a reduction in the filling rate.

In view of the above-mentioned problems in the related art, embodiments of the present disclosure provide a detection substrate, a manufacturing method thereof, and a flat panel detector.

A detection substrate provided by an embodiment of the present disclosure, as shown in FIG. 1 to FIG. 3, includes:

Base substrate 101;

The driving circuit 102 is located on the base substrate 101;

The photoelectric conversion device 103 is located on the base substrate 101, and the bottom electrode 1031 of the photoelectric conversion device 103 is electrically connected to the driving circuit 102;

The bias line 104 is located on the side of the photoelectric conversion device 103 away from the base substrate 101, and in a direction perpendicular to the base substrate 101, the bias line 104 and the photoelectric conversion device 103 do not overlap each other;

The transparent overlap portion 105 is located on the side of the photoelectric conversion device 103 away from the base substrate 101. The top electrode 1031 of the photoelectric conversion device 103 is electrically connected to the bias line 104 through the transparent overlap portion 105.

In the above-mentioned detection substrate provided by the embodiment of the present disclosure, the bias line 104 and the photoelectric conversion device 103 do not overlap each other, and are electrically connected to the top electrode 1032 of the photoelectric conversion device 103 through the transparent lap 105, so that there is no need to provide a through source and drain. The via hole from the metal layer to the indium tin oxide layer will not affect the area of the bottom electrode 1031 of the photoelectric conversion device 103; at the same time, because the bias line 104 and the photoelectric conversion device 103 do not overlap each other, the bias line 104 will not block the photoelectric conversion device 103. Conversion device 103; In addition, although the transparent overlap portion 105 and the photoelectric conversion device 103 have an overlapping area, because the transparent overlap portion 105 is transparent, it will not lead to a reduction in the effective area of the photoelectric conversion device 103. Based on the above reasons, the pixel fill rate is improved. In addition, in the related art, a coupling capacitance is formed between the bias line provided in the source and drain metal layer and the bottom electrode 1031 of the photoelectric conversion device 103, which causes an increase in line noise and affects detection sensitivity and signal-to-noise ratio. In the present disclosure, the bias line 104 and the photoelectric conversion device 103 do not overlap each other, which avoids the formation of a coupling capacitance between the bias line 104 and the bottom electrode 1031 of the photoelectric conversion device 103, thereby improving detection sensitivity and signal-to-noise ratio. In addition, when the bias line 104 is made of metal, the resistivity of the metal is less than the resistivity of indium tin oxide, which solves the problem of relatively large resistive load caused by indium tin oxide on the entire surface in the related art, and ensures The bias voltage is consistent throughout the detection area.

Generally, the photoelectric conversion device 103 further includes a photoelectric conversion structure 1033 located between the bottom electrode 1031 and the top electrode 1032, and the photoelectric conversion structure 1033 may be a PN structure or a PIN structure. Specifically, the PIN structure includes an N-type doped N-type semiconductor layer, an undoped intrinsic semiconductor layer, and a P-type doped P-type semiconductor layer. The thickness of the intrinsic semiconductor layer may be greater than the thickness of the P-type semiconductor layer and the N-type semiconductor layer.

The photoelectric conversion structure 1033 converts optical signals into electrical signals. There is a facing area between the bottom electrode 1031 and the top electrode 1032 of the photoelectric conversion device 103, and a storage capacitor is formed between the two. The electrical signal converted by the photoelectric conversion structure 1033 is stored In the above storage capacitor. In addition, the orthographic projection of the top electrode 1032 on the base substrate 101 is within the orthographic projection of the photoelectric conversion structure 1033 on the base substrate 100, that is, the area of the top electrode 1032 is slightly smaller than the area of the photoelectric conversion structure 1033, as shown in FIG. 3 The distance between the edge of the top electrode 1032 and the edge of the photoelectric conversion structure 1033 is 1 μm to 3 μm, such as 1.0 μm, 1.5 μm, 1.8 μm, 2.0 μm, 2.5 μm, 3.0 μm, etc. Through the above arrangement, the leakage current caused by the damage to the sidewall of the photoelectric conversion structure 1033 during etching can be reduced. Specifically, the bottom electrode 1031 may be formed of molybdenum, aluminum, silver, copper, titanium, platinum, tungsten, tantalum, tantalum nitride, alloys and combinations thereof, or other suitable materials; and may be formed of indium tin oxide (ITO) or indium Zinc oxide (IZO) or other suitable materials are used to form the top electrode 1032 and the transparent overlapping portion 105 to improve light transmission efficiency.

Optionally, the base substrate 101 may be a flexible base substrate, such as polyvinyl ether phthalate, polyethylene naphthalate, polycarbonate, polyarylate, and polyetherimide. , Polyethersulfone, polyimide, etc., have excellent heat resistance and durability plastic substrates; it can also be a rigid substrate, such as a glass substrate, which is not limited here.

Optionally, in the aforementioned detection substrate provided by the embodiment of the present disclosure, each bias line 104 is electrically connected to the photoelectric conversion device 103 on both sides of the same transparent overlap portion 105, as shown in FIGS. 1 and 3. In other words, the bias line 104 is arranged at the gap between two adjacent columns of detection pixel units P, and the same transparent lap 105 can be used to electrically connect the top electrodes of the two photoelectric conversion devices 103 on both sides of the bias line 104 , As shown in Figure 1 and Figure 3. Of course, in specific implementation, the same transparent lap 105 can also be used to electrically connect the top electrodes of the two rows of photoelectric conversion devices 103 on both sides of a bias line 104; in this case, the related technology can still be improved to a certain extent. The resistance load caused by the placement of indium tin oxide on the entire surface is relatively large, but compared to the one shown in FIGS. 1 and 3, the same transparent lap 105 is used to electrically connect two photoelectric conversion devices 103 on both sides of a bias line 104 The technical solution of the top electrode has limited improvement effect.

Optionally, in the above-mentioned detection substrate provided by the embodiment of the present invention, as shown in FIG. 3, the transparent lap portion 105 is located on the side of the bias line 104 away from the base substrate 101, and is in direct contact and connection with the bias line 104 . In the related art, the top layer of the bonding area of the detection substrate has a transparent lead layer 105'. Optionally, the transparent lap 105 is located on the side of the bias line 104 away from the base substrate 101. The transparent lap portion 105 and the transparent lead layer 105' in the bonding area are manufactured by one patterning process, which saves the process flow.

Optionally, in the detection substrate provided by the embodiment of the present disclosure, as shown in FIG. 3, it may further include: an insulating layer 106 located between the layer where the bias line 104 is located and the layer where the photoelectric conversion device 103 is located;

The transparent overlap portion 105 is electrically connected to the top electrode of the photoelectric conversion device 103 through a via hole penetrating the insulating layer 106. As shown in FIG. Optionally, the insulating layer 106 includes: a buffer layer 1061, a planarization layer 1062, and a passivation layer 1063 that are sequentially located on the side of the layer where the photoelectric conversion device 103 is located away from the base substrate 101. The material of the buffer layer 1061 and the passivation layer 1063 can be one or any combination of silicon oxide, silicon nitride, and silicon oxynitride; the material of the flat layer 1062 can be polyacrylic resin, polyepoxy acrylic resin, photosensitive polyamide Organic insulating materials such as imine resin, polyester acrylate, urethane acrylate resin, and novolac epoxy acrylic resin are not limited here.

Optionally, the detection substrate provided by the embodiment of the present disclosure, as shown in FIG. 1 and FIG. 2, further includes: a plurality of gate lines 107 and data lines 108 whose extension directions cross each other;

In the extending direction of the data line 108, there are two gate lines 107 between adjacent photoelectric conversion devices 103;

The extension direction of the bias line 104 is the same as the extension direction of the data line 108. In the extension direction of the gate line 107, the data line 108 and the bias line 104 are alternately arranged between the photoelectric conversion devices 103.

By arranging the double-gate wiring method, two adjacent columns of detection pixel units P can share a data line 108 (as shown in FIG. 1), which saves the number of data lines 108, because the readout IC (ROIC, ROIC) ) The function of reading electrical signals is realized through the channels corresponding to the data line 108 one-to-one. Therefore, on the basis of halving the data line 108, the number of ROIC channels can also be reduced by half accordingly. Since the number of channels greatly affects the module cost of the detector backplane, the present disclosure adopts a double-gate wiring method, which effectively reduces the cost of the detector. Optionally, in the above-mentioned detection substrate provided by the embodiment of the present disclosure, as shown in FIG. 3, it further includes: a plurality of light shielding parts 109 provided in the same layer as the bias line 104;

Each light shielding portion 109 is arranged in a one-to-one correspondence with the transistors in each driving circuit 102, and the light shielding portion 109 covers the channel region of the corresponding transistor, which effectively avoids the influence of external light on the channel region and improves the signal-to-noise ratio.

Optionally, in the detection substrate provided by the embodiment of the present disclosure, the transistor may be an amorphous silicon thin film transistor, an oxide thin film transistor, an LTPS thin film transistor, or the like. When the transistor is an oxide thin film transistor, it may include an active layer formed of a metal oxide, such as indium gallium zinc oxide (IGZO), and the active layer includes a channel region and a source and drain contact region. Due to the excellent carrier mobility of the IGZO active layer, the reading rate of the detection data can be increased, and dynamic real-time detection can be realized.

In addition, as shown in FIGS. 1 and 2, in order to improve the mutual interference of signals on different signal lines, an isolation portion 110 is also provided at the crossing position of the gate line 107 and the bias line 104 or the data line 108. Optionally, in order to simplify the manufacturing process, the same film layer may be used to pattern the active layer and the isolation portion 110.

Generally, a transistor may also include a gate, a first electrode, and a second electrode. The transistor can be a bottom-gate structure (as shown in FIG. 3) or a top-gate structure. When the transistor has a top-gate structure, the gate can protect the active layer from hydrogen atoms (H Plasma) during the subsequent deposition of the photoelectric conversion structure 1063 to a certain extent. In addition, the gate, the first electrode and the second electrode can be made of molybdenum, aluminum, silver, copper, titanium, platinum, tungsten, tantalum, tantalum nitride, alloys and combinations thereof, or other suitable materials. In addition, the first electrode and the second electrode of the transistor are drain and source respectively, and their functions can be interchanged depending on the transistor type (P-type or N-type) and the input signal, and no specific distinction is made here.

In order to simplify the manufacturing process, save the manufacturing cost, and improve the production efficiency, the gate line 107 and the gate can be prepared simultaneously by one patterning process. Of course, two patterning processes can also be used to prepare the gate line 107 and the gate respectively, which is not limited here. It is also possible to simultaneously prepare the first electrode, the second electrode and the data line 108 using one patterning process. Of course, it is also possible to use two patterning processes to separately prepare the first electrode and the second electrode, and the data line 108, which is not limited here.

Optionally, as shown in FIG. 3, the above-mentioned detection substrate provided by the embodiment of the present disclosure further includes: a gate insulating layer 111, a first protective layer 112, a second protective layer 113, and a protective layer located above the second protective layer 113. Scintillator layer (not shown in the figure). Specifically, the gate insulating layer 111 is formed of a high dielectric constant material, a dielectric material, other suitable materials, or a combination thereof. The high dielectric constant material includes, for example, lead oxide, tantalum pentoxide, zirconium dioxide, aluminum oxide, other suitable materials, or combinations thereof; the dielectric material includes, for example, silicon nitride, silicon oxynitride, other suitable materials or Its combination. The first protective layer 112 and the second protective layer 113 are formed of silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a combination thereof.

The material of the scintillator layer is a material that can convert X-rays into visible light, such as: CsI: Tl, Gd ₂ O ₂ S: Tb, etc. Other possibilities include CsI: Na, CaWO ₄ , CdWO ₄ , NaI: Tl, BaFCl:Eu ²⁺ , BaSO ₄ :Eu ²⁺ , BaFBr:Eu ²⁺ , LaOBr:Tb ³⁺ , LaOBr:Tm ³⁺ , La2O2S:Tb ³⁺ , YTaO ₄ , YTaO ₄ :Nb, ZnS:Ag, ZnSiO ₄ : Mn ²⁺ , LiI: Eu ²⁺ , CeF ₃ and so on. The wavelength peak of visible light converted by incident X-rays on the scintillation crystal contained in the scintillator layer is between 530 nm and 580 nm, and the spectral range can reach 350 nm to 700 nm. The light has a very short delay effect, and can be attenuated to less than 1% of the X-ray brightness within 1 ms after the X-ray disappears.

In addition, when the active layer of the transistor is indium gallium zinc oxide, the hydrogen atoms in the process of subsequent deposition to form the photoelectric conversion structure 1063 diffuse to the channel region, resulting in poor stability of the transistor, which in turn affects flat panel detection Performance. Optionally, it can be arranged that the orthographic projection of the bottom electrode 1031 on the base substrate 101 and the orthographic projection of the active layer of the transistor on the base substrate 101 at least partially overlap, so as to block hydrogen during the subsequent fabrication of the photoelectric conversion structure 105. The element diffuses into the channel region. Further, a third protective layer made of resin material (not shown in the figure) can be provided between the first protective layer 112 and the layer where the bottom electrode 1031 is located, so as to effectively block external moisture and subsequent photoelectricity through the third protective layer. The hydrogen element in the process of the conversion structure 1063 diffuses into the channel region, which improves the stability of the transistor.

Optionally, in the above-mentioned detection substrate provided by the embodiment of the present disclosure, as shown in FIG. 4 and FIG. 5, it further includes: a transparent lead layer 105' located in the bonding area;

The gate line 107 extends to the bonding area, and the gate line 107 has a first lead wire corresponding to the electrical connection in the layer where the bottom electrode 1031 is located above the bonding area, the layer where the bias line 104 is located, and the transparent lead layer 105', such as Shown in Figure 4. The first lead-out line is configured to provide an electrical signal to the gate line 107 electrically connected to the gate line 107 through a gate drive chip (Gate IC). The data line 108 extends to the bonding area, and the data line 108 has a corresponding second lead wire in the layer where the bottom electrode 1031 above the bonding area is located, the layer where the bias line 104 is located, and the transparent lead layer 105', such as Shown in Figure 5. The second lead wire is configured to provide an electrical signal to the data line 108 electrically connected to it through the ROIC channel. In specific implementation, the above-mentioned conductive layers are electrically connected through via holes.

For the detection substrate provided by the embodiment of the present disclosure, the embodiment of the present disclosure provides a manufacturing method, as shown in FIG. 6, including the following steps:

S601. Provide a base substrate;

S602, sequentially forming a driving circuit, a photoelectric conversion device, a bias line and a transparent lap on the base substrate;

The bottom electrode of the photoelectric conversion device is electrically connected to the driving circuit;

In the direction perpendicular to the base substrate, the bias line and the photoelectric conversion device do not overlap each other, and are electrically connected to the top electrode of the photoelectric conversion device through the transparent overlap portion.

Optionally, in the above-mentioned manufacturing method provided by the embodiment of the present disclosure, after the step is performed to form the photoelectric conversion device, and before the step is performed to form the bias line, the following steps may also be performed:

On the layer where each photoelectric conversion device is located, a buffer layer, a flat layer with a hollow pattern, and a passivation layer are sequentially formed;

The passivation layer and the buffer layer in the hollow pattern area are etched to obtain an insulating layer with via holes and composed of a buffer layer, a flat layer and a passivation layer.

It should be noted that in the above-mentioned manufacturing method provided by the embodiments of the present disclosure, the patterning process involved in forming each layer structure may not only include deposition, photoresist coating, mask masking, exposure, development, etching, Part or all of the process, such as photoresist stripping, may also include other processes, and the details are subject to the pattern formed in the actual manufacturing process, which is not limited here. For example, a post-baking process may also be included after development and before etching.

Wherein, the deposition process may be a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method or a physical vapor deposition method, which is not limited here; the mask used in the mask process may be a half-tone mask (Half Tone Mask). ), Modifide Single Mask, Single Slit Mask or Gray Tone Mask, which are not limited here; the etching can be dry etching or wet The method of etching is not limited here.

In order to better understand the technical solution of the present disclosure, the manufacturing process of the detection substrate shown in FIGS. 1 to 3 will be described in detail below.

Provide a base substrate 101;

A driving circuit 102 including transistors is formed on the base substrate 101; wherein the transistors have a bottom gate structure, and specifically, amorphous silicon thin film transistors, oxide thin film transistors, LTPS thin film transistors, etc. can be used. When the transistor is an oxide thin film transistor, it may include an active layer formed of a metal oxide, such as indium gallium zinc oxide (IGZO), and the active layer includes a channel region and a source and drain contact region;

Plasma-enhanced chemical vapor deposition (PECVD) is used to deposit the first protective layer 112 made of silicon nitride, and through an etching process, a via is formed on the first protective layer 112;

A magnetron sputtering coating process is used to form a metal layer where a large-area bottom electrode 1031 is located, and the bottom electrode 1031 is connected to the source and drain of the transistor through the via hole on the first protective layer 112;

A PECVD process is used to deposit a photoelectric conversion structure 1033 on the bottom electrode 1031. The photoelectric conversion structure 1033 is composed of an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer located above the bottom electrode 1031;

Using a magnetron sputtering coating process, a top electrode 1032 made of indium tin oxide is formed on the photoelectric conversion structure 1033, so that the photoelectric conversion device 103 is formed;

A buffer layer 1061 made of silicon nitride is deposited on the layer where the top electrode 1032 is located, a flat layer 1062 is formed by a coating process, the flat layer 1062 is exposed and developed to form a hollow pattern, and a passivation layer 1063 made of silicon nitride is deposited. And etch the buffer layer 1061 and passivation layer 1063 in the hollow pattern area to form a sleeve hole penetrating the buffer layer 1061, flat layer 1062 and passivation layer 1063. So far, the buffer layer 1061, flat layer 1062 and passivation layer 1061 are formed. Insulating layer 106 composed of layer 1063;

The metal layer is formed by a magnetron sputtering coating process, and the metal layer is patterned to form the pattern of the bias line 104 and the light shielding part 109; wherein, the bias line 104 is located in the gap between adjacent photoelectric conversion devices 103, and the light shielding part 109 covers The channel region of the transistor;

The indium tin oxide layer is formed by magnetron sputtering coating process, and the indium tin oxide layer is patterned to form the pattern of the transparent lap 105 and the transparent lead layer 105'. At this time, the top electrodes of two adjacent photoelectric conversion devices 103 1032 is electrically connected to the same bias line 104 through the same transparent lap 105;

A second protective layer 113 made of silicon nitride is deposited.

So far, the production of the detection substrate shown in Figs. 1 to 3 has been completed.

Based on the same inventive concept, embodiments of the present disclosure also provide a flat panel detector, including the detection substrate provided by the embodiments of the present disclosure. Since the principle of solving the problem of the flat-panel detector is similar to the principle of solving the problem of the detection substrate described above, the implementation of the flat-panel detector provided in the embodiments of the present disclosure may refer to the implementation of the detection substrate provided in the embodiments of the present disclosure. No longer.

In the above-mentioned detection substrate, its manufacturing method and flat panel detector provided by the embodiments of the present disclosure, the bias line and the photoelectric conversion device do not overlap each other, and are electrically connected to the top electrode of the photoelectric conversion device through a transparent lap portion, so that there is no need to install The via hole penetrating the source and drain metal layer to the indium tin oxide layer does not affect the area of the bottom electrode of the photoelectric conversion device; at the same time, the bias line does not block the photoelectric conversion device, and the transparent overlap portion does not affect the effective area of the photoelectric conversion device. Based on this, the pixel fill rate is improved. In addition, in the related art, a coupling capacitor will be formed between the bias line of the source and drain metal layer and the bottom electrode of the photoelectric conversion device, which will increase the line noise and affect the detection sensitivity and signal-to-noise ratio. In the present disclosure, the bias line and the photoelectric conversion device do not overlap each other, which avoids the formation of a coupling capacitance between the bias line and the bottom electrode of the photoelectric conversion device, thereby improving detection sensitivity and signal-to-noise ratio. In addition, when the bias line is made of metal, the resistivity of the metal is smaller than that of indium tin oxide, which solves the problem of large resistance load caused by indium tin oxide on the entire surface in the related art, and ensures that the entire Consistency of the bias voltage in the detection area.

Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. In this way, if these modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and equivalent technologies, the present invention is also intended to include these modifications and variations.

Claims (11)

1. A detection substrate, which includes:

   Base substrate

   The driving circuit is located on the base substrate;

   The photoelectric conversion device is located on the base substrate, and the bottom electrode of the photoelectric conversion device is electrically connected to the driving circuit;

   The bias line is located on the side of the photoelectric conversion device away from the base substrate, and in a direction perpendicular to the base substrate, the bias line and the photoelectric conversion device do not overlap each other;

   The transparent overlap portion is located on the side of the photoelectric conversion device away from the base substrate, and the top electrode of the photoelectric conversion device is electrically connected to the bias line through the transparent overlap portion.
2. 8. The detection substrate according to claim 1, wherein each of the bias lines is electrically connected to the photoelectric conversion devices on both sides of the bias line through the same transparent overlapping portion.
3. 8. The detection substrate of claim 1, wherein the transparent lap portion is located on a side of the bias line away from the base substrate, and is in direct contact with the bias line.
4. 8. The detection substrate of claim 1, further comprising: an insulating layer located between the layer where the bias line is located and the layer where the photoelectric conversion device is located;

   The transparent lap portion is electrically connected to the top electrode of the photoelectric conversion device through a via hole penetrating the insulating layer.
5. 5. The detection substrate according to claim 4, wherein the insulating layer comprises: a buffer layer, a flat layer and a passivation layer which are located on the side of the layer where the photoelectric conversion device is located away from the base substrate in sequence.
6. 5. The detection substrate according to any one of claims 1 to 5, further comprising: a plurality of gate lines and data lines whose extension directions cross each other;

   In the extending direction of the data line, there are two gate lines between adjacent photoelectric conversion devices.
7. The detection substrate according to claim 6, wherein the extension direction of the bias line is the same as the extension direction of the data line, and in the extension direction of the gate line, the data line and the bias line It is alternately arranged between the photoelectric conversion devices.
8. 5. The detection substrate according to any one of claims 1 to 5, further comprising: a plurality of light shielding parts arranged in the same layer as the bias line;

   Each of the light-shielding parts is arranged in a one-to-one correspondence with the transistors in each of the driving circuits, and the light-shielding parts cover the channel regions of the corresponding transistors.
9. A flat panel detector, comprising: the detection substrate according to any one of claims 1-8.
10. A method for manufacturing a detection substrate, which includes:

    Provide a base substrate;

    Sequentially forming a driving circuit, a photoelectric conversion device, a bias line and a transparent lap on the base substrate;

    Wherein, the bottom electrode of the photoelectric conversion device is electrically connected to the driving circuit;

    In a direction perpendicular to the base substrate, the bias line and the photoelectric conversion device do not overlap each other, and are electrically connected to the top electrode of the photoelectric conversion device through a transparent overlap portion.
11. 10. The manufacturing method of claim 10, wherein after forming the photoelectric conversion device and before forming the bias line, the method further comprises:

    On the layer where each of the photoelectric conversion devices is located, a buffer layer, a flat layer with a hollow pattern, and a passivation layer are sequentially formed;

    The passivation layer and the buffer layer in the hollow pattern area are etched to obtain an insulating layer having via holes and composed of the buffer layer, the flat layer and the passivation layer.

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