WO2021149106A1 - 秘密計算装置、秘密計算方法、およびプログラム - Google Patents

秘密計算装置、秘密計算方法、およびプログラム Download PDF

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Publication number
WO2021149106A1
WO2021149106A1 PCT/JP2020/001683 JP2020001683W WO2021149106A1 WO 2021149106 A1 WO2021149106 A1 WO 2021149106A1 JP 2020001683 W JP2020001683 W JP 2020001683W WO 2021149106 A1 WO2021149106 A1 WO 2021149106A1
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Prior art keywords
secret
value
calculation
public
program
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Ceased
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PCT/JP2020/001683
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English (en)
French (fr)
Japanese (ja)
Inventor
大 五十嵐
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NTT Inc
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Nippon Telegraph and Telephone Corp
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Priority to CN202080093276.2A priority Critical patent/CN114981860B/zh
Priority to AU2020423806A priority patent/AU2020423806B2/en
Priority to EP20915629.8A priority patent/EP4095830B1/en
Priority to JP2021572128A priority patent/JP7290178B2/ja
Priority to PCT/JP2020/001683 priority patent/WO2021149106A1/ja
Priority to US17/792,148 priority patent/US12166864B2/en
Publication of WO2021149106A1 publication Critical patent/WO2021149106A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
    • H04L9/085—Secret sharing or secret splitting, e.g. threshold schemes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/46—Secure multiparty computation, e.g. millionaire problem

Definitions

  • the present invention relates to a technique for multiplying real values in secret calculation.
  • Non-Patent Document 1 discloses a secret calculation method for multiplying a published real value by a secret sharing value.
  • Non-Patent Document 1 has a problem that the calculation cost is high because the right shift is performed by the secret calculation in addition to the multiplication every time the multiplication is performed so as not to overflow.
  • the present invention has been made in view of such a point, and an object of the present invention is to reduce the calculation cost of a secret calculation for multiplying a published real value by a secret sharing value.
  • x is a real number
  • [ ⁇ ] is the secret sharing value of ⁇
  • ⁇ is a positive integer that is the number of bits representing the right shift amount
  • m is a real number
  • a public value of 2 ⁇ / m is obtained and secret.
  • a secret calculation [x] / (2 ⁇ / m) of the public value division using the distributed value [x] and the obtained public value 2 ⁇ / m is performed, and mx is shifted to the right by ⁇ bits.
  • the multiplication of the real number m and the right shift of the ⁇ bit are executed at the same time, so that the calculation cost can be reduced.
  • FIG. 1A is a block diagram illustrating the secret calculation device of the embodiment.
  • FIG. 1B is a flow chart for exemplifying the secret calculation method of the embodiment.
  • FIG. 2 is a table illustrating the calculated parameters for each elementary function.
  • FIG. 3 is a block diagram for explaining a hardware configuration.
  • the secret computing device inputs the secret sharing value [x] of the real number x, the real number m which is a multiplier, and the positive integer ⁇ which is the number of bits representing the right shift amount, and shifts mx to the right by ⁇ bits.
  • the secret sharing value [mx] r of the value is obtained and output.
  • the secret sharing method of the secret sharing value is not limited, and examples thereof include an additive secret sharing method and a Shamir secret sharing method.
  • An example of [ ⁇ ] is a secret sharing value (share) in which elements on the quotient ring are linearly secret-shared.
  • the public decimal point position for an integer on the ring it can be regarded as a fixed-point real number. In the embodiment, the fixed-point real number represented on the ring in this way is simply expressed as a real number.
  • the secret calculation device 1 of the embodiment has a public value calculation unit 11, a secret calculation unit 12, and a control unit 19.
  • the secret calculation device 1 executes each process under the control of the control unit 19.
  • the secret sharing value [x], the real number m, and the positive integer ⁇ are input to the secret calculation device 1 (step S10).
  • the secret sharing value [x] is sent to the secret calculation unit 12, and the real number m and the positive integer ⁇ are sent to the public value calculation unit 11.
  • the real number m and the positive integer ⁇ are input to the public value calculation unit 11.
  • the public value calculation unit 11 calculates and outputs a public value of 2 ⁇ / m (step S11).
  • the secret sharing value [x] and the public value 2 ⁇ / m output from the public value calculation unit 11 are input to the secret calculation unit 12.
  • the secret calculation unit 12 performs a secret calculation [x] / (2 ⁇ / m) of the public value division using the secret distribution value [x] and the public value 2 ⁇ / m obtained by the public value calculation unit 11. Then, the secret sharing value [mx] r of the value obtained by right-shifting mx by ⁇ bits is obtained and output (step S12).
  • the secret calculation device 1 outputs the secret distribution value [mx] r (step S13).
  • the value obtained by this secret calculation is equivalent to the secret sharing value [mx] r of the value obtained by right-shifting the multiplication result mx by ⁇ bits.
  • multiplication and right shift are realized at the same time by the secret calculation of public value division with low calculation cost.
  • the calculation cost can be significantly reduced.
  • division is recognized as a process in which the calculation cost is higher than that of multiplication, and it does not lead to the idea of using division for the process of multiplication.
  • the public value 2 ⁇ / m is calculated by paying attention to the fact that the right shift is equivalent to the division, and the secret calculation [x] / (2 ⁇ / m) of the public value division is performed.
  • Examplementation example An algorithm that can implement the above method is illustrated below.
  • one of the two public values m 0 and m 1 is multiplied by the secret sharing value [x] of the real number x according to the condition c ⁇ ⁇ 0, 1 ⁇ . If the size of the published values m 0 and m 1 is large, the effective number of bits of the multiplied value (the number of bits required to express that number in binary) increases, and the number cannot be multiplied any more. Therefore, it may be necessary to shift to the right. In the first embodiment, such processing is made more efficient.
  • the secret computing device obtains and outputs secret sharing values [m 0 x] and [m 1 x] by secret calculation using the secret sharing value [x] and the multipliers m 0 , m 1 , and the method p (step S21). ). A specific example of the process in step S21 will be described later.
  • step S21 A specific example of processing in step S21 will be described.
  • p is the method of positive integers
  • q is the quotient of positive integers.
  • the secret calculation device obtains and outputs the secret sharing value [q] of the quotient q of x / p by the secret calculation using the secret sharing value [x] and the method p (step S211).
  • the public value calculating unit 212a is a multiplier m 0, m 1 and a positive integer .sigma.0, to obtain a public value 2 ⁇ 0 / m 0, 2 ⁇ 1 / m 1 outputs using .sigma.1.
  • ⁇ 0 and ⁇ 1 are positive integers which are the number of bits representing the right shift amount required when the multipliers m 0 and m 1 are large (step S212a).
  • the secret calculator is a secret of the public value division using the secret sharing values [x], [q] and the method p and the public values 2 ⁇ 0 / m 0 and 2 ⁇ 1 / m 1 obtained by the public value calculation unit 212a.
  • Calculation [x + qp] / (2 ⁇ 0 / m 0 ), [x + qp] / (2 ⁇ 1 / m 1 ) is performed, and (x + qp) m 0 is right-shifted by ⁇ 0 bits. 0 ] and (x + qp) m 1 are right-shifted by ⁇ 1 bit to obtain a secret sharing value [(x + qp) m 1 ] and output (step S212b).
  • Example 2 any function (e.g., elementary function) is approximated to a polynomial function f t (x), further right shift before the function f t (x) and the approximation function f of the function f t (x) ' calculate the u 'secret dispersion value of t (x) [f t ( x) -f' difference f t (x) -f of the (x) t (x)] , f t (x) -f 't (x) was right shift (f t (x) -f ' t (x)) secret sharing values of r [f t (x) -f ' to obtain a t (x)] r, secret dispersion value [f t the sum of t (x) 'f to t (x)' f t ( x) -f by secure computing of (x) -f 't (x )] r and secret variance
  • x is a real number
  • [ ⁇ ] is a secret distribution value of ⁇
  • n is an integer of 1 or more (for example, n is an integer of 2 or more)
  • t 0, ..., N-1.
  • f 't (x) is an approximation of the function f t (x)
  • ct, 0 are public values, and ct, 1 , ..., Ct, n + 1 are coefficients.
  • ct, 1 , ..., ct, n + 1 are values with a small effective number of bits, and even if ct, 1 , ..., ct, n + 1 are multiplied, a shift is required due to overflow. Is a value that does not have.
  • f t (x) -f 't (x) is a positive.
  • the secret sharing method is not limited, and examples thereof include an additive secret sharing method and a Shamir secret sharing method.
  • the size of t (x) is smaller than the size of the f t (x), a secret sharing value [f t (x) -f' where f t (x) -f overflow of t (x)] It can be suppressed.
  • the secret sharing value of the approximation of the right shift before the function f t (x) and the function f t (x) function f 'u (x) and the difference f t (x) -f' t (x) [f t (x) for computing -f 't (x)] it is possible to maintain high accuracy.
  • Overflow is a problem based on the performance of the processor that implements the secret calculation, and this method provides a method for solving the problem based on this hardware constraint.
  • this method does not solve a pure mathematics problem, but solves a hardware implementation problem and has technical features. For example, notably the technical features in the processor but overflows Calculating the secret variance [f t (x)] that does not overflow in the calculation of the secret sharing value [f t (x) -f ' t (x)] Is.
  • the secret computing device takes the secret sharing value [x] ⁇ [L, R) of the real number x as an input, performs the following secret calculation, and performs the following secret calculation to perform the secret sharing value [f n-1] of the target function f n-1 (x). (X)] is output.
  • L and R are real numbers satisfying L ⁇ R, and [L, R) represents a left-closed right-open interval of L or more and less than R.
  • n 3 and a, b, c, d, f, g, h, i, j, k, s, m, n, o, p, q, ⁇ , ⁇ , ⁇ , ⁇ , ⁇ .
  • exp ⁇ is the published value, exp 2 -t x 0 , ..., exp 2 u-t-1 x u-1 is the place calculated by the table.
  • Exp x ⁇ is the part calculated by approximation and is normalized to [0,2-t].
  • Input: [x] Output: [exp (x)]
  • secure computing apparatus the secure computing, for each 0 ⁇ i ⁇ u, mantissa f i, epsilon i respectively exp (2 i-t), and exponent.
  • the secret calculation device obtains [w] [f'] [ ⁇ '] exp ( ⁇ ) by secret calculation and outputs it.
  • exp ( ⁇ ) and the decimal point are performed.
  • the position is lowered at the same time to obtain [w] [f'] [ ⁇ '] exp ( ⁇ ).
  • FIG. 2 illustrates the calculated parameters when the elementary function is an inverse function, a square root function, a square root inverse function, an exponential function, or a logarithmic function.
  • ey, and ez indicate the decimal point positions of x, y, and z, respectively.
  • e'x, e'y, and e'z indicate the decimal point positions of x', y', and z'before the right shift, respectively.
  • These decimal point positions represent the bit positions of the decimal point positions counted from the lower bits. The value representing this bit position starts from 0, and when the e1st bit represents 1 counting from the lower bits, it is described that the decimal point position is e1.
  • the secret computing device 1 in the embodiment is, for example, a general-purpose or general-purpose computer including a processor (hardware processor) such as a CPU (central processing unit) and a memory such as a RAM (random-access memory) and a ROM (read-only memory). It is a device configured by a dedicated computer executing a predetermined program.
  • This computer may have one processor and memory, or may have a plurality of processors and memory.
  • This program may be installed in a computer or may be recorded in a ROM or the like in advance.
  • a part or all of the processing units may be configured by using an electronic circuit that realizes a processing function independently, instead of an electronic circuit (circuitry) that realizes a function configuration by reading a program like a CPU. ..
  • the electronic circuit constituting one device may include a plurality of CPUs.
  • FIG. 3 is a block diagram illustrating the hardware configuration of the secret calculation device 1 in the embodiment.
  • the secret computing device 1 of this example includes a CPU (Central Processing Unit) 10a, an output unit 10b, an output unit 10c, a RAM (RandomAccessMemory) 10d, a ROM (ReadOnlyMemory) 10e, and an auxiliary. It has a storage device 10f and a bus 10g.
  • the CPU 10a of this example has a control unit 10aa, a calculation unit 10ab, and a register 10ac, and executes various arithmetic processes according to various programs read into the register 10ac.
  • the output unit 10b is an output terminal, a display, or the like on which data is output.
  • the output unit 10c is a LAN card or the like controlled by the CPU 10a that has read a predetermined program.
  • the RAM 10d is a SRAM (Static Random Access Memory), a DRAM (Dynamic Random Access Memory), or the like, and has a program area 10da in which a predetermined program is stored and a data area 10db in which various data are stored.
  • the auxiliary storage device 10f is, for example, a hard disk, MO (Magneto-Optical disc), a semiconductor memory, or the like, and has a program area 10fa for storing a predetermined program and a data area 10fb for storing various data. There is.
  • the bus 10g connects the CPU 10a, the output unit 10b, the output unit 10c, the RAM 10d, the ROM 10e, and the auxiliary storage device 10f so that information can be exchanged.
  • the CPU 10a writes the program stored in the program area 10fa of the auxiliary storage device 10f to the program area 10da of the RAM 10d according to the read OS (Operating System) program.
  • the CPU 10a writes various data stored in the data area 10fb of the auxiliary storage device 10f to the data area 10db of the RAM 10d.
  • the address on the RAM 10d in which this program or data is written is stored in the register 10ac of the CPU 10a.
  • the control unit 10ab of the CPU 10a sequentially reads out these addresses stored in the register 10ac, reads a program or data from the area on the RAM 10d indicated by the read address, and causes the arithmetic unit 10ab to sequentially execute the operations indicated by the program.
  • the calculation result is stored in the register 10ac.
  • the above program can be recorded on a computer-readable recording medium.
  • a computer-readable recording medium is a non-transitory recording medium. Examples of such a recording medium are a magnetic recording device, an optical disk, a photomagnetic recording medium, a semiconductor memory, and the like.
  • the distribution of this program is carried out, for example, by selling, transferring, renting, etc., a portable recording medium such as a DVD or CD-ROM on which the program is recorded.
  • the program may be stored in the storage device of the server computer, and the program may be distributed by transferring the program from the server computer to another computer via a network.
  • the computer that executes such a program first temporarily stores, for example, the program recorded on the portable recording medium or the program transferred from the server computer in its own storage device. Then, when the process is executed, the computer reads the program stored in its own storage device and executes the process according to the read program.
  • a computer may read the program directly from a portable recording medium and execute processing according to the program, and further, the program is transferred from the server computer to this computer. Each time, the processing according to the received program may be executed sequentially.
  • the above processing is executed by a so-called ASP (Application Service Provider) type service that realizes the processing function only by the execution instruction and result acquisition without transferring the program from the server computer to this computer. May be.
  • the program in this embodiment includes information to be used for processing by a computer and equivalent to the program (data that is not a direct command to the computer but has a property of defining the processing of the computer, etc.).
  • the present device is configured by executing a predetermined program on a computer, but at least a part of these processing contents may be realized by hardware.
  • the present invention can be used, for example, for machine learning performed by secret calculation while concealing data and multiplication of real values in data mining.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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PCT/JP2020/001683 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム Ceased WO2021149106A1 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CN202080093276.2A CN114981860B (zh) 2020-01-20 2020-01-20 秘密计算装置、秘密计算方法、以及程序
AU2020423806A AU2020423806B2 (en) 2020-01-20 2020-01-20 Secure computation apparatus, secure computation method, and program
EP20915629.8A EP4095830B1 (en) 2020-01-20 2020-01-20 Secure computation device, secure computation method, and program
JP2021572128A JP7290178B2 (ja) 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム
PCT/JP2020/001683 WO2021149106A1 (ja) 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム
US17/792,148 US12166864B2 (en) 2020-01-20 2020-01-20 Secure computation apparatus, secure computation method, and program

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AU2020423806B2 (en) 2023-06-08
EP4095830B1 (en) 2024-10-30
EP4095830A4 (en) 2023-10-18
JPWO2021149106A1 (https=) 2021-07-29
JP7290178B2 (ja) 2023-06-13
CN114981860A (zh) 2022-08-30
CN114981860B (zh) 2025-06-27
EP4095830A1 (en) 2022-11-30
US12166864B2 (en) 2024-12-10
US20230102267A1 (en) 2023-03-30

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