WO2021149105A1 - 秘密計算装置、秘密計算方法、およびプログラム - Google Patents

秘密計算装置、秘密計算方法、およびプログラム Download PDF

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Publication number
WO2021149105A1
WO2021149105A1 PCT/JP2020/001682 JP2020001682W WO2021149105A1 WO 2021149105 A1 WO2021149105 A1 WO 2021149105A1 JP 2020001682 W JP2020001682 W JP 2020001682W WO 2021149105 A1 WO2021149105 A1 WO 2021149105A1
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Prior art keywords
secret
value
calculation
secret calculation
calculation unit
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Ceased
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PCT/JP2020/001682
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English (en)
French (fr)
Japanese (ja)
Inventor
大 五十嵐
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NTT Inc
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Nippon Telegraph and Telephone Corp
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Priority to CN202080093270.5A priority Critical patent/CN114981859B/zh
Priority to EP20915434.3A priority patent/EP4095829A4/en
Priority to AU2020424993A priority patent/AU2020424993B2/en
Priority to JP2021572127A priority patent/JP7318743B2/ja
Priority to US17/790,769 priority patent/US11934564B2/en
Priority to PCT/JP2020/001682 priority patent/WO2021149105A1/ja
Publication of WO2021149105A1 publication Critical patent/WO2021149105A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
    • H04L9/085—Secret sharing or secret splitting, e.g. threshold schemes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/46—Secure multiparty computation, e.g. millionaire problem

Definitions

  • the present invention relates to a secret calculation technique.
  • Non-Patent Document 1 describes a method of performing such a calculation by secret calculation.
  • Non-Patent Document 1 has a problem that the calculation cost is large.
  • the present invention has been made in view of these points, and reduces the calculation cost when one secret sharing value is divided by a plurality of divisors or right-shifted by a plurality of shift amounts in a secret calculation.
  • the purpose is to do.
  • the secret sharing value [q] of the quotient q of a / p is obtained by the secret sharing value [a] and the secret calculation using the method p, and the secret sharing value [a], [q], the divisor d 0 , ..., D.
  • [ ⁇ ] is the secret dispersion value of ⁇
  • a is a real number
  • n is an integer of 2 or more
  • d 0 is a real number
  • d n-1 is a divisor of a real number
  • p is a positive integer. It is a law
  • q is the quotient of a positive integer.
  • the secret sharing value [q] is diverted to the calculation of a plurality of [a / d 0 ], ..., [A / d n-1 ], one secret sharing value is used in a plurality of secret calculations. It is possible to reduce the calculation cost when dividing by a divisor or shifting to the right by multiple shift amounts.
  • FIG. 1 is a block illustrating the functional configuration of the secret calculation device of the first embodiment.
  • FIG. 2 is a flow chart for explaining the processing of the first embodiment.
  • FIG. 3 is a block illustrating the functional configuration of the secret calculation device of the second embodiment.
  • FIG. 4A is a block diagram illustrating the details of the secret calculation unit 21 of FIG.
  • FIG. 4B is a block diagram illustrating the details of the secret calculation unit 212 of FIG. 4A.
  • FIG. 5A is a flow chart for explaining the processing of the second embodiment.
  • FIG. 5B is a flow chart for exemplifying the details of step S21 of FIG. 5A.
  • FIG. 5C is a flow chart for exemplifying the details of step S212 of FIG. 5B.
  • FIG. 6 is a block diagram for explaining a hardware configuration.
  • one secret sharing value (share) may be divided by a plurality of divisors or may be shifted to the right by a plurality of shift amounts.
  • such processing is streamlined.
  • the real number a to be calculated is generally expressed as in the equation (1), and the additive secret-shared value ai is used as the secret-sharing value [a].
  • i 0, ..., M-1
  • m is an integer of 1 or more (for example, m is an integer of 2 or more)
  • p is a positive integer method.
  • the public decimal point position for an integer on the ring it can be regarded as a fixed-point real number.
  • the fixed-point real number represented on the ring in this way is simply expressed as a real number.
  • the secret sharing value [q] is obtained once, the value obtained by dividing the real number a by a plurality of divisors or right-shifting by a plurality of shift amounts is calculated by secret calculation.
  • the calculation of quotient in secret calculation requires a large amount of communication, and if the number of calculations can be reduced, the processing efficiency can be greatly improved.
  • the communication volume is reduced by 30% as compared with the case where the public value division is performed independently by the secret calculation.
  • the amount of communication is reduced by 60% compared to the case where the public value division is performed independently by secret calculation. Since the right shift is equivalent to the division by a power of 2, the same applies to the process of obtaining the value of the real number a right-shifted by a plurality of shift amounts by secret calculation.
  • the secret calculation device 1 of the first embodiment has secret calculation units 11 and 12 and a control unit 19.
  • the secret calculation device 1 executes each process under the control of the control unit 19.
  • [ ⁇ ] is the secret dispersion value of ⁇
  • a is a real number
  • n is an integer of 2 or more
  • d 0 is a real number
  • d n-1 is a divisor of a real number
  • p is a positive integer.
  • q is the quotient of a positive integer.
  • the secret-sharing value [ ⁇ ] is an additive secret-sharing value ⁇ i by expressing the real number ⁇ as in Eq. (3). That is, [ ⁇ ] is a secret sharing value (share) in which the element ⁇ on the quotient ring modulo p is linearly secret-shared.
  • the secret sharing value [a] of the real number a, the method p of the positive integer, the divisors d 0 , ..., D n-1 are input to the secret computing device 1 (step S10).
  • the secret sharing value [a] and the method p are input to the secret calculation unit 11.
  • the secret calculation unit 11 obtains and outputs the secret sharing value [q] of the quotient q of a / p by the secret calculation using the secret sharing value [a] and the method p (step S11).
  • the secret sharing values [a], [q], divisors d 0 , ..., d n-1 and method p are input to the secret calculation unit 12.
  • step S11 since one secret sharing value [q] obtained in step S11 is shared for the secret calculation of a plurality of [a / d 0 ], ..., [A / d n-1], the calculation cost Can be reduced.
  • one of the two public values m 0 and m 1 is multiplied by the secret sharing value [a] of the real number a according to the condition c ⁇ ⁇ 0, 1 ⁇ . If the size of the published values m 0 and m 1 is large, the effective number of bits of the multiplied value (the number of bits required to express that number in binary) increases, and the number cannot be multiplied any more. Therefore, it may be necessary to shift to the right. In the present embodiment, such processing is streamlined.
  • the secret calculation device 2 of the present embodiment has secret calculation units 21 and 22 and a control unit 29.
  • the secret calculation device 2 executes each process under the control of the control unit 29.
  • the secret calculation unit 21 of the present embodiment has secret calculation units 211 and 212.
  • the secret calculation unit 212 of the present embodiment includes a public value calculation unit 212a, a secret calculation unit 212b, and a secret calculation unit 212c.
  • the secret computing device 2 has a secret sharing value [a] of a real number a, a secret sharing value [c] of a value c ⁇ ⁇ 0,1 ⁇ representing a condition, and a public value.
  • the real multipliers m 0 , m 1 , and the method p are input (step S20).
  • the secret sharing value [a], the multipliers m 0 , m 1 , and the method p are input to the secret calculation unit 21.
  • the secret calculation unit 21 obtains and outputs secret sharing values [m 0 a] and [m 1 a] by secret calculation using the secret sharing value [a] and the multipliers m 0 , m 1 , and the method p (step). S21). A specific example of the process in step S21 will be described later.
  • the secret sharing values [m 0 a], [m 1 a], and [c] are input to the secret calculation unit 22.
  • step S21 A specific example of processing in step S21 will be described.
  • the process of step S21 is made more efficient by using the method of the second embodiment.
  • p is the method of positive integers
  • q is the quotient of positive integers.
  • the secret sharing value [a] and the method p are input to the secret calculation unit 211 of the secret calculation device 21 (FIG. 4A).
  • the secret calculation unit 21 obtains and outputs the secret sharing value [q] of the quotient q of a / p by the secret calculation using the secret sharing value [a] and the method p (step S211).
  • the secret sharing values [a], [q], divisors d 0 , d 1, and method p are input to the secret calculation unit 212.
  • a specific example of the process of step S212 will be described below.
  • step S212 ⁇ Specific example of processing in step S212>
  • a right shift may be required in step S212.
  • the calculation cost is reduced by simultaneously performing the right shift and the multiplication by the published values m 0 and m 1.
  • positive integers which are the number of bits representing these right shift amounts, are represented as ⁇ 0 and ⁇ 1, respectively.
  • ⁇ 0 ⁇ 1 or ⁇ 0 ⁇ ⁇ 1.
  • the multipliers m 0 and m 1 and the positive integers ⁇ 0 and ⁇ 1 are input to the public value calculation unit 212a of the secret calculation unit 212.
  • Public value calculating unit 212a is a multiplier m 0, m 1 and a positive integer .sigma.0, public values 2 ⁇ 0 / m 0, 2 ⁇ 1 / m 1 the obtained output using .sigma.1 (step S212a).
  • the secret sharing values [a] and [q], the method p, and the public values 2 ⁇ 0 / m 0 and 2 ⁇ 1 / m 1 are input to the secret calculation unit 212b.
  • the secret calculation unit 212b divides the public value using the secret sharing values [a] and [q] and the method p and the public values 2 ⁇ 0 / m 0 and 2 ⁇ 1 / m 1 obtained by the public value calculation unit 212a.
  • Secret calculation [a + qp] / (2 ⁇ 0 / m 0 ), [a + qp] / (2 ⁇ 1 / m 1 ) is performed, and (a + qp) m 0 is right-shifted by ⁇ 0 bits.
  • m 0 ] and (a + qp) m 1 are right-shifted by ⁇ 1 bit to obtain a secret sharing value [(a + qp) m 1 ] and output (step S212b).
  • the secret sharing value [(a + qp) m 0 ], [(a + qp) m 1 ], [q], method p, multiplier m 0 , m 1 are input to the secret calculation unit 212c.
  • the if-then-else gate generates a secret sharing value [mc] corresponding to the secret sharing value [ c ], that is, [m 0 ] or [m 1 ], and then [ mc ]. Multiplying [a] with [m c a].
  • the secret sharing value [m 0 a] and give [m 1 a] step S21
  • the secret sharing value [c], [m 0 a ], [m 1 a ] by the private calculation using the secret variance of m c a [c? m 0 a: m 1 a] is obtained (step S22).
  • step S21 By executing step S21 before step S22, the secret sharing value [m ca ] is multiplied by the public value of the public value multiplier m 0 , m 1 and the secret sharing value [a], which have a low calculation cost. Can be achieved by. Therefore, in this embodiment, the calculation cost can be reduced. In particular, even if a right shift is required in step S212 when the multipliers m 0 and m 1 are large as in the specific example of the processing in step S212, the multiplication by the right shift and the published values m 0 and m 1 The calculation cost can be reduced by performing and at the same time. This process can be applied because the multipliers m 0 and m 1 are public values, which can be achieved by executing step S22 after step S21. Further, as in the specific example of the process of step S21, the calculation cost can be further reduced by improving the efficiency of the process of step S21 by using the method of the second embodiment.
  • the secret computing devices 1 and 2 in the embodiment include, for example, a processor (hardware processor) such as a CPU (central processing unit) and a memory such as a RAM (random-access memory) and a ROM (read-only memory).
  • a processor such as a CPU (central processing unit) and a memory such as a RAM (random-access memory) and a ROM (read-only memory).
  • This computer may have one processor and memory, or may have a plurality of processors and memory.
  • This program may be installed in a computer or may be recorded in a ROM or the like in advance.
  • a part or all of the processing units may be configured by using an electronic circuit that realizes a processing function independently, instead of an electronic circuit (circuitry) that realizes a function configuration by reading a program like a CPU. ..
  • the electronic circuit constituting one device may include a plurality of CPUs.
  • FIG. 6 is a block diagram illustrating the hardware configurations of the secret calculation devices 1 and 2 in the embodiment.
  • the secret computing device 1 of this example includes a CPU (Central Processing Unit) 10a, an output unit 10b, an output unit 10c, a RAM (RandomAccessMemory) 10d, a ROM (ReadOnlyMemory) 10e, and an auxiliary. It has a storage device 10f and a bus 10g.
  • the CPU 10a of this example has a control unit 10aa, a calculation unit 10ab, and a register 10ac, and executes various arithmetic processes according to various programs read into the register 10ac.
  • the output unit 10b is an output terminal, a display, or the like on which data is output.
  • the output unit 10c is a LAN card or the like controlled by the CPU 10a that has read a predetermined program.
  • the RAM 10d is a SRAM (Static Random Access Memory), a DRAM (Dynamic Random Access Memory), or the like, and has a program area 10da in which a predetermined program is stored and a data area 10db in which various data are stored.
  • the auxiliary storage device 10f is, for example, a hard disk, MO (Magneto-Optical disc), a semiconductor memory, or the like, and has a program area 10fa for storing a predetermined program and a data area 10fb for storing various data.
  • the bus 10g connects the CPU 10a, the output unit 10b, the output unit 10c, the RAM 10d, the ROM 10e, and the auxiliary storage device 10f so that information can be exchanged.
  • the CPU 10a writes the program stored in the program area 10fa of the auxiliary storage device 10f to the program area 10da of the RAM 10d according to the read OS (Operating System) program.
  • the CPU 10a writes various data stored in the data area 10fb of the auxiliary storage device 10f to the data area 10db of the RAM 10d. Then, the address on the RAM 10d in which this program or data is written is stored in the register 10ac of the CPU 10a.
  • the control unit 10ab of the CPU 10a sequentially reads out these addresses stored in the register 10ac, reads a program or data from the area on the RAM 10d indicated by the read address, and causes the arithmetic unit 10ab to sequentially execute the operations indicated by the program.
  • the calculation result is stored in the register 10ac. With such a configuration, the functional configuration of the secret calculation devices 1 and 2 is realized.
  • the above program can be recorded on a computer-readable recording medium.
  • a computer-readable recording medium is a non-transitory recording medium. Examples of such a recording medium are a magnetic recording device, an optical disk, a photomagnetic recording medium, a semiconductor memory, and the like.
  • the distribution of this program is carried out, for example, by selling, transferring, renting, etc., a portable recording medium such as a DVD or CD-ROM on which the program is recorded.
  • the program may be stored in the storage device of the server computer, and the program may be distributed by transferring the program from the server computer to another computer via a network.
  • the computer that executes such a program first temporarily stores, for example, the program recorded on the portable recording medium or the program transferred from the server computer in its own storage device. Then, when the process is executed, the computer reads the program stored in its own storage device and executes the process according to the read program.
  • a computer may read the program directly from a portable recording medium and execute processing according to the program, and further, the program is transferred from the server computer to this computer. Each time, the processing according to the received program may be executed sequentially.
  • the above processing is executed by a so-called ASP (Application Service Provider) type service that realizes the processing function only by the execution instruction and result acquisition without transferring the program from the server computer to this computer. May be.
  • the program in this embodiment includes information to be used for processing by a computer and equivalent to the program (data that is not a direct command to the computer but has a property of defining the processing of the computer, etc.).
  • the present device is configured by executing a predetermined program on a computer, but at least a part of these processing contents may be realized by hardware.
  • the present invention is not limited to the above-described embodiment.
  • the present invention can be used, for example, for the calculation of elementary functions such as inverse function, square root function, exponential function, and logarithmic function in machine learning and data mining performed by secret calculation while concealing data.
  • elementary functions such as inverse function, square root function, exponential function, and logarithmic function

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PCT/JP2020/001682 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム Ceased WO2021149105A1 (ja)

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CN202080093270.5A CN114981859B (zh) 2020-01-20 2020-01-20 秘密计算装置、秘密计算方法、计算机程序产品以及记录介质
EP20915434.3A EP4095829A4 (en) 2020-01-20 2020-01-20 SECURE CALCULATION DEVICE, SECURE CALCULATION METHOD AND PROGRAM
AU2020424993A AU2020424993B2 (en) 2020-01-20 2020-01-20 Secure computation apparatus, secure computation method, and program
JP2021572127A JP7318743B2 (ja) 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム
US17/790,769 US11934564B2 (en) 2020-01-20 2020-01-20 Secure computation apparatus, secure computation method, and program
PCT/JP2020/001682 WO2021149105A1 (ja) 2020-01-20 2020-01-20 秘密計算装置、秘密計算方法、およびプログラム

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CN114981859B (zh) 2025-03-07
EP4095829A4 (en) 2023-10-18
JP7318743B2 (ja) 2023-08-01
US20230013830A1 (en) 2023-01-19
CN114981859A (zh) 2022-08-30
AU2020424993A1 (en) 2022-07-14
EP4095829A1 (en) 2022-11-30
JPWO2021149105A1 (https=) 2021-07-29
AU2020424993B2 (en) 2023-08-03

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