WO2021135337A1 - Circuit d'échantillonnage de signal, appareil de détection et système d'imagerie - Google Patents

Circuit d'échantillonnage de signal, appareil de détection et système d'imagerie Download PDF

Info

Publication number
WO2021135337A1
WO2021135337A1 PCT/CN2020/113207 CN2020113207W WO2021135337A1 WO 2021135337 A1 WO2021135337 A1 WO 2021135337A1 CN 2020113207 W CN2020113207 W CN 2020113207W WO 2021135337 A1 WO2021135337 A1 WO 2021135337A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
amplitude
sampling circuit
comparator
signal sampling
Prior art date
Application number
PCT/CN2020/113207
Other languages
English (en)
Chinese (zh)
Inventor
谢庆国
苏禹鸣
梅峻骅
代平平
万琳
朱珂璋
Original Assignee
苏州瑞派宁科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 苏州瑞派宁科技有限公司 filed Critical 苏州瑞派宁科技有限公司
Publication of WO2021135337A1 publication Critical patent/WO2021135337A1/fr

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/29—Measurement performed on radiation beams, e.g. position or section of the beam; Measurement of spatial distribution of radiation
    • G01T1/2914—Measurement of spatial distribution of radiation
    • G01T1/2985—In depth localisation, e.g. using positron emitters; Tomographic imaging (longitudinal and transverse section imaging; apparatus for radiation diagnosis sequentially in different planes, steroscopic radiation diagnosis)
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16—Measuring radiation intensity
    • G01T1/20—Measuring radiation intensity with scintillation detectors
    • G01T1/208—Circuits specially adapted for scintillation detectors, e.g. for the photo-multiplier section

Definitions

  • This application relates to the field of photoelectric detection technology, in particular to a signal sampling circuit, a detection device and an imaging system.
  • Positron Emission Tomography is a technique that uses radioactive elements for clinical imaging. The process is to label radionuclides that emit positrons to those that can participate in the blood flow or metabolic processes of living tissues.
  • a compound labeled with a radionuclide is injected into the subject.
  • the positive electrons emitted by the radionuclide in the body combine with the negative electrons in the subject to annihilate the electron pair and produce gamma photons.
  • the gamma photons released can be converted into visible light by the scintillation crystal, and then converted by the photomultiplier tube element. It is an electrical signal for reconstruction, so as to help determine the enrichment site of radionuclides, and to help locate the area of strong metabolism and perform activity assessment.
  • the multi-voltage threshold (MVT) sampling method is usually used to use a sampling circuit (shown in Figure 1) that includes multiple comparators and a time-to-digital converter (TDC) for PET detectors.
  • TDC time-to-digital converter
  • the generated electrical signal is digitally sampled.
  • the number of sampling points collected by the sampling circuit is limited, and it is impossible to determine whether the collected sampling points are signal amplitude points, which may affect the sampling accuracy and the accuracy of subsequent signal restoration.
  • the purpose of the embodiments of the present application is to provide a signal sampling circuit, a detection device, and an imaging system to solve at least one technical problem in the prior art.
  • an embodiment of the present application provides a signal sampling circuit.
  • the signal sampling circuit includes a plurality of comparators and a time-to-digital converter connected to each other, wherein the first comparator of the plurality of comparators The two input ends of the signal sampling circuit are respectively connected to the signal input end and the reference amplitude supply end of the signal sampling circuit, and the signal sampling circuit further includes:
  • a delay unit the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the first input terminal of the second comparator and the third comparator of the plurality of comparators;
  • An amplitude holding unit the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the second input terminal of the third comparator;
  • a processing unit connected to the output terminals of the time-to-digital converter and the amplitude holding unit to determine the time corresponding to the amplitude output by the amplitude holding unit by processing the time data output by the time-to-digital converter ,
  • the second input terminal of the second comparator is connected to the reference amplitude supply terminal.
  • the amplitude holding unit is a voltage holding circuit including a capacitor, a diode, and an inductor, wherein one end of the capacitor is connected to ground in parallel with one end of the inductor, and the other end of the capacitor is connected in parallel with one end of the diode To the second input terminal of the third comparator and the processing unit, the other end of the diode is connected in series with the other end of the inductor.
  • the diode is turned on before the amplitude of the electrical signal to be measured received through the signal input terminal reaches a peak value, and is turned off after the amplitude of the electrical signal to be measured reaches the peak value.
  • the signal sampling circuit further includes:
  • a clock source configured to provide a clock signal to the time-to-digital converter.
  • the processing unit includes:
  • An analog-digital converter configured to convert the analog signal output by the amplitude holding unit into a digital signal.
  • the signal sampling circuit further includes:
  • the memory is configured to store the data output by the processing unit.
  • An embodiment of the present application also provides a detection device, which includes a detector and the above-mentioned signal sampling circuit, and the detector is configured to detect radioactive rays and send the generated electrical signal to the signal sampling circuit.
  • the detector includes a scintillation crystal and a photoelectric converter coupled to each other.
  • the photoelectric converter includes a silicon photomultiplier, a photomultiplier tube, a charge coupled device, or an avalanche photodiode.
  • An embodiment of the present application also provides an imaging system, which includes the aforementioned detection device and an image reconstruction device, and the image reconstruction device is configured to perform image reconstruction processing on the sampling points collected by the signal sampling circuit.
  • the embodiments of the present application collect the first sampling point of the electrical signal to be measured by using the third comparator and the time-to-digital converter, and use the delay unit, the amplitude holding unit, and the second comparison
  • the second sampling point of the electrical signal to be measured is collected by the third comparator, the third comparator, the time-to-digital converter, and the processing unit, which increases the number of collected sampling points, thereby improving the accuracy of signal sampling and subsequent signal restoration.
  • FIG. 1 is a schematic diagram of the structure of a signal sampling circuit in the prior art
  • FIG. 2 is a schematic structural diagram of a signal sampling circuit provided by an embodiment of the present application.
  • Figure 3 is a schematic diagram of the waveforms of the electrical signal to be measured before and after processing by the amplitude holding unit;
  • Figure 4 is a schematic diagram of the structure of the voltage holding circuit
  • FIG. 5 is a schematic structural diagram of another signal sampling circuit provided by an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of another signal sampling circuit provided by an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a detection device provided by an embodiment of the present application.
  • Figure 8 is a schematic diagram of the structure of a PET detector
  • FIG. 9 is a schematic structural diagram of an imaging system provided by an embodiment of the present application.
  • connection/coupling refers to the presence or addition of features, steps or elements, but does not exclude the presence or addition of one or more other features, steps or elements.
  • connecting/coupling refers to the presence or addition of features, steps or elements, but does not exclude the presence or addition of one or more other features, steps or elements.
  • connecting/coupling refers to the presence or addition of features, steps or elements, but does not exclude the presence or addition of one or more other features, steps or elements.
  • and/or as used herein includes any and all combinations of one or more of the associated listed items.
  • an embodiment of the present application provides a signal sampling circuit 100, which may include a signal input terminal for receiving a signal from the outside and a reference amplitude supply terminal for providing a reference amplitude or preset a reference amplitude through it. And a plurality of comparators (for example, n first comparators 110, second comparators 120, and third comparators 130, where n is a positive integer) and a time-to-digital converter (TDC) 140 connected to each other, and may also include The delay unit 150, the amplitude holding unit 160, and the processing unit 170.
  • a signal sampling circuit 100 may include a signal input terminal for receiving a signal from the outside and a reference amplitude supply terminal for providing a reference amplitude or preset a reference amplitude through it.
  • a plurality of comparators for example, n first comparators 110, second comparators 120, and third comparators 130, where n is a positive integer
  • TDC time-to-digital converter
  • the input terminal of the delay unit 150 is connected to the signal input terminal, and its output terminal is connected to the first input terminal of the second comparator 120 and the third comparator 130 among the plurality of comparators; the input terminal of the amplitude holding unit 160 is connected to The signal input terminal is connected, and its output terminal is connected to the second input terminal of the third comparator 130; and the processing unit 170 is connected to the output terminal of the time-to-digital converter 140 and the amplitude holding unit 160.
  • the two input terminals (that is, the non-inverting input terminal and the inverting input terminal) of the first comparator 110 may be connected to the signal input terminal (for example, the V(t) input terminal) of the signal sampling circuit, respectively.
  • the reference amplitude supply terminals (for example, the V 1 ⁇ V n supply terminals) are connected to receive the electric signal to be measured and the reference amplitude, and the output terminal thereof can be connected to the TDC 140 to send a level signal to it.
  • Each of the first comparators 110 may be a voltage comparator, and it may be used to compare the amplitude of the electrical signal to be measured received through the signal input terminal with the reference amplitude received from the reference amplitude supply terminal, and to provide information based on the comparison result.
  • the TDC 140 outputs a corresponding level signal. For example, when the amplitude of the electrical signal to be measured is greater than or equal to the reference amplitude, it can output a high-level signal, and when the amplitude of the electrical signal to be measured is less than the reference amplitude, it can output a low-level signal.
  • the time-to-digital converter 140 can record the first time when the amplitude of the electrical signal to be measured reaches each reference amplitude according to the level signal received from each first comparator 110, thereby obtaining the first sampling point.
  • Each first sampling point can be characterized by a reference amplitude and the corresponding first time, for example, (T 1 ,V 1 ), (T 2 ,V 2 ), (T 3 ,V 2 ) or (T 4 ,V 1 ), and the reference amplitude can be recorded as the first amplitude.
  • the reference amplitudes received by the n first comparators 110 are different, and the specific values of these reference amplitudes can be preset according to the characteristics of the electrical signal to be measured.
  • the second comparator 120 may also be a voltage comparator, which may be connected to one of a plurality of reference amplitude supply terminals, and may be used for receiving the voltage of the delayed signal received from the delay unit 150 and the reference amplitude supply terminal connected thereto. Compare the reference amplitudes, and output the corresponding level signal to the TDC 160 according to the comparison result. For example, when the voltage of the delayed signal is greater than or equal to the reference amplitude, it can output a high-level signal, and when the voltage of the delayed signal is less than the reference amplitude, it can output a low-level signal.
  • the time-to-digital converter 160 may record the first delay time when the voltage of the delay signal reaches the reference amplitude according to the received level signal.
  • the third comparator 130 may also be a voltage comparator, which may be used to compare the amplitude of the delayed signal received from the delay unit 150 with the second amplitude of the output signal of the amplitude holding unit 160, and output to the TDC 140 according to the comparison result Corresponding level signal. For example, when the amplitude of the delayed signal is greater than or equal to the second amplitude of the output signal of the amplitude holding unit 160, it can output a high-level signal, and when the amplitude of the delayed signal is less than the second amplitude of the output signal of the amplitude holding unit 160, It can output low-level signals.
  • the time-to-digital converter 160 may record the second delay time when the amplitude of the delay signal reaches the second amplitude of the output signal of the amplitude holding unit 160 according to the received level signal.
  • the TDC 140 may be used to output corresponding digital signals representing time according to the level signals received from the first comparator 110, the second comparator 120, and the third comparator 130.
  • TDC 140 can be flexibly set according to actual needs. For example, two TDCs 160 can be set for each first comparator 110 to separately record the two first times corresponding to each reference amplitude; also One TDC 140 can be set for each of the first comparator 110, the second comparator 120, and the third comparator 130; it is also possible to set only one TDC 140 for all the comparators to reduce the size of the signal sampling circuit And cost.
  • TDC For a detailed description of the TDC, reference can be made to the related description in the prior art, which will not be repeated here.
  • the delay unit 150 may be used to delay the received electrical signal under test for a period of time and send the delayed signal (ie, delayed signal) to the second comparator 120 and the third comparator 130, the specific delay time of the electrical signal under test It can be preset according to actual needs or controlled in real time according to received instructions.
  • the delay unit 150 may be a delay line, the length of which may be determined according to the delay time, or other delay elements or circuit structures.
  • the amplitude holding unit 160 may be designed or selected in advance according to actual needs or experience, and it may be used to perform amplitude holding processing on the received electrical signal to be measured, so that after the amplitude of the electrical signal to be measured reaches a certain value, It is possible to maintain the output signal whose amplitude is the value (that is, the second amplitude) for a certain period of time.
  • the amplitude holding unit 160 may maintain the signal whose output amplitude is the amplitude threshold after the amplitude of the electrical signal to be measured reaches its internally set amplitude threshold, or it can also be used when the voltage of the electrical signal to be measured reaches the peak value (that is, the voltage of the electrical signal to be measured). After the maximum amplitude or minimum amplitude) keep the output amplitude as the peak signal, as shown in Figure 3. It should be noted that the second amplitude is different from the reference amplitude.
  • the amplitude maintaining unit 160 may be a voltage maintaining circuit including elements such as capacitors, diodes, and inductors.
  • one end of the capacitor can be connected to the ground in parallel with one end of the inductor, the other end of the capacitor and one end of the diode can be connected in parallel to the second input end of the second comparator 120 and the processing unit 170, and the other end of the diode can be connected to the second input end of the second comparator 120 and the processing unit 170 in parallel.
  • the other end of the inductor is connected in series.
  • the diode can be turned on before the amplitude of the electrical signal to be measured received through the signal input terminal reaches the peak value, and cut off after the amplitude of the electrical signal to be measured reaches the peak value, so that the voltage of the capacitor can be stabilized for a period of time.
  • V i to V j where i and j are different positive integers
  • amplitude maintaining unit 160 may also be other components or circuit structures for maintaining voltage, which is not limited herein.
  • the processing unit 170 may be used to process the time data output by the TDC 140 to determine the second time when the amplitude of the electrical signal to be measured reaches the second amplitude to obtain the second sampling point, for example, (T j , V j ). Specifically, the processing unit 170 may calculate the difference between the first delay time and the second delay time, and may use the difference and the first time corresponding to the reference amplitude received from the reference amplitude supply end by the second comparator to calculate Calculate the second time corresponding to the second amplitude.
  • the calculation process can be expressed by the formula as follows:
  • T j represents the second time, preferably the time corresponding to the maximum amplitude or minimum amplitude of the electrical signal to be measured;
  • T i represents the first time, which may correspond to the reference amplitude received by the second comparator Any one of the two first times;
  • T′ j represents the second delay time;
  • T′ i may be the first delay time corresponding to the first time T i.
  • the processing unit 170 may be any device capable of data processing, for example, may be an FPGA chip or may be a processor integrated on the FPGA chip.
  • the above-mentioned signal sampling circuit 100 may further include: a clock source 180, which may be connected to the TDC 140 to provide a clock signal (preferably, a synchronous clock signal) to each TDC 140, So that all TDC 140 can operate according to the received clock signal.
  • a clock source 180 which may be connected to the TDC 140 to provide a clock signal (preferably, a synchronous clock signal) to each TDC 140, So that all TDC 140 can operate according to the received clock signal.
  • the aforementioned processing unit 170 may include an analog-to-digital converter (not shown), which may be connected to the amplitude holding unit 160 to convert the analog signal output by the amplitude holding unit 160 into a digital signal.
  • an analog-to-digital converter (not shown), which may be connected to the amplitude holding unit 160 to convert the analog signal output by the amplitude holding unit 160 into a digital signal.
  • the above-mentioned signal sampling circuit 100 may further include: a memory 190 which may be connected to the processing unit 170 and may be used to store data output by the processing unit 170.
  • both the first amplitude (ie, the reference amplitude) and the second amplitude may be voltage or current, and may also be other physical quantities used to represent the amplitude.
  • the signal sampling circuit collects the first sampling point of the electrical signal to be measured by using the first comparator and TDC, and uses the second comparator, the third comparator, and the delay unit. And the amplitude holding circuit, the processing unit, etc. to collect the second sampling point of the electrical signal to be measured, which increases the number of sampling points collected, thereby improving the sampling accuracy and the accuracy of subsequent signal restoration. Moreover, by using the technical solution of the present application, the amplitude points (ie, peaks or valleys) of the electrical signal can be adaptively collected, which is more conducive to improving the accuracy of subsequent signal restoration, thereby improving energy resolution.
  • the detection device 1000 may include the signal sampling circuit 100 described in the above embodiment and a detector 200 connected to the signal sampling circuit 100.
  • the detector 200 may be connected to the signal input terminal in the signal sampling circuit 100 to send the electrical signal to be measured to the signal sampling circuit 100.
  • the detector 200 may be any detector capable of detecting radioactive rays and generating corresponding electrical signals, preferably a PET detector. In this case, it may include a scintillation crystal 210 and a photoelectric converter 220 coupled to each other, as shown in FIG. 8.
  • the photoelectric converter 220 may include a silicon photomultiplier, a photomultiplier tube, a charge coupled device, or an avalanche photodiode.
  • a silicon photomultiplier for the detailed description of the scintillation crystal and the photoelectric converter, reference can be made to the related description in the prior art, which will not be repeated here.
  • the digital sampling of the electrical signal detected by the PET detector can be realized, and the amplitude point of the electrical signal can be adaptively collected, which can improve the accuracy of subsequent signal restoration.
  • the imaging system may include the aforementioned detection device 1000 and an image reconstruction device 2000 connected to the detection device 1000.
  • the image reconstruction device 2000 may be configured to detect The sampling points collected by the signal sampling circuit in the device 1000 undergo image reconstruction processing to restore the waveform of the electrical signal output by the detector in the detection device 1000.
  • the image reconstruction device 2000 may be any device capable of performing image reconstruction processing on the sampling points.
  • the accuracy of signal restoration can be improved.

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Molecular Biology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Analogue/Digital Conversion (AREA)
  • Measurement Of Radiation (AREA)

Abstract

L'invention concerne un circuit d'échantillonnage de signal (100), un appareil de détection (1000) et un système d'imagerie. Le circuit d'échantillonnage de signal (100) comprend une pluralité de comparateurs (110, 120, 130) et un convertisseur temps-numérique (140) qui sont reliés l'un à l'autre, deux extrémités d'entrée d'un premier comparateur (110) de la pluralité de comparateurs (110, 120, 130) sont respectivement reliées à une extrémité d'entrée de signal et à une extrémité d'alimentation d'amplitude de référence du circuit d'échantillonnage de signal (100). Le circuit d'échantillonnage de signal comprend en outre : une unité de retard (150), une extrémité d'entrée de l'unité de retard étant reliée à l'extrémité d'entrée de signal, et une extrémité de sortie de celle-ci étant reliée à des premières extrémités d'entrée d'un deuxième comparateur (120) et un troisième comparateur (130) de la pluralité de comparateurs (110, 120, 130) ; une unité de maintien d'amplitude (160), une extrémité d'entrée de l'unité de maintien d'amplitude étant reliée à l'extrémité d'entrée de signal, et une extrémité de sortie de celle-ci étant reliée à une seconde extrémité d'entrée du troisième comparateur (130) ; et une unité de traitement (170) reliée aux extrémités de sortie du convertisseur temps-numérique (140) et de l'unité de maintien d'amplitude (160), une seconde extrémité d'entrée du deuxième comparateur (120) étant reliée à l'extrémité d'alimentation d'amplitude de référence. Au moyen du circuit d'échantillonnage de signal (100), plus de points d'échantillonnage peuvent être collectés, et la précision d'échantillonnage pour des signaux électriques peut être améliorée.
PCT/CN2020/113207 2020-01-02 2020-09-03 Circuit d'échantillonnage de signal, appareil de détection et système d'imagerie WO2021135337A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010000187.0 2020-01-02
CN202010000187.0A CN111103614A (zh) 2020-01-02 2020-01-02 信号采样电路、探测装置及成像系统

Publications (1)

Publication Number Publication Date
WO2021135337A1 true WO2021135337A1 (fr) 2021-07-08

Family

ID=70426623

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/113207 WO2021135337A1 (fr) 2020-01-02 2020-09-03 Circuit d'échantillonnage de signal, appareil de détection et système d'imagerie

Country Status (2)

Country Link
CN (1) CN111103614A (fr)
WO (1) WO2021135337A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113406877A (zh) * 2021-05-20 2021-09-17 西北核技术研究所 脉冲信号特征点及同步时间的高时间精度测量方法和系统

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111158039B (zh) * 2020-01-02 2022-01-04 苏州瑞派宁科技有限公司 信号采样、重建方法及装置
CN111103614A (zh) * 2020-01-02 2020-05-05 苏州瑞派宁科技有限公司 信号采样电路、探测装置及成像系统

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0214496A (ja) * 1988-06-30 1990-01-18 Nec Corp ピークホールド回路
US5724002A (en) * 1996-06-13 1998-03-03 Acrodyne Industries, Inc. Envelope detector including sample-and-hold circuit controlled by preceding carrier pulse peak(s)
CN2489345Y (zh) * 2000-12-26 2002-05-01 中国科学院高能物理研究所 一种伽玛射线甄别器
CN107767427A (zh) * 2017-09-28 2018-03-06 沈阳东软医疗系统有限公司 一种信号波形恢复方法及装置
CN108181331A (zh) * 2017-12-20 2018-06-19 上海联影医疗科技有限公司 一种信号探测电路及探测器
CN109444559A (zh) * 2018-10-26 2019-03-08 苏州瑞迈斯医疗科技有限公司 脉冲信号的采样方法、重建方法和装置
CN109581461A (zh) * 2018-12-19 2019-04-05 中国科学技术大学 核脉冲能量测量方法及系统
CN111103614A (zh) * 2020-01-02 2020-05-05 苏州瑞派宁科技有限公司 信号采样电路、探测装置及成像系统
CN211698223U (zh) * 2020-01-02 2020-10-16 苏州瑞派宁科技有限公司 信号采样电路、探测装置及成像系统

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0214496A (ja) * 1988-06-30 1990-01-18 Nec Corp ピークホールド回路
US5724002A (en) * 1996-06-13 1998-03-03 Acrodyne Industries, Inc. Envelope detector including sample-and-hold circuit controlled by preceding carrier pulse peak(s)
CN2489345Y (zh) * 2000-12-26 2002-05-01 中国科学院高能物理研究所 一种伽玛射线甄别器
CN107767427A (zh) * 2017-09-28 2018-03-06 沈阳东软医疗系统有限公司 一种信号波形恢复方法及装置
CN108181331A (zh) * 2017-12-20 2018-06-19 上海联影医疗科技有限公司 一种信号探测电路及探测器
CN109444559A (zh) * 2018-10-26 2019-03-08 苏州瑞迈斯医疗科技有限公司 脉冲信号的采样方法、重建方法和装置
CN109581461A (zh) * 2018-12-19 2019-04-05 中国科学技术大学 核脉冲能量测量方法及系统
CN111103614A (zh) * 2020-01-02 2020-05-05 苏州瑞派宁科技有限公司 信号采样电路、探测装置及成像系统
CN211698223U (zh) * 2020-01-02 2020-10-16 苏州瑞派宁科技有限公司 信号采样电路、探测装置及成像系统

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113406877A (zh) * 2021-05-20 2021-09-17 西北核技术研究所 脉冲信号特征点及同步时间的高时间精度测量方法和系统
CN113406877B (zh) * 2021-05-20 2022-09-23 西北核技术研究所 基于特征点的脉冲信号高时间精度测量方法和系统

Also Published As

Publication number Publication date
CN111103614A (zh) 2020-05-05

Similar Documents

Publication Publication Date Title
WO2021135337A1 (fr) Circuit d'échantillonnage de signal, appareil de détection et système d'imagerie
JP6325650B2 (ja) 光検出器画素アレイを有する放射線検出装置、ｐｅｔ撮像システム、光フォトン加算方法、及び光フォトン加算方法のステップを実行するためのコンピュータプログラム
US20150069250A1 (en) CMOS SPAD Array with Mixed Timing Pick-Off for Time-of-Flight Positron Emission Tomography
EP2867702B1 (fr) Détecteur de comptage de photons spectral
JP5800983B2 (ja) シンチレーションパルス情報取得のための方法及び装置
EP3796048B1 (fr) Procédé et dispositif d'échantillonnage de signal d'impulsion et support de programme informatique
WO2016110141A1 (fr) Procédé de numérisation d'impulsion de scintillation
WO2014121548A1 (fr) Procédé et système de correction de la ligne de base d'une impulsion de scintillation numérisée
JP2018538525A (ja) パルスパイルアップイベントのリアルタイム処理の方法及びシステム
US8735831B2 (en) Trigger methods in nuclear medical imaging
Park et al. Hybrid charge division multiplexing method for silicon photomultiplier based PET detectors
Li et al. A new statistics-based online baseline restorer for a high count-rate fully digital system
WO2021135338A1 (fr) Procédé et dispositif d'échantillonnage et de reconstruction de signal
KR102063828B1 (ko) 방사선 영상 기기의 신호 검출 방법 및 그 방사선 영상 기기
TWI313758B (en) A device and method for characterizing energy,peak time and decay time constant of gamma ray
CN211698223U (zh) 信号采样电路、探测装置及成像系统
WO2019037719A1 (fr) Appareil de mesure d'informations de photons
US20050167599A1 (en) Positron emission tomography wrist detector
CN113057667A (zh) Pet探测器信号采样方法、装置、电子装置和存储介质
CN109283569B (zh) 用于测量光子信息的装置和光子测量设备
JP2004519681A (ja) 放射線検出システムのデジタルピーク検出器
Liu et al. Real time digital implementation of the high-yield-pileup-event-recover (HYPER) method
US11194061B2 (en) Optical detector and optical detection device
Murata et al. Evaluation of digital methods for energy calculation and timing pick-off in positron emission tomography
JP6969734B2 (ja) 電荷検出回路及びそれを含む放射線検出装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20910103

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20910103

Country of ref document: EP

Kind code of ref document: A1