WO2021135337A1

WO2021135337A1 - Signal sampling circuit, detection apparatus, and imaging system

Info

Publication number: WO2021135337A1
Application number: PCT/CN2020/113207
Authority: WO
Inventors: 谢庆国; 苏禹鸣; 梅峻骅; 代平平; 万琳; 朱珂璋
Original assignee: 苏州瑞派宁科技有限公司
Priority date: 2020-01-02
Filing date: 2020-09-03
Publication date: 2021-07-08
Also published as: CN111103614A

Abstract

Provided are a signal sampling circuit (100), a detection apparatus (1000), and an imaging system. The signal sampling circuit (100) comprises a plurality of comparators (110, 120, 130) and a time-to-digital converter (140) which are connected to each other, wherein two input ends of a first comparator (110) of the plurality of comparators (110, 120, 130) are respectively connected to a signal input end and reference amplitude supply end of the signal sampling circuit (100). The signal sampling circuit further comprises: a delay unit (150), wherein an input end of the delay unit is connected to the signal input end, and an output end thereof is connected to first input ends of a second comparator (120) and third comparator (130) of the plurality of comparators (110, 120, 130); an amplitude maintaining unit (160), wherein an input end of the amplitude maintaining unit is connected to the signal input end, and an output end thereof is connected to a second input end of the third comparator (130); and a processing unit (170) connected to output ends of the time-to-digital converter (140) and the amplitude maintaining unit (160), wherein a second input end of the second comparator (120) is connected to the reference amplitude supply end. By means of the signal sampling circuit (100), more sampling points can be collected, and the sampling precision for electrical signals can be improved.

Description

Signal sampling circuit, detection device and imaging system

This disclosure claims the priority of the Chinese patent application 202010000187.0 filed on January 02, 2020, the entire content of which is incorporated herein by reference.

Technical field

This application relates to the field of photoelectric detection technology, in particular to a signal sampling circuit, a detection device and an imaging system.

Background technique

Positron Emission Tomography (PET) is a technique that uses radioactive elements for clinical imaging. The process is to label radionuclides that emit positrons to those that can participate in the blood flow or metabolic processes of living tissues. On the compound, a compound labeled with a radionuclide is injected into the subject. The positive electrons emitted by the radionuclide in the body combine with the negative electrons in the subject to annihilate the electron pair and produce gamma photons. The gamma photons released can be converted into visible light by the scintillation crystal, and then converted by the photomultiplier tube element. It is an electrical signal for reconstruction, so as to help determine the enrichment site of radionuclides, and to help locate the area of strong metabolism and perform activity assessment.

In the prior art, the multi-voltage threshold (MVT) sampling method is usually used to use a sampling circuit (shown in Figure 1) that includes multiple comparators and a time-to-digital converter (TDC) for PET detectors. The generated electrical signal is digitally sampled. However, the number of sampling points collected by the sampling circuit is limited, and it is impossible to determine whether the collected sampling points are signal amplitude points, which may affect the sampling accuracy and the accuracy of subsequent signal restoration.

Summary of the invention

The purpose of the embodiments of the present application is to provide a signal sampling circuit, a detection device, and an imaging system to solve at least one technical problem in the prior art.

In order to solve the above technical problem, an embodiment of the present application provides a signal sampling circuit. The signal sampling circuit includes a plurality of comparators and a time-to-digital converter connected to each other, wherein the first comparator of the plurality of comparators The two input ends of the signal sampling circuit are respectively connected to the signal input end and the reference amplitude supply end of the signal sampling circuit, and the signal sampling circuit further includes:

A delay unit, the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the first input terminal of the second comparator and the third comparator of the plurality of comparators;

An amplitude holding unit, the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the second input terminal of the third comparator; and

A processing unit connected to the output terminals of the time-to-digital converter and the amplitude holding unit to determine the time corresponding to the amplitude output by the amplitude holding unit by processing the time data output by the time-to-digital converter ,

Wherein, the second input terminal of the second comparator is connected to the reference amplitude supply terminal.

Optionally, the amplitude holding unit is a voltage holding circuit including a capacitor, a diode, and an inductor, wherein one end of the capacitor is connected to ground in parallel with one end of the inductor, and the other end of the capacitor is connected in parallel with one end of the diode To the second input terminal of the third comparator and the processing unit, the other end of the diode is connected in series with the other end of the inductor.

Optionally, the diode is turned on before the amplitude of the electrical signal to be measured received through the signal input terminal reaches a peak value, and is turned off after the amplitude of the electrical signal to be measured reaches the peak value.

Optionally, the signal sampling circuit further includes:

A clock source configured to provide a clock signal to the time-to-digital converter.

Optionally, the processing unit includes:

An analog-digital converter configured to convert the analog signal output by the amplitude holding unit into a digital signal.

Optionally, the signal sampling circuit further includes:

The memory is configured to store the data output by the processing unit.

An embodiment of the present application also provides a detection device, which includes a detector and the above-mentioned signal sampling circuit, and the detector is configured to detect radioactive rays and send the generated electrical signal to the signal sampling circuit.

Optionally, the detector includes a scintillation crystal and a photoelectric converter coupled to each other.

Optionally, the photoelectric converter includes a silicon photomultiplier, a photomultiplier tube, a charge coupled device, or an avalanche photodiode.

An embodiment of the present application also provides an imaging system, which includes the aforementioned detection device and an image reconstruction device, and the image reconstruction device is configured to perform image reconstruction processing on the sampling points collected by the signal sampling circuit.

As can be seen from the technical solutions provided by the above embodiments of the application, the embodiments of the present application collect the first sampling point of the electrical signal to be measured by using the third comparator and the time-to-digital converter, and use the delay unit, the amplitude holding unit, and the second comparison The second sampling point of the electrical signal to be measured is collected by the third comparator, the third comparator, the time-to-digital converter, and the processing unit, which increases the number of collected sampling points, thereby improving the accuracy of signal sampling and subsequent signal restoration. .

Description of the drawings

In order to more clearly describe the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments described in this application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative labor.

FIG. 1 is a schematic diagram of the structure of a signal sampling circuit in the prior art;

2 is a schematic structural diagram of a signal sampling circuit provided by an embodiment of the present application;

Figure 3 is a schematic diagram of the waveforms of the electrical signal to be measured before and after processing by the amplitude holding unit;

Figure 4 is a schematic diagram of the structure of the voltage holding circuit;

FIG. 5 is a schematic structural diagram of another signal sampling circuit provided by an embodiment of the present application;

6 is a schematic structural diagram of another signal sampling circuit provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a detection device provided by an embodiment of the present application;

Figure 8 is a schematic diagram of the structure of a PET detector;

FIG. 9 is a schematic structural diagram of an imaging system provided by an embodiment of the present application.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only used to explain some of the embodiments of the present application, not all of them. The embodiments are not intended to limit the scope of the application or the claims. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work should fall within the protection scope of this application.

It should be noted that when an element is referred to as being "disposed on" another element, it can be directly disposed on the other element or there may be a centered element. When an element is referred to as being "connected/coupled" to another element, it may be directly connected/coupled to the other element or an intermediate element may be present at the same time. The term "connection/coupling" as used herein may include electrical and/or mechanical physical connection/coupling. The term "comprising/comprising" as used herein refers to the presence or addition of features, steps or elements, but does not exclude the presence or addition of one or more other features, steps or elements. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

Unless otherwise defined, all technical and scientific terms used in this article have the same meaning as commonly understood by those skilled in the technical field of this application. The terminology used herein is only for the purpose of describing specific embodiments, and is not intended to limit the application.

In addition, in the description of this application, the terms "first", "second", "third", etc. are only used for the purpose of description and to distinguish similar objects. There is no sequence between the two, nor can they be understood as Indicates or implies relative importance. In addition, in the description of the present application, unless otherwise specified, "plurality" means two or more.

The signal sampling circuit, detection device, and imaging system provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

As shown in FIG. 2, an embodiment of the present application provides a signal sampling circuit 100, which may include a signal input terminal for receiving a signal from the outside and a reference amplitude supply terminal for providing a reference amplitude or preset a reference amplitude through it. And a plurality of comparators (for example, n first comparators 110, second comparators 120, and third comparators 130, where n is a positive integer) and a time-to-digital converter (TDC) 140 connected to each other, and may also include The delay unit 150, the amplitude holding unit 160, and the processing unit 170. Wherein, the input terminal of the delay unit 150 is connected to the signal input terminal, and its output terminal is connected to the first input terminal of the second comparator 120 and the third comparator 130 among the plurality of comparators; the input terminal of the amplitude holding unit 160 is connected to The signal input terminal is connected, and its output terminal is connected to the second input terminal of the third comparator 130; and the processing unit 170 is connected to the output terminal of the time-to-digital converter 140 and the amplitude holding unit 160.

In an embodiment, the two input terminals (that is, the non-inverting input terminal and the inverting input terminal) of the first comparator 110 may be connected to the signal input terminal (for example, the V(t) input terminal) of the signal sampling circuit, respectively. The reference amplitude supply terminals (for example, the V ₁ ˜V _n supply terminals) are connected to receive the electric signal to be measured and the reference amplitude, and the output terminal thereof can be connected to the TDC 140 to send a level signal to it.

Each of the first comparators 110 may be a voltage comparator, and it may be used to compare the amplitude of the electrical signal to be measured received through the signal input terminal with the reference amplitude received from the reference amplitude supply terminal, and to provide information based on the comparison result. The TDC 140 outputs a corresponding level signal. For example, when the amplitude of the electrical signal to be measured is greater than or equal to the reference amplitude, it can output a high-level signal, and when the amplitude of the electrical signal to be measured is less than the reference amplitude, it can output a low-level signal. Correspondingly, the time-to-digital converter 140 can record the first time when the amplitude of the electrical signal to be measured reaches each reference amplitude according to the level signal received from each first comparator 110, thereby obtaining the first sampling point. Each first sampling point can be characterized by a reference amplitude and the corresponding first time, for example, (T ₁ ,V ₁ ), (T ₂ ,V ₂ ), (T ₃ ,V ₂ ) or (T ₄ ,V ₁ ), and the reference amplitude can be recorded as the first amplitude.

It should be noted that the reference amplitudes received by the n first comparators 110 are different, and the specific values of these reference amplitudes can be preset according to the characteristics of the electrical signal to be measured.

The second comparator 120 may also be a voltage comparator, which may be connected to one of a plurality of reference amplitude supply terminals, and may be used for receiving the voltage of the delayed signal received from the delay unit 150 and the reference amplitude supply terminal connected thereto. Compare the reference amplitudes, and output the corresponding level signal to the TDC 160 according to the comparison result. For example, when the voltage of the delayed signal is greater than or equal to the reference amplitude, it can output a high-level signal, and when the voltage of the delayed signal is less than the reference amplitude, it can output a low-level signal. Correspondingly, the time-to-digital converter 160 may record the first delay time when the voltage of the delay signal reaches the reference amplitude according to the received level signal.

The third comparator 130 may also be a voltage comparator, which may be used to compare the amplitude of the delayed signal received from the delay unit 150 with the second amplitude of the output signal of the amplitude holding unit 160, and output to the TDC 140 according to the comparison result Corresponding level signal. For example, when the amplitude of the delayed signal is greater than or equal to the second amplitude of the output signal of the amplitude holding unit 160, it can output a high-level signal, and when the amplitude of the delayed signal is less than the second amplitude of the output signal of the amplitude holding unit 160, It can output low-level signals. Correspondingly, the time-to-digital converter 160 may record the second delay time when the amplitude of the delay signal reaches the second amplitude of the output signal of the amplitude holding unit 160 according to the received level signal.

The TDC 140 may be used to output corresponding digital signals representing time according to the level signals received from the first comparator 110, the second comparator 120, and the third comparator 130. In a specific embodiment, TDC 140 can be flexibly set according to actual needs. For example, two TDCs 160 can be set for each first comparator 110 to separately record the two first times corresponding to each reference amplitude; also One TDC 140 can be set for each of the first comparator 110, the second comparator 120, and the third comparator 130; it is also possible to set only one TDC 140 for all the comparators to reduce the size of the signal sampling circuit And cost. For a detailed description of the TDC, reference can be made to the related description in the prior art, which will not be repeated here.

The delay unit 150 may be used to delay the received electrical signal under test for a period of time and send the delayed signal (ie, delayed signal) to the second comparator 120 and the third comparator 130, the specific delay time of the electrical signal under test It can be preset according to actual needs or controlled in real time according to received instructions. The delay unit 150 may be a delay line, the length of which may be determined according to the delay time, or other delay elements or circuit structures.

The amplitude holding unit 160 may be designed or selected in advance according to actual needs or experience, and it may be used to perform amplitude holding processing on the received electrical signal to be measured, so that after the amplitude of the electrical signal to be measured reaches a certain value, It is possible to maintain the output signal whose amplitude is the value (that is, the second amplitude) for a certain period of time. For example, the amplitude holding unit 160 may maintain the signal whose output amplitude is the amplitude threshold after the amplitude of the electrical signal to be measured reaches its internally set amplitude threshold, or it can also be used when the voltage of the electrical signal to be measured reaches the peak value (that is, the voltage of the electrical signal to be measured). After the maximum amplitude or minimum amplitude) keep the output amplitude as the peak signal, as shown in Figure 3. It should be noted that the second amplitude is different from the reference amplitude.

In one embodiment, as shown in FIG. 4, the amplitude maintaining unit 160 may be a voltage maintaining circuit including elements such as capacitors, diodes, and inductors. In this voltage holding circuit, one end of the capacitor can be connected to the ground in parallel with one end of the inductor, the other end of the capacitor and one end of the diode can be connected in parallel to the second input end of the second comparator 120 and the processing unit 170, and the other end of the diode can be connected to the second input end of the second comparator 120 and the processing unit 170 in parallel. The other end of the inductor is connected in series. The diode can be turned on before the amplitude of the electrical signal to be measured received through the signal input terminal reaches the peak value, and cut off after the amplitude of the electrical signal to be measured reaches the peak value, so that the voltage of the capacitor can be stabilized for a period of time. During the measurement process, when the voltage across the capacitor suddenly changes, for example, from V _i to V _j (where i and j are different positive integers), it can be considered that the voltage of the electrical signal under test reaches its peak value. And record the peak value.

In addition, the amplitude maintaining unit 160 may also be other components or circuit structures for maintaining voltage, which is not limited herein.

The processing unit 170 may be used to process the time data output by the TDC 140 to determine the second time when the amplitude of the electrical signal to be measured reaches the second amplitude to obtain the second sampling point, for example, (T _j , V _j ). Specifically, the processing unit 170 may calculate the difference between the first delay time and the second delay time, and may use the difference and the first time corresponding to the reference amplitude received from the reference amplitude supply end by the second comparator to calculate Calculate the second time corresponding to the second amplitude. The calculation process can be expressed by the formula as follows:

T _j =T _i +ΔT =T _i +(T′ _j -T′ _i )

In the above formula, T _j represents the second time, preferably the time corresponding to the maximum amplitude or minimum amplitude of the electrical signal to be measured; T _i represents the first time, which may correspond to the reference amplitude received by the second comparator Any one of the two first times; T′ _j represents the second delay time; T′ _i may be the first delay time corresponding to the first _{time T i.}

The processing unit 170 may be any device capable of data processing, for example, may be an FPGA chip or may be a processor integrated on the FPGA chip.

In another embodiment, as shown in FIG. 5, the above-mentioned signal sampling circuit 100 may further include: a clock source 180, which may be connected to the TDC 140 to provide a clock signal (preferably, a synchronous clock signal) to each TDC 140, So that all TDC 140 can operate according to the received clock signal.

In another embodiment, the aforementioned processing unit 170 may include an analog-to-digital converter (not shown), which may be connected to the amplitude holding unit 160 to convert the analog signal output by the amplitude holding unit 160 into a digital signal.

In another embodiment, as shown in FIG. 6, the above-mentioned signal sampling circuit 100 may further include: a memory 190 which may be connected to the processing unit 170 and may be used to store data output by the processing unit 170.

In the foregoing embodiment, both the first amplitude (ie, the reference amplitude) and the second amplitude may be voltage or current, and may also be other physical quantities used to represent the amplitude.

It can be seen from the above description that the signal sampling circuit provided by the embodiment of the present application collects the first sampling point of the electrical signal to be measured by using the first comparator and TDC, and uses the second comparator, the third comparator, and the delay unit. And the amplitude holding circuit, the processing unit, etc. to collect the second sampling point of the electrical signal to be measured, which increases the number of sampling points collected, thereby improving the sampling accuracy and the accuracy of subsequent signal restoration. Moreover, by using the technical solution of the present application, the amplitude points (ie, peaks or valleys) of the electrical signal can be adaptively collected, which is more conducive to improving the accuracy of subsequent signal restoration, thereby improving energy resolution.

An embodiment of the present application also provides a detection device 1000. As shown in FIG. 7, the detection device 1000 may include the signal sampling circuit 100 described in the above embodiment and a detector 200 connected to the signal sampling circuit 100. Specifically, the detector 200 may be connected to the signal input terminal in the signal sampling circuit 100 to send the electrical signal to be measured to the signal sampling circuit 100. The detector 200 may be any detector capable of detecting radioactive rays and generating corresponding electrical signals, preferably a PET detector. In this case, it may include a scintillation crystal 210 and a photoelectric converter 220 coupled to each other, as shown in FIG. 8. The photoelectric converter 220 may include a silicon photomultiplier, a photomultiplier tube, a charge coupled device, or an avalanche photodiode. For the detailed description of the scintillation crystal and the photoelectric converter, reference can be made to the related description in the prior art, which will not be repeated here.

Through the detection device provided by the embodiment of the present application, the digital sampling of the electrical signal detected by the PET detector can be realized, and the amplitude point of the electrical signal can be adaptively collected, which can improve the accuracy of subsequent signal restoration.

An embodiment of the present application also provides an imaging system. As shown in FIG. 9, the imaging system may include the aforementioned detection device 1000 and an image reconstruction device 2000 connected to the detection device 1000. The image reconstruction device 2000 may be configured to detect The sampling points collected by the signal sampling circuit in the device 1000 undergo image reconstruction processing to restore the waveform of the electrical signal output by the detector in the detection device 1000. The image reconstruction device 2000 may be any device capable of performing image reconstruction processing on the sampling points.

By using the imaging system provided by the embodiments of the present application, the accuracy of signal restoration can be improved.

The systems, devices, units, etc. explained in the foregoing embodiments may be specifically implemented by semiconductor chips, computer chips, and/or entities, or implemented by products with certain functions. For the convenience of description, when describing the above device, the functions are divided into various units and described separately. Of course, when implementing this application, the functions of each unit can be implemented in the same chip or multiple chips.

The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments.

The above-mentioned embodiments are described to facilitate those skilled in the art to understand and use this application. Those skilled in the art can obviously easily make various modifications to these embodiments, and apply the general principles described here to other embodiments without creative work. Therefore, this application is not limited to the above-mentioned embodiments. Improvements and modifications made by those skilled in the art based on the disclosure of this application without departing from the scope of this application should fall within the protection scope of this application.

Claims

A signal sampling circuit includes a plurality of comparators and a time-to-digital converter connected to each other, wherein two input terminals of a first comparator of the plurality of comparators are respectively connected to the signal input of the signal sampling circuit Terminal is connected with the reference amplitude supply terminal, characterized in that, the signal sampling circuit further includes:

A delay unit, the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the first input terminal of the second comparator and the third comparator of the plurality of comparators;

An amplitude holding unit, the input terminal of which is connected to the signal input terminal, and the output terminal of which is connected to the second input terminal of the third comparator; and

A processing unit connected to the output terminals of the time-to-digital converter and the amplitude holding unit to determine the time corresponding to the amplitude output by the amplitude holding unit by processing the time data output by the time-to-digital converter ,

Wherein, the second input terminal of the second comparator is connected to the reference amplitude supply terminal.
The signal sampling circuit according to claim 1, wherein the amplitude holding unit is a voltage holding circuit including a capacitor, a diode, and an inductor, wherein one end of the capacitor is connected to ground in parallel with one end of the inductor, and the The other end of the capacitor and one end of the diode are connected in parallel to the second input end of the second comparator and the processing unit, and the other end of the diode is connected in series with the other end of the inductor.
The signal sampling circuit according to claim 2, wherein the diode is turned on before the amplitude of the electrical signal to be measured received through the signal input terminal reaches a peak, and when the amplitude of the electrical signal to be measured reaches Cut off after the peak.
The signal sampling circuit according to claim 1, wherein the signal sampling circuit further comprises:

A clock source configured to provide a clock signal to the time-to-digital converter.
The signal sampling circuit according to claim 1, wherein the processing unit comprises:

An analog-digital converter configured to convert the analog signal output by the amplitude holding unit into a digital signal.
The signal sampling circuit according to claim 1, wherein the signal sampling circuit further comprises:

The memory is configured to store the data output by the processing unit.
A detection device, wherein the detection device comprises a detector and the signal sampling circuit according to any one of claims 1-6, and the detector is configured to detect radioactive rays and send it to the signal sampling circuit Send the generated electrical signal.
8. The detection device according to claim 7, wherein the detector comprises a scintillation crystal and a photoelectric converter coupled to each other.
8. The detection device according to claim 8, wherein the photoelectric converter comprises a silicon photomultiplier, a photomultiplier tube, a charge coupled device, or an avalanche photodiode.
An imaging system, characterized in that the imaging system comprises the detection device according to any one of claims 7-9 and an image reconstruction device, and the image reconstruction device is configured to sample the signal collected by the signal sampling circuit. Click for image reconstruction processing.