WO2021134216A1 - 电源调节系统、方法、装置、芯片及电子设备 - Google Patents

电源调节系统、方法、装置、芯片及电子设备 Download PDF

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Publication number
WO2021134216A1
WO2021134216A1 PCT/CN2019/129922 CN2019129922W WO2021134216A1 WO 2021134216 A1 WO2021134216 A1 WO 2021134216A1 CN 2019129922 W CN2019129922 W CN 2019129922W WO 2021134216 A1 WO2021134216 A1 WO 2021134216A1
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WIPO (PCT)
Prior art keywords
load
power supply
power
supply voltage
change
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PCT/CN2019/129922
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English (en)
French (fr)
Inventor
王毓千
姚水音
梁洪昌
唐志敏
Original Assignee
成都海光集成电路设计有限公司
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Publication date
Application filed by 成都海光集成电路设计有限公司 filed Critical 成都海光集成电路设计有限公司
Priority to US17/254,245 priority Critical patent/US11256275B2/en
Priority to CN201980006429.2A priority patent/CN113412459B/zh
Priority to PCT/CN2019/129922 priority patent/WO2021134216A1/zh
Publication of WO2021134216A1 publication Critical patent/WO2021134216A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the embodiments of the present disclosure relate to a power regulation system, method, device, chip, and electronic equipment.
  • the power supply is a device that supplies power to the load.
  • the unstable power supply voltage at the load side will cause the chip to work abnormally. Therefore, the stability of the load side power supply voltage is extremely important. Special attention should be paid to the stability of the load side power supply voltage during chip design.
  • At least one embodiment of the present disclosure provides a power regulation system, which includes: a power source, a power storage circuit, and a control circuit;
  • the power supply includes a first power output terminal, and the first power output terminal is configured to output a power supply voltage
  • the power storage circuit includes a second power output terminal, and the second power output terminal is configured to output the power stored in the power storage circuit;
  • the first power output terminal of the power supply and the second power output terminal of the power storage circuit are electrically connected to a load in use, and the control circuit is connected to the power supply and the load in use; as well as
  • the control circuit is configured to obtain a change in the workload of the load, and when the change in the workload is an increase in load, control the power supply to reduce the power supply voltage, so that the power storage circuit outputs the same amount of power. Said load power supply.
  • control circuit is further configured to control the power supply to increase the power supply voltage when the workload change is that the load decreases.
  • control circuit is further configured to:
  • the workload change of the load is determined based on the load working frequency.
  • control circuit is further configured to:
  • the load operating frequency When the load operating frequency is in the first load operating frequency range, it is determined that the change in the operating load is an increase in load, wherein the first load operating frequency range is when the load current is higher than a predetermined standard load current Load operating frequency range;
  • control circuit is further configured to:
  • the load working frequency is in the second load working frequency range, it is determined that the change in the working load is load reduction, wherein the second load working frequency range is that the load current is lower than the standard load current The load working frequency range at the time;
  • the load includes an adaptive voltage and frequency adjustment detection circuit that detects changes in the workload
  • the control circuit includes: an adaptive voltage and frequency adjustment interactive interface capable of interacting with the adaptive voltage and frequency adjustment detection circuit, wherein the adaptive voltage and frequency adjustment interactive interface passes through the adaptive voltage and frequency adjustment
  • the detection circuit acquires the change of the workload.
  • the load includes a load detection circuit independent of the adaptive voltage and frequency adjustment circuit
  • the control circuit includes: a load detection interaction interface capable of interacting with the load detection circuit, wherein the load detection interaction interface obtains the workload change situation through the load detection circuit.
  • the power regulation system further includes a first circuit element and a second circuit element
  • first end of the first circuit element is connected to the first power output end of the power supply, and the second end of the first circuit element is connected to and connected to the first end of the second circuit element.
  • the second power output terminal of the power storage circuit is connected, and the second terminal of the second circuit element is connected to the load in use.
  • the power storage circuit is a capacitor
  • the first circuit element and the second circuit element are inductors.
  • the embodiment of the present disclosure also provides a power adjustment method, which is applicable to the power adjustment system according to any one of claims 1-9, and the power adjustment method includes:
  • the obtaining the workload change status of the load includes:
  • outputting a power supply voltage reduction signal to the power supply includes:
  • the load operating frequency When the load operating frequency is in the first load operating frequency range, it is determined that the change in the operating load is an increase in load, wherein the first load operating frequency range is when the load current is higher than a predetermined standard load current Load operating frequency range;
  • a power supply voltage reduction signal is output to the power supply, so that the power supply voltage is reduced to be lower than a predetermined standard power supply voltage.
  • outputting a power supply voltage increase signal to the power supply to increase the power supply voltage includes:
  • the load working frequency is in the second load working frequency range, it is determined that the change in the working load is load reduction, wherein the second load working frequency range is that the load current is lower than the standard load current The load working frequency range at the time;
  • At least one embodiment of the present disclosure further provides a power adjustment device, which includes:
  • the acquisition circuit is configured to acquire the workload change of the load
  • the first control circuit is configured to output a power supply voltage reduction signal to the power supply if the workload change is that the load increases, so as to reduce the power supply voltage, and make the power storage circuit output power to supply power to the load;
  • the second control circuit is configured to output a power supply voltage increase signal to the power supply to increase the power supply voltage if the workload change is that the load decreases.
  • the embodiments of the present disclosure also provide a chip, which includes at least one of the following:
  • At least one embodiment of the present disclosure also provides an electronic device including the above-mentioned chip.
  • Figure 1 is a schematic diagram of the influence of the chip's power supply voltage on energy efficiency and delay
  • Figure 2 is a schematic diagram of the jitter of the load voltage
  • FIG. 3 is a schematic diagram of a power regulation system provided by at least one embodiment of the present disclosure.
  • FIG. 4 is another schematic diagram of a power regulation system provided by at least one embodiment of the present disclosure.
  • FIG. 5 is still another schematic diagram of the power regulation system provided by at least one embodiment of the present disclosure.
  • Fig. 6 is a schematic diagram of waveforms corresponding to at least one embodiment of the present disclosure.
  • FIG. 7 is another schematic diagram of the power regulation system provided by at least one embodiment of the present disclosure.
  • FIG. 8 is a flowchart of a power adjustment method provided by at least one embodiment of the present disclosure.
  • FIG. 9 is another flowchart of a power adjustment method provided by at least one embodiment of the present disclosure.
  • FIG. 10 is a block diagram of a power adjustment device provided by at least one embodiment of the present disclosure.
  • FIG. 11 is a schematic block diagram of a chip provided by at least one embodiment of the present disclosure.
  • FIG. 12 is a schematic block diagram of a chip provided by at least one embodiment of the present disclosure.
  • FIG. 13 is a schematic block diagram of an electronic device provided by at least one embodiment of the present disclosure.
  • the lowest energy consumption point of the chip under the advanced technology is generally in the sub-threshold region of the voltage, and the highest energy efficiency is generally in the near-threshold region of the voltage.
  • Figure 1 the schematic diagram of the impact of the power supply voltage of the chip on energy efficiency and delay is shown.
  • the delay of the chip circuit continues to increase, and when it reaches the near-threshold area and sub-threshold area, it decreases exponentially, while the energy efficiency shows a change of first increase and then decrease.
  • the near-threshold area The energy efficiency is the best, and the near-threshold area can be considered as a low-voltage area; in order to take into account energy efficiency and performance requirements at the same time, wide-voltage range circuits have been widely used, and wide-voltage-range circuits can cover sub-threshold areas, near-threshold areas to normal voltage areas , Can switch in a wide voltage range to meet the high performance or high energy efficiency requirements under different load conditions.
  • DVFS uses a mechanism called open-loop regulation, which determines the optimal voltage for different target applications and operating frequencies of the chip.
  • open-loop regulation determines the optimal voltage for different target applications and operating frequencies of the chip.
  • an over-reserved timing margin was given at the beginning of the design of DVFS. This excessive Timing margin design means a lot of waste of power consumption. Because the power consumption of the CPU is proportional to the square of the voltage rise (if leakage is considered, it is closer to the cubic) relationship, and the increase of the voltage value will significantly increase the power consumption. Cause the power consumption of the chip to rise.
  • the AVFS technology uses a closed-loop system that manages the voltage through the hardware mechanism on the chip, and then adjusts and matches the voltage, which can remove unnecessary protective voltage ranges while ensuring the normal operation of the chip. To eliminate the aforementioned waste of power consumption;
  • AVFS technology can add a PVT monitoring circuit to the chip.
  • the operating frequency or operating voltage of the chip can be adjusted to adjust the operating voltage to the minimum voltage that maintains the preset operating frequency, or to maintain the preset operating frequency.
  • the change of the chip's working state will affect the load change.
  • the load may increase.
  • the stability of the power supply voltage at the load needs to be ensured to meet the power supply demand of the load. Therefore, how to ensure the stability of the power supply voltage at the load end when the load increases has become an urgent problem to be solved by those skilled in the art.
  • At least one embodiment of the present disclosure provides a new type of power regulation solution, so that the chip can still work normally in a larger load voltage jitter range, thereby improving the robustness of the chip; optionally, the power regulation provided by the embodiment of the present disclosure
  • the system is not limited to being compatible with AVFS, and can also be compatible with other technologies, such as being compatible with DVFS.
  • the power regulation system provided by the embodiments of the present disclosure can also operate independently.
  • At least one embodiment of the present disclosure provides a power regulation system, which includes: a power source, a power storage circuit, and a control circuit;
  • the power supply includes a first power output terminal, and the first power output terminal is configured to output a power supply voltage
  • the power storage circuit includes a second power output terminal, and the second power output terminal is configured to output the power stored in the power storage circuit;
  • the first power output terminal of the power supply and the second power output terminal of the power storage circuit are electrically connected to the load during use, and the control circuit is connected to the power supply and the load during use;
  • the control circuit is configured to obtain the workload change of the load, and when the workload change is that the load increases, the control power supply reduces the power supply voltage so that the power storage circuit outputs power to supply power to the load.
  • FIG. 3 shows a schematic diagram of the power regulation system provided by at least one embodiment of the present disclosure.
  • the power regulation system may be compatible with AVFS and provide AVFS Effective supplement; referring to Figure 3, the power regulation system may include:
  • Power supply 1 can be managed by a PMU (Power Management Unit, power management unit) and supply power to the load;
  • PMU Power Management Unit, power management unit
  • Power storage circuit 2 can be a circuit element that stores power, such as an energy storage circuit in the cap, an example can be a capacitor;
  • Load 3 optionally, load 3 such as a chip;
  • the first circuit element 4 is the first circuit element 4.
  • Control circuit 6 The control circuit 6 can be connected to the power supply 1 and the load 3, used to obtain the workload change of the load 3, and to control and adjust the power supply voltage of the power supply 1.
  • the power supply 1 is an example of the above-mentioned power supply
  • the power storage circuit 2 is an example of the above-mentioned circuit storage circuit
  • the control circuit 6 is an example of the above-mentioned control circuit.
  • the first circuit element 4 can be connected to the power output terminal 7 of the power supply 1, and the second circuit element 5 can be connected to the first circuit element 4 and to the load 3; Yes, the first end of the first circuit element 4 can be connected to the power output end 7 of the power supply 1, the second end can be connected to the first end of the second circuit element 5, and the second end of the second circuit element 5 can be connected to the load 3. ;
  • the power output terminal 8 of the power storage circuit 2 can be connected between the first circuit element 4 and the second circuit element 5; specifically, the power output terminal 8 of the power storage circuit 2 can be connected to the second terminal of the first circuit element 4 , And the first end of the second circuit element 5.
  • the power output terminal 7 of the power supply 1 is an example of the above-mentioned first power output terminal
  • the power output terminal 8 of the power storage circuit 2 is an example of the above-mentioned second power output terminal.
  • the first circuit element 4 may be a single circuit element or a circuit element group composed of multiple circuit elements.
  • the first circuit element 4 may be an inductor;
  • the second circuit element 5 may be A single circuit element may also be a circuit element group composed of multiple circuit elements.
  • the second circuit element 5 may be an inductor.
  • the power supply 1 and the power storage circuit 2 can supply power to the load 3; the control circuit 6 can obtain the workload change of the load 3, and control the power supply 1 to adjust the power supply according to the workload change of the load 3 Voltage;
  • At least one embodiment of the present disclosure may use the control circuit 6 Obtain the workload change of load 3.
  • the control circuit 6 can control the power supply 1 to reduce the power supply voltage, so that the power storage circuit 2 can output additional power to supply power to the load 3 to achieve the load 3 Voltage compensation;
  • the load increase can include the situation where the load current is higher than the predetermined standard load current;
  • control circuit 6 may control the power supply 1 to increase the power supply voltage; optionally, the load reduction may include a situation where the load current is lower than a predetermined standard load current.
  • reducing the power supply voltage can be based on a predetermined standard power supply voltage to reduce the power supply voltage, such as reducing the power supply voltage to be lower than the standard power supply voltage; when the load is reduced, increasing the power supply voltage can be Raise the power supply voltage based on the standard power supply voltage, such as raising the power supply voltage to be higher than the standard power supply voltage.
  • the embodiments of the present disclosure can reduce the power supply voltage of the power supply when the load is increased, so that the power storage circuit can output additional power to supply power to the load in time; when the load is reduced, the power supply voltage of the power supply can be increased to meet the demand of the load. Electricity demand and make the electric quantity storage circuit reserve electric quantity; thus, the embodiments of the present disclosure can realize the adaptive adjustment of the power supply voltage according to the change of the work load, ensure the stability of the power supply voltage at the load end, and increase the jitter range of the load voltage that the load end can handle , Improved robustness.
  • the load can be, for example, a chip, and the AVFS detection circuit in the load can detect the workload change of the load, so that the control circuit can obtain the workload change from the AVFS detection circuit; in an example, as shown in the figure 4 shows:
  • the load 3 may include an AVFS detection circuit 31.
  • the AVFS detection circuit 31 may be a circuit part of AVFS for detecting changes in workload;
  • the control circuit 6 may include an AVFS interactive interface 61, which is compatible with AVFS and thus is compatible with AVFS
  • the detection circuit 31 interacts to obtain the workload change detected by the AVFS detection circuit 31, so that the control circuit can obtain the workload change; in at least one embodiment of the present disclosure, the control circuit can rely on the AVFS function to obtain the workload change, that is
  • the AVFS detection circuit realizes the detection of the workload change, and the control circuit realizes the acquisition of the workload change by setting the AVFS interactive interface that interacts with the AVFS detection circuit.
  • the load may be, for example, a chip, and the load may be provided with a load detection circuit independent of AVFS. That is, in at least one embodiment of the present disclosure, the detection of workload changes does not rely on AVFS, but is independent of AVFS.
  • the set load detection circuit realizes the detection of the workload change, so that the control circuit can obtain the workload change from the load detection circuit; in an example, as shown in Figure 5:
  • the load 3 may include a load detection circuit 32, and the load detection circuit 32 may be a circuit for detecting changes in workload independent of AVFS; the control circuit 6 may include a load detection interactive interface 62, which may be connected to the load detection circuit 32 Interactively, the change of the workload detected by the load detection circuit 32 is obtained, so that the control circuit can obtain the change of the workload.
  • the load working frequency when the load current becomes larger, the load working frequency will increase with a high probability. Therefore, in at least one embodiment of the present disclosure, the load working frequency may be used to reflect the change of the working load.
  • the load current can be measured at multiple load operating frequencies, so as to analyze the first load operating frequency range when the load current is higher than the standard load current (the first load operating frequency range may not be Continuous frequency range, for example, may be a combination of multiple intermittent frequency ranges), and analyze the second load operating frequency range when the load current is lower than the standard load current (the second load operating frequency range may not be a continuous frequency
  • the range for example, may be a combination of multiple intermittent frequency ranges).
  • the first load operating frequency range may be higher than the second load operating frequency range.
  • control circuit is further configured to:
  • control circuit can determine the change of the workload by obtaining the operating frequency of the load.
  • the load working frequency is detected by the AVFS detection circuit, and the control circuit interacts with the AVFS detection circuit through the AVFS interactive interface to obtain the load working frequency.
  • the load working frequency can be detected by a load detection circuit independent of AVFS, and the control circuit The load detection interactive interface interacts with the load detection circuit to obtain the load working frequency; when the load working frequency is within the first load working frequency range, the load is determined to increase, so that the power supply can be controlled to reduce the power supply voltage; when the load working frequency is at Within the second load working frequency range, it is determined that the load is reduced, so that the power supply can be controlled to increase the power supply voltage.
  • control circuit is further configured to:
  • the load working frequency When the load working frequency is in the first load working frequency range, it is determined that the change of the working load is the load increase, wherein the first load working frequency range is the load working frequency range when the load current is higher than the predetermined standard load current;
  • a power supply voltage reduction signal is output to the power supply so that the power supply voltage is reduced to be lower than a predetermined standard power supply voltage.
  • the control circuit is further configured to:
  • the load working frequency When the load working frequency is in the second load working frequency range, it is determined that the change in the working load is load reduction, where the second load working frequency range is the load working frequency range when the load current is lower than the standard load current;
  • the adjustment relationship between the workload change (such as the load operating frequency) and the power supply voltage can be analyzed and determined according to the actual load conditions, and the embodiments of the present disclosure are not limited to this; for example, the embodiments of the present disclosure may be based on the actual conditions of the load. Analyze and determine the numerical relationship between the load increase and the reduced power supply voltage, and the numerical relationship between the load reduction and the increased power supply voltage.
  • the power storage circuit can complete the load power supply in the high operating frequency range, that is, the high operating frequency range required by the load power supply can be completed by the power storage circuit, and the high operating frequency range can be considered as the load operating frequency is in the first load operation.
  • Frequency range In the high operating frequency range where the power storage circuit completes the load power supply demand, the power supply can increase the power supply voltage when the load power supply demand is in the low operating frequency range. The low operating frequency range can be considered as the load operating frequency in the second load operating frequency range Repeating this way can realize the adaptive adjustment of the power supply voltage under different working load changes. While ensuring the stability of the power supply voltage at the load end, the embodiments of the present disclosure can increase the jitter range of the load voltage that the load end can handle, Thereby improving the robustness.
  • FIG. 6 shows a schematic diagram of waveforms corresponding to at least one embodiment of the present disclosure. It can be seen that when the load increases (indicated by the load current being higher than the standard load current), the power supply voltage decreases (below the standard power supply voltage), The power storage circuit outputs additional power to compensate for the load voltage drop; when the load is reduced (indicated by the load current being lower than the standard load current), the power supply voltage is increased (higher than the standard power supply voltage); repeat this, and it can be changed in different workloads
  • the adaptive adjustment of the power supply voltage at the load end is realized, the stability of the power supply voltage at the load end is ensured, and the embodiments of the present disclosure increase the jitter range of the load voltage that the load end can handle (for example, compared to AVFS, the embodiments of the present disclosure It can deal with lower load voltage jitter), which improves robustness.
  • FIG. 7 shows another schematic diagram of the power regulation system provided by at least one embodiment of the present disclosure.
  • the power storage is
  • the circuit 2 may be a capacitor
  • the first circuit element 4 and the second circuit element 5 may be an inductor.
  • the power regulation system provided by the embodiments of the present disclosure can ensure the stability of the power supply voltage at the load end under different workload changes, and enable the embodiments of the present disclosure to increase the jitter range of the load voltage that the load end can handle, thereby improving robustness. Sex.
  • the power regulation method of at least one embodiment of the present disclosure may be executed by the control circuit in the power regulation system provided above.
  • the control circuit may execute the power regulation method of at least one embodiment of the present disclosure in the function mode of the chip. ;
  • the content of the power adjustment method described below can be cross-referenced with the content described above.
  • FIG. 8 shows a flowchart of a power adjustment method provided by at least one embodiment of the present disclosure.
  • the method may include:
  • Step S10 Obtain the workload change situation of the load.
  • step S10 may include: obtaining the load working frequency of the load.
  • the AVFS detection circuit detects the workload change, and the control circuit interacts with the AVFS detection circuit to obtain the workload change; in another optional implementation, the load detection is independent of AVFS The circuit detects the change of the work load, and the control circuit interacts with the load detection circuit to obtain the change of the work load.
  • the workload change situation may include load increase and load decrease, and whether the load increases or decreases can be adjusted by the change of the chip working state.
  • the load working frequency may reflect the workload change.
  • Step S11 If the workload change is that the load increases, output a power supply voltage reduction signal to the power supply to reduce the power supply voltage.
  • the load increase may include that the load working frequency is in the first load working frequency range, where the first load working frequency range is the load working frequency range when the load current is higher than a predetermined standard load current.
  • the embodiments of the present disclosure can maintain the output of the power supply voltage reduction signal to the power supply, so that the power supply reduces the power supply voltage (for example, lower than the standard power supply voltage).
  • the power storage circuit shown in FIG. 3 can output additional power, which is Load power supply.
  • step S11 may include:
  • the load working frequency When the load working frequency is in the first load working frequency range, it is determined that the change of the working load is the load increase, where the first load working frequency range is the load working frequency range when the load current is higher than the predetermined standard load current;
  • a power supply voltage reduction signal is output to the power supply so that the power supply voltage is reduced to be lower than a predetermined standard power supply voltage.
  • Step S12 If the workload change is that the load decreases, output a power supply voltage increase signal to the power supply to increase the power supply voltage.
  • the load reduction may include that the load working frequency is in a second load working frequency range, where the second load working frequency range is a load working frequency range when the load current is less than a predetermined standard load current.
  • the embodiments of the present disclosure can maintain the output of the power supply voltage increase signal to the power supply, so that the power supply increases the power supply voltage (for example, higher than the standard power supply voltage).
  • step S12 may include:
  • the load working frequency When the load working frequency is in the second load working frequency range, it is determined that the change in the working load is load reduction, where the second load working frequency range is the load working frequency range when the load current is lower than the standard load current;
  • FIG. 9 shows another flowchart of a power adjustment method provided by at least one embodiment of the present disclosure.
  • the method may include:
  • Step S20 Obtain the operating frequency of the load. Step S20 may be included in step S10 described above.
  • Step S21 If the load working frequency is in the first load working frequency range, output a power supply voltage reduction signal to the power supply to reduce the power supply voltage. Step S21 may be included in step S11 described above.
  • Step S22 If the load working frequency is in the second load working frequency range, output a power supply voltage increase signal to the power supply to increase the power supply voltage. Step S22 may be included in step S12 described above.
  • the power adjustment method provided by at least one embodiment of the present disclosure can reduce the power supply voltage in the high operating frequency range of the load power supply demand, and the power storage circuit outputs additional power to supply power to the load; and in the low operating frequency range of the load power supply demand ,
  • the power supply voltage can be increased, and the power storage circuit of the power storage circuit can be realized when the load is powered;
  • the power supply adjustment method provided by the implementation of the present disclosure can achieve the power supply voltage in the high and low operating frequency range of the load power supply requirement
  • the adaptive adjustment ensures the stability of the power supply voltage at the load end, and enables the embodiments of the present disclosure to increase the jitter range of the load voltage that the load end can handle, thereby improving robustness.
  • At least one embodiment of the present disclosure further provides a power adjustment device, which can be considered as a functional module required by the aforementioned control circuit to implement the power adjustment method provided by at least one embodiment of the present disclosure.
  • the content of the power adjusting device described below may be based on the power adjusting system described above, and may correspond to the content described above with reference to each other.
  • FIG. 10 is a block diagram of a power supply adjusting device provided by at least one embodiment of the present disclosure.
  • the power supply adjusting device may include:
  • the obtaining circuit 100 is configured to obtain the workload change status of the load end
  • the first control circuit 200 is configured to output a power supply voltage reduction signal to the power supply if the workload change is that the load increases, so as to reduce the power supply voltage and cause the power storage circuit to output additional power to supply power to the load;
  • the second control circuit 300 is configured to output a power supply voltage increase signal to the power supply to increase the power supply voltage if the workload change is that the load decreases.
  • the acquiring circuit 100 when acquiring the workload change of the load, is further configured to:
  • the first control circuit 200 is also configured as:
  • the load working frequency When the load working frequency is in the first load working frequency range, it is determined that the change of the working load is the load increase, wherein the first load working frequency range is the load working frequency range when the load current is higher than the predetermined standard load current;
  • a power supply voltage reduction signal is output to the power supply, so that the power supply voltage is reduced to be lower than a predetermined standard power supply voltage.
  • the second control circuit 300 is also configured as:
  • the change of the working load is load reduction, where the second load working frequency range is the load working frequency range when the load current is lower than the standard load current;
  • At least one embodiment of the present disclosure also provides a chip, which may be, for example, an SoC (system on chip) chip, and the chip may include any of the above-mentioned power regulation systems.
  • the chip 1100 may include a power regulation system 1110, and the power regulation system 1110 may be any of the above-mentioned power regulation systems.
  • the power regulation system 1110 may be any one of the power regulation systems shown in FIG. 3, FIG. 4, FIG. 5, and FIG. 7.
  • At least one embodiment of the present disclosure further provides a chip, which may be, for example, an SoC (system on chip) chip, and the chip may include any of the above-mentioned power regulation devices.
  • the chip 1200 may include a power regulating device 1210, and the power regulating device 1210 may be any of the above-mentioned power regulating devices.
  • the power regulating device 1210 may be a power regulating device as shown in FIG. 10.
  • the chip provided by at least one embodiment of the present disclosure may include the combination of the above-mentioned power regulation system and the power regulation device, which is not limited in the embodiment of the present disclosure.
  • the above-mentioned power regulation device can be used as a control circuit in the above-mentioned power regulation system.
  • the aforementioned chip may adopt any suitable architecture, such as X86, ARM, RiSC-V, MIPS, etc., which are not limited in the embodiments of the present disclosure.
  • At least one embodiment of the present disclosure also provides an electronic device, which may include the aforementioned chip.
  • the electronic device 1300 may include a chip 1310, and the chip 1310 may be any of the above-mentioned chips.
  • the chip 1310 may be the chip 1110 shown in FIG. 11, the chip 1200 shown in FIG. 12, or a combination thereof.
  • the electronic device 1300 may be a terminal device or a server device.
  • the electronic device may be a workstation, cluster, rack server, blade server, personal computer, notebook computer, tablet computer, mobile phone, personal digital assistant (PDA), smart glasses, smart watch, smart ring, Smart helmets, etc., the embodiments of the present disclosure do not limit this.
  • PDA personal digital assistant

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Abstract

一种电源调节系统、方法、装置、芯片及电子设备。该系统包括：电源、电量存储电路和控制电路；其中，所述电源包括第一电量输出端，所述第一电量输出端配置为输出电源电压；所述电量存储电路包括第二电量输出端，所述第二电量输出端配置为输出存储在所述电量存储电路的电量；所述电源的所述第一电量输出端和所述电量储存电路的所述第二电量输出端在使用中电连接至负载，所述控制电路在使用中连接至所述电源与所述负载；以及所述控制电路配置为获取所述负载的工作负载变化情况，在所述工作负载变化情况为负载增大时，控制所述电源降低所述电源电压，以使得所述电量存储电路输出电量为所述负载供电。根据本公开实施例的电源调节系统可保障负载端电源电压稳定性，并提升负载端能够应对的负载电压的抖动范围，提升鲁棒性。

Description

电源调节系统、方法、装置、芯片及电子设备 技术领域
本公开实施例涉及一种电源调节系统、方法、装置、芯片及电子设备。
背景技术
电源是为负载供电的器件，负载端电源电压不稳定，将导致芯片工作异常，因此负载端电源电压的稳定性极为重要，在芯片设计时需要特别关注负载端电源电压的稳定性。
发明内容
本公开至少一个实施例提供了一种电源调节系统，其包括：电源、电量存储电路和控制电路；
其中，所述电源包括第一电量输出端，所述第一电量输出端配置为输出电源电压；
所述电量存储电路包括第二电量输出端，所述第二电量输出端配置为输出存储在所述电量存储电路的电量；
所述电源的所述第一电量输出端和所述电量储存电路的所述第二电量输出端在使用中电连接至负载，所述控制电路在使用中连接至所述电源与所述负载；以及
所述控制电路配置为获取所述负载的工作负载变化情况，在所述工作负载变化情况为负载增大时，控制所述电源降低所述电源电压，以使得所述电量存储电路输出电量为所述负载供电。
在至少一个实施例中，所述控制电路还配置为在所述工作负载变化情况为负载减小时，控制所述电源提升电源电压。
在至少一个实施例中，所述控制电路还配置为：
获取所述负载的负载工作频率；以及
基于所述负载工作频率确定所述负载的所述工作负载变化情况。
在至少一个实施例中，所述控制电路还配置为：
在所述负载工作频率处于第一负载工作频率范围时，确定出所述工作负载变化情况为负载增大，其中，所述第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
响应于确定出所述工作负载变化情况为所述负载增大，向所述电源输出电源电压降低信号，以使得所述电源电压降低至低于预定的标准电源电压。
在至少一个实施例中，所述控制电路还配置为：
在所述负载工作频率处于第二负载工作频率范围时，确定出所述工作负载变化情况为负载减小，其中，所述第二负载工作频率范围为所述负载电流低于所述标准负载电流时的负载工作频率范围；以及
响应于确定出所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以使得所述电源电压提升至高于所述标准电源电压。
在至少一个实施例中，所述负载包括检测所述工作负载变化情况的自适应电压与频率调节检测电路；
所述控制电路包括：能够与所述自适应电压与频率调节检测电路交互的自适应电压与频率调节交互接口，其中，所述自适应电压与频率调节交互接口通过所述自适应电压与频率调节检测电路获取所述工作负载变化情况。
在至少一个实施例中，所述负载包括与自适应电压与频率调节电路相独立的负载检测电路；
所述控制电路包括：能够与所述负载检测电路交互的负载检测交互接口，其中，所述负载检测交互接口通过所述负载检测电路获取所述工作负载变化情况。
在至少一个实施例中，该电源调节系统还包括第一电路元件和第二电路元件，
其中，所述第一电路元件的第一端连接于所述电源的所述第一电量输出端，所述第一电路元件的第二端与所述第二电路元件的第一端连接并与所述电量存储电路的所述第二电量输出端连接，所述第二电路元件的第二端在使用中连接所述负载。
在至少一个实施例中，所述电量存储电路为电容，所述第一电路元件和所述第二电路元件为电感。
本公开实施例还提供一种电源调节方法，适用于权利要求1-9任一项所述的电源调节系统，所述电源调节方法包括：
获取所述负载的工作负载变化情况；
如果所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，以降低所述电源电压并使得所述电量存储电路输出电量为所述负载供电；以及
如果所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以提升所述电源电压。
在至少一个实施例中，所述获取负载的工作负载变化情况，包括：
获取负载工作频率。
在至少一个实施例中，所述如果所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，包括：
在所述负载工作频率处于第一负载工作频率范围时，确定出所述工作负载变化情况为负载增大，其中，所述第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
响应于确定出所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，以使得所述电源电压降低至低于预定的标准电源电压。
在至少一个实施例中，所述如果所述工作负载变化情况为负载减小，向电源输出电源电压提升信号，以提升电源电压，包括：
在所述负载工作频率处于第二负载工作频率范围时，确定出所述工作负载变化情况为负载减小，其中，所述第二负载工作频率范围为所述负载电流低于所述标准负载电流时的负载工作频率范围；以及
响应于确定出所述工作负载变化情况为负载减小，向所述电源输出所述电源电压提升信号，以使得所述电源电压提升至高于所述标准电源电压。
本公开至少一个实施例还提供一种电源调节装置，其包括：
获取电路，配置为获取负载的工作负载变化情况；
第一控制电路，配置为如果所述工作负载变化情况为负载增大，向电源输出电源电压降低信号，以降低电源电压，并使得电量存储电路输出电量为 负载供电；以及
第二控制电路，配置为如果所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以提升所述电源电压。
本公开实施例还提供一种芯片，包括以下中至少之一：
任一上述的电源调节系统；以及
任一上述的电源调节装置。
本公开至少一个实施例还提供一种电子设备，包括上述的芯片。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为芯片的电源电压对能效和延时的影响示意图；
图2为负载电压的抖动示意图；
图3为本公开至少一个实施例提供的电源调节系统的示意图；
图4为本公开至少一个实施例提供的电源调节系统的另一示意图；
图5为本公开至少一个实施例提供的电源调节系统的再一示意图；
图6为本公开至少一个实施例对应的波形示意图；
图7为本公开至少一个实施例提供的电源调节系统的又一示意图；
图8为本公开至少一个实施例提供的电源调节方法的流程图；
图9为本公开至少一个实施例提供的电源调节方法的另一流程图；
图10为本公开至少一个实施例提供的电源调节装置的框图；
图11为本公开至少一个实施例提供的芯片的示意性框图；
图12为本公开至少一个实施例提供的芯片的示意性框图；
图13为本公开至少一个实施例提供的电子设备的示意性框图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实 施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
随着芯片先进制造工艺步入纳米时代，芯片(特别是SoC芯片)的功能越来越强大，芯片的高性能和低功耗成为芯片设计的两个目标，然而，单纯追求低功耗可能会导致性能与设计的偏差，因此能效成为芯片设计的主要目标之一；能效是指芯片每次操作所需电量的倒数，即每瓦特电量能够完成的操作数。
通过研究发现，先进工艺下芯片的最低能耗点一般处于电压的亚阈值区，而最高能效一般处于电压的近阈值区，如图1所示芯片的电源电压对能效和延时的影响示意图，电源电压从常压区下降到近阈值区时，芯片电路的延时持续增加，至近阈值区和亚阈值区时又呈指数下降，而能效则呈现先增后减的变化，其中，近阈值区的能效最好，近阈值区可以认为是低电压区；为了能够同时兼顾能效和性能需求，宽电压范围电路得到了广泛应用，宽电压范围电路能够覆盖亚阈值区、近阈值区至常压区，可以在宽电压范围内进行切换，以满足在不同负载条件下的高性能或高能效需求。
然而，由于芯片工艺尺寸的不断缩小，引发了PVT(Process，Voltage，Temperature)偏差问题，导致芯片设计时需要预留时序余量以满足最坏情况下的时序约束，然而这些时序余量的引入，导致芯片电路的工作电压或频率过于保守，甚至抵消了宽电压范围电路的使用所带来的能效收益；为克服PVT偏差中的电压偏差，特别是芯片使用过程中的电压偏差，目前可以使用DVFS(Dynamic Voltage and Frequency scaling，动态电源和频率调节)技术，和AVFS(Adaptive Voltage and Frequency Scaling，自适应电压与频率调节)技术。
DVFS使用的是被称为开环调节的机制，通过为芯片不同的目标应用和工作频率确定最佳电压，然而DVFS的设计之初就给出了过量预留的时序余量，这种过量的时序余量设计意味着大量的功耗浪费，由于CPU功耗与电压上升的平方成正比(如果考虑到漏电，则更接近三次方)关系，电压值的提升，将明显的增大功耗，导致芯片的功耗上升。
而AVFS技术使用的则是闭环系统，通过芯片上的硬件机制对电压进行管理，然后再对电压进行调节和匹配，可以在保障芯片功能正常工作的情况 下，去除不必要的保护性的电压范围来消除前面提到的功耗浪费；
例如，AVFS技术可以在芯片中加入PVT监测电路，当PVT偏差较大时，可以通过调整芯片的工作频率或者工作电压，以将工作电压调整到维持预设工作频率的最小电压，或者在维持预设电压下调整工作频率，从而克服电源电压过低情况下的电压偏差问题；即AVFS技术旨在通过自适应的调节芯片的工作电压和工作频率，以克服电源电压过低情况下的电压偏差问题。
可见，使用AVFS技术相比于DVFS技术具有更好的效果，然而，本公开的发明人进一步发现，在AVFS技术的使用中存在如下问题：在芯片工作状态变化时，存在负载增大的情况，此时需要增大负载的电源电流供给，以满足负载的用电需求，然而，目前AVFS能够应对的负载电压的抖动范围仍然有限，因此，亟需提供一种新型方案来提升鲁棒性；示例的，图2示出了负载电压的抖动示意图，可进行参照，其中，负载增大由负载电流高于标准负载电流表示，此时存在负载电压下降抖动。
此外，芯片工作状态的变化将影响负载变化，目前当芯片工作状态变化时，存在负载增大的情况，此时需要保证负载端电源电压的稳定性，以满足负载的供电需求。因此如何在负载增大时，保障负载端电源电压的稳定性，成为了本领域技术人员亟需解决的问题。
本公开至少一个实施例提供一种新型电源调节方案，使得芯片在较大的负载电压的抖动范围仍能正常工作，从而提升芯片的鲁棒性；可选的，本公开实施例提供的电源调节系统并不局限于兼容AVFS，还可以兼容其他技术，例如兼容DVFS，当然本公开实施例提供的电源调节系统也可独立运作。
本公开至少一个实施例提供了一种电源调节系统，其包括：电源、电量存储电路和控制电路；
其中，电源包括第一电量输出端，第一电量输出端配置为输出电源电压；
电量存储电路包括第二电量输出端，第二电量输出端配置为输出存储在电量存储电路的电量；
电源的第一电量输出端和电量储存电路的第二电量输出端在使用中电连接至负载，控制电路在使用中连接至电源与负载；以及
控制电路配置为获取负载的工作负载变化情况，在工作负载变化情况为负载增大时，控制电源降低电源电压，以使得电量存储电路输出电量为负载 供电。
作为本公开至少一个实施例公开内容的一种可选实现，图3示出了本公开至少一个实施例提供的电源调节系统的示意图，可选的，该电源调节系统可以兼容AVFS，为AVFS提供有效补充；参照图3，该电源调节系统可以包括：
电源1；可选的，电源1可由PMU(Power Management Unit，电源管理单元)管理，并为负载供电；
电量存储电路2；电量存储电路2可以是存储电量的电路元件，例如帽内能量存储电路，一种示例可以如电容；
负载3；可选的，负载3例如芯片；
第一电路元件4；
第二电路元件5；
控制电路6；控制电路6可连接电源1与负载3，用于获取负载3的工作负载变化情况，及控制调整电源1的电源电压。
电源1为上述的电源的示例，电量存储电路2为上述的电路存储电路的示例，以及控制电路6为上述的控制电路的示例。
可选的，在本公开至少一个实施例中，第一电路元件4可连接于电源1的电量输出端7，第二电路元件5可与第一电路元件4连接，并与负载3连接；具体的，第一电路元件4的第一端可连接于电源1的电量输出端7，第二端可与第二电路元件5的第一端连接，第二电路元件5的第二端连接负载3；
电量存储电路2的电量输出端8可连接于第一电路元件4和第二电路元件5之间；具体的，电量存储电路2的电量输出端8可连接于第一电路元件4的第二端，和第二电路元件5的第一端之间。
电源1的电量输出端7为上述的第一电量输出端的示例，以及电量存储电路2的电量输出端8为上述的第二电量输出端的示例。
可选的，第一电路元件4可以是单一电路元件，也可能是多个电路元件组成的电路元件组，在一种示例中，第一电路元件4可以是电感；第二电路元件5可以是单一电路元件，也可能是多个电路元件组成的电路元件组，在一种示例中，第二电路元件5可以是电感。
在本公开至少一个实施例中，电源1与电量存储电路2可以为负载3供电；控制电路6可获取负载3的工作负载变化情况，并根据负载3的工作负载变化情况，控制电源1调整电源电压；
在一种可选实现中，为保障电源电压的稳定性，并使得本公开实施例能够应对的负载电压的抖动范围更大，进而提升鲁棒性；本公开至少一个实施例可通过控制电路6获取负载3的工作负载变化情况，当工作负载变化情况为负载增大时，控制电路6可控制电源1降低电源电压，从而电量存储电路2可输出额外电量，为负载3供电，实现对负载3的电压补偿；可选的，负载增大可包括负载电流高于预定的标准负载电流的情况；
可选的，更进一步的，当工作负载变化情况指示负载减小时，控制电路6可控制电源1提升电源电压；可选的，负载减小可包括负载电流低于预定的标准负载电流的情况。
可选的，在负载增大时，降低电源电压可以是以预定的标准电源电压为基准来降低电源电压，如将电源电压降低至低于标准电源电压；在负载减小时，提升电源电压可以是以标准电源电压为基准来提升电源电压，如将电源电压提升至高于标准电源电压。
可见，本公开实施例可在负载增大时，降低电源的电源电压，从而使得电量存储电路输出额外的电量，及时为负载供电；在负载减小时，可提升电源的电源电压，满足负载的用电需求并使得电量存储电路储备电量；从而本公开实施例可根据工作负载变化情况，实现电源电压的自适应调节，保障负载端电源电压稳定性，并提升负载端能够应对的负载电压的抖动范围，提升了鲁棒性。
作为一种可选实现，负载可以例如芯片，负载内的AVFS检测电路可以实现检测负载的工作负载变化情况，从而控制电路可从AVFS检测电路获取工作负载变化情况；在一种示例中，如图4所示：
负载3可以包括AVFS检测电路31，AVFS检测电路31可以是AVFS中用于检测工作负载变化情况的电路部分；控制电路6可以包括AVFS交互接口61，AVFS交互接口可与AVFS相兼容，从而与AVFS检测电路31相交互，获取AVFS检测电路31检测的工作负载变化情况，实现控制电路获取工作负载变化情况；在本公开至少一个实施例中，控制电路可依赖于AVFS 功能获取工作负载变化情况，即由AVFS检测电路实现检测工作负载变化情况，控制电路通过设置与AVFS检测电路相交互的AVFS交互接口，实现获取工作负载变化情况。
在另一种可选实现中，负载可以例如芯片，负载可以设置与AVFS相独立的负载检测电路，即在本公开至少一个实施例中工作负载变化情况的检测不依赖于AVFS，而是由独立设置的负载检测电路实现检测工作负载变化情况，从而控制电路可从负载检测电路获取工作负载变化情况；在一种示例中，如图5所示：
负载3可以包括负载检测电路32，负载检测电路32可以是独立于AVFS的检测工作负载变化情况的电路；控制电路6可以包括负载检测交互接口62，负载检测交互接口62可与负载检测电路32相交互，获取负载检测电路32检测的工作负载变化情况，实现控制电路获取工作负载变化情况。
可选的，作为更进一步的实现，负载电流变大，负载工作频率极大概率会提升，因此在本公开至少一个实施例中可通过负载工作频率反映工作负载变化情况。
例如，在本公开至少一个实施例中，可在多个负载工作频率下测量负载电流，从而分析出负载电流高于标准负载电流时的第一负载工作频率范围(第一负载工作频率范围可能不是连续的频率范围，例如，可能是多个断续的频率范围的组合)，以及分析出负载电流低于标准负载电流时的第二负载工作频率范围(第二负载工作频率范围可能不是连续的频率范围，例如，可能是多个断续的频率范围的组合)，可选的，第一负载工作频率范围可高于第二负载工作频率范围。
例如，在至少一个实施例中，控制电路还配置为：
获取负载的负载工作频率；以及
基于负载工作频率确定负载的工作负载变化情况。
进而，控制电路可通过获取负载工作频率确定工作负载变化情况。负载工作频率例如由AVFS检测电路检测，并且控制电路通过AVFS交互接口与AVFS检测电路相交互，实现获取负载工作频率，又如，负载工作频率可由与AVFS相独立的负载检测电路检测，并且控制电路通过负载检测交互接口与负载检测电路相交互，实现获取负载工作频率；当负载工作频率处于第一 负载工作频率范围内，则确定负载增大，从而可控制电源降低电源电压；当负载工作频率处于第二负载工作频率范围内，则确定负载减小，从而可控制电源提升电源电压。
例如，在至少一个实施例中，控制电路还配置为：
在负载工作频率处于第一负载工作频率范围时，确定出工作负载变化情况为负载增大，其中，第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为负载增大，向电源输出电源电压降低信号，以使得电源电压降低至低于预定的标准电源电压。例如，在至少一个实施例中，控制电路还配置为：
在负载工作频率处于第二负载工作频率范围时，确定出工作负载变化情况为负载减小，其中，第二负载工作频率范围为负载电流低于标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为负载减小，向电源输出电源电压提升信号，以使得电源电压提升至高于标准电源电压。
可选的，工作负载变化情况(如负载工作频率)与电源电压的调整关系可根据负载实际情况分析确定，本公开实施例并不局限于此；例如，本公开实施例可根据负载实际情况，分析确定负载增大情况与降低的电源电压的数值关系，以及负载减小情况与提升的电源电压的数值关系。
可见，本公开实施例可由电量存储电路完成高工作频率范围的负载供电，即负载供电需求的高工作频率范围可以由电量存储电路完成，高工作频率范围可以认为是负载工作频率处于第一负载工作频率范围；在电量存储电路完成负载供电需求的高工作频率范围，负载供电需求处于低工作频率范围时，电源可提升电源电压，低工作频率范围可以认为是负载工作频率处于第二负载工作频率范围；如此重复，可以在不同的工作负载变化情况下，实现电源电压的自适应调节，在保障负载端电源电压稳定性的同时，本公开实施例可提升负载端能够应对的负载电压的抖动范围，从而提升了鲁棒性。
示例的，图6示出了本公开至少一个实施例对应的波形示意图，可以看出，负载增大时(由负载电流高于标准负载电流表示)，电源电压降低(低于标准电源电压)，电量存储电路输出额外的电量，补偿负载电压下降；负 载减小时(由负载电流低于标准负载电流表示)，电源电压提升(高于标准电源电压)；以此重复，可以在不同的工作负载变化情况下，实现负载端电源电压的自适应调节，保障负载端电源电压稳定性，并使得本公开实施例提升负载端能够应对的负载电压的抖动范围(例如，相比于AVFS，本公开实施例能够应对更低的负载电压抖动)，提升了鲁棒性。
在一种可选示例中，图7示出了本公开至少一个实施例提供的电源调节系统的又一示意图，结合图3和图7所示，在图7所示电源调节系统中，电量存储电路2可以是电容，第一电路元件4和第二电路元件5可以是电感。
本公开实施例提供的电源调节系统，可以在不同的工作负载变化情况下，保障负载端电源电压稳定性，并使得本公开实施例提升负载端能够应对的负载电压的抖动范围，提升了鲁棒性。
可选的，本公开至少一个实施例的电源调节方法可由上述提供的电源调节系统中的控制电路执行，具体可在芯片的功能模式下，由控制电路执行本公开至少一个实施例的电源调节方法；下文描述的电源调节方法的内容，可与上文描述内容相互对应参照。
作为一种可选实现，图8示出了本公开至少一个实施例提供的电源调节方法的流程图，参照图8，该方法可以包括：
步骤S10、获取负载的工作负载变化情况。
在至少一个实施例中，步骤S10可包括：获取负载的负载工作频率。
在一种可选实现中，AVFS检测电路检测工作负载变化情况，控制电路通过与AVFS检测电路相交互，实现获取工作负载变化情况；在另一种可选实现中，与AVFS相独立的负载检测电路检测工作负载变化情况，控制电路通过与负载检测电路相交互，实现获取工作负载变化情况。
可选的，工作负载变化情况可以包括负载增大和负载减小，负载增大还是减小可由芯片工作状态的变化调整。
可选的，在本公开至少一个实施例中，可由负载工作频率反映工作负载变化情况。
步骤S11、如果工作负载变化情况为负载增大，向电源输出电源电压降低信号，以降低电源电压。
可选的，负载增大可包括负载工作频率处于第一负载工作频率范围，其 中，第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围。在负载增大时，本公开实施例可维持向电源输出电源电压降低信号，使得电源降低电源电压(如低于标准电源电压)，此时图3所示的电量存储电路可输出额外电量，为负载供电。
在至少一个实施例中，步骤S11可包括：
在负载工作频率处于第一负载工作频率范围时，确定出工作负载变化情况为负载增大，其中，第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为负载增大，向电源输出电源电压降低信号，以使得电源电压降低至低于预定的标准电源电压。
步骤S12、如果工作负载变化情况为负载减小，向电源输出电源电压提升信号，以提升电源电压。可选的，负载减小可包括负载工作频率处于第二负载工作频率范围，其中，第二负载工作频率范围为负载电流小于预定的标准负载电流时的负载工作频率范围。在负载减小时，本公开实施例可维持向电源输出电源电压提升信号，使得电源提升电源电压(如高于标准电源电压)。
在至少一个实施例中，步骤S12可包括：
在负载工作频率处于第二负载工作频率范围时，确定出工作负载变化情况为负载减小，其中，第二负载工作频率范围为负载电流低于标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为负载减小，向电源输出电源电压提升信号，以使得电源电压提升至高于标准电源电压。
作为图8方法的一种可选实现，图9示出了本公开至少一个实施例提供的电源调节方法的另一流程图，参照图9，该方法可以包括：
步骤S20、获取负载工作频率。步骤S20可包括在上述的步骤S10中。
步骤S21、如果负载工作频率处于第一负载工作频率范围，向电源输出电源电压降低信号，以降低电源电压。步骤S21可包括在上述的步骤S11中。
步骤S22、如果负载工作频率处于第二负载工作频率范围，向电源输出电源电压提升信号，以提升电源电压。步骤S22可包括在上述的步骤S12中。
本公开至少一个实施例提供的电源调节方法，可在负载供电需求的高工作频率范围，降低电源电压，由电量存储电路输出额外的电量为负载进行供 电；而在负载供电需求的低工作频率范围，可提升电源电压，在为负载供电的情况下实现电量存储电路的电量储备；通过本公开实施提供的电源调节方法，可在负载供电需求的高工作频率范围和低工作频率范围实现电源电压的自适应调节，保障负载端电源电压的稳定性，并使得本公开实施例提升负载端能够应对的负载电压的抖动范围，提升了鲁棒性。
上文描述了本公开实施例提供的多个实施例方案，各实施例方案介绍的各可选方式可在不冲突的情况下相互结合、交叉引用，从而延伸出多种可能的实施例方案，这些均可认为是本公开实施例披露、公开的实施例方案。
本公开至少一个实施例还提供一种电源调节装置，该电源调节装置可以认为是上述所述的控制电路为实现本公开至少一个实施例提供的电源调节方法所需设置的功能模块。下文描述的电源调节装置的内容可基于上文描述的电源调节系统，并可与上文描述内容相互对应参照。
图10为本公开至少一个实施例提供的电源调节装置的框图，参照图10，该电源调节装置可以包括：
获取电路100，配置为获取负载端的工作负载变化情况；
第一控制电路200，配置为如果工作负载变化情况为负载增大，向电源输出电源电压降低信号，以降低电源电压并使得电量存储电路输出额外电量为负载供电；以及
第二控制电路300，配置为如果工作负载变化情况为负载减小，向电源输出电源电压提升信号，以提升电源电压。
可选的，在获取负载的工作负载变化情况时，获取电路100还配置为：
获取负载的负载工作频率。
例如，第一控制电路200还配置为：
在负载工作频率处于第一负载工作频率范围时，确定出工作负载变化情况为负载增大，其中，第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为所述负载增大，向电源输出电源电压降低信号，以使得电源电压降低至低于预定的标准电源电压。
例如，第二控制电路300还配置为：
在负载工作频率处于第二负载工作频率范围时，确定出工作负载变 化情况为负载减小，其中，第二负载工作频率范围为负载电流低于标准负载电流时的负载工作频率范围；以及
响应于确定出工作负载变化情况为负载减小，向电源输出电源电压提升信号，以使得电源电压提升至高于标准电源电压。
本公开至少一个实施例还提供一种芯片，该芯片可以例如SoC(片上系统)芯片，该芯片可以包括任一上述的电源调节系统。如图11所示，根据本公开至少一个实施例的芯片1100可包括电源调节系统1110，该电源调节系统1110可以是任一上述的电源调节系统。例如，电源调节系统1110可以是如图3、图4、图5和图7所示的电源调节系统中的任一个。
本公开至少一个实施例还提供一种芯片，该芯片可以例如SoC(片上系统)芯片，该芯片可以包括任一上述的电源调节装置。如图12所示，根据本公开至少一个实施例的芯片1200可包括电源调节装置1210，该电源调节装置1210可以是任一上述的电源调节装置。例如，电源调节装置1210可以是如图10所示的电源调节装置。
此外，应理解，本公开的至少一个实施例提供的芯片可包括上述的电源调节系统和电源调节装置的组合，本公开的实施例对此不作限制。例如，上述的电源调节装置可被用作上述的电源调节系统中的控制电路。
上述的芯片例如可以采用任何合适的架构，如X86、ARM、RiSC-V和MIPS等，本公开的实施例对此不作限制。
本公开至少一个实施例还提供一种电子设备，该电子设备可以包括上述所述的芯片。如图13所示，根据本公开至少一个实施例的电子设备1300可包括芯片1310，该芯片1310可以是任一上述的芯片。例如，芯片1310可以是如图11所示的芯片1110、如图12所示的芯片1200或其组合。
电子设备1300可以是终端设备，也可以是服务器设备。例如，该电子设备可以是工作站、集群、机架服务器、刀片式服务器、个人电脑、笔记本电脑、平板电脑、手机、个人数码助理(personal digital assistance，PDA)、智能眼镜、智能手表、智能指环、智能头盔等，本公开的实施例对此不作限制。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (19)

  1. 一种电源调节系统，包括：电源、电量存储电路和控制电路；
    其中，所述电源包括第一电量输出端，所述第一电量输出端配置为输出电源电压；
    所述电量存储电路包括第二电量输出端，所述第二电量输出端配置为输出存储在所述电量存储电路的电量；
    所述电源的所述第一电量输出端和所述电量储存电路的所述第二电量输出端在使用中电连接至负载，所述控制电路在使用中连接至所述电源与所述负载；以及
    所述控制电路配置为获取所述负载的工作负载变化情况，在所述工作负载变化情况为负载增大时，控制所述电源降低所述电源电压，以使得所述电量存储电路输出电量为所述负载供电。
  2. 根据权利要求1所述的电源调节系统，其中，所述控制电路还配置为在所述工作负载变化情况为负载减小时，控制所述电源提升电源电压。
  3. 根据权利要求2所述的电源调节系统，其中，
    所述控制电路还配置为：
    获取所述负载的负载工作频率；以及
    基于所述负载工作频率确定所述负载的所述工作负载变化情况。
  4. 根据权利要求3所述的电源调节系统，其中，
    所述控制电路还配置为：
    在所述负载工作频率处于第一负载工作频率范围时，确定出所述工作负载变化情况为负载增大，其中，所述第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为所述负载增大，向所述电源输出电源电压降低信号，以使得所述电源电压降低至低于预定的标准电源电压。
  5. 根据权利要求4所述的电源调节系统，其中，
    所述控制电路还配置为：
    在所述负载工作频率处于第二负载工作频率范围时，确定出所述工 作负载变化情况为负载减小，其中，所述第二负载工作频率范围为所述负载电流低于所述标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以使得所述电源电压提升至高于所述标准电源电压。
  6. 根据权利要求1-5任一项所述的电源调节系统，其中，
    所述负载包括检测所述工作负载变化情况的自适应电压与频率调节检测电路；
    所述控制电路包括：能够与所述自适应电压与频率调节检测电路交互的自适应电压与频率调节交互接口，其中，所述自适应电压与频率调节交互接口通过所述自适应电压与频率调节检测电路获取所述工作负载变化情况。
  7. 根据权利要求1-5任一项所述的电源调节系统，其中，
    所述负载包括与自适应电压与频率调节电路相独立的负载检测电路；
    所述控制电路包括：能够与所述负载检测电路交互的负载检测交互接口，其中，所述负载检测交互接口通过所述负载检测电路获取所述工作负载变化情况。
  8. 根据权利要求1-5任一项所述的电源调节系统，还包括第一电路元件和第二电路元件，
    其中，所述第一电路元件的第一端连接于所述电源的所述第一电量输出端，所述第一电路元件的第二端与所述第二电路元件的第一端连接并与所述电量存储电路的所述第二电量输出端连接，所述第二电路元件的第二端在使用中连接所述负载。
  9. 根据权利要求1-5任一项所述的电源调节系统，其中，所述电量存储电路为电容，所述第一电路元件和所述第二电路元件为电感。
  10. 一种电源调节方法，适用于权利要求1-9任一项所述的电源调节系统，所述电源调节方法包括：
    获取所述负载的工作负载变化情况；
    如果所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，以降低所述电源电压并使得所述电量存储电路输出电量为所述负载供电；以及
    如果所述工作负载变化情况为负载减小，向所述电源输出电源电压提升 信号，以提升所述电源电压。
  11. 根据权利要求10所述的电源调节方法，其中，
    所述获取所述负载的所述工作负载变化情况，包括：
    获取所述负载的负载工作频率。
  12. 根据权利要求11所述的电源调节方法，其中，
    所述如果所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，包括：
    在所述负载工作频率处于第一负载工作频率范围时，确定出所述工作负载变化情况为负载增大，其中，所述第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为负载增大，向所述电源输出电源电压降低信号，以使得所述电源电压降低至低于预定的标准电源电压。
  13. 根据权利要求11或12所述的电源调节方法，其中，
    所述如果所述工作负载变化情况为负载减小，向电源输出电源电压提升信号，以提升电源电压，包括：
    在所述负载工作频率处于第二负载工作频率范围时，确定出所述工作负载变化情况为负载减小，其中，所述第二负载工作频率范围为所述负载电流低于所述标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为负载减小，向所述电源输出所述电源电压提升信号，以使得所述电源电压提升至高于所述标准电源电压。
  14. 一种电源调节装置，包括：
    获取电路，配置为获取负载的工作负载变化情况；
    第一控制电路，配置为如果所述工作负载变化情况为负载增大，向电源输出电源电压降低信号，以降低电源电压，并使得电量存储电路输出电量为负载供电；以及
    第二控制电路，配置为如果所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以提升所述电源电压。
  15. 根据权利要求14所述的电源调节装置，其中，在获取所述负载的所 述工作负载变化情况时，所述获取电路还配置为：
    获取所述负载的负载工作频率。
  16. 根据权利要求14所述的电源调节装置，其中，所述第一控制电路还配置为：
    在所述负载工作频率处于第一负载工作频率范围时，确定出所述工作负载变化情况为负载增大，其中，所述第一负载工作频率范围为负载电流高于预定的标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为所述负载增大，向所述电源输出电源电压降低信号，以使得所述电源电压降低至低于预定的标准电源电压。
  17. 根据权利要求15或16所述的电源调节装置，其中，
    所述第二控制电路还配置为：
    在所述负载工作频率处于第二负载工作频率范围时，确定出所述工作负载变化情况为负载减小，其中，所述第二负载工作频率范围为所述负载电流低于所述标准负载电流时的负载工作频率范围；以及
    响应于确定出所述工作负载变化情况为负载减小，向所述电源输出电源电压提升信号，以使得所述电源电压提升至高于所述标准电源电压。
  18. 一种芯片，包括以下中至少之一：
    权利要求1-9任一项所述的电源调节系统；以及
    权利要求14-17任一项所述的电源调节装置。
  19. 一种电子设备，包括权利要求18所述的芯片。
PCT/CN2019/129922 2019-12-30 2019-12-30 电源调节系统、方法、装置、芯片及电子设备 WO2021134216A1 (zh)

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