WO2021121050A1 - 确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法 - Google Patents

确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法 Download PDF

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WO2021121050A1
WO2021121050A1 PCT/CN2020/133625 CN2020133625W WO2021121050A1 WO 2021121050 A1 WO2021121050 A1 WO 2021121050A1 CN 2020133625 W CN2020133625 W CN 2020133625W WO 2021121050 A1 WO2021121050 A1 WO 2021121050A1
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tangent
length
point
tangent line
height curve
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PCT/CN2020/133625
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English (en)
French (fr)
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陈建铭
卢健平
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徐州鑫晶半导体科技有限公司
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Publication of WO2021121050A1 publication Critical patent/WO2021121050A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring

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  • the present application relates to the technical field of wafer manufacturing. Specifically, the present application relates to a method for determining the polished shape of the edge of a semiconductor wafer and a method for evaluating the edge shape of a semiconductor wafer.
  • the edge shape and defects of the fabricated wafer have an important impact on the high-end chip manufacturing process (node ⁇ 10nm).
  • M1 standard SEMI-standard M1
  • these shape parameters are important for high-end chip manufacturing processes. It is not enough, especially for the transition region or near edge region between the surface and the edge, there is no clear specification.
  • the edge removal area of the current advanced high-end chip process has been reduced to 1mm, so that the shape of the interface between the surface and the edge of the wafer and epitaxial wafer has an even more significant impact on the yield.
  • the surface of the wafer and the epitaxial wafer may refer to one or both of the upper surface and the lower surface.
  • Existing methods generally use destructive methods to evaluate the shape of the interface between the surface and the edge, such as cutting a sample to expose the shape of the interface, or using optical principles to continuously illuminate and measure the size and distribution of the edge angle. Complex and difficult to implement.
  • the current method of determining the polished shape of the edge of the semiconductor wafer and the method of evaluating the edge shape of the semiconductor wafer still need to be improved.
  • the inventor of the present application proposes a method for quantifying the geometric characteristics of the junction between the surface and the edge of a semiconductor wafer.
  • a laser microscopy system (such as Keyence's VK-X series) is used to accurately measure the height of the boundary area from the surface of the wafer to the edge curved surface, where the measurement range of the boundary area is 10 to 1000 microns And the accuracy of the measurement height can reach 1nm; on the basis of the obtained height curve, a number of geometric parameters of the boundary area between the surface and the edge of the semiconductor wafer are calculated, so that the wafer manufacturing can be monitored by these parameters, thereby improving the chip The yield of the manufacturing process.
  • this application proposes a method for determining the polished shape of the edge of a semiconductor wafer.
  • the method includes: (1) obtaining a height curve of the boundary area between the surface and the edge of the semiconductor wafer through a laser microscopy system; (2) obtaining the height curve of the height curve according to the height curve The first tangent line and the second tangent line, wherein the first tangent line passes through the first tangent point, and the second tangent line passes through the second tangent point; (3) Obtain the height curve and the second tangent point.
  • the measurement range of the junction area is 10-1000 Micron and the accuracy of measuring height is 1 nanometer.
  • the clamping edge symmetry L1/Lr, the clamping edge area At and the maximum vertical distance H between the line of the two tangent points and the height curve are calculated, thereby These parameters are used to monitor wafer manufacturing, thereby improving the yield of the chip manufacturing process.
  • step (2) the first tangent line is obtained by linear fitting multiple data points of the foremost segment of the height curve, and the second tangent line is It is obtained by linearly fitting multiple data points in the last segment of the height curve.
  • the first tangent line is obtained by linear fitting the first 10 to 500 data points of the foremost segment of the height curve
  • the second tangent line is obtained by linearly fitting the height curve
  • the last 10 to 500 data points of the last paragraph of the data points are obtained by linear fitting.
  • the first tangent point is the first point on the height curve where the difference from the first tangent line is equal to or greater than a threshold
  • the second tangent point is the height curve The first point where the difference between the upper and the second tangent is equal to or greater than the threshold
  • step (5) the coordinates (x 0 , y 0 ) of the intersection point are calculated according to the first tangent line and the second tangent line, and then the coordinates (x 0, y 0) of the intersection point are calculated according to the first tangent line.
  • the coordinates (x 1 , y 1 ) of the point and the coordinates (x 2 , y 2 ) of the second tangent point are calculated to calculate the first length L1 and the second length Lr, respectively.
  • the method further includes: (6) comparing the area At, the maximum vertical distance H, and the ratio L1/Lr of the first length to the second length to their respective control ranges. Make a comparison to determine how polished the edge is.
  • step (6) includes: (6-1) comparing the area At with a first control range, and if the area At is not within the first control range, determine all The degree of edge polishing is insufficient.
  • step (6) includes: (6-2) comparing the maximum vertical distance H with a second control range, and if the maximum vertical distance H is not within the second control range, It is determined that the degree of edge polishing is insufficient.
  • step (6) includes: (6-3) comparing the ratio L1/Lr of the first length to the second length with a third control range, if the first length and the second length The length ratio L1/Lr is not within the third control range, which determines that the degree of edge polishing is insufficient.
  • the material for forming the semiconductor wafer is silicon, silicon carbide, silicon on an insulating substrate, or germanium arsenide.
  • the present application proposes a method for evaluating the edge shape of a semiconductor wafer.
  • the method includes: (1) Obtaining a height curve of the boundary area between the surface and the edge of the semiconductor wafer through a laser microscopy system;
  • the first tangent is obtained by linear fitting of multiple data points in the foremost segment of the height curve
  • the second tangent is obtained by The multiple data points of the last segment of the height curve are obtained by linear fitting.
  • the first tangent line is obtained by linear fitting the first 10 to 500 data points of the foremost segment of the height curve
  • the second tangent line is obtained by linearly fitting the height curve
  • the last 10 to 500 data points of the last paragraph of the data points are obtained by linear fitting.
  • the first tangent point is the first point on the height curve where the difference from the first tangent line is equal to or greater than a threshold
  • the second tangent point is the height curve The first point where the difference between the upper and the second tangent is equal to or greater than the threshold
  • the coordinates (x 0 , y 0 ) of the intersection point are first calculated according to the first tangent line and the second tangent line, and then the coordinates (x 0, y 0) of the intersection point are calculated according to the first tangent line and the second tangent line.
  • the coordinates (x 1 , y 1 ) of the tangent point and the coordinates (x 2 , y 2 ) of the second tangent point are respectively calculated for the first length L1 and the second length Lr.
  • the threshold is 1000-5000 nm.
  • step (6) includes:
  • the area area At is compared with the first control range, and if the area At is not within the first control range, it is determined that the wafer edge processing degree is insufficient.
  • step (6) includes:
  • step (6) includes
  • FIG. 1 is a schematic flowchart of a method for determining a polished shape of a semiconductor wafer edge according to an embodiment of the present application
  • Figure 2 is a photo (a), a height test diagram (b) and a height curve (c) measured by the laser microscopy system of an embodiment of the present application;
  • FIG. 3 is a schematic diagram of the principle of a method for determining the polished shape of the edge of a semiconductor wafer according to an embodiment of the present application
  • Fig. 4 is a schematic diagram of height curves of three embodiments of the present application.
  • Fig. 5 is a schematic diagram of height curve analysis and processing according to an embodiment of the present application.
  • Fig. 6 is a schematic diagram of height curve analysis and processing according to another embodiment of the present application.
  • Fig. 7 is a schematic diagram of height curve analysis and processing according to another embodiment of the present application.
  • FIG. 8 is a comparison result of the clamping edge area At of the three embodiments of the present application.
  • FIG. 9 is a comparison result of the maximum vertical distance H between the two-point line and the height curve of the three embodiments of the present application.
  • Fig. 10 is a comparison result of the clamping edge symmetry L1/Lr of the three embodiments of the present application.
  • this application proposes a method for determining the polished shape of the edge of a semiconductor wafer.
  • the method includes:
  • the height curve of the junction between the surface and the edge of the semiconductor wafer can be obtained through the laser microscopy system.
  • first align the laser at the boundary area between the upper surface and the edge of the semiconductor wafer and the laser microscopy system can obtain the (a) The three-dimensional height information of the area shown in ), as shown in Figure 2(b), and then along the line AA' in Figure 2(a) to obtain the height curve C(x,y) shown in Figure 2(c), where x is the position of the measuring point, and y is the corresponding height at the measuring position.
  • the detection range of the laser microscopy system is 10 to 1000 microns, and the accuracy of measuring height can reach 1 nanometer, which is far more accurate than the height information obtained by other micron-level image detectors, so that the subsequent calculation of geometric parameters The accuracy is higher.
  • the material for forming the semiconductor wafer can be silicon, silicon carbide, silicon on insulating substrate (SOI) or germanium arsenide (GeAs).
  • SOI silicon on insulating substrate
  • GeAs germanium arsenide
  • step S100 the first tangent l 1 and the second tangent l 2 are further obtained, wherein, referring to FIG. 3, the first tangent l 1 passes through the first tangent.
  • the second tangent line l 2 passes through the second tangent point (x 2 , y 2 ).
  • the first tangent line l 1 of the height curve C(x, y) may be obtained by linear fitting multiple data points in the foremost segment of the height curve
  • the second tangent line l 2 can be obtained by linearly fitting multiple data points in the last segment of the height curve.
  • the linear equation is used for the calculation of subsequent geometric parameters.
  • the first 10 to 500 data points of the foremost segment of the height curve can be linearly fitted to obtain the first tangent line l 1
  • the last 10 to 500 data points of the last segment of the height curve can be performed.
  • the linear fitting obtains the second tangent line l 2 , so that the more data points, the higher the accuracy of the two tangent lines obtained by the linear fitting.
  • the difference between the first tangent l 1 and the second tangent l 2 obtained by linear fitting and the height curve C (x, y) is calculated separately, when the difference is equal to or greater than the threshold ,
  • the point corresponding to the difference is the tangent point of the corresponding tangent.
  • the threshold value is 1000nm ⁇ 5000nm.
  • the threshold value can be 2500nm.
  • S300 Obtain an area At defined by the height curve, the first tangent line, and the second tangent line.
  • the area defined by the height curve C(x, y), the first tangent l 1 and the second tangent l 2 is calculated
  • the area At is the area parameter of the clamping edge.
  • the area At can be calculated by mathematical software such as Matlab.
  • the first tangent point obtained in step S200 (x 1, y 1) and a second contact point (x 2, y 2), determining the first tangent point (x 1, y 1) and a second cut Point (x 2 , y 2 ) link l 3 , and calculate the maximum vertical distance H from the height curve C(x, y) to link l 3.
  • the maximum vertical distance H can be calculated by mathematical software such as Matlab.
  • Two geometric parameters namely, the area of the gripping area parameter At and the maximum vertical distance H, are used to jointly determine whether the shape of the above-mentioned height curve is gentle or steep.
  • S500 Obtain the ratio L1/Lr of the first length to the second length according to the intersection of the first tangent line and the second tangent line.
  • the ratio of the first length to the second length L1/Lr is obtained, where the first length L1 is the first length The distance between all points (x 1 , y 1 ) and the point of intersection (x 0 , y 0 ), the second length Lr is the difference between the second tangent point (x 2 , y 2 ) and the point of intersection (x 0 , y 0 ) The distance between.
  • the coordinates of the intersection point (x 0 , y 0 ) can be calculated based on the first tangent line and the second tangent line, and then the coordinates (x 1 , y 1 ) of the first tangent point and the second tangent line are calculated.
  • the coordinates (x 2 , y 2 ) of the points are calculated by calculating the first length L1 and the second length Lr, and then the symmetry parameter of the clamping edge can be obtained.
  • the clamping edge symmetry parameter L1/Lr can determine the clamping edge symmetry of the height curve. If the value of L1/Lr is closer to 1, it can be determined that the clamping edge symmetry of the height curve is higher.
  • the maximum vertical distance H, and the edge symmetry parameter L1/Lr when the above three geometric parameters are within their respective control ranges, it can be determined that the shape of the above height curve meets the requirements of the wafer preparation process. .
  • the method may further include:
  • S600 Compare the area At, the maximum vertical distance H, and the ratio of the first length to the second length L1/Lr with their respective control ranges to determine the degree of edge polishing.
  • control range specifically refers to the range from the lower control limit (LCL) to the upper control limit (UCL) obtained after statistical analysis of a large number of measured values.
  • the degree of edge polishing can be determined according to whether the above three parameters are in their respective control ranges. , So as to monitor whether the edge polishing process is appropriate.
  • step S600 may specifically include: S610 compares the area area At with the first control range. If the area area At is not within the first control range, it can be determined that the degree of edge polishing is not enough; S620 will be the maximum The vertical distance H is compared with the second control range. If the maximum vertical distance H is not within the second control range, it is determined that the degree of edge polishing is insufficient; S630 compares the ratio of the first length to the second length L1/Lr to the third control range The range is compared. If the ratio L1/Lr of the first length to the second length is not within the third control range, it is determined that the degree of edge polishing is insufficient. In this way, three steps are used to determine whether the three parameters meet the respective standards, and only when the three parameters meet the standards can it be judged that the edge polishing is in good condition.
  • the present application proposes a method that can quantify the geometric characteristics of the boundary area between the surface and the edge of a semiconductor wafer, and measure the height change of the boundary area through a laser microscopy system.
  • the measurement range is 10-1000 microns and the accuracy of the measurement height can reach 1 nanometer.
  • the clamping edge symmetry L1/Lr, the clamping edge area At, and the connection between the two tangent points and the height curve are calculated The maximum vertical distance H is used to monitor wafer manufacturing through these parameters, thereby improving the yield of the chip manufacturing process.
  • the edge polished shape of the under-polished semiconductor wafer is determined.
  • the height curve C1 (x, y) of this embodiment refers to FIG. 4.
  • Figure 5 for the schematic diagram of the specific data processing process.
  • the three parameters calculated in this embodiment are respectively that the area At is 342.18734 square microns, the maximum vertical distance H is 447 nanometers, and the ratio L1/Lr of the first length to the second length is 0.1.
  • the polished shape of the edge of the semiconductor wafer after normal polishing is determined.
  • the height curve C2 (x, y) of this embodiment refers to FIG. 4.
  • Figure 6 refers to Figure 6 for the schematic diagram of the specific data processing process.
  • the three parameters calculated in this embodiment are respectively: the area At is 7328.99304 square microns, the maximum vertical distance H is 7875 nanometers, and the ratio L1/Lr of the first length to the second length is 0.75.
  • the polished shape of the edge of the semiconductor wafer after the polishing process is adjusted is determined.
  • the height curve C3 (x, y) of this embodiment refers to FIG. 4.
  • Figure 7 for the schematic diagram of the specific data processing process.
  • the three parameters calculated in this embodiment are respectively that the area At is 8177.77945 square microns, the maximum vertical distance H is 7720 nanometers, and the ratio L1/Lr of the first length to the second length is 0.83.
  • the comparison result of the area At of the three embodiments can refer to Fig. 8
  • the comparison result of the maximum vertical distance H can refer to Fig. 9
  • the comparison result of the ratio of the first length to the second length L1/Lr can refer to Fig. 10. .
  • the wafer obtained after the edge polishing process is adjusted, such as epitaxy in the advanced high-end chip manufacturing process, to a certain extent, to avoid the occurrence of chipping, and to improve the yield of the wafer.
  • the area At, the maximum vertical distance H, and the ratio of the first length to the second length L1/Lr in the embodiment are respectively compared with their respective control ranges to evaluate the polishing degree of the edge of the semiconductor wafer.
  • the above three parameters in Example 1 are significantly lower than their respective control ranges. It is evaluated that the degree of edge polishing in Example 1 is insufficient; the above three parameters in Example 2 are all within their respective control ranges, and this embodiment can be evaluated.
  • the edge polishing degree of 2 is appropriate; the above three parameters of embodiment 3 are all within their respective control ranges, and the ratio of the first length to the second length L1/Lr is the highest. It is judged that the edge polishing shape of this embodiment 3 is suitable. And the clamping edge has the best symmetry.
  • the evaluation method of the present application can monitor the polishing degree of the edge of the semiconductor wafer in real time, adjust the edge processing technology in time, and avoid affecting the yield of subsequent chips.
  • it can be determined by the above three parameters, namely, the area At, the maximum vertical distance H, and the ratio of the first length to the second length L1/Lr.
  • these three parameters namely At, H, and L1/Lr, are compared with their respective control ranges, so as to evaluate the degree of grinding/thinning of the edge of the semiconductor wafer.
  • this application mainly obtains the height curve of the boundary between the upper surface of the wafer and the edge, and linearly fits the first and last data on the height curve to calculate the edge length (Lr, L1) of the boundary.
  • the clamping edge is symmetrical (L1/Lr), the clamping edge area (At) and the maximum vertical distance between the tangent point connection and the height curve (H), use these values to quantify the polished shape of the semiconductor wafer edge, and determine the above three values Evaluate whether the edge polishing of semiconductor wafers is appropriate within their respective control ranges, so as to realize real-time monitoring of the wafer manufacturing process, thereby improving the yield of the chip manufacturing process.
  • first and second are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include at least one of the features. In the description of the present application, "a plurality of" means at least two, such as two, three, etc., unless specifically defined otherwise.

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Abstract

提出了确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法，该方法包括：(1)通过激光显微系统，获得半导体晶圆的表面与边缘交界区的高度曲线；(2)根据所述高度曲线，获得所述高度曲线的第一切线和第二切线，其中，所述第一切线穿过所述第一切点，所述第二切线穿过所述第二切点；(3)获得所述高度曲线、所述第一切线和所述第二切线限定出的区域面积At；(4)根据所述第一切点与所述第二切点的连线，获得所述高度曲线到所述连线的最大垂直距离H；(5)根据所述第一切线与所述第二切线的交点，获得第一长度与第二长度之比L1/Lr。

Description

确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法 技术领域
本申请涉及晶圆制造技术领域，具体地，本申请涉及确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法。
背景技术
随着芯片制造工艺的快速发展到10nm/7nm/5nm时代，制作晶圆的边缘形状与缺陷，对高阶芯片制造工艺(节点≤10nm)的影响至关重要。而在国际半导体产业协会的M1标准(SEMI-standard M1)中，虽然定义出多种晶圆的边缘形状种类及平坦度的参数，但是，这些形状参数(例如曲率)对于高阶芯片制造工艺而言是不够的，特别是对于表面与边缘的交界区(transition region or near edge region)并无明确的规范。并且，现阶段的先进高阶芯片工艺的边缘去除区域已缩小至1mm，从而使得晶圆及外延片的表面与边缘的交界处的形状对于良率的影响越发显著。其中，晶圆片及外延片的表面可指其上表面和下表面中的一个或两个。现有的方法中一般采用破坏性方法来评估表面与边缘交界区的形状，如切开样品，暴露其交界处的形状，或利用光学原理不停的照射并测量边缘角度的大小及分布，较复杂且不易执行。
因此，目前确定半导体晶圆边缘抛光形状的方法和评估半导体晶圆边缘形状的方法仍有待改进。
申请内容
本申请是基于发明人的下列发现而完成的：
本申请的发明人提出一种方法，用于量化半导体晶圆的表面与边缘交界处的几何特征。具体地，利用激光显微系统(例如基恩士Keyence的VK-X系列)，对晶圆表面到边缘曲面交界区的高度进行精密地测量，其中，该交界区的测量范围为10～1000微米且测量高度的精确度可达到1nm；在所获得高度曲线的基础上，计算出半导体晶圆表面与边缘交界区的多个几何参数，从而藉由这些参数对晶圆制造进行监控，进而提高芯片制造工艺的良率。
在本申请的第一方面，本申请提出了一种确定半导体晶圆边缘抛光形状的方法。
根据本申请的实施例，所述方法包括：(1)通过激光显微系统，获得半导体晶圆的表面与边缘交界区的高度曲线；(2)根据所述高度曲线，获得所述高度曲线的第一切线和第二切线，其中，所述第一切线穿过所述第一切点，所述第二切线穿过所述第二切点；(3)获得所述高度曲线、所述第一切线和所述第二切线限定出的区域面积At；(4)根据所述第一切点与所述第二切点的连线，获得所述高度曲线到所述连线的最大垂直距离H；(5)根据所述第 一切线与所述第二切线的交点，获得第一长度与第二长度之比L1/Lr，其中，所述第一长度为所述第一切点与所述交点之间的距离，所述第二长度为所述第二切点与所述交点之间的距离。
发明人经过研究发现，采用本申请实施例的方法，可以量化半导体晶圆的表面与边缘交界处的几何特征，通过激光显微系统测量交界区的高度变化，该交界区测量范围为10～1000微米且测量高度的精确度为1纳米，在精密测量到的高度曲线基础上计算出夹边对称性L1/Lr、夹边面积At和两切点连线与高度曲线的最大垂直距离H，从而藉由这些参数对晶圆制造进行监控，进而提高芯片制造工艺的良率。
另外，根据本申请上述实施例的方法，还可以具有如下附加的技术特征：
根据本申请的实施例，在步骤(2)中，所述第一切线是通过对所述高度曲线的最前段的多个数据点进行线性拟合获得的，并且，所述第二切线是通过对所述高度曲线的最后段的多个数据点进行线性拟合获得的。
根据本申请的实施例，所述第一切线是通过对所述高度曲线的最前段的前10～500个数据点进行线性拟合获得的，所述第二切线是通过对所述高度曲线的最后段的后10～500个数据点进行线性拟合获得的。
根据本申请的实施例，所述第一切点为所述高度曲线上与所述第一切线的差值等于或大于阈值的第一个点，所述第二切点为所述高度曲线上与所述第二切线的差值等于或大于所述阈值的第一个点。
根据本申请的实施例，在步骤(5)中，先根据所述第一切线和所述第二切线计算出所述交点的坐标(x 0,y 0)，再根据所述第一切点的坐标(x 1,y 1)和所述第二切点的坐标(x 2,y 2)分别计算出所述第一长度L1和所述第二长度Lr。
根据本申请的实施例，所述方法进一步包括：(6)将所述区域面积At、所述最大垂直距离H和所述第一长度与第二长度之比L1/Lr分别与各自的管制范围进行比较，以确定所述边缘抛光的程度。
根据本申请的实施例，步骤(6)包括：(6-1)将所述区域面积At与第一管制范围进行比较，若所述区域面积At不在所述第一管制范围之内，确定所述边缘抛光的程度不足。
根据本申请的实施例，步骤(6)包括：(6-2)将所述最大垂直距离H与第二管制范围进行比较，若所述最大垂直距离H不在所述第二管制范围之内，确定所述边缘抛光的程度不足。
根据本申请的实施例，步骤(6)包括：(6-3)将所述第一长度与第二长度之比L1/Lr与第三管制范围进行比较，若所述第一长度与第二长度之比L1/Lr不在所述第三管制范围之内，确定所述边缘抛光的程度不足。
根据本申请的实施例，形成所述半导体晶圆的材料为硅、碳化硅、绝缘衬底上的硅或砷化锗。
本申请的另一方面，本申请提出了一种评估半导体晶圆边缘形状的方法。
根据实施例，所述方法包括：(1)通过激光显微系统，获得半导体晶圆的表面与边缘交界区的高度曲线；
(2)根据所述高度曲线，获得所述高度曲线的第一切线和第二切线，所述第一切线穿过第一切点，所述第二切线穿过第二切点；
(3)测量所述高度曲线、所述第一切线和所述第二切线限定处的区域面积At；
(4)根据所述第一切点与所述第二切点的连线，测量所述高度曲线到所述连线的最大垂直距离为H；
(5)根据所述第一切线与所述第二切线的交点，获得第一长度与第二长度之比L1/Lr，其中，所述第一长度与所述第一切点与所述交点之间的距离，所述第二长度为所述第二切点与所述交点之间的距离；
(6)将所述区域面积At、所述最大垂直距离H和所述第一长度与第二长度之比L1/Lr分别与各自的管制范围进行比较，以评估所述晶圆边缘形状是否符合要求。
根据本申请的实施例，所述步骤(2)中，所述第一切线是通过所述高度曲线的最前段的多个数据点进行线性拟合获得，并且，所述第二切线是通过所述高度曲线的最后段的多个数据点进行线性拟合获得。
根据本申请的实施例，所述第一切线是通过对所述高度曲线的最前段的前10～500个数据点进行线性拟合获得的，所述第二切线是通过对所述高度曲线的最后段的后10～500个数据点进行线性拟合获得的。
根据本申请的实施例，所述第一切点为所述高度曲线上与所述第一切线的差值等于或大于阈值的第一个点，所述第二切点为所述高度曲线上与所述第二切线的差值等于或大于所述阈值的第一个点。
根据本申请的实施例，所述步骤(5)中，先根据所述第一切线和所述第二切线计算出所述交点的坐标(x 0,y 0)，再根据所述第一切点的坐标(x 1,y 1)和所述第二切点的坐标(x 2,y 2)分别计算出所述第一长度L1和所述第二长度Lr。
根据本申请的实施例，所述阈值为1000-5000nm。
根据本申请的实施例，步骤(6)包括：
(6-1)将所述区域面积At与第一管制范围进行比较，若所述区域面积At不在所述第一管制范围之内，判定所述晶圆边缘处理程度不足。
根据本申请的实施例，步骤(6)包括：
(6-2)将所述最大垂直距离H与第二管制范围进行比较，若所述最大垂直距离H不在所述第二管制范围之内，判定所述晶圆边缘处理程度不足。
根据本申请的实施例，步骤(6)包括
(6-3)将所述第一长度与第二长度之比L1/Lr与第三管制范围进行比较，若所述第一长度与第二长度之比L1/Lr不在所述第三管制范围之内，判定所述晶圆边缘处理程度不足。
本申请的附加方面和优点将在下面的描述中部分给出，部分将从下面的描述中变得明显，或通过本申请的实践了解到。
附图说明
本申请的上述的方面结合下面附图对实施例的描述进行解释，其中：
图1是本申请一个实施例的确定半导体晶圆边缘抛光形状的方法流程示意图；
图2是本申请一个实施例的激光显微系统测量的照片(a)、高度测试图(b)和高度曲线(c)；
图3是本申请一个实施例的确定半导体晶圆边缘抛光形状的方法原理示意图；
图4是本申请三个实施例的高度曲线示意图；
图5是本申请一个实施例的高度曲线分析和处理示意图；
图6是本申请另一个实施例的高度曲线分析和处理示意图；
图7是本申请另一个实施例的高度曲线分析和处理示意图；
图8是本申请三个实施例的夹边面积At的对比结果；
图9是本申请三个实施例的两点连线与高度曲线的最大垂直距离H的对比结果；
图10是本申请三个实施例的夹边对称性L1/Lr的对比结果。
具体实施方式
下面详细描述本申请的实施例，本技术领域人员会理解，下面实施例旨在用于解释本申请，而不应视为对本申请的限制。除非特别说明，在下面实施例中没有明确描述具体技术或条件的，本领域技术人员可以按照本领域内的常用的技术或条件或按照产品说明书进行。
在本申请的一个方面，本申请提出了一种确定半导体晶圆边缘抛光形状的方法。根据本申请的实施例，参考图1，该方法包括：
S100：通过激光显微系统，获得半导体晶圆的表面与边缘交界处的高度曲线。
在该步骤中，通过激光显微系统，可获得半导体晶圆的表面与边缘交界处的高度曲线。具体例如采用基恩士(Keyence)的VK-X系列激光显微系统，参考图2，先将激光对准半 导体晶圆上表面与边缘的交界区，激光显微系统可获得图2的(a)所示区域的三维高度信息，如图2(b)所示，再沿着图2(a)中的AA’线获得图2(c)所示的高度曲线C(x,y)，其中x为测量点所处的位置，y为该测量位置处对应的高度。并且，激光显微系统的检测范围为10～1000微米，且测量高度的精确度可达到1纳米，远比其他微米级别的图像探测器获得的高度信息更精准，从而使后续计算出几何参数的准确性更高。
在本申请的一些实施例中，形成半导体晶圆的材料可以为硅、碳化硅、绝缘衬底上的硅(SOI)或砷化锗(GeAs)，如此，通过激光显微系统，可以精准地获得该种类材料的半导体晶圆表面与边缘交界区域的高度曲线。
S200：根据高度曲线，获得高度曲线的第一切线和第二切线。
在该步骤中，根据步骤S100精准的高度曲线C(x,y)，进一步获得第一切线l 1和第二切线l 2，其中，参考图3，第一切线l 1穿过第一切点(x 1,y 1)，第二切线l 2穿过第二切点(x 2,y 2)。
在本申请的一些实施例中，高度曲线C(x,y)的第一切线l 1可以是通过对该高度曲线最前段的多个数据点进行线性拟合获得的，并且，第二切线l 2可以是通过对该高度曲线最后段的多个数据点进行线性拟合获得的，如此，通过对高度曲线C(x,y)的部分数据进行线性拟合处理，即可获得两个切线的线性方程，从而用于后续几何参数的计算。在一些具体示例中，可以对该高度曲线最前段的前10～500个数据点进行线性拟合获得第一切线l 1，且可以对该高度曲线最后段的后10～500个数据点进行线性拟合获得第二切线l 2，如此，数据点个数越多则线性拟合出的两条切线的准确性越高。
在本申请的一些实施例中，将线性拟合获得的第一切线l 1和第二切线l 2分别与高度曲线C(x，y)进行差值计算，当差值等于或大于阈值时，该差值对应的点为相应切线的切点。具体例如阈值为1000nm～5000nm，具体例如阈值可以为2500nm，第一切线l 1与高度曲线C(x,y)的差值等于或大于2500nm时的第一个点为第一切线的切点(x 1,y 1)，同理，第二切线l2与高度曲线C(x,y)的差值等于或大于2500nm时的第一个点为第二切线的切点(x 2,y 2)。
S300：获得高度曲线、第一切线和第二切线限定出的区域面积At。
在该步骤中，根据步骤S200获得的第一切线l 1和第二切线l 2，计算出高度曲线C(x,y)、第一切线l 1和第二切线l 2限定出的区域面积At，即夹边面积参数。根据本申请的实施例，可以通过例如Matlab等数学软件计算出区域面积At。
S400：根据第一切点与第二切点的连线，获得实际高度曲线到连线的最大垂直距离H。
在该步骤中，根据步骤S200获得的第一切点(x 1,y 1)和第二切点(x 2,y 2)，确定第一切点(x 1,y 1)与第二切点(x 2,y 2)的连线l 3，并计算出高度曲线C(x,y)到连线l 3的最大垂直距离H。根据本申请的实施例，可以通过例如Matlab等数学软件计算出最大垂直距离H。
采用夹边面积参数At、最大垂直距离H的二个几何参数，来共同判定上述高度曲线的 形状是平缓的还是陡峭的。
S500：根据第一切线与第二切线的交点，获得第一长度与第二长度之比L1/Lr。
在该步骤中，根据第一切线l 1与第二切线l 2的交点(x 0,y 0)，获得第一长度与第二长度之比L1/Lr，其中，第一长度L1为第一切点(x 1,y 1)与交点(x 0,y 0)之间的距离，第二长度Lr为第二切点(x 2,y 2)与交点(x 0,y 0)之间的距离。具体地，参考图3，可以先根据第一切线和第二切线计算出交点的坐标(x 0,y 0)，再根据第一切点的坐标(x 1,y 1)和第二切点的坐标(x 2,y 2)分别计算出第一长度L1和第二长度Lr，即可获得夹边对称性参数。上述夹边对称性参数L1/Lr，可判定上述高度曲线的夹边对称性，若L1/Lr值越靠近1，可判定上述高度曲线的夹边对称性的程度越高。
总之，对于区域面积At、最大垂直距离H、夹边对称性参数L1/Lr，当上述三个几何参数都在各自的管制范围内，才可判定上述高度曲线的形状符合晶圆制备工艺的要求。
在本申请的一些实施例中，该方法还可以包括：
S600：将区域面积At、最大垂直距离H和第一长度与第二长度之比L1/Lr分别与各自的管制范围进行比较，以确定边缘抛光的程度。
在该步骤中，将步骤300、400和500获得的区域面积At、最大垂直距离H和第一长度与第二长度之比L1/Lr，分别与各自的管制范围进行比较，以确定边缘抛光的程度。如此，在抛光工序之后进行上述的方法进行测试，可以即时监控抛光工序是否合适，当上述三种参数中的任一个超出管制范围则必须对边缘加工工序进行调整。需要说明的是，“管制范围”具体是指对大量的测量值进行统计分析后获得的管制下限值LCL(lower control limit)到管制上限值UCL(up control limit)之间的范围。
在本申请的一些实施例中，对于区域面积At、最大垂直距离H和第一长度与第二长度之比L1/Lr，可根据上述三个参数是否都处于各自的管制范围来确定边缘抛光程度，从而监控边缘抛光工序是否适当。
在一些具体示例中，步骤S600可以具体包括：S610将区域面积At与第一管制范围进行比较，若区域面积At不在第一管制范围之内，则可以确定边缘抛光的程度还不足；S620将最大垂直距离H与第二管制范围进行比较，若最大垂直距离H不在第二管制范围之内，确定边缘抛光的程度还不足；S630将第一长度与第二长度之比L1/Lr与第三管制范围进行比较，若第一长度与第二长度之比L1/Lr不在第三管制范围之内，确定边缘抛光的程度还不足。如此，采用三步分别判断三个参数是否各自达标，实现三个参数都达标时才可判断边缘抛光状态良好。
综上所述，根据本申请的实施例，本申请提出了一种方法，可以量化半导体晶圆的表面与边缘交界区的几何特征，通过激光显微系统测量交界区的高度变化，该交界区测量范 围为10～1000微米且测量高度的精确度可达到1纳米，在精密测量到的高度曲线基础上计算出夹边对称性L1/Lr、夹边面积At和两切点连线与高度曲线的最大垂直距离H，从而通过这些参数对晶圆制造进行监控，进而提高芯片制造工艺的良率。
下面参考具体实施例，对本申请进行描述，需要说明的是，这些实施例仅是描述性的，而不以任何方式限制本申请。
实施例1
在该实施例中，对抛光不足的半导体晶圆的边缘抛光形状进行确定。具体地，该实施例的高度曲线C1(x，y)参考图4。具体的数据处理过程原理图，参考图5。
该实施例计算出的三个参数分别为，区域面积At为342.18734平方微米，最大垂直距离H为447纳米，且第一长度与第二长度之比L1/Lr为0.1。
实施例2
在该实施例中，对正常抛光后的半导体晶圆的边缘抛光形状进行确定。具体地，该实施例的高度曲线C2(x，y)参考图4。具体的数据处理过程原理图，参考图6。
该实施例计算出的三个参数分别为，区域面积At为7328.99304平方微米，最大垂直距离H为7875纳米，且第一长度与第二长度之比L1/Lr为0.75。
实施例3
在该实施例中，对抛光工艺调整后的半导体晶圆的边缘抛光形状进行确定。具体地，该实施例的高度曲线C3(x,y)参考图4。具体的数据处理过程原理图，参考图7。
该实施例计算出的三个参数分别为，区域面积At为8177.77945平方微米，最大垂直距离H为7720纳米，且第一长度与第二长度之比L1/Lr为0.83。
总结
综合对比实施例1～3的三个参数，区域面积At、最大垂直距离H和第一长度与第二长度之比L1/Lr。
其中，三个实施例的区域面积At的对比结果可参考图8，最大垂直距离H的对比结果可参考图9，而第一长度与第二长度之比L1/Lr的对比结果可参考图10。对比可以看出，实施例1的区域面积At、最大垂直距离H和第一长度与第二长度之比L1/Lr都比各自的管制范围明显偏低，说明边缘抛光程度不足；实施例2的上述三个参数都在各自的管制范围内，说明边缘抛光程度合适；而实施例3不仅上述三个参数都在各自的管制范围之内，也说明边缘抛光程度合适，且第一长度与第二长度之比L1/Lr最高，还说明夹边对称性最好。采用本申请方法对半导体晶圆进行边缘抛光工艺调整，调整边缘抛光工艺后获得晶圆在先进高阶芯片制造工艺中如外延，在一定程度上避免破片的发生，提高了晶圆的良率。
同样，实施例中的区域面积At，最大垂直距离H和第一长度与第二长度之比L1/Lr， 分别与各自的管制范围相比较，以评定半导体晶圆边缘抛光程度。实施例1中上述三个参数分别与各自的管制范围明显偏低，评定该实施例1的边缘抛光程度不足；实施例2的上述三个参数都在各自的管制范围内，可评定该实施例2的边缘抛光程度合适；实施例3的上述三个参数都在各自的管制范围之内，且第一长度与第二长度之比L1/Lr最高，评定该实施例3的边缘抛光形状合适，且夹边对称性最好。本申请的评定方法可即时地监控半导体晶圆边缘抛光程度，及时地调整边缘加工工艺，避免对后续芯片的良率产生影响。同理，只要涉及到评定半导体晶圆边缘处理程度，都可通过上述三个参数即区域面积At，最大垂直距离H和第一长度与第二长度之比L1/Lr来判定。如在研磨/减薄工序中，这三个参数即At、H、L1/Lr分别与各自的管制范围相比较，以此可评定半导体晶圆边缘研磨/减薄的程度。
综上所述，本申请主要通过获取晶圆上表面与边缘交界区的高度曲线，对高度曲线上最前段及最后段数据进行线性拟合，计算出交界区夹边长度(Lr,L1)，夹边对称(L1/Lr)，夹边面积(At)及切点连线与高度曲线的最大垂直距离(H)，藉由这些数值量化半导体晶圆边缘抛光形状，且通过判定上述三个数值是否在各自的管制范围内，评定半导体晶圆边缘抛光程度是否合适，实现对晶圆制造工艺进行即时监控，进而提高芯片制造工艺的良率。
在本申请的描述中，需要理解的是，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本申请的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本申请的限制，本领域的普通技术人员在本申请的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (20)

  1. 一种确定半导体晶圆边缘抛光形状的方法，包括：
    (1)通过激光显微系统，获得半导体晶圆的表面与边缘交界区的高度曲线；
    (2)根据所述高度曲线，获得所述高度曲线的第一切线和第二切线，其中，所述第一切线穿过第一切点，所述第二切线穿过第二切点；
    (3)获得所述高度曲线、所述第一切线和所述第二切线限定出的区域面积At；
    (4)根据所述第一切点与所述第二切点的连线，获得所述高度曲线到所述连线的最大垂直距离H；
    (5)根据所述第一切线与所述第二切线的交点，获得第一长度与第二长度之比L1/Lr，其中，所述第一长度为所述第一切点与所述交点之间的距离，所述第二长度为所述第二切点与所述交点之间的距离。
  2. 根据权利要求1所述的方法，在步骤(2)中，所述第一切线是通过对所述高度曲线的最前段的多个数据点进行线性拟合获得的，并且，所述第二切线是通过对所述高度曲线的最后段的多个数据点进行线性拟合获得的。
  3. 根据权利要求1或2所述的方法，所述第一切线是通过对所述高度曲线的最前段的前10～500个数据点进行线性拟合获得的，所述第二切线是通过对所述高度曲线的最后段的后10～500个数据点进行线性拟合获得的。
  4. 根据权利要求1-3任一项所述的方法，所述第一切点为所述高度曲线上与所述第一切线的差值等于或大于阈值的第一个点，所述第二切点为所述高度曲线上与所述第二切线的差值等于或大于所述阈值的第一个点。
  5. 根据权利要求4所述的方法，其特征在于，所述阈值为1000-5000nm。
  6. 根据权利要求1-5任一项所述的方法，在步骤(5)中，先根据所述第一切线和所述第二切线计算出所述交点的坐标(x 0,y 0)，再根据所述第一切点的坐标(x 1,y 1)和所述第二切点的坐标(x 2,y 2)分别计算出所述第一长度L1和所述第二长度Lr。
  7. 根据权利要求1-6任一项所述的方法，进一步包括：
    (6)将所述区域面积At、所述最大垂直距离H和所述第一长度与第二长度之比L1/Lr分别与各自的管制范围进行比较，以确定所述边缘抛光的程度。
  8. 根据权利要求7所述的方法，步骤(6)包括：
    (6-1)将所述区域面积At与第一管制范围进行比较，若所述区域面积At不在所述第一管制范围之内，确定所述边缘抛光的程度不足。
  9. 根据权利要求7所述的方法，步骤(6)包括：
    (6-2)将所述最大垂直距离H与第二管制范围进行比较，若所述最大垂直距离H不在 所述第二管制范围之内，确定所述边缘抛光的程度不足。
  10. 根据权利要求7所述的方法，步骤(6)包括：
    (6-3)将所述第一长度与第二长度之比L1/Lr与第三管制范围进行比较，若所述第一长度与第二长度之比L1/Lr不在所述第三管制范围之内，确定所述边缘抛光的程度不足。
  11. 根据权利要求1-10任一项所述的方法，形成所述半导体晶圆的材料为硅、碳化硅、绝缘衬底上的硅或砷化锗。
  12. 一种评估半导体晶圆边缘形状的方法，其特征在于，
    (1)通过激光显微系统，获得半导体晶圆的表面与边缘交界区的高度曲线；
    (2)根据所述高度曲线，获得所述高度曲线的第一切线和第二切线，所述第一切线穿过第一切点，所述第二切线穿过第二切点；
    (3)测量所述高度曲线、所述第一切线和所述第二切线限定处的区域面积At；
    (4)根据所述第一切点与所述第二切点的连线，测量所述高度曲线到所述连线的最大垂直距离为H；
    (5)根据所述第一切线与所述第二切线的交点，获得第一长度与第二长度之比L1/Lr，其中，所述第一长度与所述第一切点与所述交点之间的距离，所述第二长度为所述第二切点与所述交点之间的距离；
    (6)将所述区域面积At、所述最大垂直距离H和所述第一长度与第二长度之比L1/Lr分别与各自的管制范围进行比较，以评估所述晶圆边缘形状是否符合要求。
  13. 根据权利要求12所述的方法，其特征在于，所述步骤(2)中，所述第一切线是通过所述高度曲线的最前段的多个数据点进行线性拟合获得，并且，所述第二切线是通过所述高度曲线的最后段的多个数据点进行线性拟合获得。
  14. 根据权利要求13所述的方法，其特征在于，所述第一切线是通过对所述高度曲线的最前段的前10～500个数据点进行线性拟合获得的，所述第二切线是通过对所述高度曲线的最后段的后10～500个数据点进行线性拟合获得的。
  15. 根据权利要求14所述的方法，其特征在于，所述第一切点为所述高度曲线上与所述第一切线的差值等于或大于阈值的第一个点，所述第二切点为所述高度曲线上与所述第二切线的差值等于或大于所述阈值的第一个点。
  16. 根据权利要求15所述的方法，其特征在于，所述步骤(5)中，先根据所述第一切线和所述第二切线计算出所述交点的坐标(x 0,y 0)，再根据所述第一切点的坐标(x 1,y 1)和所述第二切点的坐标(x 2,y 2)分别计算出所述第一长度L1和所述第二长度Lr。
  17. 根据权利要求15所述的方法，其特征在于，所述阈值为1000-5000nm。
  18. 根据权利要求12所述的方法，其特征在于，步骤(6)包括：
    (6-1)将所述区域面积At与第一管制范围进行比较，若所述区域面积At不在所述第一管制范围之内，判定所述晶圆边缘处理程度不足。
  19. 根据权利要求18所述的方法，其特征在于，步骤(6)包括：
    (6-2)将所述最大垂直距离H与第二管制范围进行比较，若所述最大垂直距离H不在所述第二管制范围之内，判定所述晶圆边缘处理程度不足。
  20. 根据权利要求19所述的方法，其特征在于，步骤(6)包括
    (6-3)将所述第一长度与第二长度之比L1/Lr与第三管制范围进行比较，若所述第一长度与第二长度之比L1/Lr不在所述第三管制范围之内，判定所述晶圆边缘处理程度不足。
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