WO2021115032A1 - 一种多电平升压电路及其装置和系统 - Google Patents

一种多电平升压电路及其装置和系统 Download PDF

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Publication number
WO2021115032A1
WO2021115032A1 PCT/CN2020/129025 CN2020129025W WO2021115032A1 WO 2021115032 A1 WO2021115032 A1 WO 2021115032A1 CN 2020129025 W CN2020129025 W CN 2020129025W WO 2021115032 A1 WO2021115032 A1 WO 2021115032A1
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Prior art keywords
diode
branch
voltage
circuit
tvs tube
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PCT/CN2020/129025
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English (en)
French (fr)
Inventor
陈书生
曾春保
苏先进
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科华恒盛股份有限公司
漳州科华技术有限责任公司
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Priority to EP20827999.2A priority Critical patent/EP3855612A4/en
Publication of WO2021115032A1 publication Critical patent/WO2021115032A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0095—Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Definitions

  • the present invention relates to the technical field of circuit boosting, and more specifically, to a multi-level boosting circuit and its device and system.
  • the input voltage of the photovoltaic power generation system is gradually increasing, and has now been increased to 1500V.
  • the front-stage boost circuit of the photovoltaic inverter is usually changed from a two-level circuit to a three-level circuit.
  • the flying capacitor type three-level boost circuit as shown in Figure 1 is initially powered on, since the voltage on the flying capacitor C1 is zero, it will cause the lower arm switch tube Q2 to bear all the input voltage, which is easy to cause the switch tube Damage to Q2.
  • the above-mentioned booster circuit has another defect.
  • the bus voltage is established because other parallel booster circuits have been powered on.
  • the photovoltaic module PV shown in FIG. 1 has not been connected to the input terminal of the boost circuit or the voltage of the photovoltaic module PV is low, that is, in the case of low input voltage, the input voltage is lower than the start of the boost circuit
  • the voltage and the bus voltage will react to the boost circuit, causing the second diode D2 to basically withstand all the bus voltage, which is likely to be damaged.
  • the patent document with publication number CN110299837A uses a charging circuit including inductors, capacitors and controllable switches to pre-charge the flying capacitor C1 before power-on, so that it reaches the safety threshold, thereby Reduce the voltage stress of the switch tube Q2 when it is powered on, but because the charging circuit introduces multiple devices, its cost is relatively high.
  • a charging circuit including inductors, capacitors and controllable switches to pre-charge the flying capacitor C1 before power-on, so that it reaches the safety threshold, thereby Reduce the voltage stress of the switch tube Q2 when it is powered on, but because the charging circuit introduces multiple devices, its cost is relatively high.
  • another prior art based on Figure 1 provides a diode between the flying capacitor C1 and the midpoint NE of the output bus to ensure that the switching tube Q2 is not Will break down due to overvoltage.
  • the boost circuit is working normally, the input voltage will be transmitted to the midpoint NE of the output bus through the diode, making its voltage difficult to control, and there is
  • a prior art based on FIG. 1 provides a diode between the midpoint NE of the output bus and the anode of the second diode to load the half bus voltage.
  • the boost circuit is working normally, when the lower arm switch Q2 is turned on and the flying capacitor is in the charging cycle, the half bus voltage will charge the flying capacitor through the diode, which will also cause uneven voltage of the output capacitor and bias voltage Risk, and the sudden sudden change of charging current will cause the diode to be easily damaged. Due to the abnormal charging circuit, the voltage of the flying capacitor will deviate from the set value, which is difficult to control.
  • the newly added device still affects the normal operation of the main device, making it difficult to control the output of the booster circuit.
  • the second solution above has the following problems.
  • the half-bus voltage will be transmitted to the input terminal through the diode, flying capacitor C1, and the body diode of the switch Q1, because the half-bus voltage may be as high as 750V , So that the operator may have an electric shock when operating the input terminal.
  • the purpose of the present invention is to solve the above-mentioned technical problems and provide a multi-level boost circuit and its device and system, which can at least solve the problem that the lower arm switch tube is easily broken down when power is on, and does not affect the normal operation of the circuit.
  • the bus voltage is easily controlled.
  • the first aspect of the present invention provides a multi-level boost circuit, which has a first input terminal, a second input terminal, a first output terminal, a second output terminal, and includes an inductor, a first Controllable switch, second controllable switch, first capacitor, first diode, second diode, first TVS tube and output capacitor group;
  • the first controllable switch and the second controllable switch form a first branch after being connected in series, wherein the first end of the first controllable switch and the second end of the second controllable switch respectively form the first branch The first end and the second end;
  • the first diode and the second diode are connected in series to form a second branch, wherein the anode of the first diode and the cathode of the second diode respectively form the first end of the second branch And the second end;
  • the first capacitor forms a third branch, and its two ends respectively form the first end and the second end of the third branch;
  • the first TVS tube constitutes a fourth branch, and its negative electrode and positive electrode respectively constitute the first end and the second end of the fourth branch;
  • the output capacitor group is connected to the first output terminal and the second output terminal, and includes at least two output capacitors connected in series to form at least one output node configured as a common point between the output capacitors;
  • the first ends of the first branch and the second branch are both connected to the first input end through the inductor, and the second ends are respectively connected to the second input end and the first output end; the second input end is also connected to Second output
  • the first end of the third branch is connected to the common point of the first diode and the second diode in the second branch, and the second end is connected to the first controllable switch and the second controllable switch in the first branch.
  • the common point of the control switch; the first end of the fourth branch is connected to the second end of the third branch, and the second end is connected to an output node.
  • the first TVS tube is a one-way TVS tube; the fourth branch is also provided with a third diode, the cathode of which is connected to the negative electrode of the first TVS tube, and the anode of which constitutes the first TVS tube. The first end of the four branches.
  • the fourth branch is further provided with a second TVS tube, the anode of which is connected to the anode of the first TVS tube, and the cathode of which constitutes the second end of the fourth branch;
  • the TVS tube and the second TVS tube are both unidirectional TVS tubes.
  • the first TVS tube is a bidirectional TVS tube, and its two ends respectively constitute the first end and the second end of the fourth branch.
  • it further includes a fifth branch, on which a fourth diode is provided for when the input voltage between the first input terminal and the second input terminal is lower than the startup voltage of the boost circuit , Clamp the common point of the first diode and the second diode; the cathode of the fourth diode is connected to the common point of the first diode and the second diode, and The anode is connected to the second end of the fourth branch or the common point of the first TVS tube and the third diode.
  • the fifth branch is also provided with either a second TVS tube or a third controllable switch; when the fifth branch is provided with a second TVS tube, its positive pole is connected to the fourth branch.
  • the anode of the diode, and its cathode is connected to the second end of the fourth branch or the common point of the first TVS tube and the third diode; when the fifth branch is provided with a third controllable switch,
  • the third controllable switch is a normally closed relay, and the circuit further includes a controller for controlling the third controllable switch to be turned off when the circuit is working normally.
  • the fourth branch is further provided with a third diode, the cathode of which is connected to the negative electrode of the first TVS tube, and the anode constitutes the first end of the fourth branch;
  • the circuit is also It includes a fifth branch, on which a fourth diode is provided, for when the input voltage between the first input terminal and the second input terminal is lower than the startup voltage of the booster circuit, the first diode The common point of the tube and the second diode is clamped; the cathode of the fourth diode is connected to the common point of the first diode and the second diode, and the anode is connected to the first TVS tube and the second diode. Two common points of TVS tube.
  • the fourth branch is further provided with a third diode, the cathode of which is connected to one end of the first TVS tube, and the anode constitutes the first end of the fourth branch;
  • the circuit is also It includes a fifth branch, on which a fourth diode is provided, for when the input voltage between the first input terminal and the second input terminal is lower than the startup voltage of the booster circuit, the first diode The common point of the tube and the second diode is clamped; the cathode of the fourth diode is connected to the common point of the first diode and the second diode, and the anode is connected to the first TVS tube and the second diode. The common point of the three diodes.
  • the fifth branch is further provided with a current limiting resistor, which is connected in series to the fourth diode.
  • the output capacitor group includes two output capacitors with the same capacitance.
  • the second aspect of the present invention provides an inverter device, which includes a rear-stage inverter circuit and a front-stage circuit; Flat boost circuit;
  • the multi-level boost circuit is used to boost the voltage input from its input terminal and output it from the output terminal;
  • the input end of the inverter circuit is coupled to the output end of the multi-level boost circuit for inverting the direct current output by the inverter circuit into alternating current.
  • the third aspect of the present invention provides a photovoltaic power generation device, which includes a photovoltaic module, a front stage circuit and a back stage circuit; Level boost circuit;
  • the photovoltaic module corresponds to the multi-level boost circuit one-to-one and is coupled to its input terminal; the multi-level boost circuit is used to boost the output voltage of the photovoltaic module and output it from the output terminal to the subsequent circuit.
  • the fourth aspect of the present invention provides a photovoltaic power generation system, which is characterized in that it includes at least two photovoltaic power generation devices as provided in the above technical solution; The output terminals are connected in parallel to the subsequent circuit.
  • the present invention has the following beneficial effects:
  • a fourth branch with a first TVS tube is arranged between the output node and the second end of the third branch, and the second controllable
  • the voltage at both ends of the switch is controlled to be lower than the input voltage, so that the second controllable switch is not easy to break down after selection at normal cost; in normal operation, because the voltage at the second end of the third branch is generally not higher than the first
  • the voltage of the output node connected to a TVS tube prevents the voltage at the second end of the third branch from being transmitted to the output node, so that the fourth branch does not affect the voltage equalization of the output capacitors during normal operation;
  • the fourth branch is also provided with a third diode or a second TVS tube, or the first TVS tube is configured as a bidirectional TVS tube, which can prevent low input voltage In this case, the voltage of the output node is transmitted to the output terminal through the first controllable switch, causing an electric shock accident;
  • the clamping voltage of the second TVS tube set in the fourth branch or the first TVS tube configured as a bidirectional TVS tube cannot be selected to be higher than the output node
  • the current limiting resistor or third diode is added to the fourth branch to limit the current level or ensure that the voltage of the output node will not be transmitted to the output terminal through the first controllable switch, thereby reducing the occurrence of electric shock accidents The probability;
  • the multi-level boost circuit of the embodiment of the present invention is provided with a fifth branch, which can clamp the anode voltage of the second diode to the voltage of the output node under low voltage conditions to protect the second diode
  • the tube is not broken down, which is convenient for its low-cost selection.
  • the fifth branch also has a second TVS tube.
  • the clamping voltage parameter of the second TVS tube is selected to a suitable value. It can be reverse-conducted, so that the fifth branch can be turned on from the output node to the anode of the second diode and clamp its anode voltage to a certain voltage value, thereby making the voltage across the second diode bear It is lower than the selected withstand voltage value, so it can still ensure that the second diode is not broken down under the normal cost, which is convenient for its low-cost selection; and during normal operation, the second TVS tube can prevent the output node from contacting the first The capacitor is charged, and the output capacitor will not cause uneven voltage problems due to the introduction of the fifth branch;
  • the fifth branch in the case that the fourth branch already has a second TVS tube, the fifth branch only needs to be provided with a fourth diode to ensure that the output capacitor is not There will be uneven pressure problems due to the introduction of the fifth branch;
  • the second TVS tube of the fourth branch can cut off or divide the voltage of the output node to the second end of the third branch and the anode of the second diode, thereby achieving corresponding isolation or voltage protection It plays a key role in solving the breakdown problem of the second controllable switch when powering on, the breakdown problem of the second diode under low input voltage, and the perfect solution of the output capacitor voltage equalization problem during normal operation;
  • the fifth branch when the first TVS tube of the fourth branch is configured as a bidirectional TVS tube, the fifth branch only needs to be provided with a fourth diode Ensure that the output capacitor will not cause uneven voltage problems due to the introduction of the fifth branch;
  • the second end of the third branch and the anode of the second diode can be used for output.
  • the cut-off or voltage division function of the node voltage plays a corresponding isolation or voltage protection function; therefore, it also solves the breakdown problem of the second controllable switch during power-on, and the second diode under the condition of low input voltage.
  • the breakdown problem makes the selection meet the cost requirements, and the newly introduced components of the fourth branch and the fifth branch will not affect the voltage equalization of the output capacitor during normal operation;
  • the second TVS tube or the first TVS tube configured as a bidirectional TVS tube can not only prevent it from being hit in this case It also reduces the anode voltage of the second diode; by adding a current-limiting resistor on the fifth branch, the current is limited to a safe range and the probability of an electric shock accident at the input terminal is reduced.
  • Figure 1 is a structure diagram of a conventional flying capacitor type three-level boost circuit
  • FIG. 2 is a structural diagram of a three-level boost circuit according to Embodiment 1 of the present invention.
  • FIG. 3 is a structural diagram of a three-level boost circuit of Embodiment 2 of the present invention.
  • FIG. 4 is a structural diagram of a three-level boost circuit of Embodiment 3 of the present invention.
  • Fig. 5 is a structural diagram of a three-level boost circuit of embodiment 4 of the present invention.
  • Fig. 6 is a structural diagram of a three-level boost circuit of embodiment 5 of the present invention.
  • FIG. 7 is a structural diagram of a three-level boost circuit of Embodiment 6 of the present invention.
  • FIG. 8 is a structural diagram of a three-level boost circuit according to Embodiment 7 of the present invention.
  • Fig. 9 is a structural diagram of a three-level boost circuit of embodiment 8 of the present invention.
  • FIG. 10 is a structural diagram of a three-level boost circuit of Embodiment 9 of the present invention.
  • FIG. 11 is a structural diagram of a three-level boost circuit of Embodiment 10 of the present invention.
  • Fig. 12 is a structural diagram of a three-level boost circuit of embodiment 11 of the present invention.
  • FIG. 13 is a structural diagram of a three-level boost circuit of Embodiment 12 of the present invention.
  • Fig. 14 is a structural diagram of a three-level boost circuit of embodiment 13 of the present invention.
  • FIG. 15 is a structural diagram of a three-level boost circuit of embodiment 14 of the present invention.
  • FIG. 16 is a structural diagram of a three-level boost circuit of Embodiment 15 of the present invention.
  • FIG. 17 is a schematic structural diagram of an inverter device according to Embodiment 16 of the present invention.
  • Embodiment 18 is a schematic structural diagram of a photovoltaic power generation device according to Embodiment 17 of the present invention.
  • Fig. 19 is a schematic structural diagram of a photovoltaic power generation system of embodiment 18 of the present invention.
  • Embodiment 1 of the present invention provides a three-level boost circuit with an input terminal and an output terminal.
  • the input terminal includes a first input terminal and a second input terminal
  • the output terminal includes a first output terminal and a second output terminal.
  • the boost circuit of this embodiment can be used in various application scenarios, so its input terminal can be coupled with various power input devices to receive power input therefrom.
  • application scenarios in the field of photovoltaic power generation are taken as examples. Therefore, the input end of the booster circuit is coupled to the photovoltaic module PV1, which converts light energy into direct current electric energy and then inputs it into the booster circuit.
  • Boost to make effective use of light energy.
  • the anode of the photovoltaic module PV1 is connected to the first input terminal, and the cathode of the photovoltaic module PV1 is connected to the second input terminal.
  • an output capacitor group is provided between the first output terminal and the second output terminal of the present invention, which includes at least two output capacitors (C2 and C3) connected in series, so that the first output terminal and the second output terminal are At least one output node is formed, which is configured as a common point between the output capacitors.
  • a three-level boost circuit is taken as an example.
  • the output capacitor group includes two output capacitors with the same capacitance, so that the voltage of the output node is the first output terminal. And the middle value of the second output terminal voltage.
  • the output capacitor group may also include more output capacitors to form a multi-level boost circuit.
  • the output terminal is usually called a bus
  • each output capacitor is called a bus capacitor
  • the output node is also called a bus correspondingly. midpoint.
  • the boost circuit further includes the following components: an inductor L1, a first controllable switch Q1, a second controllable switch Q2, a first capacitor C1, a first diode D1, a second diode The pole tube D2 and the first TVS tube TVS1.
  • the inductor L1 is used for the cycle of storing electric energy and releasing electric energy during the working cycle, so as to boost the voltage at the input terminal and output it to the output terminal.
  • all other devices except the inductor L1 are connected correspondingly to form the following first branch, second branch, third branch, and fourth branch.
  • the first controllable switch Q1 and the second controllable switch Q2 are connected in series to form a first branch, wherein the first end of the first controllable switch Q1 and the second end of the second controllable switch Q2 are respectively The first end and the second end of the first branch are formed.
  • the first controllable switch Q1 and the second controllable switch Q2 may use triodes, field effect transistors or IGBTs.
  • the first end of the first controllable switch Q1 and the second controllable switch Q2 is the collector, and the second end is the emitter; when it uses a field effect transistor, the first controllable The first end of the switch Q1 and the second controllable switch Q2 is the drain, and the second end is the source; when the IGBT is used, the first end of the first controllable switch Q1 and the second controllable switch Q2 is The collector, the second end is the emitter.
  • the first diode D1 and the second diode D2 are connected in series to form a second branch, wherein the anode of the first diode D1 and the cathode of the second diode D2 respectively form a second branch.
  • the first and second ends of the road are connected in series to form a second branch, wherein the anode of the first diode D1 and the cathode of the second diode D2 respectively form a second branch.
  • the first capacitor C1 forms a third branch, and its two ends respectively form the first end and the second end of the third branch.
  • the first TVS tube TVS1 is configured as a unidirectional TVS tube, which forms a fourth branch, and its negative electrode and positive electrode respectively form the first end and the second end of the fourth branch.
  • the first ends of the first branch and the second branch are both connected to the first input end through the inductor L1, and the second ends are respectively connected to the second input end and the first output end.
  • the second input terminal is also connected to the second output terminal.
  • the first end of the third branch is connected to the common point of the first diode D1 and the second diode D2 in the second branch, and the second end is connected to the first controllable switch Q1 in the first branch and Common point of the second controllable switch Q2.
  • the first end of the fourth branch is connected to the second end of the third branch, and the second end of the fourth branch is connected to the bus midpoint NE.
  • each branch mainly achieves the following functions.
  • the first branch including the controllable switch is used to control the on and off of each loop in the boost circuit during normal operation, so that the inductor L1 is in the state of storing electric energy and releasing electric energy, thereby completing the boosting process.
  • the first controllable switch Q1 and the second controllable switch Q2 are various types of transistors, which can be quickly and conveniently controlled on and off by electronic signals.
  • the first end and the second end of the second branch point to the input end and the output end respectively, and the common point of the two diodes therein is connected to the third branch having a capacitive device to form a current between the corresponding devices
  • the one-way conduction characteristic of prevents the electric energy from fleeing back to the input terminal, causing electric energy loss.
  • the first capacitor C1 in the third branch is used as a flying capacitor for storing and releasing electric energy during normal operation, and also plays a role in boosting the input voltage.
  • its voltage value is basically maintained near the half bus voltage, but due to its charging and discharging process, its voltage value will still fluctuate.
  • the fourth branch is used to establish a charging circuit for the first capacitor C1 when the booster circuit is powered, so as to protect the second controllable switch Q2 from being broken down.
  • the TVS tube used can also ensure that the fourth branch does not participate in the power consumption during the normal operation of the circuit. The working principle will be described in detail below.
  • the boost circuit of the present invention Since the boost circuit of the present invention is working normally, the specific working process and principle of boosting the input voltage are common knowledge of those skilled in the art, so the present invention will not be repeated.
  • the following specifically introduces how to prevent the second controllable switch Q2 from being broken down when the power is turned on, and to enable the voltage of the bus capacitors to be equalized when the boost circuit is in normal operation.
  • the first controllable switch Q1 and the second controllable switch Q2 are both in the off state, the voltage of the first capacitor C1 is zero, and since the input voltage is as high as 1500V, the first TVS tube TVS1
  • the clamping voltage of is selected at an appropriate value, two loops can be formed in the boost circuit.
  • the first loop is the input terminal through the inductor L1, the first diode D1, the second diode D2 to form a charging loop to charge the two bus capacitors
  • the second loop is the input terminal through the inductor L1, the first diode D1
  • the first capacitor C1, the first TVS tube TVS1, and the bus capacitor C3 form a charging circuit to charge the first capacitor C1 and the bus capacitor C3.
  • both the first capacitor C1 and the two bus capacitors will be charged to half of the input voltage.
  • the voltage at point A in the figure (the second end of the third branch and the first end of the fourth branch) is basically stabilized at half of the input voltage, that is, the first controllable switch Q1 and the second controllable switch
  • the voltage at both ends of Q2 is half of the input voltage, so that when selecting the first controllable switch Q1 and the second controllable switch Q2, basically only a device with a withstand voltage slightly higher than half of the input voltage is required.
  • its withstand voltage is about 800-900V, which meets the cost requirement of device selection.
  • the clamping voltage of the first TVS tube TVS1 is selected at an appropriate value At this time, it can be ensured that the point A to the bus midpoint NE will not be turned on, and the voltage at point A will not be transmitted to the bus midpoint NE through the first TVS tube TVS1, so that the voltage equalization of the bus capacitors will not be affected.
  • the clamping voltage range of the first TVS tube TVS1 can be about 100V.
  • the first TVS tube TVS1 is arranged on the fourth branch, which can not only prevent the second controllable switch Q2 from being broken down when the power is turned on, but also ensure that the fourth branch does not affect the boost circuit.
  • the normal operation of the bus makes the voltage equalization of the bus capacitors easy to control.
  • Embodiment 1 which respectively correspond to Embodiments 2-6 of the present invention, which are all improved on the basis of Embodiment 1, aiming to solve that Embodiment 1 introduces the first embodiment configured as a one-way TVS tube After the TVS tube TVS1, because it is equivalent to an ordinary diode when working in the forward direction, in the case of low input voltage, the bus midpoint voltage can be transmitted to the input terminal through the first TVS tube TVS1, the body diode of the first controllable switch Q1 , It is easy to cause the problem of electric shock accident.
  • the fourth branch is also provided with a third diode D3, the cathode of which is connected to the negative electrode of the first TVS tube TVS1, and the anode constitutes the first end of the fourth branch.
  • the reverse blocking of the third diode D3 prevents the bus midpoint voltage from being transmitted to point A, and thus cannot be transmitted to the input terminal through the body diode of the first controllable switch Q1. Solve the above problems.
  • the withstand voltage of the third diode D3 can be greater than 750V, and the selection is relatively easy and the cost is low.
  • the fourth branch is also provided with a second TVS tube TVS2 that is also configured as a one-way TVS tube.
  • the anode of the second TVS tube TVS2 is connected to the anode of the first TVS tube TVS1.
  • the second end of the fourth branch; the first TVS tube TVS1 and the second TVS tube TVS2 are both unidirectional TVS tubes.
  • the fourth branch can be turned on.
  • the fourth branch may be provided with a current limiting resistor, or preferably provided with the same form as the embodiment 2
  • the third diode D3 constitutes the fourth embodiment shown in FIG. 5.
  • the first TVS tube TVS1 of the fourth branch is directly configured as a two-way TVS tube, and its two ends respectively constitute the first end and the second end of the fourth branch.
  • the principle for solving the above-mentioned problem in Embodiment 5 is the same as that in Embodiment 3, but its drawback is that the bidirectional clamping voltage parameters of the bidirectional TVS tube are the same, and it is inconvenient to select the clamping voltage parameter in the design circuit.
  • the fourth branch may also be provided with a current limiting resistor, or preferably provided with the same form as the embodiment 2
  • the third diode D3 constitutes the sixth embodiment shown in FIG. 7.
  • Embodiments 2-6 since the fourth branch still has the characteristics of the first TVS tube TVS1 in Embodiment 1, it will not affect the voltage equalization of the bus capacitor when the boost circuit is working normally. .
  • Embodiments 8-9 which respectively correspond to Embodiments 7-8 of the present invention, which are improved on the basis of Embodiment 2 shown in FIG. 3, aiming to solve the second diode in the case of low input voltage D2 is vulnerable to breakdown.
  • the circuit also includes a fifth branch, on which a fourth diode D4 is provided, for the input voltage between the first input terminal and the second input terminal is lower than the startup voltage of the boost circuit When the input voltage is low, the common point of the first diode D1 and the second diode D2 is clamped.
  • One end of the fifth branch is connected to the common point of the first diode D1 and the second diode D2, and the other end of the fifth branch may be connected to the second end of the fourth branch, or may be connected to the second end of the fourth branch.
  • the bus midpoint voltage is applied to the point C in the figure (the second diode D4) through the fourth diode D4.
  • the anode of the tube D2) thereby clamping the voltage across the second diode D2 at the half bus voltage, protecting the second diode D2 from breakdown, and facilitating its low-cost selection.
  • the lower arm switch Q2 when the circuit is working normally, the lower arm switch Q2 is turned on and the flying capacitor is in the charging cycle, the half bus voltage will charge the flying capacitor through the fifth branch, which will also cause the bus capacitor to fail.
  • the problem of voltage equalization; and the sudden sudden change in charging current will cause the fourth diode D4 to be easily damaged. Due to the abnormal charging circuit, the voltage of the flying capacitor C1 will also deviate from the set value, which is difficult to control.
  • the fifth branch is also provided with a third controllable switch K1, which is connected in series with the fourth diode D4.
  • the third controllable switch K1 may use devices such as relays, contactors, and triodes, and is preferably a normally closed relay.
  • the circuit further includes a controller, which is used to control the third circuit when the circuit is working normally, that is, when the input voltage between the first input terminal and the second input terminal is higher than the startup voltage of the booster circuit.
  • the controllable switch K1 is off.
  • the third controllable switch K1 When the circuit works normally, the third controllable switch K1 is turned off, that is, the fifth branch is not turned on, so the normal operation of the circuit will not be affected, and there is no problem of uneven voltage of bus capacitors.
  • the third controllable switch K1 When the circuit is in the low input voltage condition, the third controllable switch K1 is closed, and the bus midpoint voltage is applied to point C in the figure (the second diode D2 through the third controllable switch K1 and the fourth diode D4). Anode), thereby clamping the voltage across the second diode D2 at the half bus voltage, protecting the second diode D2 from breakdown, and facilitating its low-cost selection.
  • the voltage at point C may be higher than the bus midpoint voltage.
  • the third controllable switch K1 adopts a relay
  • the embodiment 9 And the fourth diode D4 in Embodiment 10 also serves to stop the voltage at point C of the fifth branch from being transmitted to the bus midpoint NE in this case, so as to further ensure that the bus capacitance can be equalized when the boost circuit is working normally. Pressure and protect the safety of the relay.
  • the fifth branch is also provided with a second TVS tube TVS2, the anode of which is connected to the anode of the fourth diode D4, and the cathode of which is connected to the fourth branch.
  • the second end is the midpoint NE of the bus.
  • the fifth branch is also provided with a second TVS tube TVS2, the anode of which is connected to the anode of the fourth diode D4, and the cathode of which is connected to the first TVS tube TVS1.
  • the common point of the third diode D3 is also provided with a second TVS tube TVS2, the anode of which is connected to the anode of the fourth diode D4, and the cathode of which is connected to the first TVS tube TVS1.
  • the clamp voltage of the second TVS tube TVS2 is selected at an appropriate value to make it reverse conducting, so that the fifth branch can be passed from the bus.
  • Point NE is turned on to point C, and the voltage at point C is clamped to a suitable voltage value, so that the voltage on both ends of the second diode D2 is lower than its selected withstand voltage value, so it is still under normal cost It can ensure that the second diode D2 is not broken down, which facilitates its low-cost selection.
  • the clamping voltage of the second TVS tube TVS2 is generally selected to be around 300V .
  • the bus voltage is 1500V
  • the bus midpoint voltage is 750V
  • the voltage at point C is about 450V
  • the voltage difference across the second diode D2 is about 1050V, so it can still guarantee the second diode under normal costs.
  • the tube D2 is not broken down.
  • the clamping voltage of the second TVS tube TVS2 cannot be higher than 450V, otherwise it cannot be achieved when the withstand voltage of the second diode D2 is selected as 1200V, the fifth branch is used for the low input voltage. The role of protecting it under the circumstances.
  • the bus midpoint voltage will generate a voltage drop corresponding to its clamp voltage after passing through the second TVS tube TVS2, so that the voltage at point C can be controlled at It is lower than the bus midpoint voltage level, which provides a low-voltage environment for solving electric shock accidents at the input end.
  • the bus midpoint voltage needs to be higher than the voltage at point C than the clamping voltage of the second TVS tube TVS2 to make the fifth branch route bus midpoint NE turn on to point C.
  • the first capacitor C1 is in a periodic charging and discharging process, so that the voltage at point C generally fluctuates from half bus voltage to bus voltage, and its voltage value after the first capacitor C1 is discharged will be slightly lower than the half bus voltage . Therefore, during normal operation, as long as the clamping voltage of the second TVS tube TVS2 is selected at an appropriate value, the bus midpoint voltage cannot be transmitted to point C, and it will not pass through point C when the voltage at point C is slightly lower than that.
  • the first capacitor C1 is charged so that the bus capacitor will not cause uneven voltage problems due to the introduction of the fifth branch.
  • the clamping voltage of the second TVS tube TVS2 is generally selected to be about 300V, which meets the requirement that the second TVS tube TVS2 cuts off the bus midpoint voltage from being transmitted to point C during normal operation.
  • the fourth diode D4 in Embodiment 11 and Embodiment 12 also functions to cut off the fifth branch.
  • the voltage at point C is transferred to the neutral point NE of the bus, thereby further ensuring that the bus capacitance can be voltage-balanced when the boost circuit is working normally.
  • Embodiments 13-14 of the present invention which are improved on the basis of Embodiment 4 shown in FIG. 5 and Embodiment 6 shown in FIG. 7, respectively. Since it has a second TVS tube TVS2 and a first TVS tube TVS1 configured as a two-way TVS tube, a more complete solution can be directly formed on the basis of it, which can not only solve the second diode under the condition of low input voltage
  • the problem that the tube D2 is easy to be broken down can also solve the problem of uneven voltage of the bus capacitance during normal operation due to the previous problem.
  • the circuit further includes a fifth branch, on which a fourth diode D4 is provided for the input voltage between the first input terminal and the second input terminal to be lower than this
  • a fifth branch on which a fourth diode D4 is provided for the input voltage between the first input terminal and the second input terminal to be lower than this
  • the circuit further includes a fifth branch, on which a fourth diode D4 is provided for the input voltage between the first input terminal and the second input terminal to be lower than this
  • a fifth branch on which a fourth diode D4 is provided for the input voltage between the first input terminal and the second input terminal to be lower than this
  • the fourth branch in the embodiment 13 already has a second TVS tube TVS2, and the first TVS tube TVS1 in the fourth branch in the embodiment 14 is a two-way TVS tube, it also solves the above-mentioned second diode
  • the principle of the breakdown of D2 and the problem of uneven voltage of the bus capacitance during normal operation due to the introduction of the fourth diode D4 of the fifth branch is the same as that of Embodiments 11 and 12, and will not be repeated here.
  • the clamping voltage of the second TVS tube TVS2 in Embodiment 13 is also selected to be around 300V, while in Embodiment 14, the bidirectional clamping voltage of the second TVS tube TVS2 configured as a bidirectional TVS tube is also selected. It was chosen near 300V. It is precisely because of this that in Embodiment 3 and Embodiment 5, in order to simultaneously solve the problems mainly solved by Embodiments 13-14, the corresponding clamping voltage cannot be selected to be higher than the bus midpoint voltage, otherwise it will As a result, the fifth branch cannot play the role of protecting the second diode D2 in the case of low input voltage.
  • the second TVS tube TVS2 of the fourth branch can cut off or divide the voltage of the busbar midpoint to both points A and C, so as to achieve corresponding isolation or voltage
  • the protection function is that the boost circuit of the present invention addresses the breakdown problem of the second controllable switch Q2 during power-on, the breakdown problem of the second diode D2 under the condition of low input voltage, and the voltage equalization of the bus capacitance during normal operation. The perfect solution of the problem played a key role.
  • the bidirectional TVS tube is directly configured. Under the condition that its bidirectional clamping voltage parameters can meet the requirements of specific applications, both the second end of the third branch and the anode of the second diode D2 can be used. To cut off or divide the voltage of the output node, so as to play a corresponding role in isolation or voltage protection. Therefore, it simultaneously solves the breakdown problem of the second controllable switch Q2 during power-on, and the breakdown problem of the second diode D2 under low input voltage conditions, so that the selection meets the cost requirements, and the newly introduced first The components of the fourth branch and the fifth branch will not affect the voltage equalization of the bus capacitor during normal operation.
  • Embodiment 15 of the present invention which is improved on the basis of Embodiment 14 shown in FIG. 15.
  • embodiment 14 is the same as embodiment 11-12, in the case of low input voltage, the voltage at point C is reduced to make it approximately stable at about 450V, thereby providing a low-voltage environment at point C, but the voltage at point C will still pass
  • the first capacitor C1 and the body diode of the first controllable switch Q1 are transmitted to the input terminal. If the resistance at the input terminal is not large enough, an electric shock accident may still occur.
  • the fifth branch is also provided with a current limiting resistor R1, which is connected in series to the fourth diode D4 to limit the current within a safe range and reduce the probability of electric shock accidents at the input end .
  • Embodiment 16 of the present invention provides an inverter device, which includes a front-stage circuit and a back-stage inverter circuit.
  • the pre-stage circuit adopts the multi-level boost circuit described in the above technical solution.
  • the multi-level boost circuit is used to boost the voltage input from its input terminal and then output it from the output terminal.
  • the input terminal of the inverter circuit is coupled to the output terminal of the multi-level boost circuit for The output DC power is inverted to AC power.
  • embodiment 17 of the present invention provides a photovoltaic power generation device, which includes a photovoltaic module PV, a pre-stage circuit and a post-stage circuit; the pre-stage circuit adopts the multi-level boost circuit as described in the above technical solution .
  • the photovoltaic module PV is in one-to-one correspondence with a multi-level booster circuit and is coupled to its input terminal; the booster circuit is used to boost the output voltage of the photovoltaic module PV and then output the output terminal to the subsequent circuit.
  • embodiment 18 of the present invention provides a photovoltaic power generation system, including at least two photovoltaic power generation devices as provided in embodiment 17; wherein, the output terminals of the front-stage circuits of several photovoltaic power generation devices are connected in parallel and then connected to The back-stage circuit constitutes a distributed photovoltaic power generation system.
  • Embodiments 16-18 adopt the multi-level booster circuit of the foregoing embodiment, and therefore inherit all the advantages of the booster circuit.

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Abstract

一种多电平升压电路及其装置和系统，其在输出节点（NE）和第一电容（C1）、第二二极管（D2）间均设有TVS管（TVS1，TVS2），并通过配合其他辅助器件，不仅能够解决上电时下臂开关管（Q2）易被击穿的问题，还能解决低输入电压情况下第二二极管（D2）的击穿问题，使得相关器件的选型较为容易，成本较低；并且，该电路在增加相应器件后，正常的升压过程不受影响，输出端电压易受控制，同时还降低了在操作输入端时发生电击事故的概率。

Description

一种多电平升压电路及其装置和系统 技术领域
本发明涉及电路升压技术领域，更具体来讲，涉及一种多电平升压电路及其装置和系统。
背景技术
光伏发电系统的输入电压在逐步提升，目前已提升到1500V，考虑到成本及其他因素，光伏逆变器的前级升压电路通常由两电平改为三电平电路。如图1所示出的飞跨电容型三电平升压电路在初始上电时，由于飞跨电容C1上的电压为零，会导致下臂开关管Q2承受全部输入电压，容易导致开关管Q2的损坏。
此外，上述升压电路还存在另一种缺陷，由于其应用于光伏发电领域并形成集散式光伏发电系统时，可能存在由于其他并联的升压电路已经上电从而建立了母线电压的情况。在该情况下，当图1示出的光伏组件PV还未接入该升压电路的输入端或光伏组件PV的电压较低时，即低输入电压情况，输入电压低于升压电路的启动电压，母线电压将反作用于该升压电路，导致第二二极管D2基本要承受全部母线电压，容易导致其损坏。
因而，上述缺陷的存在，使得图1中现有的升压电路具有开关管Q2和第二二极管D2的选型困难或成本偏高的问题。现有技术中提出了一些解决方案，能够一定程度地解决上述问题。
例如，为了解决开关管Q2的问题，公布号为CN110299837A的专利文献采用包括了电感、电容和可控开关的充电电路在上电前对飞跨电容C1进行预充电，使其达到安全阈值，从而降低开关管Q2在上电时的电压应力，但由于该充电电路引入了多个器件，因此其成本较高。为了能够低成本地解决开关管Q2的问题，另一种现有技术在图1的基础上，通过在飞跨电容C1与输出母线中点NE间设置一二极管来保证启机时开关管Q2不会因过压而击穿。但是在升压电路正常工作时，输入电压将通过该二极管将传递至输出母线中点NE，使得其电压较难控制，存在偏压风险。
而为了解决第二二极管D2的问题，一种现有技术在图1的基础上，通过在输出母线中点NE和第二二极管的阳极间设置一二极管，从而将半母线电压加载到第二二极管的阳极，使其在上述低输入电压情况下只需承受半母线电压，在其耐压值不高时也不易被击穿。但是在升压电路正常工作时，当下臂开关管Q2导通且飞跨电容处于充电周期时，半母线电压会通过该 二极管为飞跨电容充电，同样会导致输出电容不均压，存在偏压风险，并且瞬间突变的充电电流会导致该二极管容易损坏，由于存在该非正常的充电回路，也会使飞跨电容的电压偏离设定值，难以控制。
因而，上述方案尽管在对应的特殊情况能够解决相应问题，但新增器件仍然会对主要器件的正常工作产生影响使得升压电路的输出难以控制。
此外，上述第二种方案还存在以下问题，在低输入电压情况下，半母线电压会通过该二极管、飞跨电容C1、开关管Q1的体二极管传递至输入端，由于半母线电压可能高达750V，使得操作人员在操作输入端时可能发生电击事故。
发明内容
本发明的目的在于解决上述技术问题，提供一种多电平升压电路及其装置和系统，其至少能够解决上电时下臂开关管易被击穿的问题，且不影响电路的正常工作，母线电压易受控制。
为实现上述目的，本发明的第一方面提供了一种多电平升压电路，其具有第一输入端、第二输入端、第一输出端、第二输出端，并包括电感、第一可控开关、第二可控开关、第一电容、第一二极管、第二二极管、第一TVS管以及输出电容组；
所述第一可控开关和第二可控开关串接后构成第一支路，其中，第一可控开关的第一端和第二可控开关的第二端分别构成该第一支路的第一端和第二端；
所述第一二极管和第二二极管串接后构成第二支路，其中，第一二极管的阳极和第二二极管的阴极分别构成该第二支路的第一端和第二端；
所述第一电容构成第三支路，其两端分别构成该第三支路的第一端和第二端；
所述第一TVS管构成第四支路，其负极和正极分别构成该第四支路的第一端和第二端；
所述输出电容组连接所述第一输出端和第二输出端，其包含至少两个串接的输出电容，以构成至少一个被配置为各输出电容间公共点的输出节点；
所述第一支路和第二支路的第一端均通过所述电感连接第一输入端，其第二端分别连接第二输入端和第一输出端；所述第二输入端还连接第二输出端；
所述第三支路的第一端连接第二支路中第一二极管和第二二极管的公共点，其第二端连接第一支路中第一可控开关和第二可控开关的公共点；所述第四支路的第一端连接所述第三支路的第二端，其第二端连接一输出节点。
在某一实施例中：所述第一TVS管为单向TVS管；所述第四支路还设有第三二极管，其 阴极与第一TVS管的负极连接，其阳极构成该第四支路的第一端。
在某一实施例中：所述第四支路还设有第二TVS管，其正极与第一TVS管的正极连接，其负极构成所述第四支路的第二端；所述第一TVS管和第二TVS管均为单向TVS管。
在某一实施例中：所述第一TVS管为双向TVS管，其两端分别构成第四支路的第一端和第二端。
在某一实施例中：还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接所述第四支路的第二端或所述第一TVS管和第三二极管的公共点。
在某一实施例中：所述第五支路还设有第二TVS管或第三可控开关的一种；当第五支路设有第二TVS管时，其正极连接所述第四二极管的阳极，其负极连接所述第四支路的第二端或所述第一TVS管和第三二极管的公共点；当第五支路设有第三可控开关时，该第三可控开关为常闭继电器，所述电路还包括控制器，其用于在电路正常工作时，控制该第三可控开关断开。
在某一实施例中：所述第四支路还设有第三二极管，其阴极与第一TVS管的负极连接，其阳极构成该第四支路的第一端；所述电路还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接第一TVS管和第二TVS管的公共点。
在某一实施例中：所述第四支路还设有第三二极管，其阴极与第一TVS管的一端连接，其阳极构成该第四支路的第一端；所述电路还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接第一TVS管和第三二极管的公共点。
在某一实施例中：所述第五支路还设有限流电阻，其串接于所述第四二极管。
在某一实施例中：所述输出电容组包含两个容值相同的输出电容。
为实现上述目的，本发明的第二方面提供了一种逆变装置，其包括后级逆变电路和前级电路；所述前级电路采用如上述技术方案中任一项所提供的多电平升压电路；
所述多电平升压电路用于将由其输入端输入的电压升压后从所述输出端输出；
所述逆变电路的输入端耦合该多电平升压电路的输出端，用以将其输出的直流电逆变为交流电。
为实现上述目的，本发明的第三方面提供了一种光伏发电装置，其包括光伏组件、前级 电路和后级电路；所述前级电路采用如上述技术方案中任一项所提供的多电平升压电路；
所述光伏组件与多电平升压电路一一对应且与其输入端耦合；所述多电平升压电路用于将光伏组件的输出电压升压后由其输出端输出至后级电路。
为实现上述目的，本发明的第四方面提供了一种光伏发电系统，其特征在于：包括至少两个如上述技术方案所提供的光伏发电装置；其中，若干个光伏发电装置的前级电路的输出端并联后连接至后级电路。
相较于现有技术，本发明的有益效果在于：
(1)本发明实施例的多电平升压电路，通过在输出节点和第三支路的第二端间设置具有第一TVS管的第四支路，在上电时将第二可控开关两端的电压控制为低于输入电压，使得第二可控开关在常规成本下选型后也不易击穿；在正常工作时，由于第三支路的第二端的电压一般不会高于第一TVS管所连接的输出节点的电压，使得第三支路的第二端的电压不会传递至输出节点，从而使得该第四支路在正常工作时不会影响各输出电容的均压；
(2)本发明实施例的多电平升压电路，第四支路还设有第三二极管或第二TVS管或将第一TVS管配置为双向TVS管，可防止在低输入电压情况下，输出节点的电压通过第一可控开关传递至输出端，造成电击事故；
(3)本发明实施例的多电平升压电路，在第四支路设置的第二TVS管或被配置为双向TVS管的第一TVS管的钳位电压不能被选择为高于输出节点的电压时，通过在第四支路上加设有限流电阻或第三二极管，以限制电流水平或保证输出节点的电压不会通过第一可控开关传递至输出端，进而降低发生电击事故的概率；
(4)本发明实施例的多电平升压电路，通过设有第五支路，可在低电压情况下将第二二极管阳极电压钳位在输出节点的电压，保护第二二极管不被击穿，方便其低成本选型。
(5)本发明实施例的多电平升压电路，第五支路还具有第二TVS管，在低输入电压情况下，通过将第二TVS管的钳位电压参数选择在合适值使其可反向导通，使得第五支路可以由输出节点向第二二极管阳极导通并将其阳极电压钳位于某一合适的电压值，进而使得第二二极管两端所承受的电压低于所选耐压值，因而在常规成本下仍然能够保证第二二极管不被击穿，方便其低成本选型；而在正常工作时，第二TVS管可防止输出节点对第一电容进行充电，输出电容不会因为第五支路的引入而产生不均压的问题；
(6)本发明实施例的多电平升压电路，在第四支路已经设有第二TVS管的情况下，第五支路仅需设有第四二极管即可保证输出电容不会因为第五支路的引入而产生不均压的问题；
第四支路的第二TVS管对第三支路的第二端和第二二极管的阳极均能够起到对输出节点电压的截止或分压作用，从而起到相应的隔离或电压保护作用，其针对上电时第二可控开关的击穿问题、低输入电压情况下第二二极管的击穿问题以及正常工作时的输出电容均压问题的完善解决起到了关键性作用；
(7)本发明实施例的多电平升压电路，在第四支路的第一TVS管被配置为双向TVS管的情况下，第五支路仅需设有第四二极管即可保证输出电容不会因为第五支路的引入而产生不均压的问题；
直接在第四支路配置双向TVS管，在其双向钳位电压参数能够符合具体应用要求的情况下，对第三支路的第二端和第二二极管的阳极均能够起到对输出节点电压的截止或分压作用，从而起到相应的隔离或电压保护作用；因此，其同时解决了上电时第二可控开关的击穿问题、低输入电压情况下第二二极管的击穿问题，使其选型符合成本要求，并且使得新引入的第四支路和第五支路的各器件在正常工作时均不会对输出电容的均压产生影响；
(8)本发明实施例的多电平升压电路，在低输入电压情况下，通过第二TVS管或被配置为双向TVS管的第一TVS管，不仅能够防止其在该情况下被击穿，还降低了第二二极管阳极电压；通过在第五支路上加设限流电阻，将电流限制在安全范围，降低输入端发生电击事故的概率。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域的普通技术人员来说，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是常规的飞跨电容型三电平升压电路结构图；
图2是本发明实施例1的三电平升压电路结构图；
图3是本发明实施例2的三电平升压电路结构图；
图4是本发明实施例3的三电平升压电路结构图；
图5是本发明实施例4的三电平升压电路结构图；
图6是本发明实施例5的三电平升压电路结构图；
图7是本发明实施例6的三电平升压电路结构图；
图8是本发明实施例7的三电平升压电路结构图；
图9是本发明实施例8的三电平升压电路结构图；
图10是本发明实施例9的三电平升压电路结构图；
图11是本发明实施例10的三电平升压电路结构图；
图12是本发明实施例11的三电平升压电路结构图；
图13是本发明实施例12的三电平升压电路结构图；
图14是本发明实施例13的三电平升压电路结构图；
图15是本发明实施例14的三电平升压电路结构图；
图16是本发明实施例15的三电平升压电路结构图；
图17是本发明实施例16的逆变装置的结构示意图；
图18是本发明实施例17的光伏发电装置的结构示意图；
图19是本发明实施例18的光伏发电系统的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的优选实施例，且不应被看作对其他实施例的排除。基于本发明实施例，本领域的普通技术人员在不作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的权利要求书、说明书及上述附图中，除非另有明确限定，如使用术语“第一”、“第二”或“第三”等，都是为了区别不同对象，而不是用于描述特定顺序。本发明的权利要求书、说明书及上述附图中，如使用术语“包括”、“具有”以及它们的变形，意图在于“包含但不限于”。
实施例1
参照图2，本发明实施例1提供了一种三电平升压电路，具有输入端和输出端。所述输入端包括第一输入端、第二输入端，所述输出端包括第一输出端、第二输出端。
通常来说，本实施例的升压电路可用于各类应用场景，因而其输入端可与各类电源输入装置耦合，以从其接收电源输入。在本发明的各实施例中，均以光伏发电领域的应用场景为例介绍，因而升压电路的输入端耦合光伏组件PV1，其将光能转化为直流电能后输入升压电路，通过将其升压以对光能进行有效利用。光伏组件PV1的正极连接所述第一输入端，其负极连接所述第二输入端。其他实施例中，将光伏组件的正负极与升压电路的输入关系调换也是可行的。
此外，本发明的第一输出端和第二输出端之间设有输出电容组，其包含至少两个串接的输出电容(C2和C3)，以使第一输出端和第二输出端间构成至少一个输出节点，其被配置为各输出电容间的公共点。本发明的各实施例及相应附图中，均以三电平升压电路为例介绍，其输出电容组包含两个容值相同的输出电容，使得所述输出节点的电压为第一输出端和第二输出端电压的中间值。其他实施例中，输出电容组也可以包含更多的输出电容，以形成多电平升压电路，为了相应地实现本发明的目的，只需适应性地调整本发明相应器件的参数即可。值得说明的是，本发明实施例的三电平升压电路应用于光伏发电领域时，通常将输出端称为 母线，各输出电容称为母线电容，而所述输出节点也相应地称为母线中点。
应当理解的是，本发明不限于上述光伏发电领域的应用场景，因此输入端和输出端的耦合形式不局限于本文中各具体实施例的形式。
实施例1的具体结构中，所述升压电路还包括以下器件：电感L1、第一可控开关Q1、第二可控开关Q2、第一电容C1、第一二极管D1、第二二极管D2和第一TVS管TVS1。
所述电感L1用于在工作周期中进行储存电能和释放电能的循环，以将输入端的电压升压后输出至输出端。此外，在本发明实施例1中，除电感L1外的其他各器件对应连接后构成以下的第一支路、第二支路、第三支路和第四支路。
所述第一可控开关Q1和第二可控开关Q2串接后构成第一支路，其中，所述第一可控开关Q1的第一端和第二可控开关Q2的第二端分别构成第一支路的第一端和第二端。本实施例中，所述第一可控开关Q1和第二可控开关Q2可采用三极管或场效应管或IGBT。当其采用三极管时，所述第一可控开关Q1和第二可控开关Q2的第一端为集电极，第二端为发射极；当其采用场效应管时，所述第一可控开关Q1和第二可控开关Q2的第一端为漏极，第二端为源极；当其采用IGBT时，所述第一可控开关Q1和第二可控开关Q2的第一端为集电极，第二端为发射极。
所述第一二极管D1和第二二极管D2串接后构成第二支路，其中，所述第一二极管D1的阳极和第二二极管D2的阴极分别构成第二支路的第一端和第二端。
所述第一电容C1构成第三支路，其两端分别构成该第三支路的第一端和第二端。
所述第一TVS管TVS1被配置为单向TVS管，其构成第四支路，其负极和正极分别构成该第四支路的第一端和第二端。
以下介绍实施例1的升压电路中各支路的具体连接关系：
所述第一支路和第二支路的第一端均通过所述电感L1连接第一输入端，其第二端分别连接第二输入端和第一输出端。所述第二输入端还连接第二输出端。
所述第三支路的第一端连接第二支路中第一二极管D1和第二二极管D2的公共点，其第二端连接第一支路中第一可控开关Q1和第二可控开关Q2的公共点。所述第四支路的第一端连接所述第三支路的第二端，其第二端连接所述母线中点NE。
通过上述连接以形成本实施例的升压电路后，各支路主要实现如下作用。
包含可控开关的第一支路，用于在正常工作时控制升压电路中各回路的通断，使所述电感L1对应地处于储存电能和释放电能的状态，从而完成升压过程。本实施例中，所述第一可控开关Q1和第二可控开关Q2为各类晶体管，以通过电子信号快速且方便地控制其通断。
第二支路的第一端和第二端分别指向输入端和输出端，且其内两个二极管的公共点连接具有电容器件的所述第三支路，用以在相应的器件间形成电流的单向导通特性，防止电能反 窜回输入端，造成电能损失。
第三支路中的第一电容C1作为飞跨电容，用于在正常工作时储存和释放电能，同样起到对输入电压升压的作用。正常工作时，由于第一电容C1的容量选择，其电压值基本上保持在半母线电压附近，但由于其存在充放电过程，因而其电压值仍会有所波动。
第四支路则用于在升压电路上电时建立第一电容C1的充电回路，从而对第二可控开关Q2进行保护，防止其被击穿。同时，其所采用的TVS管还可以保证该第四支路不参与电路正常工作时的电能消耗，下文将详述其工作原理。
由于本发明的升压电路在正常工作时，其对输入电压升压的具体工作过程和原理已为本领域技术人员的公知常识，本发明便不再赘述。以下具体介绍其如何在上电时防止第二可控开关Q2被击穿，并使得升压电路在正常工作时母线电容能够均压。
具体而言，在上电时，第一可控开关Q1和第二可控开关Q2均处于关断状态，第一电容C1的电压为零，并且由于输入电压高达1500V，在第一TVS管TVS1的钳位电压被选择在合适值时，可在升压电路中形成两个回路。其中，回路一为输入端通过电感L1、第一二极管D1、第二二极管D2形成充电回路以为两母线电容进行充电，回路二为输入端通过电感L1、第一二极管D1、第一电容C1、第一TVS管TVS1、母线电容C3形成充电回路以为第一电容C1和母线电容C3充电。由于两个母线电容的容量相等，因此在一定时间后，第一电容C1和两母线电容都将被充电至输入电压的一半。此时，图中A点(第三支路的第二端、第四支路的第一端)电压基本被稳定在输入电压的一半，也即第一可控开关Q1和第二可控开关Q2两端的电压均为输入电压的一半，使得在对第一可控开关Q1和第二可控开关Q2进行选型时，基本只需采用耐压值稍高于输入电压一半的器件，在本实施例的输入电压达到1500V的情况下，其耐压值大约为800-900V，符合器件选型的成本要求。
而在正常工作时由于第一电容C1两端电压基本维持在半母线电压附近，A点电压的最大值仅稍高于半母线电压，在第一TVS管TVS1的钳位电压被选择在合适值时，即可保证A点至母线中点NE不会导通，A点电压不会通过第一TVS管TVS1传递至母线中点NE，从而不会影响母线电容的均压。本实施例1中，所述第一TVS管TVS1的钳位电压范围可在100V左右，在上电时，第四支路由其第一端向第二端导通，而在正常工作时，该第四支路无法由其第一端向第二端导通。
因此，本发明实施例1在第四支路上设置第一TVS管TVS1，不仅可在上电时防止第二可控开关Q2被击穿，同时还可以保证该第四支路不影响升压电路的正常工作，使得各母线电容的均压容易控制。
实施例2-6
参照图3-7，其分别对应于本发明的实施例2-6，其均在实施例1的基础上对其改进，旨在解决实施例1引入了被配置为单向TVS管的第一TVS管TVS1后，由于其在正向工作时相当于普通二极管，在低输入电压情况下，母线中点电压能够通过该第一TVS管TVS1、第一可控 开关Q1的体二极管传递至输入端，容易造成所述的电击事故的问题。
图3示出的实施例2中，所述第四支路还设有第三二极管D3，其阴极与第一TVS管TVS1的负极连接，其阳极构成该第四支路的第一端。在所述低输入电压情况下，通过该第三二极管D3的反向截止使得母线中点电压无法传递至A点，进而无法通过第一可控开关Q1的体二极管传递至输入端，以解决上述问题。并且，当输入电压为1500V时，由于母线中点电压为750V，第三二极管D3的耐压值大于750V即可，其选型也较为容易，成本较低。
图4示出的实施例3中，所述第四支路还设有也被配置为单向TVS管的第二TVS管TVS2，其正极与第一TVS管TVS1的正极连接，其负极构成所述第四支路的第二端；所述第一TVS管TVS1和第二TVS管TVS2均为单向TVS管。在所述低输入电压情况下，由于母线中点电压需要高于第二TVS管TVS2的钳位电压，第四支路才能导通。因此，当第二TVS管TVS2的钳位电压被选择为高于母线中点电压时，该母线中点电压便无法传递至输入端，从而解决上述问题；但当第二TVS管TVS2的钳位电压由于某些原因不能被选择为高于母线中点电压时，为了较好地解决上述问题，所述第四支路上可设有限流电阻，或是优选地设有与实施例2形式相同的第三二极管D3，以构成图5所示出的实施例4。
图6示出的实施例5中，其将第四支路的第一TVS管TVS1直接配置为双向TVS管，其两端分别构成第四支路的第一端和第二端。实施例5解决上述问题的原理与实施例3相同，但其缺陷在于该双向TVS管的双向钳位电压参数相同，在设计电路选择该钳位电压参数时较为不便。因而，当其双向钳位电压由于某些原因不能被选择为高于母线中点电压时，所述第四支路上也可设有限流电阻，或是优选地设有与实施例2形式相同的第三二极管D3，以构成图7所示出的实施例6。
值得说明的是，实施例2-6中，由于该第四支路仍然具有实施例1中第一TVS管TVS1的特性，其在升压电路正常工作时，也不会影响母线电容的均压。
实施例7-8
参照图8-9，其分别对应于本发明的实施例7-8，其均在图3示出的实施例2的基础上对其改进，旨在解决低输入电压情况下第二二极管D2易被击穿的问题。
可以看出，所述电路还包括第五支路，其上设有第四二极管D4，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，即所述低输入电压情况下，对所述第一二极管D1和第二二极管D2的公共点进行钳位。
所述第五支路的一端连接所述第一二极管D1和第二二极管D2的公共点，其另一端可连接所述第四支路的第二端，也可连接所述第一TVS管TVS1和第三二极管D3的公共点。
在图8和图9分别示出的实施例7和实施例8中，在所述低输入电压情况下，母线中点电压通过第四二极管D4加载到图中C点(第二二极管D2的阳极)，从而将第二二极管D2两端的电压钳位在半母线电压，保护第二二极管D2不被击穿，方便其低成本选型。
然而，上述实施例仍然存在当电路正常工作，下臂开关管Q2导通且飞跨电容处于充电周期时，半母线电压会通过该第五支路为飞跨电容充电，同样会导致母线电容不均压的问题；并且，瞬间突变的充电电流会导致第四二极管D4容易损坏，由于存在该非正常的充电回路，也会使飞跨电容C1的电压偏离设定值，难以控制。
实施例9-10
参照图10-11，其分别对应于实施例于本发明的实施例9-10，其分别均在图8示出的实施例7和图9示出的实施例8的基础上对其改进，旨在解决由于具有第五支路的第四二极管D4，因而在正常工作时母线电容不均压的问题。
所述第五支路还设有第三可控开关K1，其与所述第四二极管D4串联。所述第三可控开关K1可采用继电器、接触器以及三极管等器件，优选为常闭继电器。对应的，所述电路还包括控制器，其用于在电路正常工作时，即在第一输入端和第二输入端间的输入电压高于该升压电路的启动电压时，控制该第三可控开关K1断开。
当电路正常工作时，所述第三可控开关K1断开，即第五支路不导通，因而不会影响电路正常工作，也就不存在母线电容不均压的问题。当电路处于所述低输入电压情况，第三可控开关K1闭合，母线中点电压通过第三可控开关K1、第四二极管D4加载到图中C点(第二二极管D2的阳极)，从而将第二二极管D2两端的电压钳位在半母线电压，保护第二二极管D2不被击穿，方便其低成本选型。
值得说明的是，由于正常工作时，C点电压可能会高于母线中点电压，在第三可控开关K1采用继电器的情况下，由于常规继电器的耐压值并不高，因而实施例9和实施例10中的第四二极管D4还起到截止第五支路在该情况下C点电压传递至母线中点NE的作用，从而进一步地保证升压电路正常工作时母线电容能够均压，并保护继电器的安全。
实施例11-12
参照图12-13，其分别对应于本发明的实施例11-12，其分别在图8示出的实施例7和图9示出的实施例8的基础上对其改进，旨在解决由于具有第五支路的第四二极管D4，因而在正常工作时母线电容不均压的问题。
在图12示出的实施例11中，所述第五支路还设有第二TVS管TVS2，其正极连接所述第四二极管D4的阳极，其负极连接所述第四支路的第二端，也即母线中点NE。在图13示出的实施例12中，所述第五支路还设有第二TVS管TVS2，其正极连接所述第四二极管D4的阳极，其负极连接所述第一TVS管TVS1和第三二极管D3的公共点。
在实施例11和实施例12中，在所述低输入电压情况下，通过将第二TVS管TVS2的钳位电压选择在合适值使其可反向导通，使得第五支路可以由母线中点NE向C点导通，并将C点电压钳位于某一合适电压值，进而使得第二二极管D2两端所承受的电压低于其所选耐压值，因而在常规成本下仍然能够保证第二二极管D2不被击穿，方便其低成本选型。
由于在输入电压达到1500V的情况下，第二二极管D2的耐压值一般选为1200V，因而在实施例11和实施例12中，第二TVS管TVS2的钳位电压一般选择在300V左右。当母线电压为1500V时，母线中点电压为750V，那么C点电压大约在450V，第二二极管D2两端的压差在1050V左右，因而在常规成本下，其仍然能够保证第二二极管D2不被击穿。显然在该情况下，第二TVS管TVS2的钳位电压不能高于450V，否则便不能实现在第二二极管D2耐压值选择为1200V时，通过第五支路在所述低输入电压情况下对其进行保护的作用。
此外，由于第二TVS管TVS2在反向工作时能够分压，因而母线中点电压在通过该第二TVS管TVS2后会产生与其钳位电压相应的压降，使得C点电压能够被控制在低于母线中点电压的水平，这为解决输入端的电击事故提供了低电压环境。
而在正常工作时，由于存在第二TVS管TVS2，母线中点电压需比C点电压高出第二TVS管TVS2的钳位电压才能使第五支路由母线中点NE向C点导通。但是在正常工作时，第一电容C1处于周期性充放电过程，使得C点电压一般在半母线电压至母线电压间波动，其在第一电容C1放电后的电压值会稍低于半母线电压。因而，在正常工作时，只要将第二TVS管TVS2的钳位电压选择在合适值，母线中点电压便不能传递至C点，也就不会在C点电压稍低于其时通过C点对第一电容C1进行充电，从而使得母线电容不会因为第五支路的引入而产生不均压的问题。实施例11和实施例12中，第二TVS管TVS2的钳位电压一般选择在300V左右，其符合正常工作时第二TVS管TVS2截止母线中点电压传递至C点的要求。
值得说明的是，由于正常工作时，C点电压可能会高于母线中点电压，因而实施例11和实施例12中的第四二极管D4还起到截止第五支路在该情况下C点电压传递至母线中点NE的作用，从而进一步地保证升压电路正常工作时母线电容能够均压。
实施例13-14
参照图14-15，其分别对应于本发明的实施例13-14，其分别在图5示出的实施例4和图7示出的实施例6的基础上对其改进。由于其分别具有第二TVS管TVS2和被配置为双向TVS管的第一TVS管TVS1，因而可在其基础上直接形成较为完善的解决方案，其不仅可解决低输入电压情况下第二二极管D2易被击穿的问题，还可以同时解决由于前一问题进一步造成正常工作时母线电容不均压的问题。
图14示出的实施例13中，所述电路还包括第五支路，其上设有第四二极管D4，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管D1和第二二极管D2的公共点进行钳位。所述第五支路的一端连接所述第一二极管D1和第二二极管D2的公共点，其另一端连接第四支路中第一TVS管TVS1和第二TVS管TVS2的公共点。
图15示出的实施例14中，所述电路还包括第五支路，其上设有第四二极管D4，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管D1和第二二极管D2的公共点进行钳位。所述第五支路的一端连接所述第一二极管D1和第二二极管D2的公共点，其另一端连接第一TVS管TVS1和第三二极管D3的公共点。
由于实施例13中的第四支路已经设有第二TVS管TVS2，而实施例14中的第四支路的第一TVS管TVS1为双向TVS管，因此其同时解决上述第二二极管D2被击穿的问题和由于引入第五支路的第四二极管D4而进一步造成正常工作时母线电容不均压的问题的原理与实施例11和12相同，此处便不再赘述。
应当说明的是，实施例13中第二TVS管TVS2的钳位电压也被选在300V附近，而在实施例14中，被配置为双向TVS管的第二TVS管TVS2的双向钳位电压也被选在300V附近。也正是因为如此，在实施例3和实施例5中，为了使其能够同时解决实施例13-14主要解决的问题，对应的钳位电压不能被选择为高于母线中点电压，否则将导致第五支路不能起到在低输入电压情况下保护第二二极管D2的作用。
可以看出，在实施例13中，第四支路的第二TVS管TVS2对A点和C点均能够起到对母线中点电压的截止或分压作用，从而起到相应的隔离或电压保护作用，其为本发明的升压电路针对上电时第二可控开关Q2的击穿问题、低输入电压情况下第二二极管D2的击穿问题以及正常工作时的母线电容均压问题的完善解决起到了关键性作用。
而在实施例14中，直接配置双向TVS管，在其双向钳位电压参数能够符合具体应用要求的情况下，对第三支路的第二端和第二二极管D2的阳极均能够起到对输出节点电压的截止或分压作用，从而起到相应的隔离或电压保护作用。因此，其同时解决了上电时第二可控开关Q2的击穿问题、低输入电压情况下第二二极管D2的击穿问题，使其选型符合成本要求，并且使得新引入的第四支路和第五支路的各器件在正常工作时均不会对母线电容的均压产生影响。
实施例15
参照图16，其对应于本发明的实施例15，其在图15示出的实施例14的基础上对其改进。实施例14虽然如实施例11-12一样，在低输入电压情况下降低了C点电压，使其大约稳定在450V左右，从而在C点提供了低电压环境，但该C点电压仍然会通过第一电容C1、第一可控开关Q1的体二极管传递至输入端，若输入端的电阻不够大，仍然可能发生电击事故。为了使输入端的操作更加安全，所述第五支路还设有限流电阻R1，其串接于所述第四二极管D4，以将电流限制在安全范围，降低输入端发生电击事故的概率。
应当理解的是，本实施例的限流电阻R1可以被加设于实施例7-13中的任一第五支路，以具有相同的效果，尤其是在实施例11、12、13这样在C点提供了低电压环境的情形下，其效果更佳。
实施例16-18
以下通过实施例16-18介绍上述多电平升压电路的具体应用，当然，其具体的应用场景并不限于这些实施例。
参照图17，本发明实施例16提供了一种逆变装置，其包括前级电路和后级逆变电路。所述前级电路采用上述技术方案所述的多电平升压电路。
所述多电平升压电路用于将由其输入端输入的电压升压后从所述输出端输出，所述逆变电路的输入端耦合该多电平升压电路的输出端，用以将其输出的直流电逆变为交流电。
参照图18，本发明实施例17提供了一种光伏发电装置，其包括光伏组件PV、前级电路和后级电路；所述前级电路采用如上述技术方案所述的多电平升压电路。
所述光伏组件PV与多电平升压电路一一对应且与其输入端耦合；所述升压电路用于将光伏组件PV的输出电压升压后由其输出端输出至后级电路。
参照图19，本发明实施例18提供了一种光伏发电系统，包括至少两个如实施例17所提供的光伏发电装置；其中，若干个光伏发电装置的前级电路的输出端并联后连接至后级电路，从而构成集散式光伏发电系统。
实施例16-18的装置和系统，由于采用了前述实施例的多电平升压电路，因而其继承了该升压电路的全部优势。
上述说明书和实施例的描述，用于解释本发明保护范围，但并不构成对本发明保护范围的限定。通过本发明或上述实施例的启示，本领域普通技术人员结合公知常识、本领域的普通技术知识和/或现有技术，通过合乎逻辑的分析、推理或有限的试验可以得到的对本发明实施例或其中一部分技术特征的修改、等同替换或其他改进，均应包含在本发明的保护范围之内。

Claims (13)

  1. 一种多电平升压电路，其具有第一输入端、第二输入端、第一输出端、第二输出端，并包括电感、第一可控开关、第二可控开关、第一电容、第一二极管、第二二极管以及输出电容组；其特征在于：还包括第一TVS管；
    所述第一可控开关和第二可控开关串接后构成第一支路，其中，第一可控开关的第一端和第二可控开关的第二端分别构成该第一支路的第一端和第二端；
    所述第一二极管和第二二极管串接后构成第二支路，其中，第一二极管的阳极和第二二极管的阴极分别构成该第二支路的第一端和第二端；
    所述第一电容构成第三支路，其两端分别构成该第三支路的第一端和第二端；
    所述第一TVS管构成第四支路，其负极和正极分别构成该第四支路的第一端和第二端；
    所述输出电容组连接所述第一输出端和第二输出端，其包含至少两个串接的输出电容，以构成至少一个被配置为各输出电容间公共点的输出节点；
    所述第一支路和第二支路的第一端均通过所述电感连接第一输入端，其第二端分别连接第二输入端和第一输出端；所述第二输入端还连接第二输出端；
    所述第三支路的第一端连接第二支路中第一二极管和第二二极管的公共点，其第二端连接第一支路中第一可控开关和第二可控开关的公共点；所述第四支路的第一端连接所述第三支路的第二端，其第二端连接一输出节点。
  2. 如权利要求1所述的多电平升压电路，其特征在于：所述第一TVS管为单向TVS管；
    所述第四支路还设有第三二极管，其阴极与第一TVS管的负极连接，其阳极构成该第四支路的第一端。
  3. 如权利要求1所述的多电平升压电路，其特征在于：所述第四支路还设有第二TVS管，其正极与第一TVS管的正极连接，其负极构成所述第四支路的第二端；
    所述第一TVS管和第二TVS管均为单向TVS管。
  4. 如权利要求1所述的多电平升压电路，其特征在于：所述第一TVS管为双向TVS管，其两端分别构成第四支路的第一端和第二端。
  5. 如权利要求2所述的多电平升压电路，其特征在于：还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；
    所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接所述第四支路的第二端或所述第一TVS管和第三二极管的公共点。
  6. 如权利要求5所述的多电平升压电路，其特征在于：所述第五支路还设有第二TVS管或第三可控开关的一种；
    当第五支路设有第二TVS管时，其正极连接所述第四二极管的阳极，其负极连接所述第四支路的第二端或所述第一TVS管和第三二极管的公共点；
    当第五支路设有第三可控开关时，该第三可控开关为常闭继电器；所述电路还包括控制器，其用于在电路正常工作时，控制该第三可控开关断开。
  7. 如权利要求3所述的多电平升压电路，其特征在于：所述第四支路还设有第三二极管，其阴极与第一TVS管的负极连接，其阳极构成该第四支路的第一端；
    所述电路还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；
    所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接第一TVS管和第二TVS管的公共点。
  8. 如权利要求4所述的多电平升压电路，其特征在于：所述第四支路还设有第三二极管，其阴极与第一TVS管的一端连接，其阳极构成该第四支路的第一端；
    所述电路还包括第五支路，其上设有第四二极管，用于在第一输入端和第二输入端间的输入电压低于该升压电路的启动电压时，对所述第一二极管和第二二极管的公共点进行钳位；
    所述第四二极管的阴极连接所述第一二极管和第二二极管的公共点，其阳极连接第一TVS管和第三二极管的公共点。
  9. 如权利要求5-8中任一项所述的多电平升压电路，其特征在于：所述第五支路还设有限流电阻，其串接于所述第四二极管。
  10. 如权利要求1-8中任一项所述的多电平升压电路，其特征在于：所述输出电容组包含两个容值相同的输出电容。
  11. 一种逆变装置，其特征在于：包括后级逆变电路和前级电路；所述前级电路采用如权利要求1-10中任一项所述的多电平升压电路；
    所述多电平升压电路用于将由其输入端输入的电压升压后从所述输出端输出；
    所述逆变电路的输入端耦合该多电平升压电路的输出端，用以将其输出的直流电逆变为交流电。
  12. 一种光伏发电装置，其特征在于：包括光伏组件、前级电路和后级电路；所述前级电路采用如权利要求1-10中任一项所述的多电平升压电路；
    所述光伏组件与多电平升压电路一一对应且与其输入端耦合；所述多电平升压电路用于将光伏组件的输出电压升压后由其输出端输出至后级电路。
  13. 一种光伏发电系统，其特征在于：包括至少两个如权利要求12所述的光伏发电装置；其中，若干个光伏发电装置的前级电路的输出端并联后连接至后级电路。
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