WO2021110092A1 - 分屏控制的Micro-LED显示屏 - Google Patents

分屏控制的Micro-LED显示屏 Download PDF

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WO2021110092A1
WO2021110092A1 PCT/CN2020/133581 CN2020133581W WO2021110092A1 WO 2021110092 A1 WO2021110092 A1 WO 2021110092A1 CN 2020133581 W CN2020133581 W CN 2020133581W WO 2021110092 A1 WO2021110092 A1 WO 2021110092A1
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module
screen
display
data
micro
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PCT/CN2020/133581
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English (en)
French (fr)
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刘召军
何磊
吕志坚
范柚攸
童猜裕
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深圳市思坦科技有限公司
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Publication of WO2021110092A1 publication Critical patent/WO2021110092A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • This application relates to display technology, for example, to a Micro-LED display screen controlled by a split screen.
  • Micro-LED is a new generation of display technology, which has higher display brightness, better luminous efficiency, and lower power consumption than the existing organic light-emitting diode (OLED) technology.
  • the display principle of Micro-LED is to thin, miniaturize, and array the light-emitting diode (LED) structure design.
  • the size of the Micro-LED is only within 100 ⁇ m.
  • CMOS complementary metal oxide semiconductor
  • the present application provides a Micro-LED display screen controlled by a split screen to achieve the effect of reducing the power consumption of the control circuit.
  • a Micro-LED display screen controlled by split screen including:
  • the display module includes a plurality of display sub-screens, and each display sub-screen includes a plurality of pixels arranged in a matrix;
  • a scanning module connected to the display module, configured to generate a scanning signal and control to scan each row of pixels in the display sub-screen according to the scanning signal;
  • the data module is connected to the display module and is configured to generate multiple sets of data signals, and each set of data signals is used to separately drive a display sub-screen. When each row of pixels is scanned, each column of the display sub-screen displays an image;
  • the clock module is connected to the scan module and the data module, and is configured to generate a clock signal and provide it to the scan module and the data module.
  • FIG. 1 is a schematic diagram of the system structure of a micro-LED display screen with split-screen control provided in the first embodiment of the application;
  • FIG. 2 is a schematic structural diagram of a display module provided in Embodiment 1 of the application;
  • Fig. 3 is a schematic structural diagram of a micro-LED display screen with split-screen control provided in the second embodiment of the application.
  • first”, “second”, etc. may be used herein to describe various directions, actions, steps or elements, etc., but these directions, actions, steps or elements are not limited by these terms. These terms are only used to distinguish a first direction, action, step or element from another direction, action, step or element.
  • the first buffer can be referred to as the second buffer
  • the second buffer can be referred to as the first buffer. Both the first buffer and the second buffer are buffers, but they are not the same buffer.
  • the terms “first”, “second”, etc. cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • the features defined with “first” and “second” may explicitly or implicitly include one or more of these features.
  • "a plurality of” means at least two, such as two, three, etc., unless specifically defined otherwise.
  • FIG. 1 is a schematic diagram of the system structure of a micro-LED display screen controlled by a split screen provided in the first embodiment of the application.
  • the Micro-LED display screen controlled by a split screen provided in this embodiment can be applied to a Micro-LED display High screen refresh rate or high resolution brings a huge burden to the control circuit.
  • the Micro-LED display screen controlled by the split screen includes:
  • the display module 1 includes multiple display sub-screens, and each display sub-screen includes multiple pixels arranged in a matrix.
  • the entire Micro-LED display screen is divided into N equal parts in the vertical direction.
  • N is a natural number greater than 1.
  • the specific value range of N needs to be determined according to actual conditions. Generally, it can be divided according to the actual situation.
  • the serial data of each segment of the screen is converted into parallel data to determine the clock frequency.
  • serial data refers to the data transmitted in sequence during the transmission process
  • parallel data refers to the simultaneous transmission of all data bits.
  • serial data is converted into parallel data by shift register.
  • a Micro-LED display with a general resolution of 4K and a refresh rate of 120Hz requires a clock frequency of up to 1GHz.
  • the display module 1 is divided into 10 equal parts, the first display sub-screen 10, the second display sub-screen 11...the tenth display sub-screen 19
  • the serial to parallel process of serial data must be completed within one cycle of the clock of the control data input, and then the parallel data is output to a certain row of pixel units, so for a 1000x1000 pixel array ,
  • the serial to parallel control clock frequency is 1000 times faster than the data output clock.
  • the refresh rate of the array is 120Hz
  • the data output clock frequency is 120KHz
  • the serial-to-parallel clock frequency is 120MHz
  • the consumption is proportional to the clock frequency.
  • the above 1000x1000 pixel array is divided into 10 columns by column, and each sub-array pixel is 1000x100.
  • the data output clock of multiple display split screens can be shared, so the data output clock frequency will be reduced by 10 times, resulting in serial to parallel clock
  • the frequency is reduced by 10 times to 12MHz
  • the data pressure of each serial bus input into the sub-array is reduced by 10 times
  • the dynamic power consumption of the column circuit is reduced by 10 times
  • relatively low-frequency clock signals are easier to generate.
  • the scanning module 2 is connected to a plurality of display sub-screens of the display module 1, and is configured to generate a scanning signal and control to scan each row of pixels in the display sub-screen according to the scanning signal.
  • the scanning of the Micro-LED display screen refers to the ratio of the number of lines that are simultaneously lit in a certain display area to the number of lines in the entire area.
  • Common scanning methods include static scanning and dynamic scanning. Dynamic scanning can be divided into 1/2 scan, 1/4 scan, 1/8 scan and 1/16 scan. Static scanning is a "point-to-point" control from the output of the driver integrated circuit (IC) to the pixels. Static scanning does not require a control circuit, and the cost is higher than dynamic scanning, but it has good display effects, good stability, and brightness loss The advantages of smaller and so on. Dynamic scanning is a "point-to-column" control from the output of the driver IC to the pixel points.
  • Dynamic scanning requires a control circuit, and the cost is lower than static scanning, but the display effect is poor and the brightness loss is greater.
  • a dynamic scan or a static scan can be selected according to actual conditions, a scan signal is generated, and each row of pixels in the display sub-screen is scanned according to the scan signal according to a preset rule.
  • the data module 3 is connected to the display module 1 and is configured to generate multiple sets of data signals, and each set of data signals is used to separately drive a display sub-screen. When each row of pixels is scanned, each column of the display sub-screen displays image.
  • the data module 3 can receive external image data and generate multiple sets of data signals according to the image data. According to the number N of the divided screens of the display, all the data signals are also divided into N equal parts for input. Exemplarily, if the display screen of 1000x1000 pixel array is divided into 10 equal parts, then each sub-array pixel is 1000x100. Therefore, at this time, 9 data lines need to be added to each display sub-screen, and the 1000-bit data The transmission is carried out after evenly dividing.
  • the first display split-screen receiving data is 0-99 digits
  • the second display split-screen receiving data is 100-199 digits
  • the third display split-screen receiving data is 200-299 Digits
  • the tenth display split-screen received data is 900-999 digits.
  • the data transmission between each display sub-screen does not interfere with each other, so 10 groups of data can be input at the same time, and 10 groups of data share a clock signal, the clock frequency will be reduced by 10 times.
  • the clock module 4 is connected to the scan module 2 and the data module 3, and is configured to generate a clock signal and provide it to the scan module 2 and the data module 3.
  • the clock module 4 is configured to generate a clock signal to synchronize the scan module 2 and the data module 3, so that while the scan module 2 performs scanning, the data module 3 performs data transmission.
  • the clock signal is the basis of sequential logic. It is used to determine when the state in the logic unit is updated. It is a semaphore with a fixed period and independent of operation.
  • the clock signal is generally generated by a clock generator.
  • the clock signal has only two levels, one is low level and the other is high level.
  • the clock signal is used to synchronize each process, and each process can only pass a rising edge or a falling edge. Edge to change the period output.
  • the clock module 4 includes a clock chip and a crystal oscillator circuit.
  • the clock chip includes a clock circuit.
  • the clock circuit is configured to generate a clock signal and transmit it to the single-chip microcomputer.
  • the clock circuit is generally composed of a central processing unit (CPU) and a control chip. A preset situation generates multiple sets of clock pulse signals.
  • the crystal oscillator circuit is configured to generate an oscillating signal and provide a beat to the clock chip.
  • the embodiment of the present application provides a Micro-LED display screen controlled by a split screen, including: a display module including a plurality of display split screens, each display split screen includes a plurality of pixels arranged in a matrix; a scanning module, and the The multiple display sub-screens of the display module are connected, and are configured to generate scan signals and scan each row of pixels in the display sub-screen according to the scan signals; the data module is connected to the display module and is configured to generate multiple sets of data signals Each group of data signals is used to separately drive a display sub-screen.
  • each column of pixels in the display sub-screen displays an image;
  • a clock module connected to the scanning module and the data module, is configured as Generate a clock signal and provide it to the scanning module and the data module.
  • FIG. 3 is a split screen provided in the second embodiment of the application.
  • the display module 1 includes multiple display sub-screens, and each display sub-screen includes multiple pixels arranged in a matrix.
  • the scanning module 2 is connected to the display module 1 and is configured to generate a scanning signal and control the scanning of each row of pixels in the display sub-screen according to the scanning signal.
  • the scanning module 2 includes a scanning driving chip, a shift register and a first buffer.
  • the shift register is connected between the scan driving chip and the first buffer, and the first buffer is connected to the display module 1.
  • the scan driving chip is configured to generate the scan signal
  • the shift register is configured to convert the scan signal into a line scan signal
  • the first buffer is configured to control each scan signal according to the clock signal and the line scan signal.
  • the row pixels are turned on in the first preset manner.
  • the scan module 2 includes a scan drive chip, a shift register, and a first buffer.
  • the scan drive chip is configured to generate the scan signal.
  • the scan drive chip is divided into a general-purpose chip and a special-purpose chip. Chips are generally used in low-end products of LED display screens, such as indoor single-color and dual-color screens.
  • a dedicated chip can be selected for scanning signal generation. Because the LED is a current characteristic device, that is, under the premise of saturated conduction, the brightness of the LED changes with the current size, and does not change with the voltage across the LED. , The scanning driver chip provides constant current source output to ensure stable driving of the LED and eliminate the flicker phenomenon of the LED.
  • the shift register is a circuit used to store binary data or codes.
  • the register is composed of a combination of flip-flops with storage function.
  • a flip-flop can store one bit of binary code, and the register that stores N bit of binary code needs n flip-flops to form.
  • Registers can be divided into basic registers and shift registers according to their functions.
  • the data in the shift register can be shifted to the right or left bit by bit under the action of the shift pulse.
  • the data can be input in parallel, output in parallel, serial input, serial output, parallel input, and serial output. Serial input, parallel output.
  • the buffer is a D flip-flop derived from the basic reset/set (RS) flip-flop structure, specifically a logic structure composed of some NAND gates.
  • the buffer is used for buffering scan signals in this embodiment, which has the advantages of saving storage space and improving the execution speed of instructions and the speed of reading and writing.
  • the data module 3 is connected to the display module 1 and is configured to generate multiple sets of data signals, and each set of data signals is used to separately drive a display sub-screen. When each row of pixels is scanned, each column of the display sub-screen displays image.
  • the data module 3 includes: a data driving chip and a second buffer.
  • the second buffer is connected between the data driving chip and the display module 1.
  • the data driving chip is configured to generate a data signal
  • the second buffer is configured to individually drive a display sub-screen according to each group of data signals.
  • each column of the display sub-screen displays an image.
  • the data module 3 further includes a plurality of data transmission lines, the number of the plurality of data transmission lines is the same as the number of the plurality of display sub-screens, and is configured to connect the display sub-screens and the second buffer .
  • the data module 3 includes a data drive chip, multiple data transmission lines and a second buffer.
  • the data drive chip is configured to generate multiple sets of data signals.
  • the specific structure of the data drive chip is similar to that of the scan drive chip.
  • Multiple groups of data signals are sent to multiple display sub-screens. In one clock cycle, when each row of pixels in the display sub-screen is scanned, each group of data controls the corresponding pixel to light up to form a display image.
  • the screen is connected to the data drive chip through multiple data transmission lines at the same time, so the data drive chip can transmit multiple sets of data at the same time.
  • the second buffer is the same as the first buffer, and is used for buffering data signals in this embodiment, and also has the advantages of saving storage space and improving the execution speed of instructions and the speed of reading and writing.
  • the clock module 4 is connected to the scan module 2 and the data module 3, and is configured to generate a clock signal and provide it to the scan module 2 and the data module 3.
  • the main control chip 5, the main control chip 5 is connected to the data module 3 and the scanning module 2, and the main control chip 5 is configured to receive the image data signal transmitted from the outside, store and transmit it to the data module 3 and the scanning module 2 in.
  • the main control chip 5 may also be connected to the clock module 4, the data module 3 and the scanning module 2 at the same time.
  • the main control chip 5 is in the main control circuit of the Micro-LED display screen.
  • the main control circuit of the Micro-LED display screen generally includes: a communication interface, a main control chip 5, a scan drive circuit, a data drive circuit, and data. Memory, etc., where the main control chip 5 mainly receives the video or picture signal transmitted by the external host computer through the communication interface, and generates the corresponding scan signal and data signal to display the corresponding after scanning the driving circuit and the data driving circuit according to the video or picture signal
  • the data memory is used to store the data of the video or picture signal.
  • the main control chip 5 also has the function of color correction. Color correction is to correct the color cast of photos and images.
  • Color correction is a complementary color correction process of three primary colors RGB and three complementary colors CMY in an optical concept. Regardless of the above-mentioned color casts, neutral gray balance must be taken as the main principle, and the overall tonal restoration of photographic photos must be taken into consideration. It must not only conform to the feelings seen by the human eye on the spot, but also follow the scientific laws of photographic imaging and fineness. . Through color correction, the true colors of videos or pictures can be restored to the greatest extent.
  • the power supply module 6 is connected to the display module 1 and is configured to provide power to the Micro-LED display screen.
  • the power supply module 6 provides the working voltage of the Micro-LED display screen.
  • the voltage can be provided by directly connecting to an external power source through the charging interface, or can be provided by an internal battery, which can be replaced or repeatedly charged.
  • the embodiment of the present application provides a Micro-LED display screen controlled by a split screen, including: a display module 1, including a plurality of display split screens, each display split screen includes a plurality of pixels arranged in a matrix; a scanning module 2, and The multiple display sub-screens of the display module 1 are connected, and are configured to generate scan signals and scan each row of pixels in the display sub-screens according to the scan signals; the data module 3 is connected to the display module 1 and is configured to Generate multiple sets of data signals, and each set of data signals is used to drive a display sub-screen separately.
  • each column of the display sub-screen displays an image; the clock module 4, and the scanning module 2 and all
  • the data module 3 is connected and configured to generate a clock signal and provide it to the scanning module 2 and the data module 3, the main control chip 5, and the main control chip 5 is connected to the data module 3 and the scanning module through the clock module 4
  • the module 2 is connected, and the main control chip 5 is configured to receive the image data signal transmitted from the outside, store and transmit it to the data module 3 and the scanning module 2.
  • the power supply module 6 is connected to the display module 1 and is configured to provide power to the Micro-LED display screen.

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  • Computer Hardware Design (AREA)
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Abstract

一种分屏控制的Micro-LED显示屏，包括：显示模块(1)，包括多个显示分屏(10-19)，每个显示分屏(10-19)中包括矩阵排列的多个像素；扫描模块(2)，与多个显示模块(1)相连，配置为产生扫描信号并根据扫描信号控制扫描显示分屏(10-19)中每行像素；数据模块(3)，与显示模块(1)相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏(10-19)在每行像素被扫描的时候显示分屏(10-19)中每列像素显示图像；时钟模块(4)，与扫描模块(2)和数据模块(3)连接，配置为产生时钟信号提供给扫描模块(2)和数据模块(3)。

Description

分屏控制的Micro-LED显示屏
本申请要求在2019年12月03日提交中国专利局、申请号为201911222761.0的中国专利申请的优先权，以上申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示屏技术，例如涉及一种分屏控制的Micro-LED显示屏。
背景技术
微发光二极管(Micro-LED)是新一代显示技术，比现有的有机发光二极管(OLED)技术制作的显示屏的显示亮度更高、发光效率更好、并且功耗更低。Micro-LED的显示原理，是将发光二极管(LED)结构设计进行薄膜化、微小化、阵列化，Micro-LED尺寸仅在100μm以内。将Micro-LED批量式转移至电路基板上之后，再利用物理沉积制程完成保护层与上电极，即可进行上基板的封装，形成结构简单的Micro-LED显示屏；其中，电路基板可为硬性或软性的透明或不透明基板。而要制成显示器，其晶片表面必须制作成如同LED显示器的阵列结构，且每一个像素点必须可定址控制、单独驱动点亮。若通过互补式金属氧化物半导体(CMOS)电路驱动则为主动定址驱动架构，Micro-LED阵列晶片与CMOS间可通过封装技术连接到一起。
随着用户对视觉享受的更高追求，显示技术也在不断革新，各种高分辨率、高刷新率的屏幕层出不穷，特别是Micro-LED显示技术的出现，在很小面积上可以容纳非常多的像素点，可将屏幕每一英寸上的像素数目(ppi)做到3000以上。但随着屏幕分辨率和刷新频率的不断提高(2K、4K甚至8K分辨率，120Hz、240Hz……)，驱动控制模块的设计压力也越来越大，对于4K分辨率、120Hz 的刷新频率，如果不对显示屏按列N分屏，列信号串行转并行的时钟频率需要高达1GHz，分辨率越高、刷新频率越快，该时钟频率就越高，频率很高的时钟信号难以获得，且会引起列控制电路动态功耗的急剧上升，给Micro-LED小尺寸显示屏的散热带来极大挑战。
发明内容
本申请提供一种分屏控制的Micro-LED显示屏，以实现降低控制电路功耗的效果。
一种分屏控制的Micro-LED显示屏，包括：
显示模块，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素；
扫描模块，与所述显示模块相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素；
数据模块，与所述显示模块相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像；
时钟模块，与所述扫描模块和所述数据模块连接，配置为产生时钟信号提供给所述扫描模块和所述数据模块。
附图说明
图1为本申请实施例一提供的一种分屏控制的Micro-LED显示屏的系统结构示意图；
图2为本申请实施例一提供的一种显示模块的结构示意图；
图3为本申请实施例二提供的一种分屏控制的Micro-LED显示屏的结构示 意图。
具体实施方式
下面结合附图和实施例对本申请作进一步的详细说明。在更加详细地讨论示例性实施例之前应当提到的是，一些示例性实施例被描述成作为流程图描绘的处理或方法。虽然流程图将各步骤描述成顺序的处理，但是其中的许多步骤可以被并行地、并发地或者同时实施。此外，各步骤的顺序可以被重新安排。当其操作完成时处理可以被终止，但是还可以具有未包括在附图中的附加步骤。处理可以对应于方法、函数、规程、子例程、子程序等等。
此外，术语“第一”、“第二”等可在本文中用于描述各种方向、动作、步骤或元件等，但这些方向、动作、步骤或元件不受这些术语限制。这些术语仅用于将第一个方向、动作、步骤或元件与另一个方向、动作、步骤或元件区分。举例来说，在不脱离本申请的范围的情况下，可以将第一缓存器称为第二缓存器，且类似地，可将第二缓存器称为第一缓存器。第一缓存器和第二缓存器两者都是缓存器，但其不是同一缓存器。术语“第一”、“第二”等而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
实施例一
图1为本申请实施例一提供的一种分屏控制的Micro-LED显示屏的系统结构示意图，本实施例中提供的一种分屏控制的Micro-LED显示屏可适用于Micro-LED显示屏刷新率较高或者分辨率较高对控制电路带来巨大负担的情况。 所述分屏控制的Micro-LED显示屏包括：
显示模块1，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素。
本实施例中，将整块Micro-LED显示屏在竖直方向上进行了N等分，N为大于1的自然数，具体N的取值范围需要根据实际情况进行确定，一般的，可以根据分屏的每一块显示分屏的串行数据转换为并行数据的时钟频率来确定，其中，串行数据是指传输过程中各数据位按顺序进行传输的数据，并行数据则是各数据位同时传送的数据，一般通过移位寄存器将串行数据转换为并行数据。一般分辨率为4K、刷新率为120Hz的Micro-LED显示屏，需要的时钟频率会高达1GHz，频率越高的时钟信号越难获得，因此会引起列控制电路动态功耗的急剧上升并且会对Micro-LED显示屏散热带来极大影响，因此分屏后的多个显示分屏的具体数量N需要考虑Micro-LED显示屏的分辨率、刷新率和像素阵列等等多方面因素。参阅图2，示例性的，以1000x1000Micro-LED像素阵列为例，对显示模块1进行10等分，第一块显示分屏10、第二块显示分屏11……第十块显示分屏19，对于列驱动单元，串行数据输入后先要在控制数据输入的时钟一个周期内完成串行数据的串行转并行过程，然后并行数据再输出到某行像素单元内，所以对于1000x1000像素阵列，串行转并行控制时钟频率要比数据输出时钟快1000倍。假设该阵列刷新率为120Hz，则数据输出时钟频率为120KHz，串行转并行时钟频率为120MHz，CMOS数字电路动态功耗为P＝1/2Cv^2f，在其他量不变的情况下，功耗与时钟频率成正比。对上述1000x1000像素阵列按列进行10分屏，每块子阵列像素为1000x100，然而多块显示分屏的数据输出时钟可以共用，这样数据输出时钟频率就会下降10倍，导致串行转并行时钟频率下降10倍，为12MHz，每个输入进子阵列的串行总线数据压力减小10倍，列电路的动态功耗下降10倍，相对低频率的时钟信号也比较容易产生。
扫描模块2，与所述显示模块1的多个显示分屏相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素。
本实施例中，Micro-LED显示屏的扫描指在一定的显示区域内，同时点亮的行数与整个区域行数的比例。常用的扫描方式有静态扫描和动态扫描，其中动态扫描又可以分为1/2扫、1/4扫、1/8扫和1/16扫。静态扫描是从驱动集成电路(IC)的输出到像素点之间实行“点对点”的控制，静态扫描不需要控制电路，成本比动态扫描要高，但是具有显示效果好，稳定性好，亮度损失较小等等的优点。动态扫描是从驱动IC的输出到像素点之间实行“点对列”的控制，动态扫描需要控制电路，成本比静态扫描要低，但是显示效果较差，亮度损失较大。在实际应用的情况中，可以根据实际情况选择动态扫描或者静态扫描的方式，产生扫描信号再根据扫描信号按预设规则扫描所述显示分屏中每行像素。
数据模块3，与所述显示模块1相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像。
本实施例中，数据模块3可以接收外部的图像数据并根据图象数据产生多组数据信号，根据显示分屏的分屏数量N，将所有数据信号也进行N等分进行输入。示例性的，若将1000x1000像素阵列的显示屏进行10等分，那么每块子阵列像素为1000x100，因此，此时需要增加9条数据线连接到每块显示分屏，并将1000位的数据进行均分后传输，示例性的，第一块显示分屏接收数据为0-99位，第二块显示分屏接收数据为100-199位，第三块显示分屏接收数据为200-299位，依次类推，第十块显示分屏接收数据为900-999位。每块显示分屏之间的数据传输互不干扰，因此可以同时输入10组数据，并且10组数据共用一个时钟信号，时钟频率就会下降10倍。
时钟模块4，与所述扫描模块2和所述数据模块3连接，配置为产生时钟信号提供给所述扫描模块2和所述数据模块3。
本实施例中，时钟模块4配置为产生时钟信号以同步扫描模块2和数据模块3，使扫描模块2进行扫描的同时，数据模块3进行数据传输。时钟信号是时序逻辑的基础，用于决定逻辑单元中的状态何时更新，是有固定周期并与运行无关的信号量。时钟信号一般由时钟发生器产生的，时钟信号只有两个电平，一是低电平，另一个是高电平，一般使用时钟信号同步各个进程，各个进程之间只能通过上升沿或下降沿来改变周期输出。示例性的，时钟模块4包括时钟芯片和晶振电路，时钟芯片包括时钟电路，时钟电路配置为产生时钟信号并传输到单片机中，时钟电路一般由中央处理单元(CPU)和控制芯片组成，可根据预设情况产生多组时钟脉冲信号。晶振电路配置为产生振荡信号并给时钟芯片提供节拍。
本申请实施例提供了一种分屏控制的Micro-LED显示屏，包括：显示模块，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素；扫描模块，与所述显示模块的多个显示分屏相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素；数据模块，与所述显示模块相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像；时钟模块，与所述扫描模块和所述数据模块连接，配置为产生时钟信号提供给所述扫描模块和所述数据模块。本申请实施例解决了相关技术中显示屏内部列控制电路动态功耗巨大，频率很高的时钟信号难以获得的问题，实现了降低控制电路功耗的效果。
实施例二
本实施例是在实施例一的基础上，增加了多个辅助功能模块以实现其他功能并且将实施例一中的各模块进行细化，图3为本申请实施例二提供的一种分屏控制的Micro-LED显示屏的结构示意图。参阅图3，一种分屏控制的Micro-LED显示屏，包括：
显示模块1，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素。
扫描模块2，与所述显示模块1相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素。所述扫描模块2包括：扫描驱动芯片、移位寄存器和第一缓存器。所述移位寄存器连接在所述扫描驱动芯片和所述第一缓存器之间，所述第一缓存器连接到所述显示模块1。所述扫描驱动芯片配置为产生所述扫描信号，所述移位寄存器配置为将所述扫描信号转换为行扫描信号，所述第一缓存器配置为根据所述时钟信号和行扫描信号控制每行像素按第一预设方式导通。
本实施例中，扫描模块2包括扫描驱动芯片、移位寄存器和第一缓存器，其中，扫描驱动芯片配置为产生所述扫描信号，一般的，扫描驱动芯片分为通用芯片和专用芯片，通用芯片一般用于LED显示屏的低端产品，如户内的单、双色屏等。本实施例中可选专用芯片进行扫描信号产生，由于LED是电流特性器件，即在饱和导通的前提下，LED亮度随着电流大小的变化而变化，不随着LED两端电压的变化而变化，扫描驱动芯片提供恒流源输出，以保证LED的稳定驱动，消除LED的闪烁现象。移位寄存器是用来存放二进制数据或代码的电路。寄存器是由具有存储功能的触发器组合起来构成的。一个触发器可以存储一位二进制代码，存放N位二进制代码的寄存器，需用n个触发器来构成。寄存器按功能可分为：基本寄存器和移位寄存器。移位寄存器中的数据可以在移位脉冲作用下依次逐位右移或左移，数据既可以并行输入、并行输出，也可以 串行输入、串行输出，还可以并行输入、串行输出，串行输入、并行输出。缓存器是由基本的复位/置位(RS)触发器结构衍生出来的D触发器，具体是由一些与非门构成的逻辑结构。缓存器在本实施例中用于缓存扫描信号，具有节省存储空间，提高指令的执行速度和读写速度的优点。
数据模块3，与所述显示模块1相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像。所述数据模块3包括：数据驱动芯片和第二缓存器。所述第二缓存器连接在所述数据驱动芯片和所述显示模块1之间。所述数据驱动芯片配置为产生数据信号，所述第二缓存器配置为根据每组数据信号单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像。替代实施例中，数据模块3还包括多条数据传输线，所述多条数据传输线的数量与所述多个显示分屏的数量相同，配置为连接所述显示分屏和所述第二缓存器。
本实施例中，数据模块3包括数据驱动芯片、多条数据传输线和第二缓存器，其中，数据驱动芯片配置为产生多组数据信号，数据驱动芯片与扫描驱动芯片的具体结构类似，通过传输多组数据信号到多个显示分屏中，在一个时钟周期内，当显示分屏中的每行像素被扫描时，每组数据控制对应的像素点点亮组成显示图像，由于多个显示分屏通过多条数据传输线同时与数据驱动芯片连接，因此数据驱动芯片可以同时传输多组数据。第二缓存器与第一缓存器相同，在本实施例中用于缓存数据信号，也具有节省存储空间，提高指令的执行速度和读写速度的优点。
时钟模块4，与所述扫描模块2和所述数据模块3连接，配置为产生时钟信号提供给所述扫描模块2和所述数据模块3。
主控芯片5，所述主控芯片5与所述数据模块3和扫描模块2连接，主控芯 片5配置为接收外界传输的图像数据信号存储并传输到所述数据模块3和所述扫描模块2中。或者，主控芯片5还可以同时与时钟模块4、数据模块3和扫描模块2相连。
本实施例中，主控芯片5处于Micro-LED显示屏的主控制电路中，Micro-LED显示屏的主控制电路一般包括：通讯接口、主控芯片5、扫描驱动电路、数据驱动电路和数据存储器等等，其中主控芯片5主要通过通讯接口接收外界上位机传输的视频或者图片信号，根据视频或者图片信号进行过扫描驱动电路和数据驱动电路后生成对应的扫描信号和数据信号来显示对应的视频或者图片，数据存储器用于存储视频或者图片信号的数据。在其他替代实施例中，主控芯片5还具有色彩校正的作用，色彩校正就是校正照片和图像的偏色，校色是一种光学概念的三基色RGB与三补色CMY的互补纠色过程。无论是上述哪种偏色都必须以中性灰平衡为大原则进行，而且要照顾到摄影照片色调还原的全局，既要符合人眼现场看到的感受也要遵循摄影成像和成色的科学规律。通过色彩校正可以最大限度还原视频或者图片的真实色彩。
电源模块6，所述电源模块6与所述显示模块1连接，配置为给Micro-LED显示屏提供电源。
本实施例中，电源模块6提供Micro-LED显示屏的工作电压，可以由通过充电接口直接连接外部电源提供电压，也可以由内部电池提供电压，内部电池可以更换使用或反复充电。
本申请实施例提供了一种分屏控制的Micro-LED显示屏，包括：显示模块1，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素；扫描模块2，与所述显示模块1的多个显示分屏相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素；数据模块3，与所述显示模块1相连， 配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像；时钟模块4，与所述扫描模块2和所述数据模块3连接，配置为产生时钟信号提供给所述扫描模块2和所述数据模块3，主控芯片5，所述主控芯片5通过所述时钟模块4与所述数据模块3和扫描模块2连接，主控芯片5配置为接收外界传输的图像数据信号存储并传输到所述数据模块3和所述扫描模块2中。电源模块6，所述电源模块6与所述显示模块1连接，配置为给Micro-LED显示屏提供电源。本申请解决了相关技术中显示屏内部列控制电路动态功耗巨大，频率很高的时钟信号难以获得的问题，实现了降低控制电路功耗的效果。

Claims (10)

  1. 一种分屏控制的Micro-LED显示屏，包括：
    显示模块，包括多个显示分屏，每个显示分屏中包括矩阵排列的多个像素；
    扫描模块，与所述显示模块相连，配置为产生扫描信号并根据所述扫描信号控制扫描所述显示分屏中每行像素；
    数据模块，与所述显示模块相连，配置为产生多组数据信号，每组数据信号用于单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像；
    时钟模块，与所述扫描模块和所述数据模块连接，配置为产生时钟信号提供给所述扫描模块和所述数据模块。
  2. 根据权利要求1所述的分屏控制的Micro-LED显示屏，其中，所述扫描模块包括：扫描驱动芯片、移位寄存器和第一缓存器。
  3. 根据权利要求2所述的分屏控制的Micro-LED显示屏，其中，所述移位寄存器连接在所述扫描驱动芯片和所述第一缓存器之间，所述第一缓存器连接到所述显示模块。
  4. 根据权利要求3所述的分屏控制的Micro-LED显示屏，其中，所述扫描驱动芯片配置为产生所述扫描信号，所述移位寄存器配置为将所述扫描信号转换为行扫描信号，所述第一缓存器配置为根据所述时钟信号和行扫描信号控制每行像素按第一预设方式导通。
  5. 根据权利要求1所述的分屏控制的Micro-LED显示屏，其中，所述数据模块包括：数据驱动芯片和第二缓存器。
  6. 根据权利要求5所述的分屏控制的Micro-LED显示屏，其中，所述第二缓存器连接在所述数据驱动芯片和所述显示模块之间。
  7. 根据权利要求6所述的分屏控制的Micro-LED显示屏，其中，所述数据 驱动芯片配置为产生所述数据信号，所述第二缓存器配置为根据每组数据信号单独驱动一个显示分屏在每行像素被扫描的时候所述显示分屏中每列像素显示图像。
  8. 根据权利要求7所述的分屏控制的Micro-LED显示屏，还包括多条数据传输线，所述多条数据传输线数量与所述多个显示分屏数量相同，所述多条数据传输线连接所述显示分屏和所述第二缓存器。
  9. 根据权利要求1至8任一项所述的分屏控制的Micro-LED显示屏，还包括主控芯片，所述主控芯片与所述数据模块和扫描模块连接，所述主控芯片配置为接收外界传输的图像数据信号存储并传输到所述数据模块和所述扫描模块中。
  10. 根据权利要求1至9任一项所述的分屏控制的Micro-LED显示屏，还包括电源模块，所述电源模块与所述显示模块连接，所述电源模块配置为给所述Micro-LED显示屏提供电源。
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