WO2021093223A1 - Polar modulation circuit and modulation method therefor - Google Patents

Polar modulation circuit and modulation method therefor Download PDF

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Publication number
WO2021093223A1
WO2021093223A1 PCT/CN2020/077370 CN2020077370W WO2021093223A1 WO 2021093223 A1 WO2021093223 A1 WO 2021093223A1 CN 2020077370 W CN2020077370 W CN 2020077370W WO 2021093223 A1 WO2021093223 A1 WO 2021093223A1
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signal
phase
amplitude
delay
modulation
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PCT/CN2020/077370
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French (fr)
Chinese (zh)
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潘少辉
胡胜发
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安凯(广州)微电子技术有限公司
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/04—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
    • H03F1/06—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

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  • the invention relates to the technical field of signal modulation, in particular to a polar coordinate modulation circuit and a modulation method thereof.
  • Polar modulation (polar coordinate modulation) is increasingly used in the structure of radio frequency transmitters because of its higher efficiency.
  • the structure diagram of a typical Polar modulated transmitter As shown in Figure 1, the structure diagram of a typical Polar modulated transmitter.
  • the polar coordinate conversion is performed through an algorithm to generate amplitude information and phase information respectively; the amplitude information is processed, mainly from digital to analog After DAC conversion, then filtering and amplifying; at the same time, the phase information and the local oscillator realize up-conversion together; finally, the amplitude modulation information and the mixed high-frequency signal (including phase modulation information) are transmitted through the power amplifier to achieve signal amplification and antenna transmission.
  • the process of amplitude information processing is generally direct digital amplitude information through DAC to convert analog signals, filter out high-frequency interference after filtering, and then amplitude information through op amp to improve driving ability and directly sent to PA for implementation.
  • the filter is generally a low-pass filter, mainly to filter out the high frequency interference of the DAC clock.
  • the amplitude modulation signal and the mixed high-frequency signal in time due to two different processing methods (for example, the filter will have a group delay), there must be a delay difference, this delay difference If it is too large, it will deteriorate the accuracy of the system modulation. It is necessary to precisely control this delay difference to make the modulation quality meet the design expectations.
  • the technical problem to be solved by the present invention is to provide a polar (polar coordinate) modulation method that accurately controls the delay difference between amplitude information and phase information, and can compensate for the path delay difference between the amplitude signal and the phase signal with high accuracy.
  • an embodiment of the present invention provides a polar coordinate modulation circuit, including:
  • Polar coordinate conversion unit used to perform polar coordinate conversion on the baseband I/Q two-way signal, and generate amplitude signal and phase signal respectively;
  • the first digital delay control unit is configured to perform several sampling latch delays on the amplitude signal to delay the first CLOCK period;
  • the second digital delay control unit is configured to perform several sampling latch delays on the phase signal, and delay the second CLOCK period;
  • the amplitude modulation unit is used to adjust the group delay of the amplitude signal after the delay adjustment through the several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, And generate an amplitude modulation signal according to the amplitude signal after the delay adjustment;
  • the phase modulation unit is used to generate a phase modulation signal according to the phase signal after the delay adjustment;
  • the power amplifier unit is used to generate the transmitted data in the radio frequency band by using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal.
  • the first CLOCK period is not equal to the second CLOCK period
  • the delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  • the phase modulation unit is configured to generate a phase modulation signal according to the phase signal after the delay adjustment, specifically,
  • the phase modulation unit includes:
  • the orthogonal coordinate conversion unit is configured to generate an orthogonal signal with a prescribed amplitude value according to the phase signal provided by the second digital delay control unit;
  • the quadrature modulation signal is used to generate a phase modulation signal in the radio frequency band according to the quadrature signal, and provide the phase modulation signal to the power amplifier unit.
  • the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter.
  • the first-order low-pass filter includes:
  • the signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
  • the input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch
  • connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
  • the second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
  • the embodiment of the present invention also provides a polar coordinate modulation method, including:
  • the group delay of the amplitude signal after the delay adjustment is adjusted through the several gear R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, and adjusted according to the delay Amplitude signal generated amplitude modulation signal, and at the same time a phase modulation signal is generated according to the phase signal after the delay adjustment;
  • the transmitted data is generated in the radio frequency band.
  • the first CLOCK period is not equal to the second CLOCK period
  • the delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  • the phase modulation signal is generated according to the phase signal after the delay adjustment, specifically,
  • a phase modulation signal is generated in the radio frequency band based on the quadrature signal.
  • digital delay control logic is added to the two channels of amplitude information processing and phase information processing, which can realize control so that the delay difference of one channel relative to the other channel is less than one CLK cycle.
  • a very fine adjustment control is made for the RC of the filter, so that the amplitude information delay can be adjusted finely.
  • the combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle. In theory, many gear RC adjustments can be made to make the group delay infinitely close to the design goal.
  • FIG. 1 is a schematic diagram of the structure of a commonly used Polar modulation transmitter in the background technology of the present invention
  • FIG. 2 is a schematic diagram of the amplitude signal processing flow of the background technology of the present invention.
  • FIG. 3 is a structural diagram of a polar coordinate modulation circuit provided by an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a digitally implemented delay control circuit provided by an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a prototype of a first-order filter provided by an embodiment of the present invention.
  • FIG. 6 is a schematic flowchart of a polar coordinate modulation method according to an embodiment of the present invention.
  • a polar coordinate modulation circuit including:
  • the polar coordinate conversion unit 10 is used to perform polar coordinate conversion on the baseband I/Q two-way signal to generate an amplitude signal and a phase signal respectively.
  • the first digital delay control unit 20 is configured to perform several sampling latch delays on the amplitude signal to delay the first CLOCK period.
  • the second digital delay control unit 30 is configured to perform several sampling and latch delays on the phase signal to delay the second CLOCK period.
  • the delay control can be either a sampling latch based on a D flip-flop or a sampling latch implemented by other logic.
  • the first CLOCK period is not equal to the second CLOCK period
  • the delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  • the two methods of delaying N clock cycles in the digital part of the digital clock and adjusting the filter group delay in the analog part are combined to precisely control the delay difference between the two sides, so that the delay difference is small enough to not affect the modulation quality.
  • the specific value of N on both sides is adjusted and compensated according to the delay difference on both sides
  • the amplitude modulation unit 40 is used to adjust the group delay of the amplitude signal after the delay adjustment through several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized , And generate an amplitude modulation signal according to the amplitude signal after the delay adjustment.
  • the group delay characteristic of its own filter is used to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is adjusted finely.
  • the combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle.
  • many R/C adjustments can be made to make the group delay infinitely close to the design goal.
  • the delay is 301ns; the phase information is the delay is 180ns; and the clock here is 20MHZ, each cycle is 50ns. That is, the amplitude and phase delay difference is 121ns; this When the phase information is shot twice with 20MHZ, the delay is 100ns; it becomes the amplitude delay of 301ns and the phase delay of 280ns; at this time, the delay difference is 21ns; there is no way to deal with this 21ns with 20MHZ clock, although it can Find a higher frequency clock, such as 200MHZ can achieve 5ns delay difference control, but half of the high frequency clock is difficult to obtain, and it is easy to introduce interference. Therefore, the final 21ns delay needs to be adjusted by fine-tuning the filter group delay. The adjustment step can be as small as 1ns, and finally the overall delay difference is less than 1ns.
  • the delay difference is less than 50ns, which is more difficult to control, and it can only be achieved in the range of +/-25ns.
  • the fine-tuning of the group delay can be controlled to +/-1ns or less (because the adjustment step size is related to the complexity of the adjustment, the step size is too small to be very complicated, and a lot of gear adjustments are required.)
  • the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter.
  • its structure can be passive R/C, or active R/C or Gm unit implementation. Other analog delay circuits can also be used.
  • the first-order low-pass filter includes:
  • the signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
  • the input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch
  • connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
  • the second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
  • the processing process of the amplitude modulation unit is shown in Figure 2, which mainly passes through the three modules of DAC/Filter/PGA.
  • the first-order prototype of the low-pass filter is shown in Figure 5, and the filter will have a group Delay and group delay are related to the filter structure and filter bandwidth.
  • the bandwidth is basically fixed, that is, when R0/C0 in Figure 4 is basically fixed, finely adjust whether R1/C1 participates in the role (that is, adjust switch S1 /S2)
  • the group delay can be adjusted more finely.
  • the delay difference between the amplitude information and the phase information is less than one CLOCK period, finely adjusting the group delay of the amplitude information can make the delay difference between the two signals very fine and achieve a good modulation effect.
  • the phase modulation unit 50 is configured to generate a phase modulation signal according to the phase signal after the delay adjustment.
  • the phase modulation unit is configured to generate a phase modulation signal according to the phase signal after the delay adjustment, specifically,
  • the phase modulation unit includes:
  • the orthogonal coordinate conversion unit is configured to generate an orthogonal signal with a prescribed amplitude value according to the phase signal provided by the second digital delay control unit;
  • the quadrature modulation signal is used to generate a phase modulation signal in the radio frequency band according to the quadrature signal, and provide the phase modulation signal to the power amplifier unit.
  • the power amplifier unit 60 is used to generate the transmitted data in the radio frequency band by using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal.
  • a digital control delay unit is added for the amplitude and phase information, and combined with the filter circuit in the amplitude information processing unit, the group delay characteristic of the filter is used to fine-tune the R/C. , So that the final equivalent two-way delay difference is small enough.
  • the embodiment of the present invention also provides a polar coordinate modulation method, including:
  • S100 Perform polar coordinate conversion on the I/Q signals of the baseband to generate amplitude signals and phase signals respectively.
  • the delay control can be either a sampling latch based on a D flip-flop or a sampling latch implemented by other logic.
  • the first CLOCK period is not equal to the second CLOCK period
  • the delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  • the two methods of delaying N clock cycles in the digital part of the digital clock and adjusting the filter group delay in the analog part are combined to precisely control the delay difference between the two sides, so that the delay difference is small enough to not affect the modulation quality.
  • the specific value of N on both sides is adjusted and compensated according to the delay difference on both sides
  • the group delay characteristic of its own filter is used to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is adjusted finely.
  • the combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle.
  • many R/C adjustments can be made to make the group delay infinitely close to the design goal.
  • the delay is 301ns; the phase information is the delay is 180ns; and the clock here is 20MHZ, each cycle is 50ns. That is, the amplitude and phase delay difference is 121ns; this When the phase information is shot twice with 20MHZ, the delay is 100ns; it becomes the amplitude delay of 301ns and the phase delay of 280ns; at this time, the delay difference is 21ns; there is no way to deal with this 21ns with 20MHZ clock, although it can Find a higher frequency clock, such as 200MHZ can achieve 5ns delay difference control, but half of the high frequency clock is difficult to obtain, and it is easy to introduce interference. Therefore, the final 21ns delay needs to be adjusted by fine-tuning the filter group delay. The adjustment step can be as small as 1ns, and finally the overall delay difference is less than 1ns.
  • the delay difference is less than 50ns, which is more difficult to control, and it can only be achieved in the range of +/-25ns.
  • the fine-tuning of the group delay can be controlled to +/-1ns or less (because the adjustment step size is related to the complexity of the adjustment, the step size is too small to be very complicated, and a lot of gear adjustments are required.)
  • the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter.
  • its structure can be passive R/C, or active R/C or Gm unit implementation. Other analog delay circuits can also be used.
  • the first-order low-pass filter includes:
  • the signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
  • the input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch
  • connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
  • the second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
  • the processing process of the amplitude modulation unit is shown in Figure 2, which mainly passes through the three modules of DAC/Filter/PGA.
  • the first-order prototype of the low-pass filter is shown in Figure 5, and the filter will have a group Delay and group delay are related to the filter structure and filter bandwidth.
  • the bandwidth is basically fixed, that is, when R0/C0 in Figure 4 is basically fixed, finely adjust whether R1/C1 participates in the role (that is, adjust switch S1 /S2)
  • the group delay can be adjusted more finely.
  • the delay difference between the amplitude information and the phase information is less than one CLOCK period, finely adjusting the group delay of the amplitude information can make the delay difference between the two signals very fine and achieve a good modulation effect.
  • the phase modulation signal is generated according to the phase signal after the delay adjustment, specifically,
  • a phase modulation signal is generated in the radio frequency band based on the quadrature signal.
  • a digital control delay unit is added for the amplitude and phase information, and combined with the filter circuit in the amplitude information processing unit, the group delay characteristic of the filter is used to fine-tune the R/C. , So that the final equivalent two-way delay difference is small enough.
  • the program can be stored in a computer readable storage medium, and the program can be stored in a computer readable storage medium. During execution, it may include the procedures of the above-mentioned method embodiments.
  • the storage medium may be a magnetic disk, an optical disc, a read-only memory (Read-Only Memory, ROM), or a random access memory (Random Access Memory, RAM), etc.

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Abstract

Provided are a polar modulation circuit and a modulation method therefor. Two methods, delaying N clock periods by means of a digital clock of a digital portion and adjusting a filter group delay by means of an analog portion are combined together, so that a delay difference between two sides is accurately controlled, and the delay difference is as small as possible without influencing the quality of modulation. The specific values of N of the two sides are adjusted and compensated for according to the delay difference between the two sides. According to the method, a path delay difference between an amplitude signal and a phase signal can be compensated for with high precision.

Description

一种极坐标调制电路及其调制方法Polar coordinate modulation circuit and its modulation method 技术领域Technical field
本发明涉及信号调制技术领域，尤其涉及一种极坐标调制电路及其调制方法。The invention relates to the technical field of signal modulation, in particular to a polar coordinate modulation circuit and a modulation method thereof.
背景技术Background technique
Polar调制(极坐标调制)越来越多的应用于射频发射机结构中，因为其较高的效率。Polar modulation (polar coordinate modulation) is increasingly used in the structure of radio frequency transmitters because of its higher efficiency.
如图1所示，典型Polar调制发射机结构图，对于基带的I/Q两路信号，通过算法进行极坐标转化，分别生成幅度信息和相位信息；幅度信息经过处理，主要是从数字到模拟经过DAC转化，然后滤波放大；同时相位信息和本振一起实现上变频；最后幅度调制信息和混频后的高频信号(包含相位调制信息)一起通过功放实现信号放大天线传输。As shown in Figure 1, the structure diagram of a typical Polar modulated transmitter. For the baseband I/Q two-way signal, the polar coordinate conversion is performed through an algorithm to generate amplitude information and phase information respectively; the amplitude information is processed, mainly from digital to analog After DAC conversion, then filtering and amplifying; at the same time, the phase information and the local oscillator realize up-conversion together; finally, the amplitude modulation information and the mixed high-frequency signal (including phase modulation information) are transmitted through the power amplifier to achieve signal amplification and antenna transmission.
如图2所示，幅度信息处理的流程，一般是直接数字幅度信息经过DAC转化位模拟信号，经过滤波器后滤除高频干扰，然后幅度信息经过运放提高驱动能力，直接送往PA实现幅度调制。滤波器一般是低通滤波器，主要是滤除DAC时钟的高频干扰。As shown in Figure 2, the process of amplitude information processing is generally direct digital amplitude information through DAC to convert analog signals, filter out high-frequency interference after filtering, and then amplitude information through op amp to improve driving ability and directly sent to PA for implementation. Amplitude modulation. The filter is generally a low-pass filter, mainly to filter out the high frequency interference of the DAC clock.
所以幅度调制信和混频后的高频信号(包含相位调制信息)在时间上因为两路不同的处理方法(例如滤波器会有一个群延时)，一定会存在延时差，这个延时差偏大就会恶化系统调制的精度，需要精确控制这个延时差才能让调制质量符合设计预期。Therefore, the amplitude modulation signal and the mixed high-frequency signal (including phase modulation information) in time due to two different processing methods (for example, the filter will have a group delay), there must be a delay difference, this delay difference If it is too large, it will deteriorate the accuracy of the system modulation. It is necessary to precisely control this delay difference to make the modulation quality meet the design expectations.
发明内容Summary of the invention
本发明所要解决的技术问题在于，提供一种精准控制幅度信息和相位信息延时差的polar(极坐标)调制方法，能够高精度地补偿幅度信号和相位信号之间的路径延迟差异。The technical problem to be solved by the present invention is to provide a polar (polar coordinate) modulation method that accurately controls the delay difference between amplitude information and phase information, and can compensate for the path delay difference between the amplitude signal and the phase signal with high accuracy.
为解决上述问题，本发明实施例提供一种极坐标调制电路，包括：To solve the above-mentioned problem, an embodiment of the present invention provides a polar coordinate modulation circuit, including:
极坐标转换单元，用于对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信号；Polar coordinate conversion unit, used to perform polar coordinate conversion on the baseband I/Q two-way signal, and generate amplitude signal and phase signal respectively;
第一数字延时控制单元，用于对所述幅度信号进行若干次采样锁存延时，延时第一CLOCK周期；The first digital delay control unit is configured to perform several sampling latch delays on the amplitude signal to delay the first CLOCK period;
第二数字延时控制单元，用于对所述相位信号进行若干次采样锁存延时， 延时第二CLOCK周期；The second digital delay control unit is configured to perform several sampling latch delays on the phase signal, and delay the second CLOCK period;
幅度调制单元，用于通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号；The amplitude modulation unit is used to adjust the group delay of the amplitude signal after the delay adjustment through the several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, And generate an amplitude modulation signal according to the amplitude signal after the delay adjustment;
相位调制单元，用于根据延时调节后的相位信号产生相位调制信号；The phase modulation unit is used to generate a phase modulation signal according to the phase signal after the delay adjustment;
功放单元，用于通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射频频带中产生所传送的数据。The power amplifier unit is used to generate the transmitted data in the radio frequency band by using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal.
优选地，所述第一CLOCK周期不等于第二CLOCK周期；Preferably, the first CLOCK period is not equal to the second CLOCK period;
经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
优选地，相位调制单元，用于根据延时调节后的相位信号产生相位调制信号，具体的，Preferably, the phase modulation unit is configured to generate a phase modulation signal according to the phase signal after the delay adjustment, specifically,
所述相位调制单元，包括：The phase modulation unit includes:
正交坐标转换单元，用于根据所述第二数字延时控制单元提供的相位信号，来产生具有规定的幅度值的正交信号；和，The orthogonal coordinate conversion unit is configured to generate an orthogonal signal with a prescribed amplitude value according to the phase signal provided by the second digital delay control unit; and,
正交调制信号，用于根据所述正交信号在射频频带中产生相位调制信号，并将所述相位调制信号提供给功放单元。The quadrature modulation signal is used to generate a phase modulation signal in the radio frequency band according to the quadrature signal, and provide the phase modulation signal to the power amplifier unit.
优选地，所述滤波器为低通滤波器，包括一阶低通滤波器和高阶低通滤波器。Preferably, the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter.
优选地，所述一阶低通滤波器，包括：Preferably, the first-order low-pass filter includes:
信号输入端通过串联连接的第一电阻、第二电阻连接至信号输出端；The signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
所述第二电阻的输入端通过第一开关连接所述第二电阻的输出端；The input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch;
所述第二电阻的输出端与所述信号输出端之间的连接线路上分别连接第一电容的第一端、第二电容的第一端；The connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
所述第二电容的第二端通过第二开关与所述第一电容的第二端连接，且所述第一电容的第二端接地。The second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
本发明实施例还提供一种极坐标调制方法，包括：The embodiment of the present invention also provides a polar coordinate modulation method, including:
对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信号；Perform polar coordinate conversion on the I/Q signals of the baseband to generate amplitude signal and phase signal respectively;
对所述幅度信号和所述相位信号分别进行若干次采样锁存延时，使所述幅度信号延时第一CLOCK周期，所述相位信号延时第二CLOCK周期；Performing several sampling latch delays on the amplitude signal and the phase signal respectively, so that the amplitude signal is delayed by a first CLOCK period, and the phase signal is delayed by a second CLOCK period;
通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号，同时根据延时调节后的相位信号产生相位调制信号；The group delay of the amplitude signal after the delay adjustment is adjusted through the several gear R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, and adjusted according to the delay Amplitude signal generated amplitude modulation signal, and at the same time a phase modulation signal is generated according to the phase signal after the delay adjustment;
通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射 频频带中产生所传送的数据。By using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal, the transmitted data is generated in the radio frequency band.
优选地，所述第一CLOCK周期不等于第二CLOCK周期；Preferably, the first CLOCK period is not equal to the second CLOCK period;
经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
优选地，所述根据延时调节后的相位信号产生相位调制信号，具体的，Preferably, the phase modulation signal is generated according to the phase signal after the delay adjustment, specifically,
根据延时调节后的相位信号，来产生具有规定的幅度值的正交信号；Generate a quadrature signal with a specified amplitude value according to the phase signal after the delay adjustment;
根据所述正交信号在射频频带中产生相位调制信号。A phase modulation signal is generated in the radio frequency band based on the quadrature signal.
实施本发明实施例具有如下有益效果：The implementation of the embodiments of the present invention has the following beneficial effects:
本发明在幅度信息处理和相位信息处理的两个通路上，分别加入数字延时控制逻辑，可以实现控制让其中一个通路相对于另一个通路的延时差小于一个CLK周期。同时在幅度信息处理模块中，利用里面滤波器模块的群延时特性，对于滤波器的RC做出很精细的调节控制，这样子再精细的调节幅度信息延时。两者结合就可以让两个通路的延时差在小于一个CLOCK周期内更小的一个范围，理论上可以做出很多挡位的RC调节让群延时无限接近设计目标。In the present invention, digital delay control logic is added to the two channels of amplitude information processing and phase information processing, which can realize control so that the delay difference of one channel relative to the other channel is less than one CLK cycle. At the same time, in the amplitude information processing module, using the group delay characteristics of the filter module inside, a very fine adjustment control is made for the RC of the filter, so that the amplitude information delay can be adjusted finely. The combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle. In theory, many gear RC adjustments can be made to make the group delay infinitely close to the design goal.
附图说明Description of the drawings
图1是本发明背景技术的常用Polar调制发射机结构示意图；FIG. 1 is a schematic diagram of the structure of a commonly used Polar modulation transmitter in the background technology of the present invention;
图2是本发明背景技术的幅度信号处理流程示意图；2 is a schematic diagram of the amplitude signal processing flow of the background technology of the present invention;
图3是本发明一个实施例提供的一种极坐标调制电路结构图；FIG. 3 is a structural diagram of a polar coordinate modulation circuit provided by an embodiment of the present invention;
图4是本发明一个实施例提供的数字实现的延时控制电路示意图；4 is a schematic diagram of a digitally implemented delay control circuit provided by an embodiment of the present invention;
图5是本发明一个实施例提供的一阶filter的原型示意图；FIG. 5 is a schematic diagram of a prototype of a first-order filter provided by an embodiment of the present invention;
图6是本发明一个实施例提供的一种极坐标调制方法的流程示意图。FIG. 6 is a schematic flowchart of a polar coordinate modulation method according to an embodiment of the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
应当理解，当在本说明书和所附权利要求书中使用时，术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。It should be understood that when used in this specification and appended claims, the terms "including" and "including" indicate the existence of the described features, wholes, steps, operations, elements and/or components, but do not exclude one or The existence or addition of multiple other features, wholes, steps, operations, elements, components, and/or collections thereof.
还应当理解，在此本发明说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本发明。如在本发明说明书和所附权利要求书中所使用的那样，除非上下文清楚地指明其它情况，否则单数形式的“一”、“一个”及“该”意在包括复数形式。It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
还应当进一步理解，在本发明说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。It should also be further understood that the term "and/or" used in the specification and appended claims of the present invention refers to any combination of one or more of the items listed in the associated and all possible combinations, and includes these combinations .
请参阅图3‐4。Please refer to Figure 3-4.
一种极坐标调制电路，包括：A polar coordinate modulation circuit, including:
极坐标转换单元10，用于对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信号。The polar coordinate conversion unit 10 is used to perform polar coordinate conversion on the baseband I/Q two-way signal to generate an amplitude signal and a phase signal respectively.
第一数字延时控制单元20，用于对所述幅度信号进行若干次采样锁存延时，延时第一CLOCK周期。The first digital delay control unit 20 is configured to perform several sampling latch delays on the amplitude signal to delay the first CLOCK period.
第二数字延时控制单元30，用于对所述相位信号进行若干次采样锁存延时，延时第二CLOCK周期。The second digital delay control unit 30 is configured to perform several sampling and latch delays on the phase signal to delay the second CLOCK period.
在具体的实施例当中，延时控制既可以是基于D触发器的采样锁存，也可以是通过其它逻辑实现的采样锁存。In a specific embodiment, the delay control can be either a sampling latch based on a D flip-flop or a sampling latch implemented by other logic.
优选地，所述第一CLOCK周期不等于第二CLOCK周期；Preferably, the first CLOCK period is not equal to the second CLOCK period;
经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
通过数字部分数字clock延迟N个clock周期和模拟部分调节filter群延时两个方法结合一起，精确控制两边的延时差，让延时差小到不影响调制质量。两边具体N的数值大小依据两边的延时差去调节补偿The two methods of delaying N clock cycles in the digital part of the digital clock and adjusting the filter group delay in the analog part are combined to precisely control the delay difference between the two sides, so that the delay difference is small enough to not affect the modulation quality. The specific value of N on both sides is adjusted and compensated according to the delay difference on both sides
幅度调制单元40，用于通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号。The amplitude modulation unit 40 is used to adjust the group delay of the amplitude signal after the delay adjustment through several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized , And generate an amplitude modulation signal according to the amplitude signal after the delay adjustment.
在具体的实施例当中，在幅度调制单元中，利用自身滤波器的群延时特性，对于滤波器的R/C做出很精细的调节控制，这样子再精细的调节幅度信息延时。两者结合就可以让两个通路的延时差在小于一个CLOCK周期内更小的一个范围，理论上可以做出很多挡位的R/C调节让群延时无限接近设计目标。In a specific embodiment, in the amplitude modulation unit, the group delay characteristic of its own filter is used to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is adjusted finely. The combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle. In theory, many R/C adjustments can be made to make the group delay infinitely close to the design goal.
需要说明的是，比如幅度信息处理后送给PA，延时是301ns；相位信息是延时是180ns；而这里的clock是20MHZ,每个周期50ns.即幅度和相位延时差有121ns；此时通过对相位信息用20MHZ打两拍，延时100ns；就变成了幅度延时301ns，相位延时280ns；此时延时差就是21ns；这个21ns用20MHZ clock处理就没有办法了，虽然可以找更高频的clock，比如200MHZ可以实现5ns的延时差控制，但一半高频clock很难获取，并且容易引入干扰。所以，这最后的21ns延时，就需要通过filter群延时的微调来调节，这个调节的步径可以很小比如1ns，最后让整个延时差小于1ns。It should be noted that, for example, after the amplitude information is processed and sent to the PA, the delay is 301ns; the phase information is the delay is 180ns; and the clock here is 20MHZ, each cycle is 50ns. That is, the amplitude and phase delay difference is 121ns; this When the phase information is shot twice with 20MHZ, the delay is 100ns; it becomes the amplitude delay of 301ns and the phase delay of 280ns; at this time, the delay difference is 21ns; there is no way to deal with this 21ns with 20MHZ clock, although it can Find a higher frequency clock, such as 200MHZ can achieve 5ns delay difference control, but half of the high frequency clock is difficult to obtain, and it is easy to introduce interference. Therefore, the final 21ns delay needs to be adjusted by fine-tuning the filter group delay. The adjustment step can be as small as 1ns, and finally the overall delay difference is less than 1ns.
对于20M clock的处理，延时差小于50ns，就比较难以控制了，只能做到 +/‐25ns范围。此时引入群延时的微调，就可以控制到+/‐1ns或者更小(因为调节步径和调节的复杂度相关，步径太小就非常复杂,需要很多挡位调节。)For 20M clock processing, the delay difference is less than 50ns, which is more difficult to control, and it can only be achieved in the range of +/-25ns. At this time, the fine-tuning of the group delay can be controlled to +/-1ns or less (because the adjustment step size is related to the complexity of the adjustment, the step size is too small to be very complicated, and a lot of gear adjustments are required.)
优选地，所述滤波器为低通滤波器，包括一阶低通滤波器和高阶低通滤波器。同时，其结构可以是无源R/C的，也可以是有源R/C或者Gm单元实现的。也可以使用其他的模拟延时电路。Preferably, the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter. At the same time, its structure can be passive R/C, or active R/C or Gm unit implementation. Other analog delay circuits can also be used.
优选地，所述一阶低通滤波器，包括：Preferably, the first-order low-pass filter includes:
信号输入端通过串联连接的第一电阻、第二电阻连接至信号输出端；The signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
所述第二电阻的输入端通过第一开关连接所述第二电阻的输出端；The input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch;
所述第二电阻的输出端与所述信号输出端之间的连接线路上分别连接第一电容的第一端、第二电容的第一端；The connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
所述第二电容的第二端通过第二开关与所述第一电容的第二端连接，且所述第一电容的第二端接地。The second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
在具体的实施例当中，幅度调制单元的处理过程如图2所示，主要是要经过DAC/Filter/PGA这3个模块，其中，低通filter一阶原型如图5示，filter都会有群延时，群延时大小和filter结构以及filter的带宽相关，在其带宽基本固定的情况下，即图4中R0/C0基本固定时，精细的调节R1/C1是否参与作用(即调节开关S1/S2),就可以更精细的调节群延时。在幅度信息和相位信息的延时差已经小于一个CLOCK周期时，精细的调节幅度信息的群延时，就可以让两路信号的延时差非常精细，实现很好的调制效果。In a specific embodiment, the processing process of the amplitude modulation unit is shown in Figure 2, which mainly passes through the three modules of DAC/Filter/PGA. Among them, the first-order prototype of the low-pass filter is shown in Figure 5, and the filter will have a group Delay and group delay are related to the filter structure and filter bandwidth. When the bandwidth is basically fixed, that is, when R0/C0 in Figure 4 is basically fixed, finely adjust whether R1/C1 participates in the role (that is, adjust switch S1 /S2), the group delay can be adjusted more finely. When the delay difference between the amplitude information and the phase information is less than one CLOCK period, finely adjusting the group delay of the amplitude information can make the delay difference between the two signals very fine and achieve a good modulation effect.
相位调制单元50，用于根据延时调节后的相位信号产生相位调制信号。The phase modulation unit 50 is configured to generate a phase modulation signal according to the phase signal after the delay adjustment.
优选地，相位调制单元，用于根据延时调节后的相位信号产生相位调制信号，具体的，Preferably, the phase modulation unit is configured to generate a phase modulation signal according to the phase signal after the delay adjustment, specifically,
所述相位调制单元，包括：The phase modulation unit includes:
正交坐标转换单元，用于根据所述第二数字延时控制单元提供的相位信号，来产生具有规定的幅度值的正交信号；和，The orthogonal coordinate conversion unit is configured to generate an orthogonal signal with a prescribed amplitude value according to the phase signal provided by the second digital delay control unit; and,
正交调制信号，用于根据所述正交信号在射频频带中产生相位调制信号，并将所述相位调制信号提供给功放单元。The quadrature modulation signal is used to generate a phase modulation signal in the radio frequency band according to the quadrature signal, and provide the phase modulation signal to the power amplifier unit.
功放单元60，用于通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射频频带中产生所传送的数据。The power amplifier unit 60 is used to generate the transmitted data in the radio frequency band by using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal.
在polar调制的发射机架构里，对于幅度和相位两路信息分别增加数字控制延时单元，同时结合幅度信息处理单元中的滤波器电路，利用滤波器的群延时特性，精细调节R/C，让最后等效的两路延时差足够小。In the polar modulated transmitter architecture, a digital control delay unit is added for the amplitude and phase information, and combined with the filter circuit in the amplitude information processing unit, the group delay characteristic of the filter is used to fine-tune the R/C. , So that the final equivalent two-way delay difference is small enough.
本发明实施例还提供一种极坐标调制方法，包括：The embodiment of the present invention also provides a polar coordinate modulation method, including:
S100、对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信 号。S100: Perform polar coordinate conversion on the I/Q signals of the baseband to generate amplitude signals and phase signals respectively.
S200、对所述幅度信号和所述相位信号分别进行若干次采样锁存延时，使所述幅度信号延时第一CLOCK周期，所述相位信号延时第二CLOCK周期。S200. Perform several sampling latch delays on the amplitude signal and the phase signal respectively, so that the amplitude signal is delayed by a first CLOCK period, and the phase signal is delayed by a second CLOCK period.
在具体的实施例当中，延时控制既可以是基于D触发器的采样锁存，也可以是通过其它逻辑实现的采样锁存。In a specific embodiment, the delay control can be either a sampling latch based on a D flip-flop or a sampling latch implemented by other logic.
优选地，所述第一CLOCK周期不等于第二CLOCK周期；Preferably, the first CLOCK period is not equal to the second CLOCK period;
经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
通过数字部分数字clock延迟N个clock周期和模拟部分调节filter群延时两个方法结合一起，精确控制两边的延时差，让延时差小到不影响调制质量。两边具体N的数值大小依据两边的延时差去调节补偿The two methods of delaying N clock cycles in the digital part of the digital clock and adjusting the filter group delay in the analog part are combined to precisely control the delay difference between the two sides, so that the delay difference is small enough to not affect the modulation quality. The specific value of N on both sides is adjusted and compensated according to the delay difference on both sides
S300、通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号，同时根据延时调节后的相位信号产生相位调制信号。S300. Adjust the group delay of the amplitude signal after the delay adjustment through several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, and according to the delay The adjusted amplitude signal generates an amplitude modulation signal, and at the same time, a phase modulation signal is generated according to the phase signal after the delay adjustment.
在具体的实施例当中，在幅度调制单元中，利用自身滤波器的群延时特性，对于滤波器的R/C做出很精细的调节控制，这样子再精细的调节幅度信息延时。两者结合就可以让两个通路的延时差在小于一个CLOCK周期内更小的一个范围，理论上可以做出很多挡位的R/C调节让群延时无限接近设计目标。In a specific embodiment, in the amplitude modulation unit, the group delay characteristic of its own filter is used to make a very fine adjustment control on the R/C of the filter, so that the amplitude information delay is adjusted finely. The combination of the two can make the delay difference of the two channels within a smaller range less than one CLOCK cycle. In theory, many R/C adjustments can be made to make the group delay infinitely close to the design goal.
需要说明的是，比如幅度信息处理后送给PA，延时是301ns；相位信息是延时是180ns；而这里的clock是20MHZ,每个周期50ns.即幅度和相位延时差有121ns；此时通过对相位信息用20MHZ打两拍，延时100ns；就变成了幅度延时301ns，相位延时280ns；此时延时差就是21ns；这个21ns用20MHZ clock处理就没有办法了，虽然可以找更高频的clock，比如200MHZ可以实现5ns的延时差控制，但一半高频clock很难获取，并且容易引入干扰。所以，这最后的21ns延时，就需要通过filter群延时的微调来调节，这个调节的步径可以很小比如1ns，最后让整个延时差小于1ns。It should be noted that, for example, after the amplitude information is processed and sent to the PA, the delay is 301ns; the phase information is the delay is 180ns; and the clock here is 20MHZ, each cycle is 50ns. That is, the amplitude and phase delay difference is 121ns; this When the phase information is shot twice with 20MHZ, the delay is 100ns; it becomes the amplitude delay of 301ns and the phase delay of 280ns; at this time, the delay difference is 21ns; there is no way to deal with this 21ns with 20MHZ clock, although it can Find a higher frequency clock, such as 200MHZ can achieve 5ns delay difference control, but half of the high frequency clock is difficult to obtain, and it is easy to introduce interference. Therefore, the final 21ns delay needs to be adjusted by fine-tuning the filter group delay. The adjustment step can be as small as 1ns, and finally the overall delay difference is less than 1ns.
对于20M clock的处理，延时差小于50ns，就比较难以控制了，只能做到+/‐25ns范围。此时引入群延时的微调，就可以控制到+/‐1ns或者更小(因为调节步径和调节的复杂度相关，步径太小就非常复杂,需要很多挡位调节。)For 20M clock processing, the delay difference is less than 50ns, which is more difficult to control, and it can only be achieved in the range of +/-25ns. At this time, the fine-tuning of the group delay can be controlled to +/-1ns or less (because the adjustment step size is related to the complexity of the adjustment, the step size is too small to be very complicated, and a lot of gear adjustments are required.)
优选地，所述滤波器为低通滤波器，包括一阶低通滤波器和高阶低通滤波器。同时，其结构可以是无源R/C的，也可以是有源R/C或者Gm单元实现的。也可以使用其他的模拟延时电路。Preferably, the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter. At the same time, its structure can be passive R/C, or active R/C or Gm unit implementation. Other analog delay circuits can also be used.
优选地，所述一阶低通滤波器，包括：Preferably, the first-order low-pass filter includes:
信号输入端通过串联连接的第一电阻、第二电阻连接至信号输出端；The signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
所述第二电阻的输入端通过第一开关连接所述第二电阻的输出端；The input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch;
所述第二电阻的输出端与所述信号输出端之间的连接线路上分别连接第一电容的第一端、第二电容的第一端；The connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
所述第二电容的第二端通过第二开关与所述第一电容的第二端连接，且所述第一电容的第二端接地。The second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
在具体的实施例当中，幅度调制单元的处理过程如图2所示，主要是要经过DAC/Filter/PGA这3个模块，其中，低通filter一阶原型如图5示，filter都会有群延时，群延时大小和filter结构以及filter的带宽相关，在其带宽基本固定的情况下，即图4中R0/C0基本固定时，精细的调节R1/C1是否参与作用(即调节开关S1/S2),就可以更精细的调节群延时。在幅度信息和相位信息的延时差已经小于一个CLOCK周期时，精细的调节幅度信息的群延时，就可以让两路信号的延时差非常精细，实现很好的调制效果。In a specific embodiment, the processing process of the amplitude modulation unit is shown in Figure 2, which mainly passes through the three modules of DAC/Filter/PGA. Among them, the first-order prototype of the low-pass filter is shown in Figure 5, and the filter will have a group Delay and group delay are related to the filter structure and filter bandwidth. When the bandwidth is basically fixed, that is, when R0/C0 in Figure 4 is basically fixed, finely adjust whether R1/C1 participates in the role (that is, adjust switch S1 /S2), the group delay can be adjusted more finely. When the delay difference between the amplitude information and the phase information is less than one CLOCK period, finely adjusting the group delay of the amplitude information can make the delay difference between the two signals very fine and achieve a good modulation effect.
S400、通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射频频带中产生所传送的数据。S400: Use the phase modulation signal as the input signal and the amplitude modulation signal as the control signal to generate the transmitted data in the radio frequency band.
优选地，所述根据延时调节后的相位信号产生相位调制信号，具体的，Preferably, the phase modulation signal is generated according to the phase signal after the delay adjustment, specifically,
根据延时调节后的相位信号，来产生具有规定的幅度值的正交信号；Generate a quadrature signal with a specified amplitude value according to the phase signal after the delay adjustment;
根据所述正交信号在射频频带中产生相位调制信号。A phase modulation signal is generated in the radio frequency band based on the quadrature signal.
在polar调制的发射机架构里，对于幅度和相位两路信息分别增加数字控制延时单元，同时结合幅度信息处理单元中的滤波器电路，利用滤波器的群延时特性，精细调节R/C，让最后等效的两路延时差足够小。In the polar modulated transmitter architecture, a digital control delay unit is added for the amplitude and phase information, and combined with the filter circuit in the amplitude information processing unit, the group delay characteristic of the filter is used to fine-tune the R/C. , So that the final equivalent two-way delay difference is small enough.
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read‐Only Memory，ROM)或随机存储记忆体(Random Access Memory，RAM)等。A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing relevant hardware through a computer program. The program can be stored in a computer readable storage medium, and the program can be stored in a computer readable storage medium. During execution, it may include the procedures of the above-mentioned method embodiments. Wherein, the storage medium may be a magnetic disk, an optical disc, a read-only memory (Read-Only Memory, ROM), or a random access memory (Random Access Memory, RAM), etc.
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也视为本发明的保护范围。The above are the preferred embodiments of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications are also considered This is the protection scope of the present invention.

Claims (8)

  1. 一种极坐标调制电路，其特征在于，包括：A polar coordinate modulation circuit, characterized in that it comprises:
    极坐标转换单元，用于对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信号；Polar coordinate conversion unit, used to perform polar coordinate conversion on the baseband I/Q two-way signal, and generate amplitude signal and phase signal respectively;
    第一数字延时控制单元，用于对所述幅度信号进行若干次采样锁存延时，延时第一CLOCK周期；The first digital delay control unit is configured to perform several sampling latch delays on the amplitude signal to delay the first CLOCK period;
    第二数字延时控制单元，用于对所述相位信号进行若干次采样锁存延时，延时第二CLOCK周期；The second digital delay control unit is configured to perform several sampling and latch delays on the phase signal to delay the second CLOCK period;
    幅度调制单元，用于通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号；The amplitude modulation unit is used to adjust the group delay of the amplitude signal after the delay adjustment through the several gears R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, And generate an amplitude modulation signal according to the amplitude signal after the delay adjustment;
    相位调制单元，用于根据延时调节后的相位信号产生相位调制信号；The phase modulation unit is used to generate a phase modulation signal according to the phase signal after the delay adjustment;
    功放单元，用于通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射频频带中产生所传送的数据。The power amplifier unit is used to generate the transmitted data in the radio frequency band by using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal.
  2. 根据权利要求1所述的极坐标调制电路，其特征在于，所述第一CLOCK周期不等于第二CLOCK周期；The polar coordinate modulation circuit according to claim 1, wherein the first CLOCK period is not equal to the second CLOCK period;
    经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  3. 根据权利要求1所述的极坐标调制电路，其特征在于，相位调制单元，用于根据延时调节后的相位信号产生相位调制信号，具体的，The polar coordinate modulation circuit according to claim 1, wherein the phase modulation unit is configured to generate a phase modulation signal according to the phase signal after the delay adjustment, specifically,
    所述相位调制单元，包括：The phase modulation unit includes:
    正交坐标转换单元，用于根据所述第二数字延时控制单元提供的相位信号，来产生具有规定的幅度值的正交信号；和，The orthogonal coordinate conversion unit is configured to generate an orthogonal signal with a prescribed amplitude value according to the phase signal provided by the second digital delay control unit; and,
    正交调制信号，用于根据所述正交信号在射频频带中产生相位调制信号，并将所述相位调制信号提供给功放单元。The quadrature modulation signal is used to generate a phase modulation signal in the radio frequency band according to the quadrature signal, and provide the phase modulation signal to the power amplifier unit.
  4. 根据权利要求1所述的极坐标调制电路，其特征在于，所述滤波器为低通滤波器，包括一阶低通滤波器和高阶低通滤波器。The polar coordinate modulation circuit according to claim 1, wherein the filter is a low-pass filter, including a first-order low-pass filter and a high-order low-pass filter.
  5. 根据权利要求4所述的极坐标调制电路，其特征在于，所述一阶低通滤波器，包括：The polar coordinate modulation circuit according to claim 4, wherein the first-order low-pass filter comprises:
    信号输入端通过串联连接的第一电阻、第二电阻连接至信号输出端；The signal input terminal is connected to the signal output terminal through a first resistor and a second resistor connected in series;
    所述第二电阻的输入端通过第一开关连接所述第二电阻的输出端；The input terminal of the second resistor is connected to the output terminal of the second resistor through a first switch;
    所述第二电阻的输出端与所述信号输出端之间的连接线路上分别连接第一电容的第一端、第二电容的第一端；The connection line between the output terminal of the second resistor and the signal output terminal is respectively connected to the first terminal of the first capacitor and the first terminal of the second capacitor;
    所述第二电容的第二端通过第二开关与所述第一电容的第二端连接，且所述第一电容的第二端接地。The second end of the second capacitor is connected to the second end of the first capacitor through a second switch, and the second end of the first capacitor is grounded.
  6. 一种极坐标调制方法，其特征在于，包括：A polar coordinate modulation method, characterized in that it comprises:
    对基带的I/Q两路信号进行极坐标转换，分别生成幅度信号和相位信号；Perform polar coordinate conversion on the I/Q signals of the baseband to generate amplitude signal and phase signal respectively;
    对所述幅度信号和所述相位信号分别进行若干次采样锁存延时，使所述幅度信号延时第一CLOCK周期，所述相位信号延时第二CLOCK周期；Performing several sampling latch delays on the amplitude signal and the phase signal respectively, so that the amplitude signal is delayed by a first CLOCK period, and the phase signal is delayed by a second CLOCK period;
    通过自身的滤波器设定的若干档位R/C，对延时调节后的幅度信号的群延时进行调节，使幅度信号和相位信号的延时差进一步达到最小，并根据延时调节后的幅度信号产生幅度调制信号，同时根据延时调节后的相位信号产生相位调制信号；The group delay of the amplitude signal after the delay adjustment is adjusted through the several gear R/C set by its own filter, so that the delay difference between the amplitude signal and the phase signal is further minimized, and adjusted according to the delay Amplitude signal generated amplitude modulation signal, and at the same time a phase modulation signal is generated according to the phase signal after the delay adjustment;
    通过将相位调制信号作为输入信号，幅度调制信号作为控制信号，以在射频频带中产生所传送的数据。By using the phase modulation signal as the input signal and the amplitude modulation signal as the control signal, the transmitted data is generated in the radio frequency band.
  7. 根据权利要求6所述的极坐标调制方法，其特征在于，所述第一CLOCK周期不等于第二CLOCK周期；The polar coordinate modulation method according to claim 6, wherein the first CLOCK period is not equal to the second CLOCK period;
    经延时调节后的幅度信号和相位信号的延时差小于一个CLOCK周期。The delay difference between the amplitude signal and the phase signal after the delay adjustment is less than one CLOCK period.
  8. 根据权利要求6所述的极坐标调制方法，其特征在于，所述根据延时调节后的相位信号产生相位调制信号，具体的，The polar coordinate modulation method according to claim 6, wherein the phase modulation signal is generated according to the phase signal after the delay adjustment, specifically,
    根据延时调节后的相位信号，来产生具有规定的幅度值的正交信号；Generate a quadrature signal with a specified amplitude value according to the phase signal after the delay adjustment;
    根据所述正交信号在射频频带中产生相位调制信号。A phase modulation signal is generated in the radio frequency band based on the quadrature signal.
PCT/CN2020/077370 2019-11-15 2020-03-01 Polar modulation circuit and modulation method therefor WO2021093223A1 (en)

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