WO2021082533A1 - 量子芯片系统、量子计算处理系统及电子设备 - Google Patents

量子芯片系统、量子计算处理系统及电子设备 Download PDF

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WO2021082533A1
WO2021082533A1 PCT/CN2020/102572 CN2020102572W WO2021082533A1 WO 2021082533 A1 WO2021082533 A1 WO 2021082533A1 CN 2020102572 W CN2020102572 W CN 2020102572W WO 2021082533 A1 WO2021082533 A1 WO 2021082533A1
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quantum
instruction
control
qubit
chip system
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PCT/CN2020/102572
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French (fr)
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孔伟成
赵勇杰
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合肥本源量子计算科技有限责任公司
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Priority to EP20875656.9A priority Critical patent/EP3855370A4/en
Priority to US17/287,759 priority patent/US20220309376A1/en
Publication of WO2021082533A1 publication Critical patent/WO2021082533A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70—Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/80—Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing

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  • This specification relates to the field of quantum chip technology, and more specifically, to a quantum chip system, a quantum computing processing system, and an electronic device.
  • Quantum chip systems include but are not limited to control devices and qubits.
  • the control device may include event registers.
  • the event register is used to register the operation to be performed by the control device and instruct the control device to perform the corresponding operation.
  • the control device controls the qubit to perform corresponding operations.
  • the control device can be an arbitrary waveform generator.
  • the qubit is controlled to perform calculation operations through the waveform generated by the arbitrary waveform generator.
  • a quantum chip system including: at least one first qubit, each first qubit including at least two control electrodes; and a first event for controlling the control electrode Register, wherein each first event register is used to store a control waveform of the control electrode, each first event register is used to store a control signal of the control electrode, and each first qubit corresponds to at least two first qubits An event register.
  • a quantum computing processing system including: a decoding conversion device that generates a quantum program to control the operation of the quantum chip system; and according to the first aspect of this specification Quantum chip system.
  • an electronic device including the quantum computing processing system according to the second aspect of this specification.
  • the quantum chip system in different embodiments can perform more flexible qubit operation processing.
  • Fig. 1 shows a schematic diagram of a hardware configuration that can be used to implement the method of the embodiment of the present specification.
  • Fig. 2 shows a schematic block diagram of a quantum chip system according to an embodiment.
  • Fig. 3 shows a schematic diagram of an example of a quantum chip system.
  • Fig. 4 shows a schematic diagram of another example of a quantum chip system.
  • Fig. 5 shows a schematic block diagram of a quantum computing processing system according to an embodiment.
  • Fig. 6 shows a schematic block diagram of an electronic device according to an embodiment.
  • Figure 1 is a schematic diagram of a hardware configuration that can be used to implement the embodiments in this specification, including a decoding device 110, a waveform generating device 120, and a qubit 130.
  • the decoding device 110 is used to decode the input program into a quantum program.
  • the decoding device 110 may be a classic computer, a dedicated processing device, or the like.
  • the input program can be a classic computer program, including the prior art C language program, assembler, etc., or it can be a higher-level language program for a quantum computer.
  • the decoding device 110 can convert the corresponding program into a quantum program including quantum instructions as needed.
  • a quantum program is a program suitable for controlling qubits.
  • the waveform generating device 120 is used to generate a control waveform under the control of a quantum program.
  • the waveform generating device 120 is, for example, an arbitrary waveform generator based on FPGA.
  • the waveform generating device 120 is a type of qubit control device that directly manipulates the qubit. Depending on the qubits used in the quantum computer, other qubit control devices can also be used.
  • the qubit control device may also include an event register for registering the operation to be performed, for example, registering the control signal of the quantum operation to be performed.
  • the qubit 130 is used to perform quantum calculations under the action of the control waveform.
  • the qubit 130 may be, for example, a semiconductor qubit, a superconducting qubit, or the like.
  • the qubit control device and the qubit can be collectively referred to as a quantum chip system.
  • the quantum chip system 200 includes a first event register 211 and at least one first qubit 220.
  • Each first qubit 220 includes at least two control electrodes.
  • the first event register 211 is used to control the control electrode.
  • Each first event register 211 is used to store a control signal for controlling the electrode, and each first qubit 220 corresponds to at least two first event registers 211.
  • the type of the control signal is a digital signal, which is used for subsequent control of the control electrode, and is not directly applied to the control electrode.
  • the type of signal finally received by the control electrode is an analog signal.
  • the first event register 211 is included in the control device for controlling the first qubit 220.
  • different control devices 220 can be used.
  • arbitrary waveform generators can be used as control devices.
  • the first event register 211 may be an event register for controlling the arbitrary waveform generator 120 to generate waveforms.
  • control method of the control device may depend on the implementation of the qubit and is not of interest here, a detailed description of the control method of the control device is omitted here.
  • the quantum chip system is designed such that each qubit corresponds to at least two event registers. In this way, different control electrodes of the qubit can be controlled at the same time. On the one hand, this can increase the flexibility of manipulating qubits; on the other hand, in this way, it can be compensated during calculations.
  • the at least one first event register 211 is used to apply a null waveform to at least one control electrode of the at least one first qubit 220 when the first qubit 220 performs a calculation operation.
  • the control electrode controlled by the empty waveform does not participate in the execution of the calculation operation.
  • control electrode is hardware, connected to the qubit, used to apply a control waveform (an analog signal) to the qubit, and a certain control waveform is applied to the qubit through a certain control electrode, and the qubit can perform the control
  • the calculation operation corresponding to the waveform can be said to be: the control electrode controlled by the waveform participates in the execution of this calculation operation.
  • the control of the control electrodes of the qubits that are not involved in the calculation can be strengthened, and the control electrodes that participate in the calculation can be prevented from being affected by the control electrodes that are not involved in the calculation.
  • the empty waveform corresponds to the compensation waveform of the control electrode it controls.
  • the influence on the qubits performing the calculation can be eliminated.
  • the first qubit is a superconducting qubit, preferably a superconducting qubit with adjustable frequency
  • the at least two control electrodes of the superconducting qubit include a microwave pulse control electrode and a DC pulse control electrode.
  • the microwave pulse control electrode is used to apply the microwave pulse signal corresponding to the quantum logic gate operation that controls the rotation of the qubit around the X and Y axis.
  • the phase and duration of the microwave pulse signal can be respectively controlled by modulating the phase and duration of the microwave pulse signal.
  • the deflection angle and the rotation angle of the quantum state on the xy plane of the Bloch sphere. The rotation angle is determined by the amplitude and duration of the microwave pulse signal.
  • the DC pulse control electrode is used to apply the DC pulse signal corresponding to the frequency of the control qubit. . Therefore, the microwave pulse electrode can also be called XY (control) electrode, and the DC pulse control electrode can also be called Z (control) electrode, the same below.
  • a DC pulse in the Z direction of one qubit will cause crosstalk to change the frequency of other bits. Therefore, in order to improve the fidelity of the logic gate, when a DC pulse is applied to the Z-direction control electrode of a qubit, a compensating DC pulse (that is, a compensation waveform) can be applied to the Z-direction control electrode of other qubits at the same time to offset The effect of crosstalk.
  • a compensating DC pulse that is, a compensation waveform
  • the compensation mechanism mentioned in this application is preferably applicable to superconducting qubits with adjustable frequency, but is not limited to such qubits. Other qubit systems that need to be compensated also fall within the protection scope of this application.
  • Figures 3 and 4 show two configurations of the first event register and qubits.
  • Figures 3 and 4 take superconducting qubits with adjustable frequency as an example for illustration. However, those skilled in the art can understand from the disclosure of this specification that similar configurations can also be used in applications such as semiconductor qubits and ion trap qubits.
  • every two or more first event registers can be allocated to one first qubit, so that the number of first event registers is an integer multiple of the first qubit.
  • each qubit has an XY electrode and a Z electrode: Q0XY electrode, Q0Z electrode, Q1XY electrode, Q1Z electrode, Q2XY electrode, Q2Z electrode, Q3XY electrode, Q3Z electrode.
  • Applying a waveform to the XY electrode and Z electrode of the first qubit can perform corresponding calculation operations.
  • 8 first event registers 301a, 301b, 302a, 302b, 303a, 303b, 304a, 304b are set for the 4 first qubits Q0, Q1, Q2, and Q3.
  • the arbitrary waveform generator can be controlled to trigger 8 control waveforms at the same time to be applied to the corresponding electrodes.
  • eight waveform generators 311a, 311b, 312a, 312b, 313a, 313b, 314a, 314b are shown.
  • the 8 waveform generators can be separate or integrated. Among them, the arbitrary waveform generator does not directly generate the waveform, but stores the pre-generated waveform, and sends the required waveform through the trigger operation.
  • the first event register includes at least one second event register, and each second event register is used to control the control electrodes of at least two first qubits, where at least two refers to the number of first qubits .
  • Fig. 4 shows an example of the second event register.
  • the second event controller 401 is used to control the Z electrodes of at least two first qubits. From the perspective of the first qubit, each qubit still corresponds to two event registers. However, the total number of event registers is less than the example shown in Figure 3.
  • a common second event register can be configured for at least two control electrodes that can affect each other, thereby enhancing control while reducing the number of event registers.
  • This embodiment provides a quantum computing processing system.
  • the system is, for example, the computer processing system 500 shown in FIG. 5, including a decoding conversion device 510 and a quantum chip system 520.
  • the decoding conversion device 510 generates a quantum program to control the operation of the quantum chip system 520.
  • the quantum chip system 520 is, for example, the quantum chip system described in the above embodiments.
  • the decoding conversion device 510 may include: a device for acquiring input instructions of an input program; a device for converting at least one first input instruction in the input instructions into a first quantum instruction, wherein each first quantum instruction The instruction is used to trigger the waveforms of at least two logic gates that control the qubits in the quantum chip system within a specific time period; and a device for outputting a quantum program, wherein the quantum program corresponds to the input program and includes the first A quantum instruction.
  • the input program represents the program before conversion to the quantum program.
  • the input program may be a program expressed in an existing programming language, a high-level quantum program expressed in a high-level quantum language, a quantum intermediate representation converted from a high-level quantum program, and the like.
  • the input instruction represents the instruction before being converted into a quantum instruction.
  • the input instruction may be an instruction expressed in an existing instruction language, a high-level quantum instruction expressed in a high-level quantum language, a quantum intermediate representation converted from a high-level quantum instruction, and the like.
  • Quantum instructions are instructions for generating the waveforms of qubits in the quantum chip system within a specific period of time.
  • Logic gate is a unit that realizes the evolution from input state to output state in data processing.
  • Quantum gates are the basis for realizing calculations. Both quantum computers and classical computers realize the calculation process through their own logic circuits, which are composed of logic gates. Due to the different laws that the two computers follow, quantum logic gates and classical logic gates are also essentially different.
  • Quantum logic gates include, for example, RX gate (the gate at any angle around the X axis), RY gate (the gate at any angle around the Y axis), RZ gate (the gate at any angle around the Z axis), and the CNOT gate (CONTROL-NOT) Door) and so on.
  • Quantum logic gates can be divided into single-bit quantum logic gates, two-bit quantum logic gates, and so on.
  • Single-qubit logic gates are, for example, RX gates, RY gates, RZ gates, etc.
  • two-bit quantum logic gates are, for example, CNOT gates, CR gates (Cross Resonance, cross resonance gates), and the like.
  • each first quantum instruction is used to trigger the waveform of at least two logic gates that control the quantum bit in the quantum chip system within a specific time period.
  • a first quantum instruction is used to trigger a waveform that controls two qubits to perform X gate operations and Y gate operations respectively in a specific time period.
  • a first quantum instruction is used to trigger the waveform of controlling two qubits to perform X gate operation and Y gate operation respectively and controlling two qubits to perform Z gate operation within a specific time period.
  • the at least two logic gates involved in the first quantum instruction may be of different types or the same type.
  • the quantum program corresponds to the input program, which means that the expected result of a series of operations of a computer (such as a quantum computer) indicated by the quantum program corresponds to the expected result of a series of operations of a computer (such as a quantum computer) indicated by the input program.
  • the decoding conversion device 510 Through the decoding conversion device 510, the complexity of the encoding is reduced to a certain extent, and the instruction overhead of the quantum program is reduced.
  • the waveform generator can be directly called to generate the required waveforms with fewer instructions (such as one instruction), which reduces the processing time required from quantum instructions to trigger waveforms.
  • each first quantum instruction is used to trigger the waveforms of at least two logic gates that control the qubits in the quantum chip system within a specific period of time
  • the decoding conversion device 510 is suitable for The chip system 520 cooperates to improve the overall performance.
  • the first quantum instruction output by the conversion device 510 can be decoded, and two control electrodes of one qubit can be instructed at the same time.
  • it can also be considered as a whole to perform compensation for certain control electrodes.
  • the decoding conversion device 510 may further include: a device for converting at least one second input instruction in the input instruction into a second quantum instruction, wherein each second quantum instruction is used to generate a quantum bit control device in the quantum chip system. A waveform of a single logic gate, wherein the quantum program further includes the second quantum instruction. In this way, it can be compatible with the prior art instruction encoding method based on logic gates.
  • a second quantum instruction is used to trigger the waveform of a single logic gate that controls a qubit in a quantum chip system.
  • the single logic gate is, for example, one of RX gate, RY gate, RZ gate, CZ gate (control Z gate), CNOT gate, and the like.
  • one application scenario of quantum programs is the measurement and control experiment scenario.
  • the quantum program is simpler, the number of qubits is small, and the number of logic gates executed is small.
  • describing the quantum circuit based on a single logic gate will not have a large instruction overhead, which is simple and easy to implement.
  • the quantum program since the quantum program includes the second quantum instruction, it can be applied to the application scenario of the measurement and control experiment.
  • the first input instruction is a program instruction that is more complicated than the second input instruction.
  • the decoding conversion device 510 may further include: a device for judging the input instruction as the first input instruction or the second input instruction.
  • the first input instruction is an input instruction in a quantum computing scenario
  • the second input instruction is an input instruction in a measurement and control experiment scenario.
  • the computational complexity in the two scenarios is different.
  • the first input instruction is relative to the second input.
  • the instructions are more complicated.
  • the type of input instruction is judged, that is, it is judged whether the input instruction is the first input instruction or the second input instruction.
  • the above judgment can be made based on the type identification of the input instruction (for example, the type identification is preset when the instruction is written), or can be made based on the complexity and length of the input instruction.
  • the first input instruction is converted into the first quantum instruction.
  • the second input instruction is converted into a second quantum instruction.
  • the decoding conversion device 510 in this embodiment can take into consideration a scenario where the input instruction is relatively simple and a scenario where the input instruction is relatively complex.
  • each first quantum instruction is used to trigger the waveform of all related qubits in the quantum chip system in a specific period of time.
  • Related qubits are multiple qubits used to implement the same quantum calculation, for example, all qubits included in the same quantum chip system.
  • the first quantum instruction can be used to trigger and control the waveforms of multiple qubits
  • one first quantum instruction can control multiple qubits.
  • the operand corresponding to the qubit in the quantum instruction can be reduced, or the first quantum instruction does not include the operand corresponding to the qubit.
  • Operands are immediate numbers used to encode bit information for performing quantum operations. For example, the operand 00000000000010 indicates that a single-qubit logic gate operation is performed on the first qubit. The operand 00000000001010 indicates that a two-qubit logic gate operation is performed on the first qubit and the third qubit.
  • the decoding conversion device 510 by controlling all relevant qubits without special recording of operands, the complexity of instructions can be reduced and the scalability of the system can be increased.
  • the waveforms of the at least two logic gates include waveforms corresponding to no-operations.
  • Applying a waveform corresponding to the no-operation to the qubit can produce a no-operation, that is, the effect of keeping the state of the qubit unchanged.
  • the first quantum instruction is used to generate a waveform corresponding to the no-operation, which can realize the no-operation of the qubit.
  • the empty operation the state of the electrodes that are not involved in the calculation process can be effectively controlled, and the total length of the waveform can be unified, and the quantum chip system can be better adapted.
  • this can also perform compensation for certain electrodes. Therefore, the decoding conversion device 510 can effectively cooperate with the quantum chip system 520, thereby improving the overall performance.
  • the electronic device 600 includes the quantum computing processing system 500 described in the embodiment of the quantum computing processing system in this specification.
  • quantum chip systems can be used to replace silicon-based processing parts in traditional electronic devices.
  • the electronic device 600 may be a quantum computer or other electronic devices with data processing functions, such as a server, an encryption/decryption device, and the like.

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Abstract

一种量子芯片系统（200）、量子计算处理系统（500）及电子设备（600），其中一个量子芯片系统（200）包括：至少一个第一量子比特（220），每个第一量子比特（220）包括至少两个控制电极；以及用于控制所述控制电极的第一事件寄存器（211），其中，每个第一事件寄存器（211）用于存储控制电极的一种控制信号，以及每个第一量子比特（220）对应于至少两个第一事件寄存器（211）。

Description

量子芯片系统、量子计算处理系统及电子设备
相关申请的交叉引用
本专利申请要求于2019年10月29日提交的、发明名称为“量子芯片系统、量子计算处理系统及电子设备”、申请号为CN201911039273.6的中国专利申请的优先权，该专利申请在此全部引入作为参考。
技术领域
本说明书涉及量子芯片技术领域，更具体地，涉及一种量子芯片系统、量子计算处理系统及电子设备。
背景技术
量子芯片系统包括但不限于控制器件和量子比特。控制器件可以包括事件寄存器。事件寄存器用于寄存控制器件所要执行的操作并指示控制器件执行相应操作。控制器件控制量子比特执行相应操作。例如，在频率可调的超导量子比特芯片系统中，控制器件可以是任意波形发生器。通过任意波形发生器所产生的波形来控制量子比特执行计算操作。
目前的量子计算机还仅在实验室中使用。技术人员还没有针对量子计算的特性设计适用于广泛使用的量子计算处理系统。
发明内容
本说明书的实施例提供量子比特系统的新技术方案。
根据本说明书的第一方面，提供了一种量子芯片系统，包括：至少一个第一量子比特，每个第一量子比特包括至少两个控制电极；以及用于控制所述控制电极的第一事件寄存器，其中，每个第一事件寄存器用于存储控制电极的一种控制波形每个第一事件寄存器用于存储控制电极的一种控制信号，以及每个第一量子比特对应于至少两个第一事件寄存器。
根据本说明书的第二方面，提供了一种量子计算处理系统，包括：译码转换设备，所述译码转换设备产生量子程序以控制量子芯片系统的操作；以及根据本说明书第一方面所述的量子芯片系统。
根据本说明书的第三方面，提供了一种电子设备，包括根据本说明书的第二方面所述的量子计算处理系统。
在不同实施例中的量子芯片系统可以执行更加灵活的量子比特操作处理。
通过以下参照附图对本发明的示例性实施例的详细描述，本发明的其它特征及其优点将会变得清楚。
附图说明
被结合在说明书中并构成说明书的一部分的附图示出了本发明的实施例，并且连同其说明一起用于解释本发明的原理。
图1示出了可用于实现本说明书实施例的方法的硬件配置示意图。
图2示出了根据一个实施例的量子芯片系统的示意性框图。
图3示出了量子芯片系统的一个例子的示意图。
图4示出了量子芯片系统的另一个例子的示意图。
图5示出了根据一个实施例的量子计算处理系统的示意性框图。
图6示出了根据一个实施例的电子设备的示意性框图。
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对本发明及其应用或使用的任何限制。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步讨论。
<硬件配置>
图1是可用于实现本说明书中实施例的硬件配置的示意图，包括译码 装置110、波形发生装置120和量子比特130。
译码装置110用于将输入程序译码为量子程序。译码装置110可以是经典计算机、专用处理设备等。输入程序可以是经典的计算机程序，包括现有技术的C语言程序、汇编程序等，也可以是针对量子计算机的较高级的语言程序。译码装置110可以根据需要将相应的程序转换成包括量子指令的量子程序。量子程序是适合用控制量子比特的程序。
波形发生装置120用于在量子程序的控制下生成控制波形。波形发生装置120例如是基于FPGA的任意波形发生器。波形发生装置120是对量子比特进行直接操作的量子比特控制装置中的一种。根据量子计算机中所采用的量子比特，还可以使用其他的量子比特控制装置。量子比特控制装置还可以包括事件寄存器，用于寄存所要执行的操作，例如，寄存所要执行的量子操作的控制信号。
量子比特130用于在控制波形的作用下执行量子计算。量子比特130例如可以是半导体量子比特、超导量子比特等。
这里，可以将量子比特控制装置和量子比特统称为量子芯片系统。
上述硬件配置仅仅是说明性的，决不是为了限制本说明书实施例的技术方案。
<量子芯片系统>
如图2所示，量子芯片系统200包括第一事件寄存器211和至少一个第一量子比特220。每个第一量子比特220包括至少两个控制电极。第一事件寄存器211用于控制所述控制电极的。每个第一事件寄存器211用于存储控制电极的一种控制信号，以及每个第一量子比特220对应于至少两个第一事件寄存器211。其中，该控制信号的类型是数字信号，用于后续对控制电极的控制，并不是直接施加在控制电极上，控制电极最后接收到的信号类型是模拟信号。
通常来说，第一事件寄存器211是被包括在用于控制第一量子比特220的控制器件中的。根据量子比特的实现方式，可以采用不同的控制器件220。例如，对于频率可调的超导量子比特，可以采用任意波形发生器作为控制器件。第一事件寄存器211可以是用于控制任意波形发生装置120 产生波形的事件寄存器。
由于控制器件的控制方式可以取决于量子比特实现方式并且不是这里所关注的，因此，在这里省略对于控制器件的控制方式的具体描述。
在目前的量子芯片系统中，主要考虑的是测试的情形。因此，一个量子比特仅需一个事件寄存器来进行控制。这种方式对于测试的应用场景是方便的。但是，这种方式没有考虑量子比特之间的影响，并且没有考虑从输入指令到量子指令的编码效率问题。
这里，考虑实际应用中所遇到的困难，将量子芯片系统设计成每个量子比特对应至少两个事件寄存器。这样，可以同时控制量子比特的不同控制电极。一方面，这可以增加操作量子比特的灵活性；另一方面，通过这种方式，可以在计算时进行补偿。
例如，至少一个第一事件寄存器211用于在第一量子比特220执行计算操作时向至少一个第一量子比特220的至少一个控制电极施加空波形。所述空波形所控制的控制电极不参与所述计算操作的执行。
需要说明的是，控制电极是硬件，连接于量子比特，用于给量子比特施加控制波形(属于模拟信号)，通过某一控制电极施加某控制波形至量子比特，该量子比特从而能够执行该控制波形对应的计算操作，也就可以说成：该波形所控制的控制电极参与了该次计算操作的执行。。
在这里，通过空波形，可以加强对量子比特的不参与计算的控制电极的控制，防止参与计算的控制电极对于这些不参与计算的控制电极的影响。
一方面，由于量子比特本身的复杂性，如果不对未参与计算的量子比特的状态进行控制，会对计算结果的错误率产生一定程度的影响。
另一方面，通过这种方式，可以进行补偿。例如，所述空波形对应于其所控制的控制电极的补偿波形。通过这种补偿操作，可以消除对于执行计算的量子比特的影响。
例如，所述第一量子比特是超导量子比特，优先为频率可调的超导量子比特，该超导量子比特的至少两个控制电极包括微波脉冲控制电极和直流脉冲控制电极。在超导量子体系下，微波脉冲控制电极用于施加控制量子比特绕X Y轴旋转的量子逻辑门操作对应的微波脉冲信号，可以通过调 制微波脉冲信号的相位以及持续时间来分别控制量子比特的量子态在Bloch球的xy平面上的旋转轴偏角以及旋转角度，其中：旋转角度有微波脉冲信号的幅度和持续时间共同决定，直流脉冲控制电极用于施加控制量子比特频率对应的直流脉冲信号。故微波脉冲电极也可称为XY(控制)电极，直流脉冲控制电极也可称为Z(控制)电极，下同。
对于频率可调的超导量子芯片系统，在一个量子比特的Z方向施加直流脉冲，所产生的串扰会改变其他比特的频率。因此，为了提高逻辑门的保真度，在对一个量子比特的Z方向控制电极施加直流脉冲时，可以同时对其他量子比特的Z方向的控制电极施加一个补偿直流脉冲(即补偿波形)以抵消串扰的影响。
本申请提及的补偿机制，优选适用于频率可调的超导量子比特，但也不限于此类量子比特，其他需要考虑补偿的量子比特体系也落入本申请的保护范围之内。
图3和图4示出了第一事件寄存器与量子比特的两种配置方式。图3和图4以频率可调的超导量子比特为例来进行说明。但是，本领域技术人员根据本说明书的公开可以理解，在诸如半导体量子比特和离子阱量子比特的应用中，也可以使用类似的配置方式。
一方面，在量子芯片系统中，可以将每两个或更多个第一事件寄存器配置给一个第一量子比特，这样，第一事件寄存器的数量是第一量子比特的整数倍。
例如，在图3中，显示了4个第一量子比特Q0、Q1、Q2、Q3。每个量子比特具有XY电极和Z电极：Q0XY电极、Q0Z电极、Q1XY电极、Q1Z电极、Q2XY电极、Q2Z电极、Q3XY电极、Q3Z电极。对第一量子比特的XY电极和Z电极施加波形，可以执行相应的计算操作。
在图3中，为4个第一量子比特Q0、Q1、Q2、Q3设置了8第一事件寄存器301a、301b、302a、302b、303a、303b、304a、304b。通过这8个第一事件寄存器可以控制任意波形发生器同时触发8个控制波形，以施加到相应的电极。在图3中，为了描述的清楚，示出了8个波形发生器311a、311b、312a、312b、313a、313b、314a、314b。这8个波形发生器可以是 分开的，也可以被集成在一起。其中，任意波形发生器并不直接产生波形，而是存储有预先生成的波形，通过触发操作将所需的波形发送出去。
另一方面，在量子芯片系统中，可以由一个事件寄存器控制多个控制电极。例如，所述第一事件寄存器包括至少一个第二事件寄存器，每个第二事件寄存器用于控制至少两个第一量子比特的控制电极，此处至少两个是指第一量子比特的个数。
图4示出了第二事件寄存器的一个例子。在图4中，第二事件控制器401用于控制至少两个第一量子比特的Z电极。从第一量子比特的角度来说，每个量子比特仍然对应于两个事件寄存器。但是，事件寄存器总数量少于图3所示的例子。
在这里，可以为相互之间会产生影响的至少两个控制电极配置共同的第二事件寄存器，从而中加强控制的同时，减少事件寄存器的数量。
<量子计算处理系统实施例>
本实施例提供一种量子计算处理系统，该系统例如是图5所示的计算机处理系统500，包括译码转换设备510和量子芯片系统520。其中，译码转换设备510产生量子程序以控制量子芯片系统520的操作。量子芯片系统520例如是上面实施例中所描述的量子芯片系统。
所述译码转换设备510可以包括：用于获取输入程序的输入指令的装置；用于将输入指令中的至少一个第一输入指令转换成第一量子指令的装置，其中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中量子比特的、至少两个逻辑门的波形；以及用于输出量子程序的装置，其中，所述量子程序与所述输入程序对应并包含第一量子指令。
输入程序表示在转换为量子程序之前的程序。输入程序可以是通过已有的程序语言表示的程序、通过高级量子语言表示的高级量子程序、由高级量子程序转换成的量子中间表示等。
相应地，输入指令表示在转换为量子指令之前的指令。输入指令可以是通过已有的指令语言表示的指令、通过高级量子语言表示的高级量子指令、由高级量子指令转换成的量子中间表示等。
量子指令是用于生成在特定时间段内控制量子芯片系统中量子比特 的波形的指令。逻辑门是在数据处理中实现从输入态到输出态演化的单元。
逻辑门是实现计算的基础。量子计算机和经典计算机都是通过各自的逻辑电路来实现计算过程，这种逻辑电路就是由逻辑门组成。由于两种计算机遵循的规律不同，量子逻辑门和经典逻辑门也有着本质区别。
量子逻辑门例如包括RX门(绕X轴旋转任意角度门)、RY门(绕Y轴旋转任意角度门)、RZ门(绕Z轴旋转任意角度门)、CNOT门(CONTROL-NOT，控制非门)等等。
量子逻辑门可分为单比特量子逻辑门、两比特量子逻辑门等。单量子比特逻辑门例如是RX门、RY门、RZ门等，两比特量子逻辑门例如是CNOT门、CR门(Cross Resonance，交叉共振门)等。
本实施例中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中量子比特的、至少两个逻辑门的波形。
在一个例子中，一个第一量子指令用于触发在特定时间段内控制两个量子比特分别执行X门操作和Y门操作的波形。
在另一个例子中，一个第一量子指令用于触发在特定时间段内控制两个量子比特分别执行X门操作和Y门操作以及控制两个量子比特执行Z门操作的波形。
第一量子指令中涉及的至少两个逻辑门可以是不同类型的，也可以是相同类型的。
量子程序与输入程序对应，是指量子程序指示的计算机(如量子计算机)的系列操作的预期结果与输入程序指示的计算机(如量子计算机)的系列操作的预期结果相对应。
通过译码转换设备510，至少在一定程度上减少了编码的复杂程度，减少了量子程序的指令开销。
此外，由于指令简洁，可以通过较少的指令(比如一条指令)直接调用波形发生装置产生所需波形，减少从量子指令到触发波形所需的处理时间。
另外，通过这种方式，可以减小上层指令对于量子比特实现方式的依赖程度，从而提高量子程序的可移植性。
另外，通过这种方式，有利于对多个量子比特进行整体控制，从而提高量子比特的整体性能。例如，通过这种方式，可以较方便地对部分量子比特进行补偿。
由于在译码转换设备510中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中量子比特的、至少两个逻辑门的波形，因此，译码转换设备510适合与量子芯片系统520进行配合，从而提高整体性能。例如，可以译码转换设备510输出的第一量子指令，同时指示操作一个量子比特的两个控制电极。此外，还可以处于整体考虑，对于某些控制电极执行补偿。
译码转换设备510还可以包括：用于将输入指令中的至少一个第二输入指令转换成第二量子指令的装置，其中，每个第二量子指令用于生成控制量子芯片系统中量子比特的、单个逻辑门的波形，其中，所述量子程序还包括所述第二量子指令。通过这种方式，可以兼容现有技术的基于逻辑门的指令编码方式。
在一个例子中，一个第二量子指令用于触发控制量子芯片系统中量子比特的、单个逻辑门的波形。单个逻辑门例如是RX门、RY门、RZ门、CZ门(控制Z门)、CNOT门等中的某一个逻辑门。
目前，量子程序的一种应用场景是测控实验场景。在测控实验场景中，量子程序较简单，量子比特的数目较少，并且执行的逻辑门的数目较少。这种情况下，基于单个逻辑门描述量子线路不会有较大的指令开销，简便易行。
本实施例中，由于量子程序包括第二量子指令，因此能够适用于测控实验的应用场景。
在一个实施例中，第一输入指令是相对于第二输入指令较为复杂的程序指令。译码转换设备510还可以包括：用于将所述输入指令判断为第一输入指令或第二输入指令的装置。
在一个例子中，第一输入指令是量子计算场景中的输入指令，第二输入指令是测控实验场景下的输入指令，两种场景下的计算复杂度不同，第一输入指令相对于第二输入指令较为复杂。
本实施例中，对输入指令的种类进行判断，即判断输入指令为第一输入指令或第二输入指令。
上述判断可以基于输入指令的种类标识(例如在编写指令时预设了种类标识)进行，也可以基于输入指令的复杂度、长度等进行。
在判断输入指令为第一输入指令的情况下，将第一输入指令转换成第一量子指令。
在判断输入指令为第二输入指令的情况下，将第二输入指令转换成第二量子指令。
本实施例中的译码转换设备510可以兼顾输入指令较为简单的场景和输入指令较为复杂的场景。
在一个实施例中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中所有相关量子比特的波形。相关量子比特是用于实现同一量子计算的多个量子比特，例如是同一量子芯片系统包括的所有量子比特。
在一个实施例中，由于第一量子指令可以用于触发控制多个量子比特的波形，因此，通过一个第一量子指令可以控制多个量子比特。在这种情况下，可以减少量子指令中与量子比特对应的操作数，或者第一量子指令不包含与量子比特对应的操作数。
操作数是用于编码执行量子操作的比特信息的立即数。例如，操作数00000000000010表示对第1个量子比特执行某个单量子比特逻辑门操作。操作数00000000001010表示对第1个量子比特和第3个量子比特执行某个两量子比特逻辑门操作。
在译码转换设备510中，通过控制所有相关量子比特，无专门记录操作数，可以减少指令的复杂度，增加系统可扩展性。
在一个实施例中，至少两个逻辑门的波形包括与空操作对应的波形。
对量子比特施加与空操作对应的波形，可以产生空操作，即保持量子比特状态不变的效果。
本实施例中，第一量子指令用于生成与空操作对应的波形，能够实现量子比特的空操作。通过空操作，可以有效控制未参与计算处理的电极的状态，还能够统一波形的总长度，更好适配量子芯片系统。此外，这还可 以对某些电极执行补偿。因此，译码转换设备510可以有效地与量子芯片系统520进行配合，从而提高整体性能。
<电子设备实施例>
本实施例提供一种电子设备。如图6所示，电子设备600包括本说明书量子计算处理系统实施例描述的量子计算处理系统500。此外，随着技术的发展，可以使用量子芯片系统来代替在传统电子设备中基于硅的处理部分。在这种情况下，例如，电子设备600可以是量子计算机或者其他具有数据处理功能的电子设备，例如，服务器、加密/解密设备等。
除非明确说明，否则，这里的“第一”、“第二”……仅仅用于区分其后面的名词所指代的事物，而不表示所述事物的先后顺序和/或优先级。
上面的实施例可以互相参考。因此，为了简洁起见，在后面实施例的描述中省略了与前面的实施例重复的部分。
上述对本说明书特定实施例进行了描述。其它实施例在所附权利要求书的范围内。在一些情况下，在权利要求书中记载的动作或步骤可以按照不同于实施例中的顺序来执行并且仍然可以实现期望的结果。另外，在附图中描绘的过程不一定要求示出的特定顺序或者连续顺序才能实现期望的结果。在某些实施方式中，多任务处理和并行处理也是可以的或者可能是有利的。

Claims (14)

  1. 一种量子芯片系统，包括：
    至少一个第一量子比特，每个第一量子比特包括至少两个控制电极；以及
    用于控制所述控制电极的第一事件寄存器，其中，每个第一事件寄存器用于存储控制电极的一种控制信号，以及每个第一量子比特对应于至少两个第一事件寄存器。
  2. 根据权利要求1所述的量子芯片系统，其中，至少一个第一事件寄存器用于在第一量子比特执行计算操作时向至少一个第一量子比特的至少一个控制电极施加空波形，其中，所述空波形所控制的控制电极不参与所述计算操作的执行。
  3. 根据权利要求2所述的量子芯片系统，其中，所述空波形对应于其所控制的控制电极的补偿波形。
  4. 根据权利要求1-3中的任何一项所述的量子芯片系统，其中，所述第一量子比特是超导量子比特，所述至少两个控制电极包括微波脉冲控制电极和直流脉冲控制电极。
  5. 根据权利要求1-4中的任何一项所述的量子芯片系统，其中，所述第一事件寄存器包括至少一个第二事件寄存器，每个第二事件寄存器用于控制至少两个第一量子比特的控制电极。
  6. 根据权利要求5所述的量子芯片系统，其中，每个第二事件寄存器用于控制至少两个第一量子比特的直流脉冲控制电极。
  7. 一种量子计算处理系统，包括：
    译码转换设备，所述译码转换设备产生量子程序以控制量子芯片系统的操作；以及
    根据权利要求1-6中的任何一项所述的量子芯片系统。
  8. 根据权利要求7所述的量子计算处理系统，其中，所述译码转换设备包括：
    用于获取输入程序的输入指令的装置；
    用于将输入指令中的至少一个第一输入指令转换成第一量子指令的装置，其中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中量子比特的、至少两个逻辑门的波形；以及
    用于输出量子程序的装置，其中，所述量子程序与所述输入程序对应并包含第一量子指令。
  9. 根据权利要求7或8所述的量子计算处理系统，其中，所述译码转换设备还包括：
    用于将输入指令中的至少一个第二输入指令转换成第二量子指令的装置，其中，每个第二量子指令用于触发控制量子芯片系统中量子比特的、单个逻辑门的波形，
    其中，所述量子程序还包括所述第二量子指令。
  10. 根据权利要求9所述的量子计算处理系统，其中，第一输入指令是相对于第二输入指令较复杂的程序指令，其中，所述译码转换设备还包括：
    用于将所述输入指令判断为第一输入指令或第二输入指令的装置。
  11. 根据权利要求8所述的量子计算处理系统，其中，每个第一量子指令用于触发在特定时间段内控制量子芯片系统中所有相关量子比特的波形。
  12. 根据权利要求8或11所述的量子计算处理系统，其中，所述第一量子指令不包含与量子比特对应的操作数。
  13. 根据权利要求8或11所述的量子计算处理系统，其中，所述至少两个逻辑门的波形包括与空操作对应的波形。
  14. 一种电子设备，包括根据权利要求7-13中的任何一项所述的量子计算处理系统。
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