WO2021078263A1

WO2021078263A1 - Microfluidic chip and manufacturing method therefor

Info

Publication number: WO2021078263A1
Application number: PCT/CN2020/123310
Authority: WO
Inventors: 苏云鹏; 邹耀中; 邓杨; 江鹏; 顾佳烨
Original assignee: 成都今是科技有限公司
Priority date: 2019-10-25
Filing date: 2020-10-23
Publication date: 2021-04-29
Also published as: CN112705279A; CN112705279B

Abstract

A microfluidic chip. A chip unit of the microfluidic chip comprises: a CMOS substrate (101, 201, 301, 401, 501, 601); a microelectrode layer (102) formed on the CMOS substrate (101, 201, 301, 401, 501, 601); a hydrophilic layer (204, 304, 404, 504, 604) formed on the CMOS substrate (101, 201, 301, 401, 501, 601) and covering the microelectrode layer (102); and a lipophilic layer (205, 305, 405, 505, 605) formed on the hydrophilic layer (204, 304, 404, 504, 604). The lipophilic layer (205, 305, 405, 505, 605) and the hydrophilic layer (204, 304, 404, 504, 604) have a hole penetrating from the top of the lipophilic layer (205, 305, 405, 505, 605) to the upper surface of the microelectrode layer (102). The microfluidic chip can ensure wetting by an aqueous solution to achieve circuit conduction, and can also ensure self-assembly of an organic amphiphilic molecule to achieve high yield; moreover, it is possible to provide tens of millions of units in a single chip, compatibility with CMOS technology is achieved, mass production precision control can be improved, and mass production cost can be reduced.

Description

Microfluidic chip and preparation method thereof

Technical field

The present disclosure belongs to the field of gene sequencing chips, and specifically relates to a microfluidic chip and a preparation method thereof.

Background technique

The nanopore gene sequencer in the field of gene sequencing is a core component used to convert nucleic acid sequence signals into current signals. This technology is a cutting-edge application technology for gene sequencing using microfluidic chips and corresponding dedicated signal processing chips. The inventors of the present disclosure found that, in the current situation, microfluidic chips for gene sequencing still have many technical difficulties, such as miniaturization of chip unit size, circuit conduction performance, and nanopore biochemical system Biocompatibility, production yield and mass production cost.

Summary of the invention

The embodiments of the present disclosure provide a microfluidic chip and a preparation method thereof, which are used to improve one of the technical difficulties in the above-mentioned multiple aspects.

In the first aspect, an embodiment of the present disclosure proposes a microfluidic chip, including a chip unit, and the chip unit includes:

CMOS substrate;

A microelectrode layer formed on the CMOS substrate;

A hydrophilic layer formed on the CMOS substrate and covering the microelectrode layer;

A lipophilic layer formed on the hydrophilic layer;

Wherein, the lipophilic layer and the hydrophilic layer have holes penetrating from the top of the lipophilic layer to the upper surface of the microelectrode layer.

In an optional embodiment, the microelectrode layer includes:

A metal layer formed on the CMOS substrate;

An electrode layer formed on the metal layer, the electrode layer includes an MG electrode material, the M includes at least one of Ti, V, Ta, and Mo transition metals, and G includes at least one of N and O elements .

In an alternative embodiment, the side walls of the pores located in the lipophilic layer extend vertically from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the top of the pores of the lipophilic layer and The opening at the bottom has the same size.

In an alternative embodiment, the sidewalls of the pores located in the lipophilic layer extend obliquely from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the sidewalls located on the top of the pores of the lipophilic layer The size of the opening is larger or smaller than the size of the opening at the bottom.

In an alternative embodiment, the sidewalls of the holes in the hydrophilic layer extend vertically from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the top of the holes in the hydrophilic layer and the bottom of the hydrophilic layer The opening at the bottom has the same size.

In an alternative embodiment, the sidewalls of the holes located in the hydrophilic layer extend obliquely from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the holes located on the top of the hydrophilic layer The size of the opening is larger or smaller than the size of the opening at the bottom.

In an optional embodiment, the microfluidic chip further includes: a dielectric protection layer formed on the hydrophilic layer, and the lipophilic layer is formed on the dielectric protection layer.

In an optional embodiment, the hydrophilic layer includes at least one of silicon dioxide SiO2, titanium dioxide TiO2, zirconium dioxide ZrO2, and aluminum oxide Al2O3.

In an alternative embodiment, the lipophilic layer includes Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like carbon film DLC, polyimide PI, epoxy photoresist SU8 At least one.

In a second aspect, an embodiment of the present disclosure proposes a microfluidic chip, including a chip unit, and the chip unit includes:

CMOS substrate;

A microelectrode layer formed on the CMOS substrate;

A hydrophilic layer formed on the CMOS substrate and surrounding the microelectrode layer;

A lipophilic layer formed on the hydrophilic layer and the microelectrode layer;

Wherein, the lipophilic layer has holes penetrating from the top to the upper surface of the microelectrode layer.

In an optional embodiment, the microelectrode layer includes:

A metal layer formed on the CMOS substrate;

In a third aspect, embodiments of the present disclosure propose a method for preparing a microfluidic chip, including:

Forming a microelectrode layer on the CMOS substrate;

Forming a hydrophilic layer on the CMOS substrate and the microelectrode layer;

Forming a lipophilic layer on the hydrophilic layer;

A hole penetrating from the top of the lipophilic layer to the upper surface of the microelectrode layer is formed in the lipophilic layer and the hydrophilic layer.

In an alternative embodiment, forming the microelectrode layer on the CMOS substrate includes:

Forming a metal layer on the CMOS substrate;

An electrode layer is formed on the metal layer, the electrode layer includes an MG electrode material, the M includes at least one of Ti, V, Ta, and Mo transition metals, and G includes at least one of N and O elements.

In an alternative embodiment, forming a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer includes: forming holes in the lipophilic layer and the hydrophilic layer through photolithography and etching processes. The lipophilic layer etches a pattern to form holes from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the opening sizes at the top and the bottom of the holes of the lipophilic layer are the same.

In an alternative embodiment, forming a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer includes: forming holes in the lipophilic layer and the hydrophilic layer through photolithography and etching processes. The lipophilic layer etches a pattern to form a hole from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the opening size at the top of the hole in the lipophilic layer is larger or smaller than the opening size at the bottom .

In an alternative embodiment, forming a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer further includes: using photolithography and etching processes. The pattern is etched on the hydrophilic layer to form holes from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the opening sizes at the top and the bottom of the holes in the hydrophilic layer are the same.

In an alternative embodiment, forming a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer further includes: using photolithography and etching processes. The pattern is etched on the hydrophilic layer to form holes from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the size of the opening at the top of the hole in the hydrophilic layer is larger or smaller than the opening at the bottom size.

The microfluidic chip of the embodiment of the present disclosure and the preparation method thereof adopt hydrophilic and lipophilic materials with good compatibility with the nanopore biochemical system at the bottom and top of the chip unit respectively, which can ensure the wetting of the aqueous solution and realize the circuit The conduction ensures that the electrode material of the supercapacitor fully exerts its voltage driving ability, and at the same time, it can ensure that the organic amphiphilic molecule realizes self-assembly and achieves high yield. In addition, through reasonable design and process optimization of the chip unit structure, a unit size of less than 5 microns in diameter can be realized, so that it is possible to set up tens of millions of units in a single chip, and achieve the purpose of high-throughput sequencing, and at the same time Compatible with CMOS process, can improve the precision control of mass production and reduce the cost of mass production.

Description of the drawings

In order to more clearly describe the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description These are some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative labor.

Figure 1 is a schematic diagram of the principle of the microfluidic chip of the present disclosure used for gene sequencing;

2 is a schematic diagram of the structure of the chip unit of the microfluidic chip according to the first embodiment of the present disclosure;

Fig. 3 is a schematic structural diagram of a chip unit of a microfluidic chip according to a second embodiment of the present disclosure;

4 is a schematic structural diagram of a chip unit of a microfluidic chip according to a third embodiment of the present disclosure;

FIG. 5 is a schematic structural diagram of a chip unit of a microfluidic chip according to a fourth embodiment of the present disclosure;

Fig. 6 is a schematic structural diagram of a chip unit of a microfluidic chip according to a fifth embodiment of the present disclosure;

FIG. 7 is a schematic flowchart of a method for manufacturing a microfluidic chip according to an embodiment of the present disclosure;

8-13 are specific schematic diagrams of a method for preparing a microfluidic chip according to an embodiment of the present disclosure.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present disclosure will be described clearly and completely in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

In the present disclosure, it should be understood that terms such as "including" or "having" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof disclosed in this specification, and are not intended to exclude one The possibility of existence or addition of multiple other features, numbers, steps, behaviors, components, parts or combinations thereof.

Fig. 1 is a schematic diagram of the principle of using the microfluidic chip of the present disclosure for gene sequencing. As shown in FIG. 1, each chip unit in the microfluidic chip of the present disclosure includes a complementary metal oxide semiconductor CMOS substrate 101, a microelectrode layer 102 located on the CMOS substrate 101, and a CMOS substrate 101 covering it. And the hydrophilic/lipophilic material layer 103 on the microelectrode layer 102. Wherein, the hydrophilic/lipophilic material layer 103 has a hole from the top to the surface of the microelectrode layer 102 in the middle.

In the sequencing application, the pore will be filled with salt solution and provide support for the amphiphilic molecular material so that it can self-assemble into a double-layer membrane structure, thereby providing a suitable environment for the protein nanopore biochemical system to perform its functions. The microelectrode layer applies a driving voltage to the chip unit. Under the action of the driving voltage, the nanoporin interacts with the gene sequence to be tested to generate a characteristic microcurrent signal, which is conducted to the CMOS substrate for sensing through the microelectrode layer. So as to achieve gene sequencing.

The unit structure and preparation method of the microfluidic chip will be described in detail below in conjunction with the specific embodiments of the microfluidic chip of the present disclosure.

Fig. 2 is a schematic structural diagram of a chip unit of a microfluidic chip according to the first embodiment of the present disclosure. As shown in FIG. 2, the chip unit of the microfluidic chip of this embodiment includes a CMOS substrate 201, a metal layer 202, an electrode layer 203, a hydrophilic layer 204, and a lipophilic layer 205 in order from bottom to top.

Among them, the CMOS substrate 201 adopts a complementary metal oxide semiconductor process to integrate a sensing circuit for sensing characteristic micro-current signals generated during gene sequencing.

The metal layer 202 is formed on the CMOS substrate 201. In an alternative embodiment, the metal layer 202 can be plated with a seed metal layer on the upper surface of the CMOS substrate 201 by magnetron sputtering or electron beam evaporation coating process. The metal material can be Al, Ti or other resistivity. Lower metal.

The electrode layer 203 is formed on the metal layer 202. In an alternative embodiment, the electrode layer 203 may be formed on the surface of the metal layer 202 by magnetron sputtering. In an alternative embodiment, the electrode material constituting the electrode layer 203 may include an MG electrode material, the M includes at least one of transition metals such as Ti, V, Ta, and Mo, and G includes elements such as N and O. At least one.

In an alternative embodiment, the metal layer 202 and the electrode layer 203 may be integrated into the microelectrode layer 102 shown in FIG. 1. In this embodiment, the metal layer 202 and the electrode layer 203 are only an exemplary embodiment of the microelectrode layer 102. In fact, the microelectrode layer 102 in the present disclosure can also adopt many other embodiments.

The hydrophilic layer 204 is formed on the CMOS substrate 201 and covers the electrode layer 203 as a dielectric protective layer made of hydrophilic material. In an alternative embodiment, the hydrophilic material constituting the hydrophilic layer 204 may include at least one of silicon dioxide SiO2, titanium dioxide TiO2, zirconium dioxide ZrO2, aluminum oxide Al2O3, and other materials.

The lipophilic layer 205 is formed on the hydrophilic layer 204. In an alternative embodiment, the lipophilic layer 205 may include, but is not limited to, Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like film DLC, polyimide PI, epoxy resin At least one lipophilic material in the resist SU8.

Wherein, the lipophilic layer 205 and the hydrophilic layer 204 have holes penetrating from the top of the lipophilic layer 205 to the upper surface of the electrode layer 203. The hole can be realized by etching patterns through photolithography and etching processes, and serves as a channel for the protein nanopore biochemical system to act.

The microfluidic chip of the embodiment of the present disclosure adopts hydrophilic materials and lipophilic materials with good compatibility with the nanopore biochemical system at the bottom and top of the unit, respectively, which can ensure the wetting of the aqueous solution, realize the circuit conduction, and ensure the super capacitor The electrode material gives full play to its voltage driving ability, and at the same time can ensure that the organic amphiphilic molecule realizes self-assembly and achieves a high yield. In addition, through reasonable design and process optimization of the chip unit structure, a unit size of less than 5 microns in diameter can be realized, so that it is possible to set up tens of millions of units in a single chip, and achieve the purpose of high-throughput sequencing.

In the embodiment of the present disclosure, the size of the hole penetrating through the lipophilic layer 205 and the hydrophilic layer 204 is not specifically limited, and the size here may include the diameter of the hole. In an alternative embodiment, the sidewalls of the holes in the lipophilic layer 205 may extend vertically from the top to the bottom of the lipophilic layer 205, so that the opening sizes at the top and the bottom of the holes in the lipophilic layer 205 are the same. Similarly, in an alternative embodiment, the sidewalls of the holes in the hydrophilic layer 204 may extend vertically from the top to the bottom of the hydrophilic layer 204, so that the opening sizes at the top and bottom of the holes in the hydrophilic layer 204 are also It can be the same.

Fig. 3 is a schematic structural diagram of a chip unit of a microfluidic chip according to a second embodiment of the present disclosure. As shown in FIG. 3, on the basis of the embodiment shown in FIG. 2, the chip unit of the microfluidic chip of this embodiment also includes a CMOS substrate 301, a metal layer 302, an electrode layer 303, and a hydrophilic layer from bottom to top. 304. The lipophilic layer 305.

The difference from the embodiment shown in FIG. 2 is that the sidewalls of the holes in the lipophilic layer 305 extend obliquely from the top of the lipophilic layer 305 to the bottom of the lipophilic layer 305, so that the holes in the lipophilic layer 305 The size of the opening at the top is greater than the size of the opening at the bottom. Therefore, the pores penetrating the lipophilic layer 305 present a structure with a large top and a small bottom.

In an alternative embodiment, the size of the opening at the top of the hole in the lipophilic layer 305 may also be smaller than the size of the opening at the bottom.

Fig. 4 is a schematic structural diagram of a chip unit of a microfluidic chip according to a third embodiment of the present disclosure. As shown in FIG. 4, on the basis of the embodiment shown in FIG. 3, the chip unit of the microfluidic chip of this embodiment is further formed with a dielectric protection layer 405 on the hydrophilic layer 404, and the lipophilic layer 406 is formed on On the dielectric protection layer 405.

Fig. 5 is a schematic structural diagram of a chip unit of a microfluidic chip according to a fourth embodiment of the present disclosure. As shown in FIG. 5, on the basis of the embodiment shown in FIG. 3, the chip unit of the microfluidic chip of this embodiment also includes a CMOS substrate 501, a metal layer 502, an electrode layer 503, and a hydrophilic layer from bottom to top. 504. The lipophilic layer 505.

The difference from the embodiment shown in FIG. 3 is that the sidewalls of the holes in the hydrophilic layer 504 extend obliquely from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that they are located on the top of the holes in the hydrophilic layer 504. The size of the opening is smaller than the size of the bottom opening. Therefore, the holes penetrating the hydrophilic layer 504 present a structure with a small top and a large bottom.

In an alternative embodiment, the size of the opening at the top of the hole of the hydrophilic layer 504 may also be larger than the size of the opening at the bottom.

It should be noted that FIG. 5 only shows that the size of the pores in the hydrophilic layer is adjusted on the basis of the embodiment shown in FIG. On the basis, the size of the hole penetrating the hydrophilic layer is modified to a similar structure with a small top and a large bottom or a small top and bottom structure, which will not be repeated here.

Fig. 6 is a schematic structural diagram of a chip unit of a microfluidic chip according to a fifth embodiment of the present disclosure. As shown in FIG. 6, the chip unit of the microfluidic chip of this embodiment also includes a CMOS substrate 601, a metal layer 602, an electrode layer 603, a hydrophilic layer 604, and a lipophilic layer 605.

The difference from the foregoing embodiment is that the hydrophilic layer 604 is formed on the CMOS substrate 601 and surrounds the metal layer 602 and the electrode layer 603, the hydrophilic layer 604 is level with the height of the electrode layer 603, and the lipophilic layer is formed On the hydrophilic layer 604 and the electrode layer 603.

Wherein, the lipophilic layer 605 has a hole penetrating from the top to the upper surface of the electrode layer 603, and the hole is formed only in the lipophilic layer 605.

It should be noted that FIG. 4 only shows an embodiment in which a dielectric protective layer 405 is added on the basis of the embodiment shown in FIG. 3. In fact, in an alternative embodiment, it can be used in any other embodiment of the present disclosure. On the basis of, the same dielectric protective layer is added on the hydrophilic layer, and a lipophilic layer is formed on the dielectric protective layer, which will not be repeated here.

Fig. 7 is a schematic flow chart of a method for manufacturing a microfluidic chip according to an embodiment of the present disclosure. As shown in FIG. 7, the preparation method of the microfluidic chip of the present disclosure includes:

Step S110, forming a microelectrode layer on the CMOS substrate;

Step S120, forming a hydrophilic layer on the CMOS substrate and the microelectrode layer;

Step S130, forming a lipophilic layer on the hydrophilic layer;

Step S140, forming a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer.

In an alternative embodiment, as shown in FIGS. 8 and 9, step S110 forming a microelectrode layer on the CMOS substrate may include:

First, a metal layer 302 is formed on the CMOS substrate 301. In some embodiments, the seed metal layer can be plated on the CMOS substrate 301 by magnetron sputtering or electron beam evaporation coating. The metal layer material can be Al, Ti or other metals with low resistivity. Preferably, Al or Ti can be selected as the metal layer material, and the process of power 100-400W and pressure 0.4-1.2Pa is used for magnetron sputtering or electrons. Beam evaporation coating.

Next, an electrode layer 303 is formed on the metal layer 302. In some embodiments, the electrode layer 303 can be formed by magnetron sputtering TiN electrode material on the surface of the metal layer 302. The process conditions can be 100-400W, preferably 300W, process pressure 0.4-1.2Pa, 100°C-380° The substrate temperature is preferably 350° for sputtering. In an alternative embodiment, the above-mentioned TiN electrode material may also use other MG electrode materials, the M may include at least one of the transition metals such as Ti, V, Ta, Mo, and G includes N, O, and other elements. At least one.

In an alternative embodiment, after photolithography is performed on the electrode material, the electrode is etched by an ICP-RIE or RIE device using a Cl/Br-based process gas. The photolithography process preferably adopts AZ5214 photoresist, spreading the glue for 4000 revolutions for 30 seconds; baking at 95 degrees Celsius on the heating plate for 90 seconds; photolithography exposure time 6-10 seconds; after photolithography, it is developed in 3038 developer for 90 seconds.

In an alternative embodiment, as shown in FIG. 10, the step S120 to form a hydrophilic layer on the CMOS substrate and the microelectrode layer can be achieved by plating SiO2, TiO2, and TiO2 on the CMOS substrate 301 and the electrode layer 303. A dielectric protective layer 304 such as ZrO2, Al2O3, etc. can be implemented by any process such as chemical vapor deposition, magnetron sputtering, and laser pulse deposition coating.

In an alternative embodiment, as shown in FIG. 11, in step S130, forming a lipophilic layer on the hydrophilic layer can be achieved by plating a lipophilic layer 305 on the hydrophilic layer 304, which can be a coating method or a spin coating method. The lipophilic film layer is plated. The lipophilic material constituting the lipophilic layer may include, but is not limited to, Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like carbon film DLC, polyimide PI, epoxy type At least one lipophilic material in photoresist SU8. Preferably, when Teflon is used, AF1600 amorphous resin can be used, and the thickness is between 100 nm and 100 um.

In an alternative embodiment, as shown in FIGS. 12 and 13, step S140 is to form a hole in the lipophilic layer and the hydrophilic layer that penetrates from the top of the lipophilic layer to the upper surface of the microelectrode layer and can pass light. The etching process etches a pattern on the lipophilic layer 305 to form a hole from the top to the bottom of the lipophilic layer 305; further, the pattern can be etched on the hydrophilic layer 304 through a photolithography process until the etching reaches the On the surface of the electrode layer 303, holes are formed from the top to the bottom of the hydrophilic layer 304.

The preparation method of the microfluidic chip of the embodiment of the present disclosure adopts hydrophilic and lipophilic materials with good compatibility with the nanopore biochemical system, and is compatible with CMOS technology, improves the control of mass production accuracy, and reduces the cost of mass production; through the chip unit The optimization of the process can realize the possibility of setting tens of millions of units in a single chip, and realize the purpose of high-throughput sequencing.

It should be noted that the above embodiments can be freely combined as required. The above are only the preferred embodiments of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several changes and improvements can be made, and these changes and improvements are also possible. It should be regarded as falling into the protection scope of the present invention.

Claims

A microfluidic chip, characterized by comprising a chip unit, the chip unit comprising:

CMOS substrate;

A microelectrode layer formed on the CMOS substrate;

A hydrophilic layer formed on the CMOS substrate and covering the microelectrode layer;

A lipophilic layer formed on the hydrophilic layer;

Wherein, the lipophilic layer and the hydrophilic layer have holes penetrating from the top of the lipophilic layer to the upper surface of the microelectrode layer.
The microfluidic chip of claim 1, wherein the microelectrode layer comprises:

A metal layer formed on the CMOS substrate;

An electrode layer formed on the metal layer, the electrode layer includes an MG electrode material, the M includes at least one of Ti, V, Ta, and Mo transition metals, and G includes at least one of N and O elements .
The microfluidic chip of claim 1, wherein the side wall of the hole in the lipophilic layer extends vertically from the top of the lipophilic layer to the bottom of the lipophilic layer, so that it is located in the The top and bottom openings of the pores of the lipophilic layer have the same size.
The microfluidic chip of claim 1, wherein the sidewall of the hole in the lipophilic layer extends obliquely from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the The opening size at the top of the pores of the lipophilic layer is larger or smaller than the opening size at the bottom.
The microfluidic chip of claim 1, wherein the sidewalls of the holes in the hydrophilic layer extend vertically from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the The top and bottom openings of the pores of the hydrophilic layer have the same size.
The microfluidic chip according to claim 1, wherein the sidewall of the hole located in the hydrophilic layer extends obliquely from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the The opening size at the top of the pores of the hydrophilic layer is larger or smaller than the opening size at the bottom.
The microfluidic chip according to any one of claims 1-6, further comprising: a dielectric protection layer formed on the hydrophilic layer, and the lipophilic layer is formed on the dielectric Above the protective layer.
8. The microfluidic chip of claim 7, wherein the hydrophilic layer comprises at least one of silicon dioxide SiO2, titanium dioxide TiO2, zirconium dioxide ZrO2, and aluminum oxide Al2O3.
The microfluidic chip of claim 8, wherein the lipophilic layer comprises Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like carbon film DLC, polyimide PI, At least one of epoxy photoresist SU8.
A microfluidic chip, characterized by comprising a chip unit, the chip unit comprising:

CMOS substrate;

A microelectrode layer formed on the CMOS substrate;

A hydrophilic layer formed on the CMOS substrate and surrounding the microelectrode layer;

A lipophilic layer formed on the hydrophilic layer and the microelectrode layer;

Wherein, the lipophilic layer has holes penetrating from the top to the upper surface of the microelectrode layer.
The microfluidic chip of claim 10, wherein the microelectrode layer comprises:

A metal layer formed on the CMOS substrate;

An electrode layer formed on the metal layer, the electrode layer includes an MG electrode material, the M includes at least one of Ti, V, Ta, and Mo transition metals, and G includes at least one of N and O elements Kind.
The microfluidic chip of claim 11, wherein the hydrophilic layer comprises at least one of silicon dioxide SiO2, titanium dioxide TiO2, zirconium dioxide ZrO2, and aluminum oxide Al2O3.
The microfluidic chip of claim 12, wherein the lipophilic layer comprises Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like carbon film DLC, polyimide PI, At least one of epoxy photoresist SU8.
A method for preparing a microfluidic chip, which is characterized in that it comprises:

Forming a microelectrode layer on the CMOS substrate;

Forming a hydrophilic layer on the CMOS substrate and the microelectrode layer;

Forming a lipophilic layer on the hydrophilic layer;

A hole penetrating from the top of the lipophilic layer to the upper surface of the microelectrode layer is formed in the lipophilic layer and the hydrophilic layer.
The method for manufacturing a microfluidic chip according to claim 14, wherein forming a microelectrode layer on the CMOS substrate comprises:

Forming a metal layer on the CMOS substrate;

An electrode layer is formed on the metal layer, the electrode layer includes an MG electrode material, the M includes at least one of Ti, V, Ta, and Mo transition metals, and G includes at least one of N and O elements .
The method for preparing a microfluidic chip according to claim 15, wherein the lipophilic layer and the hydrophilic layer are formed to penetrate from the top of the lipophilic layer to the upper surface of the microelectrode layer. The holes include: etching patterns on the lipophilic layer through photolithography and etching processes to form holes from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the holes in the lipophilic layer The top and bottom openings are the same size.
The method for preparing a microfluidic chip according to claim 15, wherein the lipophilic layer and the hydrophilic layer are formed to penetrate from the top of the lipophilic layer to the upper surface of the microelectrode layer. The holes include: etching patterns on the lipophilic layer through photolithography and etching processes to form holes from the top of the lipophilic layer to the bottom of the lipophilic layer, so that the holes in the lipophilic layer The size of the opening at the top is larger or smaller than the size of the opening at the bottom.
The method for preparing a microfluidic chip according to claim 16 or 17, wherein the lipophilic layer and the hydrophilic layer are formed to penetrate from the top of the lipophilic layer to the top of the microelectrode layer. The holes on the surface further include: etching patterns on the hydrophilic layer by photolithography and etching processes to form holes from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the holes are located in the hydrophilic layer. The top and bottom openings of the holes are the same size.
The method for preparing a microfluidic chip according to claim 16 or 17, wherein the lipophilic layer and the hydrophilic layer are formed to penetrate from the top of the lipophilic layer to the top of the microelectrode layer. The holes on the surface further include: etching patterns on the hydrophilic layer by photolithography and etching processes to form holes from the top of the hydrophilic layer to the bottom of the hydrophilic layer, so that the holes are located in the hydrophilic layer. The opening size at the top of the hole is larger or smaller than the opening size at the bottom.
The method for preparing a microfluidic chip according to claim 14, wherein the hydrophilic layer comprises at least one of silicon dioxide SiO2, titanium dioxide TiO2, zirconium dioxide ZrO2, and aluminum oxide Al2O3.
The method for preparing a microfluidic chip according to claim 14, wherein the lipophilic layer comprises Pyralene, Teflon, cyclic olefin copolymer COC, diamond-like carbon film DLC, poly At least one of amide PI and epoxy photoresist SU8.