WO2021058123A1

WO2021058123A1 - Slave device, bus system, and methods

Info

Publication number: WO2021058123A1
Application number: PCT/EP2020/000153
Authority: WO
Inventors: Christof Michenthaler; Leo Aichriedler; Thomas Hafner; Dirk Hammerschmidt
Original assignee: Infineon Technologies Ag
Priority date: 2019-09-23
Filing date: 2020-09-09
Publication date: 2021-04-01
Also published as: US20220353108A1; CN114341827A; DE102019125493A1; EP4035314A1

Abstract

The invention relates to methods and slave devices in which addresses are assigned to slave devices by means of collision detection.

Description

description

Slave device, bus system and method

TECHNICAL AREA

The present application relates to slave devices, bus systems and corresponding methods.

BACKGROUND

Bus systems enable several bus participants to communicate with one another. One application example is sensor systems in which several sensors communicate as slave devices with a control unit as master device, for example in an automobile system. In some applications it is necessary to assign unique addresses to the various sensors so that the control unit can control the sensors individually via a common bus.

In some conventional approaches, such addresses are often permanently assigned to slaves such as sensors at the end of production or as part of a configuration when building a bus system. Accordingly, preconfigured slave devices are then used. This is relatively inflexible and, in addition, in cases in which several sensors share a single physical interface, it can only be carried out with great effort.

SHORT VERSION

There are a method according to claim 1, a slave device according to claim 11 and a bus system according to Claim 16 provided. The subclaims define further embodiments.

According to one embodiment, a method is provided, comprising: in a slave device,

-Receiving an initialization signal,

-in response to the initialization signal, sending an identification of the slave device via a bus,

Check whether a collision occurs on the bus when sending the initialization identification,

-if a collision occurs, put the slave device in an inactive state, and

-if no collision occurs, receive an address for the slave device after sending the identification.

According to a further exemplary embodiment, a slave device is provided, comprising: a communication circuit for sending signals to a bus and for receiving signals from a bus, the slave device being set up to:

-Receiving an initialization signal,

Check whether a collision occurs on the bus when the identification is sent,

-if a collision occurs, put the slave device in an inactive state, and

The above summary serves only as a brief overview of some exemplary embodiments and is not to be interpreted as restrictive. In particular, other exemplary embodiments may have other features than the features discussed above. BRIEF DESCRIPTION OF THE DRAWINGS

1 is a diagram of a bus system according to an embodiment.

FIG. 2 is a flow diagram for illustrating methods according to some exemplary embodiments.

3 shows examples of signals to illustrate exemplary embodiments.

4 shows a driver circuit with collision detection as used in some exemplary embodiments.

5 shows a diagram of a system according to a further exemplary embodiment.

6 shows a diagram of a system according to a further exemplary embodiment.

7 shows example signals to illustrate some exemplary embodiments.

DETAILED DESCRIPTION

Various exemplary embodiments are explained in detail below. These exemplary embodiments are used for illustration purposes only and are not to be construed as restrictive. In the described exemplary embodiments, features or components can be replaced by alternative features or components or can also be omitted. In addition to the features and components described, further features or components can also be present.

In particular, the exemplary embodiments described below relate primarily to address allocation Slave devices of a bus system during initialization. Other features of the communication system, such as details of the signaling, protocols used and the like, can be implemented in any conventional manner known for bus systems and are therefore not specifically explained.

For example, in some exemplary embodiments, the communication can take place via a CAN bus, and apart from the described address allocation and associated features and components, the communication can take place as in conventional communication via a CAN bus.

Features and components of different exemplary embodiments can be combined. For example, variations and modifications that are described for one of the exemplary embodiments can also be applied to other exemplary embodiments and are therefore not explained repeatedly.

1 shows a block diagram of a system 10 according to an exemplary embodiment. The system of FIG. 10 comprises a master device 11 and a plurality of slave devices 12 which are connected via a bus 13. Three slave devices 12A, 12B, 12C are shown as an example. The number of three slave devices 12 serves only as an example, and a different number of slave devices can also be provided. The bus 13 can be any wired bus, for example a CAN bus, a FlexRay bus or the like. The bus 13 can be provided in various configurations, for example a star configuration, another branched configuration such as the illustrated component, a daisy chain configuration, and the like.

In some exemplary embodiments, as will be explained in more detail later, a plurality of slave devices in be arranged in a cluster. As an example, the slaves 12A and 12B are arranged in a cluster 14 which has a single connection for the bus 13. In this case, the bus 13 can be converted to another communication within the cluster 14. Examples of this are also explained in more detail later.

In some exemplary embodiments, the slave devices 12 are sensors and the master device 11 is a control unit. In some exemplary embodiments, the system 10 is arranged in a vehicle, for example a motor vehicle. In this case, the slave devices 12 can be, for example, sensors of the motor vehicle. The master device can also be referred to as the master for short, and slave devices can be referred to as slaves for short.

In an initialization phase of the system 10, the master device 11 assigns addresses to the slave devices 12 in order to be able to address them separately, for example in order to be able to read out or control individual sensors in a targeted manner in the case of sensors. A method for such an address allocation according to some

Embodiments will now be described with reference to FIG.

2 explained. The method of FIG. 2 can be carried out, for example, in the system 10 of FIG. 1 or subsequent systems, and is described with reference to FIG. 1 for a better understanding. The method of FIG. 2 can, however, also be carried out in other systems.

The method of FIG. 2 begins at 20. At 21, a master device, for example the master device 11 in FIG. 1, sends an initialization signal via the bus, for example the bus 13 of FIG

The initialization signal signals to the slave devices, for example the slave devices 12 of FIG. 1, that the initialization is now beginning. The initialization signal can be any predetermined signal sequence, for example a predetermined sequence of values which correspond to a logical 0 and values which correspond to a logical 1, which enables the slave devices to recognize that the initialization should now begin.

The slave devices 12 all have a predetermined identification (identification) that was programmed in during manufacture, for example. In some exemplary embodiments, a unique 32-bit sequence can be used, other sequence lengths also being possible. A possible number of different identifications is selected in such a way that each slave device produced can be assigned a unique identification. Different areas of identifications can be reserved for different manufacturers of slave devices.

At 22 all slaves respond simultaneously with the identification assigned to them. For example, all slaves send the bit sequence assigned to them.

In the case of exemplary embodiments, a

Communication protocol used, which has two possible levels on the bus, which are assigned a logical 0 and a logical 1. One of the levels is dominant over the other level, that is, if different bus participants drive different levels, the dominant level "wins". In CAN buses, this can be implemented, for example, by actively driving one of the levels (in this case a voltage difference between the bus lines via a threshold value corresponding to a logic 0), while the other value corresponds to a voltage difference at or near 0, which is passively established by connecting the bus lines via a resistor and corresponds to a logic 1. In this assignment, logic 0 is dominant across from logical 1. In the context of this application, it is also said that a slave device “sets” a level on a bus. Depending on the implementation, this can either be set by an active drive or by a “setting” in which the slave device is passive and itself for example, the level is set via a resistor without active driving.

At 23 the slave devices detect a collision on the bus. From the perspective of a slave device, a collision has occurred if the value on the bus, e.g. voltage level, does not correspond to the identification sent by it. In the above exemplary embodiment with dominant and recessive states, this occurs when another slave sends a "more dominant" identification than the slave that recognizes a collision.

Those slave devices that detect a collision are then eliminated at 23 from the present "initialization round", that is, the loop of FIG no other slave device is driving a "more dominant" level). The master device then assigns an address to this slave device at 24. This slave device is thus configured with regard to the address and is eliminated from the initialization at 25, e.g. by being muted.

At 26 it is checked whether all slave devices have received an address. If this is the case, the method ends at 27, otherwise the method first jumps to 21 for the next initialization round.

An example of such a collision detection will now be briefly explained with reference to FIG. 3. Signals shown in FIG. 3 serve only as simple ones Example for better illustration and are not to be interpreted as restrictive, since signal forms may differ depending on the implementation.

In FIG. 3, a situation is assumed in which a low bus level is dominant and a high bus level is recessive, so that if one participant wants to send a low bus level and another participant wants to send a high bus level, the bus level is low overall. This is the case, for example, with a CAN bus.

In the example of FIG. 3, three slave devices (designated slave 1, slave 2, slave 3 in FIG. 1) are assumed. Data sent by slave 1 are illustrated by curve 30, data sent by slave 2 are illustrated by curve 31, and the data sent by slave 3 are illustrated by curve 32. A curve 33 shows the level on a bus.

After receiving the initialization signal (for example at 21 in FIG. 2), all participants begin to send their identification. This phase is also known as the arbitration phase. In the example of FIG. 3, this is done initially with a first bit which indicates the beginning of a data frame (SOF, start of frame) in which all slave devices pull the bus to a low level. The bus level is therefore low here. Then all participants send their identification, which in the example of FIG. 311 comprises bits. In the example of Fig.

3 started with the most significant bit number 10, up to the least significant bit 0.

A person skilled in the art will immediately recognize that in the case of a CAN bus, the arbitration leads to a maximum prioritization of the bus access method being implemented for the lowest identification, as will also be explained below. The participant with the highest priority (represented by a dominant address) asserts itself against all other participants and is allowed to send. This process is also known as CSMA-CR (Carrier Sense Multiple Access - Collision Resolution) and is used here to assign addresses. It is therefore possible to assign graduated priorities for individual participants.

In the example of Fig. 3 begins for all

Slave devices send address 1 with bit sequence 11001, that is, the slave devices send a high level for bits 10 and 9, a low level for bits 8 and 7 and a high level again for bit 6.

Accordingly, the bus is also at a high level for bits 10 and 9, at a low level for bits 8 and 7 and at a high level again for bit 6.

The identification of slave 1 and slave 3 continues with bit 5 with a 0 corresponding to a low level, while the identification of slave 2 continues with a 1, i.e. a high level. Since, as mentioned above, the low level is dominant in the example of FIG. 3, the bus level at bit 5 is low. The slave 2 can thus detect a collision at 35, that is to say at bit 5, since the bus level does not correspond to the identification it sent. The slave 2 is thus eliminated, as explained for 23 in FIG. 2. In this example, slave 2 remains in the recessive state, that is to say the high level.

The identification of slaves 1 and 3 continues with bits 4 and 3 with the bit sequence 11, i.e. high level, and the bus level is also high. With the next bit (bit 2), the bit value for slave 1 is equal to 1 (high level) and low for slave 3 (low level). The bus level is thus low, and as indicated by an arrow 34, the slave 1 now detects a collision (low bus level while it wants to send a high bus level corresponding to bit 1) and also ruled out. The slave 3 has thus "won" this round and sends its complete identification (0 for bit 1 and 1 for bit 0), followed by a completion bit (RPR) with a value of 0.

Subsequently, slave 3, which is the only one in which no collision is detected, is assigned an address by means of control data (control) and data bytes (data) (corresponding to 24 of FIG. 2). Slave 3 is then muted for the next round, and only slaves 1 and 2 send their identifications. In this case, slave 1 will win next, since slave 2 will again recognize a collision at 35. Finally, slave 2 is assigned an address. As can be seen, with the approach shown in FIG. 3, in which the 0 is dominant and the most significant bit is sent first, the slave device with the lowest identification always "wins". In other exemplary embodiments, the least significant bit can also be sent first , in which case the lowest address does not automatically "win".

Although the identification is shown in Figure 3 as 11-bit values (bits 0-10), more or fewer bits can be used. In some exemplary embodiments, for example, a 32-bit value can be used, which results in over 4,000,000,000 possible identifications.

Different manufacturers of slave devices can be assigned different areas of identifications that they can use for their products. Some of the bits can be assigned a code that specifies the manufacturer.

Various options for collision detection and corresponding systems are explained in more detail below. Fig. 4 shows a transmission and

Collision detection circuit with collision detection via a transmission line TxD, on which a transmission signal from a Slave device is sent, in particular the identification. The transmission signal can then be converted to a bus signal by a line driver.

In the circuit of FIG. 4, a PMOS transistor 42 is connected between a transmission connection 47 and a positive supply voltage 45, and an NMOS transistor 43 is connected between the transmission connection 47 and ground 46.

In normal operation (after the initialization phase described above), the PMOS transistor 42 is used as a push transistor and NMOS transistor 43 is used as a pull transistor in order to selectively switch the transmission connection 47 to the positive

To put supply voltage 45 or ground 46. For example, the positive supply voltage 45 can correspond to a logical 1 and ground 46 to a 0. In this case, the transistor 42 has a similar behavior, for example due to corresponding dimensioning, as the transistor 43, so that in this case the push transistor and pull transistor are approximately the same strength, i.e. have a similar current driving capability.

For sending the identification during the initialization phase, a PMOS transistor 41 is used instead of the PMOS transistor 42, which is also connected between the positive supply voltage 45 and the transmission output 47. The PMOS transistor 41 is dimensioned to be weaker than the PMOS transistor 42, that is to say with a lower current conductivity and / or a higher resistance Ron in the switched-on state. This means that when the identifications are sent, the PMOS transistor 45 serving as a push transistor is weaker than the NMOS transistor 43 serving as a pull transistor. If a transmission circuit as shown in FIG high level of the supply voltage 45 sends (by closing the transistor 45 and opening the transistor 43) and another slave by means of a such a transmission circuit sends a logic 0 corresponding to the low level of the ground 46 (by closing the corresponding transistor 43 and opening the transistor 41), there is a total of a logic 0 on the transmission line TxD corresponding to the ground level (since the transistor 45 used here is weaker) . In the slave that sends the logical 1, this is done by means of a

Collision detection circuit 40, 44 recognized as a collision. In particular, an inverted version of the signal on the list transmission line TxD and a control signal s, which is used to control the transistors 41, 43, are fed to a logic gate 44 by an inverter 40. The logic gate 44 then determines whether the level on the transmission line TxD corresponds to the level intended on the basis of the control signal s.

In particular, in the event of a collision, the signal s controls the transistor 41 to be closed and the transistor 43 to be open, and a low voltage corresponding to ground potential is still present at the transmission output 47. In this case, the logic gate 44 outputs a corresponding collision signal c.

It should be noted that, in principle, in other embodiments, a reverse logic is also possible, with a weaker pull transistor which replaces the transistor 43 during the initialization.

The differentiation between the initialization phase and a later operating phase, in which the transistor 42 is then used, can take place, for example, by means of an address flag in a slave device. Once the slave device has been assigned an address, the address flag is set and transistor 42 is used in place of transistor 41. 13th

The transmission and collision detection circuit of FIG. 4 can be used in particular in cases in which several slave devices are arranged in a cluster which share a single line driver for a bus, for example a CAN bus. An example of such a system 50 is shown in FIG.

The system 50 of FIG. 5 comprises a master device 51 and a plurality of slave clusters 52, of which a first slave cluster 52A and a second slave cluster 52B are shown. The number of two slave clusters 52A, 52B is only to be understood as an example, and only one slave cluster or more than two slave clusters can be provided. The slave clusters 52 can each be implemented on a single chip, for example.

The master device 51 is connected to the slave clusters 52 via a bus 53. In the example in FIG. 5, the bus 53 is a CAN bus with two lines BusH, BusL.

The master device 51 has a microcontroller 54 (microcontroller, MC) and a line driver (line driver) 55 for driving the lines BusH, BusL of the bus 53.

The microcontroller 54 sends data to be transmitted via a transmission line TxD and reception to the line driver 55 and receives received data from the line driver via a reception line RxD. The data sent include the initialization signal sent at 21 in FIG. 2 and the address assigned at 24 in FIG. 2, and the data received include the identifications sent by the slave devices.

In the exemplary embodiment in FIG. 2, the slave clusters 52A and 52B are designed essentially the same. Therefore, only the slave cluster 52A is described in detail below, and the explanations apply to the slave cluster 52A accordingly. In other embodiments, different slave clusters can also be configured differently, for example they can comprise different numbers or types of slave devices.

The slave cluster 52A has a line driver 56 for communication via the bus 53 and a number of sensors 57, which serve as examples for slave devices. In the example of FIG. 5A, the slave cluster 52A comprises a first sensor 57A and a second sensor 57B. In other exemplary embodiments, more than two sensors 57 can also be provided. The sensors 57A and 57B communicate with the line driver 56 via a transmission line TxD and a reception line RxD. Via the transmission line TxD, for example, data to be sent are transmitted via the bus 53, such as the identification explained above. Data are received via the bus 53 via the receiving line RxD, for example the initialization signal which the master device 51 sends at 21 in FIG. 2, as well as the assigned address (24 in FIG. 2).

If the sensors 57A, 57B send different levels on the transmission line TxD, this can be done as explained with reference to FIG

Collision detection circuit can be detected. The collision detection is also carried out for slaves of different slave clusters 52, with the corresponding level that a slave of a slave cluster sends via the line driver 56 of the slave cluster 52 to the transmission lines TxD of the other slave clusters 52 (in the example of FIG. 5 with two slave clusters of the other slave cluster).

The addresses assigned using the method discussed here are then stored in respective address registers 58A, 58B of the sensors 57A, 57B. In other exemplary embodiments, a collision detection can take place by means of a feedback function, in which the transmission signal sent to the bus is fed back to receiving lines. The collision detection can then take place by comparing the transmitted signal with the signal on the receiving line. An example system for this is shown in FIG. 6.

A system 60 of FIG. 6 comprises a master device 61 and a multiplicity of slave devices 62, of which four slave devices 62A, 62B, 62C and 62D are shown as an example. The slave devices 62 are connected to the master device 61 via a bus 63 which, in the example in FIG. 6, is designed as a two-wire bus with two bus lines BusH, BusL, in particular as a CAN bus.

The master device 61 has a microcontroller 64 and a line driver 65 which, like the microcontroller 54, operate under the line driver 55 of the master device 51 of FIG. 5 and are therefore not described again in detail.

In the system 60, the slave devices 62A to 62D are configured in the same way. Therefore, only the slave device 62A is explained in more detail below, and the description applies accordingly to the slave devices 62B to 62D. In other exemplary embodiments, the slave devices can also be configured differently.

The slave device 62A comprises a line driver 66 and a sensor 67. In other embodiments, instead of the sensor 67, other components can also be provided.

The sensor 67 sends signals to be sent via a transmission line TxD to the line driver 66 and receives reception signals via a reception line RxD from the line driver 66, the corresponding signals between the bus 63 and the lines TxD, RxD. In particular, in response to an initialization signal, as at 21 in FIG. 2, the sensor 67 sends its identification (at 22 in FIG. 2) and, if it does not detect a collision, receives an address assigned to it (for example at 24 in FIG. 2). . This address is then stored in an address register 68.

For collision detection, during the

Initialization phase when the identification is sent, the corresponding value on the bus 63 is looped back as a receive signal to the receive line RxD. By comparing a transmission signal on the transmission line TxD with this reception signal, a collision can be detected if the reception signal deviates from the transmission signal (for example if the sensor 67 sends a recessive value and another sensor sends a dominant value). In this way, collisions can be detected. A transmission speed when sending the identification is selected in such a way that collision detection can also take place in the event of a loop delay when looping back.

This delay depends, for example, on the length of the cable used. It should again be noted that the signals of FIG. 7 are only an example and are not to be regarded as limiting.

For further illustration, FIG. 7 shows a more detailed example of signals such as can be present in the system of FIG. 6, for example. To simplify matters, the signals for a master device and two slave devices are shown.

In the example of FIG. 7, the master device (for example the master device 51 in FIG. 5 or the master device 61 in FIG. 6) first sends an initialization signal (for example at 21 in FIG. 2).

In the example of FIG. 7, the hexadecimal value 0x55h corresponding to 3 bytes is used three times as the initialization signal sent alternately with values 1 and 0, each separated by a start / stop bit. The three repetitions create redundancy if a slave does not correctly identify the initialization signal the first time. However, any other bit sequence that can be clearly identified by the slave devices as an initialization signal can also be used. During this phase, designated as master in FIG. 7, a corresponding signal is then present on the bus.

After the completion of the initialization signal, the slave devices respond with their identifications. These begin with a start bit followed by a 4-byte (32-bit) long identification, the 4 bytes being separated from each other by a stop bit. In the example in FIG. 7, the 1st byte with the most significant bits (MSB) for both slave devices is 00011011, so that there is no collision here. The next byte of the identification (referred to as the 3rd byte in FIG. 7) is 11111000 for the first slave and 11111001 for the second slave, so that there is a collision with the last bit. It is again assumed that the 0 is dominant compared to the 1, so that a level corresponding to a 0 is present on the bus. The second slave recognizes a collision (it wants to drive a 1 onto the bus, but the bus shows a 0) and is eliminated and switches to mute, for example to the recessive state. This is identified by the reference numeral 70 in FIG. 7.

The first slave continues to send its identification (labeled 2nd byte and 1st byte in FIG. 7) and is then assigned its address, as has already been explained. The first slave is then eliminated in the following round, so that in the case of two slave devices, as in FIG. 7, the second slave device is assigned an address. Thus, with the exemplary embodiments discussed here, addresses can be assigned to a large number of slaves, with collision detection ensuring that only one slave at a time receives an identification.

Some embodiments are defined by the following examples:

Example 1. A method comprising: in a slave device,

-Receiving an initialization signal,

-if a collision occurs, put the slave device in an inactive state, and

Example 2. The method of example 1, wherein checking whether there is a collision on the bus comprises determining that there is a collision if a level on the bus does not correspond to an expected value based on the identification sent.

Example 3. The method according to example 1 or 2, wherein the bus has a dominant level or a recessive level, and wherein there is a collision on the bus if the recessive level is set on the bus by the slave device when the identification is sent and on the Bus the dominant level is present.

Example 4. The method according to example 3, wherein the method involves sending a further identification by a further slave device in response to the initialization signal comprises, and wherein the collision is present on the bus when the further slave device sets the dominant level on the bus.

Example 5. Method according to one of Examples 1 to 4, the checking of whether a collision is present on the bus being carried out on the basis of a signal on a transmission line of the slave device.

Example 6. Method according to one of Examples 1 to 5, wherein the slave device is arranged in a slave cluster in which several slave devices share a bus interface.

Example 7. The method according to Example 5 or 6, wherein the slave device uses a push-pull driver to send the identification, one push transistor or push-pull transistor of the push-pull driver being weaker than the other of the push-pull driver. Transistor or pull transistor.

Example 8. The method according to one of Examples 1 to 7, wherein the checking for whether a collision is present is based on a signal on a receiving line of the slave device.

Example 9. The method according to one of Examples 1 to 8, further comprising sending the initialization signal by a master device and sending the address by the master device.

Example 10. Method according to one of Examples 1 to 9, wherein the method is repeated at least until an address is assigned to the slave device.

Example 11. Slave device comprising: a communication circuit for sending signals to a bus and for receiving signals from the bus, wherein the slave device is arranged to:

-Receiving an initialization signal,

-in response to the initialization signal, sending an identification of the slave device via the bus,

Check whether a collision occurs on the bus when the identification is sent,

-if a collision occurs, put the slave device in an inactive state, and

Example 12. Slave device according to example 11, wherein checking whether there is a collision on the bus comprises determining that there is a collision if a level on the bus does not correspond to an expected value based on the identification sent.

Example 13. Slave device according to example 11 or 12, wherein the bus has a dominant level or a recessive level, and where there is a collision on the bus if the recessive level on the bus is set by the slave device when the identification is sent and on the Bus the dominant level is present.

Example 14. Slave device according to example 13, with a collision on the bus when the further slave device sets the dominant level on the bus.

Example 15. Slave device according to one of Examples 11 to 14, the checking of whether there is a collision on the bus being carried out on the basis of a signal on a transmission line of the slave device. Example 16. Slave device according to Example 15, the slave device being arranged in a slave cluster in which several slave devices share a bus interface.

Example 17. Slave device according to Example 15 or 16, wherein the slave device for sending the identification comprises a push-pull driver, one push transistor or push-pull transistor of the push-pull driver being weaker than the other of the push-pull driver. Transistor or pull transistor.

Example 18. Slave device according to one of Examples 11 to 17, the checking of whether a collision is occurring based on a signal on a receiving line of the slave device.

Example 19. A system comprising a slave device according to one of Examples 11 to 18, and a master device which is set up to send the initialization signal and to send the address.

Example 20. The system according to example 19, comprising a plurality of slave devices, wherein the master device is set up to send the initialization signal again after the address has been sent until an address has been assigned to all slave devices.

Although specific exemplary embodiments have been illustrated and described in this specification, those of ordinary skill in the art will recognize that a variety of alternative and / or equivalent implementations may be substituted for the specific exemplary embodiments shown and described in this specification without departing from the scope of that shown Invention differ, can be chosen. It is the intention that this application cover all adaptations or variations of the specific embodiments discussed herein are covered. Therefore, it is intended that this invention be limited only by the claims and the equivalents of the claims.

Claims

Expectations

1. A method comprising: in a slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D),

-Receiving an initialization signal,

-in response to the initialization signal, sending an identification of the slave device (12A, 12B, 12C; 57A,

57B; 62A, 62B, 62C, 62D) via a bus (13; 53; 63),

Check whether a collision occurs on the bus (13; 53; 63) when sending the initialization identification,

- if a collision occurs, setting the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) in an inactive state, and

-if no collision occurs, receiving an address for the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) after sending the identification.

The method of claim 1, wherein checking whether there is a collision on the bus (13; 53; 63) comprises determining that there is a collision if a level on the bus (13; 53; 63) is not one corresponds to the expected value based on the identification sent.

3. The method of claim 1 or 2, wherein the bus (13; 53; 63) has a dominant level or a recessive level, and wherein there is a collision on the bus (13; 53; 63) if the identification of the recessive level is set on the bus (13; 53; 63) by the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) and the dominant level is set on the bus (13; 53; 63) is present.

4. The method according to claim 3, wherein the method involves sending a further identification by a further slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) in response to the initialization signal, and wherein the collision is on the bus (13; 53; 63) if the further slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) sets the dominant level on the bus (13; 53; 63).

5. The method according to any one of claims 1 to 4, wherein the

Check whether there is a collision on the bus (13; 53; 63) based on a signal on a transmission line (TxD) of the

Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) takes place.

6. The method according to any one of claims 1 to 5, wherein the

Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) is arranged in a slave cluster (52A, 52B) in which a plurality of slave devices (12A, 12B, 12C; 57A, 57B;

62A, 62B, 62C, 62D) share a bus interface (56).

7. The method of claim 5 or 6, wherein the

Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) uses a push-pull driver to send the identification, whereby one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor.

8. The method according to any one of claims 1 to 7, wherein checking whether a collision is present based on a signal on a receiving line (RxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) ) he follows.

9. The method according to any one of claims 1 to 8, further comprising sending the initialization signal by a master device (11; 51; 61) and sending the address by the master device (11; 51; 61).

10. The method according to any one of claims 1 to 9, wherein the method is repeated at least until the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) an address is assigned.

11. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) comprising: a communication circuit for sending signals to a bus (13; 53; 63) and for receiving signals from the bus (13; 53; 63), the slave device (12A, 12B, 12C; 57A , 57B; 62A, 62B, 62C, 62D) is set up for:

-Receiving an initialization signal,

57B; 62A, 62B, 62C, 62D), via the bus (13; 53; 63),

Check whether a collision occurs on the bus (13; 53; 63) when sending the identification,

12. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to claim 11, wherein checking whether a

There is a collision on the bus (13; 53; 63), comprises determining that a collision has occurred if a level on the bus (13; 53; 63) does not correspond to a value expected on the basis of the identification sent.

13. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to claim 11 or 12, wherein the bus (13; 53;

63) has a dominant level or a recessive level, and wherein there is a collision on the bus (13; 53; 63) if, when the identification is sent, the recessive level on the bus (13; 53; 63) from the slave device (12A , 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is set and the dominant level is present on the bus (13; 53; 63).

14. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to claim 13, wherein a collision occurs on the bus

(13; 53; 63) is present when the further slave device

(12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) sets the dominant level on the bus (13; 53; 63).

15. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to one of claims 11 to 14, wherein checking whether a collision is present on the bus (13; 53; 63) is based on a signal on a transmission line (TxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) takes place.

16. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to claim 15, wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is arranged in a slave cluster (52A, 52B) in which a plurality of slave devices (12A, 12B , 12C; 57A, 57B; 62A, 62B, 62C, 62D) share a bus interface (56).

17. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to claim 15 or 16, wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D) comprises a push-pull driver for sending the identification, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor.

18. Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B,

62C, 62D) according to one of claims 11 to 17, wherein checking whether a collision is present is based on a signal on a receiving line (RxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) takes place.

19. A system (10; 50; 60) comprising a slave device

(12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to one of the

Claims 11 to 18, and a master device (11; 51; 61), which is set up to send the initialization signal and to send the address.

20. System (10; 50; 60) according to claim 19, comprising a plurality of slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C,

62D), the master device (11; 51; 61) being set up to send the initialization signal again after the address has been sent until all slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) have one Address is assigned.