WO2021057609A1 - Current dac circuit and current output method - Google Patents

Abstract

Provided are a current DAC circuit and a current output method. Said method comprises: by taking the acquired exponential reference current and linear reference current as references, a linear DAC circuit (100) of a circuit performing linear digital-to-analog conversion on a digital code inputted into the linear DAC circuit (100) to obtain a first linear analog current signal and a second linear analog current signal (100); and an exponential current generation circuit (300) generating an exponential current on the basis of the first linear analogue current signal and a preset minimum expected output current and outputting same, and using the exponential current as an output signal of the current DAC circuit, or the linear DAC circuit (100) directly using the second linear analog current signal as an output signal of the current DAC circuit, so that a user can select an output signal of the linear DAC circuit (100) according to his own needs, realizing selection for whether the current DAC circuit outputs an exponential current or an output linear current.

Description

A current DAC circuit and method of output current

This application claims the priority of a domestic application filed with the Chinese Patent Office on September 24, 2019, the application number is 201910908442.9, and the invention title is "a current DAC circuit and a method for outputting current", the entire content of which is incorporated herein by reference Applying.

Technical field

The present invention relates to the technical field of integrated circuits, in particular to a configurable linear or exponential current DAC circuit and a method for outputting current.

Background technique

In recent years, with the development of science and technology and the improvement of people's living standards, digital products have been widely used. Most of the screens of digital products use LCD screens, and the brightness control of the LCD is adjusted by the backlight LED driver chip. Because the human eye's perception of light is in the form of a logarithmic curve, that is, it is more sensitive at low brightness, and the higher the brightness, the less sensitive. Therefore, the exponential LED current adjustment curve will make the human eye’s perception of light closer to linear, and the experience will be more comfortable, and it will protect the user’s eye health. Therefore, more and more mainstream high-end LED driver chips are adopted while supporting users to configure The linear or exponential current regulation scheme.

The existing technical solutions mainly include digital solutions and analog solutions. Here are examples.

Patent 1 "APPARATUS FOR IMPROVING THE ACCURACY OF AN EXPONENTIAL CURRENT DIGITAL-TO-ANANLOG (IDAC) USING A BINARY-WEIGHTED MSB" mentions a digital solution. This solution realizes exponential current by implementing exponential mapping in the digital part of the MSB (MostSignificantBit) and LSB (Last (Least) SignificantBit) parts of the adjustment code (digital code of the linear DAC circuit);

Patent 2 "SYSTEM AND METHOD FOR EXPONENTIAL DIGITAL TO ANALOG CONVERSION" mentions an analog solution. This scheme realizes the exponential current by using the iterative addition method of the output current in the analog part.

Although the exponential current is realized in the above solution, the conversion or selection between the exponential current and the linear current cannot be realized.

Summary of the invention

In view of this, the embodiment of the present invention provides a current DAC (Digital to Analog Converter, digital-to-analog converter) circuit and a method for outputting current to realize conversion or selection between exponential current and linear current.

To achieve the foregoing objective, the embodiments of the present invention provide the following technical solutions:

A current DAC circuit, including:

The linear DAC circuit is used to obtain the first linear analog current signal and the second linear analog current after linear digital-to-analog conversion of the digital code input to the linear DAC circuit based on the acquired exponential reference current or linear reference current Signal, the first output terminal of the linear DAC circuit is used to output the first linear analog current signal, and the second output terminal of the linear DAC circuit is used to output the second linear analog current signal;

An exponential current generating circuit for obtaining a first linear analog current signal output by the linear DAC circuit and a preset minimum expected output current, based on the first linear analog current signal and the preset minimum expected output current Generate exponential current;

A first node, where the first node serves as an output terminal of the current DAC circuit, and selectively outputs a second linear analog current signal output by the linear DAC circuit or an exponential current output by the exponential current generating circuit.

Optionally, in the above-mentioned current DAC circuit, the exponential current generating circuit is specifically used for:

The voltage generated by the first linear analog current signal is superimposed with the voltage corresponding to the preset minimum expected output current, and an exponential current is generated according to the superimposed voltage.

Optionally, in the above-mentioned current DAC circuit, the exponential reference current generating circuit includes:

A first constant current source, a second constant current source, a first diode, a second diode, and a transconductance amplifier;

The input terminal of the first diode is connected to the output terminal of the first constant current source and the non-inverting input terminal of the transconductance amplifier, and the output terminal of the first diode is grounded;

The input terminal of the second diode is connected to the output terminal of the second constant current source and the inverting input terminal of the transconductance amplifier, and the output terminal of the second diode is grounded;

The output terminal of the transconductance amplifier is used as the output terminal of the exponential reference current generating circuit;

The first constant current source is used to provide the maximum desired output current, and the second constant current source is used to provide the minimum desired output current.

Optionally, in the above-mentioned current DAC circuit, the exponential current generating circuit includes:

A buffer, the input of the buffer is used as the input of the exponential current generating circuit;

A first resistor, the first terminal of the first resistor is connected to the input terminal of the buffer, and the input voltage of the second terminal of the first resistor is the terminal voltage of the second diode;

A third diode, the input terminal of the third diode is connected to the output terminal of the buffer, and the output terminal of the third diode is grounded;

A first MOS tube, the drain and gate of the first MOS tube are connected to the output terminal of the buffer, and the source of the first MOS tube is connected to a third current source;

The second MOS tube, the drain of the second MOS tube is used as the output terminal of the exponential current generating circuit, the gate of the second MOS tube is connected to the output terminal of the buffer, and the second MOS tube The source of is connected to the third current source.

Optionally, in the above-mentioned current DAC circuit, the input voltage of the input terminal of the buffer is a voltage generated by the first linear analog current signal on the first resistor and the voltage of the input terminal of the second diode. with.

Optionally, in the above-mentioned current DAC circuit, the output current of the exponential current generating circuit is:

Wherein, the I _min is the minimum expected output current, the I _max is the maximum expected output current, and the Code is the digital code of the linear DAC circuit;

The second linear analog current signal output by the linear DAC circuit is:

Optionally, in the above-mentioned current DAC circuit, the current DAC circuit further includes a pull-down resistor, and the first node is grounded through the pull-down resistor.

Optionally, in the above-mentioned current DAC circuit, the transconductance coefficient gm of the transconductance amplifier is 1/R1, and the value of R1 is the resistance value of the first resistor.

Optionally, the above-mentioned current DAC circuit further includes:

The control signal output circuit is used to provide a complementary first control signal and a second control signal according to the acquired trigger instruction, wherein the first control signal is used to control the communication between the linear DAC circuit and the first node The second control signal is used to control the disconnection or conduction between the exponential current generating circuit and the first node.

Optionally, in the above-mentioned current DAC circuit, the output current of the linear reference current source is the maximum expected output current.

Optionally, the above-mentioned current DAC circuit further includes:

An exponential reference current generating circuit, the output of the exponential reference current generating circuit is connected to the input of the linear DAC circuit, and the exponential reference current generating circuit is configured to be based on a preset maximum expected output current and a preset minimum expected Output current output and provide the exponential reference current to the linear DAC circuit;

A linear reference current source, the output terminal of the linear reference current source is connected to the input terminal of the linear DAC circuit, and the linear reference current source is used to provide the linear reference current to the linear DAC circuit;

Optionally, the above-mentioned current DAC circuit further includes:

The first control switch, the first control switch is arranged between the linear DAC circuit and the exponential reference current generating circuit, and the first control switch is used to control the linear DAC circuit and the linear DAC circuit according to the first control signal. State the conduction state between the index reference current generating circuits;

A second control switch, the second control switch is arranged between the linear DAC circuit and the linear reference current source, and the second control switch is used to control the linear DAC circuit and the linear reference according to a second control signal The current source generates the conduction state between the circuits;

The third control switch, the third control switch is arranged between the first output terminal of the linear DAC circuit and the exponential current generating circuit, and the third control switch is used to control the linearity according to the first control signal. The conduction state between the first output terminal of the DAC circuit and the exponential current generating circuit;

A fifth control switch, the fifth control switch is arranged between the second output terminal of the linear DAC circuit and the first node, and the fifth control switch is used to control the linearity according to a second control signal. The conduction state between the second output terminal of the DAC circuit and the first node.

Optionally, the above-mentioned current DAC circuit further includes: a fourth control switch, the fourth control switch is arranged between the output terminal of the exponential current generating circuit and the first node, and the fourth control switch is used for The first control signal controls the on and off states between the output terminal of the exponential current generating circuit and the first node.

A method of outputting current, applied to a linear DAC circuit, the method includes:

Using the acquired exponential reference current or linear reference current as a reference, the first linear analog current signal and the second linear analog current signal are obtained after linear digital-to-analog conversion of the digital code;

Obtaining an exponential current according to the first linear analog current signal and the preset minimum expected output current;

One of the second linear analog current signal and the exponential current is selected as the output current.

Optionally, in the foregoing method of outputting current, obtaining an exponential current according to the first linear analog current signal and a preset minimum expected output current includes:

The voltage generated by the first linear analog current signal flowing through the first resistor and the second diode, and the preset minimum expected output current flowing through the voltage generated by the second diode is applied to the third The input terminal of the diode uses the mirror current corresponding to the current flowing through the third diode as an exponential current;

Wherein, the first linear analog current signal flows into the ground after flowing through the first resistor and the second diode, and the preset minimum expectation flows into the ground after flowing through the second diode.

Optionally, in the above method of outputting current,

The exponential current is generated based on the following formula:

Wherein, the I _{o_exp} is the exponential current, the I _min is the minimum expected output current, the I _max is the maximum expected output current, and the Code is the digital code of the linear DAC circuit;

The second linear analog current signal is calculated based on the following formula:

The I _{o_lin} is the second linear analog current signal.

An LED drive chip using the current DAC circuit described in any one of the above.

Based on the above technical solutions, in the above solutions provided by the embodiments of the present invention, the linear DAC circuit uses the acquired exponential reference current and linear reference current as a reference, and performs linear digital-to-analog conversion of the digital code input to the linear DAC circuit to obtain the first The linear analog current signal and the second linear analog current signal. The exponential current generating circuit generates an exponential current based on the first linear analog current signal and the preset minimum expected output current, and uses the exponential current as the output signal of the current DAC circuit, or is linear The DAC circuit directly uses the second linear analog current signal as the output signal of the current DAC circuit. The embodiment of the present invention can select the output signal of the linear DAC circuit and perform necessary processing according to requirements, so as to realize whether the current DAC circuit outputs exponential current or linear current. Conversion or choose by yourself.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, without creative work, other drawings can be obtained according to the provided drawings.

FIG. 1 is a schematic structural diagram of a current DAC circuit provided by an embodiment of the application;

2 is a schematic structural diagram of a current DAC circuit provided by another embodiment of the application;

3 is a schematic diagram of the relationship between an exponential current, a linear current, and the code of a linear DAC circuit provided by an embodiment of the application;

FIG. 4 is a schematic diagram of a structure of the buffer in FIG. 2.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

Referring to FIG. 1, FIG. 1 is a current DAC circuit provided by an embodiment of the application, and the current DAC circuit includes:

The linear DAC circuit 100 and the exponential current generating circuit 300 are specifically:

The linear DAC circuit 100 is used to obtain a first linear analog current signal and a second linear analog current signal after linear digital-to-analog conversion of the digital code input to the linear DAC circuit 100 based on the acquired exponential reference current and linear reference current. , The first output terminal of the linear DAC circuit 100 is used to output a first linear analog current signal, and the second output terminal of the linear DAC circuit 100 is used to output a second linear analog current signal, where the linear DAC circuit 100 is a linear current type DAC The resolution can be selected according to user needs. For example, in the technical solution disclosed in the embodiment of the present application, the resolution of the linear DAC circuit 100 is set to 11 bits, that is, the digital code input by the linear DAC circuit 100 can be Represented as Code<10:0>.

The exponential current generating circuit 300. The input terminal of the exponential current generating circuit 300 is used to obtain the first linear analog current signal and the preset minimum expected output current Imin, and the exponential current generating circuit 300 is based on the first linear analog current signal and the preset The minimum expected output current Imin generates an exponential current and outputs it. Specifically, the exponential current generating circuit 300 is specifically configured to: generate a voltage for the first linear analog current signal and a voltage corresponding to a preset minimum expected output current Perform superposition and generate exponential current based on the superimposed voltage.

The first node O is used as the output terminal of the current DAC circuit, and outputs the second linear analog current signal provided by the linear DAC circuit 100 or the exponential current provided by the exponential current generating circuit 300.

When the technical solutions disclosed in the above-mentioned embodiments of the present application are implemented, the linear DAC circuit 100 uses the acquired exponential reference current and linear reference current as a reference, and performs linear digital-to-analog conversion on the digital code input to the linear DAC circuit 100 to obtain the first The linear analog current signal and the second linear analog current signal, the exponential current generating circuit 300 generates an exponential current based on the first linear analog current signal and the preset minimum expected output current Imin, and uses the exponential current as the output signal of the current DAC circuit, or , The linear DAC circuit 100 directly uses the second linear analog current signal as the output signal of the current DAC circuit. The output signal of the linear DAC circuit 100 can be selected according to requirements and necessary processing is performed to realize whether the current DAC circuit outputs exponential current or linear current Of your own choice.

In addition to the linear DAC circuit 100 and the exponential current generating circuit 300, the above-mentioned current DAC circuit provided by the embodiments of the present application may be further configured with: an exponential reference current generating circuit 200, a linear reference current source VCC0, and a first control The switch K1, the second control switch K2, the third control switch K3, the fourth control switch K4, and the fifth control switch K5.

Wherein, the exponential reference current generating circuit 200 is used to provide an exponential reference current to the linear DAC circuit 100. Specifically, the output terminal of the exponential reference current generating circuit 200 is connected to the input terminal of the linear DAC circuit 100, and the exponential reference current generating circuit 200 is used for The exponential reference current is output based on the preset maximum expected output current Imax and the preset minimum expected output current Imin, and the exponential reference current is provided to the linear DAC circuit 100.

The linear reference current source VCC0 is used to provide a linear reference current to the linear DAC circuit 100. Specifically, the output terminal of the linear reference current source VCC0 is connected to the input terminal of the linear DAC circuit 100, and the linear reference current source VCC0 is used to supply the linear DAC circuit 100. Provide linear reference current.

The first control switch K1 is used to control the conduction state between the linear DAC circuit 100 and the exponential reference current generating circuit 200. Specifically, the first control switch K1 is arranged between the linear DAC circuit 100 and the exponential reference current generating circuit 200, The first control switch K1 is used to control the on and off states between the linear DAC circuit 100 and the exponential reference current generating circuit 200 under the control of the first control signal sel, that is, to switch between the on and off states For example, when the first control signal sel is 1, the first control switch K1 is closed, and the linear DAC circuit 100 and the exponential reference current generating circuit 200 are turned on, and when the first control signal sel is 0, the first control switch K1 is turned off. On, there is an open circuit between the linear DAC circuit 100 and the exponential reference current generating circuit 200;

The second control switch K2 is used to control the conduction state between the linear DAC circuit 100 and the linear reference current source VCC0. Specifically, the second control switch K2 is arranged between the linear DAC circuit 100 and the linear reference current source VCC0. The output of the current source VCC0 is the maximum expected output current Imax, and the second control switch K2 is used to control the on and off states between the linear DAC circuit 100 and the linear reference current source VCC0 generating circuit according to the second control signal ~sel; For example, when the second control signal ~sel is 1, the second control switch K2 is closed, the linear DAC circuit 100 and the linear reference current source VCC0 generating circuit are turned on, and when the second control signal ~sel is 0, the second control switch K2 is disconnected, and there is an open circuit between the linear DAC circuit 100 and the linear reference current source VCC0 generating circuit;

The third control switch K3 is used to control the conduction state between the first output terminal of the linear DAC circuit 100 and the exponential current generating circuit 300. Specifically, the third control switch K3 is arranged at the first output terminal of the linear DAC circuit 100 and Between the exponential current generating circuit 300, the third control switch K3 is used to control the on and off state between the first output terminal of the linear DAC circuit 100 and the exponential current generating circuit 300 according to the first control signal, for example, the first When the control signal sel is 1, the third control switch K3 is closed, and the first output terminal of the linear DAC circuit 100 and the exponential current generating circuit 300 are conducted. When the first control signal sel is 0, the third control switch K3 is opened , There is an open circuit between the first output terminal of the linear DAC circuit 100 and the exponential current generating circuit 300;

The fourth control switch K4 is used to control the conduction state between the output terminal of the exponential current generating circuit 300 and the first node O. Specifically, the fourth control switch K4 is arranged at the output terminal of the exponential current generating circuit 300 and the first node. Between O, the fourth control switch K4 is used to control the on and off state between the output terminal of the exponential current generating circuit 300 and the first node O according to the first control signal;

The fifth control switch K5 is used to control the conduction state between the second output terminal of the linear DAC circuit 100 and the first node O. Specifically, the fifth control switch K5 is provided at the second output terminal and the first node O of the linear DAC circuit 100. Between a node O, the fifth control switch K5 is used to control the on and off state between the second output terminal of the linear DAC circuit 100 and the first node O according to the second control signal ~sel. When designing the circuit, the third control switch K3 and the fourth control switch K4 can be set alternatively. Of course, both can also be set in the circuit according to the aforementioned setting mode.

When the technical solutions disclosed in the above embodiments of the present application are implemented, the exponential reference current generating circuit 200 generates the exponential reference current, the linear reference current source VCC0 generates the linear reference current, and the first control switch K1 and the second control switch K2 select the exponential reference current. The current or the linear reference current is input to the linear DAC circuit 100. The linear DAC circuit 100 uses the acquired exponential reference current or linear reference current as a reference, and performs linear digital-to-analog conversion of the digital code input to the linear DAC circuit 100 to obtain the first linear The analog current signal and the second linear analog current signal. When the third control switch K3 and the fourth control switch K4 are closed, the fifth control switch K5 is opened, and the exponential current generation circuit 300 is based on the first linear analog current signal and the preset minimum expectation The output current Imin generates an exponential current, and uses the exponential current as the output signal of the current DAC circuit. When the fifth control switch K5 is closed, the circuit where the third control switch K3 and the fourth control switch K4 are located is disconnected, and the linear DAC circuit 100 directly The second linear analog current signal is used as the output signal of the current DAC circuit. The user can control the first control switch K1, the second control switch K2, the third control switch K3, and the fourth control switch K1, the second control switch K2, and the fourth control signal according to their own needs. The conduction state of the control switch K4 and the fifth control switch K5 realizes the self-selection of whether the current DAC circuit outputs exponential current or linear current.

In addition, referring to FIG. 2, the embodiment of the present application also specifically discloses a specific structure of an exponential reference current generating circuit 200 and an exponential current generating circuit 300. Referring to FIG. 2, the exponential reference current generating circuit 200 includes:

A first constant current source VCC1, a second constant current source VCC2, a first diode D1, a second diode D2, and a transconductance amplifier A1;

The input terminal of the first diode D1 is connected to the output terminal of the first constant current source VCC1 and the non-inverting input terminal of the transconductance amplifier A1, and the output terminal of the first diode D1 is grounded;

The input terminal of the second diode D2 is connected to the output terminal of the second constant current source VCC2 and the inverting input terminal of the transconductance amplifier A1, and the output terminal of the second diode D2 is grounded;

The output terminal of the transconductance amplifier A1 is used as the output terminal of the exponential reference current generating circuit 200 to output the exponential reference current Iexpr;

The first constant current source VCC1 is used to provide the maximum desired output current Imax, and the second constant current source VCC2 is used to provide the minimum desired output current Imin.

The working principle of the linear DAC circuit 100 will be described below:

First, from the diode's V-I characteristic equation, the Vmax and Vmin formulas in circuit 1 can be obtained as follows:

Among them, Imax is the maximum expected output current Imax provided by the first constant current source VCC1, Imin is the minimum expected output current Imin provided by the second constant current source VCC2, Vmax is the maximum voltage at the terminal D1 of the first diode; Vmin is the second The minimum voltage of the diode D2; V _t is the thermoelectric potential of the diode; Is is the reverse saturation current of the diode;

Based on formula (1) and formula (2), the calculation formula of the index reference current Iexpr provided by the index reference current generating circuit 200 can be obtained as:

Among them, R1 refers to the resistance of the transconductance amplifier A1.

Taking the linear DAC circuit 100 with a resolution of 11 bits as an example, it is known that the relationship between the input current Iin and the output current Io of the 11-bit linear DAC circuit 100 is as follows:

Wherein, code is the digital code of the linear DAC circuit 100;

Combining formula 3, the calculation formula of the first linear analog current signal Io1 output by the linear DAC circuit 100 and the second linear analog current signal Io2 output by the linear DAC circuit 100 can be obtained:

When the first control switch K1 is closed,

When the second control switch K2 is closed,

Referring to FIG. 2, the exponential current generating circuit 300 includes:

Buffer A2, the input terminal of the buffer A2 is used as the input terminal of the exponential current generating circuit 300. In this embodiment, the voltage input from the input terminal of the buffer A2 may be the first linear analog current signal at the first The sum of the voltage generated on a resistor and the voltage at the input terminal of the second diode;

The first resistor R1, the first terminal of the first resistor R1 is connected to the input terminal of the buffer A2, the input voltage of the second terminal of the first resistor R1 is the terminal voltage (Vmin) of the second diode D2, the first The second terminal of the resistor R1 can be directly connected to the input terminal of the second diode D2. At this time, the input terminal voltage of the buffer A2 is the first linear analog current signal Io1 when the first linear analog current signal Io1 is at the input terminal of the first diode D2. The sum of the divided voltage on the resistor R1 and the terminal voltage of the second diode D2. In the circuit design, preferably, the resistance value of the first resistor R1 is the same as the resistance value of the transconductance amplifier A1, that is, the transconductance coefficient gm of the transconductance amplifier A1 = 1/R1, and the value of R1 is the first resistance The resistance value of R1. In this embodiment, R1 represents the first resistance R1, or represents the resistance value of the first resistance R1 and the transconductance amplifier A1;

The third diode D3, the input terminal of the third diode D3 is connected to the output terminal of the buffer A2, and the output terminal of the third diode D3 is grounded;

The first MOS tube M1, the drain and gate of the first MOS tube M1 are connected to the output terminal of the buffer, and the source of the first MOS tube M1 is connected to the third current source VCC3;

The second MOS tube M2, the drain of the second MOS tube M2 is used as the output terminal of the exponential current generating circuit 300, the gate of the second MOS tube M2 is connected to the output terminal of the buffer, and the source of the second MOS tube M2 is connected to the output terminal of the buffer. Three current sources are connected. Among them, the first MOS tube M1 and the second MOS tube M2 form a 1:1 current mirror. The types of the two switching tubes can be selected according to user needs. For example, they can be PMOS as shown in the figure. The switch tube can also be an NMOS switch tube or a triode, etc.

When sel=1, Io1 produces a voltage drop across the resistor R1. After superimposing the voltage Vmin under the resistor, the calculation formula for Vo can be obtained as:

Vo is the output voltage of the buffer A2. Since Vo is added to the diode D3, the formula for calculating the exponential current Io_exp can be obtained from the diode's V-I characteristic equation:

Is is the reverse saturation current of the third diode, Vo is the output voltage of the buffer, and V _t is the thermoelectric potential of the third diode. When sel=0, Io2 is directly output, and the linear current Io_lin can be obtained. The calculation formula is:

It can be seen from the above linear current Io_lin formula (9) and exponential current Io_exp formula (8) that the solution switches the conduction of the first control switch K1 to the fifth control switch K5 through the first control signal sel and the second control signal ~sel. In the ON state, the exponential and linear conversion from the digital dimming code to the output current can be realized. For example, if Imin=50uA and Imax=20mA, the formulas of exponential current and linear current can be obtained as follows:

I _{o_exp} ＝50uA×1.00293124 ^Code (10)

I _{o_lin} ＝9.77uA×Code(11)

When Imin=50uA and Imax=20mA, the change trend of the exponential current and the linear current, and the relationship curve between the two and the dimming Code of the linear DAC circuit 100 are shown in FIG. 3.

In addition to the above structure, referring to FIG. 4, the present application also discloses a specific structural schematic diagram of a buffer A2. Referring to FIG. 4, the buffer A2 includes:

The third constant current source VCC3;

A bias trimmer A3 connected to the third constant current source VCC3;

The first triode Q1 connected to the first output terminal of the bias trimmer A3, the base of the first triode Q1 and the INN signal used to obtain the first input signal input to the buffer, the first triode The emitter of the tube Q1 is connected to the first output terminal of the bias trimmer A3;

The second triode Q2 connected to the second output terminal of the bias trimmer A3, the base of the second triode Q2 and the second input signal INP signal used to obtain the input to the buffer, the second triode The emitter of the tube Q2 is connected to the second output terminal of the bias trimmer A3, and the first transistor Q1 and the second transistor Q2 are specifically bipolar junction transistors;

The third MOS tube M3, the fifth MOS tube M5, the seventh MOS tube M7, and the ninth MOS tube M9 are connected in series in sequence. Specifically, the drain of the third MOS tube M3 is connected to the source of the fifth MOS tube M5. The drain of the fifth MOS transistor M5 is connected to the drain of the seventh MOS transistor M7, the source of the seventh MOS transistor M7 is connected to the drain of the ninth MOS transistor M9; the source of the third MOS transistor M3 is grounded, and the ninth MOS transistor M3 is grounded. The source of the tube M9 is connected to the DC power supply;

The fourth MOS tube M4, the sixth MOS tube M6, the eighth MOS tube M8, and the tenth MOS tube M10 are connected in series in sequence. Specifically, the drain of the fourth MOS tube is connected to the source of the sixth MOS tube M6, and the sixth The drain of the MOS transistor is connected to the drain of the eighth MOS transistor M8, the source of the eighth MOS transistor is connected to the drain of the tenth MOS transistor M10; the source of the fourth MOS transistor M4 is grounded, and the source of the tenth MOS transistor M10 is grounded. The source is connected to the DC power supply;

The drain of the fifth MOS transistor M5 is also connected to the gates of the third MOS transistor and the fourth MOS transistor M4;

One end of the compensation capacitor C1, the compensation capacitor C1 is connected to the common end of the sixth and eighth open MOS transistors, and the other end is grounded.

In the buffer A2 structure provided above, the first transistor Q1 and the second transistor Q2 are input pairs, MOS transistors M3-M10 form a folded cascode output stage, and the compensation capacitor C1 is the output compensation capacitance. The accuracy error mainly comes from the offset voltage. The circuit is optimized for the offset voltage in two points: 1) The input pair tube uses bipolar junction transistors, because the offset of the bipolar junction transistor is naturally smaller than that of the MOS tube, and the offset voltage The main source of is the input pair tube, so the input pair tube using BJT tube can greatly reduce the offset voltage; 2) The offset trimmer A3 (offset trimming module) is added to the circuit, which can be trimmed according to the measurement results of the production stage The offset of each chip, the accuracy of the bias trimmer A3 can be determined by a compromise between circuit area and performance requirements.

In addition to the above structure, in order to facilitate users to control the current state of the first signal and the second signal according to their own needs, the technical solutions disclosed in the above embodiments of the present application may also include: a control signal output circuit, which is used to control the current state of the first signal and the second signal according to the acquired The trigger instruction provides a first control signal and a second control signal, where the control signal output by the control signal output circuit is a complementary signal, that is, when one of the signals is used to control the closed state of the control switch, the other signal is It is the second state used to control the opening of the control switch.

Corresponding to the above circuit, this application also discloses a method for outputting current, which is applied to a linear DAC circuit, and the method includes:

When it is detected that the exponential current generating circuit inputs the exponential reference current or the linear reference current as a reference, the obtained exponential reference current or the linear reference current is used as the reference, and the digital code is subjected to linear digital-to-analog conversion to obtain the first linear analog current Signal and a second linear analog current signal; obtain an exponential current according to the first linear analog current signal and a preset minimum expected output current; select one of the second linear analog current signal and the exponential current as the output current .

In the above method, obtaining the exponential current according to the first linear analog current signal and the preset minimum expected output current specifically includes:

The voltage generated by the first linear analog current signal flowing through the first resistor and the second diode, and the voltage generated by the preset minimum expected output current flowing through the second diode are superimposed and loaded To the input terminal of the third diode, taking the mirror current corresponding to the current flowing through the third diode as an exponential current;

Wherein, the first linear analog current signal flows into the ground after flowing through the first resistor and the second diode, and the preset minimum expectation flows into the ground after flowing through the second diode.

In the above method, the exponential current is based on the formula

It is calculated that the second linear analog current signal is based on the formula

Calculated.

Wherein, the I _{o_exp} is the exponential current, the I _min is the minimum expected output current, the I _max is the maximum expected output current, the Code is the digital code of the linear DAC circuit, and the I _{o_lin} is the second Linear analog current signal.

Corresponding to the above-mentioned current DAC circuit, an embodiment of the present application also discloses a driving chip applying the above-mentioned current DAC circuit. The driving chip may be an LED driving chip or a driving chip for driving other loads.

This specification describes multiple embodiments, each of which focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other.

The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown in this document, but should conform to the widest scope consistent with the principles and novel features disclosed in this document.

Claims (17)

1. A current DAC circuit, characterized in that it comprises:

   The linear DAC circuit is used to obtain the first linear analog current signal and the second linear analog current after linear digital-to-analog conversion of the digital code input to the linear DAC circuit based on the acquired exponential reference current or linear reference current Signal, the first output terminal of the linear DAC circuit is used to output the first linear analog current signal, and the second output terminal of the linear DAC circuit is used to output the second linear analog current signal;

   An exponential current generating circuit for obtaining a first linear analog current signal output by the linear DAC circuit and a preset minimum expected output current, based on the first linear analog current signal and the preset minimum expected output current Generate exponential current and output;

   A first node, where the first node serves as an output terminal of the current DAC circuit, and selectively outputs a second linear analog current signal output by the linear DAC circuit or an exponential current output by the exponential current generating circuit.
2. The current DAC circuit according to claim 1, wherein the exponential current generating circuit is specifically used for:

   The voltage generated by the first linear analog current signal is superimposed with the voltage corresponding to the preset minimum expected output current, and an exponential current is generated according to the superimposed voltage.
3. The current DAC circuit according to claim 1, wherein the exponential reference current generating circuit comprises:

   A first constant current source, a second constant current source, a first diode, a second diode, and a transconductance amplifier;

   The input terminal of the first diode is connected to the output terminal of the first constant current source and the non-inverting input terminal of the transconductance amplifier, and the output terminal of the first diode is grounded;

   The input terminal of the second diode is connected to the output terminal of the second constant current source and the inverting input terminal of the transconductance amplifier, and the output terminal of the second diode is grounded;

   The output terminal of the transconductance amplifier is used as the output terminal of the exponential reference current generating circuit;

   The first constant current source is used to provide the maximum desired output current, and the second constant current source is used to provide the minimum desired output current.
4. The current DAC circuit according to claim 3, wherein the exponential current generating circuit comprises:

   A buffer, the input of the buffer is used as the input of the exponential current generating circuit;

   A first resistor, the first terminal of the first resistor is connected to the input terminal of the buffer, and the input voltage of the second terminal of the first resistor is the terminal voltage of the second diode;

   A third diode, the input terminal of the third diode is connected to the output terminal of the buffer, and the output terminal of the third diode is grounded;

   A first MOS tube, the drain and gate of the first MOS tube are connected to the output terminal of the buffer, and the source of the first MOS tube is connected to a third current source;

   The second MOS tube, the drain of the second MOS tube is used as the output terminal of the exponential current generating circuit, the gate of the second MOS tube is connected to the output terminal of the buffer, and the second MOS tube The source of is connected to the third current source.
5. The current DAC circuit according to claim 4, wherein the input voltage of the input terminal of the buffer is a voltage generated by the first linear analog current signal on a first resistor, and the second diode The sum of the voltages at the input terminals.
6. The current DAC circuit of claim 4, wherein the exponential current output by the exponential current generating circuit is:

   

   Wherein, the I _{o_exp} is the exponential current, the I _min is the minimum expected output current, the I _max is the maximum expected output current, and the Code is the digital code of the linear DAC circuit;

   The second linear analog current signal output by the linear DAC circuit is:

   

   The I _{o_lin} is the second linear analog current signal.
7. 4. The current DAC circuit of claim 4, wherein the current DAC circuit further comprises a pull-down resistor, and the first node is grounded through the pull-down resistor.
8. The current DAC circuit according to claim 4, wherein the transconductance coefficient gm of the transconductance amplifier is 1/R1, and the value of R1 is the resistance value of the first resistor.
9. The current DAC circuit of claim 1, further comprising:

   The control signal output circuit is used to provide a complementary first control signal and a second control signal according to the acquired trigger instruction, wherein the first control signal is used to control the communication between the linear DAC circuit and the first node The second control signal is used to control the disconnection or conduction between the exponential current generating circuit and the first node.
10. The current DAC circuit according to claim 1, wherein the output current of the linear reference current source is the maximum expected output current.
11. The current DAC circuit of claim 1, further comprising:

    An exponential reference current generating circuit, the output of the exponential reference current generating circuit is connected to the input of the linear DAC circuit, and the exponential reference current generating circuit is configured to be based on a preset maximum expected output current and a preset minimum expected Output current output and provide the exponential reference current to the linear DAC circuit;

    A linear reference current source, the output terminal of the linear reference current source is connected to the input terminal of the linear DAC circuit, and the linear reference current source is used to provide the linear reference current to the linear DAC circuit.
12. The current DAC circuit of claim 10, further comprising:

    The first control switch, the first control switch is arranged between the linear DAC circuit and the exponential reference current generating circuit, and the first control switch is used to control the linear DAC circuit and the linear DAC circuit according to the first control signal. State the conduction state between the index reference current generating circuits;

    A second control switch, the second control switch is arranged between the linear DAC circuit and the linear reference current source, and the second control switch is used to control the linear DAC circuit and the linear reference according to a second control signal The current source generates the conduction state between the circuits;

    The third control switch, the third control switch is arranged between the first output terminal of the linear DAC circuit and the exponential current generating circuit, or between the exponential current generating circuit and the first node, so The third control switch is used to control the conduction state between the first output terminal of the linear DAC circuit and the exponential current generating circuit according to the first control signal, or the exponential current generating circuit and the first The conduction state between a node;

    A fifth control switch, the fifth control switch is arranged between the second output terminal of the linear DAC circuit and the first node, and the fifth control switch is used to control the linear DAC according to a second control signal The conduction state between the second output terminal of the circuit and the first node.
13. The current DAC circuit of claim 12, further comprising:

    The fourth control switch is arranged between the output terminal of the exponential current generating circuit and the first node, and the fourth control switch is used to control the exponential current generating circuit according to the first control signal. The conduction and disconnection state between the output terminal and the first node.
14. A method for outputting current, characterized in that it is applied to a linear DAC circuit, and the method includes:

    Using the acquired exponential reference current or linear reference current as a reference, the first linear analog current signal and the second linear analog current signal are obtained after linear digital-to-analog conversion of the digital code;

    Obtaining an exponential current according to the first linear analog current signal and the preset minimum expected output current;

    One of the second linear analog current signal and the exponential current is selected as the output current.
15. The method of outputting current according to claim 14, wherein obtaining the exponential current according to the first linear analog current signal and a preset minimum expected output current comprises:

    The voltage generated by the first linear analog current signal flowing through the first resistor and the second diode, and the preset minimum expected output current flowing through the voltage generated by the second diode is applied to the third The input terminal of the diode uses the mirror current corresponding to the current flowing through the third diode as an exponential current;

    Wherein, the first linear analog current signal flows into the ground after flowing through the first resistor and the second diode, and the preset minimum expectation flows into the ground after flowing through the second diode.
16. The method of outputting current according to claim 114, wherein:

    The exponential current is generated based on the following formula:

    

    Wherein, the I _{o_exp} is the exponential current, the I _min is the minimum expected output current, the I _max is the maximum expected output current, and the Code is the digital code of the linear DAC circuit;

    The second linear analog current signal is calculated based on the following formula:

    

    The I _{o_lin} is the second linear analog current signal.
17. An LED driving chip, characterized in that the current DAC circuit according to any one of claims 1-13 is applied.

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