CN109417366B

CN109417366B - dB linear variable gain amplifier

Info

Publication number: CN109417366B
Application number: CN201680087237.5A
Authority: CN
Inventors: 海伦·韦特
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2016-06-28
Filing date: 2016-06-28
Publication date: 2021-01-29
Anticipated expiration: 2036-06-28
Also published as: CN109417366A; WO2018001453A1

Abstract

Variable gain amplifier (1) for amplifying an input signal (I) with a variable gain_{vga_in}) To generate a dB linear output signal (I)_{vga_out}). The variable gain amplifier (1) comprises a dB linear control current generator (2), a control voltage generator (3) and an output current regulator (4). The dB linear control current generator (2) is used for generating a dB linear control current (I) based on a predefined gain setting_{lin_in_dB}). The control voltage generator (3) is used for linearly controlling the current (I) from the dB_{lin_in_dB}) Generating a control voltage (V)_{vga_ctrl}). The output current regulator (4) is used for regulating the output current based on the input signal (I)_{vga_in}) And the control voltage (V)_{vga_ctrl}) Generating the dB linear output signal (I)_{vga_out})。

Description

dB linear variable gain amplifier

Technical Field

The present invention relates to variable gain amplifiers, and more particularly to variable gain amplifiers that can be controlled very precisely.

Background

Practice has proven difficult to achieve fine and accurate gain steps in variable gain amplifiers over large gain ranges and wide signal bandwidths, e.g., bandwidths greater than 500MHz, while ensuring high linearity. This is especially due to the limited bandwidth in existing implementations. In a 5G communication system, the signal bandwidth will be higher than in existing 2G/3G/4G communication systems. Therefore, it becomes important to achieve good performance over a wide bandwidth.

These problems will be explained below.

1. A closed or open loop approach may be employed in which an array of resistors is used and the resistance values are switched to set the desired gain. In a closed loop approach, this may be achieved by switching the input resistor or the feedback resistor of the closed loop amplifier arrangement. In the open loop method, the negative feedback resistor or the load resistor may be switched. The limitations and disadvantages of this approach are as follows:

a large resistor switch array is also required when many gain steps are required. Therefore, much parasitic capacitance is generated from the layout of the switch and resistor array. These parasitic capacitances serve to limit the supported bandwidth.

Fine gain steps are sometimes not easy to implement, especially when the gain steps need to achieve dB linearity. In view of matching, the resistor array is more suitable for using a unit resistance value. This is not used for fine steps implemented in dB. At the same time, the switch resistance contributes to the overall resistance and thus needs to be considered.

The range of resistance values that can be used to achieve gain control is typically somewhat limited due to loading effects of the active devices of the amplifier. Once the resistance value increases and begins to approach the output impedance value, the accuracy of the gain step is reduced. The achievable gain range can be limited by an array of resistors to vary the gain. In this type of device, the minimum resistance size may also be limited due to the need to take into account the switch resistance.

2. The ladder resistor network can be used to achieve accurate gain control, with taps from different points in the resistive ladder for different gain steps. At this point, a large array of resistors is required, and the achievable step size is set by the resistors of the resistive ladder. Its limitations and disadvantages are as follows:

the fixed gain step number of the resistive ladder set by the selected resistance value is limited.

The resistor array can become very large, the rate at which the resistive array increases depends on the gain step required, and each gain step requires the addition of an extra resistor in the ladder.

The loading of the resistor array may limit the bandwidth. The loading of the resistor array may be a limiting point when the bandwidth requirements are large.

3. The voltage-mode dB linear amplifier approach provides flexible gain steps. The method makes full use of the exponential relationship of the bipolar device. The linear current is used as a control current to generate a dB linear current. This dB linear current is then used as the bias current for the bipolar device. The transfer function of the bipolar gain gm (Ic/Vt) is proportional to the current (Ic), so a dB linear gain step can be obtained. Its limitations and disadvantages are as follows:

the linearity of the amplifier is limited by the linearity of the bipolar device. Linearization techniques can generally be applied to improve the dipole linearity, but these techniques are limited in improving linearity, e.g., multiple tanh, or too complex. Some linearization methods, such as emitter degeneration, cannot be used because they destroy the dB linearity required for dB linear gain steps. When emitter degeneration is present, the gain relationship is no longer defined by Ic/Vt.

Linearity is an important parameter of the receiver path. Since the linearity of a bipolar device without negative feedback is quite limited, the linearity requirement in many cases avoids the use of this method.

Disclosure of Invention

It is therefore an object of the present invention to provide an amplifier. The amplifier allows wide bandwidth, high linearity and precise adjustment of gain over a large range, requiring only low circuit complexity.

This object is achieved by the features of claim 1 for the device. The dependent claims contain further implementations.

A first aspect of the invention provides a variable gain amplifier for amplifying an input signal with a variable gain to generate a dB linear output signal. The variable gain amplifier includes a dB linearity control current generator, a control voltage generator, and an output current regulator. The dB linear control current generator is used for generating the dB linear control current based on a predefined gain setting. The control voltage generator is used for generating a control voltage from the dB linear control current. The output current regulator is to generate the dB linear output signal based on the input signal and the control voltage. Thus, a wide bandwidth, precise gain adjustability and high linearity of the amplifier can be achieved.

According to a first aspect, in a first implementation form, the dB linear control current generator is configured to generate the dB linear control current based on a variable gain setting current. The variable gain setting current is proportional to the predefined gain setting, which is a linear gain. By this measure, setting the variable gain is very simple.

In a second implementation form according to the first aspect as such or the first implementation form, the generated dB linear control current is an exponent of the variable gain setting current. This also simplifies the setting of the variable gain.

In another implementation form, the dB linear control current generator includes a first bias current source, a first control current transistor, a second control current transistor, an operational amplifier, a first resistor, and an output current mirror. The first bias current source is connected to a first terminal of a supply voltage, a collector of the first control current transistor, a base of the first control current transistor, and a first input of the operational amplifier. An emitter of the first control current transistor is connected to a second terminal of the supply voltage. The variable gain setting current is provided between a second input of the operational amplifier and a second terminal of the supply voltage. The first resistor is connected between the second input of the operational amplifier and the output of the operational amplifier. The output of the operational amplifier is also connected to the base of the second control current transistor. An emitter of the second control current transistor is connected to a second terminal of the supply voltage. The collector of the second control current transistor is connected to the output current mirror. The output current mirror is also connected to a first terminal of the supply voltage. Providing the dB linear control current at an output terminal of the output current mirror. Thus, a dB-linear control current can be provided in a simple and efficient manner.

In another implementation form of the method according to the first aspect as such or any of the preceding implementation forms, the control voltage generator is configured to generate the control voltage as a function of the dB linear control current. Therefore, the control voltage can be generated very simply.

In another implementation form, the control voltage generator comprises a first differential pair comprising a first transistor and a second transistor, according to the first aspect or any of the implementation forms described above. The control voltage generator includes a third transistor and a first voltage relief path. Providing the dB linearity control current to a base of the first transistor and a collector of the first transistor. A collector of the second transistor is connected to the first voltage relief path. The base of the second transistor is connected to a reference voltage. The first voltage relief path is directly or indirectly connected with a first terminal of a supply voltage. The emitter of the first transistor is connected to the emitter of the second transistor and a current source. Generating the control voltage at a base of the first transistor. With this structure, it is very simple to generate the control voltage based on the dB linear control current.

In another implementation form, the output current regulator is configured to generate the dB linear output signal as a function of the input signal and the control voltage. This ensures high linearity of the output signal.

In another implementation form, the output current regulator comprises a second differential pair comprising a fourth transistor and a fifth transistor according to the first aspect or any of the implementation forms described above. The output current regulator further includes a sixth transistor, a second voltage relief path, and a first load element. The second voltage relief path and the first load element are connected to a first terminal of a supply voltage. The first load element is connected to a collector of the fourth transistor and a first output terminal. The base of the fourth transistor is connected to the control voltage. A collector of the fifth transistor is connected to the second voltage relief path. The base of the fifth transistor is connected to a reference voltage. An emitter of the fourth transistor and an emitter of the fifth transistor are connected together and to a mirror copy of the input signal. Providing the dB linear output signal at the first output terminal. This ensures a simple generation of a dB linear output signal.

According to the above implementation, in another implementation, the output current regulator is configured to provide the dB linear output signal at the first output terminal.

Advantageously, the output current regulator is for providing the dB linear output signal as a dB linear output current at the first output terminal.

Advantageously, the dB linear output signal is a dB linear output current in the collector of the fourth transistor, but if the load is a resistor, this dB linear output current will flow in the output load to produce a dB linear output voltage. Thus, the signal is a current or a voltage, depending on the configuration at the output terminal. In an implementation with a load resistor, the signal is a voltage, but if the resistor is removed, the output terminal is directly the collector of the fourth transistor, and the signal is a current. Thus, the signal can be further processed.

In another implementation form according to the first aspect or any one of the preceding implementation forms, the input signal is a differential signal and the dB linear output signal is a differential signal. Therefore, the differential signal can be processed.

According to the above implementation, in another implementation, the input signal is a differential signal including a first input signal and a second input signal. The dB linear output signal is also a differential signal. The output current regulator includes a third differential pair including a seventh transistor and an eighth transistor. The output current regulator includes a third voltage relief path and a second load element. The third voltage relief path and the second load element are connected to a first terminal of the supply voltage. The second load element is connected to a collector of the seventh transistor and a second output terminal. The base of the seventh transistor is connected to the control voltage. A collector of the eighth transistor is connected to the third voltage relief path. The base of the eighth transistor is connected to the reference voltage. An emitter of the seventh transistor and an emitter of the eighth transistor are connected together and to a mirror copy of the first input signal or the second input signal. Providing the dB linear output signal at the first output terminal and the second output terminal. Thus, the differential output signal can be generated very simply.

According to the above four implementations, in another implementation, the variable gain amplifier includes an input signal converter for generating an input current signal from an input signal. The input signal converter is configured to: and if the input signal is not a differential signal, providing the input current signal to the base of the sixth transistor. The input signal converter is configured to: and if the input signal is a differential signal, providing the input current signal to the base of the sixth transistor and the base of the ninth transistor. By this alternative configuration, the radio frequency input signal can be processed directly.

It is noted that a signal, also referred to as an input current signal from an input signal, refers to a signal provided to the base of the respective transistor, which allows the input signal to be mirrored by the respective transistor.

According to the above implementation, in a last implementation, the sixth transistor and the ninth transistor are connected to a DC bias circuit. This facilitates the construction of the previously shown implementation and allows for a very simple circuit design.

Generally, all of the devices, means, elements, units and means, etc. described in the present application may be implemented in software or hardware elements or any type of combination thereof. Further, these devices may be or may include a processor. The functions of the elements, units and tools described in this application may be implemented in one or more processors. All steps performed by the various entities described in the present application, as well as the functions described as being performed by the various entities, are intended to mean that the respective entities are for performing the respective steps and functions. Even if in the following description or specific embodiments a specific element description of a general entity performing a specific step or function does not reflect the specific function or step performed by the entity, it should be clear to the skilled person that these methods and functions may be implemented in software or hardware elements or any type of combination thereof.

Drawings

The invention will be described in detail below with reference to the accompanying drawings, in which:

fig. 1 shows a first embodiment of a variable gain amplifier of the first aspect of the invention;

figure 2 shows a detail of a second embodiment of the variable gain amplifier of the first aspect of the invention;

fig. 3 shows a third embodiment of a variable gain amplifier of the first aspect of the invention;

fig. 4 shows a fourth embodiment of a variable gain amplifier of the first aspect of the invention;

fig. 5 shows a fifth embodiment of the variable gain amplifier of the first aspect of the present invention.

Detailed Description

First, fig. 1 shows the general structure and function of the variable gain amplifier of the first aspect. Referring to fig. 2-5, details of the structure and function are described. Parts of similar entities and reference numerals in different figures have been omitted.

In general, the proposed amplifier exploits the concept of dB linear current and current steering of dB linear current in current mode configuration to achieve accurate gain step and high linearity. The limitations of the prior art are overcome.

a. Complexity: the circuit implements the gain step directly in the signal path without adding too much complexity to the signal path. The current used to set the gain step is outside the signal path. Due to the dB linear relationship, the gain step can be both accurate and very small, e.g., below 1dB, and wide coverage.

b. And (3) bandwidth limitation: the circuit operates in current mode in the signal path, the gain step is realized by current steering, so the load and the impact on the bandwidth are very small.

c. Linearity: the circuit operates in a current mode to achieve a gain step, the current mode being more linear than the voltage mode. When the bipolar device is used as a voltage amplifier with dB linear current in a common emitter configuration, it is not constrained by the transfer function of the bipolar device.

d. Gain step size and number of gain steps: the number of gain steps and the size of the gain steps do not affect complexity and performance. Continuous gain control is possible with very fine gain steps as small as 0.1 dB.

This implementation leverages a dB linear current generator that outputs an exponential current controlled by a linear control current. The exponential current is used to establish current steering means to achieve gain control. The gain control achieved can be very fine, down to 1 dB. The circuit does not add much complexity to the signal path, but is a current steering device. The load of the device is low, and thus a wide bandwidth can be achieved. This scheme is suitable for RFVGAs or analog baseband VGAs that need to support very wide bandwidth signals, e.g., up to 1 GHz.

Fig. 1 shows a first embodiment of a variable gain amplifier 1 of the first aspect of the invention. The variable gain amplifier 1 comprises a dB linear control current generator 2, the dB linear control current generator 2 being connected to a control voltage generator 3, the control voltage generator 3 in turn being connected to an output current regulator 4. Providing a variable gain setting current I to the dB linear control current generator 2_ctr1The variable gain setting current I_ctrlThe variable gain of the variable gain amplifier 1 is set. The dB linear control current generator 2 sets the current I from the variable gain_ctrlGenerating a dB-linear control current I_{lin_in_dB}. The dB linear control current I_{lin_in_dB}Is supplied to the control voltage generator 3. The predefined gain setting defines the gain obtained from the variable gain amplifier. The control voltage generator 3 generates a control voltage V_{vga_ctrl}And lift itTo the output current regulator 4. Also input signal I_{vga_i}x is supplied to the output current regulator 4. The output current regulator 4 is controlled by using a control voltage V_{vga_ctrl}Variable gain setting to amplify input signal I_{vga_in}Thereby generating an output signal I_{vga_out}。

In particular, it is noted that in this embodiment, current steering is effectively achieved by a differential pair circuit.

For structural and functional details, see fig. 2-5.

Fig. 2 shows a detail of the embodiment shown in fig. 1. In particular, fig. 2 specifically shows the dB linear control current generator 2. The dB linear control current generator 2 includes a first bias current source 20, a first control current transistor 21, a second control current transistor 25, an operational amplifier 23, a first resistor 24, and an output current mirror 26.

The first bias current source 20 is connected to a first terminal 70 of a supply voltage and to a collector of the first control current transistor 21. The first bias current source 20 is further connected to the base of the first control current transistor 21 and to a first input of the operational amplifier 23. In particular, the collector and the base of the first control current transistor 21 are diode-connected.

In particular, it should be noted that advantageously, both the first control current transistor 21 and the second control current transistor 25 are bipolar transistors, capable of generating an exponential current.

The emitter of the first control current transistor 21 is connected to the second terminal 71 of the supply voltage. The variable gain setting current I_ctrlIs provided between a second input of said operational amplifier 23 and a second terminal of said supply voltage. The first resistor 24 is connected between the second input of the operational amplifier 23 and the output of the operational amplifier 23. The output of the operational amplifier 23 is connected to the base of the second control current transistor 25. The emitter of the second control current transistor 25 is connected to the second terminal 71 of the supply voltage. The second control currentThe collector of the transistor 25 is connected to the output current mirror 26. The output current mirror 26 is connected to a first terminal 70 of the supply voltage. Providing the dB linear control current I at the output terminal of the output current mirror 26_{lin_in_dB}. The output current mirror 26 includes a first mirror transistor 27 and a second mirror transistor 28. The

mirror transistors

27 and 28 are bipolar devices or MOS devices.

Alternative current source arrangements may also be used.

The following shows a detailed function of the basic mathematics including the dB linear control current generator 2.

The current I2 is generated by the dB linear control current generator 2, wherein:

12＝(A2/A1)*I1*exp(R1*I_ctrl/Vt)。

I_{ctrl_in_dB}is a mirror copy of I2. The necessary variable gain setting current I for a given dB linear gain step Δ GdB_ctrlThe following can be calculated:

Δ ICTRL ═ Δ GdB/20 × Vt/R1 × 2303, where:

2303 is the factor that translates between log10 and ln.

Current I_ctrlVarying in a linear manner to generate a dB linear output current I_{lin_in_dB}。

The analysis of the derivative for the dB linear current relationship is shown below.

The equation for npn device Q1 is:

i1 ═ a1 ═ Is exp (V1p/Vt), and therefore V1p ═ Vt ln (I1/(a1 ×) this Is not preferred.

The equation for npn device Q2 is:

I2＝A2*Is*exp(V2/Vt)

the op-amp input V1n is virtual ground. Assuming a is large, V1p ═ V1 n.

V2＝V1p+R1*I_ctrl

V2＝[Vt ln(I1/(A1*Is))+R1*I_ctrl]

Since I2 Is exp (V2/Vt) Is 2 Is,

thus, substitution of V2 yields I2:

I2＝A2*Is*exp([Vt ln(I1/(A1*Is))+R1*I_ctrl]/Vt)

＝A2*Is*exp(ln(I1/(A1*Is))*exp(R1*I_ctrl/Vt)

＝(A2*Is*I1)/(A1*Is)*exp(R1*I_ctrl/Vt)

I2＝(A2/A1)*exp(R1*I_ctrl/Vt)

due to the exponential nature of the relationship, I is controlled when in linear steps_ctrlWhen in use, I2 provides a dB linear output current.

Now consider for I_ctrlIa and Ib to obtain the gain step Δ GdB.

ΔGdB＝20*log(Ib/Ia)

ΔGdB＝20*log(K*exp(R1*Ib/Vt)/K*exp(R1*Ia/Vt))

ΔGdB＝20*log exp[R1/Vt*(Ib-Ia)]

ΔGdB＝20*log exp[R1/Vt*(ΔI_ctrl)]

Therefore, the temperature of the molten metal is controlled,

ΔI_ctrl＝(ΔGdB/20)*(Vt/R1)*2303

fig. 3 shows a detailed embodiment of the variable gain amplifier of the first aspect of the invention. The variable gain amplifier 1a includes a dB linear current generator 2, a control voltage generator 3, and an output current regulator 4, which are connected as shown in fig. 1. The structure of the dB linear current generator 2 is shown in fig. 2, for example.

The dB linear current generator 2, the control voltage generator 3 and the output current regulator 4 are all connected to a first terminal 70 of a supply voltage and to a second terminal 71 of the supply voltage. Here, this connection is implemented as a large-scale connection. The control voltage generator 3 comprises a first differential pair. The first differential pair comprises a first transistor 32 and a second transistor 33. The first transistor 32 is diode connected, which means that the collector and the base of the first transistor 32 are connected. Furthermore, the dB linear current generator 2 provides a dB linear control current I to the connection_{lin_in_dB}。

Further, the control voltage generator 3 includes a voltage-relief path 30 composed of a voltage-relief resistor 31 and a second transistor 33. The voltage-relief resistorThe device 31 is connected to the first terminal 70 of the supply voltage and to the collector of the second transistor 33. Providing a reference voltage V to the base of the second transistor 33_ref. The emitter of the second transistor is connected to the emitter of the first transistor and to the collector of a further transistor 35. The emitter of the transistor 35 is connected to the second terminal 71 of the supply voltage. Generating a control voltage V at the collector and base of said first transistor 32_{vga_ctrl}And supplied to the output current regulator 4. The input reference signal I is driven by a sixth transistor 35_{vga_ref}A mirror copy of (a).

The generated control voltage V_{vga_ctrl}Determined by the relationship of the bipolar device, wherein:

Ic＝Is*exp(eVbe/kT)。

this means that

transistors

32 and 33 are bipolar transistors. Thus,

differential pairs

32 and 33 are used, wherein the other side of the differential pair is set to a reference voltage V_ref. Controlling the current I according to dB linearity_{lin_in_dB}The ratio of the current supplied to the total current flowing in the two branches of the

differential pair

32 and 33 is dependent on the reference voltage V on the other side of the bipolar transistor_refAnd the collector/base voltage V of the bipolar transistor is set according to the above specified physical relationship of current flow in the bipolar device_{vga_ctrl}。

The output current regulator 4 comprises a second differential pair of a fourth transistor 43 and a fifth transistor 44. The output current regulator 4 further comprises a further transistor 45, a second voltage relief path 40 and a load element, e.g. a load resistor 41. The second voltage relief path 40 is composed of a second voltage relief resistor 42 and a fourth transistor 44. It is not required that the load element is a load resistor. The load element may also be another current mirror if the output remains in "current mode".

Said second voltage relief path 40 and said load element are connected to a first terminal 70 of a supply voltage. The load element 41 is connected to a collector of the fourth transistor 43 and a first output terminal. When the load element is a resistor, the current I_{vga_out}Flows in the load resistor and is supplied with a voltage,thereby generating a voltage in the output terminal. Output current I_{vga_out}Flows through the collector of the fourth transistor 43. The base of the fourth transistor is connected to a control voltage V provided by a control voltage generator 3_{vga_ctrl}And (4) connecting. The collector of the fifth transistor 44 is connected to the second voltage relief path 40, in particular to the second voltage relief resistor 42. A base of the fifth transistor and a reference voltage V_refAnd (4) connecting. The emitter of the fourth transistor and the emitter of the fifth transistor are connected together and coupled to an input signal I provided by a sixth transistor 45_{vga_in}The mirror copies of (1) are connected.

The second voltage relief path 40 may be connected to the first terminal of the fifth transistor 44 indirectly or through other components.

Advantageously, the

transistors

43 and 44 are bipolar transistors.

Inputting a reference signal I_{vga_ref}Is provided by a current source 52, said current source 52 being connected to the transistor 51, in particular to the collector of the transistor 51. The transistor 51 is diode connected. At the same time, the base of the transistor 51 is connected to the base of the transistor 35 to advantageously create a current mirror structure. The emitter of the transistor 51 is connected to a second terminal 71 for the supply voltage. Thus, the current source is provided by transistor 35 as a mirror of the current provided by current source 52.

The base of the ninth transistor 45 is connected to the base of a further transistor 61, said ninth transistor also being diode-connected to the collector of said transistor 61, to advantageously create a current mirror structure. In addition, the connection and supply of the input signal I_{vga_in}Is connected to the input current source. The emitter of the transistor 61 is connected to a second terminal 71 for the supply voltage.

It is noted that the first terminal 70 of the supply voltage and the second terminal 71 of the supply voltage may be a positive and a negative terminal of the supply voltage. Alternatively, the first terminal 70 or the second terminal 71 may be a positive terminal or a negative terminal, while the respective other terminal 70 or 71 may be a mass connection. As shown, the second terminals 71 are not necessarily mass-connected.

General ofThe idea is as follows: dB linear current I provided by dB linear current generator 2_{lin_in_dB}Is forced into one side of the differential pair, in particular into the first transistor 32. The first transistor 32 is diode-connected to generate the control voltage V_{vga_ctrl}. Applying the control voltage V_{vga_ctrl}Applied to a VGA current mirror, in particular to an output current regulator 4, wherein current steering will force the output current I_{vga_out}Is linear in dB. The unused portion of the VGA current is bled into the voltage bleed path, specifically into the bleed resistor 42. In particular, the resulting VGA output current may be converted into a voltage domain by the load element 41.

The foregoing fig. 3 describes a single-ended implementation. However, with the proposed method a differential implementation is also possible, as shown in fig. 4.

Fig. 4 shows a variable gain amplifier 1 b. The dB linear current generator 2 and the control voltage generator 3 are the same as the embodiment shown in fig. 3. Here, however, the output current regulator 4 includes a first differential pair of

transistors

43a and 44a and a second differential pair of

transistors

43b and 44 b. The transistor 43a is connected to the first load element 41a via its collector. The transistor 43b is connected to the second load element 41b via its collector. The

load elements

41a and 41b are connected to a first terminal 70 of the supply voltage. The base of the transistor 43a and the base of the transistor 43b are connected to a control voltage v_{vga_ctrl}And (4) connecting. The output current regulator 4 further comprises a first and a second

pressure relief path

40a, 40 b. The first voltage relief path 40a comprises a voltage relief resistor 42a connected to the collector of the transistor 44 a. Said second voltage relief path 40b comprises a second voltage relief resistor 42b connected to the collector of said transistor 44 b. The emitters of

transistors

43a and 43b are connected together and to the collector of transistor 45a, which transistor 45a corresponds to transistor 45 of fig. 3. The emitters of

transistors

43b and 44b are also connected together and to the collector of transistor 45b, which transistor 45b also corresponds to transistor 45 of fig. 3. The base of the transistor 45a is connected to the base of a transistor 61a, which transistor 61a is diode-configured and connected to a current source 62 a. Of transistor 45bThe base is connected to the base of a transistor 61b, which transistor 61b is diode configured and connected to a current source 62 b. The input signal is a differential input signal and comprises a partial signal I provided by

current sources

62a and 62b_{vga_inp}And I_{vga_inp}. Thus, driving current I through

transistors

45a and 45b is configured_{vga_inp}And I_{vga_inn}A mirror copy of (a).

Except for the above details, the structure of the variable gain amplifier 1b corresponds to the structure of the variable gain amplifier 1a of fig. 3.

Meanwhile, the proposed method can also be applied to RF implementations. As shown in fig. 5. Here, the structure of the variable gain amplifier 1c is also somewhat similar to the variable gain amplifier 1a of fig. 3. The structure of the dB linear current generator 2 and the control voltage generator 3 is shown in fig. 3. Meanwhile, the output current regulator 4 is mainly configured as the output current regulator 4 of fig. 3. However, the key difference here is that

transistors

35 and 45 are connected to a DC bias circuit 80 to drive the bias current through

transistors

35 and 45. In particular, the base of transistor 35 is connected to the base and collector of transistor 85. The transistor 85 is connected to the current source 82. The base of the transistor 45 is connected to a resistor 85, the resistor 85 is connected to a further resistor 84, and the resistor 84 is connected to the base of the transistor 81. The resistor 85 is also connected to the collector of the transistor 81. The collector of the transistor 81 is also connected to a current source 83. The emitter of the transistor 81 is connected to the second terminal 71 of the voltage source.

The base of the transistor 45 is connected to a coupling capacitor 86, and the coupling capacitor 86 is connected to the RF input terminal 87. An RF input signal RFIN is provided to the RF input terminal 87.

The RF load 41 may be an integrated resonant LC load or a transmission line.

In particular, it can be applied to a low noise amplifier.

The present invention is not limited to the above examples. The features of the exemplary embodiments may be used in any advantageous combination.

The invention has been described in connection with various embodiments herein. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several means recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. A computer program may be stored or distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the internet or other wired or wireless telecommunication systems.

Claims

1. A variable gain amplifier for amplifying an input signal with variable gain to generate a dB linear output signal, comprising a dB linear control current generator, a control voltage generator, and an output current regulator, wherein:

the dB linear control current generator is used for generating a dB linear control current based on a predefined gain setting;

the control voltage generator is used for generating a control voltage from the dB linear control current;

the output current regulator is to generate the dB linear output signal based on the input signal and the control voltage;

the dB linear control current generator is used for generating the dB linear control current based on a variable gain setting current;

the dB linear control current generator comprises a first bias current source, a first control current transistor, a second control current transistor, an operational amplifier, a first resistor and an output current mirror;

the first bias current source is connected to a first terminal of a supply voltage, a collector of the first control current transistor, a base of the first control current transistor, and a first input of the operational amplifier;

an emitter of the first control current transistor is connected to a second terminal of the supply voltage;

the variable gain setting current is provided between a second input of the operational amplifier and a second terminal of the supply voltage;

the first resistor is connected between the second input of the operational amplifier and the output of the operational amplifier;

the output of the operational amplifier is connected with the base electrode of the second control current transistor;

an emitter of the second control current transistor is connected to a second terminal of the supply voltage;

the collector of the second control current transistor is connected with the output current mirror;

the output current mirror is connected with a first terminal of the power supply voltage;

providing the dB linear control current at an output terminal of the output current mirror.

2. The variable gain amplifier of claim 1, wherein:

the variable gain setting current is proportional to the predefined gain setting, which is a linear gain.

3. The variable gain amplifier of claim 1 or 2, wherein:

the generated dB linear control current is an index of the variable gain setting current.

4. The variable gain amplifier of claim 1 or 2, wherein:

the control voltage generator is operable to generate the control voltage as a function of the dB linear control current.

5. The variable gain amplifier of claim 1 or 2, wherein:

the control voltage generator comprises a first differential pair comprising a first transistor and a second transistor;

the control voltage generator includes a third transistor and a first voltage relief path;

providing the dB linear control current to a base of the first transistor and a collector of the first transistor;

a collector of the second transistor is connected to the first voltage relief path;

the base of the second transistor is connected with a reference voltage;

the first voltage relief path is directly or indirectly connected with a first terminal of a supply voltage;

the emitter of the first transistor is connected with the emitter of the second transistor and a current source;

generating the control voltage at a base of the first transistor.

6. The variable gain amplifier of claim 1 or 2, wherein:

the output current regulator is to generate the dB linear output signal as a function of the input signal and the control voltage.

7. The variable gain amplifier of claim 1 or 2, wherein:

the output current regulator comprises a second differential pair comprising a fourth transistor and a fifth transistor;

the output current regulator comprises a sixth transistor, a second voltage relief path, and a first load element;

the second voltage relief path and the first load element are connected with a first terminal of a supply voltage;

the first load element is connected to a collector of the fourth transistor and a first output terminal;

the base of the fourth transistor is connected with the control voltage;

a collector of the fifth transistor is connected to the second voltage relief path;

the base electrode of the fifth transistor is connected with a reference voltage;

an emitter of the fourth transistor and an emitter of the fifth transistor are connected together and to a mirror copy of the input signal;

providing the dB linear output signal at the first output terminal.

8. The variable gain amplifier of claim 7, wherein:

the output current regulator is to provide the dB linear output signal as a dB linear output current at the first output terminal.

9. The variable gain amplifier of claim 1 or 2, wherein:

the input signal is a differential signal;

the dB linear output signal is a differential signal.

10. The variable gain amplifier of claim 9, wherein:

the input signal is a differential signal comprising a first input signal and a second input signal;

the dB linear output signal is a differential signal;

the output current regulator comprises a third differential pair comprising a seventh transistor and an eighth transistor;

the output current regulator includes a third voltage relief path and a second load element;

the third voltage relief path and the second load element are connected to a first terminal of the supply voltage;

the second load element is connected to a collector of the seventh transistor and a second output terminal;

the base of the seventh transistor is connected with the control voltage;

a collector of the eighth transistor is connected to the third voltage relief path;

the base electrode of the eighth transistor is connected with a reference voltage;

an emitter of the seventh transistor and an emitter of the eighth transistor are connected together and to a mirror copy of the first input signal or the second input signal;

providing the dB linear output signal at the first output terminal and the second output terminal.

11. The variable gain amplifier of claim 7, wherein:

the variable gain amplifier comprises an input signal converter for generating an input current signal from an input signal;

the input signal converter is configured to: providing the input current signal to a base of the sixth transistor if the input signal is not a differential signal;

the input signal converter is configured to: the input current signal is provided to a base of a sixth transistor and a base of a ninth transistor if the input is a differential signal.

12. The variable gain amplifier of claim 11, wherein:

the sixth transistor and the ninth transistor are connected to a DC bias circuit.