WO2021047527A1 - Circuit structure for puf, puf data obtaining method, and electronic device - Google Patents

Circuit structure for puf, puf data obtaining method, and electronic device Download PDF

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WO2021047527A1
WO2021047527A1 PCT/CN2020/114134 CN2020114134W WO2021047527A1 WO 2021047527 A1 WO2021047527 A1 WO 2021047527A1 CN 2020114134 W CN2020114134 W CN 2020114134W WO 2021047527 A1 WO2021047527 A1 WO 2021047527A1
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puf
resistance value
circuit structure
formation
puf data
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PCT/CN2020/114134
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French (fr)
Chinese (zh)
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刘毅华
肖韩
王宗巍
蔡一茂
黄如
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杭州未名信科科技有限公司
浙江省北大信息技术高等研究院
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Publication of WO2021047527A1 publication Critical patent/WO2021047527A1/en

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Definitions

  • This application relates to the field of semiconductor technology, in particular to a circuit structure for PUF, a method for obtaining PUF data, and an electronic device.
  • PUF Physical Unclonable Function
  • SRAM Static Random Access Memory, static random access memory
  • SRAM Static Random Access Memory
  • its working status depends on the external power supply, and its transistor-based manufacturing process deviation is relatively large. Small, it is difficult to realize PUF function.
  • the output of various chips is also increasing. Therefore, with the increase in the number, the number of traditional SRAM-based PUFs has also risen linearly.
  • the SRAM-based PUF has a larger Area, resulting in an increase in the proportion of PUF area in the chip and an increase in cost.
  • the purpose of this application is to provide a circuit structure for a physically unclonable PUF, a method for obtaining PUF data, and an electronic device, so as to more easily implement the PUF function and save the manufacturing cost of various chips.
  • the first aspect of the present application provides a circuit structure for PUF, including:
  • a storage matrix includes a plurality of storage cells; wherein each of the storage cells is applied to form a voltage;
  • a reading unit configured to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit;
  • the comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
  • the memory matrix adopts a memristor array, and the memory cell is a memristor device.
  • the material of the memristor device is tantalum oxide.
  • a second aspect of the present application provides a method for obtaining PUF data by using the circuit structure of the first aspect, including:
  • the comparison unit is used to compare the formation resistance value and the preset resistance value, and the PUF data is determined according to the comparison result and the PUF data is output.
  • the memory matrix adopts a memristor array, and the memory cell is a memristor device.
  • the material of the memristor device is tantalum oxide.
  • a third aspect of the present application provides an electronic device, which includes the circuit structure for PUF in the above-mentioned first aspect.
  • the circuit structure for PUF, the method for obtaining PUF data, and the electronic device provided by the present application include: a storage matrix, the storage matrix includes a plurality of storage units; wherein each of the The formation voltage is applied to the memory cell.
  • the reading unit is used to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit.
  • the comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
  • the resistance distribution of the memory cell is more non-convergent, it is easier to implement the PUF function, and the manufacturing cost of various chips can be saved.
  • Figure 1 shows a schematic diagram of a circuit structure for PUF provided by some embodiments of the present application
  • Figure 2 shows a schematic diagram of the working principle of a tantalum oxide-based memristor device
  • Figure 3 shows a schematic diagram of a memristor array fabricated based on a tantalum oxide memristor device
  • FIG. 4 shows the state distribution diagram of the memory cell after the memristor array is applied with an appropriate forming voltage
  • FIG. 5 shows a flowchart of a method for obtaining PUF data provided by some embodiments of the present application
  • Fig. 6 shows a schematic diagram of an electronic device provided by some embodiments of the present application.
  • first and second are used to distinguish different objects, rather than to describe a specific order.
  • the terms “including” and “having” and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes unlisted steps or units, or optionally also includes Other steps or units inherent in these processes, methods, products or equipment.
  • the embodiments of the present application provide a circuit structure for PUF, a method for acquiring PUF data using the circuit structure, and an electronic device for acquiring PUF data using the circuit structure, which will be described below with reference to the accompanying drawings.
  • FIG. 1 shows a schematic diagram of a circuit structure for PUF provided by some embodiments of the present application.
  • the circuit structure 10 includes a storage matrix 100, a reading unit 200, and a comparison unit 300.
  • the storage matrix 100 includes a plurality of storage units 110.
  • Each of the memory cells 110 can be applied with a forming voltage, and after the forming voltage is applied, its resistance value will change.
  • the memory cell 110 is in a high-resistance state before the forming voltage is applied, and becomes a low-resistance state after the forming voltage is applied, and vice versa. This process can be referred to as an initialization operation for the memory matrix 100.
  • the storage unit 110 can use its own resistance change to store data, and use the physical change that occurs naturally during the manufacturing process to implement the PUF function.
  • the reading unit 200 reads the formation resistance value of each memory cell 110 after the formation voltage is applied, and transmits the formation resistance value to the comparison unit 300. That is, the result of the initialization operation on the memory matrix 100 is read.
  • the memory cell 110 can be classified into three types after the initialization operation: uninitialized high-impedance cells, and successfully initialized low-impedance cells. Units, and failed units due to problems in manufacturing, the resistance distribution pattern composed of these three states is completely dependent on the manufacturing process, so it is completely random.
  • the reading unit 200 can apply the formation voltage and read the resistance value to each memory cell 110 by intersecting the correspondingly arranged word lines and bit lines. Of course, the operation of applying the formation voltage can also be performed by other units (for example, Decoder) to apply.
  • the comparison unit 300 After receiving the formation resistance value, the comparison unit 300 compares the formation resistance value with a preset resistance value, and determines the PUF data according to the comparison result and outputs the PUF data.
  • the preset threshold value may be a pre-measured resistance value of the memory cell 110 before the formation voltage is applied.
  • the resistance distribution map obtained by comparison is completely dependent on the manufacturing process, and can be determined as PUF data, and then output the PUF data.
  • the circuit structure for PUF includes: a memory matrix, the memory matrix includes a plurality of memory cells; wherein each of the memory cells is applied to form a voltage.
  • the reading unit is used to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit.
  • the comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
  • the memory matrix 100 may adopt a memristor array, and the memory unit 110 is a memristor device.
  • the material of the memristor device may be tantalum oxide.
  • TaOx (Tantalum Oxide) is a material that can achieve continuous resistance changes based on the applied voltage. Therefore, it is widely used in memristor devices.
  • the two ends of the tantalum oxide are the upper electrode and the lower electrode.
  • the initial resistance of the device is in a high resistance state (HRS) with a very uneven random distribution, and a forming voltage is required to convert the device into a relatively uniformly distributed low resistance state (LRS).
  • HRS high resistance state
  • LRS relatively uniformly distributed low resistance state
  • the TaOx-based memristor can be realized by only relying on the back metal wiring process.
  • the resistance value distribution of the memristor device based on the resistance change is more non-convergent, and it is easier to realize the PUF function and the storage of the memristor device
  • the unit area can be 4F 2 (F is the lithographic feature size), and the cost is lower.
  • Figure 3 shows the prepared TaOx-based memristor array. After the manufacturing is completed, a uniform specific forming voltage is applied to the memristor array.
  • Figure 4 shows a schematic diagram of the result of the initial operation of the memristor array.
  • the manufacturing cost of the PUF of this embodiment is low, the chip area is small under the same storage array size, and it is easier to implement.
  • FIG. 5 shows a flowchart of a method for obtaining PUF data provided by some embodiments of the present application. The method includes the following steps:
  • Step S101 applying a forming voltage to each memory cell in the memory matrix.
  • Step S102 Read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit.
  • Step S103 Use the comparison unit to compare the size of the formed resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
  • the memory matrix adopts a memristor array, and the memory cell is a memristor device.
  • the material of the memristor device is tantalum oxide.
  • the method for acquiring PUF data provided in the above-mentioned embodiments of the present application and the circuit structure for a physically unclonable PUF provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects.
  • a circuit structure for PUF is provided.
  • this application also provides an electronic device.
  • the electronic device may be a sensor, an electronic tag, or an electronic device for the client.
  • the electronic device provided in the foregoing embodiment of the present application and the circuit structure for the PUF provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects.

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Abstract

The present application provides a circuit structure for a PUF, a PUF data obtaining method, and an electronic device. The circuit structure comprises: a storage matrix which comprises a plurality of storage units, wherein a formation voltage is applied to each storage unit; a reading unit used for reading a formation resistance value of each storage unit after the formation voltage is applied to the storage unit, and transmitting the formation resistance value to a comparison unit; and the comparison unit used for comparing the formation resistance value with a preset resistance value, determining PUF data according to a comparison result, and outputting the PUF data. Compared with the prior art, due to the fact that the resistance value distribution of the storage units is not converged, the PUF is achieved more easily, and the manufacturing costs of various chips can be saved.

Description

用于PUF的电路结构、获取PUF数据的方法及电子设备Circuit structure for PUF, method for obtaining PUF data, and electronic equipment 技术领域Technical field
本申请涉及半导体技术领域,具体涉及一种用于PUF的电路结构、获取PUF数据的方法及电子设备。This application relates to the field of semiconductor technology, in particular to a circuit structure for PUF, a method for obtaining PUF data, and an electronic device.
背景技术Background technique
物理不可克隆功能(Physical Unclonable Function,PUF)是一种“数字指纹”,用作半导体设备(如微处理器)的唯一身份。PUF基于在半导体制造过程中自然发生的物理变化,使得利用这些物理变化来区分其它相同的半导体成为可能。Physical Unclonable Function (PUF) is a kind of "digital fingerprint" used as the unique identity of semiconductor devices (such as microprocessors). PUF is based on physical changes that occur naturally in the semiconductor manufacturing process, making it possible to use these physical changes to distinguish other identical semiconductors.
当前主流的基于存储器的PUF器件是基于SRAM(Static Random Access Memory,静态随机存取存储器)实现的,但是SRAM作为挥发性存储器,其工作状态依赖于外界电源,并且其基于晶体管的制造工艺偏差较小,实现PUF功能难度较大。再有,随着器件越做越小,各种芯片的产量也越来越大,因此随着数量的增大,传统的基于SRAM的PUF数量也直线上升,然而基于SRAM的PUF有着较大的面积,导致芯片中PUF面积比重增加,成本增大。The current mainstream memory-based PUF devices are implemented based on SRAM (Static Random Access Memory, static random access memory), but SRAM is a volatile memory, its working status depends on the external power supply, and its transistor-based manufacturing process deviation is relatively large. Small, it is difficult to realize PUF function. In addition, as the devices become smaller and smaller, the output of various chips is also increasing. Therefore, with the increase in the number, the number of traditional SRAM-based PUFs has also risen linearly. However, the SRAM-based PUF has a larger Area, resulting in an increase in the proportion of PUF area in the chip and an increase in cost.
发明内容Summary of the invention
本申请的目的是提供一种用于物理不可克隆功能PUF的电路结构、一种获取PUF数据的方法及一种电子设备,以更加容易实现PUF功能,节约各种芯片的制造成本。The purpose of this application is to provide a circuit structure for a physically unclonable PUF, a method for obtaining PUF data, and an electronic device, so as to more easily implement the PUF function and save the manufacturing cost of various chips.
本申请第一方面提供一种用于PUF的电路结构,包括:The first aspect of the present application provides a circuit structure for PUF, including:
存储矩阵,所述存储矩阵包括多个存储单元;其中,每个所述存储单元被施加形成电压;A storage matrix, the storage matrix includes a plurality of storage cells; wherein each of the storage cells is applied to form a voltage;
读取单元,用于读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元;A reading unit, configured to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit;
所述比较单元,用于比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。The comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
在本申请的一些实施方式中,所述存储矩阵采用忆阻器阵列,所述存储单元为忆阻器器件。In some embodiments of the present application, the memory matrix adopts a memristor array, and the memory cell is a memristor device.
在本申请的一些实施方式中,所述忆阻器器件的制作材料为氧化钽。In some embodiments of the present application, the material of the memristor device is tantalum oxide.
本申请第二方面提供一种利用上述第一方面的电路结构获取PUF数据的方法,包括:A second aspect of the present application provides a method for obtaining PUF data by using the circuit structure of the first aspect, including:
对所述存储矩阵中的每个存储单元施加形成电压;Applying a forming voltage to each memory cell in the memory matrix;
读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元;Reading the formation resistance value of each memory cell after the formation voltage is applied, and sending the formation resistance value to the comparison unit;
利用所述比较单元比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。The comparison unit is used to compare the formation resistance value and the preset resistance value, and the PUF data is determined according to the comparison result and the PUF data is output.
在本申请的一些实施方式中,所述存储矩阵采用忆阻器阵列,所述存储单元为忆阻器器件。In some embodiments of the present application, the memory matrix adopts a memristor array, and the memory cell is a memristor device.
在本申请的一些实施方式中,所述忆阻器器件的制作材料为氧化钽。In some embodiments of the present application, the material of the memristor device is tantalum oxide.
本申请第三方面提供一种电子设备,该电子设备包括上述第一方面中的用于PUF的电路结构。A third aspect of the present application provides an electronic device, which includes the circuit structure for PUF in the above-mentioned first aspect.
相较于现有技术,本申请提供的用于PUF的电路结构、获取PUF数据的方法及电子设备,该电路结构包括:存储矩阵,所述存储矩阵包括多个存储单元;其中每个所述存储单元被施加形成电压。读取单元,用于读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元。所述比较单元,用于比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。相较于现有技术,由于存储单元阻值分布更加的不收敛,因此更加容易实现PUF功能,可以节约各种芯片的制造成本。Compared with the prior art, the circuit structure for PUF, the method for obtaining PUF data, and the electronic device provided by the present application include: a storage matrix, the storage matrix includes a plurality of storage units; wherein each of the The formation voltage is applied to the memory cell. The reading unit is used to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit. The comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data. Compared with the prior art, since the resistance distribution of the memory cell is more non-convergent, it is easier to implement the PUF function, and the manufacturing cost of various chips can be saved.
附图说明Description of the drawings
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本申请的限制。而且在整个附图中,用相同的参考符号表示相同的部件。By reading the detailed description of the preferred embodiments below, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only used for the purpose of illustrating the preferred embodiments, and are not considered as a limitation to the application. Also, throughout the drawings, the same reference symbols are used to denote the same components.
图1示出了本申请的一些实施方式所提供的一种用于PUF的电路结构的示 意图;Figure 1 shows a schematic diagram of a circuit structure for PUF provided by some embodiments of the present application;
图2示出了基于氧化钽的忆阻器器件的工作原理示意图;Figure 2 shows a schematic diagram of the working principle of a tantalum oxide-based memristor device;
图3示出了基于氧化钽忆阻器器件制备出的忆阻器阵列的示意图;Figure 3 shows a schematic diagram of a memristor array fabricated based on a tantalum oxide memristor device;
图4示出了忆阻器阵列在施加适当的形成电压后存储单元的状态分布图;FIG. 4 shows the state distribution diagram of the memory cell after the memristor array is applied with an appropriate forming voltage;
图5示出了本申请的一些实施方式所提供的一种获取PUF数据的方法的流程图;FIG. 5 shows a flowchart of a method for obtaining PUF data provided by some embodiments of the present application;
图6示出了本申请的一些实施方式所提供的一种电子设备的示意图。Fig. 6 shows a schematic diagram of an electronic device provided by some embodiments of the present application.
具体实施方式detailed description
下面将参照附图更详细地描述本公开的示例性实施方式。虽然附图中显示了本公开的示例性实施方式,然而应当理解,可以以各种形式实现本公开而不应被这里阐述的实施方式所限制。相反,提供这些实施方式是为了能够更透彻地理解本公开,并且能够将本公开的范围完整的传达给本领域的技术人员。Hereinafter, exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. Although the drawings show exemplary embodiments of the present disclosure, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
需要注意的是,除非另有说明,本申请使用的技术术语或者科学术语应当为本申请所属领域技术人员所理解的通常意义。It should be noted that, unless otherwise specified, the technical or scientific terms used in this application shall have the usual meaning understood by those skilled in the art to which this application belongs.
另外,术语“第一”和“第二”等是用于区别不同对象,而不是用于描述特定顺序。此外,术语“包括”和“具有”以及它们任何变形,意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元,而是可选地还包括没有列出的步骤或单元,或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。In addition, the terms "first" and "second" are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes unlisted steps or units, or optionally also includes Other steps or units inherent in these processes, methods, products or equipment.
本申请实施例提供一种用于PUF的电路结构,一种利用该电路结构获取PUF数据的方法,以及一种利用该电路结构获取PUF数据的电子设备,下面结合附图进行说明。The embodiments of the present application provide a circuit structure for PUF, a method for acquiring PUF data using the circuit structure, and an electronic device for acquiring PUF data using the circuit structure, which will be described below with reference to the accompanying drawings.
请参考图1,其示出了本申请的一些实施方式所提供的一种用于PUF的电路结构的示意图。Please refer to FIG. 1, which shows a schematic diagram of a circuit structure for PUF provided by some embodiments of the present application.
如图所示,所述电路结构10包括:存储矩阵100,读取单元200,比较单元300。As shown in the figure, the circuit structure 10 includes a storage matrix 100, a reading unit 200, and a comparison unit 300.
所述存储矩阵100包括多个存储单元110。其中每个所述存储单元110可以被施加形成电压,被施加形成电压后,其电阻值会发生改变。例如,存储单 元110未被施加形成电压之前为高阻值状态,被施加形成电压后变为低阻值状态,反之也可以,该过程可以称为对存储矩阵100的初始化操作。本实施例,存储单元110可以利用自身的阻值变化来存储数据,以及利用制造过程中自然发生的物理变化来实现PUF功能。The storage matrix 100 includes a plurality of storage units 110. Each of the memory cells 110 can be applied with a forming voltage, and after the forming voltage is applied, its resistance value will change. For example, the memory cell 110 is in a high-resistance state before the forming voltage is applied, and becomes a low-resistance state after the forming voltage is applied, and vice versa. This process can be referred to as an initialization operation for the memory matrix 100. In this embodiment, the storage unit 110 can use its own resistance change to store data, and use the physical change that occurs naturally during the manufacturing process to implement the PUF function.
所述读取单元200读取每个所述存储单元110被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元300。即读取对存储矩阵100初始化操作后的结果,该初始化操作后的结果中,存储单元110在初始化操作后可以归为三种:未被初始化的高阻态单元,被成功初始化的低阻态单元,以及由于制造中出现问题的失效单元,这三种状态组成的阻值分布图(pattern)完全取决于制造过程,因此是完全随机的。所述读取单元200可以通过相互交叉对应设置的字线和位线来对每一个存储单元110进行施加形成电压和阻值读取的操作,当然施加形成电压的操作也可以通过其它单元(例如解码器)来施加。The reading unit 200 reads the formation resistance value of each memory cell 110 after the formation voltage is applied, and transmits the formation resistance value to the comparison unit 300. That is, the result of the initialization operation on the memory matrix 100 is read. In the result of the initialization operation, the memory cell 110 can be classified into three types after the initialization operation: uninitialized high-impedance cells, and successfully initialized low-impedance cells. Units, and failed units due to problems in manufacturing, the resistance distribution pattern composed of these three states is completely dependent on the manufacturing process, so it is completely random. The reading unit 200 can apply the formation voltage and read the resistance value to each memory cell 110 by intersecting the correspondingly arranged word lines and bit lines. Of course, the operation of applying the formation voltage can also be performed by other units (for example, Decoder) to apply.
所述比较单元300接收到所述形成阻值后,比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。其中,预设阈值可以是预先测得的存储单元110未被施加形成电压之前的阻值。通过比较得到的阻值分布图完全取决于制造过程,可以确定为PUF数据,然后输出该PUF数据。After receiving the formation resistance value, the comparison unit 300 compares the formation resistance value with a preset resistance value, and determines the PUF data according to the comparison result and outputs the PUF data. Wherein, the preset threshold value may be a pre-measured resistance value of the memory cell 110 before the formation voltage is applied. The resistance distribution map obtained by comparison is completely dependent on the manufacturing process, and can be determined as PUF data, and then output the PUF data.
本申请实施例提供的用于PUF的电路结构,包括:存储矩阵,所述存储矩阵包括多个存储单元;其中每个所述存储单元被施加形成电压。读取单元,用于读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元。所述比较单元,用于比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。相较于现有技术,由于存储单元阻值分布更加的不收敛,因此更加容易实现PUF功能,可以节约各种芯片的制造成本。The circuit structure for PUF provided by the embodiment of the application includes: a memory matrix, the memory matrix includes a plurality of memory cells; wherein each of the memory cells is applied to form a voltage. The reading unit is used to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit. The comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data. Compared with the prior art, since the resistance distribution of the memory cell is more non-convergent, it is easier to implement the PUF function, and the manufacturing cost of various chips can be saved.
在本申请的一些实施方式中,所述存储矩阵100可以采用忆阻器阵列,所述存储单元110为忆阻器器件。所述忆阻器器件的制作材料可以为氧化钽。In some embodiments of the present application, the memory matrix 100 may adopt a memristor array, and the memory unit 110 is a memristor device. The material of the memristor device may be tantalum oxide.
TaOx(氧化钽)是一种可以基于被施加的电压不同实现阻值连续变化的材料,因此被广泛的应用在忆阻器器件中,当基于TaOx的忆阻器器件被制备出来后,如图2所示,氧化钽两端分别为上电极和下电极。器件的初始电阻均为随机分布很不均匀的高阻值状态(HRS),需要一个形成电压(forming voltage) 来将器件转换为相对均匀分布的低阻值状态(LRS)。基于TaOx忆阻器可以仅依托于后段金属连线工艺实现,相比晶体管,基于电阻变化的忆阻器器件的电阻值分布更加的不收敛,更加容易实现PUF功能,忆阻器器件的存储单元面积可以做到4F 2(F为光刻特征尺寸),成本更低。 TaOx (Tantalum Oxide) is a material that can achieve continuous resistance changes based on the applied voltage. Therefore, it is widely used in memristor devices. When TaOx-based memristor devices are prepared, as shown in the figure As shown in 2, the two ends of the tantalum oxide are the upper electrode and the lower electrode. The initial resistance of the device is in a high resistance state (HRS) with a very uneven random distribution, and a forming voltage is required to convert the device into a relatively uniformly distributed low resistance state (LRS). The TaOx-based memristor can be realized by only relying on the back metal wiring process. Compared with the transistor, the resistance value distribution of the memristor device based on the resistance change is more non-convergent, and it is easier to realize the PUF function and the storage of the memristor device The unit area can be 4F 2 (F is the lithographic feature size), and the cost is lower.
图3所示为制备出的基于TaOx的忆阻器阵列,在制造完成后,对忆阻器阵列施加一个统一的特定形成电压后,忆阻器阵列存在三种单元:低阻态单元,高阻态单元和失效单元(可以通过不同的颜色表示,如黑色为高阻态单元,蓝色为低阻态单元,红色为失效单元),这三种单元在忆阻器阵列中的分布完全取决于制造过程中的工艺偏差,即这三种单元分布的pattern对每一个器件都是独一无二的,可以实现理想的PUF器件。图4所示为对忆阻器阵列初始化操作后的结果示意图。Figure 3 shows the prepared TaOx-based memristor array. After the manufacturing is completed, a uniform specific forming voltage is applied to the memristor array. There are three types of units in the memristor array: low-resistance state cell, high-resistance cell Resistance unit and failure unit (can be represented by different colors, such as black for high resistance unit, blue for low resistance unit, red for failure unit), the distribution of these three types of units in the memristor array completely depends on Due to the process deviation in the manufacturing process, that is, the pattern of these three cell distributions is unique to each device, and an ideal PUF device can be realized. Figure 4 shows a schematic diagram of the result of the initial operation of the memristor array.
与现有的SRAM PUF相比,本实施方式的PUF制造成本低,同样的存储阵列大小下芯片面积小,更容易实现。Compared with the existing SRAM PUF, the manufacturing cost of the PUF of this embodiment is low, the chip area is small under the same storage array size, and it is easier to implement.
在上述的实施例中,提供了一种用于PUF的电路结构,基于该用于PUF的电路结构,本申请还提供了一种获取PUF数据的方法。请参考图5,其示出了本申请的一些实施方式所提供的一种获取PUF数据的方法的流程图,该方法包括以下步骤:In the foregoing embodiment, a circuit structure for PUF is provided. Based on the circuit structure for PUF, this application also provides a method for obtaining PUF data. Please refer to FIG. 5, which shows a flowchart of a method for obtaining PUF data provided by some embodiments of the present application. The method includes the following steps:
步骤S101:对所述存储矩阵中的每个存储单元施加形成电压。Step S101: applying a forming voltage to each memory cell in the memory matrix.
步骤S102:读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元。Step S102: Read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit.
步骤S103:利用所述比较单元比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。Step S103: Use the comparison unit to compare the size of the formed resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
在本申请的一些实施方式中,所述存储矩阵采用忆阻器阵列,所述存储单元为忆阻器器件。In some embodiments of the present application, the memory matrix adopts a memristor array, and the memory cell is a memristor device.
在本申请的一些实施方式中,所述忆阻器器件的制作材料为氧化钽。In some embodiments of the present application, the material of the memristor device is tantalum oxide.
本申请的上述实施例提供的获取PUF数据的方法与本申请实施例提供的用于物理不可克隆功能PUF的电路结构出于相同的发明构思,具有相同的有益效果。The method for acquiring PUF data provided in the above-mentioned embodiments of the present application and the circuit structure for a physically unclonable PUF provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects.
在上述的实施例中,提供了一种用于PUF的电路结构,与之相对应的,本申请还提供了一种电子设备,所述电子设备可以是传感器、电子标签或者用于客户端的电子设备,该电子设备中使用了上述用于PUF的电路结构10。请参考图6,其示出了本申请的一些实施方式所提供的一种电子设备的示意图。In the above-mentioned embodiment, a circuit structure for PUF is provided. Correspondingly, this application also provides an electronic device. The electronic device may be a sensor, an electronic tag, or an electronic device for the client. A device in which the above-mentioned circuit structure 10 for PUF is used in the electronic device. Please refer to FIG. 6, which shows a schematic diagram of an electronic device provided by some embodiments of the present application.
本申请的上述实施例提供的电子设备与本申请实施例提供的用于PUF的电路结构出于相同的发明构思,具有相同的有益效果。The electronic device provided in the foregoing embodiment of the present application and the circuit structure for the PUF provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects.
最后应说明的是:以上各实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述各实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的范围,其均应涵盖在本申请的权利要求和说明书的范围当中。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the application, not to limit them; although the application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or equivalently replace some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present application. The scope, which shall be included in the scope of the claims and specification of this application.

Claims (7)

  1. 一种用于物理不可克隆功能PUF的电路结构,其特征在于,包括:A circuit structure for physically unclonable PUF, which is characterized in that it includes:
    存储矩阵,所述存储矩阵包括多个存储单元;其中,每个所述存储单元被施加形成电压;A storage matrix, the storage matrix includes a plurality of storage cells; wherein each of the storage cells is applied to form a voltage;
    读取单元,用于读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元;A reading unit, configured to read the formation resistance value of each memory cell after the formation voltage is applied, and transmit the formation resistance value to the comparison unit;
    所述比较单元,用于比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。The comparison unit is used to compare the formation resistance value and the preset resistance value, and determine the PUF data according to the comparison result and output the PUF data.
  2. 根据权利要求1所述的电路结构,其特征在于,所述存储矩阵采用忆阻器阵列,所述存储单元为忆阻器器件。The circuit structure according to claim 1, wherein the memory matrix adopts a memristor array, and the memory cell is a memristor device.
  3. 根据权利要求2所述的电路结构,其特征在于,所述忆阻器器件的制作材料为氧化钽。3. The circuit structure of claim 2, wherein the memristor device is made of tantalum oxide.
  4. 一种利用权利要求1至3任一项所述电路结构获取PUF数据的方法,其特征在于,包括:A method for obtaining PUF data using the circuit structure of any one of claims 1 to 3, characterized in that it comprises:
    对所述存储矩阵中的每个存储单元施加形成电压;Applying a forming voltage to each memory cell in the memory matrix;
    读取每个所述存储单元被施加形成电压后的形成阻值,并将所述形成阻值输送至比较单元;Reading the formation resistance value of each memory cell after the formation voltage is applied, and sending the formation resistance value to the comparison unit;
    利用所述比较单元比较所述形成阻值与预设阻值的大小,并根据比较结果确定PUF数据并输出该PUF数据。The comparison unit is used to compare the formation resistance value and the preset resistance value, and the PUF data is determined according to the comparison result and the PUF data is output.
  5. 根据权利要求4所述的获取PUF数据的方法,其特征在于,所述存储矩阵采用忆阻器阵列,所述存储单元为忆阻器器件。The method for obtaining PUF data according to claim 4, wherein the storage matrix adopts a memristor array, and the storage unit is a memristor device.
  6. 根据权利要求5所述的获取PUF数据的方法,其特征在于,所述忆阻器器件的制作材料为氧化钽。The method for obtaining PUF data according to claim 5, wherein the memristor device is made of tantalum oxide.
  7. 一种电子设备,其特征在于,包括权利要求1至3任一项所述的用于PUF的电路结构。An electronic device, characterized by comprising the circuit structure for PUF according to any one of claims 1 to 3.
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