WO2021031646A1 - 一种峰值电流型蜂鸣器驱动电路 - Google Patents

一种峰值电流型蜂鸣器驱动电路 Download PDF

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Publication number
WO2021031646A1
WO2021031646A1 PCT/CN2020/092459 CN2020092459W WO2021031646A1 WO 2021031646 A1 WO2021031646 A1 WO 2021031646A1 CN 2020092459 W CN2020092459 W CN 2020092459W WO 2021031646 A1 WO2021031646 A1 WO 2021031646A1
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voltage
module
pwm signal
transistor
resistor
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PCT/CN2020/092459
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English (en)
French (fr)
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尹向阳
黄天华
赵永宁
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深圳南云微电子有限公司
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Publication of WO2021031646A1 publication Critical patent/WO2021031646A1/zh

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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10K—SOUND-PRODUCING DEVICES; METHODS OR DEVICES FOR PROTECTING AGAINST, OR FOR DAMPING, NOISE OR OTHER ACOUSTIC WAVES IN GENERAL; ACOUSTICS NOT OTHERWISE PROVIDED FOR
    • G10K9/00—Devices in which sound is produced by vibrating a diaphragm or analogous element, e.g. fog horns, vehicle hooters or buzzers
    • G10K9/12—Devices in which sound is produced by vibrating a diaphragm or analogous element, e.g. fog horns, vehicle hooters or buzzers electrically operated
    • G10K9/13—Devices in which sound is produced by vibrating a diaphragm or analogous element, e.g. fog horns, vehicle hooters or buzzers electrically operated using electromagnetic driving means

Definitions

  • the invention relates to a peak current type buzzer driving circuit.
  • the traditional electromagnetic buzzer drive circuit generally uses a triode and a transformer to form a self-excited oscillation circuit, as shown in Figure 1.
  • the base junction capacitance of Q1 is charged through R1.
  • the transistor Q1 turns on, and the VCC terminal voltage source passes through the transistor Q1 to the magnetizing inductance of the buzzer.
  • L1 charging In addition, a positive and negative induced electromotive force is generated at the same name end of the inductor L1/L2, and the current direction in the form of the electromotive force generated at both ends of L2 flows out of the same name end, prompting the switch Q1 to be in a saturated conduction state.
  • the nominal voltage of the buzzer is 3V, then its maximum It can only work in the range of 1.5V-5V, otherwise the sound pressure level will change greatly, and the power consumption will increase in a square relationship with the increase of the input voltage, because the loss of the buzzer is basically on its own coil , The greater the effective value of the current flowing through the coil, the greater the loss.
  • the general solution is: when the input voltage VIN of the buzzer is higher, the duty cycle is smaller.
  • the PWM signal drives the switch tube TR1 to reduce the sound pressure and power consumption of the buzzer when the input voltage is high.
  • the problem with this solution is that if the duty cycle is too small, the sound pressure of the buzzer will drop too much, causing the sound pressure of the buzzer to change too much under a wide input voltage.
  • the technical problem to be solved by the present invention is to provide a peak current type buzzer drive circuit to solve the problem of high cost, high power consumption, and poor sound pressure consistency of the existing buzzer drive circuit under high input voltage.
  • the applicable input voltage range is narrow.
  • a peak current type buzzer drive circuit comprising a switch tube and a control unit.
  • the switch tube connects an electromagnetic buzzer and system input voltage when it is turned on, and turns off the electromagnetic buzzer when it is turned off
  • the control unit is used to output a PWM signal so that: the switch tube is turned on when the PWM signal is at a high level, and turned off when the PWM signal is at a low level;
  • the control unit is provided with a sampling circuit, the sampling circuit contains a sampling resistor connected in series with the switch tube, and the control unit dynamically outputs a signal that meets the following conditions based on the system input voltage and the electrical signal on the sampling resistor PWM signal:
  • Condition 1 The period T of the PWM signal is a preset fixed value
  • V ref min is a preset value between 0.05V and V in min
  • V in (t) is the real-time voltage of the system input voltage
  • V in min is the minimum value of the input voltage of the system
  • T is the period of the PWM signal
  • R 107 is the resistance of the sampling resistor.
  • the working principle of the peak current type buzzer driving circuit of the present invention is as follows:
  • the period T of the PWM signal is set to a fixed value through condition 1, and the real-time duty ratio D(t) of the PWM signal changes with the real-time voltage value V in (t) of the input voltage of the system in reverse, that is, when the system The higher the real-time voltage value V in (t) of the input voltage, the lower the real-time duty ratio D(t) of the PWM signal, so that the duty ratio of the electromagnetic buzzer is reduced through the switch tube, thereby reducing the electromagnetic buzzer
  • the effective value of the current of the buzzer under high system input voltage greatly reduces the power consumption of the electromagnetic buzzer, ensuring that the electromagnetic buzzer can work normally at high input voltage without burning out;
  • the present invention controls the real-time duty ratio D(t) of the PWM signal through the formula set by condition two. Under high system input voltage, it can ensure the electromagnetic bee by reducing the real-time duty ratio D(t). The normal operation of the buzzer can avoid the problem that the real-time duty cycle D(t) is too large to reduce the sound pressure of the electromagnetic buzzer under high system input voltage, which makes the electromagnetic buzzer sound The pressure changes little in a wide system input voltage range. It has been verified that the present invention can control the sound pressure deviation of the electromagnetic buzzer within ⁇ 3db within the wide input range of 3-24VDC;
  • the present invention can be compatible with a wider system input voltage range, and can ensure low power consumption and good sound pressure consistency within a wide system input voltage range.
  • control unit is also provided with a feedforward voltage generation module, a comparator module, a logic drive module, an oscillator, a power supply module and a freewheeling module;
  • the positive pole of the electromagnetic buzzer is connected to the system input voltage, the negative pole is connected to the drain of the switch tube, and the source of the switch tube is connected to the reference ground terminal through the sampling resistor;
  • the power supply module converts the system input voltage into a bias voltage VDD used to supply power to the control unit;
  • the feedforward voltage generating module outputs a real-time feedforward voltage V ref (t) that satisfies the following formula 2:
  • the sampling circuit outputs the real-time voltage V CS (t) of the sampling resistor
  • the real-time feedforward voltage V ref (t) is input to the inverting input terminal of the comparator module, the real-time voltage V CS (t) is input to the non-inverting input terminal of the comparator module, and the output of the comparator module is The logic level is input to the R input terminal of the logic drive module; so that: when V CS (t) ⁇ V ref (t), the comparator module outputs a low level to the R input terminal, and when V CS (t) >V ref (t), the comparator module outputs a high level to the R input terminal;
  • the oscillator outputs a clock signal with a period of the period T to the S input terminal of the logic drive module;
  • the logic driving module is used to output the PWM signal to the gate of the switching tube, the PWM signal can drive the switching tube, and the logic of the logic driving module to output the PWM signal satisfies: First, according to Input the clock signal of the S input terminal, that is, according to the period T, the PWM signal is inverted from low level to high level to satisfy the condition 1, so that the switch tube is turned off according to the period Switching to conduction; second, when the logic level input to the R input is switched from low to high, the PWM signal is switched from high to low to meet the second condition, so that The switch tube is switched from on to off according to the period;
  • the freewheeling module provides a freewheeling circuit for the electromagnetic buzzer to release energy when the switch tube is turned off.
  • the clock signal output by the oscillator is at the beginning of the period T, the logic drive module outputs a high level, and the control switch is turned on.
  • the system input voltage is higher, on the one hand, it makes: The faster the real-time current I PEAK (t) increases, the faster the real-time voltage V CS (t) input to the non-inverting input terminal of the comparator module increases, so that the voltage at the non-inverting input terminal of the comparator module exceeds the inverting input terminal.
  • the shorter the voltage time that is, the shorter the time for the logic level output from the comparator module to the R input of the logic drive module to switch from low to high, and the output of the logic drive module to switch from high to low
  • the shorter the level time is, the shorter the time for the switch tube to change from the on state to the off state.
  • the real-time duty cycle D(t) of the PWM signal is lower to control the electromagnetic buzzer through the switch tube.
  • the duty cycle is reduced, thereby reducing the effective current value of the electromagnetic buzzer under high system input voltage, greatly reducing the power consumption of the electromagnetic buzzer, and ensuring that the electromagnetic buzzer can work normally even at high input voltage It will not burn out.
  • the real-time feedforward voltage V ref (t) output by the feedforward voltage generation module follows the in-phase change of the system input voltage, that is, the higher the system input voltage, the higher the real-time feedforward voltage V ref (t), compared to The voltage at the inverting input terminal of the comparator module is unchanged, which delays the time when the voltage at the non-inverting input terminal of the comparator module exceeds the voltage at the inverting input terminal, and prevents the real-time duty cycle D(t) of the PWM signal from causing electromagnetic The sound pressure of the type buzzer is too small under high system input voltage.
  • the real-time feedforward voltage V ref (t) changes within the range defined by formula 2 This can accurately control the time when the voltage at the non-inverting input terminal of the comparator module exceeds the voltage at the inverting input terminal, so as to obtain the corresponding real-time duty cycle D(t) under different high system input voltages to ensure the electromagnetic buzzer
  • the sound pressure changes little within a wide system input voltage range. It has been verified that the present invention can control the sound pressure deviation of the electromagnetic buzzer within ⁇ 3db within the wide input range of 3-24VDC.
  • the second embodiment realizes the dynamic output of PWM signals that meet the first and second conditions; and, the adopted control unit and switch tube can be implemented by integrated circuits without any peripheral devices, which can improve the consistency of the driving circuit and greatly improve The pass rate in the production process.
  • the invention also discloses a solution realized by linearization, which is specifically as follows:
  • a peak current type buzzer drive circuit comprising a switch tube and a control unit.
  • the switch tube connects an electromagnetic buzzer and system input voltage when it is turned on, and turns off the electromagnetic buzzer when it is turned off
  • the control unit is used to output a PWM signal so that: the switch tube is turned on when the PWM signal is at a high level, and turned off when the PWM signal is at a low level;
  • the control unit is provided with a sampling circuit, the sampling circuit contains a sampling resistor connected in series with the switch tube, and the control unit dynamically outputs a signal that meets the following conditions based on the system input voltage and the electrical signal on the sampling resistor PWM signal:
  • Condition 1 The period T of the PWM signal is a preset fixed value
  • V ref min is a preset value between 0.05V and V in min
  • V in (t) is the real-time voltage of the system input voltage
  • V in min is the minimum value of the system input voltage
  • V in max is the maximum value of the system input voltage (VIN)
  • T is the period of the PWM signal
  • R 107 is the resistance of the sampling resistor .
  • control unit is also provided with a feedforward voltage generation module, a comparator module, a logic drive module, an oscillator, a power supply module and a freewheeling module;
  • the positive pole of the electromagnetic buzzer is connected to the system input voltage, the negative pole is connected to the drain of the switch tube, and the source of the switch tube is connected to the reference ground terminal through the sampling resistor;
  • the power supply module converts the system input voltage into a bias voltage VDD used to supply power to the control unit;
  • the feedforward voltage generating module outputs a real-time feedforward voltage V ref (t) that satisfies the following formula 4:
  • V ref (t) K C V in (t)+V ref min [Formula 4];
  • the sampling circuit outputs the real-time voltage V CS (t) of the sampling resistor
  • the real-time feedforward voltage V ref (t) is input to the inverting input terminal of the comparator module, the real-time voltage V CS (t) is input to the non-inverting input terminal of the comparator module, and the output of the comparator module is The logic level is input to the R input terminal of the logic drive module; so that: when V CS (t) ⁇ V ref (t), the comparator module outputs a low level to the R input terminal, and when V CS (t) >V ref (t), the comparator module outputs a high level to the R input terminal;
  • the oscillator outputs a clock signal with a period of the period T to the S input terminal of the logic drive module;
  • the logic driving module is used to output the PWM signal to the gate of the switching tube, the PWM signal can drive the switching tube, and the logic of the logic driving module to output the PWM signal satisfies: First, according to Input the clock signal of the S input terminal, that is, according to the period T, the PWM signal is inverted from low level to high level to satisfy the condition 1, so that the switch tube is turned off according to the period Switching to conduction; second, when the logic level input to the R input is switched from low to high, the PWM signal is switched from high to low to meet the second condition, so that The switch tube is switched from on to off according to the period;
  • the freewheeling module provides a freewheeling circuit for the electromagnetic buzzer to release energy when the switch tube is turned off.
  • the feedforward voltage generation module is composed of a feedforward compensation module and a controlled voltage source module; the feedforward compensation module outputs a feedforward variable signal that follows the in-phase change of the input voltage of the system, so
  • the controlled voltage source module converts the feedforward variable signal into the real-time feedforward voltage V ref (t) and outputs it.
  • the feedforward variable signal may be a signal of different forms such as a current signal, a voltage signal, and a frequency signal.
  • the feedforward compensation module and the controlled voltage source module are both voltage controlled voltage sources.
  • the circuit structure of the voltage-controlled voltage source is: the emitter of the transistor Q1 is connected to the bias voltage VDD, the base of the transistor Q1, the collector of the transistor Q1, and the base phase of the transistor Q2 Connected, the collector of the transistor Q1 is connected to one end of the resistor R2, the other end of the resistor R2 and the collector of the transistor Q2 are both connected to the reference ground, and the emitter of the transistor Q2 is connected to one end of the resistor R1 ,
  • the other end of the resistor R1 is used as the input end of the voltage-controlled voltage source;
  • the non-inverting input end of the operational amplifier U1 is connected to the emitter of the transistor Q2 through the resistor R3, and the inverting input end of the operational amplifier U1 is divided into Two paths, one path is connected to the system input voltage through a resistor R4, the other path is connected to the output terminal of the operational amplifier U1 through a resistor R5, and the output terminal of the operational amplifier U1 serves as the output terminal of the voltage
  • the input terminal of the feedforward compensation module is connected to the input voltage of the system, the output terminal of the feedforward compensation module is connected to the input terminal of the controlled voltage source module, and the output terminal of the controlled voltage source module serves as the The output terminal of the feedforward voltage generating module;
  • the bias voltage VDD is the minimum value V in min of the system input voltage.
  • the feedforward compensation module is a voltage-controlled current source
  • the controlled voltage source module is a current-controlled voltage source
  • the circuit structure of the voltage-controlled current source is: the emitter of the transistor Q3 is connected to the bias voltage VDD, the base of the transistor Q3, the collector of the transistor Q3, and the base phase of the transistor Q4 Connected, the collector of the transistor Q3 is connected to one end of the resistor R5, the other end of the resistor R5 and the collector of the transistor Q4 are both connected to the reference ground, and the emitter of the transistor Q4 is connected to the mirror current source Input terminal, the power supply terminal of the mirror current source is connected to the system input voltage, and the output terminal of the mirror current source serves as the output terminal of the voltage-controlled current source;
  • the circuit structure of the current-controlled voltage source is: the power supply terminal of the reference current source is connected to the bias voltage VDD, the output terminal of the reference current source, the output terminal of the voltage-controlled current source, and one end of the resistor R6 Connected, the other end of the resistor R6 is connected to the reference ground, and the output end of the voltage-controlled current source is used as the output end of the feedforward voltage generating module;
  • the bias voltage VDD is the minimum value V in min of the system input voltage.
  • control unit is further provided with a delay module, and the output terminal of the sampling circuit is connected to the non-inverting input terminal of the comparator module through the delay module, so as to use the delay module to adjust The time when the voltage at the non-inverting input terminal of the comparator module exceeds the voltage at the inverting input terminal, that is, adjusting the real-time duty cycle D(t) of the PWM signal.
  • control unit is further provided with a trimming module, which is connected to the control terminal of the oscillator and used to adjust the period of the clock signal output by the oscillator to adjust the Describe the period of the PWM signal.
  • the present invention has the following beneficial effects:
  • the present invention sets the period T of the PWM signal to a fixed value through condition 1, and makes the real-time duty cycle D(t) of the PWM signal change in reverse with the real-time voltage value V in (t) of the system input voltage. That is, when the real-time voltage value V in (t) of the system input voltage is higher, the real-time duty ratio D(t) of the PWM signal is lower, so that the duty ratio of the electromagnetic buzzer through the switch tube is reduced, thereby reducing
  • the effective value of the current of the electromagnetic buzzer under high system input voltage greatly reduces the power consumption of the electromagnetic buzzer, ensuring that the electromagnetic buzzer can work normally at high input voltage without burning out;
  • the present invention controls the real-time duty ratio D(t) of the PWM signal through the formula set by condition two. Under high system input voltage, it can ensure the electromagnetic bee by reducing the real-time duty ratio D(t). The normal operation of the buzzer can avoid the problem that the real-time duty cycle D(t) is too large to reduce the sound pressure of the electromagnetic buzzer under high system input voltage, which makes the electromagnetic buzzer sound The pressure changes little in a wide system input voltage range. It has been verified that the present invention can control the sound pressure deviation of the electromagnetic buzzer within ⁇ 3db within the wide input range of 3-24VDC;
  • the present invention can be compatible with a wider system input voltage range, and can ensure low power consumption and good sound pressure consistency within a wide system input voltage range.
  • the present invention uses a feedforward voltage generation module, a comparator module, a logic drive module, an oscillator, a power supply module, a sampling circuit, and a freewheeling module to form a control unit, and realizes the dynamic output of PWM signals that meet the first and second conditions;
  • the control unit and the switch tube are easy to adopt integrated circuits to realize commercialization without any peripheral devices, which can improve the consistency of the driving circuit and greatly improve the pass rate in the production process.
  • the present invention aims at the existence of the above formula 1 and formula 2 Calculation, when the control unit is implemented by an integrated circuit, there is a problem that it is difficult to debug the circuit parameters of the integrated circuit to fully satisfy formula 1 and formula 2.
  • the ref (t) is changed to satisfy the linearization formula 3 and formula 4, which can greatly reduce the difficulty of circuit parameter debugging of the control unit realized by the integrated circuit, and can ensure that the control unit fully meets the formula 3 and formula 4, so as to reduce the peak value of the present invention
  • the development cost of the current-type buzzer drive circuit is used to satisfy the linearization formula 3 and formula 4, which can greatly reduce the difficulty of circuit parameter debugging of the control unit realized by the integrated circuit, and can ensure that the control unit fully meets the formula 3 and formula 4, so as to reduce the peak value of the present invention.
  • the peak current type buzzer driving circuit of the present invention has the advantage of low implementation cost.
  • Fig. 1 is a buzzer driving circuit adopting a self-excited oscillation mode in the prior art
  • Fig. 2 is a buzzer driving circuit adopting an IC driving method in the prior art
  • Fig. 3 is a circuit principle block diagram of a peak current type buzzer driving circuit according to the second embodiment of the present invention.
  • FIG. 4 is a circuit principle block diagram of a peak current type buzzer driving circuit according to the fifth embodiment of the present invention.
  • FIG. 5 is a schematic circuit diagram of the feedforward compensation module 100, the controlled voltage source module 101, and the comparator module 102 in the fifth embodiment of the present invention
  • Fig. 6 is a circuit principle block diagram of a peak current type buzzer driving circuit according to the sixth embodiment of the present invention.
  • FIG. 7 is a schematic circuit diagram of the feedforward compensation module 100, the controlled voltage source module 101, and the comparator module 102 in the sixth embodiment of the present invention.
  • Fig. 8 is a circuit principle block diagram of the peak current type buzzer driving circuit of the seventh and eighth embodiments of the present invention.
  • the present invention discloses a peak current type buzzer driving circuit, which includes a switch tube 106 and a control unit 300.
  • the switch tube 106 turns on the electromagnetic buzzer when it is turned on. 109 and the system input voltage VIN, disconnect the electromagnetic buzzer 109 and the system input voltage VIN when turned off, the control unit 300 is used to output a PWM signal, so that: the switch tube 106 is in the PWM signal It is turned on when it is at a high level, and turned off when the PWM signal is at a low level;
  • the control unit 300 is provided with a sampling circuit 107, the sampling circuit 107 includes a sampling resistor connected in series with the switch tube 106, and the control unit 300 is based on the system input voltage VIN and the electrical signal on the sampling resistor, Dynamically output PWM signals meeting the following conditions:
  • the period T of the PWM signal is a preset fixed value, where, due to the condition 2, the period T actually refers to the time interval between any two adjacent rising edges in the PWM signal;
  • V ref min is a preset value between 0.05V and V in min
  • V in (t) is the input voltage VIN of the system Real-time voltage value
  • V in min is the minimum value of the system input voltage VIN
  • T is the period of the PWM signal
  • R 107 is the resistance value of the sampling resistor.
  • the working principle of the peak current type buzzer driving circuit of the present invention is as follows:
  • the period T of the PWM signal is set to a fixed value through condition 1, and the real-time duty ratio D(t) of the PWM signal changes with the real-time voltage value V in (t) of the system input voltage VIN in reverse, that is, when The higher the real-time voltage value V in (t) of the system input voltage VIN, the lower the real-time duty cycle D(t) of the PWM signal, so that the duty cycle of the electromagnetic buzzer 109 is controlled by the switch 106 to decrease, thereby reducing The effective value of the current of the electromagnetic buzzer 109 under high system input voltage is greatly reduced, and the power consumption of the electromagnetic buzzer 109 is greatly reduced to ensure that the electromagnetic buzzer 109 can work normally at high input voltage without burning.
  • Bad
  • the present invention controls the real-time duty ratio D(t) of the PWM signal through the formula set by condition two. Under high system input voltage, it can ensure the electromagnetic bee by reducing the real-time duty ratio D(t).
  • the normal operation of the buzzer 109 can avoid the problem that the reduction of the real-time duty cycle D(t) is too large and the sound pressure of the electromagnetic buzzer 109 is too small under high system input voltage, which makes the electromagnetic buzzer
  • the sound pressure of 109 has a small change in a wide system input voltage range. It has been verified that the present invention can control the sound pressure deviation of the electromagnetic buzzer 109 within ⁇ 3db within a wide input range of 3-24VDC;
  • the present invention can be compatible with a wider system input voltage range, and can ensure low power consumption and good sound pressure consistency within a wide system input voltage range.
  • the second embodiment also adopts the following preferred implementation modes:
  • control unit 300 is also provided with a feedforward voltage generation module 200, a comparator module 102, a logic drive module 103, an oscillator 104, a power supply module 105 and a freewheeling module 108;
  • the positive electrode of the electromagnetic buzzer 109 is connected to the system input voltage VIN, the negative electrode is connected to the drain of the switch tube 106, and the source of the switch tube 106 is connected to the reference ground GND through the sampling resistor;
  • the power supply module 105 converts the system input voltage VIN into a bias voltage VDD for supplying power to the control unit 300; the power supply module 105 preferably adopts an LDO module.
  • the feedforward voltage generating module 200 outputs a real-time feedforward voltage V ref (t) satisfying the following formula 2:
  • the real-time feedforward voltage V ref (t) is input to the inverting input terminal of the comparator module 102, the real-time voltage V CS (t) is input to the non-inverting input terminal of the comparator module 102, and the comparator module
  • the logic level output by 102 is input to the R input terminal of the logic driving module 103; so that: when V CS (t) ⁇ V ref (t), the comparator module 102 outputs a low level to the R input terminal, when When V CS (t)>V ref (t), the comparator module 102 outputs a high level to the R input terminal; wherein, the comparator module 102 preferably uses a voltage comparator U2; the sampling circuit 107 can The non-inverting input terminal of the voltage comparator U2 is connected to the source of the switch tube 106 to input the real-time voltage V CS (t).
  • the oscillator 104 outputs a clock signal with a period of the period T to the S input terminal of the logic drive module 103;
  • the logic driving module 103 is configured to output the PWM signal to the gate of the switching tube 106, the PWM signal can drive the switching tube 106, and the logic of the logic driving module 103 for outputting the PWM signal satisfies: First, according to the clock signal input to the S input terminal, that is, according to the period T, the PWM signal is inverted from low level to high level, so as to meet the condition one, so that the switch tube 106 is The period is switched from off to on; secondly, when the logic level input to the R input is switched from low to high, the PWM signal is switched from high to low to meet the requirements The second condition enables the switch tube 106 to switch from on to off according to the cycle;
  • the freewheeling module 108 provides a freewheeling circuit for the electromagnetic buzzer 109 to release energy when the switch tube 106 is turned off; preferably: the freewheeling module 108 can adopt a freewheeling diode, which The cathode of the diode is connected to the anode of the electromagnetic buzzer 109, and the anode is connected to the cathode of the electromagnetic buzzer 109.
  • the clock signal output by the oscillator 104 is at the beginning of period T, the logic drive module 103 outputs a high level, and the control switch tube 106 is turned on.
  • the system input voltage VIN is higher, on the one hand: The faster the real-time current I PEAK (t) of the sampling resistor increases, the faster the real-time voltage V CS (t) input to the non-inverting input terminal of the comparator module 102 increases, so that the non-inverting input terminal of the comparator module 102 increases.
  • the shorter the time for the output of the PWM signal to switch from high to low the shorter the time for the switch 106 to transition from the on state to the off state, and thus, the lower the real-time duty cycle D(t) of the PWM signal, to
  • the duty cycle of the electromagnetic buzzer 109 is reduced through the switch tube 106, thereby reducing the effective current value of the electromagnetic buzzer 109 under high system input voltage, greatly reducing the power consumption of the electromagnetic buzzer 109 and ensuring
  • the electromagnetic buzzer 109 can also work normally at high input voltage without burning out.
  • the real-time feed-forward voltage V ref (t) output by the feed-forward voltage generating module 200 changes in phase with the system input voltage VIN, that is, the higher the system input voltage VIN, the higher the real-time feed forward voltage V ref (t).
  • the real-time feedforward voltage V ref (t) changes in the formula Within the limited range, this can precisely control the time when the voltage at the non-inverting input terminal of the comparator module 102 exceeds the voltage at the inverting input terminal, so as to obtain the corresponding real-time duty cycle D(t) under different high system input voltages.
  • the present invention can control the sound pressure deviation of the electromagnetic buzzer 109 within the wide input range of 3-24VDC. Within ⁇ 3db.
  • the second embodiment realizes the dynamic output of PWM signals satisfying condition 1 and condition 2; and the adopted control unit 300 and switch tube 106 can be implemented by integrated circuits without any peripheral devices, which can improve the consistency of the driving circuit. Greatly improve the pass rate in the production process.
  • the third embodiment also adopts the following preferred implementation modes:
  • the formula 2 is linearized, so that the real-time feedforward voltage V ref (t) output by the feedforward voltage generating module 200 satisfies the following formula 4:
  • V in max is the maximum value of the system input voltage VIN
  • the third embodiment is aimed at the existence of the above formula 1 and formula 2 Calculation, when the control unit 300 is implemented by an integrated circuit, there is a problem that it is difficult to debug the circuit parameters of the integrated circuit to fully satisfy the formula 1 and formula 2.
  • V ref (t) real-time feedforward voltage
  • D(t) real-time duty cycle
  • the fourth embodiment also adopts the following preferred implementation modes:
  • the feedforward voltage generation module 200 is composed of a feedforward compensation module 100 and a controlled voltage source module 101; the feedforward compensation module 100 outputs a feedforward variable signal that follows the in-phase change of the system input voltage VIN, and the controlled The voltage source module 101 converts the feedforward variable signal into the real-time feedforward voltage V ref (t) and outputs it.
  • the feedforward variable signal may be a signal of different forms such as a current signal, a voltage signal, and a frequency signal.
  • the fifth embodiment also adopts the following preferred implementation modes:
  • the feedforward compensation module 100 and the controlled voltage source module 101 are both voltage controlled voltage sources.
  • the circuit structure of the voltage-controlled voltage source is: the emitter of the transistor Q1 is connected to the bias voltage VDD, the base of the transistor Q1, the collector of the transistor Q1, The base of the transistor Q2 is connected, the collector of the transistor Q1 is connected to one end of the resistor R2, the other end of the resistor R2 and the collector of the transistor Q2 are both connected to the reference ground GND, and the collector of the transistor Q2
  • the emitter is connected to one end of the resistor R1, and the other end of the resistor R1 is used as the input terminal of the voltage-controlled voltage source;
  • the non-inverting input terminal of the operational amplifier U1 is connected to the emitter of the transistor Q2 through the resistor R3, and the operational amplifier U1
  • the inverting input terminal is divided into two channels, one is connected to the system input voltage VIN through a resistor R4, the other is connected to the output terminal of the operational amplifier U1 through a resistor R5, and the output terminal of the operational amplifier U1 serves as the voltage
  • the input terminal of the feedforward compensation module 100 is connected to the system input voltage VIN, the output terminal of the feedforward compensation module 100 is connected to the input terminal of the controlled voltage source module 101, and the controlled voltage source module 101 The output terminal of is used as the output terminal of the feedforward voltage generating module 200;
  • bias voltage VDD is the minimum value V in min of the system input voltage VIN.
  • the sixth embodiment also adopts the following preferred implementation modes:
  • the feedforward compensation module 100 is a voltage-controlled current source
  • the controlled voltage source module 101 is a current-controlled voltage source.
  • Example 6 The above is the basic implementation manner of Example 6, which can be further optimized, improved, and limited on the basis of this basic implementation manner:
  • the circuit structure of the voltage-controlled current source is: the emitter of the transistor Q3 is connected to the bias voltage VDD, the base of the transistor Q3, the collector of the transistor Q3, The base of the transistor Q4 is connected, the collector of the transistor Q3 is connected to one end of the resistor R5, the other end of the resistor R5 and the collector of the transistor Q4 are both connected to the reference ground GND, and the collector of the transistor Q4
  • the emitter is connected to the input terminal of the mirror current source 130, the power supply terminal of the mirror current source 130 is connected to the system input voltage VIN, and the output terminal of the mirror current source 130 serves as the output terminal of the voltage-controlled current source;
  • the circuit structure of the current-controlled voltage source is as follows: the power supply terminal of the reference current source IREF is connected to the bias voltage VDD, the output terminal of the reference current source IREF, the output terminal of the voltage-controlled current source, the resistor R6 One end is connected, the other end of the resistor R6 is connected to the reference ground GND, and the output end of the voltage-controlled current source is used as the output end of the feedforward voltage generating module 200;
  • bias voltage VDD is the minimum value V in min of the system input voltage VIN.
  • this embodiment 7 also adopts the following preferred implementation modes:
  • control unit 300 is further provided with a delay module 109, and the output terminal of the sampling circuit 107 is connected to the non-inverting input terminal of the comparator module 102 through the delay module 109 to utilize the delay module.
  • the timing module 109 adjusts the time when the voltage at the non-inverting input terminal of the comparator module 102 exceeds the voltage at the inverting input terminal, that is, adjusts the real-time duty cycle D(t) of the PWM signal.
  • this embodiment 8 also adopts the following preferred implementation modes:
  • control unit 300 is further provided with a trimming module 110, which is connected to the control terminal of the oscillator 104 and used to adjust the period of the clock signal output by the oscillator 104, To adjust the period of the PWM signal.
  • a trimming module 110 which is connected to the control terminal of the oscillator 104 and used to adjust the period of the clock signal output by the oscillator 104, To adjust the period of the PWM signal.
  • the present invention is not limited to the above-mentioned specific embodiments. Based on the above content, according to the common technical knowledge and common methods in the field, the present invention can also make other equivalent forms without departing from the above-mentioned basic technical idea of the present invention. Modifications, replacements or changes fall within the protection scope of the present invention.

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Abstract

一种峰值电流型蜂鸣器驱动电路，包括开关管(106)和控制单元(300)，开关管(106)在导通时接通电磁式蜂鸣器(109)与系统输入电压(VIN)，在关断时断开电磁式蜂鸣器(109)与系统输入电压(VIN)，控制单元(300)用于输出PWM信号，使得开关管(106)在PWM信号为高电平时导通，在PWM信号为低电平时关断；控制单元(300)设有采样电路(107)，采样电路(107)含有与开关管(106)串联的采样电阻，控制单元(300)依据系统输入电压(VIN)和采样电阻上的电信号，动态输出满足条件二的PWM信号，并通过条件一将PWM信号的周期T设置为固定值，通过条件二设置的公式一对PWM信号的实时占空比D(t)进行控制，在高系统输入电压下，既能通过缩小实时占空比D(t)来确保电磁式蜂鸣器的正常工作，又能避免实时占空比D(t)的缩小幅度过大造成电磁式蜂鸣器的声压在高系统输入电压下过小的问题，使得电磁式蜂鸣器的声压在宽系统输入电压范围内变化较小，经验证，所提供的驱动电路在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器的声压偏差控制在±3db以内；因此能够兼容较宽的系统输入电压范围，并能够在宽系统输入电压范围内，确保功耗低、声压一致性好。

Description

一种峰值电流型蜂鸣器驱动电路 技术领域
本发明涉及一种峰值电流型蜂鸣器驱动电路。
背景技术
传统的电磁蜂鸣器驱动电路一般采用三极管和变压器构成自激振荡电路，如图1所示。首先，在电路上电时，通过R1对Q1基极结电容进行充电，当基极结电容电压达到三极管开通阀值时，三极管Q1开通，VCC端电压源通过三极管Q1向蜂鸣器的激磁电感L1充电。并且在电感L1/L2同名端产生上正下负的感应电动势，在L2两端产生的电动势所形式的电流方向为同名端流出，促使开关管Q1处于饱和导通状态。当电感L1电流达到最大值时，磁通变化量为0，两端感生电动势消失，同时在L2电感上产生一个与上一阶段相反的电动势。在该电动势的作用下，三极管Q1关断，这样循环往复形成自激。这种传统的方案可以实现较宽的电压输入范围，缺点是成本高；由于其振荡频率由电感L1的时间常数决定，故设计灵活性差，声压一致性差；又因反馈绕组占用较大的铁芯窗口面积，故传统方案电磁蜂鸣器的声压均较小。另外这种传统的方案在应用于宽电压输入时的功耗大，见表1为某有源蜂鸣器实测数据所示，在12VDC电压输入时的输入功率约0.63W，容易引起过度发热，从而限制输入电压的宽度。
表1 传统自激振荡电路实测性能数据
输入电压(V) 3 4 5 6 7 8 9 10 11 12
输入电流(mA) 15.1 20.1 24.9 29.4 33.6 37.8 41.7 45.5 49.1 53.0
输入功率(mW) 45.3 80.4 125 176 235 302 375 455 540 636
声压(dB) 75.4 79.4 79.7 82.5 79.1 80.1 84.7 86.4 86.4 85.1
除上述采用自激震荡方式的蜂鸣器驱动电路，如图2所示，现有技术中还有采用IC驱动方式的蜂鸣器驱动电路，通过IC驱动蜂鸣器上串联的开关管TR1，IC输出固定50％左右占空比的驱动信号S1，固定频率来进行驱动，这样的驱动方法只能够满足输入电压范围很窄的应用，如果蜂鸣器的标称电压是3V，那么它最大就只能工作在1.5V-5V的范围，否则声压级变化会很大，而且功耗随着输入电压的升高成平方关系增加，因为蜂鸣器的损耗基本上都在它自己的线圈上面，线圈上流过的电流有效值越大，损耗越大。
现有技术中，为了解决上述采用IC驱动方式的蜂鸣器驱动电路所存在的问题，一般的解决思路是：在蜂鸣器的输入电压VIN越高的情况下，采用占空比越小的PWM信号驱动开关管TR1，以降低蜂鸣器在高输入电压时的声压和功耗。但是这种解决思路存在的问题是：如果占空比过小，会令蜂鸣器的声压降幅过大，造成在宽输入电压下，蜂鸣器的声压变化同样过大。
发明内容
本发明所要解决的技术问题是：提供一种峰值电流型蜂鸣器驱动电路，以解决现有蜂鸣器驱动电路因在高输入电压下成本高、功耗大、声压一致性差，而造成适用的输入电压范围窄的问题。
解决上述技术问题，本发明所采用的技术方案如下：
一种峰值电流型蜂鸣器驱动电路，包括开关管和控制单元，所述开关管在导通时接通电磁式蜂鸣器与系统输入电压，在关断时断开所述电磁式蜂鸣器与系统输入电压，所述控制单元用于输出PWM信号，使得：所述开关管在所述PWM信号为高电平时导通，在所述PWM信号为低电平时关断；
其特征在于：
所述的控制单元设有采样电路，该采样电路含有与所述开关管串联的采样电阻，所述控制单元依据所述系统输入电压和所述采样电阻上的电信号，动态输出满足以下条件的PWM信号：
条件一、所述PWM信号的周期T为预设的固定值；
条件二、所述PWM信号的实时占空比D(t)按以下公式一变化：
Figure PCTCN2020092459-appb-000001
式中，L为所述电磁式蜂鸣器的电感量，V ref min为取值在0.05V至V in min之间的预设值，V in(t)为所述系统输入电压的实时电压值，V in min为所述系统输入电压的最小值，T为所述PWM信号的周期，R 107为所述采样电阻的阻值。
本发明的峰值电流型蜂鸣器驱动电路的工作原理如下：
本发明通过条件一将PWM信号的周期T设置为固定值，并使PWM信号的实 时占空比D(t)随系统输入电压的实时电压值V in(t)反相变化，也即当系统输入电压的实时电压值V in(t)越高，PWM信号的实时占空比D(t)越低，以通过开关管控制电磁式蜂鸣器的占空比降低，从而降低了电磁式蜂鸣器在高系统输入电压下的电流有效值，大幅缩减电磁式蜂鸣器的功耗，确保电磁式蜂鸣器在高输入电压时也能够正常工作而不会烧坏；
并且，本发明通过条件二设置的公式一对PWM信号的实时占空比D(t)进行控制，在高系统输入电压下，既能通过缩小实时占空比D(t)来确保电磁式蜂鸣器的正常工作，又能避免实时占空比D(t)的缩小幅度过大造成电磁式蜂鸣器的声压在高系统输入电压下过小的问题，使得电磁式蜂鸣器的声压在宽系统输入电压范围内变化较小，经验证，本发明在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器的声压偏差控制在±3db以内；
因此，本发明能够兼容较宽的系统输入电压范围，并能够在宽系统输入电压范围内，确保功耗低、声压一致性好。
作为本发明的优选实施方式：所述的控制单元还设有前馈电压产生模块、比较器模块、逻辑驱动模块、振荡器、电源模块和续流模块；
所述电磁式蜂鸣器的正极接入所述系统输入电压，负极连接所述开关管的漏极，所述开关管的源极通过所述采样电阻连接参考地端；
所述电源模块将所述系统输入电压转换为用于为所述控制单元供电的偏置电压VDD；
所述前馈电压产生模块输出满足以下公式二的实时前馈电压V ref(t)：
Figure PCTCN2020092459-appb-000002
所述采样电路输出所述采样电阻的实时电压V CS(t)；
所述实时前馈电压V ref(t)输入所述比较器模块的反相输入端，所述实时电压V CS(t)输入所述比较器模块的同相输入端，所述比较器模块输出的逻辑电平输入所述逻辑驱动模块的R输入端；使得：当V CS(t)＜V ref(t)时，所述比较器模 块向R输入端输出低电平，当V CS(t)＞V ref(t)时，所述比较器模块向R输入端输出高电平；
所述振荡器向所述逻辑驱动模块的S输入端输出周期为所述周期T的时钟信号；
所述逻辑驱动模块用于向所述开关管的栅极输出所述PWM信号，该PWM信号能够驱动所述开关管，且所述逻辑驱动模块输出所述PWM信号的逻辑满足：其一，按照输入所述S输入端的时钟信号，也即按照所述周期T，所述PWM信号由低电平翻转为高电平，以满足所述条件一，使得所述开关管按照所述周期由关断切换为导通；其二，当输入所述R输入端的逻辑电平由低电平翻转为高电平时，所述PWM信号由高电平翻转为低电平，以满足所述条件二，使得所述开关管按照所述周期由导通切换为关断；
所述续流模块为所述电磁式蜂鸣器提供用于在所述开关管关断时释放能量的续流回路。
本实施例二的工作原理如下：
初始时刻，振荡器输出的时钟信号处于周期T的开始时刻，逻辑驱动模块输出高电平，控制开关管导通，此时，如果系统输入电压越高，一方面使得：通过所述采样电阻的实时电流I PEAK(t)升高的越快，令输入比较器模块的同相输入端的实时电压V CS(t)升高的越快，从而，比较器模块的同相输入端电压超过反相输入端电压的时间越短，也即比较器模块向逻辑驱动模块的R输入端输出的逻辑电平由低电平翻转为高电平的时间越短，逻辑驱动模块的输出由高电平翻转为低电平的时间越短，开关管由导通状态转变为关断状态的时间越短，从而，PWM信号的实时占空比D(t)越低，以通过开关管控制电磁式蜂鸣器的占空比降低，从而降低了电磁式蜂鸣器在高系统输入电压下的电流有效值，大幅缩减电磁式蜂鸣器的功耗，确保电磁式蜂鸣器在高输入电压时也能够正常工作而不会烧坏。
另一方面使得：前馈电压产生模块输出的实时前馈电压V ref(t)跟随系统输入电压同相变化，即系统输入电压越高，实时前馈电压V ref(t)越高，相较于比 较器模块的反相输入端电压不变的情况，这延缓了比较器模块的同相输入端电压超过反相输入端电压的时间，避免PWM信号的实时占空比D(t)过低造成电磁式蜂鸣器的声压在高系统输入电压下过小的问题，同时，由于受前馈电压产生模块控制，实时前馈电压V ref(t)变化的幅度在公式二所限定的范围之内，这能够精确控制比较器模块的同相输入端电压超过反相输入端电压的时间，以在不同的高系统输入电压下获得相应的实时占空比D(t)，确保电磁式蜂鸣器的声压在宽系统输入电压范围内变化较小，经验证，本发明在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器的声压偏差控制在±3db以内。
在振荡器输出的时钟信号达到周期T的结束时刻，逻辑驱动模块的输出由低电平再次翻转为高电平，使得上述过程循环进行。
从而，本实施例二实现了动态输出满足条件一和条件二的PWM信号；并且，采用的控制单元和开关管能够采用集成电路实现，无需任何外围器件，能够提高驱动电路的一致性，大大提升生产制程中的合格率。
本发明还公开采用线性化方式实现的方案，具体如下：
一种峰值电流型蜂鸣器驱动电路，包括开关管和控制单元，所述开关管在导通时接通电磁式蜂鸣器与系统输入电压，在关断时断开所述电磁式蜂鸣器与系统输入电压，所述控制单元用于输出PWM信号，使得：所述开关管在所述PWM信号为高电平时导通，在所述PWM信号为低电平时关断；
其特征在于：
所述的控制单元设有采样电路，该采样电路含有与所述开关管串联的采样电阻，所述控制单元依据所述系统输入电压和所述采样电阻上的电信号，动态输出满足以下条件的PWM信号：
条件一、所述PWM信号的周期T为预设的固定值；
条件二、所述PWM信号的实时占空比D(t)按以下公式三变化：
Figure PCTCN2020092459-appb-000003
式中，L为所述电磁式蜂鸣器的电感量，V ref min为取值在0.05V至V in min之间的预设值，V in(t)为所述系统输入电压的实时电压值，V in min为所述系统输入电压的最小值，V in max为所述系统输入电压(VIN)的最大值，T为所述PWM信号的周期，R 107为所述采样电阻的阻值。
本采用线性化方式实现的方案与上述采用公式一的峰值电流型蜂鸣器驱动电路的工作原理相同，区别在于：针对由于上述公式一中存在
Figure PCTCN2020092459-appb-000004
运算，造成在控制单元采用集成电路实现的情况下，存在难以将集成电路的电路参数调试至完全满足公式一的问题，通过将实时占空比D(t)改为满足线性化的公式三，能够大大降低采用集成电路实现的控制单元的电路参数调试难度，并能确保控制单元完全满足公式三，以降低本发明峰值电流型蜂鸣器驱动电路的开发成本。
作为本发明的优选实施方式：所述的控制单元还设有前馈电压产生模块、比较器模块、逻辑驱动模块、振荡器、电源模块和续流模块；
所述电磁式蜂鸣器的正极接入所述系统输入电压，负极连接所述开关管的漏极，所述开关管的源极通过所述采样电阻连接参考地端；
所述电源模块将所述系统输入电压转换为用于为所述控制单元供电的偏置电压VDD；
所述前馈电压产生模块输出满足以下公式四的实时前馈电压V ref(t)：
V ref(t)＝K CV in(t)+V ref min            [公式四]；
所述采样电路输出所述采样电阻的实时电压V CS(t)；
所述实时前馈电压V ref(t)输入所述比较器模块的反相输入端，所述实时电压V CS(t)输入所述比较器模块的同相输入端，所述比较器模块输出的逻辑电平输入所述逻辑驱动模块的R输入端；使得：当V CS(t)＜V ref(t)时，所述比较器模块向R输入端输出低电平，当V CS(t)＞V ref(t)时，所述比较器模块向R输入端输出高电平；
所述振荡器向所述逻辑驱动模块的S输入端输出周期为所述周期T的时钟 信号；
所述逻辑驱动模块用于向所述开关管的栅极输出所述PWM信号，该PWM信号能够驱动所述开关管，且所述逻辑驱动模块输出所述PWM信号的逻辑满足：其一，按照输入所述S输入端的时钟信号，也即按照所述周期T，所述PWM信号由低电平翻转为高电平，以满足所述条件一，使得所述开关管按照所述周期由关断切换为导通；其二，当输入所述R输入端的逻辑电平由低电平翻转为高电平时，所述PWM信号由高电平翻转为低电平，以满足所述条件二，使得所述开关管按照所述周期由导通切换为关断；
所述续流模块为所述电磁式蜂鸣器提供用于在所述开关管关断时释放能量的续流回路。
本采用线性化方式实现的方案与上述采用公式二的峰值电流型蜂鸣器驱动电路的工作原理相同，区别在于：针对由于上述公式二中存在
Figure PCTCN2020092459-appb-000005
运算，造成在控制单元采用集成电路实现的情况下，存在难以将集成电路的电路参数调试至完全满足公式二的问题，通过将实时前馈电压V ref(t)改为满足线性化的公式四，能够大大降低采用集成电路实现的控制单元的电路参数调试难度，并能确保控制单元完全满足公式三和公式四，以降低本发明峰值电流型蜂鸣器驱动电路的开发成本。
对于上述两种峰值电流型蜂鸣器驱动电路，均可采用以下优选实施方式：
作为本发明的优选实施方式：所述前馈电压产生模块由前馈补偿模块和受控电压源模块组成；所述前馈补偿模块输出跟随所述系统输入电压同相变化的前馈变量信号，所述受控电压源模块将该前馈变量信号转换为所述实时前馈电压V ref(t)输出。其中，所述前馈变量信号可以是电流信号、电压信号、频率信号等不同形式的信号。
作为本发明的优选实施方式：所述前馈补偿模块和受控电压源模块均为压控电压源。
优选的：所述压控电压源的电路结构为：三极管Q1的发射极接入所述偏置电压VDD，所述三极管Q1的基极、所述三极管Q1的集电极、三极管Q2的基极相连接，所述三极管Q1的集电极连接电阻R2的一端，所述电阻R2的另一端和 所述三极管Q2的集电极均连接所述参考地端，所述三极管Q2的发射极连接电阻R1的一端，所述电阻R1的另一端作为所述压控电压源的输入端；运算放大器U1的同相输入端通过电阻R3连接所述三极管Q2的发射极，所述运算放大器U1的反相输入端分为两路，一路通过电阻R4接入所述系统输入电压，另一路通过电阻R5连接所述运算放大器U1的输出端，所述运算放大器U1的输出端作为所述压控电压源的输出端；
所述前馈补偿模块的输入端接入所述系统输入电压，所述前馈补偿模块的输出端连接所述受控电压源模块的输入端，所述受控电压源模块的输出端作为所述前馈电压产生模块的输出端；
并且，所述偏置电压VDD为所述系统输入电压的最小值V in min。
作为本发明的优选实施方式：所述前馈补偿模块为压控电流源，所述受控电压源模块为流控电压源。
优选的：所述压控电流源的电路结构为：三极管Q3的发射极接入所述偏置电压VDD，所述三极管Q3的基极、所述三极管Q3的集电极、三极管Q4的基极相连接，所述三极管Q3的集电极连接电阻R5的一端，所述电阻R5的另一端和所述三极管Q4的集电极均连接所述参考地端，所述三极管Q4的发射极连接镜像电流源的输入端，所述镜像电流源的供电端接入所述系统输入电压，所述镜像电流源的输出端作为所述压控电流源的输出端；
所述流控电压源的电路结构为：基准电流源的供电端接入所述偏置电压VDD，所述基准电流源的输出端、所述压控电流源的输出端、电阻R6的一端相连接，所述电阻R6的另一端连接所述参考地端，所述压控电流源的输出端作为所述前馈电压产生模块的输出端；
并且，所述偏置电压VDD为所述系统输入电压的最小值V in min。
作为本发明的优选实施方式：所述的控制单元还设有延时模块，所述采样电路的输出端通过所述延时模块连接所述比较器模块的同相输入端，以利用延时模块调节比较器模块的同相输入端电压超过反相输入端电压的时间，也即调节PWM信号的实时占空比D(t)。
作为本发明的优选实施方式：所述的控制单元还设有修调模块，该修调模 块连接所述振荡器的控制端，用于调节所述振荡器所输出时钟信号的周期，以调节所述PWM信号的周期。
与现有技术相比，本发明具有以下有益效果：
第一，本发明通过条件一将PWM信号的周期T设置为固定值，并使PWM信号的实时占空比D(t)随系统输入电压的实时电压值V in(t)反相变化，也即当系统输入电压的实时电压值V in(t)越高，PWM信号的实时占空比D(t)越低，以通过开关管控制电磁式蜂鸣器的占空比降低，从而降低了电磁式蜂鸣器在高系统输入电压下的电流有效值，大幅缩减电磁式蜂鸣器的功耗，确保电磁式蜂鸣器在高输入电压时也能够正常工作而不会烧坏；
并且，本发明通过条件二设置的公式一对PWM信号的实时占空比D(t)进行控制，在高系统输入电压下，既能通过缩小实时占空比D(t)来确保电磁式蜂鸣器的正常工作，又能避免实时占空比D(t)的缩小幅度过大造成电磁式蜂鸣器的声压在高系统输入电压下过小的问题，使得电磁式蜂鸣器的声压在宽系统输入电压范围内变化较小，经验证，本发明在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器的声压偏差控制在±3db以内；
因此，本发明能够兼容较宽的系统输入电压范围，并能够在宽系统输入电压范围内，确保功耗低、声压一致性好。
第二，本发明采用前馈电压产生模块、比较器模块、逻辑驱动模块、振荡器、电源模块、采样电路和续流模块组成控制单元，实现了动态输出满足条件一和条件二的PWM信号；并且，该控制单元和开关管易于采用集成电路实现产品化，无需任何外围器件，能够提高驱动电路的一致性，大大提升生产制程中的合格率。
第三，本发明针对由于上述公式一和公式二中存在
Figure PCTCN2020092459-appb-000006
运算，造成在控制单元采用集成电路实现的情况下，存在难以将集成电路的电路参数调试至完全满足公式一和公式二的问题，通过将实时占空比D(t)和实时前馈电压V ref(t)改为满足线性化的公式三和公式四，能够大大降低采用集成电路实现的控制单元的电路参数调试难度，并能确保控制单元完全满足公式三和公式四，以降低本发 明峰值电流型蜂鸣器驱动电路的开发成本。
第四，本发明的峰值电流型蜂鸣器驱动电路具有实施成本低的优点。
附图说明
下面结合附图和具体实施例对本发明作进一步的详细说明：
图1为现有技术中采用自激震荡方式的蜂鸣器驱动电路；
图2为现有技术中采用IC驱动方式的蜂鸣器驱动电路；
图3为本发明实施例二的峰值电流型蜂鸣器驱动电路的电路原理框图；
图4为本发明实施例五的峰值电流型蜂鸣器驱动电路的电路原理框图；
图5为本发明实施例五中前馈补偿模块100、受控电压源模块101和比较器模块102的电路原理图；
图6为本发明实施例六的峰值电流型蜂鸣器驱动电路的电路原理框图；
图7为本发明实施例六中前馈补偿模块100、受控电压源模块101和比较器模块102的电路原理图；
图8为本发明实施例七、八的峰值电流型蜂鸣器驱动电路的电路原理框图。
具体实施方式
下面结合实施例及其附图对本发明进行详细说明，以帮助本领域的技术人员更好的理解本发明的发明构思，但本发明权利要求的保护范围不限于下述实施例，对本领域的技术人员来说，在不脱离本发明之发明构思的前提下，没有做出创造性劳动所获得的所有其他实施例，都属于本发明的保护范围。
实施例一
如图3至图8所示，本发明公开的是一种峰值电流型蜂鸣器驱动电路，包括开关管106和控制单元300，所述开关管106在导通时接通电磁式蜂鸣器109与系统输入电压VIN，在关断时断开所述电磁式蜂鸣器109与系统输入电压VIN，所述控制单元300用于输出PWM信号，使得：所述开关管106在所述PWM信号为高电平时导通，在所述PWM信号为低电平时关断；
所述的控制单元300设有采样电路107，该采样电路107含有与所述开关管106串联的采样电阻，所述控制单元300依据所述系统输入电压VIN和所述采样电阻上的电信号，动态输出满足以下条件的PWM信号：
条件一、所述PWM信号的周期T为预设的固定值，其中，由于条件二，所述周期T实际是指PWM信号中任意相邻两个上升沿之间的时间间隔；
条件二、所述PWM信号的实时占空比D(t)按以下公式一变化：
Figure PCTCN2020092459-appb-000007
式中，L为所述电磁式蜂鸣器109的电感量，V ref min为取值在0.05V至V in min之间的预设值，V in(t)为所述系统输入电压VIN的实时电压值，V in min为所述系统输入电压VIN的最小值，T为所述PWM信号的周期，R 107为所述采样电阻的阻值。
本发明的峰值电流型蜂鸣器驱动电路的工作原理如下：
本发明通过条件一将PWM信号的周期T设置为固定值，并使PWM信号的实时占空比D(t)随系统输入电压VIN的实时电压值V in(t)反相变化，也即当系统输入电压VIN的实时电压值V in(t)越高，PWM信号的实时占空比D(t)越低，以通过开关管106控制电磁式蜂鸣器109的占空比降低，从而降低了电磁式蜂鸣器109在高系统输入电压下的电流有效值，大幅缩减电磁式蜂鸣器109的功耗，确保电磁式蜂鸣器109在高输入电压时也能够正常工作而不会烧坏；
并且，本发明通过条件二设置的公式一对PWM信号的实时占空比D(t)进行控制，在高系统输入电压下，既能通过缩小实时占空比D(t)来确保电磁式蜂鸣器109的正常工作，又能避免实时占空比D(t)的缩小幅度过大造成电磁式蜂鸣器109的声压在高系统输入电压下过小的问题，使得电磁式蜂鸣器109的声压在宽系统输入电压范围内变化较小，经验证，本发明在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器109的声压偏差控制在±3db以内；
因此，本发明能够兼容较宽的系统输入电压范围，并能够在宽系统输入电压范围内，确保功耗低、声压一致性好。
实施例二
在上述实施例一的基础上，本实施例二还采用了以下优选的实施方式：
如图3所示，所述的控制单元300还设有前馈电压产生模块200、比较器 模块102、逻辑驱动模块103、振荡器104、电源模块105和续流模块108；
所述电磁式蜂鸣器109的正极接入所述系统输入电压VIN，负极连接所述开关管106的漏极，所述开关管106的源极通过所述采样电阻连接参考地端GND；
所述电源模块105将所述系统输入电压VIN转换为用于为所述控制单元300供电的偏置电压VDD；该电源模块105优选采用LDO模块。
所述前馈电压产生模块200输出满足以下公式二的实时前馈电压V ref(t)：
Figure PCTCN2020092459-appb-000008
所述采样电路107输出所述采样电阻的实时电压V CS(t)，也即：V CS(t)＝I PEAK(t)*R107，I PEAK(t)为通过所述采样电阻的实时电流，R107为所述采样电阻的阻值；
所述实时前馈电压V ref(t)输入所述比较器模块102的反相输入端，所述实时电压V CS(t)输入所述比较器模块102的同相输入端，所述比较器模块102输出的逻辑电平输入所述逻辑驱动模块103的R输入端；使得：当V CS(t)＜V ref(t)时，所述比较器模块102向R输入端输出低电平，当V CS(t)＞V ref(t)时，所述比较器模块102向R输入端输出高电平；其中，所述比较器模块102优选采用电压比较器U2；所述采样电路107可以将所述电压比较器U2的同相输入端与所述开关管106的源极相连，以输入所述实时电压V CS(t)。
所述振荡器104向所述逻辑驱动模块103的S输入端输出周期为所述周期T的时钟信号；
所述逻辑驱动模块103用于向所述开关管106的栅极输出所述PWM信号，该PWM信号能够驱动所述开关管106，且所述逻辑驱动模块103输出所述PWM信号的逻辑满足：其一，按照输入所述S输入端的时钟信号，也即按照所述周期T，所述PWM信号由低电平翻转为高电平，以满足所述条件一，使得所述开关管106按照所述周期由关断切换为导通；其二，当输入所述R输入端的逻辑电平由低电平翻转为高电平时，所述PWM信号由高电平翻转为低电平，以满足所述条件二，使得所述开关管106按照所述周期由导通切换为关断；
所述续流模块108为所述电磁式蜂鸣器109提供用于在所述开关管106关断时释放能量的续流回路；优选的：续流模块108可以采用续流二极管，该续流二极管的阴极连接所述电磁式蜂鸣器109的正极，阳极连接所述电磁式蜂鸣器109的负极。
本实施例二的工作原理如下：
初始时刻，振荡器104输出的时钟信号处于周期T的开始时刻，逻辑驱动模块103输出高电平，控制开关管106导通，此时，如果系统输入电压VIN越高，一方面使得：通过所述采样电阻的实时电流I PEAK(t)升高的越快，令输入比较器模块102的同相输入端的实时电压V CS(t)升高的越快，从而，比较器模块102的同相输入端电压超过反相输入端电压的时间越短，也即比较器模块102向逻辑驱动模块103的R输入端输出的逻辑电平由低电平翻转为高电平的时间越短，逻辑驱动模块103的输出由高电平翻转为低电平的时间越短，开关管106由导通状态转变为关断状态的时间越短，从而，PWM信号的实时占空比D(t)越低，以通过开关管106控制电磁式蜂鸣器109的占空比降低，从而降低了电磁式蜂鸣器109在高系统输入电压下的电流有效值，大幅缩减电磁式蜂鸣器109的功耗，确保电磁式蜂鸣器109在高输入电压时也能够正常工作而不会烧坏。
另一方面使得：前馈电压产生模块200输出的实时前馈电压V ref(t)跟随系统输入电压VIN同相变化，即系统输入电压VIN越高，实时前馈电压V ref(t)越高，相较于比较器模块102的反相输入端电压不变的情况，这延缓了比较器模块102的同相输入端电压超过反相输入端电压的时间，避免PWM信号的实时占空比D(t)过低造成电磁式蜂鸣器109的声压在高系统输入电压下过小的问题，同时，由于受前馈电压产生模块200控制，实时前馈电压V ref(t)变化的幅度在公式二所限定的范围之内，这能够精确控制比较器模块102的同相输入端电压超过反相输入端电压的时间，以在不同的高系统输入电压下获得相应的实时占空比D(t)，确保电磁式蜂鸣器109的声压在宽系统输入电压范围内变化较小，经验证，本发明在3-24VDC的宽输入范围内，能够将电磁式蜂鸣器109的声压偏差控制在±3db以内。
在振荡器104输出的时钟信号达到周期T的结束时刻，逻辑驱动模块103的输出由低电平再次翻转为高电平，使得上述过程循环进行。
从而，本实施例二实现了动态输出满足条件一和条件二的PWM信号；并且，采用的控制单元300和开关管106能够采用集成电路实现，无需任何外围器件，能够提高驱动电路的一致性，大大提升生产制程中的合格率。
实施例三
在上述实施例二的基础上，本实施例三还采用了以下优选的实施方式：
对所述公式二进行线性化，使得：所述前馈电压产生模块200输出的实时前馈电压V ref(t)满足以下公式四：
Figure PCTCN2020092459-appb-000009
式中，V in max为所述系统输入电压VIN的最大值；
使得：所述PWM信号的实时占空比D(t)按以下公式三变化：
Figure PCTCN2020092459-appb-000010
从而，本实施例三针对由于上述公式一和公式二中存在
Figure PCTCN2020092459-appb-000011
运算，造成在控制单元300采用集成电路实现的情况下，存在难以将集成电路的电路参数调试至完全满足公式一和公式二的问题，通过将实时前馈电压V ref(t)和实时占空比D(t)改为满足线性化的公式四和公式三，能够大大降低采用集成电路实现的控制单元300的电路参数调试难度，并能确保控制单元300完全满足公式三和公式四，以降低本发明峰值电流型蜂鸣器驱动电路的开发成本。
实施例四
在上述实施例二或实施例三的基础上，本实施例四还采用了以下优选的实施方式：
所述前馈电压产生模块200由前馈补偿模块100和受控电压源模块101组 成；所述前馈补偿模块100输出跟随所述系统输入电压VIN同相变化的前馈变量信号，所述受控电压源模块101将该前馈变量信号转换为所述实时前馈电压V ref(t)输出。其中，所述前馈变量信号可以是电流信号、电压信号、频率信号等不同形式的信号。
实施例五
在上述实施例四的基础上，本实施例五还采用了以下优选的实施方式：
如图4所示，所述前馈补偿模块100和受控电压源模块101均为压控电压源。
以上为本实施例五的基本实施方式，可以在该基本实施方式的基础上做进一步的优化、改进和限定：
优选的：如图5所示，所述压控电压源的电路结构为：三极管Q1的发射极接入所述偏置电压VDD，所述三极管Q1的基极、所述三极管Q1的集电极、三极管Q2的基极相连接，所述三极管Q1的集电极连接电阻R2的一端，所述电阻R2的另一端和所述三极管Q2的集电极均连接所述参考地端GND，所述三极管Q2的发射极连接电阻R1的一端，所述电阻R1的另一端作为所述压控电压源的输入端；运算放大器U1的同相输入端通过电阻R3连接所述三极管Q2的发射极，所述运算放大器U1的反相输入端分为两路，一路通过电阻R4接入所述系统输入电压VIN，另一路通过电阻R5连接所述运算放大器U1的输出端，所述运算放大器U1的输出端作为所述压控电压源的输出端；
所述前馈补偿模块100的输入端接入所述系统输入电压VIN，所述前馈补偿模块100的输出端连接所述受控电压源模块101的输入端，所述受控电压源模块101的输出端作为所述前馈电压产生模块200的输出端；
并且，所述偏置电压VDD为所述系统输入电压VIN的最小值V in min。
经过对本实施例五的峰值电流型蜂鸣器驱动电路进行实测，其性能如下表2所示。
表2
VinV 3 6 9 12 15 18 21 24
I AV(mA) 5.44 2.43 1.95 1.81 1.78 1.80 1.84 1.89
声压(db) 95.2 92.0 92.7 93.6 94.4 95.1 96.5 96.6
P INmW 16.3 14.6 17.6 21.7 26.7 32.4 38.6 45.4
从上述表2中的数据可知，在3V～24V的宽系统输入电压范内，电磁式蜂鸣器109均保持较为稳定的声压，且相对保持较低的功耗。
实施例六
在上述实施例四的基础上，本实施例六还采用了以下优选的实施方式：
如图6所示，所述前馈补偿模块100为压控电流源，所述受控电压源模块101为流控电压源。
以上为本实施例六的基本实施方式，可以在该基本实施方式的基础上做进一步的优化、改进和限定：
优选的：如图7所示，所述压控电流源的电路结构为：三极管Q3的发射极接入所述偏置电压VDD，所述三极管Q3的基极、所述三极管Q3的集电极、三极管Q4的基极相连接，所述三极管Q3的集电极连接电阻R5的一端，所述电阻R5的另一端和所述三极管Q4的集电极均连接所述参考地端GND，所述三极管Q4的发射极连接镜像电流源130的输入端，所述镜像电流源130的供电端接入所述系统输入电压VIN，所述镜像电流源130的输出端作为所述压控电流源的输出端；
所述流控电压源的电路结构为：基准电流源IREF的供电端接入所述偏置电压VDD，所述基准电流源IREF的输出端、所述压控电流源的输出端、电阻R6的一端相连接，所述电阻R6的另一端连接所述参考地端GND，所述压控电流源的输出端作为所述前馈电压产生模块200的输出端；
并且，所述偏置电压VDD为所述系统输入电压VIN的最小值V in min。
实施例七
在上述实施例一至实施例六中任意一个实施例的基础上，本实施例七还采用了以下优选的实施方式：
如图8所示，所述的控制单元300还设有延时模块109，所述采样电路107的输出端通过所述延时模块109连接所述比较器模块102的同相输入端，以利用延时模块109调节比较器模块102的同相输入端电压超过反相输入端电压的 时间，也即调节PWM信号的实时占空比D(t)。
实施例八
在上述实施例一至实施例七中任意一个实施例的基础上，本实施例八还采用了以下优选的实施方式：
如图8所示，所述的控制单元300还设有修调模块110，该修调模块110连接所述振荡器104的控制端，用于调节所述振荡器104所输出时钟信号的周期，以调节所述PWM信号的周期。
本发明不局限于上述具体实施方式，根据上述内容，按照本领域的普通技术知识和惯用手段，在不脱离本发明上述基本技术思想前提下，本发明还可以做出其它多种形式的等效修改、替换或变更，均落在本发明的保护范围之中。

Claims (18)

  1. 一种峰值电流型蜂鸣器驱动电路，包括开关管(106)和控制单元(300)，所述开关管(106)在导通时接通电磁式蜂鸣器(109)与系统输入电压(VIN)，在关断时断开所述电磁式蜂鸣器(109)与系统输入电压(VIN)，所述控制单元(300)用于输出PWM信号，使得：所述开关管(106)在所述PWM信号为高电平时导通，在所述PWM信号为低电平时关断；
    其特征在于：
    所述的控制单元(300)设有采样电路(107)，该采样电路(107)含有与所述开关管(106)串联的采样电阻，所述控制单元(300)依据所述系统输入电压(VIN)和所述采样电阻上的电信号，动态输出满足以下条件的PWM信号：
    条件一、所述PWM信号的周期T为预设的固定值；
    条件二、所述PWM信号的实时占空比D(t)按以下公式一变化：
    Figure PCTCN2020092459-appb-100001
    式中，L为所述电磁式蜂鸣器(109)的电感量，V ref min为取值在0.05V至V in min之间的预设值，V in(t)为所述系统输入电压(VIN)的实时电压值，V in min为所述系统输入电压(VIN)的最小值，T为所述PWM信号的周期，R 107为所述采样电阻的阻值。
  2. 根据权利要求1所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有前馈电压产生模块(200)、比较器模块(102)、逻辑驱动模块(103)、振荡器(104)、电源模块(105)和续流模块(108)；
    所述电磁式蜂鸣器(109)的正极接入所述系统输入电压(VIN)，负极连接所述开关管(106)的漏极，所述开关管(106)的源极通过所述采样电阻连接参考地端(GND)；
    所述电源模块(105)将所述系统输入电压(VIN)转换为用于为所述控制单元(300)供电的偏置电压VDD；
    所述前馈电压产生模块(200)输出满足以下公式二的实时前馈电压V ref(t)：
    Figure PCTCN2020092459-appb-100002
    所述采样电路(107)输出所述采样电阻的实时电压V CS(t)；
    所述实时前馈电压V ref(t)输入所述比较器模块(102)的反相输入端，所述实时电压V CS(t)输入所述比较器模块(102)的同相输入端，所述比较器模块(102)输出的逻辑电平输入所述逻辑驱动模块(103)的R输入端；使得：当V CS(t)＜V ref(t)时，所述比较器模块(102)向R输入端输出低电平，当V CS(t)＞V ref(t)时，所述比较器模块(102)向R输入端输出高电平；
    所述振荡器(104)向所述逻辑驱动模块(103)的S输入端输出周期为所述周期T的时钟信号；
    所述逻辑驱动模块(103)用于向所述开关管(106)的栅极输出所述PWM信号，该PWM信号能够驱动所述开关管(106)，且所述逻辑驱动模块(103)输出所述PWM信号的逻辑满足：其一，按照输入所述S输入端的时钟信号，也即按照所述周期T，所述PWM信号由低电平翻转为高电平；其二，当输入所述R输入端的逻辑电平由低电平翻转为高电平时，所述PWM信号由高电平翻转为低电平；
    所述续流模块(108)为所述电磁式蜂鸣器(109)提供用于在所述开关管(106)关断时释放能量的续流回路。
  3. 根据权利要求2所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈电压产生模块(200)由前馈补偿模块(100)和受控电压源模块(101)组成；所述前馈补偿模块(100)输出跟随所述系统输入电压(VIN)同相变化的前馈变量信号，所述受控电压源模块(101)将该前馈变量信号转换为所述实时前馈电压V ref(t)输出。
  4. 根据权利要求3所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈补偿模块(100)和受控电压源模块(101)均为压控电压源。
  5. 根据权利要求4所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述压控电压源的电路结构为：三极管Q1的发射极接入所述偏置电压VDD，所述三 极管Q1的基极、所述三极管Q1的集电极、三极管Q2的基极相连接，所述三极管Q1的集电极连接电阻R2的一端，所述电阻R2的另一端和所述三极管Q2的集电极均连接所述参考地端(GND)，所述三极管Q2的发射极连接电阻R1的一端，所述电阻R1的另一端作为所述压控电压源的输入端；运算放大器U1的同相输入端通过电阻R3连接所述三极管Q2的发射极，所述运算放大器U1的反相输入端分为两路，一路通过电阻R4接入所述系统输入电压(VIN)，另一路通过电阻R5连接所述运算放大器U1的输出端，所述运算放大器U1的输出端作为所述压控电压源的输出端；
    所述前馈补偿模块(100)的输入端接入所述系统输入电压(VIN)，所述前馈补偿模块(100)的输出端连接所述受控电压源模块(101)的输入端，所述受控电压源模块(101)的输出端作为所述前馈电压产生模块(200)的输出端；
    并且，所述偏置电压VDD为所述系统输入电压(VIN)的最小值V in min。
  6. 根据权利要求3所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈补偿模块(100)为压控电流源，所述受控电压源模块(101)为流控电压源。
  7. 根据权利要求6所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述压控电流源的电路结构为：三极管Q3的发射极接入所述偏置电压VDD，所述三极管Q3的基极、所述三极管Q3的集电极、三极管Q4的基极相连接，所述三极管Q3的集电极连接电阻R5的一端，所述电阻R5的另一端和所述三极管Q4的集电极均连接所述参考地端(GND)，所述三极管Q4的发射极连接镜像电流源(130)的输入端，所述镜像电流源(130)的供电端接入所述系统输入电压(VIN)，所述镜像电流源(130)的输出端作为所述压控电流源的输出端；
    所述流控电压源的电路结构为：基准电流源(IREF)的供电端接入所述偏置电压VDD，所述基准电流源(IREF)的输出端、所述压控电流源的输出端、电阻R6的一端相连接，所述电阻R6的另一端连接所述参考地端(GND)，所述压控电流源的输出端作为所述前馈电压产生模块(200)的输出端；
    并且，所述偏置电压VDD为所述系统输入电压(VIN)的最小值V in min。
  8. 根据权利要求2至7任意一项所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有延时模块(109)，所述采样电路(107) 的输出端通过所述延时模块(109)连接所述比较器模块(102)的同相输入端。
  9. 根据权利要求2至7任意一项所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有修调模块(110)，该修调模块(110)连接所述振荡器(104)的控制端，用于调节所述振荡器(104)所输出时钟信号的周期。
  10. 一种峰值电流型蜂鸣器驱动电路，其特征在于：包括开关管(106)和控制单元(300)，所述开关管(106)在导通时接通电磁式蜂鸣器(109)与系统输入电压(VIN)，在关断时断开所述电磁式蜂鸣器(109)与系统输入电压(VIN)，所述控制单元(300)用于输出PWM信号，使得：所述开关管(106)在所述PWM信号为高电平时导通，在所述PWM信号为低电平时关断；
    其特征在于：
    所述的控制单元(300)设有采样电路(107)，该采样电路(107)含有与所述开关管(106)串联的采样电阻，所述控制单元(300)依据所述系统输入电压(VIN)和所述采样电阻上的电信号，动态输出满足以下条件的PWM信号：
    条件一、所述PWM信号的周期T为预设的固定值；
    条件二、所述PWM信号的实时占空比D(t)按以下公式三变化：
    Figure PCTCN2020092459-appb-100003
    Figure PCTCN2020092459-appb-100004
    式中，L为所述电磁式蜂鸣器(109)的电感量，V re fmin为取值在0.05V至V in min之间的预设值，V in(t)为所述系统输入电压(VIN)的实时电压值，V in min为所述系统输入电压(VIN)的最小值，V in max为所述系统输入电压(VIN)的最大值，T为所述PWM信号的周期，R 107为所述采样电阻的阻值。
  11. 根据权利要求10所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有前馈电压产生模块(200)、比较器模块(102)、逻辑驱动模块(103)、振荡器(104)、电源模块(105)和续流模块(108)；
    所述电磁式蜂鸣器(109)的正极接入所述系统输入电压(VIN)，负极连接所述开关管(106)的漏极，所述开关管(106)的源极通过所述采样电阻连接参考地端(GND)；
    所述电源模块(105)将所述系统输入电压(VIN)转换为用于为所述控制单元(300)供电的偏置电压VDD；
    所述前馈电压产生模块(200)输出满足以下公式四的实时前馈电压V ref(t)：
    V ref(t)＝K CV in(t)+V ref min      [公式四]；
    所述采样电路(107)输出所述采样电阻的实时电压V CS(t)；
    所述实时前馈电压V ref(t)输入所述比较器模块(102)的反相输入端，所述实时电压V CS(t)输入所述比较器模块(102)的同相输入端，所述比较器模块(102)输出的逻辑电平输入所述逻辑驱动模块(103)的R输入端；使得：当V CS(t)＜V ref(t)时，所述比较器模块(102)向R输入端输出低电平，当V CS(t)＞V ref(t)时，所述比较器模块(102)向R输入端输出高电平；
    所述振荡器(104)向所述逻辑驱动模块(103)的S输入端输出周期为所述周期T的时钟信号；
    所述逻辑驱动模块(103)用于向所述开关管(106)的栅极输出所述PWM信号，该PWM信号能够驱动所述开关管(106)，且所述逻辑驱动模块(103)输出所述PWM信号的逻辑满足：其一，按照输入所述S输入端的时钟信号，也即按照所述周期T，所述PWM信号由低电平翻转为高电平；其二，当输入所述R输入端的逻辑电平由低电平翻转为高电平时，所述PWM信号由高电平翻转为低电平；
    所述续流模块(108)为所述电磁式蜂鸣器(109)提供用于在所述开关管(106)关断时释放能量的续流回路。
  12. 根据权利要求11所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈电压产生模块(200)由前馈补偿模块(100)和受控电压源模块(101)组成；所述前馈补偿模块(100)输出跟随所述系统输入电压(VIN)同相变化的前馈变量信号，所述受控电压源模块(101)将该前馈变量信号转换为所述实 时前馈电压V ref(t)输出。
  13. 根据权利要求12所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈补偿模块(100)和受控电压源模块(101)均为压控电压源。
  14. 根据权利要求13所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述压控电压源的电路结构为：三极管Q1的发射极接入所述偏置电压VDD，所述三极管Q1的基极、所述三极管Q1的集电极、三极管Q2的基极相连接，所述三极管Q1的集电极连接电阻R2的一端，所述电阻R2的另一端和所述三极管Q2的集电极均连接所述参考地端(GND)，所述三极管Q2的发射极连接电阻R1的一端，所述电阻R1的另一端作为所述压控电压源的输入端；运算放大器U1的同相输入端通过电阻R3连接所述三极管Q2的发射极，所述运算放大器U1的反相输入端分为两路，一路通过电阻R4接入所述系统输入电压(VIN)，另一路通过电阻R5连接所述运算放大器U1的输出端，所述运算放大器U1的输出端作为所述压控电压源的输出端；
    所述前馈补偿模块(100)的输入端接入所述系统输入电压(VIN)，所述前馈补偿模块(100)的输出端连接所述受控电压源模块(101)的输入端，所述受控电压源模块(101)的输出端作为所述前馈电压产生模块(200)的输出端；
    并且，所述偏置电压VDD为所述系统输入电压(VIN)的最小值V in min。
  15. 根据权利要求12所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述前馈补偿模块(100)为压控电流源，所述受控电压源模块(101)为流控电压源。
  16. 根据权利要求15所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述压控电流源的电路结构为：三极管Q3的发射极接入所述偏置电压VDD，所述三极管Q3的基极、所述三极管Q3的集电极、三极管Q4的基极相连接，所述三极管Q3的集电极连接电阻R5的一端，所述电阻R5的另一端和所述三极管Q4的集电极均连接所述参考地端(GND)，所述三极管Q4的发射极连接镜像电流源(130)的输入端，所述镜像电流源(130)的供电端接入所述系统输入电压(VIN)，所述镜像电流源(130)的输出端作为所述压控电流源的输出端；
    所述流控电压源的电路结构为：基准电流源(IREF)的供电端接入所述偏置电压VDD，所述基准电流源(IREF)的输出端、所述压控电流源的输出端、 电阻R6的一端相连接，所述电阻R6的另一端连接所述参考地端(GND)，所述压控电流源的输出端作为所述前馈电压产生模块(200)的输出端；
    并且，所述偏置电压VDD为所述系统输入电压(VIN)的最小值V in min。
  17. 根据权利要求10至16任意一项所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有延时模块(109)，所述采样电路(107)的输出端通过所述延时模块(109)连接所述比较器模块(102)的同相输入端。
  18. 根据权利要求10至16任意一项所述的峰值电流型蜂鸣器驱动电路，其特征在于：所述的控制单元(300)还设有修调模块(110)，该修调模块(110)连接所述振荡器(104)的控制端，用于调节所述振荡器(104)所输出时钟信号的周期。
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