WO2021027391A1 - 唤醒电路与可充电设备 - Google Patents
唤醒电路与可充电设备 Download PDFInfo
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- WO2021027391A1 WO2021027391A1 PCT/CN2020/096414 CN2020096414W WO2021027391A1 WO 2021027391 A1 WO2021027391 A1 WO 2021027391A1 CN 2020096414 W CN2020096414 W CN 2020096414W WO 2021027391 A1 WO2021027391 A1 WO 2021027391A1
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- resistor
- level signal
- wake
- output
- control module
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M10/4257—Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/005—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting using a power saving mode
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L1/00—Supplying electric power to auxiliary equipment of vehicles
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L3/00—Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption
- B60L3/12—Recording operating variables ; Monitoring of operating variables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
- H01M10/446—Initial charging measures
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0031—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using battery or load disconnect circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4278—Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2310/00—The network for supplying or distributing electric power characterised by its spatial reach or by the load
- H02J2310/40—The network being an on-board power network, i.e. within a vehicle
- H02J2310/48—The network being an on-board power network, i.e. within a vehicle for electric vehicles [EV] or hybrid vehicles [HEV]
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/70—Energy storage systems for electromobility, e.g. batteries
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/7072—Electromobility specific charging systems or methods for batteries, ultracapacitors, supercapacitors or double-layer capacitors
Definitions
- the embodiments of the present application relate to the field of circuit technology, and in particular, to a wake-up circuit and a chargeable device.
- BMS battery management system
- the wake-up circuit in the electric vehicle is powered by another auxiliary battery, and the wake-up circuit will always be in working condition after the gun is plugged in and the auxiliary battery consumes more power; , The battery management system will continue to consume the power of the auxiliary battery.
- the purpose of the embodiments of the present application is to provide a wake-up circuit and a rechargeable device.
- the time that the drive module and the output control module are in working state is only the first preset time period, thereby reducing the pairing of the wake-up circuit.
- the power consumption of the auxiliary power supply at the same time, after the charging is completed, even the wake-up circuit can still receive the external voltage signal, but because the wake-up circuit no longer outputs the wake-up signal to the BMS system, the BMS system can enter the sleep state, which reduces the BMS system’s assistance Power consumption.
- the embodiments of the present application provide a wake-up circuit, including: an input control module, a drive module, and an output control module; the input control module, the drive module, and the output control module are respectively connected to the auxiliary power supply; the input control module It is used to output a first level signal when an external voltage signal is received; the driving module is used to output a second level signal that lasts for a first preset time when the first level signal is received; the output control module is used to When receiving the second level signal, output a wake-up signal lasting for the first preset time to the battery management system.
- the embodiment of the present application also provides a rechargeable device, including the above-mentioned wake-up circuit, auxiliary power supply, and battery management system.
- the wake-up circuit is powered by an auxiliary power supply.
- the input control module of the wake-up circuit receives an external voltage signal, it first outputs a first level signal, and the drive module receives the first level signal. Signal, output a second level signal that lasts for the first preset time, and the output control module outputs a wake-up signal while receiving the second level signal, that is, outputs a wake-up signal that lasts for the first preset time to the battery management system , Which can wake up the battery management system for charging; therefore, when there is an external voltage signal input, the driving module and the output control module are in the working state for only the first preset time, thereby reducing the power consumption of the auxiliary power supply by the wake-up circuit ; At the same time, after the charging is completed, even the wake-up circuit can still receive the external voltage signal, but because the wake-up circuit no longer outputs the wake-up signal to the BMS system, the BMS system can enter the dormant state, which reduces the BMS
- the driving module at least includes a driving unit; the driving unit is configured to output a second level signal lasting for a first preset time when the first level signal is received.
- This embodiment provides a specific implementation of the drive module.
- the driving module further includes a delay unit; the driving unit is used to output a second level signal lasting for a first preset time through the delay unit when the first level signal is received.
- the driving unit outputs the second level signal for the first preset period of time through the delay unit, which helps to reduce the cost.
- the driving unit is specifically configured to output a third-level signal for a second preset duration when the first-level signal is received, and the second preset duration is less than the first preset duration; the delay unit is used for receiving When the third level signal is reached, the second level signal lasting for the first preset period of time is output.
- the driving unit includes: a first capacitor, a first resistor, and a second resistor; the first end of the first resistor is connected to the first end of the second resistor, and the second end of the first resistor is used to receive the auxiliary power source.
- the second end of the second resistor is grounded; the first end of the first capacitor is used to receive the first level signal, and the second end of the first capacitor is connected to the junction of the first resistor and the second resistor, The second end of the first capacitor is used to output a third level signal lasting for a second preset time period.
- This embodiment provides a specific structure of the drive unit.
- the delay unit is a delay chip.
- the first input terminal of the delay chip is used to receive the third level signal, and the second input terminal of the delay chip is used to receive the first voltage signal from the auxiliary power supply.
- the output terminal of the chip is used to output a second level signal lasting for a first preset time.
- the input control module includes: a second capacitor, an anti-reverse diode, a first MOS tube, an optocoupler, a third resistor, and a fourth resistor; the anode of the anti-reverse diode is used to receive external voltage signals, and the anti-reverse diode
- the negative electrode is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.
- the gate of the first MOS transistor is connected to the junction of the anti-reverse diode and the second capacitor. The source of the first MOS transistor is grounded.
- the drain of the optical coupler is connected to the first input end of the optical coupler, the second input end of the optical coupler is used to receive the second voltage signal from the auxiliary power supply, and the first output end of the optical coupler is grounded through the fourth resistor.
- the second output end of the coupler is connected to one end of the third resistor, the other end of the third resistor is also used to receive the first voltage signal from the auxiliary power supply, and the second output end of the optocoupler is also used to output the first voltage signal.
- Flat signal This embodiment provides a specific structure of an input control module.
- the output control module includes: a triode, a fifth resistor, a sixth resistor, a second MOS tube, and a third MOS tube; the base of the triode is used to receive the second level signal, and the emitter of the triode is used to receive the signal from the auxiliary
- the collector of the triode is connected to one end of the fifth resistor, the other end of the fifth resistor is connected to one end of the sixth resistor, the other end of the sixth resistor is grounded, and the gate of the second MOS transistor is connected to At the junction of the fifth resistor and the sixth resistor, the source of the second MOS transistor is grounded, the drain of the second MOS transistor is connected to the gate of the third MOS transistor, and the source of the third MOS transistor is used to receive the auxiliary
- the second voltage signal of the power supply, the drain of the third MOS tube is used to output the wake-up signal; the transistor is turned on when receiving the second level signal, so that the second MOS tube and the third MOS
- the rechargeable device is a vehicle.
- Fig. 1 is a schematic block diagram of a wake-up circuit according to the first embodiment of the present application
- FIG. 2 is a schematic block diagram of a wake-up circuit according to the second embodiment of the present application.
- FIG. 3 is a circuit structure diagram of a driving module of a wake-up circuit according to a third embodiment of the present application.
- FIG. 4 is a circuit structure diagram of the input control module of the wake-up circuit according to the fourth embodiment of the present application.
- Fig. 5 is a circuit structure diagram of an output control module of a wake-up circuit according to a fifth embodiment of the present application.
- the first embodiment of the present application relates to a wake-up circuit 100 for outputting a wake-up signal to wake up a BMS system of a rechargeable device.
- the rechargeable device is, for example, a vehicle.
- the wake-up circuit 100 is powered by the vehicle’s auxiliary power supply.
- the auxiliary power supply is also used To power the BMS system, the auxiliary power source can be a lead-acid battery.
- the wake-up circuit 100 includes: an input control module 1, a driving module 2, and an output control module 3.
- the input control module 1, the drive module 2, and the output control module 3 are respectively connected to the auxiliary power source 4 of the vehicle, the output control module 3 is also connected to the BMS system 5, and the auxiliary power source 4 is also connected to the BMS system 5.
- the input control module 1 When the input control module 1 receives an external voltage signal, it outputs a first level signal; the external voltage signal can be a voltage source signal from a charging pile. When the charging gun of the charging pile is inserted into the charging port of the vehicle, the charging gun and the whole When the vehicle is connected, the input control module 1 will receive the external voltage signal from the charging pile and output the first level signal to the driving module 2.
- the first level signal can be a high level signal or a low level signal relative to the reference terminal.
- the reference terminal can be the ground terminal.
- the driving module 2 After receiving the first level signal output by the input control module 1, the driving module 2 outputs a second level signal lasting for a first preset time to the output control module 3.
- the second level signal can also be a high level signal or a low level signal relative to the reference terminal.
- the output control module 3 receives the second level signal output by the driving module 2, it outputs a wake-up signal, that is, outputs a wake-up signal lasting for the first preset time to the BMS system 5, so as to wake up the BMS system 5, which is the vehicle’s
- the battery pack is charged; and because the duration of the second level signal is the first preset duration, the duration of the wake-up signal is also the first preset duration, that is, the working duration of the drive module 2 and the output control module 3 is the first preset Set the time length.
- the wake-up circuit 100 can still receive the external voltage signal, but the wake-up circuit 100 no longer outputs the wake-up signal to the BMS system, so the BMS system still Able to enter sleep state.
- the first preset duration is greater than the minimum duration for waking up the BMS system 5.
- the wake-up circuit 100 is powered by the auxiliary power source 4.
- the input control module 1 of the wake-up circuit receives an external voltage signal, it first outputs a first level signal, and the drive module receives the first level signal.
- the output control module When the level signal, output the second level signal lasting for the first preset time, the output control module outputs the wake-up signal during the period when the second level signal is received, that is, output the wake-up signal lasting for the first preset time to the battery Management system, which can wake up the battery management system for charging; therefore, when an external voltage signal is input, the time that the drive module 2 and the output control module 3 are in working state is only the first preset time period, thereby reducing the number of wake-up circuits 100 The power consumption of the auxiliary power supply 4; at the same time, after the charging is completed, even if the wake-up circuit 100 can still receive the external voltage signal, but because the wake-up circuit 100 no longer outputs the wake-up signal to the BMS system, the BMS system can enter the sleep state, reducing the BMS The consumption of auxiliary power 4 by the system.
- the second embodiment of the present application relates to a wake-up circuit 100.
- the main difference between the second embodiment and the first embodiment is: please refer to FIG. 2, which provides a specific structure of the driving module 2.
- the driving module 2 includes at least one driving unit 21. After receiving the first level signal output by the input control module 1, the driving unit 21 outputs a second level signal for a first preset time to the output. Control module 3.
- the second level signal may also be a high level signal or a low level signal.
- the driving module 2 further includes a delay unit 22, so that after receiving the first level signal output by the input control module 1, the driving unit 21 can output the first level signal that lasts for the first preset time through the delay unit 22 Two-level signal to the output control module 3. Specifically, after receiving the first level signal output by the input control module 1, the driving unit 21 outputs a third level signal for a second preset duration to the delay unit 22, and the second preset duration is less than the first preset duration. Set the duration; the delay unit 22 outputs the second level signal during the period when the third level signal is received. Since the delay unit 22 has a preset delay duration, the time for outputting the second level signal is the first 2. The sum of the preset duration and the delay duration is the first preset duration.
- this embodiment provides a specific structure of the drive module 2.
- the third embodiment of the present application relates to a wake-up circuit.
- the main difference between the third embodiment and the second embodiment is: please refer to FIG. 3, which provides the specific structure of the driving unit and the delay unit. It should be noted that, in order to keep the figure concise, FIG. 3 only schematically shows the structure of the driving unit and the delay unit of the wake-up circuit 100.
- the driving unit 21 includes a first capacitor C1, a first resistor R1, and a second resistor R2.
- the first end of the first resistor R1 is connected to the first end of the second resistor R2, and the second resistor R2 has a second end.
- the second end of the first resistor R1 is connected to the auxiliary power source 4, and receives the first voltage signal V1 from the auxiliary power source 4.
- the first voltage signal V1 is, for example, a 3.3V voltage signal; the first capacitor C1
- the terminal is connected to the input control module 1, and receives the first level signal output by the input control module 1.
- the second terminal of the first capacitor C1 is connected to the junction D of the first resistor R1 and the second resistor R2.
- the second end outputs a third level signal lasting for a second preset time period.
- a resistor can also be connected in parallel across the first capacitor C1. This resistor participates in charging and discharging during the charging and discharging process of the first capacitor C1, increasing the delay time of charging and discharging; when the first capacitor C1 is fully charged, the first capacitor C1 has two The terminal is in an open state, and the resistor can maintain the electrical connection of the first capacitor C1.
- the delay unit 22 may be a delay chip, specifically a programmable delay chip.
- the first input terminal of the delay chip is connected to the output terminal of the drive unit 21, that is, connected to the connection D, the delay chip
- the second input terminal of the delay chip is connected to the auxiliary power source 4, and receives the first voltage signal V1 from the auxiliary power source 4.
- the first voltage signal V1 is, for example, a 3.3V voltage signal; the output terminal of the delay chip is used to output the continuous first preset Set the duration of the second level signal.
- the power supply terminal of the delay chip also receives the first voltage signal V1 from the auxiliary power source 4.
- a clamp protection circuit may also be provided between the connection point D and the first input terminal of the delay chip, so that the voltage of the third level signal input to the delay chip is within a preset range.
- the first-level signal as a low-level signal as an example
- the first capacitor C1 receives a low-level first-level signal
- the first capacitor since the voltage difference between the two ends of the capacitor cannot be changed suddenly, the first capacitor The voltage of the second terminal of C1 also immediately becomes low level, and then the first voltage signal V1 will charge the first capacitor C1.
- the driving unit 21 is in the working state and consumes the power of the auxiliary power supply 4.
- the second end slowly rises to a high level.
- the capacitor charging period that is, the second preset time
- the second end of the first capacitor C1 outputs a low-level third-level signal to the delay chip.
- the drive unit 21 When the first capacitor C2 When the second end of the drive unit 21 rises to a high level, the drive unit 21 resumes its initial state and almost no longer consumes the power of the auxiliary power supply 4; when the delay chip receives the third level signal, it is triggered to enter the working state, consuming the auxiliary power supply 4 Power, output the second level signal, because the delay chip has a preset delay time, so that the time for outputting the second level signal is the sum of the second preset time length and the delay time, which is the first For a preset period of time, when the third-level signal is no longer received, the auxiliary power source 4 is restored to the initial state, and the power of the auxiliary power source 4 is almost no longer consumed.
- the delay chip itself is preset with high and low voltage thresholds.
- the third level signal input to the delay chip can be adjusted by adjusting the resistance of the first resistor R1 and the resistance of the second resistor R2. The level is high and low.
- the first level signal is a low level signal as an example for description, but it is not limited to this, the first level signal can also be a high level signal, in which case the driving unit can be adjusted 21 makes the drive unit 21 continue to output a low-level third-level signal; or makes the drive unit 21 output a high-level third-level signal, adjust the delay chip to trigger a high-level and enter the working state, A third-level signal lasting for the first preset duration is output.
- this embodiment provides specific structures of the driving unit and the delay unit.
- the fourth embodiment of the present application relates to a wake-up circuit 100.
- the main difference between the fourth embodiment and the first embodiment is that the specific structure of the input control module 1 is provided.
- the input control module 1 includes a second capacitor C2, an anti-reverse diode D1, a first MOS transistor Q1, an optical coupler 11, a third resistor R3, and a fourth resistor R4. It should be noted that, in order to keep the figure concise, FIG. 4 only schematically illustrates the structure of the input control module 1 of the wake-up circuit 100.
- the anode of the reverse diode D1 is used to receive an external voltage signal
- the cathode of the anti-reverse diode D1 is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is grounded, and the first MOS transistor Q1
- the gate is connected to the junction E of the reverse diode D1 and the second capacitor C2, the source of the first MOS transistor Q1 is grounded, and the drain of the first MOS transistor Q1 is connected to the first input terminal of the photocoupler 11,
- the second input terminal of the optocoupler 11 is connected to the auxiliary power source 4.
- the optocoupler 11 can be connected to the auxiliary power source 4 through a resistor for receiving the second voltage signal V2 from the auxiliary power source 4.
- V2 can be a 24V voltage signal
- the first output terminal of the optocoupler 11 is grounded through the fourth resistor R4, the second output terminal of the optocoupler 11 is connected to one end of the third resistor R3, and the other end of the third resistor R3 Connected to the auxiliary power source 4 for receiving the first voltage signal V1 from the auxiliary power source 4.
- the first voltage signal V1 is, for example, a 3.3V voltage signal.
- the second output terminal of the optocoupler 11 is also used to output the first voltage signal.
- the first input terminal and the second input terminal of the optical coupler 11 correspond to the light emitting terminal of the optical coupler 11
- the first output terminal and the second output terminal of the optical coupler 11 correspond to the light receiving terminal of the optical coupler 11. .
- the anti-reverse diode D1 of the input control module 1 will receive the external voltage signal from the charging pile.
- the external voltage signal can be a periodic AC voltage signal.
- the second capacitor C2 is charged.
- the first MOS transistor Q1 is turned on.
- the first MOS transistor Q1 can be an NMOS transistor.
- the optical coupler 11 is further turned on, so that the resistance of the third resistor R3 and the fourth resistor R4 can be adjusted to control the output of a high-level first-level signal or a low-level first-level signal, for example,
- the resistance value of the third resistor R3 can be adjusted to be smaller than the resistance value of the fourth resistor R4 to control the output of a low-level first level signal.
- a discharge circuit can also be connected in parallel across the second capacitor C2, so that the second capacitor C2 can be discharged through the discharge circuit when the AC voltage signal is at a low level.
- this embodiment provides a specific structure of the input control module 1. It should be noted that this embodiment can also be used as an improvement on the basis of the second embodiment or the third embodiment, and can achieve the same technical effect.
- the fifth embodiment of the present application relates to a wake-up circuit. Compared with the first embodiment, the fifth embodiment is mainly different in that: a specific structure of the output control module 3 is provided.
- the output control module 3 includes a transistor Q2, a fifth resistor R5, a sixth resistor R6, a second MOS transistor Q3, and a third MOS transistor Q4.
- the base of the transistor Q2 is connected to the driving module 2 for receiving the second level signal, and the emitter of the transistor Q2 is connected to the auxiliary power source 4 for receiving the first voltage signal V1 from the auxiliary power source.
- V1 is, for example, a 3.3V voltage signal.
- the collector of the transistor Q2 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is grounded.
- the gate of the MOS transistor Q3 is connected to the junction F of the fifth resistor R5 and the sixth resistor R6, the source of the second MOS transistor Q3 is grounded, and the drain of the second MOS transistor Q3 is connected to the gate of the third MOS transistor Q4 ,
- the source of the third MOS transistor Q4 is connected to the auxiliary power source 4 for receiving a second voltage signal from the auxiliary power source 4.
- the second voltage signal V2 is, for example, a 24V voltage signal, and the drain of the third MOS transistor Q4 outputs Wake up signal.
- the base of the transistor Q2 and the gate of the third MOS transistor Q4 are also provided with peripheral circuits for driving and protection.
- the base of the transistor Q2 is connected with a resistor.
- a resistor is connected to the gate of the three MOS transistor Q4, a resistor is connected in parallel between the base and emitter of the transistor Q2, and the source and the gate of the third MOS transistor Q4.
- the resistance of the fifth resistor R5 is set to be smaller than the resistance of the sixth resistor R6, so that when the transistor Q2 is turned on, the sixth resistor R6
- the divided voltage of is greater than the divided voltage of the fifth resistor R5, the second MOS transistor Q3 is turned on, the second MOS transistor Q3 is an NMOS transistor, and then the third MOS transistor Q4 is turned on, and the third MOS transistor Q4 is a PMOS transistor.
- the drain of the three MOS transistor Q4 outputs the second voltage signal as the wake-up signal of the BMS system 5 to wake up the BMS system 5.
- this embodiment provides a specific structure of the input control module 1. It should be noted that this embodiment can also be used as an improvement on the basis of the second embodiment to the fourth embodiment, and can achieve the same technical effect.
- the sixth embodiment of the present application relates to a rechargeable device.
- the rechargeable device is, for example, a vehicle.
- the vehicle includes the wake-up circuit 100 of any one of the first to fifth embodiments, the auxiliary power supply 4, and the BMS system.
- the auxiliary power source 4 is used to supply power to the BMS system, and the auxiliary power source 4 can be a lead-acid battery.
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- Logic Circuits (AREA)
Abstract
一种唤醒电路(100)与可充电设备。唤醒电路(100)包括:输入控制模块(1)、驱动模块(2)以及输出控制模块(3);输入控制模块(1)、驱动模块(2)以及输出控制模块(3)分别连接于辅助电源(4);输入控制模块(1)用于在接收到外部电压信号时,输出第一电平信号;驱动模块(2)用于在接收到第一电平信号时,输出持续第一预设时长的第二电平信号;输出控制模块(3)用于在接收到第二电平信号时,输出持续第一预设时长的唤醒信号至电池管理系统(5)。上述技术方案减少了唤醒电路对辅助电源(4)的电量消耗;同时,减少了BMS系统(5)对辅助电源(4)的消耗。
Description
本申请要求于2019年08月12日提交中国专利局,申请号为201921297373.4,名称为“唤醒电路与可充电设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请实施例涉及电路技术领域,特别涉及一种唤醒电路与可充电设备。
随着电池技术的发展,电动汽车替代燃油汽车已经成为了汽车行业的发展趋势。电动汽车充电时,在充电枪的插入后通过唤醒电路来唤醒电动汽车的电池管理系统(Battery Management System,简称BMS),从而能够为电动汽车充电。
发明人发现现有技术中至少存在如下问题:电动汽车中的唤醒电路是由另外的辅助电池供电的,在插枪后拔枪前唤醒电路会一直处于工作状态,辅助电池耗电较多;同时,电池管理系统也会持续消耗辅助电池的电量。
发明内容
本申请实施方式的目的在于提供一种唤醒电路与可充电设备,在有外部电压信号输入时,驱动模块与输出控制模块处于工作状态的时间仅为第一预设时长,从而减少了唤醒电路对辅助电源的电量消耗;同时,在充电完成后,即便唤醒电路仍然能够接收到外部电压信号,但是由于唤醒电路不再输出唤醒信号到BMS系统,BMS系统能够进入休眠状态,减少了BMS系统对辅助电源的消耗。
为解决上述技术问题,本申请的实施方式提供了一种唤醒电路,包括:输入控制模块、驱动模块以及输出控制模块;输入控制模块、驱动 模块以及输出控制模块分别连接于辅助电源;输入控制模块用于在接收到外部电压信号时,输出第一电平信号;驱动模块用于在接收到第一电平信号时,输出持续第一预设时长的第二电平信号;输出控制模块用于在接收到第二电平信号时,输出持续第一预设时长的唤醒信号至电池管理系统。
本申请的实施方式还提供了一种可充电设备,包括上述唤醒电路、辅助电源与电池管理系统。
本申请实施方式相对于现有技术而言,唤醒电路由辅助电源供电,唤醒电路的输入控制模块在接收到外部电压信号时,先输出第一电平信号,驱动模块在接收到第一电平信号时,输出持续第一预设时长的第二电平信号,输出控制模块在接收到第二电平信号的期间,输出唤醒信号,即输出持续第一预设时长的唤醒信号到电池管理系统,从而能够唤醒电池管理系统进行充电;因此,在有外部电压信号输入时,驱动模块与输出控制模块处于工作状态的时间仅为第一预设时长,从而减少了唤醒电路对辅助电源的电量消耗;同时,在充电完成后,即便唤醒电路仍然能够接收到外部电压信号,但是由于唤醒电路不再输出唤醒信号到BMS系统,BMS系统能够进入休眠状态,减少了BMS系统对辅助电源的消耗。
另外,驱动模块至少包括驱动单元;驱动单元用于在接收到第一电平信号时,输出持续第一预设时长的第二电平信号。本实施方式提供了驱动模块的一种具体实现方式。
另外,驱动模块还包括延时单元;驱动单元用于在接收到第一电平信号时,通过延时单元输出持续第一预设时长的第二电平信号。本实施方式中,驱动单元通过延时单元输出持续第一预设时长的第二电平信号,有助于减少成本。
另外,驱动单元具体用于在接收到第一电平信号时,输出持续第二预设时长的第三电平信号,第二预设时长小于第一预设时长;延时单元用于在接收到第三电平信号时,输出持续第一预设时长的第二电平信号。
另外,驱动单元包括:第一电容、第一电阻与第二电阻;第一电阻的第一端连接于第二电阻的第一端,第一电阻的第二端用于接收来源于 辅助电源的第一电压信号,第二电阻的第二端接地;第一电容的第一端用于接收第一电平信号,第一电容的第二端连接于第一电阻与第二电阻的连接处,第一电容的第二端用于输出持续第二预设时长的第三电平信号。本实施方式提供了驱动单元的一种具体结构。
另外,延时单元为延时芯片,延时芯片的第一输入端用于接收第三电平信号,延时芯片的第二输入端用于接收来源于辅助电源的第一电压信号,延时芯片的输出端用于输出持续第一预设时长的第二电平信号。本实施方式提供了延时单元的一种具体结构。
另外,输入控制模块包括:第二电容、防反二级管、第一MOS管、光耦合器、第三电阻与第四电阻;防反二极管的正极用于接收外部电压信号,防反二极管的负极连接于第二电容的一端,第二电容的另一端接地,第一MOS管的栅极连接于防反二极管与第二电容的连接处,第一MOS管的源极接地,第一MOS管的漏极连接于光耦合器的第一输入端,光耦合器的第二输入端用于接收来源于辅助电源的第二电压信号,光耦合器的第一输出端通过第四电阻接地,光耦合器的第二输出端连接于第三电阻的一端,第三电阻的另一端还用于接收来源于辅助电源的第一电压信号,光耦合器的第二输出端还用于输出第一电平信号。本实施方式提供了一种输入控制模块的一种具体结构。
另外,输出控制模块包括:三极管、第五电阻、第六电阻、第二MOS管、第三MOS管;三极管的基极用于接收第二电平信号,三极管的发射极用于接收来源于辅助电源的第一电压信号,三极管的集电极连接于第五电阻的一端,第五电阻的另一端连接于第六电阻的一端,第六电阻的另一端接地,第二MOS管的栅极连接于第五电阻与第六电阻的连接处,第二MOS管的源极接地,第二MOS管的漏极连接于第三MOS管的栅极,第三MOS管的源极用于接收来源于辅助电源的第二电压信号,第三MOS管的漏极用于输出唤醒信号;三极管在接收到第二电平信号时导通,使得第二MOS管与第三MOS管导通,三MOS管在导通时输出唤醒信号。本实施方式提供了输出控制模块的一种具体结构。
另外,可充电设备为车辆。
一个或多个实施例通过与之对应的附图中的图片进行示例性说明,这些示例性说明并不构成对实施例的限定,附图中具有相同参考数字标号的元件表示为类似的元件,除非有特别申明,附图中的图不构成比例限制。
图1是根据本申请第一实施方式的唤醒电路的方框示意图;
图2是根据本申请第二实施方式的唤醒电路的方框示意图;
图3是根据本申请第三实施方式的唤醒电路的驱动模块的电路结构图;
图4是根据本申请第四实施方式的唤醒电路的输入控制模块的电路结构图;
图5是根据本申请第五实施方式的唤醒电路的输出控制模块的电路结构图。
为使本申请实施例的目的、技术方案和优点更加清楚,下面将结合附图对本申请的各实施方式进行详细的阐述。然而,本领域的普通技术人员可以理解,在本申请各实施方式中,为了使读者更好地理解本申请而提出了许多技术细节。但是,即使没有这些技术细节和基于以下各实施方式的种种变化和修改,也可以实现本申请所要求保护的技术方案。
本申请的第一实施方式涉及一种唤醒电路100,用于输出唤醒信号来唤醒可充电设备的BMS系统,可充电设备例如为车辆,唤醒电路100由车辆的辅助电源的供电,辅助电源还用于为BMS系统供电,辅助电源可以为铅酸电池。请参考图1,唤醒电路100包括:输入控制模块1、驱动模块2、输出控制模块3。输入控制模块1、驱动模块2、输出控制模块3分别连接于车辆的辅助电源4,输出控制模块3还连接于BMS系统5,辅助电源4还连接于BMS系统5。
输入控制模块1在接收到外部电压信号时,输出第一电平信号;外 部电压信号可以为来源于充电桩的电压源信号,在充电桩的充电枪插入车辆的充电口时,充电枪与整车相连,输入控制模块1会接收到来源于充电桩的外部电压信号,并输出第一电平信号到驱动模块2;其中,第一电平信号相对于参考端可以为高电平信号或低电平信号,参考端可以为地端。
驱动模块2在接收到输入控制模块1输出的第一电平信号后,输出一个持续第一预设时长的第二电平信号到输出控制模块3。第二电平信号相对于参考端也可以为高电平信号或低电平信号。
输出控制模块3在接收到驱动模块2输出的第二电平信号的期间,输出唤醒信号,即输出持续第一预设时长的唤醒信号至BMS系统5,从而能够唤醒BMS系统5,为车辆的电池组充电;并且由于第二电平信号的持续时长为第一预设时长,唤醒信号的持续时长同样为第一预设时长,即驱动模块2与输出控制模块3的工作时长为第一预设时长,当车辆的电池组充电完毕之后,若充电枪仍然与整车相连,即唤醒电路100仍然能够接收到外部电压信号,但是唤醒电路100不再输出唤醒信号到BMS系统,因此BMS系统仍然能够进入休眠状态。其中,第一预设时长大于唤醒BMS系统5的最小时长即可。
本实施方式相对于现有技术而言,唤醒电路100由辅助电源4供电,唤醒电路的输入控制模块1在接收到外部电压信号时,先输出第一电平信号,驱动模块在接收到第一电平信号时,输出持续第一预设时长的第二电平信号,输出控制模块在接收到第二电平信号的期间,输出唤醒信号,即输出持续第一预设时长的唤醒信号到电池管理系统,从而能够唤醒电池管理系统进行充电;因此,在有外部电压信号输入时,驱动模块2与输出控制模块3处于工作状态的时间仅为第一预设时长,从而减少了唤醒电路100对辅助电源4的电量消耗;同时,在充电完成后,即便唤醒电路100仍然能够接收到外部电压信号,但是由于唤醒电路100不再输出唤醒信号到BMS系统,BMS系统能够进入休眠状态,减少了BMS系统对辅助电源4的消耗。
本申请的第二实施方式涉及一种唤醒电路100,第二实施方式相对 于第一实施方式来说,主要区别之处在于:请参考图2,提供了驱动模块2的具体结构。
本实施例中,驱动模块2至少包括一个驱动单元21,驱动单元21在接收到输入控制模块1输出的第一电平信号后,输出一个持续第一预设时长的第二电平信号到输出控制模块3。第二电平信号也可以为高电平信号或低电平信号。
在一个例子中,驱动模块2还包括延时单元22,从而驱动单元21在接收到输入控制模块1输出的第一电平信号后,可以通过延时单元22输出持续第一预设时长的第二电平信号到输出控制模块3。具体的,驱动单元21在接收到输入控制模块1输出的第一电平信号后,输出持续第二预设时长的第三电平信号到延时单元22,第二预设时长小于第一预设时长;延时单元22在接收到第三电平信号的期间输出第二电平信号,由于延时单元22具有一个预设的延时时长,从而其输出第二电平信号的时间为第二预设时长与延时时长之和,即为第一预设时长。
本实施方式相对于第一实施方式而言,提供了驱动模块2的具体结构。
本申请的第三实施方式涉及一种唤醒电路,第三实施方式相对于第二实施方式来说,主要区别之处在于:请参考图3,提供了驱动单元与延时单元的具体结构。需要说明的是,为了保持图的简洁,图3仅示意性画出了唤醒电路100的驱动单元与延时单元的结构。
本实施方式中,驱动单元21包括第一电容C1、第一电阻R1与第二电阻R2,第一电阻R1的第一端连接于第二电阻R2的第一端,第二电阻R2的第二端接地,第一电阻R1的第二端连接于辅助电源4,接收来源于辅助电源4的第一电压信号V1,第一电压信号V1例如为3.3V的电压信号;第一电容C1的第一端连接于输入控制模块1,接收输入控制模块1输出的第一电平信号,第一电容C1的第二端连接于第一电阻R1与第二电阻R2的连接处D,第一电容C1的第二端输出持续第二预设时长的第三电平信号。另外,第一电容C1两端还可以并联一个电阻,该电阻在第一电容C1充放电过程中参与充放电,增加充放电的延迟时间;当 第一电容C1充满电后,第一电容C1两端为断路状态,该电阻能够保持第一电容C1的电气连接。
本实施方式中,延时单元22可以为延时芯片,具体为可编程延时芯片,延时芯片的第一输入端连接于驱动单元21的输出端,即连接于连接处D,延时芯片的第二输入端连接于辅助电源4,接收来源于辅助电源4的第一电压信号V1,第一电压信号V1例如为3.3V的电压信号;延时芯片的输出端用于输出持续第一预设时长的第二电平信号。另外,延时芯片的供电端同样接收到来源于辅助电源4的第一电压信号V1。在一个例子中,还可以在连接点D与延时芯片的第一输入端之间设置钳位保护电路,以使得输入到延时芯片的第三电平信号的电压位于预设范围以内。
以第一电平信号为低电平信号为例,第一电容C1的第一端在接收到低电平的第一电平信号时,由于电容两端的电压差不可突变,此时第一电容C1的第二端的电压也立刻变为低电平,随后第一电压信号V1会对第一电容C1进行充电,此时驱动单元21处于工作状态,消耗辅助电源4的电量,第一电容C1的第二端缓慢上升至高电平,在电容充电期间(即第二预设时间),第一电容C1的第二端输出低电平的第三电平信号至延时芯片,当第一电容C2的第二端上升至高电平时,驱动单元21恢复初始状态,几乎不再消耗辅助电源4的电量;延时芯片在接收到第三电平信号时,被触发进入工作状态,消耗辅助电源4的电量,输出第二电平信号,由于延时芯片具有一个预设的延时时长,从而使其输出第二电平信号的时间为第二预设时长与延时时长之和,即为第一预设时长,当不再接收到第三电平信号时,辅助电源4恢复到初始状态,几乎不再消耗辅助电源4的电量。其中,延时芯片本身预设有高低电平的电压阈值,可以通过调整第一电阻R1的阻值与第二电阻R2的阻值的大小,来调整输入到延时芯片的第三电平信号的电平高低。
需要说明的是,本实施方式中以第一电平信号为低电平信号为例进行说明,然不限于此,第一电平信号也可以为高电平信号,此时可以通过调整驱动单元21的使得驱动单元21继续输出低电平的第三电平信号; 或者使得驱动单元21输出高电平的第三电平信号,调整延时芯片,使其为高电平触发进入工作状态,输出持续第一预设时长的第三电平信号。
本实施方式相对于第二实施方式而言,提供了驱动单元与延时单元的具体结构。
本申请的第四实施方式涉及一种唤醒电路100,第四实施方式相对于第一实施方式来说,主要区别之处在于:提供了输入控制模块1的具体结构。
本实施方式中,请参考图4,输入控制模块1包括第二电容C2、防反二级管D1、第一MOS管Q1、光耦合器11、第三电阻R3与第四电阻R4。需要说明的是,为了保持图的简洁,图4仅示意性画出了唤醒电路100的输入控制模块1的结构。
本实施例中,反向二级管D1的正极用于接收外部电压信号,防反二极管D1的负极连接于第二电容C2的一端,第二电容C2的另一端接地,第一MOS管Q1的栅极连接于反向二级管D1与第二电容C2的连接处E,第一MOS管Q1的源极接地,第一MOS管Q1的漏极连接于光耦合器11的第一输入端,光耦合器11的第二输入端连接于辅助电源4,其中,光耦合器11可以通过一个电阻连接到辅助电源4,用于接收来源于辅助电源4的第二电压信号V2,第二电压信号V2可以为一个24V的电压信号,光耦合器11的第一输出端通过第四电阻R4接地,光耦合器11的第二输出端连接于第三电阻R3的一端,第三电阻R3的另一端连接于辅助电源4,用于接收来源于辅助电源4的第一电压信号V1,第一电压信号V1例如为3.3V的电压信号,光耦合器11的第二输出端还用于输出第一电平信号至驱动模块2。其中,光耦合器11的第一输入端与第二输入端对应于光耦合器11的发光端,光耦合器11的第一输出端与第二输出端对应于光耦合器11的光接收端。
具体的,在充电桩的充电枪插入车辆的充电口时,输入控制模块1的防反二极管D1会接收到来源于充电桩的外部电压信号,外部电压信号可以为周期性的交流电压信号,交流电压经过防反二极管D1后,为第二电容C2充电,第二电容C2充电完毕之后,导通第一MOS管Q1,第 一MOS管Q1可以为一个NMOS管,第一MOS管Q1导通后,进一步导通光耦合器11,从而可以通过调整第三电阻R3与第四电阻R4的阻值,控制输出高电平的第一电平信号或者低电平的第一电平信号,例如,可以调整第三电阻R3的阻值小于第四电阻R4的阻值,控制输出低电平的第一电平信号。其中,在交流电压信号处于高电平时,为第二电容C2充电;在交流电压信号处于低电平时,由于防反二极管D1的作用,第二电容C2保持高电平,避免第二电容C2被拉低到低电平。另外,还可以在第二电容C2两端并联放电电路,在交流电压信号处于低电平时,使得第二电容C2可以通过放电电路放电。
本实施方式相对于第一实施方式而言,提供了输入控制模块1的具体结构。需要说明的是,本实施方式还可以作为在第二实施方式或第三实施方式基础上的改进,可以达到同样的技术效果。
本申请的第五实施方式涉及一种唤醒电路,第五实施方式相对于第一实施方式来说,主要区别之处在于:提供了输出控制模块3的具体结构。
本实施方式中,请参考图5,输出控制模块3包括三极管Q2、第五电阻R5、第六电阻R6、第二MOS管Q3、第三MOS管Q4。
三极管Q2的基极连接于驱动模块2,用于接收到第二电平信号,三极管Q2的发射极连接于辅助电源4,用于接收来源于辅助电源的第一电压信号V1,第一电压信号V1例如为3.3V的电压信号,三极管Q2的集电极连接于第五电阻R5的一端,第五电阻R5的另一端连接于第六电阻R6的一端,第六电阻R6的另一端接地,第二MOS管Q3的栅极连接于第五电阻R5与第六电阻R6的连接处F,第二MOS管Q3的源极接地,第二MOS管Q3的漏极连接于第三MOS管Q4的栅极,第三MOS管Q4的源极连接于辅助电源4,用于接收来源于辅助电源4的第二电压信号,第二电压信号V2例如为24V的电压信号,第三MOS管Q4的漏极输出唤醒信号。需要说明的是,三极管Q2的基极与第三MOS管Q4的栅极还设有外围电路,以起到驱动和保护的作用,以图5为例,三极管Q2的基极连接有电阻,第三MOS管Q4的栅极连接有电阻,三极管Q2的基极与发射极、 第三MOS管Q4的源极与栅极之间并联有电阻。
下面以接收到的第二电平信号为低电平信号为例,此时设置第五电阻R5的阻值小于第六电阻R6的阻值,从而在三极管Q2被导通时,第六电阻R6的分压大于第五电阻R5的分压,导通第二MOS管Q3,第二MOS管Q3为NMOS管,继而导通第三MOS管Q4,第三MOS管Q4为PMOS管,此时第三MOS管Q4的漏极输出第二电压信号作为BMS系统5的唤醒信号,以唤醒BMS系统5。
本实施方式相对于第一实施方式而言,提供了输入控制模块1的具体结构。需要说明的是,本实施方式还可以作为在第二实施方式至第四实施方式基础上的改进,可以达到同样的技术效果。
本申请的第六实施方式涉及一种可充电设备,可充电设备例如为车辆,车辆包括第一至第五实施例中任一项的唤醒电路100、辅助电源4以及BMS系统,唤醒电路由车辆的辅助电源4的供电,辅助电源4还用于为BMS系统供电,辅助电源4可以为铅酸电池。
本领域的普通技术人员可以理解,上述各实施方式是实现本申请的具体实施例,而在实际应用中,可以在形式上和细节上对其作各种改变,而不偏离本申请的精神和范围。
Claims (10)
- 一种唤醒电路,其特征在于,包括:输入控制模块、驱动模块以及输出控制模块;所述输入控制模块、所述驱动模块以及所述输出控制模块分别用于与辅助电源连接;所述输入控制模块用于在接收到外部电压信号时,输出第一电平信号;所述驱动模块用于在接收到所述第一电平信号时,输出持续第一预设时长的第二电平信号;所述输出控制模块用于在接收到所述第二电平信号时,输出持续所述第一预设时长的唤醒信号至电池管理系统。
- 根据权利要求1所述的唤醒电路,其特征在于,所述驱动模块至少包括驱动单元;所述驱动单元用于在接收到所述第一电平信号时,输出持续所述第一预设时长的所述第二电平信号。
- 根据权利要求2所述的唤醒电路,其特征在于,所述驱动模块还包括延时单元;所述驱动单元用于在接收到所述第一电平信号时,通过所述延时单元输出持续所述第一预设时长的所述第二电平信号。
- 根据权利要求3所述的唤醒电路,其特征在于,所述驱动单元具体用于在接收到所述第一电平信号时,输出持续第二预设时长的第三电平信号,所述第二预设时长小于所述第一预设时长;所述延时单元用于在接收到所述第三电平信号时,输出持续所述第一预设时长的所述第二电平信号。
- 根据权利要求4所述的唤醒电路,其特征在于,所述驱动单元包括:第一电容、第一电阻与第二电阻;所述第一电阻的第一端连接于所述第二电阻的第一端,所述第一电阻的第二端用于接收来源于所述辅助电源的第一电压信号,所述第二电阻的第二端接地;所述第一电容的第一端用于接收所述第一电平信号,所述第一电容的第二端连接于所述第一电阻与所述第二电阻的连接处,所述第一电容的第二端用于输出持续所述第二预设时长的所述第三电平信号。
- 根据权利要求4所述的唤醒电路,其特征在于,所述延时单元为延时芯片,所述延时芯片的第一输入端用于接收所述第三电平信号,所述延时芯片的第二输入端用于接收来源于所述辅助电源的第一电压信号,所述延时芯片的输出端用于输出持续所述第一预设时长的所述第二电平信号。
- 根据权利要求1所述的唤醒电路,其特征在于,所述输入控制模块包括:第二电容、防反二级管、第一MOS管、光耦合器、第三电阻与第四电阻;所述防反二极管的正极用于接收所述外部电压信号,所述防反二极管的负极连接于所述第二电容的一端,所述第二电容的另一端接地,所述第一MOS管的栅极连接于所述防反二极管与所述第二电容的连接处,所述第一MOS管的源极接地,所述第一MOS管的漏极连接于所述光耦合器的第一输入端,所述光耦合器的第二输入端用于接收来源于所述辅助电源的第二电压信号,所述光耦合器的第一输出端通过所述第四电阻接地,所述光耦合器的第二输出端连接于所述第三电阻的一端,所述第三电阻的另一端还用于接收来源于所述辅助电源的第一电压信号,所述光耦合器的第二输出端还用于输出所述第一电平信号。
- 根据权利要求1所述的唤醒电路,其特征在于,所述输出控制模块包括:三极管、第五电阻、第六电阻、第二MOS管和第三MOS管;所述三极管的基极用于接收所述第二电平信号,所述三极管的发射极用于接收来源于所述辅助电源的第一电压信号,所述三极管的集电极连接于所述第五电阻的一端,所述第五电阻的另一端连接于所述第六电阻的一端,所述第六电阻的另一端接地,所述第二MOS管的栅极连接于所述第五电阻与所述第六电阻的连接处,所述第二MOS管的源极接地,所述第二MOS管的漏极连接于所述第三MOS管的栅极,所述第三MOS管的源极用于接收来源于所述辅助电源的第二电压信号,所述第三MOS管 的漏极用于输出所述唤醒信号;所述三极管在接收到所述第二电平信号时导通,使得所述第二MOS管与所述第三MOS管导通,所述三MOS管在导通时输出所述唤醒信号。
- 一种可充电设备,其特征在于,包括辅助电源、电池管理系统和如权利要求1-8中任意一项所述的唤醒电路。
- 根据权利要求9所述的可充电设备,其特征在于,所述可充电设备为车辆。
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EP3805034A1 (en) | 2021-04-14 |
EP3805034A4 (en) | 2021-10-06 |
EP3805034B1 (en) | 2023-07-12 |
HUE062975T2 (hu) | 2023-12-28 |
US11824170B2 (en) | 2023-11-21 |
CN210912030U (zh) | 2020-07-03 |
US20210119271A1 (en) | 2021-04-22 |
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