WO2021013044A1 - Circuit connection preservation method, fpga system and storage medium - Google Patents

Circuit connection preservation method, fpga system and storage medium Download PDF

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Publication number
WO2021013044A1
WO2021013044A1 PCT/CN2020/102440 CN2020102440W WO2021013044A1 WO 2021013044 A1 WO2021013044 A1 WO 2021013044A1 CN 2020102440 W CN2020102440 W CN 2020102440W WO 2021013044 A1 WO2021013044 A1 WO 2021013044A1
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Prior art keywords
circuit
circuit connection
information
starting
port
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PCT/CN2020/102440
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French (fr)
Chinese (zh)
Inventor
何杰
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深圳市紫光同创电子有限公司
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Priority to JP2020566599A priority Critical patent/JP7062793B2/en
Publication of WO2021013044A1 publication Critical patent/WO2021013044A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor

Definitions

  • This application relates to the field of FPGA (Field-Programmable Gate Array), and specifically relates to but not limited to a method for saving circuit connections, an FPGA system and a storage medium.
  • FPGA Field-Programmable Gate Array
  • FPGA is a kind of digital circuit or digital system that can realize almost all types through programming. It is realized by a large number of logic blocks, memory, and DSP (digital signal processor). FPGA has programmable function, can simplify the process of digital circuit design.
  • EDA Electronic Design Automation
  • EDA Electronic Design Automation
  • a tool for designers to use hardware description language or schematic diagram to implement circuit design on a software platform It can automatically complete logic compilation, comprehensive optimization, layout, routing and simulation, until the end Generate bit streams and perform programming downloads. It can help the designer to more conveniently view the situation of each stage in the whole process, make timely adjustments, and finally simulate the arrangement and connection of the circuit design on the FPGA chip in the tool. Designing with EDA tools greatly improves the efficiency, reliability and operability of circuit design, reduces the designer's labor intensity, and reduces the difficulty of circuit design.
  • the method for saving circuit connections, the FPGA system and the storage medium provided by the embodiments of the present application mainly solve the technical problem that the existing method for saving circuit connections in a circuit consumes a lot of memory resources.
  • an embodiment of the present application provides a method for saving circuit connections, including: establishing circuit connection models for various types of circuit connections in the circuit; starting points for multiple circuit connections in the same type of circuit connection
  • the device, the end device, and the start port and end port connected to the circuit connection are all the same;
  • the circuit connection model includes the information of the start port, the end port, the information of the start device, and the end port.
  • the information of the terminal device; the starting device is a device connected to the starting point of the circuit connection, the end device is a device connected to the terminal of the circuit connection; based on the circuit connection model, save all The circuit wiring in the circuit.
  • an embodiment of the present application also provides an FPGA system, including a processor, a memory, and a communication bus; the communication bus is used to implement connection and communication between the processor and the memory; the processor is used to execute the memory
  • One or more computer programs stored in the computer program to implement the steps of the circuit connection saving method described in the first aspect are used to implement the steps of the circuit connection saving method described in the first aspect.
  • An embodiment of the present application further provides a storage medium, the storage medium stores one or more computer programs, and the one or more computer programs can be executed by one or more processors, so as to realize as described in the first aspect The steps of the circuit wiring preservation method.
  • the embodiment of the application uses a method for saving circuit connections, an FPGA system, and a storage medium, and addresses the problem that circuit connections in existing saving circuits consume a large amount of memory resources, and establishes circuit connections for various types of circuit connections in the circuit.
  • Line model where in the same type of circuit connection, the start device, end device, start port port and end port of multiple circuit connections are the same.
  • the circuit connection model includes the start port port of a certain type of circuit connection Information, terminal port information, starting device information, and terminal device information. That is to say, in this application, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model.
  • the classification is based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction.
  • FIG. 1 is a schematic flowchart of a method for saving circuit connections according to Embodiment 1 of the application;
  • FIG. 3 is a schematic flowchart of a method for saving circuit connections according to Embodiment 2 of the application;
  • FIG. 6 is a diagram of the module relationship of the FPGA system according to the third embodiment of the application.
  • the EDA tool when the EDA tool saves the circuit connections of its circuit resources, it usually saves all the circuit connections in the circuit one by one. As the scale of the circuit design becomes larger and larger, the circuit needs to be used. There are also more and more layout resources and connection resources, especially the explosive growth of connection resources. Therefore, adopting the existing method of saving circuit wiring will cause a large amount of memory resources to be occupied.
  • this embodiment proposes a circuit connection protection method, which is applied to an EDA tool. As shown in FIG. 1, the circuit connection preservation method includes:
  • the starting point of the circuit connection is called the starting point
  • the end point of the circuit connection is called the end point
  • the starting device is the device connected to the starting point of the circuit connection
  • the end device is the end point connected to the circuit connection.
  • the start port is the port connected to the start of the circuit connection in the start device
  • the end port is the port connected to the end of the circuit connection in the end device.
  • the same type of circuit wiring it may be multiple circuit wirings with the same starting device, end device, and connected port. That is to say, if there are multiple circuit connections of the same type of start device, end device, start port, and end port in the circuit, the multiple circuit connections are the same type of circuit connection. That is to say, for the same type of circuit wiring, the device connected at the start point and the port of the device, the device connected at the end point and the port of the device are the same.
  • DQS Bi-directional Data Strobe, bi-directional data control pins
  • CIM Circuit Connection 1 and circuit connection 2.
  • net1 and net2 respectively.
  • the start port of net1 is the WL_OV port on DQS1
  • the end port is the S_IY3 port on CIM1
  • the start port of net2 is the WL_OV port on DQS2
  • the end port is the S_IY3 port on CIM2.
  • the start device, start port, end device, and end port of net1 and met2 are the same. Therefore, net1 and net2 belong to the same type of circuit wiring.
  • circuit connections of different lengths have different transmission delays, etc., for the same type of circuit connection, it can also be the relative position of the starting device, the end device, the starting device and the end device of each circuit connection, And the start port and end port are the same. That is to say, if there are a starting device, a terminal device, the relative positions of the starting device and the ending device, and a circuit connection with the same starting port and end port in the circuit, they are the same type of circuit connection.
  • the starting port of net3 Is port a on A1
  • the end port is port b on B1
  • the start port of net4 is port a on A2
  • the end port is port b on B2
  • A1 is on the right side of B1
  • the distance is d
  • A2 is also It is located on the right side of B2 and the distance is also d. Since the relative positions of the starting device, starting port, ending device, ending port, starting device and ending device of net3 and net4 are the same, they belong to the same type Circuit wiring.
  • circuits stored in the EDA tool for example, circuits that implement certain functions, FPGA chip circuits, and so on.
  • circuits stored in the EDA tool in most cases there will be at least two circuit connections of the same type mentioned above. Therefore, in order to reduce the memory resources consumed by the storage circuit connections, in this embodiment,
  • the circuit connection models of various types of circuits in the circuits stored in the EDA tool are established respectively, that is, one circuit connection model corresponds to one type of circuit connection. Among them, for a certain circuit connection model, it includes related information of all circuit connections of a certain type in a certain circuit, and all circuit connections of this type can be recovered based on the circuit connection model.
  • the circuit connection model can include the (related) information of the start port and the (related) information of the end port connected to any type of circuit connection, and the starting device of each circuit connection belonging to the type of circuit connection in the circuit (Relevant) information of and end device (relevant) information.
  • net1 and net2 belong to the same type of circuit connection.
  • the circuit connection of this type in the circuit is only net1 and net2, since net1 and net2 are connected to the same port, their corresponding circuit connection model
  • the information included is: the related information of the WL_OV port of the starting device DQS1 and the starting device DQS2, the related information of the ending device CIM1 and the S_IY3 port of the ending device CIM2, the related information of the starting device DQS1, and the related information of the ending device CIM1, Information about the starting device DQS2 and information about the end device CIM2.
  • the circuit connection model saves the relevant information about the type of circuit connection net1 and net2 in the circuit, and based on the circuit connection model, net1 and net2 can be restored.
  • the circuit connection model can also include the starting device type and end device type of a certain type of circuit connection model.
  • the information included in the corresponding circuit connection model is: the information about the WL_OV port of the starting device DQS1 and the starting device DQS2 , End device CIM1 and end device CIM2 S_IY3 port related information, start device DQS type, end device CIM type, start device DQS1 related information, end device CIM1 related information, start device DQS2 related information, and end point Information about the device CIM2.
  • the circuit connection of the same type is the starting device, the end device, the relative position of the starting device and the end device, and the connected port of each circuit connection are the same, because the relative position of the starting device and the end device of each circuit connection.
  • the related information of the end device can be obtained; or based on the related information of the end device and the relative position of the starting device and the end device, the information of the starting device can be obtained Related Information.
  • the circuit connection model includes: information about the start port of any type of circuit connection, relevant information about the end port, and the relative position information of the start device and end device of this type of circuit connection , The relevant information of the starting device of each circuit connection of this type in the circuit; or, the circuit connection model includes: the relevant information of the starting port of any type of circuit connection, the relevant information of the end port, the The relative position information of the start device and the end device of the circuit connection of the type of circuit, and the related information of the end device of each circuit connection of the type in the circuit.
  • the corresponding circuit connection model will include: net3 starting device A1 related information, net4 starting device A2 related information, Start port a, end port b, the relative position of the start device and the end device: the start device is on the right side of the end device, and the distance between the two is d.
  • the end device B1 can be found according to the relative position of the start device and the end device and the start device A1, and net3 can be restored according to the start port a, the end port b, and the start device A1 and the end device B1.
  • net4 can also be restored.
  • the relative position information of the starting device and the end device can be based on the starting device and the position offset information of the end device relative to the starting device; or it can be based on the end device, and the starting device relative to the end device. information.
  • the related information of the starting device of each circuit connection included in the circuit connection model can be the coordinate information of the starting device
  • the related information of the ending device of each circuit connection can be the coordinate information of the end device
  • the starting device and the The relative position information between the end device may also be the coordinate offset between the start device and the end device.
  • FIG. 2 is a circuit that includes a first circuit connection (net5) 2011, a second circuit connection (net6) 2012, and a third circuit connection (net7) 2013.
  • the coordinates of the start device (SRB1) 2021 of the first circuit connection 2011 are (1,1)
  • the coordinates of the end device (CLMA1) 2031 are (4,5)
  • the start device (SRB2) 2022 of the second circuit connection 2012 The coordinates of is (8,1)
  • the coordinates of the end device (SRB2) 2032 are (11,5)
  • the coordinates of the start device (SRB3) 2023 of the third circuit connection 2013 are (1,7)
  • the coordinates of 2033 are (4,11).
  • the start port of the start device (SRB1) 2021, the start device (SRB2) 2022, and the start device (SRB3) 2023 are collectively referred to as port 1, the end device (SRB1) 2031, the end port of the end device (SRB2) 2032 Collectively referred to as port 2.
  • the information in the above-mentioned type of circuit wiring model includes: the related information of the starting device and/or the CLMA of the ending device, the related information of the starting port 1, the related information of the ending port 2, the relative position information of the starting device and the ending starting point (3,4) (ie horizontal offset 3, vertical offset 4), starting point coordinates (1,1), (8,1), (1,7), based on the circuit model, net5, net6, net7.
  • the information related to the starting device of each circuit connection in the circuit connection model can be a representation obtained by processing the abscissa and ordinate of the starting device based on preset rules
  • the integer of the coordinates of the starting device, and the related information of the ending device of each circuit connection may also be an integer representing the coordinates of the ending device obtained by processing the abscissa and ordinate of the ending device based on a preset rule.
  • the preset rule can be flexibly set according to actual needs.
  • the number of start point devices or end point devices of a type of circuit connection corresponding to a circuit connection model can be flexibly set according to actual needs. For example, in order to ensure the uniqueness of the starting point, the number of starting devices of a certain type of circuit connection corresponding to the circuit connection model is one, and the number of ending devices can be one or at least two.
  • circuit connection model After the circuit connection model is constructed, all relevant information about the circuit connections in the circuit is saved based on the circuit connection model. Among them, all circuit connection models corresponding to the circuit can be stored in an intermediate file.
  • This embodiment provides a method for saving circuit connections by separately establishing circuit connection models for various types of circuit connections in the circuit.
  • the circuit connection model includes the information of the start port, the end port, the information of the start device, and the information of the end device of a certain type of circuit connection. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
  • FIG. 3 is a detailed flowchart of the circuit connection saving method provided by the second embodiment of the application.
  • the circuit connection saving method includes:
  • each block shown as a square includes a circuit module 401, and the circuit module 401 includes a plurality of devices. There may be the same circuit module 401 in each circuit module 401, and it should be understood that there will be circuit connections between the circuit modules 401.
  • the origin of coordinates (0, 0) is established, and the (X, Y) coordinate system is established to the right and upward respectively, and one circuit module 401 is used as a grid point to establish a grid. Point coordinate system, in this way, each grid point has its own grid point coordinates.
  • Figure 5 shows the structure of the internal netlist connection of a grid point in the FPGA chip as shown in Figure 4.
  • the lower left corner of the grid point is the origin (0, 0), and the right and upward directions are respectively established
  • the (X, Y) coordinate system herein referred to as the device coordinate system
  • each small device (device instance) inside the grid point has its own relative coordinates. Any device can be identified based on grid coordinates and device coordinates.
  • the multiple small devices may be the start device 11, the end device 12, and so on.
  • the circuit connections of the same type are: the start device 11, the end device 12, the start port, the end port, and the circuit connections in which the relative positions of the start device and the end device are the same.
  • a circuit connection model corresponds to a type of circuit connection.
  • a circuit connection model includes: information about the starting device of a certain type of circuit connection, information about the end device, information about the start port, and information about the end port. Related information, the relative position of the starting device and the end device, and the coordinate information of the starting device of each circuit connection of the type in the FPGA chip circuit.
  • the relative position of the starting device and the ending device is the coordinate offset of the ending device relative to the starting device
  • the coordinate information of the starting device connected to each circuit is after processing the abscissa and ordinate of the starting device according to preset rules, An integer representing the coordinates of the starting device is obtained.
  • one starting device can be connected to multiple end devices through circuit leads, but multiple starting devices are not allowed to be connected to one end device through circuit leads. That is, each start device is connected to at least one end device through a circuit lead, and each end device is connected to one start device through a circuit lead.
  • the uniqueness of the base point can be guaranteed, and the coordinates of the end device can be found based on the coordinates of the starting device and the coordinate offset. That is to say, the number of the starting device of any circuit connection corresponding to a circuit model is one, and the number of the end device of any circuit connection can be one or at least two. It should be noted that they belong to the same kind. The number of starting devices of each circuit connection of each type is the same, and the number of ending devices is the same.
  • the saving format of the circuit connection model can be as follows:
  • the circuit connection model describes the circuit connection from the WL_OV port of the DQS resource to the S_IY3 port of the CIM resource.
  • the relative coordinates between them are The device where the start port WL_OV is located is the base point, and the coordinate offset of the device where the end port S_IY3 is located relative to the start device is X coordinate offset 4 and Y coordinate offset 2.
  • port A When you want to use circuit wiring in the EDA tool, give port A on any device. Because the device is in the grid coordinate system, it has absolute coordinates relative to the entire FPGA device, and because port A is in The circuit wiring model with its own characteristics has been saved during construction. Therefore, when the circuit wiring connected to port A needs to be obtained, port A can be based on the absolute coordinates of the device where it is located and the start and end points in the circuit wiring model. To find the device information of other nodes in the circuit connection model, and then obtain the corresponding port information according to the node name, so as to construct the required circuit connection (device net).
  • This embodiment provides a method for saving circuit connections by separately establishing circuit connection models for various types of circuit connections in the circuit.
  • the circuit connection model includes the information of the start port, the end port, the information of the start device, and the information of the end device of a certain type of circuit connection. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
  • This embodiment also provides an FPGA system, as shown in FIG. 6, which includes a processor 601, a memory 602, and a communication bus 603.
  • the communication bus 603 is used to implement connection and communication between the processor 601 and the memory 602.
  • the processor 601 is configured to execute one or more computer programs stored in the memory 602 to implement at least one step in the circuit connection saving method in the first embodiment and the second embodiment.
  • This embodiment also provides a storage medium that includes volatile or non-volatile memory implemented in any method or technology for storing information (such as computer-readable instructions, data structures, computer program modules, or other data). Volatile, removable or non-removable media.
  • Storage media include but are not limited to RAM (Random Access Memory), ROM (Read-Only Memory, read-only memory), EEPROM (Electrically Erasable Programmable read only memory), flash memory Or other memory technology, CD-ROM (Compact Disc Read-Only Memory), DVD (digital versatile disk) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or can be used Any other medium that can store desired information and can be accessed by a computer.
  • the storage medium in this embodiment can be used to store one or more computer programs, and the stored one or more computer programs can be executed by a processor to implement the circuit connection saving methods in the first and second embodiments above. step.
  • This embodiment provides an FPGA system and storage medium.
  • the storage medium is used to store one or more computer programs, and then the one or more computer programs are used to establish circuit connection models for various types of circuit connections in the circuit.
  • the start device, end device, start port and end port of multiple circuit connections are the same.
  • the circuit connection model includes the information of the start port and the end port of a certain type of circuit connection. , The information of the starting device and the information of the ending device. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
  • the functional modules/units in the device can be implemented as software (which can be implemented by computer program code executable by a computing device), Firmware, hardware and their appropriate combination.
  • the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may consist of several physical components. The components are executed cooperatively.
  • Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit .

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Abstract

The embodiment of the present application provides a circuit connection preservation method, FPGA system and storage medium, the method respectively establishes circuit connection models for various types of circuit connections in the circuit; in the same type of circuit connection, the start devices, end devices of multiple circuit connections, and the start ports and end ports connected to the circuit connection are the same; the circuit connection model comprises the information of the start port and the end port, and the information of the start device and the end device; the start device is the device connected to the start point of the circuit connection, the end device is the device connected to the end point of the circuit connection, and preserving the circuit connection in the circuit based on the circuit connection model solves the problem that the prior circuit connection preservation occupies a lot of resources, the present invention also provides an apparatus and a storage medium, by implementing the above method, the memory resources consumed by preserving the circuit connection can be reduced.

Description

电路连线保存方法、FPGA系统及存储介质Circuit connection preservation method, FPGA system and storage medium
相关申请的交叉引用Cross references to related applications
本申请要求于2019年07月22日提交中国专利局的申请号为201910662629.5、名称为“一种电路连线保存方法、装置及存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on July 22, 2019, with the application number 201910662629.5 and titled "A method, device and storage medium for circuit connection preservation", the entire content of which is incorporated by reference In this application.
技术领域Technical field
本申请涉及FPGA(Field-Programmable Gate Array,现场可编程门阵列)领域,具体而言,涉及但不限于一种电路连线保存方法、FPGA系统及存储介质。This application relates to the field of FPGA (Field-Programmable Gate Array), and specifically relates to but not limited to a method for saving circuit connections, an FPGA system and a storage medium.
背景技术Background technique
FPGA是一种能通过编程而实现几乎所有类型的数字电路或者数字系统。它是由大量的逻辑块、存储器、DSP(digital signal processor,数字信号处理器)来组成实现。FPGA具有可编程的功能,可以简化数字电路设计的过程。FPGA is a kind of digital circuit or digital system that can realize almost all types through programming. It is realized by a large number of logic blocks, memory, and DSP (digital signal processor). FPGA has programmable function, can simplify the process of digital circuit design.
EDA(Electronic Design Automation,电子设计自动化)工具是设计者在软件平台上用硬件描述语言或原理图来实现电路设计的工具,它可以自动完成逻辑编译、综合优化、布局、布线和仿真,直至最后生成位流和进行编程下载等工作。它可以帮助设计者更方便地查看整个流程中各个阶段的情况,及时做出调整,最终在工具中模拟显示电路设计在FPGA芯片上的排布及连线。通过EDA工具进行设计,极大地提高了电路设计的效率、可靠性以及可操作性,减轻了设计者的劳动强度,降低了电路设计的难度。EDA (Electronic Design Automation) tool is a tool for designers to use hardware description language or schematic diagram to implement circuit design on a software platform. It can automatically complete logic compilation, comprehensive optimization, layout, routing and simulation, until the end Generate bit streams and perform programming downloads. It can help the designer to more conveniently view the situation of each stage in the whole process, make timely adjustments, and finally simulate the arrangement and connection of the circuit design on the FPGA chip in the tool. Designing with EDA tools greatly improves the efficiency, reliability and operability of circuit design, reduces the designer's labor intensity, and reduces the difficulty of circuit design.
发明内容Summary of the invention
本申请实施例提供的一种电路连线保存方法、FPGA系统及存储介质,主要解决的技术问题是现有保存电路中电路连线的方法会耗费大量内存资源的问题。The method for saving circuit connections, the FPGA system and the storage medium provided by the embodiments of the present application mainly solve the technical problem that the existing method for saving circuit connections in a circuit consumes a lot of memory resources.
第一方面,本申请实施例提供一种电路连线保存方法,包括:为电路中各种类型电路连线分别建立电路连线模型;同种类型电路连线中,多个电路连线的起点器件、终点器件及与所述电路连线连接的起点端口和终点端口均相同;所述电路连线模型包括所述起点端口的信息、所述终点端口的信息、所述起点器件的信息和所述终点器件的信息;所述起点器件为与所述电路连线的起点连 接的器件,所述终点器件为与所述电路连线的终点连接的器件;基于所述电路连线模型,保存所述电路中的电路连线。In the first aspect, an embodiment of the present application provides a method for saving circuit connections, including: establishing circuit connection models for various types of circuit connections in the circuit; starting points for multiple circuit connections in the same type of circuit connection The device, the end device, and the start port and end port connected to the circuit connection are all the same; the circuit connection model includes the information of the start port, the end port, the information of the start device, and the end port. The information of the terminal device; the starting device is a device connected to the starting point of the circuit connection, the end device is a device connected to the terminal of the circuit connection; based on the circuit connection model, save all The circuit wiring in the circuit.
第二方面,本申请实施例还提供一种FPGA系统,包括处理器、存储器及通信总线;所述通信总线用于实现处理器和存储器之间的连接通信;所述处理器用于执行所述存储器中存储的一个或者多个计算机程序,以实现第一方面所述的电路连线保存方法的步骤。In the second aspect, an embodiment of the present application also provides an FPGA system, including a processor, a memory, and a communication bus; the communication bus is used to implement connection and communication between the processor and the memory; the processor is used to execute the memory One or more computer programs stored in the computer program to implement the steps of the circuit connection saving method described in the first aspect.
本申请实施例还提供一种存储介质,所述存储介质存储有一个或者多个计算机程序,所述一个或者多个计算机程序可被一个或者多个处理器执行,以实现如第一方面所述的电路连线保存方法的步骤。An embodiment of the present application further provides a storage medium, the storage medium stores one or more computer programs, and the one or more computer programs can be executed by one or more processors, so as to realize as described in the first aspect The steps of the circuit wiring preservation method.
本申请的有益效果是:The beneficial effects of this application are:
本申请实施例通过一种电路连线保存方法、FPGA系统以及存储介质,针对现有保存电路中电路连线会耗费大量内存资源的问题,通过为电路中各种类型电路连线分别建立电路连线模型,其中,同一类型电路连线内,多个电路连线的起点器件、终点器件及起点端口端口、终点端口均相同,电路连线模型中包括某种类型电路连线连接的起点端口端口的信息、终点端口的信息、起点器件的信息和终点器件的信息。也就是说,本申请中,一个电路连线模型中包括一种类型的电路连线的相关信息,并基于电路连线模型保存电路中的各电路连线,这样,相比现有把所有的电路连线全部构造保存下来的方式,本申请中通过基于电路连线的类型进行归类,并基于电路连线的类型保存电路连线,可以节约大量的内存资源,提高用户体验满意度。The embodiment of the application uses a method for saving circuit connections, an FPGA system, and a storage medium, and addresses the problem that circuit connections in existing saving circuits consume a large amount of memory resources, and establishes circuit connections for various types of circuit connections in the circuit. Line model, where in the same type of circuit connection, the start device, end device, start port port and end port of multiple circuit connections are the same. The circuit connection model includes the start port port of a certain type of circuit connection Information, terminal port information, starting device information, and terminal device information. That is to say, in this application, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing The way in which all the structures of circuit connections are preserved, in this application, the classification is based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction.
本申请其他特征和相应的有益效果在说明书的后面部分进行阐述说明,且应当理解,至少部分有益效果从本申请说明书中的记载变的显而易见。Other features and corresponding beneficial effects of this application are described in the latter part of the specification, and it should be understood that at least part of the beneficial effects will become apparent from the description in the specification of this application.
附图说明Description of the drawings
图1为本申请实施例一的电路连线保存方法的流程示意图;FIG. 1 is a schematic flowchart of a method for saving circuit connections according to Embodiment 1 of the application;
图2为本申请实施例一的电路连线在坐标系中的相关信息图;2 is a diagram of related information in the coordinate system of the circuit connection in the first embodiment of the application;
图3为本申请实施例二的电路连线保存方法的流程示意图;FIG. 3 is a schematic flowchart of a method for saving circuit connections according to Embodiment 2 of the application;
图4为本申请实施例二的电路模块在坐标系中的相关信息图;4 is a diagram of related information in the coordinate system of the circuit module in the second embodiment of the application;
图5为本申请实施例二的器件在坐标系中的相关信息图;5 is a diagram of related information in the coordinate system of the device in the second embodiment of the application;
图6为本申请实施例三的FPGA系统的模块关系图。FIG. 6 is a diagram of the module relationship of the FPGA system according to the third embodiment of the application.
具体实施方式Detailed ways
为了使本申请的目的、技术方案及优点更加清楚明白,下面通过具体实施方式结合附图对本申请实施例作进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。In order to make the objectives, technical solutions, and advantages of the present application clearer, the following describes the embodiments of the present application in further detail through specific implementations in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the application, and are not used to limit the application.
随着电路设计规模越来越大,电路中需要使用的各种布局资源和连线资源也越来越多,特别是连线资源更是呈爆炸式增长。爆炸式增长的连线资源不仅耗费了EDA工具的大量内存,并且在表达和运用时也需要耗费大量的内存,为电路连线建模上增加了难度。基于此,本申请提出以下方案:As the scale of circuit design becomes larger and larger, various layout resources and connection resources that need to be used in the circuit are also increasing, and especially the connection resources are exploding. The explosive growth of wiring resources not only consumes a large amount of memory in EDA tools, but also consumes a large amount of memory in expression and application, which increases the difficulty of modeling circuit wiring. Based on this, this application proposes the following solutions:
实施例一:Example one:
现有技术中,EDA工具在保存其电路资源的电路连线时,通常是把电路中的所有电路连线一条一条全部构造保存下来,随着电路设计规模越来越大,电路中需要使用的各种布局资源和连线资源也越来越多,特别是连线资源更是呈爆炸式增长。因此,采用现有保存电路连线的方式会造成大量的内存资源被占用。为了解决该问题,本实施例提出一种电路连线保护方法,应用于EDA工具中,参见图1所示,电路连线保存方法包括:In the prior art, when the EDA tool saves the circuit connections of its circuit resources, it usually saves all the circuit connections in the circuit one by one. As the scale of the circuit design becomes larger and larger, the circuit needs to be used. There are also more and more layout resources and connection resources, especially the explosive growth of connection resources. Therefore, adopting the existing method of saving circuit wiring will cause a large amount of memory resources to be occupied. In order to solve this problem, this embodiment proposes a circuit connection protection method, which is applied to an EDA tool. As shown in FIG. 1, the circuit connection preservation method includes:
S101、为电路中各种类型电路连线分别建立电路连线模型。S101. Establish circuit connection models for various types of circuit connections in the circuit.
可以理解的是,EDA工具中,电路连线的起点称为起点,电路连线的终点称为终点,起点器件为与电路连线的起点连接的器件,终点器件为与电路连线的终点连接的器件,起点端口为起点器件中与电路连线的起点连接的端口,终点端口为终点器件中与电路连线的终点连接的端口。It is understandable that in EDA tools, the starting point of the circuit connection is called the starting point, the end point of the circuit connection is called the end point, the starting device is the device connected to the starting point of the circuit connection, and the end device is the end point connected to the circuit connection. The start port is the port connected to the start of the circuit connection in the start device, and the end port is the port connected to the end of the circuit connection in the end device.
在一些实施例中,对于同种类型的电路连线,其可以是起点器件、终点器件及连接的端口均相同的多个电路连线。也就是说,若电路中存在起点器件、终点器件、起点端口、及终点端口均相同类型的多个电路连线,则多个电路连线为同种类型的电路连线。也就是说,对于同种类型的电路连线,其起点连接的器件以及器件的端口、终点连接的器件以及器件的端口均相同。In some embodiments, for the same type of circuit wiring, it may be multiple circuit wirings with the same starting device, end device, and connected port. That is to say, if there are multiple circuit connections of the same type of start device, end device, start port, and end port in the circuit, the multiple circuit connections are the same type of circuit connection. That is to say, for the same type of circuit wiring, the device connected at the start point and the port of the device, the device connected at the end point and the port of the device are the same.
例如,假设某一电路中,存在两个DQS(Bi-directional Data Strobe,双向数 据控制引脚)和两个CIM,分别记载为DQS1、DQS2、CIM1、CIM2;存在电路连线1和电路连线2,分别记载为net1和net2,net1的起点端口为DQS1上的WL_OV端口、终点端口为CIM1上的S_IY3端口,net2的起点端口为DQS2上的WL_OV端口、终点端口为CIM2上的S_IY3端口,由于net1和met2的起点器件、起点端口、终点器件、终点端口均相同,因此,net1和net2属于同一种类型的电路连线。For example, suppose there are two DQS (Bi-directional Data Strobe, bi-directional data control pins) and two CIMs in a circuit, which are recorded as DQS1, DQS2, CIM1, and CIM2; there are circuit connection 1 and circuit connection 2. Recorded as net1 and net2 respectively. The start port of net1 is the WL_OV port on DQS1, the end port is the S_IY3 port on CIM1, the start port of net2 is the WL_OV port on DQS2, and the end port is the S_IY3 port on CIM2. The start device, start port, end device, and end port of net1 and met2 are the same. Therefore, net1 and net2 belong to the same type of circuit wiring.
由于不同长度的电路连线,其传输时延等不同,因此,对于同种类型的电路连线,其也可以是各电路连线的起点器件、终点器件、起点器件与终点器件的相对位置、及起点端口、终点端口均相同。也就是说,若电路中存在起点器件、终点器件、起点器件与终点器件的相对位置、以及起点端口、终点端口均相同的电路连线,则其为同种类型的电路连线。Because circuit connections of different lengths have different transmission delays, etc., for the same type of circuit connection, it can also be the relative position of the starting device, the end device, the starting device and the end device of each circuit connection, And the start port and end port are the same. That is to say, if there are a starting device, a terminal device, the relative positions of the starting device and the ending device, and a circuit connection with the same starting port and end port in the circuit, they are the same type of circuit connection.
例如,假设某一电路中,存在两个器件A(记为A1、A2)、两个器件B(记为B1、B2)、两条电路连线(记为net3和net4),net3的起点端口为A1上的a端口,终点端口为B1上的b端口,net4的起点端口为A2上的a端口,终点端口为B2上的b端口,且A1在B1的右侧,距离为d,A2也位于B2的右侧,且距离也为d,由于net3和net4的起点器件、起点端口、终点器件、终点端口、起点器件和终点器件之间的相对位置均相同,因此,二者属于同一类型的电路连线。For example, suppose there are two device A (denoted as A1, A2), two device B (denoted as B1, B2), two circuit connections (denoted as net3 and net4) in a certain circuit, and the starting port of net3 Is port a on A1, the end port is port b on B1, the start port of net4 is port a on A2, the end port is port b on B2, and A1 is on the right side of B1, the distance is d, and A2 is also It is located on the right side of B2 and the distance is also d. Since the relative positions of the starting device, starting port, ending device, ending port, starting device and ending device of net3 and net4 are the same, they belong to the same type Circuit wiring.
可以理解的是,EDA工具中,会存储大量的电路,例如,实现某种功能的电路、FPGA芯片电路等。EDA工具内存储的电路中,大多数情况下会存在上述所说的属于同一类型的至少两条电路连线,因此,为了降低存储电路连线所消耗的内存资源,本实施例中,可以为EDA工具内存储的电路中的各种类型的电路连线分别建立电路连线模型,即一个电路连线模型对应一种类型的电路连线。其中,对于某一电路连线模型,其包括中某一电路中某种类型的所有电路连线的相关信息,基于该电路连线模型即可恢复出该种类型的所有电路连线。电路连线模型可以包括与任一类型的电路连线连接的起点端口的(相关)信息和终点端口的(相关)信息、以及电路中属于该种类型电路连线的各电路连线的起点器件的(相关)信息和终点器件的(相关)信息。It is understandable that a large number of circuits are stored in the EDA tool, for example, circuits that implement certain functions, FPGA chip circuits, and so on. In the circuits stored in the EDA tool, in most cases there will be at least two circuit connections of the same type mentioned above. Therefore, in order to reduce the memory resources consumed by the storage circuit connections, in this embodiment, The circuit connection models of various types of circuits in the circuits stored in the EDA tool are established respectively, that is, one circuit connection model corresponds to one type of circuit connection. Among them, for a certain circuit connection model, it includes related information of all circuit connections of a certain type in a certain circuit, and all circuit connections of this type can be recovered based on the circuit connection model. The circuit connection model can include the (related) information of the start port and the (related) information of the end port connected to any type of circuit connection, and the starting device of each circuit connection belonging to the type of circuit connection in the circuit (Relevant) information of and end device (relevant) information.
例如,承接上例,net1和net2属于同一种类型的电路连线,假设电路中该类型的电路连线只有net1和net2,由于net1和net2连接的端口相同,因此,其对应的电路连线模型中包括的信息即为:起点器件DQS1和起点器件DQS2的 WL_OV端口的相关信息、终点器件CIM1和终点器件CIM2的S_IY3端口的相关信息、起点器件DQS1的相关信息、及终点器件CIM1的相关信息、起点器件DQS2的相关信息、及终点器件CIM2相关信息。这样,该电路连线模型即将电路中net1、net2这种类型的电路连线的相关信息保存下来了,基于该电路连线模型,即可恢复出net1和net2。For example, following the above example, net1 and net2 belong to the same type of circuit connection. Assuming that the circuit connection of this type in the circuit is only net1 and net2, since net1 and net2 are connected to the same port, their corresponding circuit connection model The information included is: the related information of the WL_OV port of the starting device DQS1 and the starting device DQS2, the related information of the ending device CIM1 and the S_IY3 port of the ending device CIM2, the related information of the starting device DQS1, and the related information of the ending device CIM1, Information about the starting device DQS2 and information about the end device CIM2. In this way, the circuit connection model saves the relevant information about the type of circuit connection net1 and net2 in the circuit, and based on the circuit connection model, net1 and net2 can be restored.
或者,电路连线模型中还可以包括其对应的某种类型的电路连线模型的起点器件类型和终点器件类型,例如,承接上例,net1和net2属于同一种类型的电路连线,假设电路中该类型的电路连线只有net1和net2,由于net1和net2连接的端口相同,因此,其对应的电路连线模型中包括的信息即为:起点器件DQS1和起点器件DQS2的WL_OV端口的相关信息、终点器件CIM1和终点器件CIM2的S_IY3端口的相关信息、起点器件DQS的类型,终点器件CIM的类型、起点器件DQS1的相关信息、终点器件CIM1的相关信息、起点器件DQS2的相关信息、及终点器件CIM2的相关信息。Alternatively, the circuit connection model can also include the starting device type and end device type of a certain type of circuit connection model. For example, following the above example, net1 and net2 belong to the same type of circuit connection, assuming the circuit There are only net1 and net2 for this type of circuit connection. Since net1 and net2 are connected to the same port, the information included in the corresponding circuit connection model is: the information about the WL_OV port of the starting device DQS1 and the starting device DQS2 , End device CIM1 and end device CIM2 S_IY3 port related information, start device DQS type, end device CIM type, start device DQS1 related information, end device CIM1 related information, start device DQS2 related information, and end point Information about the device CIM2.
若同种类型的电路连线是各电路连线的起点器件、终点器件、起点器件与终点器件的相对位置、及连接的端口均相同,由于各电路连线的起点器件与终点器件的相对位置均相同,基于起点器件的相关信息以及起点器件与终点器件的相对位置即可得知终点器件的相关信息;或基于终点器件相关信息以及起点器件与终点器件的相对位置即可得知起点器件的相关信息。因此,在同种类型的电路连线是电路连线的起点器件、起点端口、终点器件、终点端口、起点器件与终点器件的相对位置这五种因素的相关信息均相同时,为了降低保存电路连线所消耗的内存资源,电路连线模型包括:任一类型的电路连线的起点端口的相关信息、终点端口的相关信息、该种类型电路连线的起点器件与终点器件的相对位置信息、电路中属于该种类型的各电路连线的起点器件的相关信息;或者,电路连线模型包括:任一类型的电路连线连接的起点端口的相关信息、终点端口的相关信息、该种类型电路连线的起点器件与终点器件的相对位置信息、电路中属于该种类型的各电路连线的终点器件的相关信息。这样,基于起点器件的端口的相关信息、终点器件的端口的相关信息、各电路连线的起点器件的相关信息(或终点器件相关信息)、起点器件与终点器件的相对位置信息,即可恢复各电路连线。If the circuit connection of the same type is the starting device, the end device, the relative position of the starting device and the end device, and the connected port of each circuit connection are the same, because the relative position of the starting device and the end device of each circuit connection The same, based on the related information of the starting device and the relative position of the starting device and the end device, the related information of the end device can be obtained; or based on the related information of the end device and the relative position of the starting device and the end device, the information of the starting device can be obtained Related Information. Therefore, when the same type of circuit wiring is the starting device, starting port, ending device, ending port, the relative position of the starting device and the ending device, the relative information of the five factors of the circuit connection is the same, in order to save the circuit The memory resources consumed by the connection. The circuit connection model includes: information about the start port of any type of circuit connection, relevant information about the end port, and the relative position information of the start device and end device of this type of circuit connection , The relevant information of the starting device of each circuit connection of this type in the circuit; or, the circuit connection model includes: the relevant information of the starting port of any type of circuit connection, the relevant information of the end port, the The relative position information of the start device and the end device of the circuit connection of the type of circuit, and the related information of the end device of each circuit connection of the type in the circuit. In this way, based on the related information of the port of the starting device, the related information of the port of the end device, the related information of the starting device (or the related information of the end device) of each circuit connection, and the relative position information of the starting device and the end device, it can be restored The circuit wiring.
例如,承接上例,假设电路中与net3属于同一种类型的电路连线只有net4,则对应建立的电路连线模型中即包括:net3的起点器件A1相关信息,net4的起 点器件A2相关信息,起点端口a,终点端口b,起点器件与终点器件的相对位置:起点器件位于终点器件的右侧,二者之间的距离为d。这样,根据起点器件和终点器件的相对位置和起点器件A1即可查找到终点器件B1,并根据起点端口a,终点端口b,以及起点器件A1和终点器件B1,即可恢复net3。同理,也可恢复net4。For example, following the above example, assuming that there is only net4 in the circuit that is of the same type as net3, the corresponding circuit connection model will include: net3 starting device A1 related information, net4 starting device A2 related information, Start port a, end port b, the relative position of the start device and the end device: the start device is on the right side of the end device, and the distance between the two is d. In this way, the end device B1 can be found according to the relative position of the start device and the end device and the start device A1, and net3 can be restored according to the start port a, the end port b, and the start device A1 and the end device B1. In the same way, net4 can also be restored.
其中,起点器件与终点器件的相对位置信息可以是以起点器件为基点,终点器件相对起点器件的位置偏移信息;或者,也可以是以终点器件为基点,起点器件相对终点器件的位置偏移信息。Among them, the relative position information of the starting device and the end device can be based on the starting device and the position offset information of the end device relative to the starting device; or it can be based on the end device, and the starting device relative to the end device. information.
本实施例中,在为电路中各种类型的电路连线分别建立电路连线模型之前,还可以基于电路在EDA工具中模拟的具体布局,建立坐标系,这样,电路中的每一个器件都有其唯一的坐标,基于坐标即可查找到该器件。其中,可以以该电路的左下角为原点,分别向右和向上建立(X,Y)坐标系。当然,还可以以其他方式来建立坐标系,本申请不作特殊限定。这样,电路连线模型中包括的各电路连线的起点器件的相关信息可以是该起点器件的坐标信息,各电路连线的终点器件的相关信息可以是该终点器件的坐标信息,起点器件与终点器件之间的相对位置信息也可以是起点器件与终点器件间的坐标偏移。In this embodiment, before establishing circuit connection models for various types of circuit connections in the circuit, it is also possible to establish a coordinate system based on the specific layout of the circuit simulated in the EDA tool. In this way, every device in the circuit is With its unique coordinates, the device can be found based on the coordinates. Among them, the lower left corner of the circuit can be used as the origin, and the (X, Y) coordinate system can be established to the right and upward respectively. Of course, the coordinate system can also be established in other ways, which is not specifically limited in this application. In this way, the related information of the starting device of each circuit connection included in the circuit connection model can be the coordinate information of the starting device, and the related information of the ending device of each circuit connection can be the coordinate information of the end device, the starting device and the The relative position information between the end device may also be the coordinate offset between the start device and the end device.
例如,参见图2所示,图2为某一电路,该电路包括第一电路连线(net5)2011,第二电路连线(net6)2012,第三电路连线(net7)2013。第一电路连线2011的起点器件(SRB1)2021的坐标为(1,1)、终点器件(CLMA1)2031的坐标为(4,5),第二电路连线2012的起点器件(SRB2)2022的坐标为(8,1)、终点器件(SRB2)2032的坐标为(11,5),第三电路连线2013的起点器件(SRB3)2023的坐标为(1,7)、终点器件(SRB3)2033的坐标为(4,11)。可以看出,第一电路连线2011、第二电路连线2012、以及第三电路连线2013的终点端口相对起点端口在横向上偏移了3,纵向上偏移了4。也就是说,net5、net6、net7属于同一种类型的电路连线。For example, as shown in FIG. 2, FIG. 2 is a circuit that includes a first circuit connection (net5) 2011, a second circuit connection (net6) 2012, and a third circuit connection (net7) 2013. The coordinates of the start device (SRB1) 2021 of the first circuit connection 2011 are (1,1), the coordinates of the end device (CLMA1) 2031 are (4,5), and the start device (SRB2) 2022 of the second circuit connection 2012 The coordinates of is (8,1), the coordinates of the end device (SRB2) 2032 are (11,5), the coordinates of the start device (SRB3) 2023 of the third circuit connection 2013 are (1,7), the end device (SRB3) ) The coordinates of 2033 are (4,11). It can be seen that the end ports of the first circuit connection 2011, the second circuit connection 2012, and the third circuit connection 2013 are offset by 3 in the lateral direction and 4 in the longitudinal direction relative to the start port. In other words, net5, net6, and net7 belong to the same type of circuit connection.
在此基础上,起点器件(SRB1)2021、起点器件(SRB2)2022、以及起点器件(SRB3)2023的起点端口统称为端口1,终点器件(SRB1)2031、终点器件(SRB2)2032的终点端口统称为端口2。上述类型的电路连线模型中的信息包括:起点器件的相关信息和/或终点器件CLMA的相关信息、起点端口1的相关信息、终点端口2的相关信息、起点器件与终点起点的相对位置信息(3,4)(即横向偏移3,纵向偏移4),起点坐标(1,1)、(8,1)、(1,7),基于该电路模 型,可以恢复出net5、net6、net7。On this basis, the start port of the start device (SRB1) 2021, the start device (SRB2) 2022, and the start device (SRB3) 2023 are collectively referred to as port 1, the end device (SRB1) 2031, the end port of the end device (SRB2) 2032 Collectively referred to as port 2. The information in the above-mentioned type of circuit wiring model includes: the related information of the starting device and/or the CLMA of the ending device, the related information of the starting port 1, the related information of the ending port 2, the relative position information of the starting device and the ending starting point (3,4) (ie horizontal offset 3, vertical offset 4), starting point coordinates (1,1), (8,1), (1,7), based on the circuit model, net5, net6, net7.
其中,为了降低保存电路连线所占用的资源,电路连线模型中各电路连线的起点器件相关信息可以是基于预设规则对该起点器件的横坐标和纵坐标进行处理后得到的一个表征起点器件坐标的整数,各电路连线的终点器件相关信息也可以是基于预设规则对该终点器件的横坐标和纵坐标进行处理后得到的一个表征终点器件坐标的整数。其中,预设规则可以根据实际需要灵活设置,例如,预设则可以是Z=(X<<16)+Y,其中,X为横坐标,Y为纵坐标,Z为处理后的值,用于存储在电路连线模型中。Among them, in order to reduce the resources occupied by saving circuit connections, the information related to the starting device of each circuit connection in the circuit connection model can be a representation obtained by processing the abscissa and ordinate of the starting device based on preset rules The integer of the coordinates of the starting device, and the related information of the ending device of each circuit connection may also be an integer representing the coordinates of the ending device obtained by processing the abscissa and ordinate of the ending device based on a preset rule. Among them, the preset rule can be flexibly set according to actual needs. For example, the preset can be Z=(X<<16)+Y, where X is the abscissa, Y is the ordinate, and Z is the processed value. It is stored in the circuit wiring model.
在一些实施例中,一个电路连线模型对应的一种类型的电路连线的起点器件或终点器件的个数可以根据实际需要灵活设置。例如,为了保证起点的唯一性,电路连线模型对应的某种类型电路连线的起点器件的个数为一个,终点器件的个数可以是一个或至少两个。In some embodiments, the number of start point devices or end point devices of a type of circuit connection corresponding to a circuit connection model can be flexibly set according to actual needs. For example, in order to ensure the uniqueness of the starting point, the number of starting devices of a certain type of circuit connection corresponding to the circuit connection model is one, and the number of ending devices can be one or at least two.
S102、基于电路连线模型,保存电路中的电路连线。S102. Save the circuit connections in the circuit based on the circuit connection model.
本实施例中,在构建电路连线模型之后,基于电路连线模型保存电路中的电路连线的所有相关信息。其中,可以将该电路对应的所有电路连线模型存储在一个中间文件中。In this embodiment, after the circuit connection model is constructed, all relevant information about the circuit connections in the circuit is saved based on the circuit connection model. Among them, all circuit connection models corresponding to the circuit can be stored in an intermediate file.
在基于电路连线模型保存电路中的电路连线之后,在需要加载电路中某一器件的电路连线时,基于电路连线模型即可将电路中该器件的各电路连线的相关信息加载出来。After saving the circuit wiring in the circuit based on the circuit wiring model, when the circuit wiring of a certain device in the circuit needs to be loaded, the relevant information of each circuit wiring of the device in the circuit can be loaded based on the circuit wiring model come out.
本实施例提供一种电路连线保存方法,通过为电路中各种类型电路连线分别建立电路连线模型,其中,同一类型电路连线内,多个电路连线的起点器件、终点器件及起点端口端口、终点端口均相同,电路连线模型中包括某种类型电路连线连接的起点端口端口的信息、终点端口的信息、起点器件的信息和终点器件的信息。也就是说,本实施例中,一个电路连线模型中包括一种类型的电路连线的相关信息,并基于电路连线模型保存电路中的各电路连线,这样,相比现有把所有的电路连线全部构造保存下来的方式,本实施例中通过基于电路连线的类型进行归类,并基于电路连线的类型保存电路连线,可以节约大量的内存资源,提高用户体验满意度。This embodiment provides a method for saving circuit connections by separately establishing circuit connection models for various types of circuit connections in the circuit. Among them, in the same type of circuit connection, multiple circuit connection start devices, end devices, and The start port port and the end port are the same. The circuit connection model includes the information of the start port, the end port, the information of the start device, and the information of the end device of a certain type of circuit connection. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
实施例二:Embodiment two:
为了更好的理解本申请,本实施例结合更加具体的示例进行说明。请参见 图3所示,图3为本申请第二实施例提供的电路连线保存方法的细化流程图,该电路连线保存方法包括:In order to better understand the present application, this embodiment is described in combination with more specific examples. Please refer to FIG. 3. FIG. 3 is a detailed flowchart of the circuit connection saving method provided by the second embodiment of the application. The circuit connection saving method includes:
S301、基于FPGA芯片电路在EDA工具中模拟的具体布局,建立坐标系。S301. Establish a coordinate system based on the specific layout simulated by the FPGA chip circuit in the EDA tool.
参见图4所示,为整个FPGA芯片电路在EDA工具中模拟的具体布局,FPGA芯片电路中,器件具有高度重复的特性。每个如正方形所示的块中都包括一个电路模块401,电路模块401包括多个器件。各电路模块401中可能会存在相同的电路模块401,应当理解的是,各电路模块401之间会存在电路连接。本实施例中,在所有电路模块401整体的左下角,建立坐标原点(0,0),分别向右和向上建立(X,Y)坐标系,以一个电路模块401为一个格点,建立格点坐标系,这样,各格点就有了自己的格点坐标。Refer to Figure 4 for the specific layout of the entire FPGA chip circuit simulated in the EDA tool. In the FPGA chip circuit, the device has highly repetitive characteristics. Each block shown as a square includes a circuit module 401, and the circuit module 401 includes a plurality of devices. There may be the same circuit module 401 in each circuit module 401, and it should be understood that there will be circuit connections between the circuit modules 401. In this embodiment, in the lower left corner of all circuit modules 401 as a whole, the origin of coordinates (0, 0) is established, and the (X, Y) coordinate system is established to the right and upward respectively, and one circuit module 401 is used as a grid point to establish a grid. Point coordinate system, in this way, each grid point has its own grid point coordinates.
参见图5,图5为如图4所示的FPGA芯片中某一格点内部网表连线的结构,同样以该格点的左下角为原点(0,0),向右和向上分别建立(X,Y)坐标系(此处称为器件坐标系),这样,格点内部的每一个小的器件(device instance),分别也有了自己的相对坐标。基于格点坐标和器件坐标即可标识任一器件。多个小的器件可以是起点器件11和终点器件12等。Refer to Figure 5. Figure 5 shows the structure of the internal netlist connection of a grid point in the FPGA chip as shown in Figure 4. Similarly, the lower left corner of the grid point is the origin (0, 0), and the right and upward directions are respectively established The (X, Y) coordinate system (herein referred to as the device coordinate system), in this way, each small device (device instance) inside the grid point has its own relative coordinates. Any device can be identified based on grid coordinates and device coordinates. The multiple small devices may be the start device 11, the end device 12, and so on.
S302、为FPGA芯片电路中各种类型电路连线分别建立电路连线模型。S302: Establish circuit connection models for various types of circuit connections in FPGA chip circuits.
本实施例中,同种类型电路连线为:起点器件11、终点器件12、起点端口、终点端口、起点器件与终点器件的相对位置均相同的电路连线。一个电路连线模型对应一种类型的电路连线,一个电路连线模型中包括:某种类型电路连线的起点器件的相关信息、终点器件的相关信息、起点端口的相关信息、终点端口的相关信息、起点器件与终点器件的相对位置、以及FPGA芯片电路中属于该类型的各电路连线的起点器件的坐标信息。其中,起点器件与终点器件的相对位置为终点器件相对起点器件的坐标偏移,各电路连线的起点器件的坐标信息为根据预设规则对该起点器件的横坐标和纵坐标进行处理后,得到的一个表征起点器件坐标的整数。其中,一个电路连线模型中,可以一个起点器件通过电路引线连接到多个终点器件,但不允许多个起点器件通过电路引线连接到一个终点器件。即,每个起点器件通过电路引线与至少一个终点器件连接,每个终点器件通过电路引线与一个起点器件连接。这样,就可以保证基点的唯一性,从而基于起点器件的坐标和坐标偏移找到终点器件的坐标。也就是说,一个电路模型对应的任一电路连线的起点器件的个数为一个,任一电路连线的终点器件的个数可以是一个或至少两个,需要说明的是,属于同一种类型的各电路连 线的起点器件个数相同,终点器件个数相同。In this embodiment, the circuit connections of the same type are: the start device 11, the end device 12, the start port, the end port, and the circuit connections in which the relative positions of the start device and the end device are the same. A circuit connection model corresponds to a type of circuit connection. A circuit connection model includes: information about the starting device of a certain type of circuit connection, information about the end device, information about the start port, and information about the end port. Related information, the relative position of the starting device and the end device, and the coordinate information of the starting device of each circuit connection of the type in the FPGA chip circuit. Among them, the relative position of the starting device and the ending device is the coordinate offset of the ending device relative to the starting device, and the coordinate information of the starting device connected to each circuit is after processing the abscissa and ordinate of the starting device according to preset rules, An integer representing the coordinates of the starting device is obtained. Among them, in a circuit connection model, one starting device can be connected to multiple end devices through circuit leads, but multiple starting devices are not allowed to be connected to one end device through circuit leads. That is, each start device is connected to at least one end device through a circuit lead, and each end device is connected to one start device through a circuit lead. In this way, the uniqueness of the base point can be guaranteed, and the coordinates of the end device can be found based on the coordinates of the starting device and the coordinate offset. That is to say, the number of the starting device of any circuit connection corresponding to a circuit model is one, and the number of the end device of any circuit connection can be one or at least two. It should be noted that they belong to the same kind. The number of starting devices of each circuit connection of each type is the same, and the number of ending devices is the same.
其中,电路连线模型的保存格式可以如下:Among them, the saving format of the circuit connection model can be as follows:
[NETVIEW BEGIN][NETVIEW BEGIN]
[DRIVERREF WL_OV(STRUCTUREREF(DEVICEREF DQS))0 0][DRIVERREF WL_OV(STRUCTUREREF(DEVICEREF DQS))0 0]
[LOADREF S_IY3(STRUCTUREREF(DEVICEREF CIM))4 2][LOADREF S_IY3(STRUCTUREREF(DEVICEREF CIM))4 2]
[DEVICE BEGIN][DEVICE BEGIN]
8060928 8061417 10420224 10420713 12779520 12780009 15138816 15139305 17498112 17498601 20119552 20120041 22478848 22479337 24838144 24838633 27197440 27197929 29556736 29557225 31916032 31916521 3342825 34275328 34275817 5701632 57021218060928 8061417 10420224 10420713 1279520 1278009 15138816 15139305 17498112 17498601 20119552 20120041 22478848 22479337 24838144 24838633 27197440 27197929 29556736 29572225 27197929 1603231916521 334282557034275328
[DEVICE END][DEVICE END]
[NETVIEW END][NETVIEW END]
上述为一个完整的电路连线模型的数据存储,其中,“[DRIVERREF WL_OV(STRUCTUREREF(DEVICEREF DQS))0 0]”中的“WL_OV”为该类型电路连线的起点端口,“DQS”为该类型电路连线的起点器件,“0 0”为该类型电路连线的起点器件相对基点的坐标偏移(由于基点为起点器件,因此为“0 0”);“[LOADREF S_IY3(STRUCTUREREF(DEVICEREF CIM))4 2]”中的“S_IY3”为该类型电路连线的终点端口,“CIM”为该类型电路连线的终点器件,“4 2”为该类型电路连线的终点器件相对基点的坐标偏移(由于基点为起点器件,因此,相当于终点器件相当于起点器件的坐标偏移),“8060928 8061417 10420224 10420713 12779520 12780009 15138816 15139305 17498112 17498601 20119552 20120041 22478848 22479337 24838144 24838633 27197440 27197929 29556736 29557225 31916032 31916521 3342825 34275328 34275817 5701632 5702121”中的各个整数为属于该类型的各电路连线的起点器件的坐标,此处有27个起点坐标,因此,相当于由27条属于该类型的电路连线。上述例子表示有27根电路连线使用了该电路连线模型,电路连线模型描述的是从DQS资源的WL_OV端口连接到CIM资源的S_IY3端口的电路连线,他们之间的相对坐标是以起点端口WL_OV所在的器件为基点,终点端口S_IY3所在的器件相对起点器件的坐标偏移为X坐标偏移4,Y坐标偏移2。The above is the data storage of a complete circuit connection model, where "WL_OV" in "[DRIVERREF WL_OV(STRUCTUREREF(DEVICEREF DQS))0 0]" is the starting port of this type of circuit connection, and "DQS" is the The starting device of the type circuit connection, "0 0" is the coordinate offset of the starting device of this type of circuit connection relative to the base point (because the base point is the starting device, it is "0 0"); "[LOADREF S_IY3(STRUCTUREREF(DEVICEREF “S_IY3” in CIM)) 4 2]” is the terminal port of this type of circuit connection, “CIM” is the terminal device of this type of circuit connection, and “4 2” is the relative base point of the terminal device of this type of circuit connection (Because the base point is the starting device, it is equivalent to the end device is equivalent to the coordinate offset of the starting device), "8060928 8061417 10420224 10420713 1279520 1280009 15138816 15139305 17498112 17498601 20119552 20120041 22478848 22479337 24838144160 165 572 197927197427 The integers in 3342825 34275328 34275817 5701632 5702121" are the coordinates of the starting device of each circuit connection of this type. There are 27 starting coordinates, so it is equivalent to 27 circuit connections of this type. The above example shows that there are 27 circuit connections using the circuit connection model. The circuit connection model describes the circuit connection from the WL_OV port of the DQS resource to the S_IY3 port of the CIM resource. The relative coordinates between them are The device where the start port WL_OV is located is the base point, and the coordinate offset of the device where the end port S_IY3 is located relative to the start device is X coordinate offset 4 and Y coordinate offset 2.
S303、基于电路连线模型保存FPGA芯片电路中的电路连线。S303: Save the circuit connections in the FPGA chip circuit based on the circuit connection model.
将所有类型的电路连线对应的电路连线模型存储在一个中间文件中,这样该文件就将整个FPGA芯片的所有的电路连接关系描述出来了。在EDA工具加载电路连线的时候只需要从该中间文件中加载构建连线模型,就可以将FPGA的所有电路连线加载进EDA工具中。Store the circuit connection models corresponding to all types of circuit connections in an intermediate file, so that the file describes all the circuit connection relationships of the entire FPGA chip. When the EDA tool loads the circuit wiring, you only need to load and build the wiring model from the intermediate file, and then all the circuit wiring of the FPGA can be loaded into the EDA tool.
在EDA工具中想要使用电路连线时,给出该任意一个器件上的端口A,因为器件是在格点坐标系中,所以其具有相对于整个FPGA器件的绝对坐标,又因为端口A在构建的时候已经保存了具有自身特征的电路连线模型,所以在需要获取端口A连接的电路连线时,端口A可以根据自身所在器件的绝对坐标以及电路连线模型中起点和终点所在器件之间的坐标偏移,来找到电路连线模型中其他的节点所在的器件信息,然后根据节点名字可以获取其对应的端口信息,从而构建所需要的电路连线(device net)。When you want to use circuit wiring in the EDA tool, give port A on any device. Because the device is in the grid coordinate system, it has absolute coordinates relative to the entire FPGA device, and because port A is in The circuit wiring model with its own characteristics has been saved during construction. Therefore, when the circuit wiring connected to port A needs to be obtained, port A can be based on the absolute coordinates of the device where it is located and the start and end points in the circuit wiring model. To find the device information of other nodes in the circuit connection model, and then obtain the corresponding port information according to the node name, so as to construct the required circuit connection (device net).
本实施例提供一种电路连线保存方法,通过为电路中各种类型电路连线分别建立电路连线模型,其中,同一类型电路连线内,多个电路连线的起点器件、终点器件及起点端口端口、终点端口均相同,电路连线模型中包括某种类型电路连线连接的起点端口端口的信息、终点端口的信息、起点器件的信息和终点器件的信息。也就是说,本实施例中,一个电路连线模型中包括一种类型的电路连线的相关信息,并基于电路连线模型保存电路中的各电路连线,这样,相比现有把所有的电路连线全部构造保存下来的方式,本实施例中通过基于电路连线的类型进行归类,并基于电路连线的类型保存电路连线,可以节约大量的内存资源,提高用户体验满意度。This embodiment provides a method for saving circuit connections by separately establishing circuit connection models for various types of circuit connections in the circuit. Among them, in the same type of circuit connection, multiple circuit connection start devices, end devices, and The start port port and the end port are the same. The circuit connection model includes the information of the start port, the end port, the information of the start device, and the information of the end device of a certain type of circuit connection. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
实施例三:Example three:
本实施例还提供了一种FPGA系统,参见图6所示,其包括处理器601、存储器602及通信总线603。其中:通信总线603用于实现处理器601和存储器602之间的连接通信。处理器601用于执行存储器602中存储的一个或者多个计算机程序,以实现上述实施例一和实施例二中的电路连线保存方法中的至少一个步骤。This embodiment also provides an FPGA system, as shown in FIG. 6, which includes a processor 601, a memory 602, and a communication bus 603. Wherein: the communication bus 603 is used to implement connection and communication between the processor 601 and the memory 602. The processor 601 is configured to execute one or more computer programs stored in the memory 602 to implement at least one step in the circuit connection saving method in the first embodiment and the second embodiment.
本实施例还提供了一种存储介质,该存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、计算机程序模块或其他数据)的任何方法或技术中实施的易失性或非易失性、可移除或不可移除的介质。存储介质包括但不限于RAM (Random Access Memory,随机存取存储器),ROM(Read-Only Memory,只读存储器),EEPROM(Electrically Erasable Programmable read only memory,带电可擦可编程只读存储器),闪存或其他存储器技术、CD-ROM(Compact Disc Read-Only Memory,光盘只读存储器),DVD(数字多功能盘)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置,或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。This embodiment also provides a storage medium that includes volatile or non-volatile memory implemented in any method or technology for storing information (such as computer-readable instructions, data structures, computer program modules, or other data). Volatile, removable or non-removable media. Storage media include but are not limited to RAM (Random Access Memory), ROM (Read-Only Memory, read-only memory), EEPROM (Electrically Erasable Programmable read only memory), flash memory Or other memory technology, CD-ROM (Compact Disc Read-Only Memory), DVD (digital versatile disk) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or can be used Any other medium that can store desired information and can be accessed by a computer.
本实施例中的存储介质可用于存储一个或者多个计算机程序,其存储的一个或者多个计算机程序可被处理器执行,以实现上述实施例一和实施例二中的电路连线保存方法的步骤。The storage medium in this embodiment can be used to store one or more computer programs, and the stored one or more computer programs can be executed by a processor to implement the circuit connection saving methods in the first and second embodiments above. step.
本实施例提供一种FPGA系统及存储介质,通过利用存储介质存储一个或者多个计算机程序,再利用一个或者多个计算机程序为电路中各种类型电路连线分别建立电路连线模型,其中,同一类型电路连线内,多个电路连线的起点器件、终点器件及起点端口端口、终点端口均相同,电路连线模型中包括某种类型电路连线连接的起点端口端口的信息、终点端口的信息、起点器件的信息和终点器件的信息。也就是说,本实施例中,一个电路连线模型中包括一种类型的电路连线的相关信息,并基于电路连线模型保存电路中的各电路连线,这样,相比现有把所有的电路连线全部构造保存下来的方式,本实施例中通过基于电路连线的类型进行归类,并基于电路连线的类型保存电路连线,可以节约大量的内存资源,提高用户体验满意度。This embodiment provides an FPGA system and storage medium. The storage medium is used to store one or more computer programs, and then the one or more computer programs are used to establish circuit connection models for various types of circuit connections in the circuit. In the same type of circuit connection, the start device, end device, start port and end port of multiple circuit connections are the same. The circuit connection model includes the information of the start port and the end port of a certain type of circuit connection. , The information of the starting device and the information of the ending device. That is to say, in this embodiment, a circuit connection model includes information related to one type of circuit connection, and each circuit connection in the circuit is saved based on the circuit connection model. In this way, compared with the existing In this embodiment, the circuit connection is classified based on the type of circuit connection, and the circuit connection is saved based on the type of circuit connection, which can save a lot of memory resources and improve user experience satisfaction. .
可见,本领域的技术人员应该明白,上文中所公开方法中的全部或某些步骤、装置中的功能模块/单元可以被实施为软件(可以用计算装置可执行的计算机程序代码来实现)、固件、硬件及其适当的组合。在硬件实施方式中,在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分;例如,一个物理组件可以具有多个功能,或者一个功能或步骤可以由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器,如中央处理器、数字信号处理器或微处理器执行的软件,或者被实施为硬件,或者被实施为集成电路,如专用集成电路。It can be seen that those skilled in the art should understand that all or some of the steps in the method disclosed above, and the functional modules/units in the device can be implemented as software (which can be implemented by computer program code executable by a computing device), Firmware, hardware and their appropriate combination. In hardware implementations, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may consist of several physical components. The components are executed cooperatively. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit .
以上内容是结合具体的实施方式对本申请实施例所作的进一步详细说明,不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本申请的保护范围。The above content is a further detailed description of the embodiments of the application in combination with specific implementations, and it cannot be considered that the specific implementations of the application are limited to these descriptions. For those of ordinary skill in the technical field to which this application belongs, a number of simple deductions or substitutions can be made without departing from the concept of this application, which should be regarded as falling within the protection scope of this application.

Claims (20)

  1. 一种电路连线保存方法,其特征在于,包括:A method for saving circuit connections, characterized in that it comprises:
    为电路中各种类型电路连线分别建立电路连线模型;同种类型电路连线中,多个电路连线的起点器件、终点器件及与所述电路连线连接的起点端口和终点端口均相同;所述电路连线模型包括所述起点端口的信息、所述终点端口的信息、所述起点器件的信息和所述终点器件的信息;所述起点器件为与所述电路连线的起点连接的器件,所述终点器件为与所述电路连线的终点连接的器件;Establish circuit connection models for various types of circuit connections in the circuit; in the same type of circuit connection, the start device, the end device of multiple circuit connections, and the start port and end port connected to the circuit connection are all The same; the circuit connection model includes the information of the start port, the information of the end port, the information of the start device and the information of the end device; the start device is the start point of the circuit connection A connected device, where the terminal device is a device connected to the terminal of the circuit connection;
    基于所述电路连线模型,保存所述电路中的电路连线。Based on the circuit connection model, the circuit connections in the circuit are saved.
  2. 如权利要求1所述的电路连线保存方法,其特征在于,所述同种类型电路连线中,起点器件与终点器件的相对位置相同。The method for saving circuit connections according to claim 1, wherein in the circuit connections of the same type, the relative positions of the starting device and the end device are the same.
  3. 如权利要求2所述的电路连线保存方法,其特征在于,所述起点器件与所述终点器件的相对位置信息包括所述终点器件相对所述起点器件的位置偏移信息。3. The circuit connection preservation method according to claim 2, wherein the relative position information of the start device and the end device includes position offset information of the end device relative to the start device.
  4. 如权利要求2或3所述的电路连线保存方法,其特征在于,根据任一电路连线的起点器件的信息、以及该电路连线的所述起点器件与所述终点器件的相对位置,得到该电路连线的所述终点器件的信息。The circuit connection preservation method according to claim 2 or 3, wherein, according to the information of the starting device of any circuit connection and the relative position of the starting device and the end device of the circuit connection, Obtain the information of the end device connected to the circuit.
  5. 如权利要求2或3所述的电路连线保存方法,其特征在于,根据任一电路连线的终点器件的信息、以及该电路连线的所述起点器件与所述终点器件的相对位置,得到该电路连线的所述起点器件的信息。The circuit connection preservation method according to claim 2 or 3, characterized in that, according to the information of the terminal device of any circuit connection and the relative position of the starting device and the end device of the circuit connection, Obtain the information of the starting device connected to the circuit.
  6. 如权利要求2或3所述的电路连线保存方法,其特征在于,电路连线模型包括:任一类型的所述电路连线的所述起点端口的信息、所述终点端 口的信息、所述起点器件与所述终点器件的相对位置信息、所述起点器件的信息。The circuit connection preservation method according to claim 2 or 3, wherein the circuit connection model comprises: information of the start port of the circuit connection of any type, information of the end port, and The relative position information of the starting device and the end device, and the information of the starting device.
  7. 如权利要求2或3所述的电路连线保存方法,其特征在于,电路连线模型包括:任一类型的所述电路连线的所述起点端口的信息、所述终点端口的信息、所述起点器件与所述终点器件的相对位置信息、所述终点器件的信息。The circuit connection preservation method according to claim 2 or 3, wherein the circuit connection model comprises: information of the start port of the circuit connection of any type, information of the end port, and The relative position information of the start device and the end device, and the information of the end device.
  8. 如权利要求2所述的电路连线保存方法,其特征在于,所述为电路中各种类型电路连线分别建立电路连线模型之前,所述电路连线保存方法还包括:3. The circuit connection preservation method according to claim 2, wherein before the establishment of circuit connection models for various types of circuit connections in the circuit, the circuit connection preservation method further comprises:
    基于所述电路在电子设计自动化工具中模拟的具体布局,建立坐标系。Based on the specific layout of the circuit simulated in the electronic design automation tool, a coordinate system is established.
  9. 如权利要求8所述的电路连线保存方法,其特征在于,所述电路连线模型包括所述起点器件的信息,所述起点器件的信息包括该起点器件的坐标信息。8. The circuit connection preservation method according to claim 8, wherein the circuit connection model includes the information of the starting point device, and the information of the starting point device includes the coordinate information of the starting point device.
  10. 如权利要求9所述的电路连线保存方法,其特征在于,所述起点器件的信息包括基于预设规则对所述起点器件的横坐标和纵坐标进行处理后,得到的一个表征所述起点器件坐标的整数。The method for saving circuit connections according to claim 9, wherein the information of the starting point device comprises processing the abscissa and the ordinate of the starting point device based on a preset rule, and a result representing the starting point is obtained. Integer of device coordinates.
  11. 如权利要求8所述的电路连线保存方法,其特征在于,所述电路连线模型包括所述终点器件的信息,所述终点器件的信息包括该终点器件的坐标信息。8. The circuit connection preservation method according to claim 8, wherein the circuit connection model includes information of the terminal device, and the information of the terminal device includes coordinate information of the terminal device.
  12. 如权利要求11所述的电路连线保存方法,其特征在于,所述起点器件的信息包括基于预设规则对所述终点器件的横坐标和纵坐标进行处理后,得到的一个表征所述终点器件坐标的整数。The circuit connection preservation method according to claim 11, wherein the information of the starting point device comprises processing the abscissa and the ordinate of the ending point device based on a preset rule, and a result representing the ending point is obtained. Integer of device coordinates.
  13. 如权利要求8-12任一项所述的电路连线保存方法,其特征在于,电路包括多个电路模块;所述基于所述电路在电子设计自动化工具中模拟的具体布局,建立坐标系,包括:The method for saving circuit connections according to any one of claims 8-12, wherein the circuit includes a plurality of circuit modules; said establishing a coordinate system based on the specific layout simulated by the circuit in an electronic design automation tool, include:
    基于所述电路在电子设计自动化工具中模拟的具体布局,根据所述电路模块的排布,建立格点坐标系。Based on the specific layout of the circuit simulated in the electronic design automation tool, a grid point coordinate system is established according to the arrangement of the circuit modules.
  14. 如权利要求13所述的电路连线保存方法,其特征在于,电路模块包括多个器件;所述基于所述电路在电子设计自动化工具中模拟的具体布局,建立坐标系,包括:The method for saving circuit connections according to claim 13, wherein the circuit module includes a plurality of devices; said establishing a coordinate system based on the specific layout of the circuit simulated in an electronic design automation tool includes:
    基于所述电路在电子设计自动化工具中模拟的具体布局,根据所述器件的排布,建立器件坐标系。Based on the specific layout simulated by the circuit in the electronic design automation tool, the device coordinate system is established according to the arrangement of the device.
  15. 如权利要求1所述的电路连线保存方法,其特征在于,每个所述起点器件通过所述电路引线与至少一个所述终点器件连接,每个所述终点器件通过所述电路引线与一个所述起点器件连接。The circuit connection preservation method according to claim 1, wherein each of the starting point device is connected to at least one of the end point devices through the circuit lead, and each of the end point devices is connected to one through the circuit lead. The starting device is connected.
  16. 如权利要求1所述的电路连线保存方法,其特征在于,同一类型的多个所述电路连线的所述起点器件的个数相同,同一类型的多个所述电路连线的所述终点器件的个数相同。5. The circuit connection preservation method according to claim 1, wherein the number of said starting devices of the plurality of said circuit connections of the same type is the same, and the number of said starting devices of the plurality of said circuit connections of the same type The number of end devices is the same.
  17. 如权利要求1所述的电路连线保存方法,其特征在于,所述基于所述电路连线模型保存所述电路中的电路连线之后,所述电路连线保存方法还包括:5. The circuit connection saving method according to claim 1, wherein after the circuit connection in the circuit is saved based on the circuit connection model, the circuit connection saving method further comprises:
    在构建属于所述器件的所述电路连线时,基于所述电路连线模型构建该器件的电路连线。When constructing the circuit wiring belonging to the device, the circuit wiring of the device is constructed based on the circuit wiring model.
  18. 如权利要求1所述的电路连线保存方法,其特征在于,所述电路为 现场可编程逻辑阵列FPGA芯片电路。The method for saving circuit connections according to claim 1, wherein the circuit is a field programmable logic array FPGA chip circuit.
  19. 一种FPGA系统,其特征在于,包括处理器、存储器及通信总线;An FPGA system, which is characterized by comprising a processor, a memory and a communication bus;
    所述通信总线用于实现处理器和存储器之间的连接通信;所述处理器用于执行所述存储器中存储的一个或者多个计算机程序,以实现如权利要求1至10中任一项所述的电路连线保存方法的步骤。The communication bus is used to realize the connection and communication between the processor and the memory; the processor is used to execute one or more computer programs stored in the memory, so as to implement any one of claims 1 to 10 The steps of the circuit wiring preservation method.
  20. 一种存储介质,所述存储介质存储有一个或者多个计算机程序,所述一个或者多个计算机程序可被一个或者多个处理器执行,以实现如权利要求1至18中任一项所述的电路连线保存方法的步骤。A storage medium, the storage medium stores one or more computer programs, and the one or more computer programs can be executed by one or more processors, so as to realize the one described in any one of claims 1 to 18 The steps of the circuit wiring preservation method.
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CN110555233A (en) * 2019-07-22 2019-12-10 深圳市紫光同创电子有限公司 circuit connection storage method, device and storage medium

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