WO2020262198A1 - Ceramic substrate and method for manufacture thereof, composite substrate, circuit substrate and method for manufacture thereof, and method for inspection of circuit substrate - Google Patents

Ceramic substrate and method for manufacture thereof, composite substrate, circuit substrate and method for manufacture thereof, and method for inspection of circuit substrate Download PDF

Info

Publication number
WO2020262198A1
WO2020262198A1 PCT/JP2020/024006 JP2020024006W WO2020262198A1 WO 2020262198 A1 WO2020262198 A1 WO 2020262198A1 JP 2020024006 W JP2020024006 W JP 2020024006W WO 2020262198 A1 WO2020262198 A1 WO 2020262198A1
Authority
WO
WIPO (PCT)
Prior art keywords
ceramic substrate
circuit board
substrate
hole
pair
Prior art date
Application number
PCT/JP2020/024006
Other languages
French (fr)
Japanese (ja)
Inventor
晃正 湯浅
善幸 江嶋
小橋 聖治
西村 浩二
Original Assignee
デンカ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by デンカ株式会社 filed Critical デンカ株式会社
Priority to JP2021526883A priority Critical patent/JPWO2020262198A1/ja
Publication of WO2020262198A1 publication Critical patent/WO2020262198A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits

Definitions

  • the present disclosure relates to a ceramic substrate and its manufacturing method, a composite substrate, a circuit board and its manufacturing method, and an inspection method of the circuit board.
  • Power modules that control large currents are used in fields such as automobiles, electric railways, industrial equipment, and power generation.
  • the circuit board mounted on the power module has an insulating ceramic substrate.
  • a method for manufacturing a circuit board the following techniques as described in Patent Document 1 are known. That is, a composite substrate is formed by joining metal layers on both sides of a ceramic substrate having scribe lines formed on its surface. Then, the metal layer on the surface of the composite substrate is processed into a circuit pattern by etching. After that, the composite substrate is divided along the scribe line to manufacture a plurality of circuit boards.
  • the circuit board is required to have withstand voltage characteristics as an insulating board.
  • a method for inspecting withstand voltage characteristics for example, a method for inspecting in a liquid such as insulating oil is known in order to avoid discharge to the atmosphere.
  • Patent Document 2 proposes a technique for performing a withstand voltage test in a fluorine-based inert liquid.
  • the circuit board of the power module is required to have excellent insulation.
  • a defect such as a scratch is present on the ceramic substrate which is responsible for the insulating property in the circuit board, the insulating property is impaired, so it is necessary to eliminate the defect as much as possible.
  • ceramic substrates are more prone to defects than other materials, so it is difficult to completely eliminate defects. Therefore, it is necessary to inspect the presence or absence of defects by inspection before forming the circuit board and eliminate the ceramic substrate in which the defects are found.
  • the ceramic substrate having even one defect is discarded as a defective product, the yield will decrease. Therefore, even if a ceramic substrate having defects is used, it is considered that if there is a technique for eliminating defective portions with high accuracy, it can greatly contribute to improving the reliability of the circuit board.
  • the present disclosure provides a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the same. Further, the present invention provides a composite substrate capable of obtaining a circuit board having high reliability. Further, a circuit board having high reliability and a method for manufacturing the same are provided. Further, the present invention provides a circuit board inspection method capable of improving the reliability of the circuit board.
  • the ceramic substrate according to one aspect of the present disclosure is a ceramic substrate having a surface partitioned by a plurality of marking lines, and has a defect portion and a through hole in at least one compartment defined by the marking line.
  • the compartment having a defective portion can be detected with high accuracy even after being processed into a circuit board. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, a circuit board having high reliability can be obtained even if a ceramic substrate having a defective portion is used. Although this ceramic substrate has a defective portion, it can be used for manufacturing a circuit board, so that the circuit board can be manufactured with a high yield. That is, the ceramic substrate makes it possible to manufacture a circuit board having high reliability with a high yield.
  • the opening area of the through hole on the surface of the above-mentioned ceramic substrate may be 1200 ⁇ m 2 or more.
  • At least a part of the above-mentioned through hole may be tapered.
  • the brazing material can be easily filled from the surface side having the larger opening. Therefore, the detection accuracy of the defective portion can be further improved.
  • At least a part of the above-mentioned through hole may be filled with a brazing material.
  • the "through hole" in the present disclosure does not necessarily have to be a cavity, and may be filled with a material different from the material constituting the ceramic substrate.
  • the composite substrate according to one aspect of the present disclosure includes a pair of metal substrates arranged so as to face each other, and a ceramic substrate according to any one of the above between the pair of metal substrates. Since this composite substrate includes the above-mentioned ceramic substrate, it is possible to manufacture a circuit board having high reliability with a high yield.
  • the circuit board according to one aspect of the present disclosure includes the ceramic substrate according to any one of the above and a conductor portion arranged so as to face each other with the ceramic substrate interposed therebetween, and the conductor portion is independent for each section. Is provided.
  • Such a circuit board is provided with the above-mentioned ceramic substrate, it can be manufactured with high reliability and a high yield.
  • the method for manufacturing a ceramic substrate according to one aspect of the present disclosure is defined by a step of irradiating the surface of a base material made of ceramics with a laser beam to form a dividing line for dividing the surface into a plurality of sections, and a dividing line.
  • the present invention includes a step of providing a through hole in at least one of the compartments having a defective portion to obtain a ceramic substrate.
  • the above manufacturing method since a through hole is provided in at least one section having a defective portion, the section can be detected with high accuracy. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, even if a ceramic substrate having a defective portion is used for manufacturing a circuit board, a circuit board having high reliability can be obtained. Since the ceramic substrate obtained by this manufacturing method can be used for manufacturing a circuit board even if it has a defective portion, the circuit board can be manufactured with a high yield. That is, the above-mentioned method for manufacturing a ceramic substrate makes it possible to manufacture a circuit board having high reliability with a high yield.
  • the method for manufacturing a circuit board includes a step of laminating a pair of metal substrates so as to sandwich the ceramic substrate obtained by the above-mentioned manufacturing method to obtain a composite substrate, and a part of the metal substrate in the composite substrate. It has a step of forming an independent conductor portion for each section and a step of applying a voltage between a pair of conductor portions sandwiching a ceramic substrate to measure a current.
  • a voltage is applied between a pair of conductor portions sandwiching a ceramic substrate having a through hole in at least one compartment having a defective portion to measure a current. Therefore, it is possible to detect a defective portion of the ceramic substrate and a compartment having a through hole with high accuracy. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, even if a ceramic substrate having a defective portion is used for manufacturing a circuit board, a circuit board having high reliability can be manufactured. In this manufacturing method, even if the ceramic substrate has a defective portion, it can be used for manufacturing the circuit board, so that the circuit board can be manufactured with a high yield. That is, this method for manufacturing a circuit board makes it possible to manufacture a highly reliable circuit board with a high yield.
  • the circuit board inspection method is the circuit board inspection method described above, and includes a step of applying a voltage between at least a pair of conductor portions sandwiching the ceramic substrate and measuring a current. Since the ceramic substrate has a through hole in at least one section having a defect, the section having a defect can be detected with high accuracy. Therefore, a circuit board with high reliability can be obtained. Further, even if the ceramic substrate has a defective portion, it can be used for manufacturing the circuit board, so that the circuit board can be manufactured with a high yield. That is, the above-mentioned circuit board inspection method makes it possible to manufacture a highly reliable circuit board with a high yield.
  • a method for inspecting a circuit board according to another aspect of the present disclosure is a partition portion which is arranged so as to face each other with a ceramic substrate sandwiched between a ceramic substrate having a surface partitioned by a partition line and defined by the partition line. It is a method of inspecting a conductor portion independently provided for each and a circuit board provided, and includes a step of applying a voltage between a pair of conductor portions sandwiching a ceramic substrate and measuring a current for each compartment.
  • a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the ceramic substrate. Further, it is possible to provide a composite substrate capable of obtaining a circuit board having high reliability. Further, it is possible to provide a circuit board having high reliability and a method for manufacturing the same. Further, it is possible to provide a method for inspecting a circuit board that can improve the reliability of the circuit board.
  • FIG. 1 is a perspective view of a ceramic substrate according to an embodiment.
  • FIG. 2 is a sectional view taken along line II-II of FIG.
  • FIG. 3 is a sectional view taken along line III-III of FIG.
  • FIG. 4 is a perspective view of the composite substrate according to the embodiment.
  • FIG. 5 is a perspective view of the circuit board according to the embodiment.
  • FIG. 6 is a perspective view showing an example of a ceramic substrate coated with a brazing material.
  • FIG. 7 is a perspective view showing an example of a composite substrate having a resist pattern formed on its surface.
  • FIG. 8 is a diagram showing an example of an inspection device for measuring a leakage current of a circuit board.
  • FIG. 9 is a photograph of an optical microscope image showing the surface and through holes of the ceramic substrate of Experimental Example 3.
  • FIG. 1 is a perspective view of a ceramic substrate according to an embodiment.
  • the ceramic substrate 100 of FIG. 1 has a flat plate shape.
  • the surface 100A of the ceramic substrate 100 is divided into a plurality of parts by a dividing line.
  • marking lines On the surface 100A, as marking lines, a plurality of marking lines L1 extending along the first direction and arranging at equal intervals, extending along a second direction orthogonal to the first direction, and the like, etc.
  • a plurality of lane markings L2 arranged at intervals are provided.
  • the lane marking L1 and the lane marking L2 are orthogonal to each other.
  • the lane markings L1 and L2 may be formed by arranging a plurality of recesses in a straight line, or may be formed by linear grooves. Specifically, it may be a scribe line formed by laser light. Examples of the laser source include a carbon dioxide laser and a YAG laser. A scribe line can be formed by intermittently irradiating a laser beam from such a laser source.
  • the lane markings L1 and L2 do not have to be arranged at equal intervals, and are not limited to orthogonal lines. Further, it may be curved instead of straight, or it may be bent.
  • FIG. 2 is a sectional view taken along line II-II of FIG. 1
  • FIG. 3 is a sectional view taken along line III-III of FIG.
  • the partition 10 includes a region of the front surface 100A surrounded by the division lines L1 and L2, a region of the back surface 100B corresponding to the region, and ceramics from the division lines L1 and L2. It is composed of a three-dimensional region surrounded by virtual lines VL1 and VL2 drawn parallel to the thickness direction of the substrate 100. That is, the ceramic substrate 100 has a plurality of compartments 10 defined by the marking line L1 and the marking line L2. Of the plurality of compartments 10, the compartment 10a has a defect 11 and a through hole 12.
  • the through hole 12 penetrates the ceramic substrate 100 in the thickness direction, and is formed by using, for example, a laser beam or a drill.
  • the through hole 12 may be formed by hollowing out a columnar shape. However, it is not limited to the cylindrical shape.
  • the opening area of the through-holes 12 in the surface 100A and rear surface 100B may be for example 1200 [mu] m 2 or more, may be at 5000 .mu.m 2 or more, may be 7000Myuemu 2 or more.
  • the opening area of the through hole 12 may be 0.5 mm 2 or less from the viewpoint of reducing the time required for forming the through hole 12.
  • a part of the through hole 12 may be formed in a tapered shape so as to be narrowed along the thickness direction of the ceramic substrate 100, for example. That is, the through hole 12 may have a tapered portion whose hole diameter changes along the thickness direction of the ceramic substrate 100. The entire through hole 12 may be formed in a tapered shape.
  • the brazing material can be smoothly filled by applying the brazing material from the side having the larger opening area of the through holes 12. If the through hole 12 is filled with a brazing material, the defective portion 11 can be detected with higher accuracy.
  • the defective portion 11 is a circuit board that causes a leakage current, and examples thereof include cracks and dents such as holes and scratches.
  • the defective portion 11 is different from the through hole 12, and appears on the surface 100A in the present embodiment.
  • the shape is not limited to this, and for example, a crack may reach from the front surface 100A to the back surface 100B on the opposite side. That is, the defective portion may or may not be exposed on the front surface 100A or the back surface 100B.
  • Unexposed defects can be detected by, for example, non-destructive inspection. From the viewpoint of ease of detection by visual inspection or the like, the defective portion may be exposed on the front surface 100A and / or the back surface 100B of the ceramic substrate 100.
  • FIGS. 1, 2 and 3 show an example in which the marking lines L1 and L2 are formed only on the surface 100A on one side of the ceramic substrate 100
  • the present invention is not limited to this. That is, the marking lines L1 and L2 may also be formed on the back surface 100B on the side opposite to the front surface 100A of the ceramic substrate 100.
  • the defective portion 11 and the marking lines L1 and L2 do not need to coexist on the front surface 100A.
  • the defective portion 11 may be exposed only on the back surface 100B, or may exist inside the ceramic substrate 100. May be good.
  • the ceramic substrate may have two or more compartments with defects and through holes. Further, it is not necessary to provide through holes in all the compartments having defects, and for example, through holes may be provided only in the compartments having defects that are visually detected on the front surface 100A and the back surface 100B.
  • the ceramic substrate 100 Since the ceramic substrate 100 has the defective portion 11 and the through hole 12 in the compartment 10a, the compartment 10a having the defective portion 11 can be detected with high accuracy even after being processed into a circuit board. .. Therefore, the partition portion 10a having the defective portion 11 can be eliminated with high accuracy. Therefore, even if the ceramic substrate 100 having the defective portion 11 is used for manufacturing the circuit board, the occurrence of defective products is suppressed, and a circuit board having high reliability can be obtained. As described above, although the ceramic substrate 100 has a defective portion, it can be used for manufacturing a circuit board, so that a circuit board having high reliability can be manufactured with a high yield. That is, the ceramic substrate 100 makes it possible to manufacture a circuit board having high reliability with a high yield.
  • FIG. 4 is a perspective view of the composite substrate according to the embodiment.
  • the composite substrate 200 includes a pair of metal substrates 110 arranged so as to face each other and a ceramic substrate 100 between the pair of metal substrates 110.
  • Examples of the metal substrate 110 include a copper plate.
  • the shape and size of the ceramic substrate 100 and the metal substrate 110 may be the same or different.
  • the metal substrate 110 and the ceramic substrate 100 may be joined by, for example, a brazing material. Since the composite substrate 200 includes the ceramic substrate 100, it is possible to manufacture a circuit board having high reliability with a high yield.
  • the ceramic substrate 100 is made of aluminum nitride and the metal substrate 110 is made of aluminum.
  • FIG. 5 is a perspective view of the circuit board according to the embodiment.
  • the circuit board 300 includes a ceramic substrate 100 and conductor portions 20 arranged so as to face each other with the ceramic substrate 100 interposed therebetween.
  • the conductor portion 20 is independently provided on the front surface 100A and the back surface 100B for each compartment 10. That is, each section 10 is provided with a pair of conductors 20 arranged so as to face each other.
  • the defective portion 11 and the through hole 12 of the ceramic substrate 100 may be covered with the conductor portion 20.
  • the partition portion 10a having the defect portion 11 is provided with the through hole 12, even if the defect portion 11 is fine, the partition portion 10a can be detected with high accuracy. If the circuit board 300 is divided into divisions 10 to form a divided substrate and then the divided substrate including the defective portion 11 is eliminated, a divided substrate not including the defective portion 11 can be obtained. As described above, the ceramic substrate 100 having the defective portion 11 can be used for manufacturing the circuit board, and high reliability can be ensured. Therefore, a circuit board having high reliability can be obtained with a high yield.
  • the ceramic substrate 100 is made of aluminum nitride, and the conductor portion 20 is made of aluminum.
  • a method for manufacturing the ceramic substrate 100 will be described as a method for manufacturing the ceramic substrate according to the embodiment.
  • the method for manufacturing the ceramic substrate 100 is defined by a step of irradiating the surface of a base material made of ceramics with a laser beam to form division lines L1 and L2 for partitioning the surface into a plurality of surfaces, and division lines L1 and L2.
  • a step of providing a through hole 12 in the compartment 10a having the defect portion 11 to obtain the ceramic substrate 100 is provided.
  • a flat plate-shaped ceramic substrate having an outer shape as shown in FIG. 1 is used as the base material composed of ceramics.
  • the type of ceramics is not particularly limited, and examples thereof include carbides, oxides, and nitrides. Specific examples thereof include silicon carbide, alumina, silicon nitride, aluminum nitride and boron nitride.
  • Examples of the laser light that irradiates the surface of the base material include a carbon dioxide gas laser and a YAG laser. By intermittently irradiating the laser beam from such a laser source, scribe lines forming the division lines L1 and L2 are formed. The lane markings L1 and L2 serve as cutting lines when the circuit board 300 is divided in the subsequent process.
  • the through hole 12 is provided in the compartment 10a having the defective portion 11.
  • the through hole 12 is formed by using a laser, a drill, or the like.
  • the size and shape of the through hole 12 are as described above.
  • the defect portion 11 in the ceramic substrate 100 may be detected visually, or may be detected by a non-destructive inspection such as an ultrasonic flaw detection inspection and an infrared inspection. If the defective portion 11 is not detected, the through hole 12 may not be provided. In this way, the ceramic substrate 100 shown in FIGS. 1, 2 and 3 is obtained.
  • the ceramic substrate 100 described above is used as the method for manufacturing the composite substrate according to the embodiment. That is, this manufacturing method includes a step of laminating a pair of metal substrates 110 so as to sandwich the ceramic substrate 100 to obtain a composite substrate.
  • the metal substrate 110 may have a flat plate shape similar to that of the ceramic substrate 100.
  • the pair of metal substrates 110 are joined to the front surface 100A and the back surface 100B of the ceramic substrate 100, respectively, via a brazing material.
  • a paste-like brazing material is applied to the front surface 100A and the back surface 100B of the ceramic substrate 100 by a method such as a roll coater method, a screen printing method, or a transfer method.
  • the brazing material contains, for example, metal components such as silver and titanium, an organic solvent, a binder and the like.
  • the viscosity of the brazing filler metal may be, for example, 5 to 20 Pa ⁇ s.
  • the content of the organic solvent in the brazing material may be, for example, 5 to 25% by mass, and the content of the binder amount may be, for example, 2 to 15% by mass.
  • FIG. 6 is a perspective view showing the ceramic substrate 100 coated with the brazing material 40.
  • FIG. 6 shows only the front surface 100A side, the brazing material 40 may be similarly coated on the back surface 100B side.
  • a metal substrate 110 is attached to the front surface 100A and the back surface 100B of the ceramic substrate 100 coated with the brazing material 40 in this way to obtain a bonded body.
  • the bonded body is heated in a heating furnace to sufficiently bond the ceramic substrate 100 and the metal substrate 110 to obtain the composite substrate 200 shown in FIG.
  • the heating temperature may be, for example, 700 to 900 ° C.
  • the atmosphere in the furnace may be an inert gas such as nitrogen.
  • the joint may be heated under reduced pressure below atmospheric pressure or under vacuum.
  • the heating furnace may be a continuous type that heats a plurality of joints while continuously supplying them, or may be a type that heats one or a plurality of joints in a batch type.
  • the heating of the joint may be performed while pressing the joint in the stacking direction.
  • a part of the metal substrate 110 in the composite substrate 200 is removed to form an independent conductor portion 20 for each compartment 10.
  • Perform the process. This step may be performed, for example, by photolithography. Specifically, first, as shown in FIG. 7, a resist having photosensitivity is printed on the surface 200A of the composite substrate 200. Then, a resist pattern having a predetermined shape is formed by using an exposure apparatus. The resist may be a negative type or a positive type. The uncured resist is removed, for example, by washing.
  • FIG. 7 is a perspective view showing the composite substrate 200 in which the resist pattern 30 is formed on the surface 200A. Although FIG. 7 shows only the front surface 200A side, a similar resist pattern is formed on the back surface 200B side. The resist pattern 30 is formed on the front surface 200A and the back surface 200B in a region corresponding to each section 10 of the ceramic substrate 100.
  • the portion of the metal substrate 110 that is not covered by the resist pattern 30 is removed by etching. As a result, the front surface 100A and the back surface 100B of the ceramic substrate 100 are exposed in the portion. After that, the resist pattern 30 is removed to form an independent conductor portion 20 for each compartment 10. As shown in FIG. 5, the conductor portions 20 are formed so as to form a pair with the ceramic substrate 100 sandwiched between the compartments 10.
  • the circuit board 300 as shown in FIG. 5 can be obtained.
  • a step (inspection step) of applying a voltage between the pair of conductor portions 20 sandwiching the ceramic substrate 100 and measuring the current is performed. Specifically, a voltage is applied between a pair of conductor portions 20 sandwiching the ceramic substrate 100 to measure the current. This measurement may be performed for each section 10. As a result, the partition portion 10a having the defective portion 11 and the through hole 12 is detected.
  • FIG. 8 is a diagram schematically showing an example of an inspection device that inspects dielectric breakdown by measuring the leakage current of the circuit board 300.
  • the inspection device 400 includes an AC power supply 60 and a withstand voltage tester 50 connected to the AC power supply 60.
  • One terminal of the withstand voltage tester 50 is electrically connected to a conductive support portion 72a that contacts one of the pair of conductor portions 20 formed in the partition portion 10.
  • the other terminal of the withstand voltage tester 50 is electrically connected to the conductive support portion 72b that contacts the other of the pair of conductor portions 20 via the electrode 70 arranged in the insulating solvent tank 77 that stores the solvent 76.
  • the electrodes 70 are arranged along the bottom surface and one side surface of the insulating solvent tank 77. As shown in FIG. 8, the electrode 70 has an L-shape when viewed in the vertical cross section.
  • Two insulating support portions 74 are installed on the electrode 70 adjacent to the conductive support portion 72b. The two insulating support portions 74 are in contact with the two conductor portions 20 arranged adjacent to the conductor portion 20 electrically connected to the conductive support portion 72b, respectively, and support the circuit board 300 in the solvent 76. There is.
  • the electrodes 70 and the conductive support portions 72a and 72b for example, those made of oxygen-free copper can be used.
  • the solvent 76 for example, a fluorine-based inert liquid can be used.
  • the withstand voltage tester 50 a commercially available one can be used.
  • the positions of the insulating support portion 74 and the conductive support portion 72b are configured to be interchangeable according to the position of the partition portion 10 to be measured.
  • the position of the conductive support portion 72a is also configured to be movable according to the position of the conductive support portion 72b.
  • the inspection device 400 applies a voltage of, for example, 1500 to 6000 V between the pair of conductor portions 20 sandwiching the ceramic substrate 100, and measures the presence or absence of leakage current in the withstand voltage tester 50. Since the compartment 10a having the defective portion 11 has the through hole 12, a leakage current occurs even at a low voltage. Therefore, the compartment 10a can be detected with high accuracy by an inspection method that detects the presence or absence of a leakage current at a predetermined voltage.
  • an inspection device 400 it is possible to perform an inspection method including a step of applying a voltage between a pair of conductor portions 20 sandwiching a ceramic substrate 100 and measuring a current for each partition portion 10.
  • the inspection device is not limited to the configuration shown in FIG. 8, and is an inspection capable of measuring the current flowing between the conductor portions when a voltage is applied between the pair of conductor portions arranged opposite to each other in at least one compartment. Any device can be used without particular limitation.
  • the inspection device 400 is not limited to the inspection of the circuit board 300 including the ceramic substrate 100 on which the through hole 12 is formed, and can be used for the inspection of various circuit boards having independent conductors for each section. With such an inspection method using the inspection device 400, it is possible to easily detect a section having a defect portion contained in the ceramic substrate with high accuracy. Therefore, the reliability and productivity of the circuit board 300 can be improved.
  • the inspected circuit board 300 is cut along the lane markings L1 and L2 and divided into a plurality of divided boards. If the divided substrate having a through hole is eliminated and the divided substrate having no through hole is commercialized or semi-finished as a component used for, for example, a power module, it is possible to avoid using the divided substrate having a defect as a component, and the component. It is possible to increase the reliability as. For example, electronic components are mounted on the conductor portion 20 of the divided substrate.
  • each compartment 10 does not have to be the same, and each compartment 10 may have a different shape.
  • a plurality of pairs may be simultaneously performed.
  • Any surface treatment may be applied to the conductor portion 20 of the circuit board 300.
  • a part of the surface of the conductor portion 20 may be covered with a protective layer such as a solder resist, and the other portion of the surface of the conductor portion 20 may be plated.
  • Such surface treatment may be performed before the inspection using the inspection device 400, or may be performed after the inspection.
  • FIG. 9 is a photograph of an optical microscope image showing the surface and through holes of the ceramic substrate of Experimental Example 3.
  • a brazing material containing Ag as a main component was applied to the front surface and the back surface of the ceramic substrate by a screen printing method.
  • the copper plate and the ceramic substrate were laminated so that each ceramic substrate was sandwiched between two copper plates (thickness 0.8 mm).
  • a bonded body including a copper plate, a ceramic substrate, and a copper plate in this order was produced.
  • An AC20kV withstand voltage tester (model: 7473) manufactured by Measurement Technology Laboratory Co., Ltd. was used for this inspection.
  • As the solvent perfluorocarbon (manufactured by 3M Japan Ltd., trade name: Fluorinert, model number: FC-3283) was used.
  • An inspection jig manufactured by Onishi Electronics Co., Ltd. was used as the insulating solvent tank 77, the electrode 70, the conductive support portions 72a and 72b, and the insulating support portion 74.
  • the electrodes 70 were made of oxygen-free copper
  • the conductive supports 72a and 72b were made of carbon tool steel (SK material) plated with rhodium.
  • the voltage was boosted to 4.2 kV at a speed of 0.12 kV / sec.
  • the threshold value of the contact current was set to 9.99 mA, and the case where a current exceeding this threshold value flowed was determined to be dielectric breakdown.
  • the voltage when it is determined to be dielectric breakdown is shown in the column of "Withstand voltage inspection result" in Table 1.
  • the through hole of Experimental Example 1 had a columnar shape.
  • the through holes of Experimental Examples 2 and 3 had a tapered portion inside the ceramic substrate whose hole diameter changed along the thickness direction of the ceramic substrate.
  • Table 1 " ⁇ 0 kV" indicates that the leakage current value becomes equal to or higher than the above-mentioned predetermined value immediately after the application of the voltage is started.
  • Experimental Example 1 No. In No. 3, the ceramic substrate was dielectrically broken down at the voltages shown in Table 1.
  • the leakage current value became equal to or higher than the above-mentioned predetermined value before the voltage reached 4.2 kV. From this result, it was confirmed that the substrate (partition) having a defect can be detected with high accuracy by forming the through hole.
  • a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the ceramic substrate are provided. Further, a composite substrate capable of obtaining a circuit board having high reliability is provided. Further, a circuit board having high reliability and a method for manufacturing the same are provided. Further, a method for inspecting a circuit board that can improve the reliability of the circuit board is provided.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

Provided is a ceramic substrate 100 having an obverse surface 100A partitioned by partition lines L1, L2 into a plurality of partitioned parts, the ceramic substrate having a defect part 11 and a through hole 12 in at least one partitioned part 10 demarcated by the partition lines L1, L2. The aperture area of the through hole 12 on the obverse surface 100A is 1200μm2 or more.

Description

セラミックス基板及びその製造方法、複合基板、回路基板及びその製造方法、並びに回路基板の検査方法Ceramic substrate and its manufacturing method, composite substrate, circuit board and its manufacturing method, and circuit board inspection method
 本開示は、セラミックス基板及びその製造方法、複合基板、回路基板及びその製造方法、並びに回路基板の検査方法に関する。 The present disclosure relates to a ceramic substrate and its manufacturing method, a composite substrate, a circuit board and its manufacturing method, and an inspection method of the circuit board.
 自動車、電鉄、産業用機器、及び発電関係等の分野には、大電流を制御するパワーモジュールが用いられている。パワーモジュールに搭載される回路基板は、絶縁性のセラミックス基板を有する。回路基板の製造方法としては、特許文献1に記載されるような以下の技術が知られている。すなわち、表面にスクライブラインが形成されているセラミックス基板の両面に金属層を接合して複合基板を形成する。そして、複合基板の表面の金属層をエッチングにより回路パターンに加工する。その後、スクライブラインに沿って複合基板を分割し複数の回路基板を製造する。 Power modules that control large currents are used in fields such as automobiles, electric railways, industrial equipment, and power generation. The circuit board mounted on the power module has an insulating ceramic substrate. As a method for manufacturing a circuit board, the following techniques as described in Patent Document 1 are known. That is, a composite substrate is formed by joining metal layers on both sides of a ceramic substrate having scribe lines formed on its surface. Then, the metal layer on the surface of the composite substrate is processed into a circuit pattern by etching. After that, the composite substrate is divided along the scribe line to manufacture a plurality of circuit boards.
 回路基板は、絶縁基板として耐電圧特性が要求される。耐電圧特性を検査する方法としては、例えば、大気への放電を避けるため、絶縁油等の液体中で検査する方法知られている。特許文献2では、フッ素系不活性液体中で耐電圧検査をする技術が提案されている。 The circuit board is required to have withstand voltage characteristics as an insulating board. As a method for inspecting withstand voltage characteristics, for example, a method for inspecting in a liquid such as insulating oil is known in order to avoid discharge to the atmosphere. Patent Document 2 proposes a technique for performing a withstand voltage test in a fluorine-based inert liquid.
特開2007-324301号公報JP-A-2007-324301 特開2016-183923号公報Japanese Unexamined Patent Publication No. 2016-183923
 パワーモジュールの回路基板は絶縁性に優れることが求められる。ここで、回路基板において絶縁性を担うセラミックス基板に傷等の欠陥が存在すると、絶縁性が損なわれてしまうため、欠陥を極力排除する必要がある。一方で、セラミックス基板は、他の材料に比べて欠陥が発生し易いため、欠陥を完全に無くすことは困難である。このため、回路基板を形成する前の検査によって欠陥の有無を検査し、欠陥が発見されたセラミックス基板を排除する必要がある。一方で、欠陥が一つでも存在したセラミックス基板を不良品として廃棄すると、歩留まりが低下してしまう。このため、欠陥が存在するセラミックス基板を用いても、高い精度で不良部分を排除する技術があれば、回路基板の信頼性向上に大きく貢献できると考えられる。 The circuit board of the power module is required to have excellent insulation. Here, if a defect such as a scratch is present on the ceramic substrate which is responsible for the insulating property in the circuit board, the insulating property is impaired, so it is necessary to eliminate the defect as much as possible. On the other hand, ceramic substrates are more prone to defects than other materials, so it is difficult to completely eliminate defects. Therefore, it is necessary to inspect the presence or absence of defects by inspection before forming the circuit board and eliminate the ceramic substrate in which the defects are found. On the other hand, if the ceramic substrate having even one defect is discarded as a defective product, the yield will decrease. Therefore, even if a ceramic substrate having defects is used, it is considered that if there is a technique for eliminating defective portions with high accuracy, it can greatly contribute to improving the reliability of the circuit board.
 そこで、本開示は、高い信頼性を有する回路基板を得ることが可能なセラミックス基板及びその製造方法を提供する。また、高い信頼性を有する回路基板を得ることが可能な複合基板を提供する。また、高い信頼性を有する回路基板及びその製造方法を提供する。また、回路基板の信頼性を向上することが可能な回路基板の検査方法を提供する。 Therefore, the present disclosure provides a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the same. Further, the present invention provides a composite substrate capable of obtaining a circuit board having high reliability. Further, a circuit board having high reliability and a method for manufacturing the same are provided. Further, the present invention provides a circuit board inspection method capable of improving the reliability of the circuit board.
 本開示の一側面に係るセラミックス基板は、区画線で複数に区画された表面を有するセラミックス基板であって、区画線で画定される少なくとも一つの区画部に、欠陥部と貫通孔とを有する。 The ceramic substrate according to one aspect of the present disclosure is a ceramic substrate having a surface partitioned by a plurality of marking lines, and has a defect portion and a through hole in at least one compartment defined by the marking line.
 このようなセラミックス基板は、一つの区画部に欠陥部と貫通孔とを有することから、回路基板に加工した後であっても、欠陥部を有する区画部を高い精度で検知することができる。このため、欠陥部を有する区画部を高い精度で排除することができる。したがって、欠陥部を有するセラミックス基板を用いても、高い信頼性を有する回路基板を得ることができる。このセラミックス基板は欠陥部を有するにもかかわらず、回路基板の製造に用いることができるため、回路基板を高い歩留まりで製造することができる。すなわち、上記セラミックス基板は、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 Since such a ceramic substrate has a defective portion and a through hole in one compartment, the compartment having a defective portion can be detected with high accuracy even after being processed into a circuit board. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, a circuit board having high reliability can be obtained even if a ceramic substrate having a defective portion is used. Although this ceramic substrate has a defective portion, it can be used for manufacturing a circuit board, so that the circuit board can be manufactured with a high yield. That is, the ceramic substrate makes it possible to manufacture a circuit board having high reliability with a high yield.
 上述のセラミックス基板の表面における貫通孔の開口面積は1200μm以上であってよい。これによって、欠陥部を有する区画を一層高い精度で検知することができる。したがって、回路基板の製造コスト及び絶縁検査に関わる作業負担を一層低減することができる。 The opening area of the through hole on the surface of the above-mentioned ceramic substrate may be 1200 μm 2 or more. As a result, the section having the defective portion can be detected with higher accuracy. Therefore, the manufacturing cost of the circuit board and the work load related to the insulation inspection can be further reduced.
 上述の貫通孔の少なくとも一部はテーパー状であってよい。これによって、大きい開口を有する方の表面側からろう材が充填されやすくなる。したがって、欠陥部の検知精度を一層高めることができる。 At least a part of the above-mentioned through hole may be tapered. As a result, the brazing material can be easily filled from the surface side having the larger opening. Therefore, the detection accuracy of the defective portion can be further improved.
 上述の貫通孔の少なくとも一部にろう材が充填されていてもよい。これによって、欠陥部と貫通孔を有する区画部の検知精度を一層高めることができる。なお、本開示における「貫通孔」とは、必ずしも空洞である必要はなく、セラミックス基板を構成する材料とは異なる材料が充填されていてもよい。 At least a part of the above-mentioned through hole may be filled with a brazing material. As a result, the detection accuracy of the defective portion and the compartment having the through hole can be further improved. The "through hole" in the present disclosure does not necessarily have to be a cavity, and may be filled with a material different from the material constituting the ceramic substrate.
 本開示の一側面に係る複合基板は、互いに対向するように配置された一対の金属基板と、一対の金属基板の間に上述のいずれかに記載のセラミックス基板と、を備える。この複合基板は、上述のセラミックス基板を備えることから、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 The composite substrate according to one aspect of the present disclosure includes a pair of metal substrates arranged so as to face each other, and a ceramic substrate according to any one of the above between the pair of metal substrates. Since this composite substrate includes the above-mentioned ceramic substrate, it is possible to manufacture a circuit board having high reliability with a high yield.
 本開示の一側面に係る回路基板は、上述のいずれかに記載のセラミックス基板と、セラミックス基板を挟んで対向するように配置された導体部と、を備え、導体部は、区画部毎に独立して設けられる。 The circuit board according to one aspect of the present disclosure includes the ceramic substrate according to any one of the above and a conductor portion arranged so as to face each other with the ceramic substrate interposed therebetween, and the conductor portion is independent for each section. Is provided.
 このような回路基板は、上述のセラミックス基板を備えることから、高い信頼性を有し、且つ高い歩留まりで製造することができる。 Since such a circuit board is provided with the above-mentioned ceramic substrate, it can be manufactured with high reliability and a high yield.
 本開示の一側面に係るセラミックス基板の製造方法は、セラミックスで構成される基材の表面にレーザー光を照射して表面を複数に区画する区画線を形成する工程と、区画線で画定される区画部のうち、欠陥部を有する少なくとも一つの区画部に貫通孔を設けてセラミックス基板を得る工程と、を有する。 The method for manufacturing a ceramic substrate according to one aspect of the present disclosure is defined by a step of irradiating the surface of a base material made of ceramics with a laser beam to form a dividing line for dividing the surface into a plurality of sections, and a dividing line. The present invention includes a step of providing a through hole in at least one of the compartments having a defective portion to obtain a ceramic substrate.
 上記製造方法では、欠陥部を有する少なくとも一つの区画部に貫通孔を設けることから、当該区画部を高い精度で検知することができる。このため、欠陥部を有する区画部を高い精度で排除することができる。したがって、欠陥部を有するセラミックス基板を回路基板の製造に用いても、高い信頼性を有する回路基板を得ることができる。この製造方法で得られたセラミックス基板は、欠陥部を有していても回路基板の製造に用いることができるため、回路基板を高い歩留まりで製造することができる。すなわち、上述のセラミックス基板の製造方法は、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 In the above manufacturing method, since a through hole is provided in at least one section having a defective portion, the section can be detected with high accuracy. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, even if a ceramic substrate having a defective portion is used for manufacturing a circuit board, a circuit board having high reliability can be obtained. Since the ceramic substrate obtained by this manufacturing method can be used for manufacturing a circuit board even if it has a defective portion, the circuit board can be manufactured with a high yield. That is, the above-mentioned method for manufacturing a ceramic substrate makes it possible to manufacture a circuit board having high reliability with a high yield.
 本開示の一側面に係る回路基板の製造方法は、上述の製造方法で得られたセラミックス基板を挟むようにして一対の金属基板を積層して複合基板を得る工程と、複合基板における金属基板の一部を除去して区画部毎に独立した導体部を形成する工程と、セラミックス基板を挟む一対の導体部の間に電圧を印加して電流を測定する工程と、を有する。 The method for manufacturing a circuit board according to one aspect of the present disclosure includes a step of laminating a pair of metal substrates so as to sandwich the ceramic substrate obtained by the above-mentioned manufacturing method to obtain a composite substrate, and a part of the metal substrate in the composite substrate. It has a step of forming an independent conductor portion for each section and a step of applying a voltage between a pair of conductor portions sandwiching a ceramic substrate to measure a current.
 上記製造方法では、欠陥部を有する少なくとも一つの区画部に貫通孔を設けたセラミックス基板を挟む一対の導体部の間に電圧を印加して電流を測定する。このため、セラミックス基板の欠陥部と貫通孔を有する区画部を高い精度で検知することができる。このため、欠陥部を有する区画部を高い精度で排除することができる。したがって、欠陥部を有するセラミックス基板を回路基板の製造に用いても、高い信頼性を有する回路基板を製造することができる。この製造方法では、セラミックス基板が欠陥部を有していても回路基板の製造に用いることができるため、回路基板を高い歩留まりで製造することができる。すなわち、この回路基板の製造方法は、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 In the above manufacturing method, a voltage is applied between a pair of conductor portions sandwiching a ceramic substrate having a through hole in at least one compartment having a defective portion to measure a current. Therefore, it is possible to detect a defective portion of the ceramic substrate and a compartment having a through hole with high accuracy. Therefore, the compartment having a defective portion can be eliminated with high accuracy. Therefore, even if a ceramic substrate having a defective portion is used for manufacturing a circuit board, a circuit board having high reliability can be manufactured. In this manufacturing method, even if the ceramic substrate has a defective portion, it can be used for manufacturing the circuit board, so that the circuit board can be manufactured with a high yield. That is, this method for manufacturing a circuit board makes it possible to manufacture a highly reliable circuit board with a high yield.
 本開示の一側面に係る回路基板の検査方法は、上述の回路基板の検査方法であって、セラミックス基板を挟む少なくとも一対の導体部の間に電圧を印加し電流を測定する工程を有する。セラミックス基板は、欠陥部を有する少なくとも一つの区画部に貫通孔を有することから、欠陥部を有する当該区画部を高い精度で検知することができる。したがって、高い信頼性を有する回路基板を得ることができる。また、セラミックス基板が欠陥部を有していても回路基板の製造に用いることができるため、回路基板を高い歩留まりで製造することができる。すなわち、上述の回路基板の検査方法は、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 The circuit board inspection method according to one aspect of the present disclosure is the circuit board inspection method described above, and includes a step of applying a voltage between at least a pair of conductor portions sandwiching the ceramic substrate and measuring a current. Since the ceramic substrate has a through hole in at least one section having a defect, the section having a defect can be detected with high accuracy. Therefore, a circuit board with high reliability can be obtained. Further, even if the ceramic substrate has a defective portion, it can be used for manufacturing the circuit board, so that the circuit board can be manufactured with a high yield. That is, the above-mentioned circuit board inspection method makes it possible to manufacture a highly reliable circuit board with a high yield.
 本開示の別の側面に係る回路基板の検査方法は、区画線で複数に区画された表面を有するセラミックス基板と、セラミックス基板を挟んで対向するように配置され、区画線で画定される区画部毎に独立して設けられる導体部と、備える回路基板の検査方法であって、セラミックス基板を挟む一対の導体部の間に電圧を印加し、区画部毎に電流を測定する工程を有する。 A method for inspecting a circuit board according to another aspect of the present disclosure is a partition portion which is arranged so as to face each other with a ceramic substrate sandwiched between a ceramic substrate having a surface partitioned by a partition line and defined by the partition line. It is a method of inspecting a conductor portion independently provided for each and a circuit board provided, and includes a step of applying a voltage between a pair of conductor portions sandwiching a ceramic substrate and measuring a current for each compartment.
 この検査方法では、区画部毎に欠陥部の有無を簡便且つ迅速に検査することができる。このような検査を行うことによって、高い信頼性を有する回路基板を高い生産性で得ることができる。 With this inspection method, the presence or absence of defective parts can be easily and quickly inspected for each section. By performing such an inspection, a circuit board having high reliability can be obtained with high productivity.
 本開示によれば、高い信頼性を有する回路基板を得ることが可能なセラミックス基板及びその製造方法を提供することができる。また、高い信頼性を有する回路基板を得ることが可能な複合基板を提供することができる。また、高い信頼性を有する回路基板及びその製造方法を提供することができる。また、回路基板の信頼性を向上することが可能な回路基板の検査方法を提供することができる。 According to the present disclosure, it is possible to provide a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the ceramic substrate. Further, it is possible to provide a composite substrate capable of obtaining a circuit board having high reliability. Further, it is possible to provide a circuit board having high reliability and a method for manufacturing the same. Further, it is possible to provide a method for inspecting a circuit board that can improve the reliability of the circuit board.
図1は、一実施形態に係るセラミックス基板の斜視図である。FIG. 1 is a perspective view of a ceramic substrate according to an embodiment. 図2は、図1のII-II線断面図である。FIG. 2 is a sectional view taken along line II-II of FIG. 図3は、図1のIII-III線断面図である。FIG. 3 is a sectional view taken along line III-III of FIG. 図4は、一実施形態に係る複合基板の斜視図である。FIG. 4 is a perspective view of the composite substrate according to the embodiment. 図5は、一実施形態に係る回路基板の斜視図である。FIG. 5 is a perspective view of the circuit board according to the embodiment. 図6は、ろう材が塗布されたセラミックス基板の一例を示す斜視図である。FIG. 6 is a perspective view showing an example of a ceramic substrate coated with a brazing material. 図7は、表面にレジストパターンが形成された複合基板の一例を示す斜視図である。FIG. 7 is a perspective view showing an example of a composite substrate having a resist pattern formed on its surface. 図8は、回路基板の漏れ電流を測定する検査装置の一例を示す図である。FIG. 8 is a diagram showing an example of an inspection device for measuring a leakage current of a circuit board. 図9は、実験例3のセラミックス基板の表面及び貫通孔を示す光学顕微鏡画像の写真である。FIG. 9 is a photograph of an optical microscope image showing the surface and through holes of the ceramic substrate of Experimental Example 3.
 以下、場合により図面を参照して、本開示の一実施形態について説明する。ただし、以下の実施形態は、本開示を説明するための例示であり、本開示を以下の内容に限定する趣旨ではない。説明において、同一要素又は同一機能を有する要素には同一符号を用い、場合により重複する説明は省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。更に、各要素の寸法比率は図示の比率に限られるものではない。 Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings in some cases. However, the following embodiments are examples for explaining the present disclosure, and are not intended to limit the present disclosure to the following contents. In the description, the same reference numerals are used for the same elements or elements having the same function, and duplicate description may be omitted in some cases. Further, unless otherwise specified, the positional relationship such as up, down, left, and right shall be based on the positional relationship shown in the drawings. Further, the dimensional ratio of each element is not limited to the ratio shown in the figure.
 図1は、一実施形態に係るセラミックス基板の斜視図である。図1のセラミックス基板100は、平板形状を有する。セラミックス基板100の表面100Aは、区画線によって複数に区画されている。表面100Aには、区画線として、第1の方向に沿って延在し且つ等間隔で並ぶ複数の区画線L1と、第1の方向に直交する第2の方向に沿って延在し且つ等間隔で並ぶ複数の区画線L2と、が設けられている。区画線L1と区画線L2とは互いに直交している。 FIG. 1 is a perspective view of a ceramic substrate according to an embodiment. The ceramic substrate 100 of FIG. 1 has a flat plate shape. The surface 100A of the ceramic substrate 100 is divided into a plurality of parts by a dividing line. On the surface 100A, as marking lines, a plurality of marking lines L1 extending along the first direction and arranging at equal intervals, extending along a second direction orthogonal to the first direction, and the like, etc. A plurality of lane markings L2 arranged at intervals are provided. The lane marking L1 and the lane marking L2 are orthogonal to each other.
 区画線L1,L2は、例えば、複数の凹みが直線状に並んで構成されていてもよいし、線状に溝が形成されていてもよい。具体的には、レーザー光で形成されるスクライブラインであってよい。レーザー源としては、例えば、炭酸ガスレーザー及びYAGレーザー等が挙げられる。このようなレーザー源からレーザー光を間欠的に照射することによってスクライブラインを形成することができる。なお、区画線L1,L2は、等間隔で並んでいなくてもよく、また、直交するものに限定されない。また、直線状ではなく、曲線状であってもよいし、折れ曲がっていてもよい。 The lane markings L1 and L2 may be formed by arranging a plurality of recesses in a straight line, or may be formed by linear grooves. Specifically, it may be a scribe line formed by laser light. Examples of the laser source include a carbon dioxide laser and a YAG laser. A scribe line can be formed by intermittently irradiating a laser beam from such a laser source. The lane markings L1 and L2 do not have to be arranged at equal intervals, and are not limited to orthogonal lines. Further, it may be curved instead of straight, or it may be bent.
 図2は図1のII-II線断面図であり、図3は図1のIII-III線断面図である。図1、図2及び図3に示すように、区画部10は、区画線L1,L2で囲まれる表面100Aの領域と、当該領域に対応する裏面100Bの領域と、区画線L1,L2からセラミックス基板100の厚さ方向に平行に描かれる仮想線VL1,VL2と、で囲まれる3次元の領域で構成される。すなわち、セラミックス基板100は、区画線L1及び区画線L2によって画定される複数の区画部10を有する。複数の区画部10のうち、区画部10aは、欠陥部11と貫通孔12を有する。 FIG. 2 is a sectional view taken along line II-II of FIG. 1, and FIG. 3 is a sectional view taken along line III-III of FIG. As shown in FIGS. 1, 2 and 3, the partition 10 includes a region of the front surface 100A surrounded by the division lines L1 and L2, a region of the back surface 100B corresponding to the region, and ceramics from the division lines L1 and L2. It is composed of a three-dimensional region surrounded by virtual lines VL1 and VL2 drawn parallel to the thickness direction of the substrate 100. That is, the ceramic substrate 100 has a plurality of compartments 10 defined by the marking line L1 and the marking line L2. Of the plurality of compartments 10, the compartment 10a has a defect 11 and a through hole 12.
 貫通孔12は、セラミックス基板100を厚さ方向に貫通しており、例えばレーザー光又はドリル等を用いて形成される。貫通孔12は円柱状にくり抜かれて形成されていてもよい。ただし、円柱形状に限定されるものではない。表面100A及び裏面100Bにおける貫通孔12の開口面積は、例えば1200μm以上であってよく、5000μm以上であってよく、7000μm以上であってもよい。このように表面100A及び裏面100Bにおける開口面積が所定のサイズを有することによって、より高い精度で欠陥部11を有する区画部10aを検知することができる。貫通孔12の開口面積は、貫通孔12の形成に所要する時間を低減する観点から、0.5mm以下であってよい。 The through hole 12 penetrates the ceramic substrate 100 in the thickness direction, and is formed by using, for example, a laser beam or a drill. The through hole 12 may be formed by hollowing out a columnar shape. However, it is not limited to the cylindrical shape. The opening area of the through-holes 12 in the surface 100A and rear surface 100B may be for example 1200 [mu] m 2 or more, may be at 5000 .mu.m 2 or more, may be 7000Myuemu 2 or more. By having the opening areas on the front surface 100A and the back surface 100B having a predetermined size in this way, it is possible to detect the partition portion 10a having the defect portion 11 with higher accuracy. The opening area of the through hole 12 may be 0.5 mm 2 or less from the viewpoint of reducing the time required for forming the through hole 12.
 貫通孔12は、例えば、セラミックス基板100の厚さ方向に沿って絞られるように、一部がテーパー状に形成されていてもよい。すなわち、貫通孔12は、セラミックス基板100の厚さ方向に沿って孔径が変化するテーパー部を有していてもよい。貫通孔12の全体がテーパー状に形成されていてもよい。表面100Aと裏面100Bにおける貫通孔12の開口面積が異なる場合、貫通孔12の開口面積が大きい方からろう材を塗布すれば、ろう材の充填を円滑に行うことができる。貫通孔12にろう材が充填されていれば、より高い精度で欠陥部11を検知することができる。 A part of the through hole 12 may be formed in a tapered shape so as to be narrowed along the thickness direction of the ceramic substrate 100, for example. That is, the through hole 12 may have a tapered portion whose hole diameter changes along the thickness direction of the ceramic substrate 100. The entire through hole 12 may be formed in a tapered shape. When the opening areas of the through holes 12 on the front surface 100A and the back surface 100B are different, the brazing material can be smoothly filled by applying the brazing material from the side having the larger opening area of the through holes 12. If the through hole 12 is filled with a brazing material, the defective portion 11 can be detected with higher accuracy.
 欠陥部11は、回路基板としたときに漏れ電流の要因となるものをいい、例えば、クラック、並びに、穴及び傷等の凹みが挙げられる。欠陥部11は、貫通孔12とは異なるものであり、本実施形態では表面100Aに現れている。ただし、このような形状に限定されず、例えば、表面100Aからその反対側の裏面100Bに到達するクラックであってもよい。すなわち、欠陥部は、表面100A又は裏面100Bに露出していてもよいし、露出していなくてもよい。露出していない欠陥部は、例えば非破壊検査等で検知することができる。目視等による検知の容易性の観点から、欠陥部はセラミックス基板100の表面100A、及び/又は裏面100Bに露出するものであってよい。 The defective portion 11 is a circuit board that causes a leakage current, and examples thereof include cracks and dents such as holes and scratches. The defective portion 11 is different from the through hole 12, and appears on the surface 100A in the present embodiment. However, the shape is not limited to this, and for example, a crack may reach from the front surface 100A to the back surface 100B on the opposite side. That is, the defective portion may or may not be exposed on the front surface 100A or the back surface 100B. Unexposed defects can be detected by, for example, non-destructive inspection. From the viewpoint of ease of detection by visual inspection or the like, the defective portion may be exposed on the front surface 100A and / or the back surface 100B of the ceramic substrate 100.
 図1、図2及び図3では、区画線L1,L2がセラミックス基板100の一方側の表面100Aのみに形成されている例を示したが、これに限定されない。すなわち、区画線L1,L2は、セラミックス基板100の表面100Aとは反対側の裏面100Bにも形成されていてもよい。また、欠陥部11と区画線L1,L2は、表面100Aに共存する必要はなく、例えば、欠陥部11は裏面100Bのみに露出していてもよいし、セラミックス基板100の内部に存在していてもよい。 Although FIGS. 1, 2 and 3 show an example in which the marking lines L1 and L2 are formed only on the surface 100A on one side of the ceramic substrate 100, the present invention is not limited to this. That is, the marking lines L1 and L2 may also be formed on the back surface 100B on the side opposite to the front surface 100A of the ceramic substrate 100. Further, the defective portion 11 and the marking lines L1 and L2 do not need to coexist on the front surface 100A. For example, the defective portion 11 may be exposed only on the back surface 100B, or may exist inside the ceramic substrate 100. May be good.
 本実施形態では、複数の区画部10のうち、区画部10aのみが欠陥部11及び貫通孔12を有していたが、これに限定されない。幾つかの変形例では、セラミックス基板が、欠陥部及び貫通孔を有する区画部を2つ以上有していてもよい。また、欠陥部を有する全ての区画部に貫通孔を設ける必要はなく、例えば、表面100A及び裏面100Bにおいて目視にて検知される欠陥部を有する区画部のみに貫通孔を設けてもよい。 In the present embodiment, of the plurality of compartments 10, only the compartment 10a has the defect portion 11 and the through hole 12, but the present invention is not limited to this. In some modifications, the ceramic substrate may have two or more compartments with defects and through holes. Further, it is not necessary to provide through holes in all the compartments having defects, and for example, through holes may be provided only in the compartments having defects that are visually detected on the front surface 100A and the back surface 100B.
 セラミックス基板100は、区画部10aに欠陥部11と貫通孔12とを有することから、回路基板に加工した後であっても、欠陥部11を有する区画部10aを高い精度で検知することができる。このため、欠陥部11を有する区画部10aを高い精度で排除することができる。したがって、欠陥部11を有するセラミックス基板100を回路基板の製造に用いても、不良品の発生が抑制され、高い信頼性を有する回路基板を得ることができる。このようにセラミックス基板100は欠陥部を有するにもかかわらず、回路基板の製造に用いることができるため、高い信頼性を有する回路基板を高い歩留まりで製造することができる。すなわち、セラミックス基板100は、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 Since the ceramic substrate 100 has the defective portion 11 and the through hole 12 in the compartment 10a, the compartment 10a having the defective portion 11 can be detected with high accuracy even after being processed into a circuit board. .. Therefore, the partition portion 10a having the defective portion 11 can be eliminated with high accuracy. Therefore, even if the ceramic substrate 100 having the defective portion 11 is used for manufacturing the circuit board, the occurrence of defective products is suppressed, and a circuit board having high reliability can be obtained. As described above, although the ceramic substrate 100 has a defective portion, it can be used for manufacturing a circuit board, so that a circuit board having high reliability can be manufactured with a high yield. That is, the ceramic substrate 100 makes it possible to manufacture a circuit board having high reliability with a high yield.
 図4は、一実施形態に係る複合基板の斜視図である。複合基板200は、互いに対向するように配置された一対の金属基板110と、一対の金属基板110の間にセラミックス基板100を備える。金属基板110としては、銅板が挙げられる。セラミックス基板100と、金属基板110の形状及びサイズは同じであってもよいし、異なっていてもよい。金属基板110とセラミックス基板100は、例えば、ろう材によって接合されていてもよい。複合基板200は、セラミックス基板100を備えることから、高い信頼性を有する回路基板を高い歩留まりで製造することを可能にする。 FIG. 4 is a perspective view of the composite substrate according to the embodiment. The composite substrate 200 includes a pair of metal substrates 110 arranged so as to face each other and a ceramic substrate 100 between the pair of metal substrates 110. Examples of the metal substrate 110 include a copper plate. The shape and size of the ceramic substrate 100 and the metal substrate 110 may be the same or different. The metal substrate 110 and the ceramic substrate 100 may be joined by, for example, a brazing material. Since the composite substrate 200 includes the ceramic substrate 100, it is possible to manufacture a circuit board having high reliability with a high yield.
 複合基板200の一例としては、セラミックス基板100が窒化アルミニウムで構成され、金属基板110がアルミニウムで構成されるものが挙げられる。 As an example of the composite substrate 200, the ceramic substrate 100 is made of aluminum nitride and the metal substrate 110 is made of aluminum.
 図5は、一実施形態に係る回路基板の斜視図である。回路基板300は、セラミックス基板100と、セラミックス基板100を挟んで対向配置された導体部20と、を備える。導体部20は、区画部10毎に独立して、表面100A及び裏面100B上に設けられている。すなわち、区画部10毎に、互いに対向するように配置された一対の導体部20が設けられている。セラミックス基板100の欠陥部11及び貫通孔12は、導体部20で覆われていてもよい。 FIG. 5 is a perspective view of the circuit board according to the embodiment. The circuit board 300 includes a ceramic substrate 100 and conductor portions 20 arranged so as to face each other with the ceramic substrate 100 interposed therebetween. The conductor portion 20 is independently provided on the front surface 100A and the back surface 100B for each compartment 10. That is, each section 10 is provided with a pair of conductors 20 arranged so as to face each other. The defective portion 11 and the through hole 12 of the ceramic substrate 100 may be covered with the conductor portion 20.
 欠陥部11を有する区画部10aには、貫通孔12が設けられていることから、欠陥部11が微細なものであっても区画部10aを高い精度で検知することができる。回路基板300を区画部10毎に分割して分割基板とした後、欠陥部11を含む分割基板を排除すれば、欠陥部11を含まない分割基板を得ることができる。このように、欠陥部11を有するセラミックス基板100を回路基板の製造に用いることが可能となるうえ、高い信頼性を確保することができる。したがって、高い信頼性を有する回路基板を高い歩留まりで得ることができる。 Since the partition portion 10a having the defect portion 11 is provided with the through hole 12, even if the defect portion 11 is fine, the partition portion 10a can be detected with high accuracy. If the circuit board 300 is divided into divisions 10 to form a divided substrate and then the divided substrate including the defective portion 11 is eliminated, a divided substrate not including the defective portion 11 can be obtained. As described above, the ceramic substrate 100 having the defective portion 11 can be used for manufacturing the circuit board, and high reliability can be ensured. Therefore, a circuit board having high reliability can be obtained with a high yield.
 回路基板300の一例としては、セラミックス基板100が窒化アルミニウムで構成され、導体部20がアルミニウムで構成されるものが挙げられる。 As an example of the circuit board 300, the ceramic substrate 100 is made of aluminum nitride, and the conductor portion 20 is made of aluminum.
 一実施形態に係るセラミックス基板の製造方法として、セラミックス基板100の製造方法を説明する。セラミックス基板100の製造方法は、セラミックスで構成される基材の表面にレーザー光を照射して表面を複数に区画する区画線L1,L2を形成する工程と、区画線L1,L2で画定される区画部10のうち、欠陥部11を有する区画部10aに貫通孔12を設けてセラミックス基板100を得る工程と、を有する。 A method for manufacturing the ceramic substrate 100 will be described as a method for manufacturing the ceramic substrate according to the embodiment. The method for manufacturing the ceramic substrate 100 is defined by a step of irradiating the surface of a base material made of ceramics with a laser beam to form division lines L1 and L2 for partitioning the surface into a plurality of surfaces, and division lines L1 and L2. Among the compartments 10, a step of providing a through hole 12 in the compartment 10a having the defect portion 11 to obtain the ceramic substrate 100 is provided.
 セラミックスで構成される基材としては、図1に示すような外形を有する平板形状のセラミックス製の基板を用いる。セラミックスの種類に特に制限はなく、例えば、炭化物、酸化物及び窒化物等が挙げられる。具体的には、炭化ケイ素、アルミナ、窒化ケイ素、窒化アルミニウム及び窒化ホウ素等が挙げられる。 As the base material composed of ceramics, a flat plate-shaped ceramic substrate having an outer shape as shown in FIG. 1 is used. The type of ceramics is not particularly limited, and examples thereof include carbides, oxides, and nitrides. Specific examples thereof include silicon carbide, alumina, silicon nitride, aluminum nitride and boron nitride.
 基材の表面に照射するレーザー光としては、例えば、炭酸ガスレーザー及びYAGレーザー等が挙げられる。このようなレーザー源からレーザー光を間欠的に照射することによって区画線L1,L2となるスクライブラインを形成する。区画線L1,L2は、後工程において、回路基板300を分割する際の切断線となる。 Examples of the laser light that irradiates the surface of the base material include a carbon dioxide gas laser and a YAG laser. By intermittently irradiating the laser beam from such a laser source, scribe lines forming the division lines L1 and L2 are formed. The lane markings L1 and L2 serve as cutting lines when the circuit board 300 is divided in the subsequent process.
 次に、区画線L1,L2で画定される区画部10のうち、欠陥部11を有する区画部10aに貫通孔12を設ける。貫通孔12は、レーザー又はドリル等を用いて形成される。貫通孔12のサイズ及び形状は上述したとおりである。セラミックス基板100における欠陥部11は、目視によって検知されてもよいし、超音波探傷検査及び赤外線検査等の非破壊検査によって検知されてもよい。欠陥部11が検知されなかった場合には、貫通孔12は設けなくてよい。このようにして図1、図2及び図3に示すセラミックス基板100が得られる。 Next, of the compartments 10 defined by the compartment lines L1 and L2, the through hole 12 is provided in the compartment 10a having the defective portion 11. The through hole 12 is formed by using a laser, a drill, or the like. The size and shape of the through hole 12 are as described above. The defect portion 11 in the ceramic substrate 100 may be detected visually, or may be detected by a non-destructive inspection such as an ultrasonic flaw detection inspection and an infrared inspection. If the defective portion 11 is not detected, the through hole 12 may not be provided. In this way, the ceramic substrate 100 shown in FIGS. 1, 2 and 3 is obtained.
 一実施形態に係る複合基板の製造方法は、上述のセラミックス基板100を用いる。すなわち、この製造方法は、セラミックス基板100を挟むようにして一対の金属基板110を積層して複合基板を得る工程を有する。金属基板110は、セラミックス基板100と同様の平板形状であってよい。一対の金属基板110は、ろう材を介して、セラミックス基板100の表面100A及び裏面100Bにそれぞれ接合される。 The ceramic substrate 100 described above is used as the method for manufacturing the composite substrate according to the embodiment. That is, this manufacturing method includes a step of laminating a pair of metal substrates 110 so as to sandwich the ceramic substrate 100 to obtain a composite substrate. The metal substrate 110 may have a flat plate shape similar to that of the ceramic substrate 100. The pair of metal substrates 110 are joined to the front surface 100A and the back surface 100B of the ceramic substrate 100, respectively, via a brazing material.
 具体的には、まず、セラミックス基板100の表面100A及び裏面100Bに、ロールコーター法、スクリーン印刷法、又は転写法等の方法によってペースト状のろう材を塗布する。ろう材は、例えば、銀及びチタン等の金属成分、有機溶剤、及びバインダ等を含有する。ろう材の粘度は、例えば5~20Pa・sであってよい。ろう材における有機溶剤の含有量は、例えば、5~25質量%、バインダ量の含有量は、例えば、2~15質量%であってよい。 Specifically, first, a paste-like brazing material is applied to the front surface 100A and the back surface 100B of the ceramic substrate 100 by a method such as a roll coater method, a screen printing method, or a transfer method. The brazing material contains, for example, metal components such as silver and titanium, an organic solvent, a binder and the like. The viscosity of the brazing filler metal may be, for example, 5 to 20 Pa · s. The content of the organic solvent in the brazing material may be, for example, 5 to 25% by mass, and the content of the binder amount may be, for example, 2 to 15% by mass.
 図6は、ろう材40が塗布されたセラミックス基板100を示す斜視図である。図6には、表面100A側のみを示しているが、裏面100B側にも同様にろう材40が塗布されていてよい。このようにろう材40が塗布されたセラミックス基板100の表面100A及び裏面100Bに、金属基板110を貼り合わせて接合体を得る。その後、加熱炉で接合体を加熱してセラミックス基板100と金属基板110とを十分に接合させて、図4に示す複合基板200を得る。加熱温度は例えば700~900℃であってよい。炉内の雰囲気は窒素等の不活性ガスであってよい。接合体の加熱は、大気圧未満の減圧下で行ってもよいし、真空下で行ってもよい。加熱炉は、複数の接合体を連続的に供給しながら加熱する連続式のものであってもよいし、一つ又は複数の接合体をバッチ式で加熱するものであってもよい。接合体の加熱は、接合体を積層方向に押圧しながら行ってもよい。 FIG. 6 is a perspective view showing the ceramic substrate 100 coated with the brazing material 40. Although FIG. 6 shows only the front surface 100A side, the brazing material 40 may be similarly coated on the back surface 100B side. A metal substrate 110 is attached to the front surface 100A and the back surface 100B of the ceramic substrate 100 coated with the brazing material 40 in this way to obtain a bonded body. Then, the bonded body is heated in a heating furnace to sufficiently bond the ceramic substrate 100 and the metal substrate 110 to obtain the composite substrate 200 shown in FIG. The heating temperature may be, for example, 700 to 900 ° C. The atmosphere in the furnace may be an inert gas such as nitrogen. The joint may be heated under reduced pressure below atmospheric pressure or under vacuum. The heating furnace may be a continuous type that heats a plurality of joints while continuously supplying them, or may be a type that heats one or a plurality of joints in a batch type. The heating of the joint may be performed while pressing the joint in the stacking direction.
 一実施形態に係る回路基板の製造方法は、上述の複合基板の製造方法に引き続いて、複合基板200における金属基板110の一部を除去して区画部10毎に独立した導体部20を形成する工程を行う。この工程は、例えば、フォトリソグラフィによって行ってよい。具体的には、まず、図7に示すように、複合基板200の表面200Aに感光性を有するレジストを印刷する。そして、露光装置を用いて、所定形状を有するレジストパターンを形成する。レジストはネガ型であってもよいしポジ型であってもよい。未硬化のレジストは、例えば洗浄によって除去する。 In the method for manufacturing a circuit board according to an embodiment, following the method for manufacturing a composite substrate described above, a part of the metal substrate 110 in the composite substrate 200 is removed to form an independent conductor portion 20 for each compartment 10. Perform the process. This step may be performed, for example, by photolithography. Specifically, first, as shown in FIG. 7, a resist having photosensitivity is printed on the surface 200A of the composite substrate 200. Then, a resist pattern having a predetermined shape is formed by using an exposure apparatus. The resist may be a negative type or a positive type. The uncured resist is removed, for example, by washing.
 図7は、表面200Aにレジストパターン30が形成された複合基板200を示す斜視図である。図7には、表面200A側のみを示しているが、裏面200B側にも同様のレジストパターンが形成される。レジストパターン30は、表面200A及び裏面200Bにおいて、セラミックス基板100の各区画部10に対応する領域に形成される。 FIG. 7 is a perspective view showing the composite substrate 200 in which the resist pattern 30 is formed on the surface 200A. Although FIG. 7 shows only the front surface 200A side, a similar resist pattern is formed on the back surface 200B side. The resist pattern 30 is formed on the front surface 200A and the back surface 200B in a region corresponding to each section 10 of the ceramic substrate 100.
 レジストパターン30を形成した後、エッチングによって、金属基板110のうちレジストパターン30に覆われていない部分を除去する。これによって、当該部分にはセラミックス基板100の表面100A及び裏面100Bが露出する。その後、レジストパターン30を除去して、区画部10毎に独立した導体部20を形成する。この導体部20は、図5に示すように、区画部10毎にセラミックス基板100を挟んで対をなすように形成される。 After forming the resist pattern 30, the portion of the metal substrate 110 that is not covered by the resist pattern 30 is removed by etching. As a result, the front surface 100A and the back surface 100B of the ceramic substrate 100 are exposed in the portion. After that, the resist pattern 30 is removed to form an independent conductor portion 20 for each compartment 10. As shown in FIG. 5, the conductor portions 20 are formed so as to form a pair with the ceramic substrate 100 sandwiched between the compartments 10.
 以上の工程によって、図5に示すような回路基板300が得られる。続いて、セラミックス基板100を挟む一対の導体部20の間に電圧を印加して電流を測定する工程(検査工程)を行う。具体的には、セラミックス基板100を挟む一対の導体部20の間に電圧を印加して電流を測定する。この測定は区画部10毎に行ってよい。これによって、欠陥部11及び貫通孔12を有する区画部10aが検知される。 By the above steps, the circuit board 300 as shown in FIG. 5 can be obtained. Subsequently, a step (inspection step) of applying a voltage between the pair of conductor portions 20 sandwiching the ceramic substrate 100 and measuring the current is performed. Specifically, a voltage is applied between a pair of conductor portions 20 sandwiching the ceramic substrate 100 to measure the current. This measurement may be performed for each section 10. As a result, the partition portion 10a having the defective portion 11 and the through hole 12 is detected.
 図8は、回路基板300の漏れ電流を測定して絶縁破壊を検査する検査装置の一例を模式的に示す図である。検査装置400は、交流電源60と、交流電源60に接続された耐電圧試験器50とを備える。耐電圧試験器50の一方の端子は、区画部10に形成された一対の導体部20の一方に接触する導電性支持部72aと電気的に接続される。耐電圧試験器50の他方の端子は、溶媒76を貯留する絶縁性溶媒槽77内に配置される電極70を介して、一対の導体部20の他方に接触する導電性支持部72bと電気的に接続される。すなわち、電流が測定される区画部10においてセラミックス基板100を挟んで対向する一対の導体部20は、それぞれ、導電性支持部72a及び導電性支持部72bと接触している。 FIG. 8 is a diagram schematically showing an example of an inspection device that inspects dielectric breakdown by measuring the leakage current of the circuit board 300. The inspection device 400 includes an AC power supply 60 and a withstand voltage tester 50 connected to the AC power supply 60. One terminal of the withstand voltage tester 50 is electrically connected to a conductive support portion 72a that contacts one of the pair of conductor portions 20 formed in the partition portion 10. The other terminal of the withstand voltage tester 50 is electrically connected to the conductive support portion 72b that contacts the other of the pair of conductor portions 20 via the electrode 70 arranged in the insulating solvent tank 77 that stores the solvent 76. Connected to. That is, the pair of conductor portions 20 facing each other with the ceramic substrate 100 sandwiched in the compartment 10 where the current is measured are in contact with the conductive support portion 72a and the conductive support portion 72b, respectively.
 電極70は、絶縁性溶媒槽77の底面及び一側面に沿って配置されている。電極70は、図8に示されるように、鉛直方向断面でみたときにL字型形状を有している。電極70には、導電性支持部72bに隣接して、2つの絶縁性支持部74が設置されている。2つの絶縁性支持部74は、導電性支持部72bと電気的に接続する導体部20に隣り合って配置される2つの導体部20とそれぞれ接し、回路基板300を溶媒76中において支持している。 The electrodes 70 are arranged along the bottom surface and one side surface of the insulating solvent tank 77. As shown in FIG. 8, the electrode 70 has an L-shape when viewed in the vertical cross section. Two insulating support portions 74 are installed on the electrode 70 adjacent to the conductive support portion 72b. The two insulating support portions 74 are in contact with the two conductor portions 20 arranged adjacent to the conductor portion 20 electrically connected to the conductive support portion 72b, respectively, and support the circuit board 300 in the solvent 76. There is.
 電極70及び導電性支持部72a,72bとしては、例えば無酸素銅製のものを用いることができる。溶媒76としては、例えばフッ素系不活性液体が用いることができる。耐電圧試験器50としては市販のものを用いることができる。絶縁性支持部74と導電性支持部72bの位置は、測定対象の区画部10の位置に応じて、入れ替え可能に構成される。導電性支持部72aの位置も、導電性支持部72bの位置に合わせて移動可能に構成される。このような検査装置400を用いることによって、区画部10毎に、一対の導体部20に電圧を印加して漏れ電流を測定することができる。 As the electrodes 70 and the conductive support portions 72a and 72b, for example, those made of oxygen-free copper can be used. As the solvent 76, for example, a fluorine-based inert liquid can be used. As the withstand voltage tester 50, a commercially available one can be used. The positions of the insulating support portion 74 and the conductive support portion 72b are configured to be interchangeable according to the position of the partition portion 10 to be measured. The position of the conductive support portion 72a is also configured to be movable according to the position of the conductive support portion 72b. By using such an inspection device 400, a voltage can be applied to the pair of conductor portions 20 for each compartment 10 to measure the leakage current.
 検査装置400によって、セラミックス基板100を挟む一対の導体部20の間に例えば1500~6000Vの電圧を印加し、耐電圧試験器50において漏れ電流の有無を測定する。欠陥部11を有する区画部10aは貫通孔12を有することから、低い電圧でも漏れ電流が生じる。したがって、所定の電圧における漏れ電流の有無を検知する検査方法によって、区画部10aを高精度で検知することができる。 The inspection device 400 applies a voltage of, for example, 1500 to 6000 V between the pair of conductor portions 20 sandwiching the ceramic substrate 100, and measures the presence or absence of leakage current in the withstand voltage tester 50. Since the compartment 10a having the defective portion 11 has the through hole 12, a leakage current occurs even at a low voltage. Therefore, the compartment 10a can be detected with high accuracy by an inspection method that detects the presence or absence of a leakage current at a predetermined voltage.
 このような検査装置400を用いて、セラミックス基板100を挟む一対の導体部20の間に電圧を印加し、区画部10毎に電流を測定する工程を有する検査方法を行うことができる。なお、検査装置は図8の構成に限定されず、少なくとも一つの区画部において対向配置された一対の導体部の間に電圧を印加したときの当該導体部の間を流れる電流を測定可能な検査装置であれば、特に制限なく用いることができる。 Using such an inspection device 400, it is possible to perform an inspection method including a step of applying a voltage between a pair of conductor portions 20 sandwiching a ceramic substrate 100 and measuring a current for each partition portion 10. The inspection device is not limited to the configuration shown in FIG. 8, and is an inspection capable of measuring the current flowing between the conductor portions when a voltage is applied between the pair of conductor portions arranged opposite to each other in at least one compartment. Any device can be used without particular limitation.
 検査装置400は、貫通孔12が形成されたセラミックス基板100を備える回路基板300の検査に限られず、区画部毎に独立した導体を備える種々の回路基板の検査に用いることができる。このような検査装置400を用いた検査方法であれば、セラミックス基板に含まれる欠陥部がある区画部を高い精度で簡便に検知することができる。このため、回路基板300の信頼性と生産性を向上することができる。 The inspection device 400 is not limited to the inspection of the circuit board 300 including the ceramic substrate 100 on which the through hole 12 is formed, and can be used for the inspection of various circuit boards having independent conductors for each section. With such an inspection method using the inspection device 400, it is possible to easily detect a section having a defect portion contained in the ceramic substrate with high accuracy. Therefore, the reliability and productivity of the circuit board 300 can be improved.
 検査された回路基板300は、区画線L1,L2に沿って切断され、複数の分割基板に分割される。貫通孔を有する分割基板を排除し、貫通孔を有しない分割基板を例えばパワーモジュール等に用いる部品として製品化又は半製品化すれば、欠陥を有する分割基板を部品として用いることが回避され、部品としての信頼性を高くすることができる。分割基板における導体部20には、例えば電子部品が実装される。 The inspected circuit board 300 is cut along the lane markings L1 and L2 and divided into a plurality of divided boards. If the divided substrate having a through hole is eliminated and the divided substrate having no through hole is commercialized or semi-finished as a component used for, for example, a power module, it is possible to avoid using the divided substrate having a defect as a component, and the component. It is possible to increase the reliability as. For example, electronic components are mounted on the conductor portion 20 of the divided substrate.
 以上、本開示の幾つかの実施形態について説明したが、本開示は上記実施形態に何ら限定されるものではない。例えば、各区画部10に設けられる導体部20の形状は同一である必要はなく、区画部10毎に異なる形状を有していてもよい。また例えば、セラミックス基板100を挟んで対をなす導体部20への電圧の印加及び電流の測定を一対ずつ行うのではなく、複数対を同時に行ってもよい。 Although some embodiments of the present disclosure have been described above, the present disclosure is not limited to the above embodiments. For example, the shape of the conductor portion 20 provided in each compartment 10 does not have to be the same, and each compartment 10 may have a different shape. Further, for example, instead of applying the voltage to the conductor portions 20 forming a pair with the ceramic substrate 100 sandwiched between them and measuring the current one by one, a plurality of pairs may be simultaneously performed.
 回路基板300における導体部20には任意の表面処理を施してもよい。例えば、ソルダーレジスト等の保護層で導体部20の表面の一部を被覆し、導体部20の表面の他部にめっき処理を施してもよい。このような表面処理は、検査装置400を用いた検査を行う前に行ってもよいし、検査を行った後に行ってもよい。 Any surface treatment may be applied to the conductor portion 20 of the circuit board 300. For example, a part of the surface of the conductor portion 20 may be covered with a protective layer such as a solder resist, and the other portion of the surface of the conductor portion 20 may be plated. Such surface treatment may be performed before the inspection using the inspection device 400, or may be performed after the inspection.
(実験例1~3)
 窒化ケイ素製のセラミックス基板の表面にレーザー光を照射して区画線を形成し、縦方向及び横方向に沿ってそれぞれ3つに区画した。これよって、合計で9つの区画部を有するセラミックス基板を準備した。このセラミックス基板は9つの区画部の外側に、幅5mmの外周部を有していた。各区画部のサイズは、縦×横×厚さ=41mm×41mm×0.32mmであった。ファイバーレーザ(波長:1064nm)を用いて、セラミックス基板の中央の区画部に貫通孔を形成した。レーザー光を照射する領域を変えることによって、サイズが互いに異なる貫通孔を有する3種類のセラミックス基板を、それぞれ5枚ずつ作製した。各セラミックス基板の表面及び裏面における貫通孔の開口形状は円形であり、そのサイズ(直径)は、表1に示すとおりであった。図9は、実験例3のセラミックス基板の表面及び貫通孔を示す光学顕微鏡画像の写真である。
(Experimental Examples 1 to 3)
The surface of the silicon nitride ceramic substrate was irradiated with laser light to form a dividing line, which was divided into three sections along the vertical and horizontal directions. As a result, a ceramic substrate having a total of nine compartments was prepared. This ceramic substrate had an outer peripheral portion having a width of 5 mm on the outside of the nine compartments. The size of each section was length × width × thickness = 41 mm × 41 mm × 0.32 mm. A fiber laser (wavelength: 1064 nm) was used to form a through hole in the central compartment of the ceramic substrate. By changing the area to be irradiated with the laser beam, five types of ceramic substrates having through holes having different sizes were produced. The opening shapes of the through holes on the front surface and the back surface of each ceramic substrate were circular, and their sizes (diameters) were as shown in Table 1. FIG. 9 is a photograph of an optical microscope image showing the surface and through holes of the ceramic substrate of Experimental Example 3.
 セラミックス基板の表面及び裏面に、Agを主成分として含有するろう材をスクリーン印刷法でそれぞれ塗布した。2枚の銅板(厚さ0.8mm)で、各セラミックス基板を挟むようにして、銅板とセラミックス基板を積層した。これによって、銅板、セラミックス基板及び銅板をこの順で備える接合体を作製した。 A brazing material containing Ag as a main component was applied to the front surface and the back surface of the ceramic substrate by a screen printing method. The copper plate and the ceramic substrate were laminated so that each ceramic substrate was sandwiched between two copper plates (thickness 0.8 mm). As a result, a bonded body including a copper plate, a ceramic substrate, and a copper plate in this order was produced.
 真空接合炉の炉内に5組の接合体を積層し、積層体として配置した。この積層体の上に銅板を載せ、5g/cmで加圧しながら、810℃の加熱温度で20分間加熱して、銅板とセラミックス基板とを十分に接合させた。このとき、炉内は1×10-3Pa以下に減圧した状態で加熱した。このようにして一対の銅板とその間にセラミックス基板を備える複合基板を作製した。 Five sets of joints were laminated in the vacuum joint furnace and arranged as a laminate. A copper plate was placed on the laminate and heated at a heating temperature of 810 ° C. for 20 minutes while pressurizing at 5 g / cm 2 , to sufficiently bond the copper plate and the ceramic substrate. At this time, the inside of the furnace was heated under a reduced pressure of 1 × 10 -3 Pa or less. In this way, a composite substrate having a pair of copper plates and a ceramic substrate between them was produced.
 図8に示すような検査装置を用いて、JIS C2110-1:2010に準拠して作製した各複合基板の耐電圧検査を行った(n=5)。この検査には、株式会社計測技術研究所製のAC20kV耐電圧試験器(型式:7473)を用いた。溶媒としては、パーフルオロカーボン(スリーエムジャパン株式会社製、商品名:フロリナート、型番:FC-3283)を用いた。絶縁性溶媒槽77、電極70、導電性支持部72a,72b、及び絶縁性支持部74として、大西電子株式会社製の検査治具を用いた。電極70は無酸素銅製のものを、導電性支持部72a,72bは炭素工具鋼鋼材(SK材)にロジウムめっきが施されたものを、それぞれ用いた。 Using an inspection device as shown in FIG. 8, the withstand voltage inspection of each composite substrate manufactured in accordance with JIS C2110-1: 2010 was performed (n = 5). An AC20kV withstand voltage tester (model: 7473) manufactured by Measurement Technology Laboratory Co., Ltd. was used for this inspection. As the solvent, perfluorocarbon (manufactured by 3M Japan Ltd., trade name: Fluorinert, model number: FC-3283) was used. An inspection jig manufactured by Onishi Electronics Co., Ltd. was used as the insulating solvent tank 77, the electrode 70, the conductive support portions 72a and 72b, and the insulating support portion 74. The electrodes 70 were made of oxygen-free copper, and the conductive supports 72a and 72b were made of carbon tool steel (SK material) plated with rhodium.
 検査装置に複合基板をセットした状態で、0.12kV/秒の速さで4.2kVまで電圧を昇圧した。接触電流の閾値を9.99mAとし、この閾値以上の電流が流れた場合を絶縁破壊と判定した。絶縁破壊と判定されたときの電圧を、表1の「耐電圧検査結果」の欄に示す。 With the composite substrate set in the inspection device, the voltage was boosted to 4.2 kV at a speed of 0.12 kV / sec. The threshold value of the contact current was set to 9.99 mA, and the case where a current exceeding this threshold value flowed was determined to be dielectric breakdown. The voltage when it is determined to be dielectric breakdown is shown in the column of "Withstand voltage inspection result" in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 実験例1の貫通孔は円柱状を有していた。一方、実験例2,3の貫通孔は、セラミックス基板の内部に、セラミックス基板の厚さ方向に沿って孔径が変化するテーパー部を有していた。表1中、「<0kV」とは、電圧の印加を開始した直後に漏れ電流値が上記所定値以上になったことを示している。実験例1のNo.3では、表1に記載の電圧においてセラミックス基板が絶縁破壊した。いずれの実験例も電圧が4.2kVに到達する前に、漏れ電流値が上記所定値以上となった。この結果から、貫通孔を形成することによって、欠陥部を有する基板(区画部)を高い精度で検知できることが確認された。 The through hole of Experimental Example 1 had a columnar shape. On the other hand, the through holes of Experimental Examples 2 and 3 had a tapered portion inside the ceramic substrate whose hole diameter changed along the thickness direction of the ceramic substrate. In Table 1, "<0 kV" indicates that the leakage current value becomes equal to or higher than the above-mentioned predetermined value immediately after the application of the voltage is started. Experimental Example 1 No. In No. 3, the ceramic substrate was dielectrically broken down at the voltages shown in Table 1. In each of the experimental examples, the leakage current value became equal to or higher than the above-mentioned predetermined value before the voltage reached 4.2 kV. From this result, it was confirmed that the substrate (partition) having a defect can be detected with high accuracy by forming the through hole.
 本開示によれば、高い信頼性を有する回路基板を得ることが可能なセラミックス基板及びその製造方法が提供される。また、高い信頼性を有する回路基板を得ることが可能な複合基板が提供される。また、高い信頼性を有する回路基板及びその製造方法が提供される。また、回路基板の信頼性を向上することが可能な回路基板の検査方法が提供される。 According to the present disclosure, a ceramic substrate capable of obtaining a circuit board having high reliability and a method for manufacturing the ceramic substrate are provided. Further, a composite substrate capable of obtaining a circuit board having high reliability is provided. Further, a circuit board having high reliability and a method for manufacturing the same are provided. Further, a method for inspecting a circuit board that can improve the reliability of the circuit board is provided.
 10,10a…区画部、11…欠陥部、12…貫通孔、20…導体部、30…レジストパターン、50…耐電圧試験器、60…交流電源、70…電極、72a,72b…導電性支持部、74…絶縁性支持部、76…溶媒、77…絶縁性溶媒槽、100…セラミックス基板、110…金属基板、100A…表面、100B…裏面、110…金属基板、200…複合基板、200A…表面、200B…裏面、300…回路基板、400…検査装置。 10, 10a ... partition, 11 ... defective, 12 ... through hole, 20 ... conductor, 30 ... resist pattern, 50 ... withstand voltage tester, 60 ... AC power supply, 70 ... electrode, 72a, 72b ... conductive support Part, 74 ... Insulating support, 76 ... Solvent, 77 ... Insulating solvent tank, 100 ... Ceramics substrate, 110 ... Metal substrate, 100A ... Front surface, 100B ... Back surface, 110 ... Metal substrate, 200 ... Composite substrate, 200A ... Front side, 200B ... Back side, 300 ... Circuit board, 400 ... Inspection device.

Claims (10)

  1.  区画線で複数に区画された表面を有するセラミックス基板であって、
     前記区画線で画定される少なくとも一つの区画部に、欠陥部と貫通孔とを有するセラミックス基板。
    A ceramic substrate having a surface partitioned by a partition line.
    A ceramic substrate having a defect portion and a through hole in at least one partition portion defined by the partition line.
  2.  前記表面における前記貫通孔の開口面積が1200μm以上である、請求項1に記載のセラミックス基板。 The ceramic substrate according to claim 1, wherein the opening area of the through hole on the surface is 1200 μm 2 or more.
  3.  前記貫通孔の少なくとも一部がテーパー状に形成されている、請求項1又は2に記載のセラミックス基板。 The ceramic substrate according to claim 1 or 2, wherein at least a part of the through hole is formed in a tapered shape.
  4.  前記貫通孔の少なくとも一部にろう材が充填されている、請求項1~3のいずれか一項に記載のセラミックス基板。 The ceramic substrate according to any one of claims 1 to 3, wherein at least a part of the through hole is filled with a brazing material.
  5.  互いに対向するように配置された一対の金属基板と、
     前記一対の金属基板の間に請求項1~4のいずれか一項に記載のセラミックス基板と、を備える、複合基板。
    A pair of metal substrates arranged to face each other,
    A composite substrate comprising the ceramic substrate according to any one of claims 1 to 4 between the pair of metal substrates.
  6.  請求項1~4のいずれか一項に記載のセラミックス基板と、
     前記セラミックス基板を挟んで対向するように配置された導体部と、を備え、
     前記導体部は、前記区画部毎に独立して設けられる回路基板。
    The ceramic substrate according to any one of claims 1 to 4 and
    A conductor portion arranged so as to face each other across the ceramic substrate is provided.
    The conductor portion is a circuit board provided independently for each compartment.
  7.  セラミックスで構成される基材の表面にレーザー光を照射して前記表面を複数に区画する区画線を形成する工程と、
     前記区画線で画定される区画部のうち、欠陥部を有する少なくとも一つの区画部に貫通孔を設けてセラミックス基板を得る工程と、を有する、セラミックス基板の製造方法。
    A step of irradiating the surface of a base material made of ceramics with laser light to form a dividing line that divides the surface into a plurality of parts.
    A method for manufacturing a ceramic substrate, which comprises a step of providing a through hole in at least one partition having a defect among the compartments defined by the division line to obtain a ceramic substrate.
  8.  請求項7に記載の製造方法で得られたセラミックス基板を挟むようにして一対の金属基板を積層して複合基板を得る工程と、
     前記複合基板における前記金属基板の一部を除去して前記区画部毎に独立した導体部を形成する工程と、
     前記セラミックス基板を挟む一対の前記導体部の間に電圧を印加して電流を測定する工程と、を有する、回路基板の製造方法。
    A step of laminating a pair of metal substrates so as to sandwich the ceramic substrate obtained by the manufacturing method according to claim 7 to obtain a composite substrate.
    A step of removing a part of the metal substrate in the composite substrate to form an independent conductor portion for each of the compartments.
    A method for manufacturing a circuit board, comprising a step of applying a voltage between the pair of conductor portions sandwiching the ceramic substrate to measure a current.
  9.  請求項6に記載の回路基板の検査方法であって、
     前記セラミックス基板を挟む少なくとも一対の前記導体部の間に電圧を印加して電流を測定する工程を有する、回路基板の検査方法。
    The circuit board inspection method according to claim 6.
    A method for inspecting a circuit board, which comprises a step of applying a voltage between at least a pair of conductors sandwiching the ceramic substrate to measure a current.
  10.  区画線で複数に区画された表面を有するセラミックス基板と、
     前記セラミックス基板を挟んで対向するように配置され、前記区画線で画定される区画部毎に独立して設けられる導体部と、備える回路基板の検査方法であって、
     前記セラミックス基板を挟む一対の前記導体部の間に電圧を印加し、前記区画部毎に電流を測定する工程を有する、回路基板の検査方法。
     
    A ceramic substrate having a surface partitioned by a partition line and
    A method for inspecting a circuit board provided with a conductor portion that is arranged so as to face each other with the ceramic substrate sandwiched between them and is provided independently for each compartment defined by the division line.
    A method for inspecting a circuit board, comprising a step of applying a voltage between the pair of conductor portions sandwiching the ceramic substrate and measuring a current for each of the compartments.
PCT/JP2020/024006 2019-06-28 2020-06-18 Ceramic substrate and method for manufacture thereof, composite substrate, circuit substrate and method for manufacture thereof, and method for inspection of circuit substrate WO2020262198A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2021526883A JPWO2020262198A1 (en) 2019-06-28 2020-06-18

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019-122064 2019-06-28
JP2019122064 2019-06-28

Publications (1)

Publication Number Publication Date
WO2020262198A1 true WO2020262198A1 (en) 2020-12-30

Family

ID=74059754

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2020/024006 WO2020262198A1 (en) 2019-06-28 2020-06-18 Ceramic substrate and method for manufacture thereof, composite substrate, circuit substrate and method for manufacture thereof, and method for inspection of circuit substrate

Country Status (2)

Country Link
JP (1) JPWO2020262198A1 (en)
WO (1) WO2020262198A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7165842B1 (en) * 2021-02-18 2022-11-04 デンカ株式会社 Ceramic plate and method for manufacturing ceramic plate

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001358432A (en) * 2000-06-13 2001-12-26 Iwaki Electronics Corp Method for detecting defect of electronic component module
JP2003014654A (en) * 2001-06-27 2003-01-15 Ngk Spark Plug Co Ltd Substrate inspection method, inspection device therefor and method for manufacturing product for electronic machinery
JP2005310950A (en) * 2004-04-20 2005-11-04 Yamaha Fine Technologies Co Ltd Manufacturing method of electric conductive pattern in printed circuit board and manufacturing device
JP2005337900A (en) * 2004-05-27 2005-12-08 Fujitsu Ltd Method and device for detecting defect in through hole
JP2011176075A (en) * 2010-02-24 2011-09-08 Nitto Denko Corp Wiring circuit board aggregate sheet and method for manufacturing the same
JP2012235027A (en) * 2011-05-06 2012-11-29 Koa Corp Ceramic substrate and manufacturing method therefor
JP2015158436A (en) * 2014-02-25 2015-09-03 日本電産リード株式会社 Board inspection method, board inspection apparatus, inspection tool, and inspection tool set

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001358432A (en) * 2000-06-13 2001-12-26 Iwaki Electronics Corp Method for detecting defect of electronic component module
JP2003014654A (en) * 2001-06-27 2003-01-15 Ngk Spark Plug Co Ltd Substrate inspection method, inspection device therefor and method for manufacturing product for electronic machinery
JP2005310950A (en) * 2004-04-20 2005-11-04 Yamaha Fine Technologies Co Ltd Manufacturing method of electric conductive pattern in printed circuit board and manufacturing device
JP2005337900A (en) * 2004-05-27 2005-12-08 Fujitsu Ltd Method and device for detecting defect in through hole
JP2011176075A (en) * 2010-02-24 2011-09-08 Nitto Denko Corp Wiring circuit board aggregate sheet and method for manufacturing the same
JP2012235027A (en) * 2011-05-06 2012-11-29 Koa Corp Ceramic substrate and manufacturing method therefor
JP2015158436A (en) * 2014-02-25 2015-09-03 日本電産リード株式会社 Board inspection method, board inspection apparatus, inspection tool, and inspection tool set

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7165842B1 (en) * 2021-02-18 2022-11-04 デンカ株式会社 Ceramic plate and method for manufacturing ceramic plate

Also Published As

Publication number Publication date
JPWO2020262198A1 (en) 2020-12-30

Similar Documents

Publication Publication Date Title
US7155812B1 (en) Method for producing a tube
WO2020262198A1 (en) Ceramic substrate and method for manufacture thereof, composite substrate, circuit substrate and method for manufacture thereof, and method for inspection of circuit substrate
CN108925066B (en) multilayer board interlayer offset detection method and detection system
JPH09304324A (en) Crack inspection method for ceramic substrate
WO2018189937A1 (en) Component mounting system and adhesive inspection device
WO2021054317A1 (en) Composite substrate and method for manufacturing same, and circuit substrate and method for manufacturing same
JP4085925B2 (en) Printed circuit board manufacturing method
KR20100112451A (en) A repair structure of pattern parts and a repair method of the pattern parts
CN112213353B (en) Method for testing linear expansion coefficient
JP7289592B2 (en) Inspection board and inspection method
KR101055593B1 (en) Repair method of pattern part
TW201337251A (en) Electrode substrate and circuit pattern inspection apparatus having the same
TWI305840B (en)
CN110927356A (en) Method for testing performance of solder paste
JP2572201B2 (en) Method and apparatus for processing small diameter holes in substrate material
JP2004281328A (en) Defective correction method and defective correction device of electrode for organic el panel
TW201004509A (en) Method for cutting copper-clad laminate
Li et al. 3D laser trimming technology for regulating embedded thick-film carbon resistors on a random access memory module
CN117156692B (en) Press fit method for effectively improving flatness of whole PCB
JP2004281536A (en) Method of detecting defect in laminated ceramic electronic part
Somer et al. Bonding of zero-shrink LTCC with alumina ceramics
JP2002261425A (en) Method of manufacturing circuit board
CN113597120A (en) Method and system for selectively removing conductive material on substrate and manufacturing circuit pattern
KR102351185B1 (en) Bonded substrate sheet and connecting method of substrate sheet
WO2019139266A1 (en) Ceramic circuit board

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20832556

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021526883

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20832556

Country of ref document: EP

Kind code of ref document: A1